; -------------------------------------------------------------------------------- ; @Title: iMX61 On-Chip Peripherals ; @Props: Released ; @Author: ASK, BIC, CNA, KBR, KRW, PSS, TAT, KOB ; @Changelog: 2011-08-30 ; 2017-06-05 KOB ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: MX61UG_cust_Review.pdf (Rev.0.1, 2010-11-30) ; IMX6DQRM_revC.pdf (2012-01) ; iMX6Quad_6Dual_RM_RevD.pdf (Rev. D, 2012-08) ; iMX6SDL_RM_RevB.pdf (Rev. B, 2012-08); ; IMX6DQRM.pdf (Rev. 1, 2013-04) ; IMX6SDLRM.pdf (Rev. 1, 2013-04) ; IHI0048B_b_gic_architecture_specification.pdf ver. 2.0 ; DDI0407G_cortex_a9_mpcore_r3p0_trm.pdf rev. r3p0 ; DDI0416B_gic_pl390_r0p0_trm.pdf rev. r0p0 ; IMX6SLRM.pdf (Rev. 2, 2015-06) ; @Chip: IMX6SOLOLITE, IMX6DUALLITE, IMX6QUAD ; @Core: Cortex-A9 ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perimx6.per 10621 2019-05-31 13:07:23Z mkolodziejczyk $ ; Known problems: In some modules (SPDIF,ROMC,DBGMON) there are differences between addresses from memory map and registers descriptions. ; Base addresses for some modules are missing. config 16. 8. sif STRing.SCAN(CORENAME(),"CORTEXA9",0.)>=0. tree "Core Registers (Cortex-A9MPCore)" width 0x8 ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- tree "ID Registers" rgroup.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7" bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" textline " " bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" rgroup.long c15:0x200++0x0 line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register" rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries" bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128" textline " " bitfld.long 0x0 0. " nU ,Unified or Separate TLBs" "Unified,Separate" rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 8.--11. " ClusterID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3" rgroup.long c15:0x0410++0x00 line.long 0x00 "MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..." bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported" bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..." bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Not supported,Supported,?..." rgroup.long c15:0x0020++0x00 line.long 0x00 "ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..." tree.end width 0x8 tree "System Control and Configuration" group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " PARON ,Parity On" "Disabled,Enabled" bitfld.long 0x00 8. " ALIOW ,Enable allocation in one cache way only" "Disabled,Enabled" bitfld.long 0x00 7. " EXCL ,Exclusive cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SMP ,Signals if the Cortex-A9 processor is taking part in coherency or not" "0,1" bitfld.long 0x00 3. " FOZ ,Full Of Zero mode Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DP1 ,L1 Dside prefetch Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PH2 ,L2 prefetch hint Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FW ,Cache and TLB maintenance broadcast" "Disabled,Enabled" group.long c15:0x201++0x0 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 6. " nET ,Not early termination" "Not early,Early" bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" textline " " bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" textline " " bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x111++0x0 line.long 0x0 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted" bitfld.long 0x00 16. " PLE ,NS accesses to the Preload Engine resources control" "Secure,Non-secure" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted" group.long c15:0x0311++0x00 line.long 0x00 "VCR,Virtualization Control Register" bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1" bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1" bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1" group.long c15:0xf++0x0 line.long 0x00 "PCR,Power Control Register" bitfld.long 0x00 8.--10. " MCL ,Max Clock Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EDCG ,Enable Dynamic Clock Gating" "Disabled,Enabled" textline " " group.long c15:0x000c++0x00 line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address" group.long c15:0x10c++0x00 line.long 0x0 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address" rgroup.long c15:0x1C++0x0 line.long 0x0 "ISR,Interrupt status Register" bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending" bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending" bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending" group.long c15:0x11c++0x0 line.long 0x00 "VIR,Virtualization Interrupt Register" bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1" bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1" bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1" tree.end width 0x0d tree "Memory Management Unit" group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address" bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner" textline " " bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1" bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" textline " " bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address" bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner" textline " " bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1" bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" textline " " bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable" bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable" bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000" textline " " group.long c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address" group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,AuxiliaryInstruction Fault Status Register" hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status" textline " " group.long c15:0xa++0x0 line.long 0x0 "TLBLR,TLB Lockdown Register" bitfld.long 0x0 28.--29. " VICTIM ,Victim Value Increments after Each Tabel Walk" "0,1,2,3" bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown" group.long c15:0x0047++0x00 line.long 0x00 "PAR,PA Register" hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured" bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable" textline " " bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back" bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back" textline " " bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful" textline " " group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attribute 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attribute 6" "Outer,Inner" textline " " bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attribute 5" "Outer,Inner" bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attribute 4" "Outer,Inner" textline " " bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attribute 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attribute 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attribute 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attribute 0" "Outer,Inner" textline " " bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " group.long c15:0x400f++0x0 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address" textline " " rgroup.long c15:0x000d++0x00 line.long 0x00 "FCSEIDR,FCSE PID Register" hexmask.long.byte 0x00 25.--31. 0x02 " PID ,Process for Fast Context Switch Identification and Specification" group.long c15:0x10d++0x0 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID" hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID" group.long c15:0x020d++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRURW ,User Read/Write Thread ID" group.long c15:0x030d++0x00 line.long 0x00 "TPIDRURO,User Read-only Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRURO ,User Read-only Thread ID" group.long c15:0x040d++0x00 line.long 0x00 "TPIDRPRW,Privileged Only Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRPRW ,Privileged Only Thread ID" tree.end width 0xC tree "Cache Control and Configuration" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" textline " " bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 18.--20. " CType7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 15.--17. " CType6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 12.--14. " CType5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 9.--11. " CType4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 6.--8. " CType3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 3.--5. " CType2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 0.--2. " CType1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" textline " " bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" textline " " hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words" group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction" tree.end width 12. tree "System Performance Monitor" group.long c15:0xC9++0x0 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset" textline " " bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled" group.long c15:0x1C9++0x0 line.long 0x0 "PMCNTENSET,Count Enable Set Register" bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled" group.long c15:0x2C9++0x0 line.long 0x0 "PMCNTENCLR,Count Enable Clear Register" bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled" group.long c15:0x3C9++0x0 line.long 0x0 "PMOVSR,Overflow Flag Status Register" eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4C9++0x0 line.long 0x0 "PMSWINC,Software Increment Register" eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment" eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" textline " " eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5C9++0x0 line.long 0x0 "PMSELR,Performance Counter Selection Register" bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..." group.long c15:0xD9++0x0 line.long 0x00 "PMCCNTR,Cycle Count Register" hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count" group.long c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Event Type Select Register" hexmask.long.byte 0x00 0.--7. 1. " EVCNT ,Event to count" group.long c15:0x02d9++0x00 line.long 0x00 "PMXEVCNTR,Event Count Register" hexmask.long 0x00 0.--31. 1. " PMNX ,Event Count" group.long c15:0xE9++0x0 line.long 0x0 "PMUSERENR,User Enable Register" bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled" group.long c15:0x1E9++0x0 line.long 0x0 "PMINTENSET,Interrupt Enable Set Register" bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2E9++0x0 line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" tree.end width 8. tree "Preload Engine" rgroup.long c15:0x000b++0x00 line.long 0x00 "PLEIDR,PLE ID Register" bitfld.long 0x00 16.--20. " FIFOS ,PLE FIFO size" "Not present,Reserved,Reserved,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,?..." bitfld.long 0x00 0. " PEP ,Preload Engine presence" "Not present,Present" rgroup.long c15:0x020b++0x00 line.long 0x00 "PLEASR,PLE Activity Status Register" bitfld.long 0x00 0. " R ,PLE Channel running" "Not running,Running" rgroup.long c15:0x040b++0x00 line.long 0x00 "PLEFSR,PLE FIFO Status Register" bitfld.long 0x00 0.--4. " AE ,Number of available entries in the PLE FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x001b++0x00 line.long 0x00 "PLEUAR,Preload Engine User Accessibility Register" bitfld.long 0x00 0. " U ,User accessibility" "Not permited,Permited" group.long c15:0x011b++0x00 line.long 0x00 "PLEPCR,Preload Engine Parameters Control Register" hexmask.long.word 0x00 16.--29. 1. " BSM ,Block size mask" hexmask.long.byte 0x00 8.--15. 1. " BNM ,Block number mask" hexmask.long.byte 0x00 0.--7. 1. " WS ,PLE wait states" tree.end tree "NEON" rgroup.long c15:0x000f++0x00 line.long 0x00 "NEON,NEON busy Register" bitfld.long 0x00 0. " Busy ,NEON busy" "Not busy,Busy" tree.end width 0xb width 9. tree "Debug Registers" tree "Jazelle Register" group.long c14:0x7000++0x0 line.long 0x00 "JIDR,Jazelle ID Register" bitfld.long 0x00 28.--31. " ARCH ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DESIGN ,Implementor code of the designer of the subarchitecture" textline " " hexmask.long.byte 0x00 12.--19. 1. " SAMAJ ,The subarchitecture code" bitfld.long 0x00 8.--11. " SAMIN ,The subarchitecture minor code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " TRTBFR ,Format of the Jazelle Configurable Opcode Translation Table Register" "0,1" bitfld.long 0x00 0.--5. " TRTBSZ ,Size of the Jazelle Configurable Opcode Translation Table Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long c14:0x7001++0x0 line.long 0x00 "JOSCR,Jazelle OS Control Register" bitfld.long 0x00 1. " CV ,Configuration Valid" "Not valid,Valid" bitfld.long 0x00 0. " CD ,Configuration Disabled" "No,Yes" group.long c14:0x7002++0x0 line.long 0x00 "JMCR,Jazelle Main Configuration Register" bitfld.long 0x00 31. " nAR ,Not Array Operations" "Disabled,Enabled" bitfld.long 0x00 30. " FP ,Floating-point opcodes handler" "VM implementation,VFP instructions" bitfld.long 0x00 29. " AP ,Array Pointer" "Handler,Pointer" textline " " bitfld.long 0x00 28. " OP ,Object Pointer" "Handler,Pointer" bitfld.long 0x00 27. " IS ,Index Size" "8 bits,16 bits" bitfld.long 0x00 26. " SP ,Static Pointer" "Handler,Pointer" textline " " bitfld.long 0x00 0. " JE ,Jazelle Enable" "Disabled,Enabled" group.long c14:0x7003++0x0 line.long 0x00 "JPR,Jazelle Parameters Register" bitfld.long 0x00 17.--21. " BSH ,Bounds SHift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " sADO ,Signed Array Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " ARO ,Array Reference Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " STO ,STatic Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ODO ,Object Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long c14:0x7004++0x0 line.long 0x00 "JCOTTRR,Jazelle Configurable Opcode Translation Table Register" bitfld.long 0x00 10.--15. " OPCODE ,Bottom bits of the configurable opcode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--3. " OPERATION ,Code for the operation" "0,1,2,3,4,5,6,7,8,9,?..." tree.end width 11. tree "Processor Identifier Registers" rgroup c14:0x340--0x340 line.long 0x00 "CPUID,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number" textline " " hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" textline " " hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision" rgroup c14:0x341--0x341 line.long 0x00 "CACHETYPE,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7" bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." textline " " bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." rgroup c14:0x343--0x343 line.long 0x00 "TLBTYPE,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries" textline " " bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128" bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate" rgroup c14:0x348--0x348 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..." rgroup c14:0x349--0x349 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..." rgroup c14:0x34a--0x34a line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..." rgroup c14:0x34c--0x34c line.long 0x00 "ID_MMFR0,Processor Feature Register 0" bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..." textline " " bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..." rgroup c14:0x34d--0x34d line.long 0x00 "ID_MMFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup c14:0x34e--0x34e line.long 0x00 "ID_MMFR2,Processor Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." rgroup c14:0x34f--0x34f line.long 0x00 "ID_MMFR3,Processor Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup c14:0x350--0x350 line.long 0x00 "ID_ISAR0,ISA Feature Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..." rgroup c14:0x351--0x351 line.long 0x00 "ID_ISAR1,ISA Feature Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..." rgroup c14:0x352--0x352 line.long 0x00 "ID_ISAR2,ISA Feature Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..." rgroup c14:0x353--0x353 line.long 0x00 "ID_ISAR3,ISA Feature Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..." rgroup c14:0x354--0x354 line.long 0x00 "ID_ISAR4,ISA Feature Register 4" bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..." tree.end tree "Coresight Management Registers" width 0xC textline " " group c14:0x3c0--0x3c0 line.long 0x0 "ITCTRL,Integration Mode Control Register" bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group c14:0x3e8--0x3e8 line.long 0x0 "CLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set" group c14:0x3e9--0x3e9 line.long 0x0 "CLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared" wgroup c14:0x3ec--0x3ec line.long 0x0 "LAR,Lock Access Register" hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key" rgroup c14:0x3ed--0x3ed line.long 0x0 "LSR,Lock Status Register" bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed" bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored" textline " " bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required" width 0xc rgroup c14:0x3ee--0x3ee line.long 0x0 "AUTHSTATUS,Authentication Status Register" bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented" bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented" bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented" bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented" bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled" width 0xc rgroup c14:0x3f2--0x3f2 line.long 0x0 "DEVID,Device Identifier" bitfld.long 0x00 0.--3. " PCSAMPLE ,Level of Program Counter sampling support (DBGPCSR and DBGCIDSR)" "Not implemented,DBGPCSR,Both,?..." rgroup c14:0x3f3--0x3f3 line.long 0x0 "DEVTYPE,Device Type" hexmask.long.byte 0x0 4.--7. 1. " STPC ,Sub Type: Processor Core" hexmask.long.byte 0x0 0.--3. 1. " MCDL ,Main Class: Debug Logic" rgroup c14:0x3f8--0x3f8 line.long 0x0 "PID0,Peripherial ID0" hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]" rgroup c14:0x3f9--0x3f9 line.long 0x0 "PID1,Peripherial ID1" hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]" hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]" rgroup c14:0x3fa--0x3fa line.long 0x0 "PID2,Peripherial ID2" hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " JEPCD ,JEP 106 ID code" "Not used,Used" textline " " hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]" rgroup c14:0x3fb--0x3fb line.long 0x0 "PID3,Peripherial ID3" hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd" hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified" rgroup c14:0x3f4--0x3f4 line.long 0x0 "PID4,Peripherial ID4" bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" rgroup c14:0x3fc--0x3fc line.long 0x0 "COMPONENTID0,Component ID0" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" rgroup c14:0x3fd--0x3fd line.long 0x0 "COMPONENTID1,Component ID1" hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)" hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble" rgroup c14:0x3fe--0x3fe line.long 0x0 "COMPONENTID2,Component ID2" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" rgroup c14:0x3ff--0x3ff line.long 0x0 "COMPONENTID3,Component ID3" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" tree.end textline " " width 0x7 rgroup c14:0x000--0x000 line.long 0x0 "DIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,ARMv7 no ext.,?..." textline " " bitfld.long 0x0 15. " DEVID_IMP ,Debug Device ID Register DBGDEVID implemented" "Not implemented,Implemented" bitfld.long 0x0 14. " NSUHD_IMP ,Secure User halting debug implemented" "Not implemented,Implemented" textline " " bitfld.long 0x0 13. " PCSR_IMP ,Program Counter Sampling Register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE_IMP ,Security Extensions implemented" "Not implemented,Implemented" textline " " bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x7 group c14:0x22--0x22 line.long 0x0 "DSCR,Debug Status and Control Register" bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full" bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full" textline " " bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full" bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full" textline " " bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired" bitfld.long 0x0 24. " INSTRCOMPL_L ,Latched Instruction Complete" "Executing,Not executing" textline " " bitfld.long 0x0 20.--21. " EXTDCCMODE ,External DCC access mode" "Non-blocking,Stall,Fast,?..." bitfld.long 0x0 19. " ADADISCARD ,Asynchronous Data Aborts Discarded" "Not discarded,Discarded" textline " " bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured" bitfld.long 0x0 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disabled" "No,Yes" textline " " bitfld.long 0x0 16. " SPIDDIS ,Secure Privileged Invasive Debug Disabled" "No,Yes" bitfld.long 0x0 15. " MDBGEN ,Monitor Debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled" bitfld.long 0x0 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " UDCCDIS ,User mode access to Comms Channel disable" "No,Yes" bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "No,Yes" textline " " bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced" bitfld.long 0x0 8. " UND_l ,Sticky Undefined Instruction" "No exception,Exception" textline " " bitfld.long 0x0 7. " ADABORT_l ,Sticky Asynchronous Data Abort" "Not aborted,Aborted" bitfld.long 0x0 6. " SDABORT_l ,Sticky Synchronous Data Abort" "Not aborted,Aborted" textline " " bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt request,Breakpoint,Asynchronous Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited" textline " " bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state" width 0x7 if (((data.long(c14:0x00))&0x01000)==0x00000) group c14:0x007--0x007 line.long 0x0 "VCR,Vector Catch Register" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled" bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" else group c14:0x007--0x007 line.long 0x0 "VCR,Vector Catch Register" bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled" bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled" bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" endif ;rgroup c14:0x1++0x1 ; line.long 0x0 "DRAR,Debug ROM Address Register" ; hexmask.long 0x0 12.--31. 0x1000 " DBROMPA ,Debug bus ROM physical address" ; bitfld.long 0x0 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid" ; line.long 0x4 "DSAR,Debug Self Address Offset Register" ; hexmask.long 0x4 12.--31. 0x1000 " DBSAOV ,Debug bus self-address offset value" ; bitfld.long 0x4 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid" ;hgroup c14:0x50++0x0 ; hide.long 0x0 "DTR,Data Transfer Register" ; in width 0x7 hgroup c14:0x020--0x020 hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register" in group c14:0x023--0x023 line.long 0x0 "DTRTX,Host -> Target Data Transfer Register" hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data" wgroup c14:0x21++0x00 line.long 0x00 "ITR,Instruction Transfer Register" hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute" wgroup c14:0x24++0x00 line.long 0x00 "DRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBIUR , Cancel Bus Interface Unit Requests" "Not canceled,Canceled" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared" textline " " bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared" bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested" rgroup c14:0xc4++0x00 line.long 0x00 "PRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "No reset,Reset" bitfld.long 0x00 1. " WRR ,Warm reset request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high" hgroup c14:0xc5++0x00 hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register" in tree.end width 6. tree "Breakpoint Registers" group c14:0x40++0x00 line.long 0x00 "BVR0,Breakpoint Value Register 0" hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0" group c14:0x50++0x00 line.long 0x00 "BCR0,Breakpoint Control Register 0" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x41++0x00 line.long 0x00 "BVR1,Breakpoint Value Register 1" hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1" group c14:0x51++0x00 line.long 0x00 "BCR1,Breakpoint Control Register 1" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x42++0x00 line.long 0x00 "BVR2,Breakpoint Value Register 2" hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2" group c14:0x52++0x00 line.long 0x00 "BCR2,Breakpoint Control Register 2" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x43++0x00 line.long 0x00 "BVR3,Breakpoint Value Register 3" hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3" group c14:0x53++0x00 line.long 0x00 "BCR3,Breakpoint Control Register 3" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x44++0x00 line.long 0x00 "BVR4,Breakpoint Value Register 4" hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4" group c14:0x54++0x00 line.long 0x00 "BCR4,Breakpoint Control Register 4" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x45++0x00 line.long 0x00 "BVR5,Breakpoint Value Register 5" hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5" group c14:0x55++0x00 line.long 0x00 "BCR5,Breakpoint Control Register 5" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" tree.end width 6. tree "Watchpoint Control Registers" group c14:0x60++0x00 line.long 0x00 "WVR0,Watchpoint Value Register 0" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group c14:0x70--0x70 line.long 0x0 "WCR0,Watchpoint Control Register 0" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x61++0x00 line.long 0x00 "WVR1,Watchpoint Value Register 1" hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1" group c14:0x71--0x71 line.long 0x0 "WCR1,Watchpoint Control Register 1" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x62++0x00 line.long 0x00 "WVR2,Watchpoint Value Register 2" hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2" group c14:0x72--0x72 line.long 0x0 "WCR2,Watchpoint Control Register 2" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x63++0x00 line.long 0x00 "WVR3,Watchpoint Value Register 3" hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3" group c14:0x73--0x73 line.long 0x0 "WCR3,Watchpoint Control Register 3" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x006--0x006 line.long 0x0 "WFAR,Watchpoint Fault Address Register" hexmask.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction" tree.end width 0xb width 9. base ad:(d.l(c15:0x400f)) tree "Snoop Control Unit (SCU)" group.long 0x00++0x03 line.long 0x00 "SCUCR,SCU Control Register" bitfld.long 0x00 6. " ICSE ,IC standby enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCUSE ,SCU standby enable" "Disabled,Enabled" bitfld.long 0x00 4. " FADTP0E ,Force all Device to port0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SCUSLE ,SCU Speculative linefills enable" "Disabled,Enabled" bitfld.long 0x00 2. " SCURPE ,SCU RAMs Parity enable" "Disabled,Enabled" bitfld.long 0x00 1. " AFE ,Address filtering enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SCUE ,SCU enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SCUCON,SCU Configuration Register" bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,64KB,?..." textline " " bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP" bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP" textline " " bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP" bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP" bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3" group.long 0x08++0x03 line.long 0x00 "SCUSTAT,SCU CPU Power Status Register" bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off" bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off" textline " " bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off" bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off" wgroup.long 0x0c++0x03 line.long 0x00 "INV,SCU Invalidate All Register" bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40++0x03 line.long 0x00 "FSAR,Filtering Start Address Register" hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address" group.long 0x44++0x03 line.long 0x00 "FEAR,Filtering End Address Register" hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address" group.long 0x50++0x03 line.long 0x00 "SAC,SCU Access Control Register" bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access" bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access" bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access" textline " " bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access" group.long 0x54++0x03 line.long 0x00 "SSAC,SCU Secure Access Control Register" bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure" bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure" bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure" textline " " bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure" bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure" textline " " bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access" textline " " bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access" bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access" bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access" tree.end width 0xb width 8. tree "Timer and Watchdog Blocks" base ad:(d.l(c15:0x400f))+0x600 group.long 0x00++0xb "Timer" line.long 0x00 "TLR,Timer Load Register" line.long 0x04 "TCR,Timer Counter Register" line.long 0x08 "TCONR,Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled" bitfld.long 0x08 1. " AREL ,Auto reload" "Single shot,Auto-reload" bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled" group.long 0x0c++0x3 line.long 0x00 "TISR,Timer Interrupt Status Register" eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1" group.long 0x20++0x13 "Watchdog" line.long 0x00 "WLR,Watchdog Load Register" line.long 0x04 "WCR,Watchdog Counter Register" line.long 0x08 "WCONR,Watchdog Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog" bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled" bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload" textline " " bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled" line.long 0x0c "WISR,Watchdog Interrupt Status Register" eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1" line.long 0x10 "WRSR,Watchdog Reset Sent Register" eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset" wgroup.long 0x34++0x3 line.long 0x00 "WDR,Watchdog Disable Register" base ad:(d.l(c15:0x400f))+0x200 group.long 0x00++0xb "Global Timer" line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register" line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register" line.long 0x08 "GTCONR,Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment" bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled" bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled" group.long 0x0c++0x3 line.long 0x00 "GTSR,Timer Status Register" eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1" group.long 0x10++0xb line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register" line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register" line.long 0x08 "GTINCR,Auto-increment Register for Comparator" tree.end width 11. tree.open "Interrupt Controller (PL-390)" base ad:0x00A01000 width 20. tree "CPU Interface" group.long 0x00++0x03 "Interrupt Controller Physical CPU Interface" line.long 0x00 "ICCICR,CPU Interface Control Register" bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled" group.long 0x04++0x03 line.long 0x00 "ICCPMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" group.long 0x08++0x03 line.long 0x00 "ICCBPR,Binary Point Register" bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7" hgroup.long 0x0C++0x03 hide.long 0x00 "ICCIAR,Interrupt Acknowledge Register" in wgroup.long 0x10++0x03 line.long 0x00 "ICCEOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access" rgroup.long 0x14++0x03 line.long 0x00 "ICCRPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt" rgroup.long 0x18++0x03 line.long 0x00 "ICCHPIR,Highest Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt" group.long 0x1C++0x03 line.long 0x00 "ICCABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7" group.long 0x40++0x03 line.long 0x00 "INTEG_EN_C,Integration Test Enable Register" bitfld.long 0x00 0. " INTEG_EN ,Enables the integration test logic" "Disabled,Enabled" group.long 0x44++0x03 line.long 0x00 "INTERRUPT_OUT,Interrupt Output Register" bitfld.long 0x00 1. " SET_NFIQ_C ,Enables a processor to read or set the status of NFIQ_C" "LOW,HIGH" bitfld.long 0x00 0. " SET_NIRQ_C ,Enables a processor to read or set the status of NIRQ_C" "LOW,HIGH" rgroup.long 0xFC++0x03 "CPU Interface Identification" line.long 0x00 "ICCIIDR,CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODUCTID ,An IMPLEMENTATION DEFINED product identifier" bitfld.long 0x00 16.--19. " ARCHIT_VER ,GIC architecture version" "Reserved,GICv1,GICv2,?..." hexmask.long.byte 0x00 12.--15. 1. " REV ,An IMPLEMENTATION DEFINED revision number for the CPU interface" hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,Contains the JEP106 code of the company" tree.end ;section width 9. base ad:0x00A01000 tree "Distributor" if (((per.l(ad:(ad:0x00A01000+0x04)))&0x400)==0x000) group.long 0x00++0x03 "Distributor Interrupt Controller" line.long 0x00 "ICDDCR,Interrupt Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for pending interrupts from the Distributor to the CPU" "Disabled,Enabled" elif (((per.l(ad:(ad:0x00A01000+0x04)))&0x400)==0x400) group.long 0x00++0x03 line.long 0x00 "ICDDCR,Interrupt Distributor Control Register" bitfld.long 0x00 1. " ENABLEGRP1 , Global enable for forwarding pending Group 1 interrupts" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global enable for forwarding pending Gorup 0 interrupts" "Disabled,Enabled" endif rgroup.long 0x04++0x03 line.long 0x00 "ICDICTR,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Number of supported Lockable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented" bitfld.long 0x00 5.--7. " CPUNO ,Number of supported CPU interfaces" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0.--4. " ITLINENO ,Number of provided INTIDs" "32,64,96,128,160,192,224,256,288,320,352,384,416,448,480,512,544,576,608,640,672,704,736,768,800,832,864,896,928,960,992,1024" rgroup.long 0x08++0x03 line.long 0x00 "ICDIIDR,Distributor Implementer Identification Register" hexmask.long.byte 0x00 24.--31. 1. " PRODUCTID ,An IMPEMENTATION DEFINED product identifier" hexmask.long.byte 0x00 16.--19. 1. " VARIANT ,An IMPEMENTATION DEFINED variant number" hexmask.long.byte 0x00 12.--15. 1. " REVISION ,An IMPEMENTATION DEFINED revision number" textline " " hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,JEP106 code of the company that implemented GIC Distributor" tree "CPU" width 15. tree "Interrupt Security" group.long 0x80++0x13 line.long 0x00 "ICDISR0,Interrupt security register (SGI,PPI)" bitfld.long 0x00 20. " PPI_SS_4 ,Security status for PPI(4)" "Secured,Non-secured" textline " " bitfld.long 0x00 19. " PPI_SS_3 ,Security status for PPI(3)" "Secured,Non-secured" bitfld.long 0x00 18. " PPI_SS_2 ,Security status for PPI(2)" "Secured,Non-secured" bitfld.long 0x00 17. " PPI_SS_1 ,Security status for PPI(1)" "Secured,Non-secured" textline " " bitfld.long 0x00 16. " PPI_SS_0 ,Security status for PPI(0)" "Secured,Non-secured" bitfld.long 0x00 15. " SGI_SS_15 ,Security status for SGI(15)" "Secured,Non-secured" bitfld.long 0x00 14. " SGI_SS_14 ,Security status for SGI(14)" "Secured,Non-secured" textline " " bitfld.long 0x00 13. " SGI_SS_13 ,Security status for SGI(13)" "Secured,Non-secured" bitfld.long 0x00 12. " SGI_SS_12 ,Security status for SGI(12)" "Secured,Non-secured" bitfld.long 0x00 11. " SGI_SS_11 ,Security status for SGI(11)" "Secured,Non-secured" textline " " bitfld.long 0x00 10. " SGI_SS_10 ,Security status for SGI(10)" "Secured,Non-secured" bitfld.long 0x00 9. " SGI_SS_9 ,Security status for SGI(9)" "Secured,Non-secured" bitfld.long 0x00 8. " SGI_SS_8 ,Security status for SGI(8)" "Secured,Non-secured" textline " " bitfld.long 0x00 7. " SGI_SS_7 ,Security status for SGI(7)" "Secured,Non-secured" bitfld.long 0x00 6. " SGI_SS_6 ,Security status for SGI(6)" "Secured,Non-secured" bitfld.long 0x00 5. " SGI_SS_5 ,Security status for SGI(5)" "Secured,Non-secured" textline " " bitfld.long 0x00 4. " SGI_SS_4 ,Security status for SGI(4)" "Secured,Non-secured" bitfld.long 0x00 3. " SGI_SS_3 ,Security status for SGI(3)" "Secured,Non-secured" bitfld.long 0x00 2. " SGI_SS_2 ,Security status for SGI(2)" "Secured,Non-secured" textline " " bitfld.long 0x00 1. " SGI_SS_1 ,Security status for SGI(1)" "Secured,Non-secured" bitfld.long 0x00 0. " SGI_SS_0 ,Security status for SGI(0)" "Secured,Non-secured" line.long 0x04 "ICDISR1,Interrupt security registers SPI[31:0]" bitfld.long 0x04 31. " SPI_SS_31 ,Security Status Bit 31" "Secured,Non-secured" bitfld.long 0x04 30. " SPI_SS_30 ,Security Status Bit 30" "Secured,Non-secured" bitfld.long 0x04 29. " SPI_SS_29 ,Security Status Bit 29" "Secured,Non-secured" textline " " bitfld.long 0x04 28. " SPI_SS_28 ,Security Status Bit 28" "Secured,Non-secured" bitfld.long 0x04 27. " SPI_SS_27 ,Security Status Bit 27" "Secured,Non-secured" bitfld.long 0x04 26. " SPI_SS_26 ,Security Status Bit 26" "Secured,Non-secured" textline " " bitfld.long 0x04 25. " SPI_SS_25 ,Security Status Bit 25" "Secured,Non-secured" bitfld.long 0x04 24. " SPI_SS_24 ,Security Status Bit 24" "Secured,Non-secured" bitfld.long 0x04 23. " SPI_SS_23 ,Security Status Bit 23" "Secured,Non-secured" textline " " bitfld.long 0x04 22. " SPI_SS_22 ,Security Status Bit 22" "Secured,Non-secured" bitfld.long 0x04 21. " SPI_SS_21 ,Security Status Bit 21" "Secured,Non-secured" bitfld.long 0x04 20. " SPI_SS_20 ,Security Status Bit 20" "Secured,Non-secured" textline " " bitfld.long 0x04 19. " SPI_SS_19 ,Security Status Bit 19" "Secured,Non-secured" bitfld.long 0x04 18. " SPI_SS_18 ,Security Status Bit 18" "Secured,Non-secured" bitfld.long 0x04 17. " SPI_SS_17 ,Security Status Bit 17" "Secured,Non-secured" textline " " bitfld.long 0x04 16. " SPI_SS_16 ,Security Status Bit 16" "Secured,Non-secured" bitfld.long 0x04 15. " SPI_SS_15 ,Security Status Bit 15" "Secured,Non-secured" bitfld.long 0x04 14. " SPI_SS_14 ,Security Status Bit 14" "Secured,Non-secured" textline " " bitfld.long 0x04 13. " SPI_SS_13 ,Security Status Bit 13" "Secured,Non-secured" bitfld.long 0x04 12. " SPI_SS_12 ,Security Status Bit 12" "Secured,Non-secured" bitfld.long 0x04 11. " SPI_SS_11 ,Security Status Bit 11" "Secured,Non-secured" textline " " bitfld.long 0x04 10. " SPI_SS_10 ,Security Status Bit 10" "Secured,Non-secured" bitfld.long 0x04 9. " SPI_SS_9 ,Security Status Bit 9" "Secured,Non-secured" bitfld.long 0x04 8. " SPI_SS_8 ,Security Status Bit 8" "Secured,Non-secured" textline " " bitfld.long 0x04 7. " SPI_SS_7 ,Security Status Bit 7" "Secured,Non-secured" bitfld.long 0x04 6. " SPI_SS_6 ,Security Status Bit 6" "Secured,Non-secured" bitfld.long 0x04 5. " SPI_SS_5 ,Security Status Bit 5" "Secured,Non-secured" textline " " bitfld.long 0x04 4. " SPI_SS_4 ,Security Status Bit 4" "Secured,Non-secured" bitfld.long 0x04 3. " SPI_SS_3 ,Security Status Bit 3" "Secured,Non-secured" bitfld.long 0x04 2. " SPI_SS_2 ,Security Status Bit 2" "Secured,Non-secured" textline " " bitfld.long 0x04 1. " SPI_SS_1 ,Security Status Bit 1" "Secured,Non-secured" bitfld.long 0x04 0. " SPI_SS_0 ,Security Status Bit 0" "Secured,Non-secured" line.long 0x08 "ICDISR2,Interrupt security registers SPI[63:32]" bitfld.long 0x08 31. " SPI_SS_63 ,Security Status Bit 63" "Secured,Non-secured" bitfld.long 0x08 30. " SPI_SS_62 ,Security Status Bit 62" "Secured,Non-secured" bitfld.long 0x08 29. " SPI_SS_61 ,Security Status Bit 61" "Secured,Non-secured" textline " " bitfld.long 0x08 28. " SPI_SS_60 ,Security Status Bit 60" "Secured,Non-secured" bitfld.long 0x08 27. " SPI_SS_59 ,Security Status Bit 59" "Secured,Non-secured" bitfld.long 0x08 26. " SPI_SS_58 ,Security Status Bit 58" "Secured,Non-secured" textline " " bitfld.long 0x08 25. " SPI_SS_57 ,Security Status Bit 57" "Secured,Non-secured" bitfld.long 0x08 24. " SPI_SS_56 ,Security Status Bit 56" "Secured,Non-secured" bitfld.long 0x08 23. " SPI_SS_55 ,Security Status Bit 55" "Secured,Non-secured" textline " " bitfld.long 0x08 22. " SPI_SS_54 ,Security Status Bit 54" "Secured,Non-secured" bitfld.long 0x08 21. " SPI_SS_53 ,Security Status Bit 53" "Secured,Non-secured" bitfld.long 0x08 20. " SPI_SS_52 ,Security Status Bit 52" "Secured,Non-secured" textline " " bitfld.long 0x08 19. " SPI_SS_51 ,Security Status Bit 51" "Secured,Non-secured" bitfld.long 0x08 18. " SPI_SS_50 ,Security Status Bit 50" "Secured,Non-secured" bitfld.long 0x08 17. " SPI_SS_49 ,Security Status Bit 49" "Secured,Non-secured" textline " " bitfld.long 0x08 16. " SPI_SS_48 ,Security Status Bit 48" "Secured,Non-secured" bitfld.long 0x08 15. " SPI_SS_47 ,Security Status Bit 47" "Secured,Non-secured" bitfld.long 0x08 14. " SPI_SS_46 ,Security Status Bit 46" "Secured,Non-secured" textline " " bitfld.long 0x08 13. " SPI_SS_45 ,Security Status Bit 45" "Secured,Non-secured" bitfld.long 0x08 12. " SPI_SS_44 ,Security Status Bit 44" "Secured,Non-secured" bitfld.long 0x08 11. " SPI_SS_43 ,Security Status Bit 43" "Secured,Non-secured" textline " " bitfld.long 0x08 10. " SPI_SS_42 ,Security Status Bit 42" "Secured,Non-secured" bitfld.long 0x08 9. " SPI_SS_41 ,Security Status Bit 41" "Secured,Non-secured" bitfld.long 0x08 8. " SPI_SS_40 ,Security Status Bit 40" "Secured,Non-secured" textline " " bitfld.long 0x08 7. " SPI_SS_39 ,Security Status Bit 39" "Secured,Non-secured" bitfld.long 0x08 6. " SPI_SS_38 ,Security Status Bit 38" "Secured,Non-secured" bitfld.long 0x08 5. " SPI_SS_37 ,Security Status Bit 37" "Secured,Non-secured" textline " " bitfld.long 0x08 4. " SPI_SS_36 ,Security Status Bit 36" "Secured,Non-secured" bitfld.long 0x08 3. " SPI_SS_35 ,Security Status Bit 35" "Secured,Non-secured" bitfld.long 0x08 2. " SPI_SS_34 ,Security Status Bit 34" "Secured,Non-secured" textline " " bitfld.long 0x08 1. " SPI_SS_33 ,Security Status Bit 33" "Secured,Non-secured" bitfld.long 0x08 0. " SPI_SS_32 ,Security Status Bit 32" "Secured,Non-secured" line.long 0x0C "ICDISR3,Interrupt security registers SPI[95:64]" bitfld.long 0x0C 31. " SPI_SS_95 ,Security Status Bit 95" "Secured,Non-secured" bitfld.long 0x0C 30. " SPI_SS_94 ,Security Status Bit 94" "Secured,Non-secured" bitfld.long 0x0C 29. " SPI_SS_93 ,Security Status Bit 93" "Secured,Non-secured" textline " " bitfld.long 0x0C 28. " SPI_SS_92 ,Security Status Bit 92" "Secured,Non-secured" bitfld.long 0x0C 27. " SPI_SS_91 ,Security Status Bit 91" "Secured,Non-secured" bitfld.long 0x0C 26. " SPI_SS_90 ,Security Status Bit 90" "Secured,Non-secured" textline " " bitfld.long 0x0C 25. " SPI_SS_89 ,Security Status Bit 89" "Secured,Non-secured" bitfld.long 0x0C 24. " SPI_SS_88 ,Security Status Bit 88" "Secured,Non-secured" bitfld.long 0x0C 23. " SPI_SS_87 ,Security Status Bit 87" "Secured,Non-secured" textline " " bitfld.long 0x0C 22. " SPI_SS_86 ,Security Status Bit 86" "Secured,Non-secured" bitfld.long 0x0C 21. " SPI_SS_85 ,Security Status Bit 85" "Secured,Non-secured" bitfld.long 0x0C 20. " SPI_SS_84 ,Security Status Bit 84" "Secured,Non-secured" textline " " bitfld.long 0x0C 19. " SPI_SS_83 ,Security Status Bit 83" "Secured,Non-secured" bitfld.long 0x0C 18. " SPI_SS_82 ,Security Status Bit 82" "Secured,Non-secured" bitfld.long 0x0C 17. " SPI_SS_81 ,Security Status Bit 81" "Secured,Non-secured" textline " " bitfld.long 0x0C 16. " SPI_SS_80 ,Security Status Bit 80" "Secured,Non-secured" bitfld.long 0x0C 15. " SPI_SS_79 ,Security Status Bit 79" "Secured,Non-secured" bitfld.long 0x0C 14. " SPI_SS_78 ,Security Status Bit 78" "Secured,Non-secured" textline " " bitfld.long 0x0C 13. " SPI_SS_77 ,Security Status Bit 77" "Secured,Non-secured" bitfld.long 0x0C 12. " SPI_SS_76 ,Security Status Bit 76" "Secured,Non-secured" bitfld.long 0x0C 11. " SPI_SS_75 ,Security Status Bit 75" "Secured,Non-secured" textline " " bitfld.long 0x0C 10. " SPI_SS_74 ,Security Status Bit 74" "Secured,Non-secured" bitfld.long 0x0C 9. " SPI_SS_73 ,Security Status Bit 73" "Secured,Non-secured" bitfld.long 0x0C 8. " SPI_SS_72 ,Security Status Bit 72" "Secured,Non-secured" textline " " bitfld.long 0x0C 7. " SPI_SS_71 ,Security Status Bit 71" "Secured,Non-secured" bitfld.long 0x0C 6. " SPI_SS_70 ,Security Status Bit 70" "Secured,Non-secured" bitfld.long 0x0C 5. " SPI_SS_69 ,Security Status Bit 69" "Secured,Non-secured" textline " " bitfld.long 0x0C 4. " SPI_SS_68 ,Security Status Bit 68" "Secured,Non-secured" bitfld.long 0x0C 3. " SPI_SS_67 ,Security Status Bit 67" "Secured,Non-secured" bitfld.long 0x0C 2. " SPI_SS_66 ,Security Status Bit 66" "Secured,Non-secured" textline " " bitfld.long 0x0C 1. " SPI_SS_65 ,Security Status Bit 65" "Secured,Non-secured" bitfld.long 0x0C 0. " SPI_SS_64 ,Security Status Bit 64" "Secured,Non-secured" line.long 0x10 "ICDISR4,Interrupt security registers SPI[127:96]" bitfld.long 0x10 31. " SPI_SS_127 ,Security Status Bit 127" "Secured,Non-secured" bitfld.long 0x10 30. " SPI_SS_126 ,Security Status Bit 126" "Secured,Non-secured" bitfld.long 0x10 29. " SPI_SS_125 ,Security Status Bit 125" "Secured,Non-secured" textline " " bitfld.long 0x10 28. " SPI_SS_124 ,Security Status Bit 124" "Secured,Non-secured" bitfld.long 0x10 27. " SPI_SS_123 ,Security Status Bit 123" "Secured,Non-secured" bitfld.long 0x10 26. " SPI_SS_122 ,Security Status Bit 122" "Secured,Non-secured" textline " " bitfld.long 0x10 25. " SPI_SS_121 ,Security Status Bit 121" "Secured,Non-secured" bitfld.long 0x10 24. " SPI_SS_120 ,Security Status Bit 120" "Secured,Non-secured" bitfld.long 0x10 23. " SPI_SS_119 ,Security Status Bit 119" "Secured,Non-secured" textline " " bitfld.long 0x10 22. " SPI_SS_118 ,Security Status Bit 118" "Secured,Non-secured" bitfld.long 0x10 21. " SPI_SS_117 ,Security Status Bit 117" "Secured,Non-secured" bitfld.long 0x10 20. " SPI_SS_116 ,Security Status Bit 116" "Secured,Non-secured" textline " " bitfld.long 0x10 19. " SPI_SS_115 ,Security Status Bit 115" "Secured,Non-secured" bitfld.long 0x10 18. " SPI_SS_114 ,Security Status Bit 114" "Secured,Non-secured" bitfld.long 0x10 17. " SPI_SS_113 ,Security Status Bit 113" "Secured,Non-secured" textline " " bitfld.long 0x10 16. " SPI_SS_112 ,Security Status Bit 112" "Secured,Non-secured" bitfld.long 0x10 15. " SPI_SS_111 ,Security Status Bit 111" "Secured,Non-secured" bitfld.long 0x10 14. " SPI_SS_110 ,Security Status Bit 110" "Secured,Non-secured" textline " " bitfld.long 0x10 13. " SPI_SS_109 ,Security Status Bit 109" "Secured,Non-secured" bitfld.long 0x10 12. " SPI_SS_108 ,Security Status Bit 108" "Secured,Non-secured" bitfld.long 0x10 11. " SPI_SS_107 ,Security Status Bit 107" "Secured,Non-secured" textline " " bitfld.long 0x10 10. " SPI_SS_106 ,Security Status Bit 106" "Secured,Non-secured" bitfld.long 0x10 9. " SPI_SS_105 ,Security Status Bit 105" "Secured,Non-secured" bitfld.long 0x10 8. " SPI_SS_104 ,Security Status Bit 104" "Secured,Non-secured" textline " " bitfld.long 0x10 7. " SPI_SS_103 ,Security Status Bit 103" "Secured,Non-secured" bitfld.long 0x10 6. " SPI_SS_102 ,Security Status Bit 102" "Secured,Non-secured" bitfld.long 0x10 5. " SPI_SS_101 ,Security Status Bit 101" "Secured,Non-secured" textline " " bitfld.long 0x10 4. " SPI_SS_100 ,Security Status Bit 100" "Secured,Non-secured" bitfld.long 0x10 3. " SPI_SS_99 ,Security Status Bit 99" "Secured,Non-secured" bitfld.long 0x10 2. " SPI_SS_98 ,Security Status Bit 98" "Secured,Non-secured" textline " " bitfld.long 0x10 1. " SPI_SS_97 ,Security Status Bit 97" "Secured,Non-secured" bitfld.long 0x10 0. " SPI_SS_96 ,Security Status Bit 96" "Secured,Non-secured" tree.end tree "Interrupt Set-Enable" group.long 0x100++0x13 line.long 0x00 "ICDISER0,Interrupt set-enable register (SGI,PPI)" bitfld.long 0x00 20. " PPI_SE_4 ,Set-enable for PPI(4)" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPI_SE_3 ,Set-enable for PPI(3)" "Disabled,Enabled" bitfld.long 0x00 18. " PPI_SE_2 ,Set-enable for PPI(2)" "Disabled,Enabled" bitfld.long 0x00 17. " PPI_SE_1 ,Set-enable for PPI(1)" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPI_SE_0 ,Set-enable for PPI(0)" "Disabled,Enabled" rbitfld.long 0x00 15. " SGI_SE_15 ,Set-enable for SGI(15)" "Disabled,Enabled" rbitfld.long 0x00 14. " SGI_SE_14 ,Set-enable for SGI(14)" "Disabled,Enabled" textline " " rbitfld.long 0x00 13. " SGI_SE_13 ,Set-enable for SGI(13)" "Disabled,Enabled" rbitfld.long 0x00 12. " SGI_SE_12 ,Set-enable for SGI(12)" "Disabled,Enabled" rbitfld.long 0x00 11. " SGI_SE_11 ,Set-enable for SGI(11)" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " SGI_SE_10 ,Set-enable for SGI(10)" "Disabled,Enabled" rbitfld.long 0x00 9. " SGI_SE_9 ,Set-enable for SGI(9)" "Disabled,Enabled" rbitfld.long 0x00 8. " SGI_SE_8 ,Set-enable for SGI(8)" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SGI_SE_7 ,Set-enable for SGI(7)" "Disabled,Enabled" rbitfld.long 0x00 6. " SGI_SE_6 ,Set-enable for SGI(6)" "Disabled,Enabled" rbitfld.long 0x00 5. " SGI_SE_5 ,Set-enable for SGI(5)" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SGI_SE_4 ,Set-enable for SGI(4)" "Disabled,Enabled" rbitfld.long 0x00 3. " SGI_SE_3 ,Set-enable for SGI(3)" "Disabled,Enabled" rbitfld.long 0x00 2. " SGI_SE_2 ,Set-enable for SGI(2)" "Disabled,Enabled" textline " " rbitfld.long 0x00 1. " SGI_SE_1 ,Set-enable for SGI(1)" "Disabled,Enabled" rbitfld.long 0x00 0. " SGI_SE_0 ,Set-enable for SGI(0)" "Disabled,Enabled" line.long 0x04 "ICDISER1,Interrupt set-enable register SPI[31:0]" bitfld.long 0x04 31. " SPI_SE_31 ,Set Enable Bit 31" "Disabled,Enabled" bitfld.long 0x04 30. " SPI_SE_30 ,Set Enable Bit 30" "Disabled,Enabled" bitfld.long 0x04 29. " SPI_SE_29 ,Set Enable Bit 29" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " SPI_SE_28 ,Set Enable Bit 28" "Disabled,Enabled" bitfld.long 0x04 27. " SPI_SE_27 ,Set Enable Bit 27" "Disabled,Enabled" bitfld.long 0x04 26. " SPI_SE_26 ,Set Enable Bit 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SPI_SE_25 ,Set Enable Bit 25" "Disabled,Enabled" bitfld.long 0x04 24. " SPI_SE_24 ,Set Enable Bit 24" "Disabled,Enabled" bitfld.long 0x04 23. " SPI_SE_23 ,Set Enable Bit 23" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " SPI_SE_22 ,Set Enable Bit 22" "Disabled,Enabled" bitfld.long 0x04 21. " SPI_SE_21 ,Set Enable Bit 21" "Disabled,Enabled" bitfld.long 0x04 20. " SPI_SE_20 ,Set Enable Bit 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " SPI_SE_19 ,Set Enable Bit 19" "Disabled,Enabled" bitfld.long 0x04 18. " SPI_SE_18 ,Set Enable Bit 18" "Disabled,Enabled" bitfld.long 0x04 17. " SPI_SE_17 ,Set Enable Bit 17" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " SPI_SE_16 ,Set Enable Bit 16" "Disabled,Enabled" bitfld.long 0x04 15. " SPI_SE_15 ,Set Enable Bit 15" "Disabled,Enabled" bitfld.long 0x04 14. " SPI_SE_14 ,Set Enable Bit 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " SPI_SE_13 ,Set Enable Bit 13" "Disabled,Enabled" bitfld.long 0x04 12. " SPI_SE_12 ,Set Enable Bit 12" "Disabled,Enabled" bitfld.long 0x04 11. " SPI_SE_11 ,Set Enable Bit 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " SPI_SE_10 ,Set Enable Bit 10" "Disabled,Enabled" bitfld.long 0x04 9. " SPI_SE_9 ,Set Enable Bit 9" "Disabled,Enabled" bitfld.long 0x04 8. " SPI_SE_8 ,Set Enable Bit 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " SPI_SE_7 ,Set Enable Bit 7" "Disabled,Enabled" bitfld.long 0x04 6. " SPI_SE_6 ,Set Enable Bit 6" "Disabled,Enabled" bitfld.long 0x04 5. " SPI_SE_5 ,Set Enable Bit 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " SPI_SE_4 ,Set Enable Bit 4" "Disabled,Enabled" bitfld.long 0x04 3. " SPI_SE_3 ,Set Enable Bit 3" "Disabled,Enabled" bitfld.long 0x04 2. " SPI_SE_2 ,Set Enable Bit 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SPI_SE_1 ,Set Enable Bit 1" "Disabled,Enabled" bitfld.long 0x04 0. " SPI_SE_0 ,Set Enable Bit 0" "Disabled,Enabled" line.long 0x08 "ICDISER2,Interrupt set-enable register SPI[63:32]" bitfld.long 0x08 31. " SPI_SE_63 ,Set Enable Bit 63" "Disabled,Enabled" bitfld.long 0x08 30. " SPI_SE_62 ,Set Enable Bit 62" "Disabled,Enabled" bitfld.long 0x08 29. " SPI_SE_61 ,Set Enable Bit 61" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " SPI_SE_60 ,Set Enable Bit 60" "Disabled,Enabled" bitfld.long 0x08 27. " SPI_SE_59 ,Set Enable Bit 59" "Disabled,Enabled" bitfld.long 0x08 26. " SPI_SE_58 ,Set Enable Bit 58" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SPI_SE_57 ,Set Enable Bit 57" "Disabled,Enabled" bitfld.long 0x08 24. " SPI_SE_56 ,Set Enable Bit 56" "Disabled,Enabled" bitfld.long 0x08 23. " SPI_SE_55 ,Set Enable Bit 55" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " SPI_SE_54 ,Set Enable Bit 54" "Disabled,Enabled" bitfld.long 0x08 21. " SPI_SE_53 ,Set Enable Bit 53" "Disabled,Enabled" bitfld.long 0x08 20. " SPI_SE_52 ,Set Enable Bit 52" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " SPI_SE_51 ,Set Enable Bit 51" "Disabled,Enabled" bitfld.long 0x08 18. " SPI_SE_50 ,Set Enable Bit 50" "Disabled,Enabled" bitfld.long 0x08 17. " SPI_SE_49 ,Set Enable Bit 49" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " SPI_SE_48 ,Set Enable Bit 48" "Disabled,Enabled" bitfld.long 0x08 15. " SPI_SE_47 ,Set Enable Bit 47" "Disabled,Enabled" bitfld.long 0x08 14. " SPI_SE_46 ,Set Enable Bit 46" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " SPI_SE_45 ,Set Enable Bit 45" "Disabled,Enabled" bitfld.long 0x08 12. " SPI_SE_44 ,Set Enable Bit 44" "Disabled,Enabled" bitfld.long 0x08 11. " SPI_SE_43 ,Set Enable Bit 43" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " SPI_SE_42 ,Set Enable Bit 42" "Disabled,Enabled" bitfld.long 0x08 9. " SPI_SE_41 ,Set Enable Bit 41" "Disabled,Enabled" bitfld.long 0x08 8. " SPI_SE_40 ,Set Enable Bit 40" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SPI_SE_39 ,Set Enable Bit 39" "Disabled,Enabled" bitfld.long 0x08 6. " SPI_SE_38 ,Set Enable Bit 38" "Disabled,Enabled" bitfld.long 0x08 5. " SPI_SE_37 ,Set Enable Bit 37" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " SPI_SE_36 ,Set Enable Bit 36" "Disabled,Enabled" bitfld.long 0x08 3. " SPI_SE_35 ,Set Enable Bit 35" "Disabled,Enabled" bitfld.long 0x08 2. " SPI_SE_34 ,Set Enable Bit 34" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SPI_SE_33 ,Set Enable Bit 33" "Disabled,Enabled" bitfld.long 0x08 0. " SPI_SE_32 ,Set Enable Bit 32" "Disabled,Enabled" line.long 0x0C "ICDISER3,Interrupt set-enable register SPI[95:64]" bitfld.long 0x0C 31. " SPI_SE_95 ,Set Enable Bit 95" "Disabled,Enabled" bitfld.long 0x0C 30. " SPI_SE_94 ,Set Enable Bit 94" "Disabled,Enabled" bitfld.long 0x0C 29. " SPI_SE_93 ,Set Enable Bit 93" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " SPI_SE_92 ,Set Enable Bit 92" "Disabled,Enabled" bitfld.long 0x0C 27. " SPI_SE_91 ,Set Enable Bit 91" "Disabled,Enabled" bitfld.long 0x0C 26. " SPI_SE_90 ,Set Enable Bit 90" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " SPI_SE_89 ,Set Enable Bit 89" "Disabled,Enabled" bitfld.long 0x0C 24. " SPI_SE_88 ,Set Enable Bit 88" "Disabled,Enabled" bitfld.long 0x0C 23. " SPI_SE_87 ,Set Enable Bit 87" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " SPI_SE_86 ,Set Enable Bit 86" "Disabled,Enabled" bitfld.long 0x0C 21. " SPI_SE_85 ,Set Enable Bit 85" "Disabled,Enabled" bitfld.long 0x0C 20. " SPI_SE_84 ,Set Enable Bit 84" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " SPI_SE_83 ,Set Enable Bit 83" "Disabled,Enabled" bitfld.long 0x0C 18. " SPI_SE_82 ,Set Enable Bit 82" "Disabled,Enabled" bitfld.long 0x0C 17. " SPI_SE_81 ,Set Enable Bit 81" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " SPI_SE_80 ,Set Enable Bit 80" "Disabled,Enabled" bitfld.long 0x0C 15. " SPI_SE_79 ,Set Enable Bit 79" "Disabled,Enabled" bitfld.long 0x0C 14. " SPI_SE_78 ,Set Enable Bit 78" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " SPI_SE_77 ,Set Enable Bit 77" "Disabled,Enabled" bitfld.long 0x0C 12. " SPI_SE_76 ,Set Enable Bit 76" "Disabled,Enabled" bitfld.long 0x0C 11. " SPI_SE_75 ,Set Enable Bit 75" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " SPI_SE_74 ,Set Enable Bit 74" "Disabled,Enabled" bitfld.long 0x0C 9. " SPI_SE_73 ,Set Enable Bit 73" "Disabled,Enabled" bitfld.long 0x0C 8. " SPI_SE_72 ,Set Enable Bit 72" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " SPI_SE_71 ,Set Enable Bit 71" "Disabled,Enabled" bitfld.long 0x0C 6. " SPI_SE_70 ,Set Enable Bit 70" "Disabled,Enabled" bitfld.long 0x0C 5. " SPI_SE_69 ,Set Enable Bit 69" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " SPI_SE_68 ,Set Enable Bit 68" "Disabled,Enabled" bitfld.long 0x0C 3. " SPI_SE_67 ,Set Enable Bit 67" "Disabled,Enabled" bitfld.long 0x0C 2. " SPI_SE_66 ,Set Enable Bit 66" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " SPI_SE_65 ,Set Enable Bit 65" "Disabled,Enabled" bitfld.long 0x0C 0. " SPI_SE_64 ,Set Enable Bit 64" "Disabled,Enabled" line.long 0x10 "ICDISER4,Interrupt set-enable register SPI[127:96]" bitfld.long 0x10 31. " SPI_SE_127 ,Set Enable Bit 127" "Disabled,Enabled" bitfld.long 0x10 30. " SPI_SE_126 ,Set Enable Bit 126" "Disabled,Enabled" bitfld.long 0x10 29. " SPI_SE_125 ,Set Enable Bit 125" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " SPI_SE_124 ,Set Enable Bit 124" "Disabled,Enabled" bitfld.long 0x10 27. " SPI_SE_123 ,Set Enable Bit 123" "Disabled,Enabled" bitfld.long 0x10 26. " SPI_SE_122 ,Set Enable Bit 122" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " SPI_SE_121 ,Set Enable Bit 121" "Disabled,Enabled" bitfld.long 0x10 24. " SPI_SE_120 ,Set Enable Bit 120" "Disabled,Enabled" bitfld.long 0x10 23. " SPI_SE_119 ,Set Enable Bit 119" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " SPI_SE_118 ,Set Enable Bit 118" "Disabled,Enabled" bitfld.long 0x10 21. " SPI_SE_117 ,Set Enable Bit 117" "Disabled,Enabled" bitfld.long 0x10 20. " SPI_SE_116 ,Set Enable Bit 116" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SPI_SE_115 ,Set Enable Bit 115" "Disabled,Enabled" bitfld.long 0x10 18. " SPI_SE_114 ,Set Enable Bit 114" "Disabled,Enabled" bitfld.long 0x10 17. " SPI_SE_113 ,Set Enable Bit 113" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " SPI_SE_112 ,Set Enable Bit 112" "Disabled,Enabled" bitfld.long 0x10 15. " SPI_SE_111 ,Set Enable Bit 111" "Disabled,Enabled" bitfld.long 0x10 14. " SPI_SE_110 ,Set Enable Bit 110" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " SPI_SE_109 ,Set Enable Bit 109" "Disabled,Enabled" bitfld.long 0x10 12. " SPI_SE_108 ,Set Enable Bit 108" "Disabled,Enabled" bitfld.long 0x10 11. " SPI_SE_107 ,Set Enable Bit 107" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " SPI_SE_106 ,Set Enable Bit 106" "Disabled,Enabled" bitfld.long 0x10 9. " SPI_SE_105 ,Set Enable Bit 105" "Disabled,Enabled" bitfld.long 0x10 8. " SPI_SE_104 ,Set Enable Bit 104" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " SPI_SE_103 ,Set Enable Bit 103" "Disabled,Enabled" bitfld.long 0x10 6. " SPI_SE_102 ,Set Enable Bit 102" "Disabled,Enabled" bitfld.long 0x10 5. " SPI_SE_101 ,Set Enable Bit 101" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " SPI_SE_100 ,Set Enable Bit 100" "Disabled,Enabled" bitfld.long 0x10 3. " SPI_SE_99 ,Set Enable Bit 99" "Disabled,Enabled" bitfld.long 0x10 2. " SPI_SE_98 ,Set Enable Bit 98" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SPI_SE_97 ,Set Enable Bit 97" "Disabled,Enabled" bitfld.long 0x10 0. " SPI_SE_96 ,Set Enable Bit 96" "Disabled,Enabled" tree.end tree "Interrupt Clear-Enable" group.long 0x180++0x13 line.long 0x00 "ICDICER0,Interrupt clear-enable register (SGI,PPI)" bitfld.long 0x00 20. " PPI_CE_4 ,Clear-enable for PPI(4)" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPI_CE_3 ,Clear-enable for PPI(3)" "Disabled,Enabled" bitfld.long 0x00 18. " PPI_CE_2 ,Clear-enable for PPI(2)" "Disabled,Enabled" bitfld.long 0x00 17. " PPI_CE_1 ,Clear-enable for PPI(1)" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPI_CE_0 ,Clear-enable for PPI(0)" "Disabled,Enabled" rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled" rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled" textline " " rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled" rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled" rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled" rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled" rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled" rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled" rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled" rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled" rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled" textline " " rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled" rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled" line.long 0x04 "ICDICER1,Interrupt clear-enable register SPI[31:0]" bitfld.long 0x04 31. " SPI_CE_31 ,Clear Enable Bit 31" "Disabled,Enabled" bitfld.long 0x04 30. " SPI_CE_30 ,Clear Enable Bit 30" "Disabled,Enabled" bitfld.long 0x04 29. " SPI_CE_29 ,Clear Enable Bit 29" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " SPI_CE_28 ,Clear Enable Bit 28" "Disabled,Enabled" bitfld.long 0x04 27. " SPI_CE_27 ,Clear Enable Bit 27" "Disabled,Enabled" bitfld.long 0x04 26. " SPI_CE_26 ,Clear Enable Bit 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SPI_CE_25 ,Clear Enable Bit 25" "Disabled,Enabled" bitfld.long 0x04 24. " SPI_CE_24 ,Clear Enable Bit 24" "Disabled,Enabled" bitfld.long 0x04 23. " SPI_CE_23 ,Clear Enable Bit 23" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " SPI_CE_22 ,Clear Enable Bit 22" "Disabled,Enabled" bitfld.long 0x04 21. " SPI_CE_21 ,Clear Enable Bit 21" "Disabled,Enabled" bitfld.long 0x04 20. " SPI_CE_20 ,Clear Enable Bit 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " SPI_CE_19 ,Clear Enable Bit 19" "Disabled,Enabled" bitfld.long 0x04 18. " SPI_CE_18 ,Clear Enable Bit 18" "Disabled,Enabled" bitfld.long 0x04 17. " SPI_CE_17 ,Clear Enable Bit 17" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " SPI_CE_16 ,Clear Enable Bit 16" "Disabled,Enabled" bitfld.long 0x04 15. " SPI_CE_15 ,Clear Enable Bit 15" "Disabled,Enabled" bitfld.long 0x04 14. " SPI_CE_14 ,Clear Enable Bit 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " SPI_CE_13 ,Clear Enable Bit 13" "Disabled,Enabled" bitfld.long 0x04 12. " SPI_CE_12 ,Clear Enable Bit 12" "Disabled,Enabled" bitfld.long 0x04 11. " SPI_CE_11 ,Clear Enable Bit 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " SPI_CE_10 ,Clear Enable Bit 10" "Disabled,Enabled" bitfld.long 0x04 9. " SPI_CE_9 ,Clear Enable Bit 9" "Disabled,Enabled" bitfld.long 0x04 8. " SPI_CE_8 ,Clear Enable Bit 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " SPI_CE_7 ,Clear Enable Bit 7" "Disabled,Enabled" bitfld.long 0x04 6. " SPI_CE_6 ,Clear Enable Bit 6" "Disabled,Enabled" bitfld.long 0x04 5. " SPI_CE_5 ,Clear Enable Bit 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " SPI_CE_4 ,Clear Enable Bit 4" "Disabled,Enabled" bitfld.long 0x04 3. " SPI_CE_3 ,Clear Enable Bit 3" "Disabled,Enabled" bitfld.long 0x04 2. " SPI_CE_2 ,Clear Enable Bit 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SPI_CE_1 ,Clear Enable Bit 1" "Disabled,Enabled" bitfld.long 0x04 0. " SPI_CE_0 ,Clear Enable Bit 0" "Disabled,Enabled" line.long 0x08 "ICDICER2,Interrupt clear-enable register SPI[63:32]" bitfld.long 0x08 31. " SPI_CE_63 ,Clear Enable Bit 63" "Disabled,Enabled" bitfld.long 0x08 30. " SPI_CE_62 ,Clear Enable Bit 62" "Disabled,Enabled" bitfld.long 0x08 29. " SPI_CE_61 ,Clear Enable Bit 61" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " SPI_CE_60 ,Clear Enable Bit 60" "Disabled,Enabled" bitfld.long 0x08 27. " SPI_CE_59 ,Clear Enable Bit 59" "Disabled,Enabled" bitfld.long 0x08 26. " SPI_CE_58 ,Clear Enable Bit 58" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SPI_CE_57 ,Clear Enable Bit 57" "Disabled,Enabled" bitfld.long 0x08 24. " SPI_CE_56 ,Clear Enable Bit 56" "Disabled,Enabled" bitfld.long 0x08 23. " SPI_CE_55 ,Clear Enable Bit 55" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " SPI_CE_54 ,Clear Enable Bit 54" "Disabled,Enabled" bitfld.long 0x08 21. " SPI_CE_53 ,Clear Enable Bit 53" "Disabled,Enabled" bitfld.long 0x08 20. " SPI_CE_52 ,Clear Enable Bit 52" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " SPI_CE_51 ,Clear Enable Bit 51" "Disabled,Enabled" bitfld.long 0x08 18. " SPI_CE_50 ,Clear Enable Bit 50" "Disabled,Enabled" bitfld.long 0x08 17. " SPI_CE_49 ,Clear Enable Bit 49" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " SPI_CE_48 ,Clear Enable Bit 48" "Disabled,Enabled" bitfld.long 0x08 15. " SPI_CE_47 ,Clear Enable Bit 47" "Disabled,Enabled" bitfld.long 0x08 14. " SPI_CE_46 ,Clear Enable Bit 46" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " SPI_CE_45 ,Clear Enable Bit 45" "Disabled,Enabled" bitfld.long 0x08 12. " SPI_CE_44 ,Clear Enable Bit 44" "Disabled,Enabled" bitfld.long 0x08 11. " SPI_CE_43 ,Clear Enable Bit 43" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " SPI_CE_42 ,Clear Enable Bit 42" "Disabled,Enabled" bitfld.long 0x08 9. " SPI_CE_41 ,Clear Enable Bit 41" "Disabled,Enabled" bitfld.long 0x08 8. " SPI_CE_40 ,Clear Enable Bit 40" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SPI_CE_39 ,Clear Enable Bit 39" "Disabled,Enabled" bitfld.long 0x08 6. " SPI_CE_38 ,Clear Enable Bit 38" "Disabled,Enabled" bitfld.long 0x08 5. " SPI_CE_37 ,Clear Enable Bit 37" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " SPI_CE_36 ,Clear Enable Bit 36" "Disabled,Enabled" bitfld.long 0x08 3. " SPI_CE_35 ,Clear Enable Bit 35" "Disabled,Enabled" bitfld.long 0x08 2. " SPI_CE_34 ,Clear Enable Bit 34" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SPI_CE_33 ,Clear Enable Bit 33" "Disabled,Enabled" bitfld.long 0x08 0. " SPI_CE_32 ,Clear Enable Bit 32" "Disabled,Enabled" line.long 0x0C "ICDICER3,Interrupt clear-enable register SPI[95:64]" bitfld.long 0x0C 31. " SPI_CE_95 ,Clear Enable Bit 95" "Disabled,Enabled" bitfld.long 0x0C 30. " SPI_CE_94 ,Clear Enable Bit 94" "Disabled,Enabled" bitfld.long 0x0C 29. " SPI_CE_93 ,Clear Enable Bit 93" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " SPI_CE_92 ,Clear Enable Bit 92" "Disabled,Enabled" bitfld.long 0x0C 27. " SPI_CE_91 ,Clear Enable Bit 91" "Disabled,Enabled" bitfld.long 0x0C 26. " SPI_CE_90 ,Clear Enable Bit 90" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " SPI_CE_89 ,Clear Enable Bit 89" "Disabled,Enabled" bitfld.long 0x0C 24. " SPI_CE_88 ,Clear Enable Bit 88" "Disabled,Enabled" bitfld.long 0x0C 23. " SPI_CE_87 ,Clear Enable Bit 87" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " SPI_CE_86 ,Clear Enable Bit 86" "Disabled,Enabled" bitfld.long 0x0C 21. " SPI_CE_85 ,Clear Enable Bit 85" "Disabled,Enabled" bitfld.long 0x0C 20. " SPI_CE_84 ,Clear Enable Bit 84" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " SPI_CE_83 ,Clear Enable Bit 83" "Disabled,Enabled" bitfld.long 0x0C 18. " SPI_CE_82 ,Clear Enable Bit 82" "Disabled,Enabled" bitfld.long 0x0C 17. " SPI_CE_81 ,Clear Enable Bit 81" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " SPI_CE_80 ,Clear Enable Bit 80" "Disabled,Enabled" bitfld.long 0x0C 15. " SPI_CE_79 ,Clear Enable Bit 79" "Disabled,Enabled" bitfld.long 0x0C 14. " SPI_CE_78 ,Clear Enable Bit 78" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " SPI_CE_77 ,Clear Enable Bit 77" "Disabled,Enabled" bitfld.long 0x0C 12. " SPI_CE_76 ,Clear Enable Bit 76" "Disabled,Enabled" bitfld.long 0x0C 11. " SPI_CE_75 ,Clear Enable Bit 75" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " SPI_CE_74 ,Clear Enable Bit 74" "Disabled,Enabled" bitfld.long 0x0C 9. " SPI_CE_73 ,Clear Enable Bit 73" "Disabled,Enabled" bitfld.long 0x0C 8. " SPI_CE_72 ,Clear Enable Bit 72" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " SPI_CE_71 ,Clear Enable Bit 71" "Disabled,Enabled" bitfld.long 0x0C 6. " SPI_CE_70 ,Clear Enable Bit 70" "Disabled,Enabled" bitfld.long 0x0C 5. " SPI_CE_69 ,Clear Enable Bit 69" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " SPI_CE_68 ,Clear Enable Bit 68" "Disabled,Enabled" bitfld.long 0x0C 3. " SPI_CE_67 ,Clear Enable Bit 67" "Disabled,Enabled" bitfld.long 0x0C 2. " SPI_CE_66 ,Clear Enable Bit 66" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " SPI_CE_65 ,Clear Enable Bit 65" "Disabled,Enabled" bitfld.long 0x0C 0. " SPI_CE_64 ,Clear Enable Bit 64" "Disabled,Enabled" line.long 0x10 "ICDICER4,Interrupt clear-enable register SPI[127:96]" bitfld.long 0x10 31. " SPI_CE_127 ,Clear Enable Bit 127" "Disabled,Enabled" bitfld.long 0x10 30. " SPI_CE_126 ,Clear Enable Bit 126" "Disabled,Enabled" bitfld.long 0x10 29. " SPI_CE_125 ,Clear Enable Bit 125" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " SPI_CE_124 ,Clear Enable Bit 124" "Disabled,Enabled" bitfld.long 0x10 27. " SPI_CE_123 ,Clear Enable Bit 123" "Disabled,Enabled" bitfld.long 0x10 26. " SPI_CE_122 ,Clear Enable Bit 122" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " SPI_CE_121 ,Clear Enable Bit 121" "Disabled,Enabled" bitfld.long 0x10 24. " SPI_CE_120 ,Clear Enable Bit 120" "Disabled,Enabled" bitfld.long 0x10 23. " SPI_CE_119 ,Clear Enable Bit 119" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " SPI_CE_118 ,Clear Enable Bit 118" "Disabled,Enabled" bitfld.long 0x10 21. " SPI_CE_117 ,Clear Enable Bit 117" "Disabled,Enabled" bitfld.long 0x10 20. " SPI_CE_116 ,Clear Enable Bit 116" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SPI_CE_115 ,Clear Enable Bit 115" "Disabled,Enabled" bitfld.long 0x10 18. " SPI_CE_114 ,Clear Enable Bit 114" "Disabled,Enabled" bitfld.long 0x10 17. " SPI_CE_113 ,Clear Enable Bit 113" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " SPI_CE_112 ,Clear Enable Bit 112" "Disabled,Enabled" bitfld.long 0x10 15. " SPI_CE_111 ,Clear Enable Bit 111" "Disabled,Enabled" bitfld.long 0x10 14. " SPI_CE_110 ,Clear Enable Bit 110" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " SPI_CE_109 ,Clear Enable Bit 109" "Disabled,Enabled" bitfld.long 0x10 12. " SPI_CE_108 ,Clear Enable Bit 108" "Disabled,Enabled" bitfld.long 0x10 11. " SPI_CE_107 ,Clear Enable Bit 107" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " SPI_CE_106 ,Clear Enable Bit 106" "Disabled,Enabled" bitfld.long 0x10 9. " SPI_CE_105 ,Clear Enable Bit 105" "Disabled,Enabled" bitfld.long 0x10 8. " SPI_CE_104 ,Clear Enable Bit 104" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " SPI_CE_103 ,Clear Enable Bit 103" "Disabled,Enabled" bitfld.long 0x10 6. " SPI_CE_102 ,Clear Enable Bit 102" "Disabled,Enabled" bitfld.long 0x10 5. " SPI_CE_101 ,Clear Enable Bit 101" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " SPI_CE_100 ,Clear Enable Bit 100" "Disabled,Enabled" bitfld.long 0x10 3. " SPI_CE_99 ,Clear Enable Bit 99" "Disabled,Enabled" bitfld.long 0x10 2. " SPI_CE_98 ,Clear Enable Bit 98" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SPI_CE_97 ,Clear Enable Bit 97" "Disabled,Enabled" bitfld.long 0x10 0. " SPI_CE_96 ,Clear Enable Bit 96" "Disabled,Enabled" tree.end tree "Interrupt Pending-Set" group.long 0x200++0x013 line.long 0x00 "ICDISPR0,Interrupt pending-set register (SGI,PPI)" bitfld.long 0x00 20. " PPI_SP_4 ,Set-pending for PPI(4)" "Not pending,Pending" textline " " bitfld.long 0x00 19. " PPI_SP_3 ,Set-pending for PPI(3)" "Not pending,Pending" bitfld.long 0x00 18. " PPI_SP_2 ,Set-pending for PPI(2)" "Not pending,Pending" bitfld.long 0x00 17. " PPI_SP_1 ,Set-pending for PPI(1)" "Not pending,Pending" textline " " bitfld.long 0x00 16. " PPI_SP_0 ,Set-pending for PPI(0)" "Not pending,Pending" rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending" rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending" textline " " rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending" rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending" rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending" textline " " rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending" rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending" rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending" textline " " rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending" rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending" rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending" textline " " rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending" rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending" rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending" textline " " rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending" rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending" line.long 0x04 "ICDISPR1,Interrupt set-pending register SPI[31:0]" bitfld.long 0x04 31. " SPI_SP_31 ,Set Pending Bit 31" "Not pending,Pending" bitfld.long 0x04 30. " SPI_SP_30 ,Set Pending Bit 30" "Not pending,Pending" bitfld.long 0x04 29. " SPI_SP_29 ,Set Pending Bit 29" "Not pending,Pending" textline " " bitfld.long 0x04 28. " SPI_SP_28 ,Set Pending Bit 28" "Not pending,Pending" bitfld.long 0x04 27. " SPI_SP_27 ,Set Pending Bit 27" "Not pending,Pending" bitfld.long 0x04 26. " SPI_SP_26 ,Set Pending Bit 26" "Not pending,Pending" textline " " bitfld.long 0x04 25. " SPI_SP_25 ,Set Pending Bit 25" "Not pending,Pending" bitfld.long 0x04 24. " SPI_SP_24 ,Set Pending Bit 24" "Not pending,Pending" bitfld.long 0x04 23. " SPI_SP_23 ,Set Pending Bit 23" "Not pending,Pending" textline " " bitfld.long 0x04 22. " SPI_SP_22 ,Set Pending Bit 22" "Not pending,Pending" bitfld.long 0x04 21. " SPI_SP_21 ,Set Pending Bit 21" "Not pending,Pending" bitfld.long 0x04 20. " SPI_SP_20 ,Set Pending Bit 20" "Not pending,Pending" textline " " bitfld.long 0x04 19. " SPI_SP_19 ,Set Pending Bit 19" "Not pending,Pending" bitfld.long 0x04 18. " SPI_SP_18 ,Set Pending Bit 18" "Not pending,Pending" bitfld.long 0x04 17. " SPI_SP_17 ,Set Pending Bit 17" "Not pending,Pending" textline " " bitfld.long 0x04 16. " SPI_SP_16 ,Set Pending Bit 16" "Not pending,Pending" bitfld.long 0x04 15. " SPI_SP_15 ,Set Pending Bit 15" "Not pending,Pending" bitfld.long 0x04 14. " SPI_SP_14 ,Set Pending Bit 14" "Not pending,Pending" textline " " bitfld.long 0x04 13. " SPI_SP_13 ,Set Pending Bit 13" "Not pending,Pending" bitfld.long 0x04 12. " SPI_SP_12 ,Set Pending Bit 12" "Not pending,Pending" bitfld.long 0x04 11. " SPI_SP_11 ,Set Pending Bit 11" "Not pending,Pending" textline " " bitfld.long 0x04 10. " SPI_SP_10 ,Set Pending Bit 10" "Not pending,Pending" bitfld.long 0x04 9. " SPI_SP_9 ,Set Pending Bit 9" "Not pending,Pending" bitfld.long 0x04 8. " SPI_SP_8 ,Set Pending Bit 8" "Not pending,Pending" textline " " bitfld.long 0x04 7. " SPI_SP_7 ,Set Pending Bit 7" "Not pending,Pending" bitfld.long 0x04 6. " SPI_SP_6 ,Set Pending Bit 6" "Not pending,Pending" bitfld.long 0x04 5. " SPI_SP_5 ,Set Pending Bit 5" "Not pending,Pending" textline " " bitfld.long 0x04 4. " SPI_SP_4 ,Set Pending Bit 4" "Not pending,Pending" bitfld.long 0x04 3. " SPI_SP_3 ,Set Pending Bit 3" "Not pending,Pending" bitfld.long 0x04 2. " SPI_SP_2 ,Set Pending Bit 2" "Not pending,Pending" textline " " bitfld.long 0x04 1. " SPI_SP_1 ,Set Pending Bit 1" "Not pending,Pending" bitfld.long 0x04 0. " SPI_SP_0 ,Set Pending Bit 0" "Not pending,Pending" line.long 0x08 "ICDISPR2,Interrupt set-pending register SPI[63:32]" bitfld.long 0x08 31. " SPI_SP_63 ,Set Pending Bit 63" "Not pending,Pending" bitfld.long 0x08 30. " SPI_SP_62 ,Set Pending Bit 62" "Not pending,Pending" bitfld.long 0x08 29. " SPI_SP_61 ,Set Pending Bit 61" "Not pending,Pending" textline " " bitfld.long 0x08 28. " SPI_SP_60 ,Set Pending Bit 60" "Not pending,Pending" bitfld.long 0x08 27. " SPI_SP_59 ,Set Pending Bit 59" "Not pending,Pending" bitfld.long 0x08 26. " SPI_SP_58 ,Set Pending Bit 58" "Not pending,Pending" textline " " bitfld.long 0x08 25. " SPI_SP_57 ,Set Pending Bit 57" "Not pending,Pending" bitfld.long 0x08 24. " SPI_SP_56 ,Set Pending Bit 56" "Not pending,Pending" bitfld.long 0x08 23. " SPI_SP_55 ,Set Pending Bit 55" "Not pending,Pending" textline " " bitfld.long 0x08 22. " SPI_SP_54 ,Set Pending Bit 54" "Not pending,Pending" bitfld.long 0x08 21. " SPI_SP_53 ,Set Pending Bit 53" "Not pending,Pending" bitfld.long 0x08 20. " SPI_SP_52 ,Set Pending Bit 52" "Not pending,Pending" textline " " bitfld.long 0x08 19. " SPI_SP_51 ,Set Pending Bit 51" "Not pending,Pending" bitfld.long 0x08 18. " SPI_SP_50 ,Set Pending Bit 50" "Not pending,Pending" bitfld.long 0x08 17. " SPI_SP_49 ,Set Pending Bit 49" "Not pending,Pending" textline " " bitfld.long 0x08 16. " SPI_SP_48 ,Set Pending Bit 48" "Not pending,Pending" bitfld.long 0x08 15. " SPI_SP_47 ,Set Pending Bit 47" "Not pending,Pending" bitfld.long 0x08 14. " SPI_SP_46 ,Set Pending Bit 46" "Not pending,Pending" textline " " bitfld.long 0x08 13. " SPI_SP_45 ,Set Pending Bit 45" "Not pending,Pending" bitfld.long 0x08 12. " SPI_SP_44 ,Set Pending Bit 44" "Not pending,Pending" bitfld.long 0x08 11. " SPI_SP_43 ,Set Pending Bit 43" "Not pending,Pending" textline " " bitfld.long 0x08 10. " SPI_SP_42 ,Set Pending Bit 42" "Not pending,Pending" bitfld.long 0x08 9. " SPI_SP_41 ,Set Pending Bit 41" "Not pending,Pending" bitfld.long 0x08 8. " SPI_SP_40 ,Set Pending Bit 40" "Not pending,Pending" textline " " bitfld.long 0x08 7. " SPI_SP_39 ,Set Pending Bit 39" "Not pending,Pending" bitfld.long 0x08 6. " SPI_SP_38 ,Set Pending Bit 38" "Not pending,Pending" bitfld.long 0x08 5. " SPI_SP_37 ,Set Pending Bit 37" "Not pending,Pending" textline " " bitfld.long 0x08 4. " SPI_SP_36 ,Set Pending Bit 36" "Not pending,Pending" bitfld.long 0x08 3. " SPI_SP_35 ,Set Pending Bit 35" "Not pending,Pending" bitfld.long 0x08 2. " SPI_SP_34 ,Set Pending Bit 34" "Not pending,Pending" textline " " bitfld.long 0x08 1. " SPI_SP_33 ,Set Pending Bit 33" "Not pending,Pending" bitfld.long 0x08 0. " SPI_SP_32 ,Set Pending Bit 32" "Not pending,Pending" line.long 0x0C "ICDISPR3,Interrupt set-pending register[95:64]" bitfld.long 0x0C 31. " SPI_SP_95 ,Set Pending Bit 95" "Not pending,Pending" bitfld.long 0x0C 30. " SPI_SP_94 ,Set Pending Bit 94" "Not pending,Pending" bitfld.long 0x0C 29. " SPI_SP_93 ,Set Pending Bit 93" "Not pending,Pending" textline " " bitfld.long 0x0C 28. " SPI_SP_92 ,Set Pending Bit 92" "Not pending,Pending" bitfld.long 0x0C 27. " SPI_SP_91 ,Set Pending Bit 91" "Not pending,Pending" bitfld.long 0x0C 26. " SPI_SP_90 ,Set Pending Bit 90" "Not pending,Pending" textline " " bitfld.long 0x0C 25. " SPI_SP_89 ,Set Pending Bit 89" "Not pending,Pending" bitfld.long 0x0C 24. " SPI_SP_88 ,Set Pending Bit 88" "Not pending,Pending" bitfld.long 0x0C 23. " SPI_SP_87 ,Set Pending Bit 87" "Not pending,Pending" textline " " bitfld.long 0x0C 22. " SPI_SP_86 ,Set Pending Bit 86" "Not pending,Pending" bitfld.long 0x0C 21. " SPI_SP_85 ,Set Pending Bit 85" "Not pending,Pending" bitfld.long 0x0C 20. " SPI_SP_84 ,Set Pending Bit 84" "Not pending,Pending" textline " " bitfld.long 0x0C 19. " SPI_SP_83 ,Set Pending Bit 83" "Not pending,Pending" bitfld.long 0x0C 18. " SPI_SP_82 ,Set Pending Bit 82" "Not pending,Pending" bitfld.long 0x0C 17. " SPI_SP_81 ,Set Pending Bit 81" "Not pending,Pending" textline " " bitfld.long 0x0C 16. " SPI_SP_80 ,Set Pending Bit 80" "Not pending,Pending" bitfld.long 0x0C 15. " SPI_SP_79 ,Set Pending Bit 79" "Not pending,Pending" bitfld.long 0x0C 14. " SPI_SP_78 ,Set Pending Bit 78" "Not pending,Pending" textline " " bitfld.long 0x0C 13. " SPI_SP_77 ,Set Pending Bit 77" "Not pending,Pending" bitfld.long 0x0C 12. " SPI_SP_76 ,Set Pending Bit 76" "Not pending,Pending" bitfld.long 0x0C 11. " SPI_SP_75 ,Set Pending Bit 75" "Not pending,Pending" textline " " bitfld.long 0x0C 10. " SPI_SP_74 ,Set Pending Bit 74" "Not pending,Pending" bitfld.long 0x0C 9. " SPI_SP_73 ,Set Pending Bit 73" "Not pending,Pending" bitfld.long 0x0C 8. " SPI_SP_72 ,Set Pending Bit 72" "Not pending,Pending" textline " " bitfld.long 0x0C 7. " SPI_SP_71 ,Set Pending Bit 71" "Not pending,Pending" bitfld.long 0x0C 6. " SPI_SP_70 ,Set Pending Bit 70" "Not pending,Pending" bitfld.long 0x0C 5. " SPI_SP_69 ,Set Pending Bit 69" "Not pending,Pending" textline " " bitfld.long 0x0C 4. " SPI_SP_68 ,Set Pending Bit 68" "Not pending,Pending" bitfld.long 0x0C 3. " SPI_SP_67 ,Set Pending Bit 67" "Not pending,Pending" bitfld.long 0x0C 2. " SPI_SP_66 ,Set Pending Bit 66" "Not pending,Pending" textline " " bitfld.long 0x0C 1. " SPI_SP_65 ,Set Pending Bit 65" "Not pending,Pending" bitfld.long 0x0C 0. " SPI_SP_64 ,Set Pending Bit 64" "Not pending,Pending" line.long 0x10 "ICDISPR4,Interrupt set-pending register SPI[127:96]" bitfld.long 0x10 31. " SPI_SP_127 ,Set Pending Bit 127" "Not pending,Pending" bitfld.long 0x10 30. " SPI_SP_126 ,Set Pending Bit 126" "Not pending,Pending" bitfld.long 0x10 29. " SPI_SP_125 ,Set Pending Bit 125" "Not pending,Pending" textline " " bitfld.long 0x10 28. " SPI_SP_124 ,Set Pending Bit 124" "Not pending,Pending" bitfld.long 0x10 27. " SPI_SP_123 ,Set Pending Bit 123" "Not pending,Pending" bitfld.long 0x10 26. " SPI_SP_122 ,Set Pending Bit 122" "Not pending,Pending" textline " " bitfld.long 0x10 25. " SPI_SP_121 ,Set Pending Bit 121" "Not pending,Pending" bitfld.long 0x10 24. " SPI_SP_120 ,Set Pending Bit 120" "Not pending,Pending" bitfld.long 0x10 23. " SPI_SP_119 ,Set Pending Bit 119" "Not pending,Pending" textline " " bitfld.long 0x10 22. " SPI_SP_118 ,Set Pending Bit 118" "Not pending,Pending" bitfld.long 0x10 21. " SPI_SP_117 ,Set Pending Bit 117" "Not pending,Pending" bitfld.long 0x10 20. " SPI_SP_116 ,Set Pending Bit 116" "Not pending,Pending" textline " " bitfld.long 0x10 19. " SPI_SP_115 ,Set Pending Bit 115" "Not pending,Pending" bitfld.long 0x10 18. " SPI_SP_114 ,Set Pending Bit 114" "Not pending,Pending" bitfld.long 0x10 17. " SPI_SP_113 ,Set Pending Bit 113" "Not pending,Pending" textline " " bitfld.long 0x10 16. " SPI_SP_112 ,Set Pending Bit 112" "Not pending,Pending" bitfld.long 0x10 15. " SPI_SP_111 ,Set Pending Bit 111" "Not pending,Pending" bitfld.long 0x10 14. " SPI_SP_110 ,Set Pending Bit 110" "Not pending,Pending" textline " " bitfld.long 0x10 13. " SPI_SP_109 ,Set Pending Bit 109" "Not pending,Pending" bitfld.long 0x10 12. " SPI_SP_108 ,Set Pending Bit 108" "Not pending,Pending" bitfld.long 0x10 11. " SPI_SP_107 ,Set Pending Bit 107" "Not pending,Pending" textline " " bitfld.long 0x10 10. " SPI_SP_106 ,Set Pending Bit 106" "Not pending,Pending" bitfld.long 0x10 9. " SPI_SP_105 ,Set Pending Bit 105" "Not pending,Pending" bitfld.long 0x10 8. " SPI_SP_104 ,Set Pending Bit 104" "Not pending,Pending" textline " " bitfld.long 0x10 7. " SPI_SP_103 ,Set Pending Bit 103" "Not pending,Pending" bitfld.long 0x10 6. " SPI_SP_102 ,Set Pending Bit 102" "Not pending,Pending" bitfld.long 0x10 5. " SPI_SP_101 ,Set Pending Bit 101" "Not pending,Pending" textline " " bitfld.long 0x10 4. " SPI_SP_100 ,Set Pending Bit 100" "Not pending,Pending" bitfld.long 0x10 3. " SPI_SP_99 ,Set Pending Bit 99" "Not pending,Pending" bitfld.long 0x10 2. " SPI_SP_98 ,Set Pending Bit 98" "Not pending,Pending" textline " " bitfld.long 0x10 1. " SPI_SP_97 ,Set Pending Bit 97" "Not pending,Pending" bitfld.long 0x10 0. " SPI_SP_96 ,Set Pending Bit 96" "Not pending,Pending" tree.end tree "Interrupt Pending-Clear" group.long 0x280++0x13 line.long 0x00 "ICDICPR0,Interrupt pending-clear register (SGI,PPI)" bitfld.long 0x00 20. " PPI_CP4 ,Clear-pending for PPI(4)" "Not pending,Pending" textline " " bitfld.long 0x00 19. " PPI_CP3 ,Clear-pending for PPI(3)" "Not pending,Pending" bitfld.long 0x00 18. " PPI_CP2 ,Clear-pending for PPI(2)" "Not pending,Pending" bitfld.long 0x00 17. " PPI_CP1 ,Clear-pending for PPI(1)" "Not pending,Pending" textline " " bitfld.long 0x00 16. " PPI_CP0 ,Clear-pending for PPI(0)" "Not pending,Pending" rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending" rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending" textline " " rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending" rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending" rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending" textline " " rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending" rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending" rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending" textline " " rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending" rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending" rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending" textline " " rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending" rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending" rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending" textline " " rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending" rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending" line.long 0x04 "ICDICPR1,Interrupt clear-pending register SPI[31:0]" bitfld.long 0x04 31. " SPI_CP31 ,Clear Pending Bit 31" "Not pending,Pending" bitfld.long 0x04 30. " SPI_CP30 ,Clear Pending Bit 30" "Not pending,Pending" bitfld.long 0x04 29. " SPI_CP29 ,Clear Pending Bit 29" "Not pending,Pending" textline " " bitfld.long 0x04 28. " SPI_CP28 ,Clear Pending Bit 28" "Not pending,Pending" bitfld.long 0x04 27. " SPI_CP27 ,Clear Pending Bit 27" "Not pending,Pending" bitfld.long 0x04 26. " SPI_CP26 ,Clear Pending Bit 26" "Not pending,Pending" textline " " bitfld.long 0x04 25. " SPI_CP25 ,Clear Pending Bit 25" "Not pending,Pending" bitfld.long 0x04 24. " SPI_CP24 ,Clear Pending Bit 24" "Not pending,Pending" bitfld.long 0x04 23. " SPI_CP23 ,Clear Pending Bit 23" "Not pending,Pending" textline " " bitfld.long 0x04 22. " SPI_CP22 ,Clear Pending Bit 22" "Not pending,Pending" bitfld.long 0x04 21. " SPI_CP21 ,Clear Pending Bit 21" "Not pending,Pending" bitfld.long 0x04 20. " SPI_CP20 ,Clear Pending Bit 20" "Not pending,Pending" textline " " bitfld.long 0x04 19. " SPI_CP19 ,Clear Pending Bit 19" "Not pending,Pending" bitfld.long 0x04 18. " SPI_CP18 ,Clear Pending Bit 18" "Not pending,Pending" bitfld.long 0x04 17. " SPI_CP17 ,Clear Pending Bit 17" "Not pending,Pending" textline " " bitfld.long 0x04 16. " SPI_CP16 ,Clear Pending Bit 16" "Not pending,Pending" bitfld.long 0x04 15. " SPI_CP15 ,Clear Pending Bit 15" "Not pending,Pending" bitfld.long 0x04 14. " SPI_CP14 ,Clear Pending Bit 14" "Not pending,Pending" textline " " bitfld.long 0x04 13. " SPI_CP13 ,Clear Pending Bit 13" "Not pending,Pending" bitfld.long 0x04 12. " SPI_CP12 ,Clear Pending Bit 12" "Not pending,Pending" bitfld.long 0x04 11. " SPI_CP11 ,Clear Pending Bit 11" "Not pending,Pending" textline " " bitfld.long 0x04 10. " SPI_CP10 ,Clear Pending Bit 10" "Not pending,Pending" bitfld.long 0x04 9. " SPI_CP9 ,Clear Pending Bit 9" "Not pending,Pending" bitfld.long 0x04 8. " SPI_CP8 ,Clear Pending Bit 8" "Not pending,Pending" textline " " bitfld.long 0x04 7. " SPI_CP7 ,Clear Pending Bit 7" "Not pending,Pending" bitfld.long 0x04 6. " SPI_CP6 ,Clear Pending Bit 6" "Not pending,Pending" bitfld.long 0x04 5. " SPI_CP5 ,Clear Pending Bit 5" "Not pending,Pending" textline " " bitfld.long 0x04 4. " SPI_CP4 ,Clear Pending Bit 4" "Not pending,Pending" bitfld.long 0x04 3. " SPI_CP3 ,Clear Pending Bit 3" "Not pending,Pending" bitfld.long 0x04 2. " SPI_CP2 ,Clear Pending Bit 2" "Not pending,Pending" textline " " bitfld.long 0x04 1. " SPI_CP1 ,Clear Pending Bit 1" "Not pending,Pending" bitfld.long 0x04 0. " SPI_CP0 ,Clear Pending Bit 0" "Not pending,Pending" line.long 0x08 "ICDICPR2,Interrupt clear-pending register SPI[63:32]" bitfld.long 0x08 31. " SPI_CP63 ,Clear Pending Bit 63" "Not pending,Pending" bitfld.long 0x08 30. " SPI_CP62 ,Clear Pending Bit 62" "Not pending,Pending" bitfld.long 0x08 29. " SPI_CP61 ,Clear Pending Bit 61" "Not pending,Pending" textline " " bitfld.long 0x08 28. " SPI_CP60 ,Clear Pending Bit 60" "Not pending,Pending" bitfld.long 0x08 27. " SPI_CP59 ,Clear Pending Bit 59" "Not pending,Pending" bitfld.long 0x08 26. " SPI_CP58 ,Clear Pending Bit 58" "Not pending,Pending" textline " " bitfld.long 0x08 25. " SPI_CP57 ,Clear Pending Bit 57" "Not pending,Pending" bitfld.long 0x08 24. " SPI_CP56 ,Clear Pending Bit 56" "Not pending,Pending" bitfld.long 0x08 23. " SPI_CP55 ,Clear Pending Bit 55" "Not pending,Pending" textline " " bitfld.long 0x08 22. " SPI_CP54 ,Clear Pending Bit 54" "Not pending,Pending" bitfld.long 0x08 21. " SPI_CP53 ,Clear Pending Bit 53" "Not pending,Pending" bitfld.long 0x08 20. " SPI_CP52 ,Clear Pending Bit 52" "Not pending,Pending" textline " " bitfld.long 0x08 19. " SPI_CP51 ,Clear Pending Bit 51" "Not pending,Pending" bitfld.long 0x08 18. " SPI_CP50 ,Clear Pending Bit 50" "Not pending,Pending" bitfld.long 0x08 17. " SPI_CP49 ,Clear Pending Bit 49" "Not pending,Pending" textline " " bitfld.long 0x08 16. " SPI_CP48 ,Clear Pending Bit 48" "Not pending,Pending" bitfld.long 0x08 15. " SPI_CP47 ,Clear Pending Bit 47" "Not pending,Pending" bitfld.long 0x08 14. " SPI_CP46 ,Clear Pending Bit 46" "Not pending,Pending" textline " " bitfld.long 0x08 13. " SPI_CP45 ,Clear Pending Bit 45" "Not pending,Pending" bitfld.long 0x08 12. " SPI_CP44 ,Clear Pending Bit 44" "Not pending,Pending" bitfld.long 0x08 11. " SPI_CP43 ,Clear Pending Bit 43" "Not pending,Pending" textline " " bitfld.long 0x08 10. " SPI_CP42 ,Clear Pending Bit 42" "Not pending,Pending" bitfld.long 0x08 9. " SPI_CP41 ,Clear Pending Bit 41" "Not pending,Pending" bitfld.long 0x08 8. " SPI_CP40 ,Clear Pending Bit 40" "Not pending,Pending" textline " " bitfld.long 0x08 7. " SPI_CP39 ,Clear Pending Bit 39" "Not pending,Pending" bitfld.long 0x08 6. " SPI_CP38 ,Clear Pending Bit 38" "Not pending,Pending" bitfld.long 0x08 5. " SPI_CP37 ,Clear Pending Bit 37" "Not pending,Pending" textline " " bitfld.long 0x08 4. " SPI_CP36 ,Clear Pending Bit 36" "Not pending,Pending" bitfld.long 0x08 3. " SPI_CP35 ,Clear Pending Bit 35" "Not pending,Pending" bitfld.long 0x08 2. " SPI_CP34 ,Clear Pending Bit 34" "Not pending,Pending" textline " " bitfld.long 0x08 1. " SPI_CP33 ,Clear Pending Bit 33" "Not pending,Pending" bitfld.long 0x08 0. " SPI_CP32 ,Clear Pending Bit 32" "Not pending,Pending" line.long 0x0C "ICDICPR3,Interrupt clear-pending register[95:64]" bitfld.long 0x0C 31. " SPI_CP95 ,Clear Pending Bit 95" "Not pending,Pending" bitfld.long 0x0C 30. " SPI_CP94 ,Clear Pending Bit 94" "Not pending,Pending" bitfld.long 0x0C 29. " SPI_CP93 ,Clear Pending Bit 93" "Not pending,Pending" textline " " bitfld.long 0x0C 28. " SPI_CP92 ,Clear Pending Bit 92" "Not pending,Pending" bitfld.long 0x0C 27. " SPI_CP91 ,Clear Pending Bit 91" "Not pending,Pending" bitfld.long 0x0C 26. " SPI_CP90 ,Clear Pending Bit 90" "Not pending,Pending" textline " " bitfld.long 0x0C 25. " SPI_CP89 ,Clear Pending Bit 89" "Not pending,Pending" bitfld.long 0x0C 24. " SPI_CP88 ,Clear Pending Bit 88" "Not pending,Pending" bitfld.long 0x0C 23. " SPI_CP87 ,Clear Pending Bit 87" "Not pending,Pending" textline " " bitfld.long 0x0C 22. " SPI_CP86 ,Clear Pending Bit 86" "Not pending,Pending" bitfld.long 0x0C 21. " SPI_CP85 ,Clear Pending Bit 85" "Not pending,Pending" bitfld.long 0x0C 20. " SPI_CP84 ,Clear Pending Bit 84" "Not pending,Pending" textline " " bitfld.long 0x0C 19. " SPI_CP83 ,Clear Pending Bit 83" "Not pending,Pending" bitfld.long 0x0C 18. " SPI_CP82 ,Clear Pending Bit 82" "Not pending,Pending" bitfld.long 0x0C 17. " SPI_CP81 ,Clear Pending Bit 81" "Not pending,Pending" textline " " bitfld.long 0x0C 16. " SPI_CP80 ,Clear Pending Bit 80" "Not pending,Pending" bitfld.long 0x0C 15. " SPI_CP79 ,Clear Pending Bit 79" "Not pending,Pending" bitfld.long 0x0C 14. " SPI_CP78 ,Clear Pending Bit 78" "Not pending,Pending" textline " " bitfld.long 0x0C 13. " SPI_CP77 ,Clear Pending Bit 77" "Not pending,Pending" bitfld.long 0x0C 12. " SPI_CP76 ,Clear Pending Bit 76" "Not pending,Pending" bitfld.long 0x0C 11. " SPI_CP75 ,Clear Pending Bit 75" "Not pending,Pending" textline " " bitfld.long 0x0C 10. " SPI_CP74 ,Clear Pending Bit 74" "Not pending,Pending" bitfld.long 0x0C 9. " SPI_CP73 ,Clear Pending Bit 73" "Not pending,Pending" bitfld.long 0x0C 8. " SPI_CP72 ,Clear Pending Bit 72" "Not pending,Pending" textline " " bitfld.long 0x0C 7. " SPI_CP71 ,Clear Pending Bit 71" "Not pending,Pending" bitfld.long 0x0C 6. " SPI_CP70 ,Clear Pending Bit 70" "Not pending,Pending" bitfld.long 0x0C 5. " SPI_CP69 ,Clear Pending Bit 69" "Not pending,Pending" textline " " bitfld.long 0x0C 4. " SPI_CP68 ,Clear Pending Bit 68" "Not pending,Pending" bitfld.long 0x0C 3. " SPI_CP67 ,Clear Pending Bit 67" "Not pending,Pending" bitfld.long 0x0C 2. " SPI_CP66 ,Clear Pending Bit 66" "Not pending,Pending" textline " " bitfld.long 0x0C 1. " SPI_CP65 ,Clear Pending Bit 65" "Not pending,Pending" bitfld.long 0x0C 0. " SPI_CP64 ,Clear Pending Bit 64" "Not pending,Pending" line.long 0x10 "ICDICPR4,Interrupt clear-pending register SPI[127:96]" bitfld.long 0x10 31. " SPI_CP127 ,Clear Pending Bit 127" "Not pending,Pending" bitfld.long 0x10 30. " SPI_CP126 ,Clear Pending Bit 126" "Not pending,Pending" bitfld.long 0x10 29. " SPI_CP125 ,Clear Pending Bit 125" "Not pending,Pending" textline " " bitfld.long 0x10 28. " SPI_CP124 ,Clear Pending Bit 124" "Not pending,Pending" bitfld.long 0x10 27. " SPI_CP123 ,Clear Pending Bit 123" "Not pending,Pending" bitfld.long 0x10 26. " SPI_CP122 ,Clear Pending Bit 122" "Not pending,Pending" textline " " bitfld.long 0x10 25. " SPI_CP121 ,Clear Pending Bit 121" "Not pending,Pending" bitfld.long 0x10 24. " SPI_CP120 ,Clear Pending Bit 120" "Not pending,Pending" bitfld.long 0x10 23. " SPI_CP119 ,Clear Pending Bit 119" "Not pending,Pending" textline " " bitfld.long 0x10 22. " SPI_CP118 ,Clear Pending Bit 118" "Not pending,Pending" bitfld.long 0x10 21. " SPI_CP117 ,Clear Pending Bit 117" "Not pending,Pending" bitfld.long 0x10 20. " SPI_CP116 ,Clear Pending Bit 116" "Not pending,Pending" textline " " bitfld.long 0x10 19. " SPI_CP115 ,Clear Pending Bit 115" "Not pending,Pending" bitfld.long 0x10 18. " SPI_CP114 ,Clear Pending Bit 114" "Not pending,Pending" bitfld.long 0x10 17. " SPI_CP113 ,Clear Pending Bit 113" "Not pending,Pending" textline " " bitfld.long 0x10 16. " SPI_CP112 ,Clear Pending Bit 112" "Not pending,Pending" bitfld.long 0x10 15. " SPI_CP111 ,Clear Pending Bit 111" "Not pending,Pending" bitfld.long 0x10 14. " SPI_CP110 ,Clear Pending Bit 110" "Not pending,Pending" textline " " bitfld.long 0x10 13. " SPI_CP109 ,Clear Pending Bit 109" "Not pending,Pending" bitfld.long 0x10 12. " SPI_CP108 ,Clear Pending Bit 108" "Not pending,Pending" bitfld.long 0x10 11. " SPI_CP107 ,Clear Pending Bit 107" "Not pending,Pending" textline " " bitfld.long 0x10 10. " SPI_CP106 ,Clear Pending Bit 106" "Not pending,Pending" bitfld.long 0x10 9. " SPI_CP105 ,Clear Pending Bit 105" "Not pending,Pending" bitfld.long 0x10 8. " SPI_CP104 ,Clear Pending Bit 104" "Not pending,Pending" textline " " bitfld.long 0x10 7. " SPI_CP103 ,Clear Pending Bit 103" "Not pending,Pending" bitfld.long 0x10 6. " SPI_CP102 ,Clear Pending Bit 102" "Not pending,Pending" bitfld.long 0x10 5. " SPI_CP101 ,Clear Pending Bit 101" "Not pending,Pending" textline " " bitfld.long 0x10 4. " SPI_CP100 ,Clear Pending Bit 100" "Not pending,Pending" bitfld.long 0x10 3. " SPI_CP99 ,Clear Pending Bit 99" "Not pending,Pending" bitfld.long 0x10 2. " SPI_CP98 ,Clear Pending Bit 98" "Not pending,Pending" textline " " bitfld.long 0x10 1. " SPI_CP97 ,Clear Pending Bit 97" "Not pending,Pending" bitfld.long 0x10 0. " SPI_CP96 ,Clear Pending Bit 96" "Not pending,Pending" tree.end tree "Active Status" rgroup.long 0x300++0x13 line.long 0x00 "ICDABR0,Active bit register (SGI/PPI)" bitfld.long 0x00 20. " PPI_AS_4 ,Active status for PPI(4)" "Inactive,Active" textline " " bitfld.long 0x00 19. " PPI_AS_3 ,Active status for PPI(3)" "Inactive,Active" bitfld.long 0x00 18. " PPI_AS_2 ,Active status for PPI(2)" "Inactive,Active" bitfld.long 0x00 17. " PPI_AS_1 ,Active status for PPI(1)" "Inactive,Active" textline " " bitfld.long 0x00 16. " PPI_AS_0 ,Active status for PPI(0)" "Inactive,Active" bitfld.long 0x00 15. " SGI_AS_15 ,Active status for SGI(15)" "Inactive,Active" bitfld.long 0x00 14. " SGI_AS_14 ,Active status for SGI(14)" "Inactive,Active" textline " " bitfld.long 0x00 13. " SGI_AS_13 ,Active status for SGI(13)" "Inactive,Active" bitfld.long 0x00 12. " SGI_AS_12 ,Active status for SGI(12)" "Inactive,Active" bitfld.long 0x00 11. " SGI_AS_11 ,Active status for SGI(11)" "Inactive,Active" textline " " bitfld.long 0x00 10. " SGI_AS_10 ,Active status for SGI(10)" "Inactive,Active" bitfld.long 0x00 9. " SGI_AS_9 ,Active status for SGI(9)" "Inactive,Active" bitfld.long 0x00 8. " SGI_AS_8 ,Active status for SGI(8)" "Inactive,Active" textline " " bitfld.long 0x00 7. " SGI_AS_7 ,Active status for SGI(7)" "Inactive,Active" bitfld.long 0x00 6. " SGI_AS_6 ,Active status for SGI(6)" "Inactive,Active" bitfld.long 0x00 5. " SGI_AS_5 ,Active status for SGI(5)" "Inactive,Active" textline " " bitfld.long 0x00 4. " SGI_AS_4 ,Active status for SGI(4)" "Inactive,Active" bitfld.long 0x00 3. " SGI_AS_3 ,Active status for SGI(3)" "Inactive,Active" bitfld.long 0x00 2. " SGI_AS_2 ,Active status for SGI(2)" "Inactive,Active" textline " " bitfld.long 0x00 1. " SGI_AS_1 ,Active status for SGI(1)" "Inactive,Active" bitfld.long 0x00 0. " SGI_AS_0 ,Active status for SGI(0)" "Inactive,Active" line.long 0x04 "ICDABR1,Active bit register SPI[31:0]" bitfld.long 0x04 31. " SPI_AS_31 ,Active status for SPI(31)" "Inactive,Active" bitfld.long 0x04 30. " SPI_AS_30 ,Active status for SPI(30)" "Inactive,Active" bitfld.long 0x04 29. " SPI_AS_29 ,Active status for SPI(29)" "Inactive,Active" textline " " bitfld.long 0x04 28. " SPI_AS_28 ,Active status for SPI(28)" "Inactive,Active" bitfld.long 0x04 27. " SPI_AS_27 ,Active status for SPI(27)" "Inactive,Active" bitfld.long 0x04 26. " SPI_AS_26 ,Active status for SPI(26)" "Inactive,Active" textline " " bitfld.long 0x04 25. " SPI_AS_25 ,Active status for SPI(25)" "Inactive,Active" bitfld.long 0x04 24. " SPI_AS_24 ,Active status for SPI(24)" "Inactive,Active" bitfld.long 0x04 23. " SPI_AS_23 ,Active status for SPI(23)" "Inactive,Active" textline " " bitfld.long 0x04 22. " SPI_AS_22 ,Active status for SPI(22)" "Inactive,Active" bitfld.long 0x04 21. " SPI_AS_21 ,Active status for SPI(21)" "Inactive,Active" bitfld.long 0x04 20. " SPI_AS_20 ,Active status for SPI(20)" "Inactive,Active" textline " " bitfld.long 0x04 19. " SPI_AS_19 ,Active status for SPI(19)" "Inactive,Active" bitfld.long 0x04 18. " SPI_AS_18 ,Active status for SPI(18)" "Inactive,Active" bitfld.long 0x04 17. " SPI_AS_17 ,Active status for SPI(17)" "Inactive,Active" textline " " bitfld.long 0x04 16. " SPI_AS_16 ,Active status for SPI(16)" "Inactive,Active" bitfld.long 0x04 15. " SPI_AS_15 ,Active status for SPI(15)" "Inactive,Active" bitfld.long 0x04 14. " SPI_AS_14 ,Active status for SPI(14)" "Inactive,Active" textline " " bitfld.long 0x04 13. " SPI_AS_13 ,Active status for SPI(13)" "Inactive,Active" bitfld.long 0x04 12. " SPI_AS_12 ,Active status for SPI(12)" "Inactive,Active" bitfld.long 0x04 11. " SPI_AS_11 ,Active status for SPI(11)" "Inactive,Active" textline " " bitfld.long 0x04 10. " SPI_AS_10 ,Active status for SPI(10)" "Inactive,Active" bitfld.long 0x04 9. " SPI_AS_9 ,Active status for SPI(9)" "Inactive,Active" bitfld.long 0x04 8. " SPI_AS_8 ,Active status for SPI(8)" "Inactive,Active" textline " " bitfld.long 0x04 7. " SPI_AS_7 ,Active status for SPI(7)" "Inactive,Active" bitfld.long 0x04 6. " SPI_AS_6 ,Active status for SPI(6)" "Inactive,Active" bitfld.long 0x04 5. " SPI_AS_5 ,Active status for SPI(5)" "Inactive,Active" textline " " bitfld.long 0x04 4. " SPI_AS_4 ,Active status for SPI(4)" "Inactive,Active" bitfld.long 0x04 3. " SPI_AS_3 ,Active status for SPI(3)" "Inactive,Active" bitfld.long 0x04 2. " SPI_AS_2 ,Active status for SPI(2)" "Inactive,Active" textline " " bitfld.long 0x04 1. " SPI_AS_1 ,Active status for SPI(1)" "Inactive,Active" bitfld.long 0x04 0. " SPI_AS_0 ,Active status for SPI(0)" "Inactive,Active" line.long 0x08 "ICDABR2,Active bit register SPI[63:32]" bitfld.long 0x08 31. " SPI_AS_63 ,Active status for SPI(63)" "Inactive,Active" bitfld.long 0x08 30. " SPI_AS_62 ,Active status for SPI(62)" "Inactive,Active" bitfld.long 0x08 29. " SPI_AS_61 ,Active status for SPI(61)" "Inactive,Active" textline " " bitfld.long 0x08 28. " SPI_AS_60 ,Active status for SPI(60)" "Inactive,Active" bitfld.long 0x08 27. " SPI_AS_59 ,Active status for SPI(59)" "Inactive,Active" bitfld.long 0x08 26. " SPI_AS_58 ,Active status for SPI(58)" "Inactive,Active" textline " " bitfld.long 0x08 25. " SPI_AS_57 ,Active status for SPI(57)" "Inactive,Active" bitfld.long 0x08 24. " SPI_AS_56 ,Active status for SPI(56)" "Inactive,Active" bitfld.long 0x08 23. " SPI_AS_55 ,Active status for SPI(55)" "Inactive,Active" textline " " bitfld.long 0x08 22. " SPI_AS_54 ,Active status for SPI(54)" "Inactive,Active" bitfld.long 0x08 21. " SPI_AS_53 ,Active status for SPI(53)" "Inactive,Active" bitfld.long 0x08 20. " SPI_AS_52 ,Active status for SPI(52)" "Inactive,Active" textline " " bitfld.long 0x08 19. " SPI_AS_51 ,Active status for SPI(51)" "Inactive,Active" bitfld.long 0x08 18. " SPI_AS_50 ,Active status for SPI(50)" "Inactive,Active" bitfld.long 0x08 17. " SPI_AS_49 ,Active status for SPI(49)" "Inactive,Active" textline " " bitfld.long 0x08 16. " SPI_AS_48 ,Active status for SPI(48)" "Inactive,Active" bitfld.long 0x08 15. " SPI_AS_47 ,Active status for SPI(47)" "Inactive,Active" bitfld.long 0x08 14. " SPI_AS_46 ,Active status for SPI(46)" "Inactive,Active" textline " " bitfld.long 0x08 13. " SPI_AS_45 ,Active status for SPI(45)" "Inactive,Active" bitfld.long 0x08 12. " SPI_AS_44 ,Active status for SPI(44)" "Inactive,Active" bitfld.long 0x08 11. " SPI_AS_43 ,Active status for SPI(43)" "Inactive,Active" textline " " bitfld.long 0x08 10. " SPI_AS_42 ,Active status for SPI(42)" "Inactive,Active" bitfld.long 0x08 9. " SPI_AS_41 ,Active status for SPI(41)" "Inactive,Active" bitfld.long 0x08 8. " SPI_AS_40 ,Active status for SPI(40)" "Inactive,Active" textline " " bitfld.long 0x08 7. " SPI_AS_39 ,Active status for SPI(39)" "Inactive,Active" bitfld.long 0x08 6. " SPI_AS_38 ,Active status for SPI(38)" "Inactive,Active" bitfld.long 0x08 5. " SPI_AS_37 ,Active status for SPI(37)" "Inactive,Active" textline " " bitfld.long 0x08 4. " SPI_AS_36 ,Active status for SPI(36)" "Inactive,Active" bitfld.long 0x08 3. " SPI_AS_35 ,Active status for SPI(35)" "Inactive,Active" bitfld.long 0x08 2. " SPI_AS_34 ,Active status for SPI(34)" "Inactive,Active" textline " " bitfld.long 0x08 1. " SPI_AS_33 ,Active status for SPI(33)" "Inactive,Active" bitfld.long 0x08 0. " SPI_AS_32 ,Active status for SPI(32)" "Inactive,Active" line.long 0x0C "ICDABR3,Active bit register SPI[127:96]" bitfld.long 0x0C 31. " SPI_AS_95 ,Active status for SPI(95)" "Inactive,Active" bitfld.long 0x0C 30. " SPI_AS_94 ,Active status for SPI(94)" "Inactive,Active" bitfld.long 0x0C 29. " SPI_AS_93 ,Active status for SPI(93)" "Inactive,Active" textline " " bitfld.long 0x0C 28. " SPI_AS_92 ,Active status for SPI(92)" "Inactive,Active" bitfld.long 0x0C 27. " SPI_AS_91 ,Active status for SPI(91)" "Inactive,Active" bitfld.long 0x0C 26. " SPI_AS_90 ,Active status for SPI(90)" "Inactive,Active" textline " " bitfld.long 0x0C 25. " SPI_AS_89 ,Active status for SPI(89)" "Inactive,Active" bitfld.long 0x0C 24. " SPI_AS_88 ,Active status for SPI(88)" "Inactive,Active" bitfld.long 0x0C 23. " SPI_AS_87 ,Active status for SPI(87)" "Inactive,Active" textline " " bitfld.long 0x0C 22. " SPI_AS_86 ,Active status for SPI(86)" "Inactive,Active" bitfld.long 0x0C 21. " SPI_AS_85 ,Active status for SPI(85)" "Inactive,Active" bitfld.long 0x0C 20. " SPI_AS_84 ,Active status for SPI(84)" "Inactive,Active" textline " " bitfld.long 0x0C 19. " SPI_AS_83 ,Active status for SPI(83)" "Inactive,Active" bitfld.long 0x0C 18. " SPI_AS_82 ,Active status for SPI(82)" "Inactive,Active" bitfld.long 0x0C 17. " SPI_AS_81 ,Active status for SPI(81)" "Inactive,Active" textline " " bitfld.long 0x0C 16. " SPI_AS_80 ,Active status for SPI(80)" "Inactive,Active" bitfld.long 0x0C 15. " SPI_AS_79 ,Active status for SPI(79)" "Inactive,Active" bitfld.long 0x0C 14. " SPI_AS_78 ,Active status for SPI(78)" "Inactive,Active" textline " " bitfld.long 0x0C 13. " SPI_AS_77 ,Active status for SPI(77)" "Inactive,Active" bitfld.long 0x0C 12. " SPI_AS_76 ,Active status for SPI(76)" "Inactive,Active" bitfld.long 0x0C 11. " SPI_AS_75 ,Active status for SPI(75)" "Inactive,Active" textline " " bitfld.long 0x0C 10. " SPI_AS_74 ,Active status for SPI(74)" "Inactive,Active" bitfld.long 0x0C 9. " SPI_AS_73 ,Active status for SPI(73)" "Inactive,Active" bitfld.long 0x0C 8. " SPI_AS_72 ,Active status for SPI(72)" "Inactive,Active" textline " " bitfld.long 0x0C 7. " SPI_AS_71 ,Active status for SPI(71)" "Inactive,Active" bitfld.long 0x0C 6. " SPI_AS_70 ,Active status for SPI(70)" "Inactive,Active" bitfld.long 0x0C 5. " SPI_AS_69 ,Active status for SPI(69)" "Inactive,Active" textline " " bitfld.long 0x0C 4. " SPI_AS_68 ,Active status for SPI(68)" "Inactive,Active" bitfld.long 0x0C 3. " SPI_AS_67 ,Active status for SPI(67)" "Inactive,Active" bitfld.long 0x0C 2. " SPI_AS_66 ,Active status for SPI(66)" "Inactive,Active" textline " " bitfld.long 0x0C 1. " SPI_AS_65 ,Active status for SPI(65)" "Inactive,Active" bitfld.long 0x0C 0. " SPI_AS_64 ,Active status for SPI(64)" "Inactive,Active" line.long 0x10 "ICDABR4,Active bit register SPI[127:96]" bitfld.long 0x10 31. " SPI_AS_127 ,Active status for SPI(127)" "Inactive,Active" bitfld.long 0x10 30. " SPI_AS_126 ,Active status for SPI(126)" "Inactive,Active" bitfld.long 0x10 29. " SPI_AS_125 ,Active status for SPI(125)" "Inactive,Active" textline " " bitfld.long 0x10 28. " SPI_AS_124 ,Active status for SPI(124)" "Inactive,Active" bitfld.long 0x10 27. " SPI_AS_123 ,Active status for SPI(123)" "Inactive,Active" bitfld.long 0x10 26. " SPI_AS_122 ,Active status for SPI(122)" "Inactive,Active" textline " " bitfld.long 0x10 25. " SPI_AS_121 ,Active status for SPI(121)" "Inactive,Active" bitfld.long 0x10 24. " SPI_AS_120 ,Active status for SPI(120)" "Inactive,Active" bitfld.long 0x10 23. " SPI_AS_119 ,Active status for SPI(119)" "Inactive,Active" textline " " bitfld.long 0x10 22. " SPI_AS_118 ,Active status for SPI(118)" "Inactive,Active" bitfld.long 0x10 21. " SPI_AS_117 ,Active status for SPI(117)" "Inactive,Active" bitfld.long 0x10 20. " SPI_AS_116 ,Active status for SPI(116)" "Inactive,Active" textline " " bitfld.long 0x10 19. " SPI_AS_115 ,Active status for SPI(115)" "Inactive,Active" bitfld.long 0x10 18. " SPI_AS_114 ,Active status for SPI(114)" "Inactive,Active" bitfld.long 0x10 17. " SPI_AS_113 ,Active status for SPI(113)" "Inactive,Active" textline " " bitfld.long 0x10 16. " SPI_AS_112 ,Active status for SPI(112)" "Inactive,Active" bitfld.long 0x10 15. " SPI_AS_111 ,Active status for SPI(111)" "Inactive,Active" bitfld.long 0x10 14. " SPI_AS_110 ,Active status for SPI(110)" "Inactive,Active" textline " " bitfld.long 0x10 13. " SPI_AS_109 ,Active status for SPI(109)" "Inactive,Active" bitfld.long 0x10 12. " SPI_AS_108 ,Active status for SPI(108)" "Inactive,Active" bitfld.long 0x10 11. " SPI_AS_107 ,Active status for SPI(107)" "Inactive,Active" textline " " bitfld.long 0x10 10. " SPI_AS_106 ,Active status for SPI(106)" "Inactive,Active" bitfld.long 0x10 9. " SPI_AS_105 ,Active status for SPI(105)" "Inactive,Active" bitfld.long 0x10 8. " SPI_AS_104 ,Active status for SPI(104)" "Inactive,Active" textline " " bitfld.long 0x10 7. " SPI_AS_103 ,Active status for SPI(103)" "Inactive,Active" bitfld.long 0x10 6. " SPI_AS_102 ,Active status for SPI(102)" "Inactive,Active" bitfld.long 0x10 5. " SPI_AS_101 ,Active status for SPI(101)" "Inactive,Active" textline " " bitfld.long 0x10 4. " SPI_AS_100 ,Active status for SPI(100)" "Inactive,Active" bitfld.long 0x10 3. " SPI_AS_99 ,Active status for SPI(99)" "Inactive,Active" bitfld.long 0x10 2. " SPI_AS_98 ,Active status for SPI(98)" "Inactive,Active" textline " " bitfld.long 0x10 1. " SPI_AS_97 ,Active status for SPI(97)" "Inactive,Active" bitfld.long 0x10 0. " SPI_AS_96 ,Active status for SPI(96)" "Inactive,Active" tree.end ;section tree "Priority Level" group.long 0x400++0x0F line.long 0x0 "ICDIPR0,Priority level register for SGI [3:0]" hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4 "ICDIPR1,Priority level register for SGI [7:4]" hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x8 "ICDIPR2,Priority level register for SGI [11:8]" hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0xC "ICDIPR3,Priority level register for SGI [15:12]" hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0" group.long 0x410++0x07 line.long 0x00 "ICDIPR4,Priority level register for PPI [3:0]" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x04 "ICDIPR5,Priority level register for PPI [4]" group.long 0x420++0x7F line.long 0x0 "ICDIPR8,Priority level register for SPI [3:0]" hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4 "ICDIPR9,Priority level register for SPI [7:4]" hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x8 "ICDIPR10,Priority level register for SPI [11:8]" hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0xC "ICDIPR11,Priority level register for SPI [15:12]" hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x10 "ICDIPR12,Priority level register for SPI [19:16]" hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x14 "ICDIPR13,Priority level register for SPI [23:20]" hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x18 "ICDIPR14,Priority level register for SPI [27:24]" hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x1C "ICDIPR15,Priority level register for SPI [31:28]" hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x20 "ICDIPR16,Priority level register for SPI [35:32]" hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x24 "ICDIPR17,Priority level register for SPI [39:36]" hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x28 "ICDIPR18,Priority level register for SPI [43:40]" hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x2C "ICDIPR19,Priority level register for SPI [47:44]" hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x30 "ICDIPR20,Priority level register for SPI [51:48]" hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x34 "ICDIPR21,Priority level register for SPI [55:52]" hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x38 "ICDIPR22,Priority level register for SPI [59:56]" hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x3C "ICDIPR23,Priority level register for SPI [63:60]" hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x40 "ICDIPR24,Priority level register for SPI [67:64]" hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x44 "ICDIPR25,Priority level register for SPI [71:68]" hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x48 "ICDIPR26,Priority level register for SPI [75:72]" hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4C "ICDIPR27,Priority level register for SPI [79:76]" hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x50 "ICDIPR28,Priority level register for SPI [83:80]" hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x54 "ICDIPR29,Priority level register for SPI [87:84]" hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x58 "ICDIPR30,Priority level register for SPI [91:88]" hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x5C "ICDIPR31,Priority level register for SPI [95:92]" hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x60 "ICDIPR32,Priority level register for SPI [99:96]" hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x64 "ICDIPR33,Priority level register for SPI [103:100]" hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x68 "ICDIPR34,Priority level register for SPI [107:104]" hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x6C "ICDIPR35,Priority level register for SPI [111:108]" hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x70 "ICDIPR36,Priority level register for SPI [115:112]" hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x74 "ICDIPR37,Priority level register for SPI [119:116]" hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x78 "ICDIPR38,Priority level register for SPI [123:120]" hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x7C "ICDIPR39,Priority level register for SPI [127:124]" hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0" tree.end tree "Processor Targets" rgroup.long 0x800++0x0F line.long 0x0 "ICDIPTR0,Processor target register for SGI [3:0]" hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4 "ICDIPTR1,Processor target register for SGI [7:4]" hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x8 "ICDIPTR2,Processor target register for SGI [11:8]" hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0xC "ICDIPTR3,Processor target register for SGI [15:12]" hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0" rgroup.long 0x818++0x07 line.long 0x00 "ICDIPTR6,Processor target register for PPI [3:0]" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x04 "ICDIPTR7,Processor target register for PPI [4]" group.long 0x820++0x7F line.long 0x0 "ICDIPTR8,Processor target register for SPI [3:0]" hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4 "ICDIPTR9,Processor target register for SPI [7:4]" hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x8 "ICDIPTR10,Processor target register for SPI [11:8]" hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0xC "ICDIPTR11,Processor target register for SPI [15:12]" hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x10 "ICDIPTR12,Processor target register for SPI [19:16]" hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x14 "ICDIPTR13,Processor target register for SPI [23:20]" hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x18 "ICDIPTR14,Processor target register for SPI [27:24]" hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x1C "ICDIPTR15,Processor target register for SPI [31:28]" hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x20 "ICDIPTR16,Processor target register for SPI [35:32]" hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x24 "ICDIPTR17,Processor target register for SPI [39:36]" hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x28 "ICDIPTR18,Processor target register for SPI [43:40]" hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x2C "ICDIPTR19,Processor target register for SPI [47:44]" hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x30 "ICDIPTR20,Processor target register for SPI [51:48]" hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x34 "ICDIPTR21,Processor target register for SPI [55:52]" hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x38 "ICDIPTR22,Processor target register for SPI [59:56]" hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x3C "ICDIPTR23,Processor target register for SPI [63:60]" hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x40 "ICDIPTR24,Processor target register for SPI [67:64]" hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x44 "ICDIPTR25,Processor target register for SPI [71:68]" hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x48 "ICDIPTR26,Processor target register for SPI [75:72]" hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x4C "ICDIPTR27,Processor target register for SPI [79:76]" hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x50 "ICDIPTR28,Processor target register for SPI [83:80]" hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x54 "ICDIPTR29,Processor target register for SPI [87:84]" hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x58 "ICDIPTR30,Processor target register for SPI [91:88]" hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x5C "ICDIPTR31,Processor target register for SPI [95:92]" hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x60 "ICDIPTR32,Processor target register for SPI [99:96]" hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x64 "ICDIPTR33,Processor target register for SPI [103:100]" hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x68 "ICDIPTR34,Processor target register for SPI [107:104]" hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x6C "ICDIPTR35,Processor target register for SPI [111:108]" hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x70 "ICDIPTR36,Processor target register for SPI [115:112]" hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x74 "ICDIPTR37,Processor target register for SPI [119:116]" hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x78 "ICDIPTR38,Processor target register for SPI [123:120]" hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0" line.long 0x7C "ICDIPTR39,Processor target register for SPI [127:124]" hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3" hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2" hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1" hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0" tree.end ;section tree "Interrupt Configuration" group.long 0xC00++0x27 line.long 0x00 "ICDICFR0,Interrupt Configuration SGI Register" bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x04 "ICDICFR1,Interrupt Configuration PPI Register" bitfld.long 0x04 8.--9. " PPI[4] ,Interrupt Configuration PPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x04 6.--7. " PPI[3] ,Interrupt Configuration PPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x04 4.--5. " PPI[2] ,Interrupt Configuration PPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x04 2.--3. " PPI[1] ,Interrupt Configuration PPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x04 0.--1. " PPI[0] ,Interrupt Configuration PPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x08 "ICDICFR2,Interrupt configuration register for SPI[15:0]" bitfld.long 0x08 30.--31. " SPI[15] ,Interrupt Configuration SPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 28.--29. " SPI[14] ,Interrupt Configuration SPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 26.--27. " SPI[13] ,Interrupt Configuration SPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x08 24.--25. " SPI[12] ,Interrupt Configuration SPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 22.--23. " SPI[11] ,Interrupt Configuration SPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 20.--21. " SPI[10] ,Interrupt Configuration SPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x08 18.--19. " SPI[9] ,Interrupt Configuration SPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 16.--17. " SPI[8] ,Interrupt Configuration SPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 14.--15. " SPI[7] ,Interrupt Configuration SPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x08 12.--13. " SPI[6] ,Interrupt Configuration SPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 10.--11. " SPI[5] ,Interrupt Configuration SPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 8.--9. " SPI[4] ,Interrupt Configuration SPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x08 6.--7. " SPI[3] ,Interrupt Configuration SPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 4.--5. " SPI[2] ,Interrupt Configuration SPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x08 2.--3. " SPI[1] ,Interrupt Configuration SPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x08 0.--1. " SPI[0] ,Interrupt Configuration SPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x0C "ICDICFR3,Interrupt configuration register for SPI[31:16]" bitfld.long 0x0C 30.--31. " SPI[31] ,Interrupt Configuration SPI[31]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 28.--29. " SPI[30] ,Interrupt Configuration SPI[30]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 26.--27. " SPI[29] ,Interrupt Configuration SPI[29]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x0C 24.--25. " SPI[28] ,Interrupt Configuration SPI[28]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 22.--23. " SPI[27] ,Interrupt Configuration SPI[27]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 20.--21. " SPI[26] ,Interrupt Configuration SPI[26]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x0C 18.--19. " SPI[25] ,Interrupt Configuration SPI[25]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 16.--17. " SPI[24] ,Interrupt Configuration SPI[24]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 14.--15. " SPI[23] ,Interrupt Configuration SPI[23]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x0C 12.--13. " SPI[22] ,Interrupt Configuration SPI[22]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 10.--11. " SPI[21] ,Interrupt Configuration SPI[21]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 8.--9. " SPI[20] ,Interrupt Configuration SPI[20]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x0C 6.--7. " SPI[19] ,Interrupt Configuration SPI[19]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 4.--5. " SPI[18] ,Interrupt Configuration SPI[18]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x0C 2.--3. " SPI[17] ,Interrupt Configuration SPI[17]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x0C 0.--1. " SPI[16] ,Interrupt Configuration SPI[16]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x10 "ICDICFR4,Interrupt configuration register for SPI[47:32]" bitfld.long 0x10 30.--31. " SPI[47] ,Interrupt Configuration SPI[47]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 28.--29. " SPI[46] ,Interrupt Configuration SPI[46]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 26.--27. " SPI[45] ,Interrupt Configuration SPI[45]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x10 24.--25. " SPI[44] ,Interrupt Configuration SPI[44]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 22.--23. " SPI[43] ,Interrupt Configuration SPI[43]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 20.--21. " SPI[42] ,Interrupt Configuration SPI[42]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x10 18.--19. " SPI[41] ,Interrupt Configuration SPI[41]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 16.--17. " SPI[40] ,Interrupt Configuration SPI[40]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 14.--15. " SPI[39] ,Interrupt Configuration SPI[39]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x10 12.--13. " SPI[38] ,Interrupt Configuration SPI[38]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 10.--11. " SPI[37] ,Interrupt Configuration SPI[37]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 8.--9. " SPI[36] ,Interrupt Configuration SPI[36]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x10 6.--7. " SPI[35] ,Interrupt Configuration SPI[35]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 4.--5. " SPI[34] ,Interrupt Configuration SPI[34]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x10 2.--3. " SPI[33] ,Interrupt Configuration SPI[33]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x10 0.--1. " SPI[32] ,Interrupt Configuration SPI[32]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x14 "ICDICFR5,Interrupt configuration register for SPI[63:48]" bitfld.long 0x14 30.--31. " SPI[63] ,Interrupt Configuration SPI[63]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 28.--29. " SPI[62] ,Interrupt Configuration SPI[62]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 26.--27. " SPI[61] ,Interrupt Configuration SPI[61]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x14 24.--25. " SPI[60] ,Interrupt Configuration SPI[60]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 22.--23. " SPI[59] ,Interrupt Configuration SPI[59]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 20.--21. " SPI[58] ,Interrupt Configuration SPI[58]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x14 18.--19. " SPI[57] ,Interrupt Configuration SPI[57]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 16.--17. " SPI[56] ,Interrupt Configuration SPI[56]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 14.--15. " SPI[55] ,Interrupt Configuration SPI[55]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x14 12.--13. " SPI[54] ,Interrupt Configuration SPI[54]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 10.--11. " SPI[53] ,Interrupt Configuration SPI[53]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 8.--9. " SPI[52] ,Interrupt Configuration SPI[52]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x14 6.--7. " SPI[51] ,Interrupt Configuration SPI[51]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 4.--5. " SPI[50] ,Interrupt Configuration SPI[50]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x14 2.--3. " SPI[49] ,Interrupt Configuration SPI[49]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x14 0.--1. " SPI[48] ,Interrupt Configuration SPI[48]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x18 "ICDICFR6,Interrupt configuration register for SPI[79:64]" bitfld.long 0x18 30.--31. " SPI[79] ,Interrupt Configuration SPI[79]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 28.--29. " SPI[78] ,Interrupt Configuration SPI[78]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 26.--27. " SPI[77] ,Interrupt Configuration SPI[77]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x18 24.--25. " SPI[76] ,Interrupt Configuration SPI[76]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 22.--23. " SPI[75] ,Interrupt Configuration SPI[75]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 20.--21. " SPI[74] ,Interrupt Configuration SPI[74]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x18 18.--19. " SPI[73] ,Interrupt Configuration SPI[73]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 16.--17. " SPI[72] ,Interrupt Configuration SPI[72]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 14.--15. " SPI[71] ,Interrupt Configuration SPI[71]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x18 12.--13. " SPI[70] ,Interrupt Configuration SPI[70]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 10.--11. " SPI[69] ,Interrupt Configuration SPI[69]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 8.--9. " SPI[68] ,Interrupt Configuration SPI[68]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x18 6.--7. " SPI[67] ,Interrupt Configuration SPI[67]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 4.--5. " SPI[66] ,Interrupt Configuration SPI[66]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x18 2.--3. " SPI[65] ,Interrupt Configuration SPI[65]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x18 0.--1. " SPI[64] ,Interrupt Configuration SPI[64]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x1C "ICDICFR7,Interrupt configuration register for SPI[95:80]" bitfld.long 0x1C 30.--31. " SPI[95] ,Interrupt Configuration SPI[95]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 28.--29. " SPI[94] ,Interrupt Configuration SPI[94]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 26.--27. " SPI[93] ,Interrupt Configuration SPI[93]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x1C 24.--25. " SPI[92] ,Interrupt Configuration SPI[92]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 22.--23. " SPI[91] ,Interrupt Configuration SPI[91]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 20.--21. " SPI[90] ,Interrupt Configuration SPI[90]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x1C 18.--19. " SPI[89] ,Interrupt Configuration SPI[89]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 16.--17. " SPI[88] ,Interrupt Configuration SPI[88]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 14.--15. " SPI[87] ,Interrupt Configuration SPI[87]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x1C 12.--13. " SPI[86] ,Interrupt Configuration SPI[86]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 10.--11. " SPI[85] ,Interrupt Configuration SPI[85]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 8.--9. " SPI[84] ,Interrupt Configuration SPI[84]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x1C 6.--7. " SPI[83] ,Interrupt Configuration SPI[83]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 4.--5. " SPI[82] ,Interrupt Configuration SPI[82]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x1C 2.--3. " SPI[81] ,Interrupt Configuration SPI[81]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x1C 0.--1. " SPI[80] ,Interrupt Configuration SPI[80]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x20 "ICDICFR8,Interrupt configuration register for SPI[111:96]" bitfld.long 0x20 30.--31. " SPI[111] ,Interrupt Configuration SPI[111]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 28.--29. " SPI[110] ,Interrupt Configuration SPI[110]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 26.--27. " SPI[109] ,Interrupt Configuration SPI[109]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x20 24.--25. " SPI[108] ,Interrupt Configuration SPI[108]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 22.--23. " SPI[107] ,Interrupt Configuration SPI[107]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 20.--21. " SPI[106] ,Interrupt Configuration SPI[106]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x20 18.--19. " SPI[105] ,Interrupt Configuration SPI[105]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 16.--17. " SPI[104] ,Interrupt Configuration SPI[104]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 14.--15. " SPI[103] ,Interrupt Configuration SPI[103]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x20 12.--13. " SPI[102] ,Interrupt Configuration SPI[102]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 10.--11. " SPI[101] ,Interrupt Configuration SPI[101]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 8.--9. " SPI[100] ,Interrupt Configuration SPI[100]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x20 6.--7. " SPI[99] ,Interrupt Configuration SPI[99]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 4.--5. " SPI[98] ,Interrupt Configuration SPI[98]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x20 2.--3. " SPI[97] ,Interrupt Configuration SPI[97]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x20 0.--1. " SPI[96] ,Interrupt Configuration SPI[96]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" line.long 0x24 "ICDICFR9,Interrupt configuration register for SPI[127:112]" bitfld.long 0x24 30.--31. " SPI[127] ,Interrupt Configuration SPI[127]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 28.--29. " SPI[126] ,Interrupt Configuration SPI[126]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 26.--27. " SPI[125] ,Interrupt Configuration SPI[125]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x24 24.--25. " SPI[124] ,Interrupt Configuration SPI[124]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 22.--23. " SPI[123] ,Interrupt Configuration SPI[123]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 20.--21. " SPI[122] ,Interrupt Configuration SPI[122]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x24 18.--19. " SPI[121] ,Interrupt Configuration SPI[121]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 16.--17. " SPI[120] ,Interrupt Configuration SPI[120]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 14.--15. " SPI[119] ,Interrupt Configuration SPI[119]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x24 12.--13. " SPI[118] ,Interrupt Configuration SPI[118]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 10.--11. " SPI[117] ,Interrupt Configuration SPI[117]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 8.--9. " SPI[116] ,Interrupt Configuration SPI[116]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x24 6.--7. " SPI[115] ,Interrupt Configuration SPI[115]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 4.--5. " SPI[114] ,Interrupt Configuration SPI[114]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" bitfld.long 0x24 2.--3. " SPI[113] ,Interrupt Configuration SPI[113]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" textline " " bitfld.long 0x24 0.--1. " SPI[112] ,Interrupt Configuration SPI[112]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge" tree.end ;section width 17. tree "PPI & SPI Status" rgroup.long 0xd00++0x03 line.long 0x00 "PPI_STATUS,PPI Status Register" bitfld.long 0x00 4. " PPI[4] ,PPI[4] Status" "Low,High" bitfld.long 0x00 3. " PPI[3] ,PPI[3] Status" "Low,High" bitfld.long 0x00 2. " PPI[2] ,PPI[2] Status" "Low,High" bitfld.long 0x00 1. " PPI[1] ,PPI[1] Status" "Low,High" textline " " bitfld.long 0x00 0. " PPI[0] ,PPI[0] Status" "Low,High" group.long 0xd04++0x03 line.long 0x00 "SPI_STATUS0,SPI[31:0] Status Register" bitfld.long 0x00 31. " SPI[31] ,SPI Status[31]" "Low,High" bitfld.long 0x00 30. " SPI[30] ,SPI Status[30]" "Low,High" bitfld.long 0x00 29. " SPI[29] ,SPI Status[29]" "Low,High" bitfld.long 0x00 28. " SPI[28] ,SPI Status[28]" "Low,High" bitfld.long 0x00 27. " SPI[27] ,SPI Status[27]" "Low,High" textline " " bitfld.long 0x00 26. " SPI[26] ,SPI Status[26]" "Low,High" bitfld.long 0x00 25. " SPI[25] ,SPI Status[25]" "Low,High" bitfld.long 0x00 24. " SPI[24] ,SPI Status[24]" "Low,High" bitfld.long 0x00 23. " SPI[23] ,SPI Status[23]" "Low,High" bitfld.long 0x00 22. " SPI[22] ,SPI Status[22]" "Low,High" textline " " bitfld.long 0x00 21. " SPI[21] ,SPI Status[21]" "Low,High" bitfld.long 0x00 20. " SPI[20] ,SPI Status[20]" "Low,High" bitfld.long 0x00 19. " SPI[19] ,SPI Status[19]" "Low,High" bitfld.long 0x00 18. " SPI[18] ,SPI Status[18]" "Low,High" bitfld.long 0x00 17. " SPI[17] ,SPI Status[17]" "Low,High" textline " " bitfld.long 0x00 16. " SPI[16] ,SPI Status[16]" "Low,High" bitfld.long 0x00 15. " SPI[15] ,SPI Status[15]" "Low,High" bitfld.long 0x00 14. " SPI[14] ,SPI Status[14]" "Low,High" bitfld.long 0x00 13. " SPI[13] ,SPI Status[13]" "Low,High" bitfld.long 0x00 12. " SPI[12] ,SPI Status[12]" "Low,High" textline " " bitfld.long 0x00 11. " SPI[11] ,SPI Status[11]" "Low,High" bitfld.long 0x00 10. " SPI[19] ,SPI Status[10]" "Low,High" bitfld.long 0x00 9. " SPI[9] ,SPI Status[9]" "Low,High" bitfld.long 0x00 8. " SPI[8] ,SPI Status[8]" "Low,High" bitfld.long 0x00 7. " SPI[7] ,SPI Status[7]" "Low,High" textline " " bitfld.long 0x00 6. " SPI[6] ,SPI Status[6]" "Low,High" bitfld.long 0x00 5. " SPI[5] ,SPI Status[5]" "Low,High" bitfld.long 0x00 4. " SPI[4] ,SPI Status[4]" "Low,High" bitfld.long 0x00 3. " SPI[3] ,SPI Status[3]" "Low,High" bitfld.long 0x00 2. " SPI[2] ,SPI Status[2]" "Low,High" textline " " bitfld.long 0x00 1. " SPI[1] ,SPI Status[1]" "Low,High" bitfld.long 0x00 0. " SPI[0] ,SPI Status[0]" "Low,High" group.long 0xd08++0x03 line.long 0x00 "SPI_STATUS1,SPI[63:32] Status Register" bitfld.long 0x00 31. " SPI[63] ,SPI Status[63]" "Low,High" bitfld.long 0x00 30. " SPI[62] ,SPI Status[62]" "Low,High" bitfld.long 0x00 29. " SPI[61] ,SPI Status[61]" "Low,High" bitfld.long 0x00 28. " SPI[60] ,SPI Status[60]" "Low,High" bitfld.long 0x00 27. " SPI[59] ,SPI Status[59]" "Low,High" textline " " bitfld.long 0x00 26. " SPI[58] ,SPI Status[58]" "Low,High" bitfld.long 0x00 25. " SPI[57] ,SPI Status[57]" "Low,High" bitfld.long 0x00 24. " SPI[56] ,SPI Status[56]" "Low,High" bitfld.long 0x00 23. " SPI[55] ,SPI Status[55]" "Low,High" bitfld.long 0x00 22. " SPI[54] ,SPI Status[54]" "Low,High" textline " " bitfld.long 0x00 21. " SPI[53] ,SPI Status[53]" "Low,High" bitfld.long 0x00 20. " SPI[52] ,SPI Status[52]" "Low,High" bitfld.long 0x00 19. " SPI[51] ,SPI Status[51]" "Low,High" bitfld.long 0x00 18. " SPI[50] ,SPI Status[50]" "Low,High" bitfld.long 0x00 17. " SPI[49] ,SPI Status[49]" "Low,High" textline " " bitfld.long 0x00 16. " SPI[48] ,SPI Status[48]" "Low,High" bitfld.long 0x00 15. " SPI[47] ,SPI Status[47]" "Low,High" bitfld.long 0x00 14. " SPI[46] ,SPI Status[46]" "Low,High" bitfld.long 0x00 13. " SPI[45] ,SPI Status[45]" "Low,High" bitfld.long 0x00 12. " SPI[44] ,SPI Status[44]" "Low,High" textline " " bitfld.long 0x00 11. " SPI[43] ,SPI Status[43]" "Low,High" bitfld.long 0x00 10. " SPI[42] ,SPI Status[42]" "Low,High" bitfld.long 0x00 9. " SPI[41] ,SPI Status[41]" "Low,High" bitfld.long 0x00 8. " SPI[40] ,SPI Status[40]" "Low,High" bitfld.long 0x00 7. " SPI[39] ,SPI Status[39]" "Low,High" textline " " bitfld.long 0x00 6. " SPI[38] ,SPI Status[38]" "Low,High" bitfld.long 0x00 5. " SPI[37] ,SPI Status[37]" "Low,High" bitfld.long 0x00 4. " SPI[36] ,SPI Status[36]" "Low,High" bitfld.long 0x00 3. " SPI[35] ,SPI Status[35]" "Low,High" textline " " bitfld.long 0x00 2. " SPI[34] ,SPI Status[34]" "Low,High" bitfld.long 0x00 1. " SPI[33] ,SPI Status[33]" "Low,High" bitfld.long 0x00 0. " SPI[32] ,SPI Status[32]" "Low,High" group.long 0xd0C++0x03 line.long 0x00 "SPI_STATUS2,SPI[95:64] Status Register" bitfld.long 0x00 31. " SPI[95] ,SPI Status[95]" "Low,High" bitfld.long 0x00 30. " SPI[94] ,SPI Status[94]" "Low,High" bitfld.long 0x00 29. " SPI[93] ,SPI Status[93]" "Low,High" bitfld.long 0x00 28. " SPI[92] ,SPI Status[92]" "Low,High" bitfld.long 0x00 27. " SPI[91] ,SPI Status[91]" "Low,High" textline " " bitfld.long 0x00 26. " SPI[90] ,SPI Status[90]" "Low,High" bitfld.long 0x00 25. " SPI[89] ,SPI Status[89]" "Low,High" bitfld.long 0x00 24. " SPI[88] ,SPI Status[88]" "Low,High" bitfld.long 0x00 23. " SPI[87] ,SPI Status[87]" "Low,High" bitfld.long 0x00 22. " SPI[86] ,SPI Status[86]" "Low,High" textline " " bitfld.long 0x00 21. " SPI[85] ,SPI Status[85]" "Low,High" bitfld.long 0x00 20. " SPI[84] ,SPI Status[84]" "Low,High" bitfld.long 0x00 19. " SPI[83] ,SPI Status[83]" "Low,High" bitfld.long 0x00 18. " SPI[82] ,SPI Status[82]" "Low,High" bitfld.long 0x00 17. " SPI[81] ,SPI Status[81]" "Low,High" textline " " bitfld.long 0x00 16. " SPI[80] ,SPI Status[80]" "Low,High" bitfld.long 0x00 15. " SPI[79] ,SPI Status[79]" "Low,High" bitfld.long 0x00 14. " SPI[78] ,SPI Status[78]" "Low,High" bitfld.long 0x00 13. " SPI[77] ,SPI Status[77]" "Low,High" bitfld.long 0x00 12. " SPI[76] ,SPI Status[76]" "Low,High" textline " " bitfld.long 0x00 11. " SPI[75] ,SPI Status[75]" "Low,High" bitfld.long 0x00 10. " SPI[74] ,SPI Status[74]" "Low,High" bitfld.long 0x00 9. " SPI[73] ,SPI Status[73]" "Low,High" bitfld.long 0x00 8. " SPI[72] ,SPI Status[72]" "Low,High" bitfld.long 0x00 7. " SPI[71] ,SPI Status[71]" "Low,High" textline " " bitfld.long 0x00 6. " SPI[70] ,SPI Status[70]" "Low,High" bitfld.long 0x00 5. " SPI[69] ,SPI Status[69]" "Low,High" bitfld.long 0x00 4. " SPI[68] ,SPI Status[68]" "Low,High" bitfld.long 0x00 3. " SPI[67] ,SPI Status[67]" "Low,High" bitfld.long 0x00 2. " SPI[66] ,SPI Status[66]" "Low,High" textline " " bitfld.long 0x00 1. " SPI[65] ,SPI Status[65]" "Low,High" bitfld.long 0x00 0. " SPI[64] ,SPI Status[64]" "Low,High" group.long 0xd10++0x03 line.long 0x00 "SPI_STATUS3,SPI[127:96] Status Register" bitfld.long 0x00 31. " SPI[127] ,SPI Status[127]" "Low,High" bitfld.long 0x00 30. " SPI[126] ,SPI Status[126]" "Low,High" bitfld.long 0x00 29. " SPI[125] ,SPI Status[125]" "Low,High" bitfld.long 0x00 28. " SPI[124] ,SPI Status[124]" "Low,High" bitfld.long 0x00 27. " SPI[123] ,SPI Status[123]" "Low,High" textline " " bitfld.long 0x00 26. " SPI[122] ,SPI Status[122]" "Low,High" bitfld.long 0x00 25. " SPI[121] ,SPI Status[121]" "Low,High" bitfld.long 0x00 24. " SPI[120] ,SPI Status[120]" "Low,High" bitfld.long 0x00 23. " SPI[119] ,SPI Status[119]" "Low,High" bitfld.long 0x00 22. " SPI[118] ,SPI Status[118]" "Low,High" textline " " bitfld.long 0x00 21. " SPI[117] ,SPI Status[117]" "Low,High" bitfld.long 0x00 20. " SPI[116] ,SPI Status[116]" "Low,High" bitfld.long 0x00 19. " SPI[115] ,SPI Status[115]" "Low,High" bitfld.long 0x00 18. " SPI[114] ,SPI Status[114]" "Low,High" bitfld.long 0x00 17. " SPI[113] ,SPI Status[113]" "Low,High" textline " " bitfld.long 0x00 16. " SPI[112] ,SPI Status[112]" "Low,High" bitfld.long 0x00 15. " SPI[111] ,SPI Status[111]" "Low,High" bitfld.long 0x00 14. " SPI[110] ,SPI Status[110]" "Low,High" bitfld.long 0x00 13. " SPI[109] ,SPI Status[109]" "Low,High" bitfld.long 0x00 12. " SPI[108] ,SPI Status[108]" "Low,High" textline " " bitfld.long 0x00 11. " SPI[107] ,SPI Status[107]" "Low,High" bitfld.long 0x00 10. " SPI[106] ,SPI Status[106]" "Low,High" bitfld.long 0x00 9. " SPI[105] ,SPI Status[105]" "Low,High" bitfld.long 0x00 8. " SPI[104] ,SPI Status[104]" "Low,High" bitfld.long 0x00 7. " SPI[103] ,SPI Status[103]" "Low,High" textline " " bitfld.long 0x00 6. " SPI[102] ,SPI Status[102]" "Low,High" bitfld.long 0x00 5. " SPI[101] ,SPI Status[101]" "Low,High" bitfld.long 0x00 4. " SPI[100] ,SPI Status[100]" "Low,High" bitfld.long 0x00 3. " SPI[99] ,SPI Status[99]" "Low,High" bitfld.long 0x00 2. " SPI[98] ,SPI Status[98]" "Low,High" textline " " bitfld.long 0x00 1. " SPI[97] ,SPI Status[97]" "Low,High" bitfld.long 0x00 0. " SPI[96] ,SPI Status[96]" "Low,High" tree.end tree.end width 9. wgroup.long 0xF00++0x03 "Software Generated Interrupt" line.long 0x00 "ICDSGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TRG_LIST_FLT ,Distributor SGI processing" "CPUTargetList,All interfaces,Requested only,?..." hexmask.long.byte 0x00 16.--23. 1. " CPU_TRG_LIST ,CPU Target List" bitfld.long 0x00 15. " NSATT ,Security value of the SGI" "Group 0,Group 1" bitfld.long 0x00 0.--3. " SGIINTID ,Interrupt ID of the SGI to forward to the specified CPU interfaces" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 0xb tree.end tree.end else tree "Core Registers (Cortex-A7MPCore)" AUTOINDENT.PUSH AUTOINDENT.OFF ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- width 10. tree "ID Registers" group.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..." endif rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..." rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" textline " " bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4" rgroup.long c15:0x400++0x0 line.long 0x0 "MIDR2,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x700++0x0 line.long 0x0 "MIDR3,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." endif rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..." endif rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..." bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." textline " " bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented" textline " " bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" textline " " bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" textline " " bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" endif tree.end width 12. tree "System Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" textline " " bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled" bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified" bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented" bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented" textline " " bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled" bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced" bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced" bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes" textline " " bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes" bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes" bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes" textline " " bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes" bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled" bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced" textline " " bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited" bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed" bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed" textline " " bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced" bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced" bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes" textline " " bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled" bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes" bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes" textline " " bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited" bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes" bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes" bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes" bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches" textline " " bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes" textline " " bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x140F++0x00 line.long 0x0 "ACTLR2,Auxiliary Control Register 2" bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled" bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled" textline " " else hgroup.long c15:0x140F++0x00 hide.long 0x0 "ACTLR2,Auxiliary Control Register 2" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" endif group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled" bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes" textline " " bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" textline " " bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" endif group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address" textline " " rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" else hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x1609))&0x3)==0x3) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes" bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" textline " " bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x2) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" textline " " bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x1) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" textline " " bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x0) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " endif group.long c15:0x410F++0x00 line.long 0x00 "FILASTARTR,Peripheral port start address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region" bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid" group.long c15:0x420F++0x00 line.long 0x00 "FILAENDR,Peripheral port end address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") hgroup.long c15:0x1609++0x00 hide.long 0x00 "SCUCTLR,SCU Control Register" hgroup.long c15:0x410F++0x00 hide.long 0x00 "FILASTARTR,Peripheral port start address register" hgroup.long c15:0x420F++0x00 hide.long 0x00 "FILAENDR,Peripheral port end address register" endif tree.end width 12. tree "Memory Management Unit" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " endif if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes" bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes" textline " " bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1" bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7" endif textline " " group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." endif endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" else hgroup.long c15:0x0015++0x00 hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif endif group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA" hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable" bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred" textline " " bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved" textline " " bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable" bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate" textline " " bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate" bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection" bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..." textline " " bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " endif if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x003A++0x00 hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x013A++0x00 hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" endif else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" textline " " bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " endif if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif textline " " if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier" hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hyp Software Thread ID Register" tree.end width 15. tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x0 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hyp Configuration Register" bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system" bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted" bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override" bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override" textline " " bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hyp Debug Control Register" bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid" textline " " bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid" textline " " bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register" bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped" textline " " bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hyp System Trap Register" bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled" bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped" textline " " bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped" bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped" bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped" textline " " bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped" bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped" bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped" textline " " bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped" bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped" bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped" textline " " bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped" bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped" bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped" textline " " bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hyp Translation Table Base Register" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hyp Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved" bitfld.long 0x00 4. " S ,Sign extension bit" "0,1" bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" endif group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hyp Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..." textline " " bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hyp IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits" textline " " hgroup.long c15:0x407++0x00 hide.long 0x00 "NOP,No Operation Register" in wgroup.long c15:0x17++0x00 line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x617++0x00 line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x57++0x00 line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x157++0x00 line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x457++0x00 line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x657++0x00 line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x757++0x00 line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x167++0x00 line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x267++0x00 line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write" wgroup.long c15:0x1a7++0x00 line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x2a7++0x00 line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x4a7++0x00 line.long 0x00 "CP15DSB,Data Synchronization Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x5a7++0x00 line.long 0x00 "CP15DMB,Data Memory Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x1b7++0x00 line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x1e7++0x00 line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x2e7++0x00 line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,Invalidate instruction TLB" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,Invalidate data TLB" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,Invalidate unified TLB" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" else hgroup.long c15:0x403A++0x00 hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x413A++0x00 hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" endif group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hyp Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address" tree.end width 12. tree "Cache Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..." bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..." endif group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c15:0x10EF++0x00 line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved" else hgroup.long c15:0x10EF++0x00 hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" endif tree "Level 1 memory system" width 10. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x004F++0x00 line.long 0x00 "RAMINDEX,RAM Index Register" hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier" bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" textline " " group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High" bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High" bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High" textline " " bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High" bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High" hexmask.long 0x00 0.--26. 1. " TA ,Tag Address" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long 0x00 6.--30. 1. " SI ,Set index" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--15. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--16. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--17. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--18. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--19. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--20. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" else hgroup.long c15:0x314F++0x0 hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" endif if (((d.l(c15:0x324F))&0x100)==0x100) wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" else wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" endif endif tree.end tree "Level 2 memory system" width 11. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" textline " " bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled" bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid" textline " " bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle" textline " " bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191." rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes" bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes" bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced" bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced" bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled" bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes" bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes" bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes" textline " " bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes" bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled" bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes" textline " " bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes" bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes" textline " " bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled" bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes" group.long c15:0x130F++0x00 line.long 0x00 "L2PFR,L2 Prefetch Control Register" bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes" bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled" bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes" textline " " bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines" textline " " group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" hgroup.quad c15:0x110F0++0x01 hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes" rgroup.long c15:0x1609++0x00 line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register" bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1" bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location" textline " " bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA" bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid" endif tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" textline " " bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" textline " " bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes" bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes" bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes" bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes" textline " " bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed" bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled" tree.end width 12. tree "System Timer Register" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline " " bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline "" group.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" textline "" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" textline "" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" tree.end width 11. width 15. tree "Debug Registers" rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" textline " " hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") wgroup.long c14:6.++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" endif group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled" group.long c14:9.++0x0 line.long 0x00 "DBGECR,Debug Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group.long c14:32.++0x0 line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Debug Instruction Transfer Register" rgroup.long c14:33.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif endif wgroup.long c14:35.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" textline " " bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request" bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled" bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" endif rgroup.long c14:40.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..." rgroup.long c14:41.++0x0 line.long 0x00 "DBGCIDSR,DBGCIDSR" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register" bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure" bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated" hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,DBGVIDSR" endif width 15. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register" bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High" bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High" bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High" bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register" bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High" bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High" bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c14:959.++0x0 line.long 0x00 "DBGITISR,Debug Integration Input Status Register" bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High" bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High" bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " rgroup.long c14:959.++0x0 line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register" bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High" bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) rgroup.quad c14:128.++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address" bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.quad c14:256.++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" else rgroup.long c14:128.++0x0 line.long 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address" bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.long c14:256.++0x0 line.long 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" endif group.long c14:195.++0x00 line.long 0x00 "DBGOSDLR,OS Double Lock Register" bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked" else hgroup.quad c14:128.++0x1 hide.quad 0x0 "DBGDRAR,Debug ROM Address Register" hgroup.quad c14:256.++0x1 hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hgroup.long c14:195.++0x00 hide.long 0x00 "DBGOSDLR,OS Double Lock Register" endif wgroup.long c14:192.++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:193.++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..." group.long c14:196.++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High" bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset" bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High" bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High" bitfld.long 0x00 4. " HALTED ,Halted" "Low,High" textline " " bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High" bitfld.long 0x00 2. " RS ,Reset Status" "Low,High" bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High" textline " " bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High" tree "Processor ID registers" rgroup.long c14:(832.+0.)++0x00 line.long 0x00 "PIDR0,Processor ID register 0" rgroup.long c14:(832.+1.)++0x00 line.long 0x00 "PIDR1,Processor ID register 1" rgroup.long c14:(832.+2.)++0x00 line.long 0x00 "PIDR2,Processor ID register 2" rgroup.long c14:(832.+3.)++0x00 line.long 0x00 "PIDR3,Processor ID register 3" rgroup.long c14:(832.+4.)++0x00 line.long 0x00 "PIDR4,Processor ID register 4" rgroup.long c14:(832.+5.)++0x00 line.long 0x00 "PIDR5,Processor ID register 5" rgroup.long c14:(832.+6.)++0x00 line.long 0x00 "PIDR6,Processor ID register 6" rgroup.long c14:(832.+7.)++0x00 line.long 0x00 "PIDR7,Processor ID register 7" rgroup.long c14:(832.+8.)++0x00 line.long 0x00 "PIDR8,Processor ID register 8" rgroup.long c14:(832.+9.)++0x00 line.long 0x00 "PIDR9,Processor ID register 9" rgroup.long c14:(832.+10.)++0x00 line.long 0x00 "PIDR10,Processor ID register 10" rgroup.long c14:(832.+11.)++0x00 line.long 0x00 "PIDR11,Processor ID register 11" rgroup.long c14:(832.+12.)++0x00 line.long 0x00 "PIDR12,Processor ID register 12" rgroup.long c14:(832.+13.)++0x00 line.long 0x00 "PIDR13,Processor ID register 13" rgroup.long c14:(832.+14.)++0x00 line.long 0x00 "PIDR14,Processor ID register 14" rgroup.long c14:(832.+15.)++0x00 line.long 0x00 "PIDR15,Processor ID register 15" rgroup.long c14:(832.+16.)++0x00 line.long 0x00 "PIDR16,Processor ID register 16" rgroup.long c14:(832.+17.)++0x00 line.long 0x00 "PIDR17,Processor ID register 17" rgroup.long c14:(832.+18.)++0x00 line.long 0x00 "PIDR18,Processor ID register 18" rgroup.long c14:(832.+19.)++0x00 line.long 0x00 "PIDR19,Processor ID register 19" rgroup.long c14:(832.+20.)++0x00 line.long 0x00 "PIDR20,Processor ID register 20" rgroup.long c14:(832.+21.)++0x00 line.long 0x00 "PIDR21,Processor ID register 21" rgroup.long c14:(832.+22.)++0x00 line.long 0x00 "PIDR22,Processor ID register 22" rgroup.long c14:(832.+23.)++0x00 line.long 0x00 "PIDR23,Processor ID register 23" rgroup.long c14:(832.+24.)++0x00 line.long 0x00 "PIDR24,Processor ID register 24" rgroup.long c14:(832.+25.)++0x00 line.long 0x00 "PIDR25,Processor ID register 25" rgroup.long c14:(832.+26.)++0x00 line.long 0x00 "PIDR26,Processor ID register 26" rgroup.long c14:(832.+27.)++0x00 line.long 0x00 "PIDR27,Processor ID register 27" rgroup.long c14:(832.+28.)++0x00 line.long 0x00 "PIDR28,Processor ID register 28" rgroup.long c14:(832.+29.)++0x00 line.long 0x00 "PIDR29,Processor ID register 29" rgroup.long c14:(832.+30.)++0x00 line.long 0x00 "PIDR30,Processor ID register 30" rgroup.long c14:(832.+31.)++0x00 line.long 0x00 "PIDR31,Processor ID register 31" rgroup.long c14:(832.+32.)++0x00 line.long 0x00 "PIDR32,Processor ID register 32" rgroup.long c14:(832.+33.)++0x00 line.long 0x00 "PIDR33,Processor ID register 33" rgroup.long c14:(832.+34.)++0x00 line.long 0x00 "PIDR34,Processor ID register 34" rgroup.long c14:(832.+35.)++0x00 line.long 0x00 "PIDR35,Processor ID register 35" rgroup.long c14:(832.+36.)++0x00 line.long 0x00 "PIDR36,Processor ID register 36" rgroup.long c14:(832.+37.)++0x00 line.long 0x00 "PIDR37,Processor ID register 37" rgroup.long c14:(832.+38.)++0x00 line.long 0x00 "PIDR38,Processor ID register 38" rgroup.long c14:(832.+39.)++0x00 line.long 0x00 "PIDR39,Processor ID register 39" rgroup.long c14:(832.+40.)++0x00 line.long 0x00 "PIDR40,Processor ID register 40" rgroup.long c14:(832.+41.)++0x00 line.long 0x00 "PIDR41,Processor ID register 41" rgroup.long c14:(832.+42.)++0x00 line.long 0x00 "PIDR42,Processor ID register 42" rgroup.long c14:(832.+43.)++0x00 line.long 0x00 "PIDR43,Processor ID register 43" rgroup.long c14:(832.+44.)++0x00 line.long 0x00 "PIDR44,Processor ID register 44" rgroup.long c14:(832.+45.)++0x00 line.long 0x00 "PIDR45,Processor ID register 45" rgroup.long c14:(832.+46.)++0x00 line.long 0x00 "PIDR46,Processor ID register 46" rgroup.long c14:(832.+47.)++0x00 line.long 0x00 "PIDR47,Processor ID register 47" rgroup.long c14:(832.+48.)++0x00 line.long 0x00 "PIDR48,Processor ID register 48" rgroup.long c14:(832.+49.)++0x00 line.long 0x00 "PIDR49,Processor ID register 49" rgroup.long c14:(832.+50.)++0x00 line.long 0x00 "PIDR50,Processor ID register 50" rgroup.long c14:(832.+51.)++0x00 line.long 0x00 "PIDR51,Processor ID register 51" rgroup.long c14:(832.+52.)++0x00 line.long 0x00 "PIDR52,Processor ID register 52" rgroup.long c14:(832.+53.)++0x00 line.long 0x00 "PIDR53,Processor ID register 53" rgroup.long c14:(832.+54.)++0x00 line.long 0x00 "PIDR54,Processor ID register 54" rgroup.long c14:(832.+55.)++0x00 line.long 0x00 "PIDR55,Processor ID register 55" rgroup.long c14:(832.+56.)++0x00 line.long 0x00 "PIDR56,Processor ID register 56" rgroup.long c14:(832.+57.)++0x00 line.long 0x00 "PIDR57,Processor ID register 57" rgroup.long c14:(832.+58.)++0x00 line.long 0x00 "PIDR58,Processor ID register 58" rgroup.long c14:(832.+59.)++0x00 line.long 0x00 "PIDR59,Processor ID register 59" rgroup.long c14:(832.+60.)++0x00 line.long 0x00 "PIDR60,Processor ID register 60" rgroup.long c14:(832.+61.)++0x00 line.long 0x00 "PIDR61,Processor ID register 61" rgroup.long c14:(832.+62.)++0x00 line.long 0x00 "PIDR62,Processor ID register 62" rgroup.long c14:(832.+63.)++0x00 line.long 0x00 "PIDR63,Processor ID register 63" tree.end tree "Coresight Management Registers" group.long c14:960.++0x0 line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register" bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group.long c14:1000.++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set" group.long c14:1001.++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" textline " " rgroup.long c14:1006.++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..." endif textline " " rgroup.long c14:1010.++0x0 line.long 0x0 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..." bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..." bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." textline " " rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Debug Device Type Register" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:1016.++0x00 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup.long c14:1017.++0x00 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup.long c14:1018.++0x00 line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup.long c14:1019.++0x00 line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup.long c14:1012.++0x00 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup.long c14:1020.++0x00 line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup.long c14:1021.++0x00 line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup.long c14:1022.++0x00 line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup.long c14:1023.++0x00 line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 10. tree "Breakpoint Registers" if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+0.)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+1.)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+2.)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+3.)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+4.)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+5.)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" group.long c14:148.++0x0 line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" group.long c14:149.++0x0 line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" tree.end width 10. tree "Watchpoint Control Registers" group.long c14:(96.+0.)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+1.)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+2.)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+3.)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif tree.end width 0xb tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0x00A01000 tree "Distributor Interface" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x00A01000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x00A01000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x00A01000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0x00A01000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0x00A01000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x00A01000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0x00A02000 width 17. tree "CPU Interface" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0x00A02000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x00A02000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0x00A01000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0x00A04000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0x00A04000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x00A04000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x00A04000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x00A04000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0x00A06000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end AUTOINDENT.POP tree.end endif sif (cpu()!="IMX6SOLOLITE") tree.open "AIPSTZ (AHB to IP Bridge Trust Zone)" tree "AIPSTZ 1" base ad:0x02000000 width 8. group.long 0x00++0x03 line.long 0x00 "MPR,Master Privilege Register" bitfld.long 0x00 31. " MBW[0] ,Master 0 buffer writes" "Disabled,Enabled" bitfld.long 0x00 30. " MTR[0] ,Master 0 trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 29. " MTW[0] ,Master 0 trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 28. " MPL[0] ,Force accesses from master 0 to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 27. " MBW[1] ,ARM CORE master buffer writes" "Disabled,Enabled" bitfld.long 0x00 26. " MTR[1] ,ARM CORE master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 25. " MTW[1] ,ARM CORE master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 24. " MPL[1] ,Force accesses from ARM CORE master to user-mode" "Forced,Not forced" textline " " sif (!cpuis("IMX6SOLOLITE")) bitfld.long 0x00 23. " MBW[2] ,CAAM master buffer writes" "Disabled,Enabled" bitfld.long 0x00 22. " MTR[2] ,CAAM master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 21. " MTW[2] ,CAAM master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 20. " MPL[2] ,Force accesses from CAAM master to user-mode" "Forced,Not forced" textline " " endif bitfld.long 0x00 19. " MBW[3] ,SDMA master buffer writes" "Disabled,Enabled" bitfld.long 0x00 18. " MTR[3] ,SDMA master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 17. " MTW[3] ,SDMA master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 16. " MPL[3] ,Force accesses from SDMA master to user-mode" "Forced,Not forced" group.long 0x40++0x13 line.long 0x00 "OPACR0,Off-Platform Peripheral Access Control Register 0" bitfld.long 0x00 30. " SP0 ,PWM-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 29. " WP0 ,PWM-1 Write Protect" "Disabled,Enabled" bitfld.long 0x00 28. " TP0 ,PWM-1 Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 26. " SP1 ,PWM-2 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WP1 ,PWM-2 Write Protect" "Disabled,Enabled" bitfld.long 0x00 24. " TP1 ,PWM-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 22. " SP2 ,PWM-3 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 21. " WP2 ,PWM-3 Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " TP2 ,PWM-3 Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 18. " SP3 ,PWM-4 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 17. " WP3 ,PWM-4 Write Protect" "Disabled,Enabled" bitfld.long 0x00 16. " TP3 ,PWM-4 Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SP4 ,CAN-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 13. " WP4 ,CAN-1 Write Protect" "Disabled,Enabled" bitfld.long 0x00 12. " TP4 ,CAN-1 Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 10. " SP5 ,CAN-2 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " WP5 ,CAN-2 Write Protect" "Disabled,Enabled" bitfld.long 0x00 8. " TP5 ,CAN-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 6. " SP6 ,GPT Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 5. " WP6 ,GPT Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TP6 ,GPT Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 2. " SP7 ,GPIO-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 1. " WP7 ,GPIO-1 Write Protect" "Disabled,Enabled" bitfld.long 0x00 0. " TP7 ,GPIO-1 Trusted Protect" "Disabled,Enabled" line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Register 1" bitfld.long 0x04 30. " SP8 ,GPIO-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 29. " WP8 ,GPIO-2 Write Protect" "Disabled,Enabled" bitfld.long 0x04 28. " TP8 ,GPIO-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 26. " SP9 ,GPIO-3 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " WP9 ,GPIO-3 Write Protect" "Disabled,Enabled" bitfld.long 0x04 24. " TP9 ,GPIO-3 Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 22. " SP10 ,GPIO-4 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 21. " WP10 ,GPIO-4 Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " TP10 ,GPIO-4 Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 18. " SP11 ,GPIO-5 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 17. " WP11 ,GPIO-5 Write Protect" "Disabled,Enabled" bitfld.long 0x04 16. " TP11 ,GPIO-5 Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SP12 ,GPIO-6 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 13. " WP12 ,GPIO-6 Write Protect" "Disabled,Enabled" bitfld.long 0x04 12. " TP12 ,GPIO-6 Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 10. " SP13 ,GPIO-7 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " WP13 ,GPIO-7 Write Protect" "Disabled,Enabled" bitfld.long 0x04 8. " TP13 ,GPIO-7 Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 6. " SP14 ,KPP Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 5. " WP14 ,KPP Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TP14 ,KPP Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 2. " SP15 ,WDOG-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 1. " WP15 ,WDOG-1 Write Protect" "Disabled,Enabled" bitfld.long 0x04 0. " TP15 ,WDOG-1 Trusted Protect" "Disabled,Enabled" line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Register 2" bitfld.long 0x08 30. " SP16 ,WDOG-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 29. " WP16 ,WDOG-2 Write Protect" "Disabled,Enabled" bitfld.long 0x08 28. " TP16 ,WDOG-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 26. " SP17 ,CCM Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " WP17 ,CCM Write Protect" "Disabled,Enabled" bitfld.long 0x08 24. " TP17 ,CCM Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 22. " SP18 ,IP2APB_ANATOP Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 21. " WP18 ,IP2APB_ANATOP Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " TP18 ,IP2APB_ANATOP Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 18. " SP19 ,SNVS Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 17. " WP19 ,SNVS Write Protect" "Disabled,Enabled" bitfld.long 0x08 16. " TP19 ,SNVS Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " SP20 ,EPIT-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 13. " WP20 ,EPIT-1 Write Protect" "Disabled,Enabled" bitfld.long 0x08 12. " TP20 ,EPIT-1 Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 10. " SP21 ,EPIT-2 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " WP21 ,EPIT-2 Write Protect" "Disabled,Enabled" bitfld.long 0x08 8. " TP21 ,EPIT-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 6. " SP22 ,SRC Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 5. " WP22 ,SRC Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " TP22 ,SRC Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 2. " SP23 ,GPC Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 1. " WP23 ,GPC Write Protect" "Disabled,Enabled" bitfld.long 0x08 0. " TP23 ,GPC Trusted Protect" "Disabled,Enabled" line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Register 3" bitfld.long 0x0C 30. " SP24 ,IOMUXC Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 29. " WP24 ,IOMUXC Write Protect" "Disabled,Enabled" bitfld.long 0x0C 28. " TP24 ,IOMUXC Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 26. " SP25 ,DCIC-1 Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WP25 ,DCIC-1 Write Protect" "Disabled,Enabled" bitfld.long 0x0C 24. " TP25 ,DCIC-1 Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 22. " SP26 ,DCIC-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 21. " WP26 ,DCIC-2 Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TP26 ,DCIC-2 Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 18. " SP27 ,SDMA Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 17. " WP27 ,SDMA Write Protect" "Disabled,Enabled" bitfld.long 0x0C 16. " TP27 ,SDMA Trusted Protect" "Disabled,Enabled" line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Register 4" bitfld.long 0x10 30. " SP32 ,SPBA Supervisor Protect" "Disabled,Enabled" bitfld.long 0x10 29. " WP32 ,SPBA Write Protect" "Disabled,Enabled" bitfld.long 0x10 28. " TP32 ,SPBA Trusted Protect" "Disabled,Enabled" bitfld.long 0x10 26. " SP33 ,VPU Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " WP33 ,VPU Write Protect" "Disabled,Enabled" bitfld.long 0x10 24. " TP33 ,VPU Trusted Protect" "Disabled,Enabled" width 0x0B tree.end tree "AIPSTZ 2" base ad:0x02100000 width 8. group.long 0x00++0x3 line.long 0x00 "MPR0,Master Privilege Register 0" bitfld.long 0x00 31. " MBW[0] ,Master 0 buffer writes" "Disabled,Enabled" bitfld.long 0x00 30. " MTR[0] ,Master 0 trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 29. " MTW[0] ,Master 0 trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 28. " MPL[0] ,Force accesses from master 0 to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 27. " MBW[1] ,ARM CORE master buffer writes" "Disabled,Enabled" bitfld.long 0x00 26. " MTR[1] ,ARM CORE master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 25. " MTW[1] ,ARM CORE master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 24. " MPL[1] ,Force accesses from ARM CORE master to user-mode" "Forced,Not forced" textline " " sif (!cpuis("IMX6SOLOLITE")) bitfld.long 0x00 23. " MBW[2] ,CAAM master buffer writes" "Disabled,Enabled" bitfld.long 0x00 22. " MTR[2] ,CAAM master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 21. " MTW[2] ,CAAM master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 20. " MPL[2] ,Force accesses from CAAM master to user-mode" "Forced,Not forced" textline " " endif bitfld.long 0x00 19. " MBW[3] ,SDMA master buffer writes" "Disabled,Enabled" bitfld.long 0x00 18. " MTR[3] ,SDMA master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 17. " MTW[3] ,SDMA master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 16. " MPL[3] ,Force accesses from SDMA master to user-mode" "Forced,Not forced" group.long 0x40++0x13 line.long 0x00 "OPACR0,Off-Platform Peripheral Access Control Register 0" ; bitfld.long 0x00 31. " BW0 ,USBOH3 (port PL301) Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 30. " SP0 ,USBOH3 (port PL301) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 29. " WP0 ,USBOH3 (port PL301) Write Protect" "Disabled,Enabled" bitfld.long 0x00 28. " TP0 ,USBOH3 (port PL301) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 27. " BW1 ,USBOH3 (post USB core) Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 26. " SP1 ,USBOH3 (post USB core) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 25. " WP1 ,USBOH3 (post USB core) Write Protect" "Disabled,Enabled" bitfld.long 0x00 24. " TP1 ,USBOH3 (post USB core) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 23. " BW2 ,ENET Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 22. " SP2 ,ENET Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 21. " WP2 ,ENET Write Protect" "Disabled,Enabled" bitfld.long 0x00 20. " TP2 ,ENET Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 19. " BW3 ,MLB150 Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 18. " SP3 ,MLB150 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 17. " WP3 ,MLB150 Write Protect" "Disabled,Enabled" bitfld.long 0x00 16. " TP3 ,MLB150 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 15. " BW4 ,uSDHC-1 Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 14. " SP4 ,uSDHC-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 13. " WP4 ,uSDHC-1 Write Protect" "Disabled,Enabled" bitfld.long 0x00 12. " TP4 ,uSDHC-1 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 11. " BW5 ,uSDHC-2 Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 10. " SP5 ,uSDHC-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 9. " WP5 ,uSDHC-2 Write Protect" "Disabled,Enabled" bitfld.long 0x00 8. " TP5 ,uSDHC-2 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 7. " BW6 ,uSDHC-3 Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 6. " SP6 ,uSDHC-3 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 5. " WP6 ,uSDHC-3 Write Protect" "Disabled,Enabled" bitfld.long 0x00 4. " TP6 ,uSDHC-3 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x00 3. " BW7 ,uSDHC-4 Buffer Writes" "Disabled,Enabled" bitfld.long 0x00 2. " SP7 ,uSDHC-4 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 1. " WP7 ,uSDHC-4 Write Protect" "Disabled,Enabled" bitfld.long 0x00 0. " TP7 ,uSDHC-4 Trusted Protect" "Disabled,Enabled" line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Register 1" ; bitfld.long 0x04 31. " BW8 ,I2C-1 Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 30. " SP8 ,I2C-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 29. " WP8 ,I2C-1 Write Protect" "Disabled,Enabled" bitfld.long 0x04 28. " TP8 ,I2C-1 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 27. " BW9 ,I2C-2 Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 26. " SP9 ,I2C-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 25. " WP9 ,I2C-2 Write Protect" "Disabled,Enabled" bitfld.long 0x04 24. " TP9 ,I2C-2 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 23. " BW10 ,I2C-3 Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 22. " SP10 ,I2C-3 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 21. " WP10 ,I2C-3 Write Protect" "Disabled,Enabled" bitfld.long 0x04 20. " TP10 ,I2C-3 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 19. " BW11 ,ROMCP Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 18. " SP11 ,ROMCP Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 17. " WP11 ,ROMCP Write Protect" "Disabled,Enabled" bitfld.long 0x04 16. " TP11 ,ROMCP Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 15. " BW12 ,MMDC (port 0) Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 14. " SP12 ,MMDC (port 0) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 13. " WP12 ,MMDC (port 0) Write Protect" "Disabled,Enabled" bitfld.long 0x04 12. " TP12 ,MMDC (port 0) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 11. " BW13 ,MMDC (port 1) Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 10. " SP13 ,MMDC (port 1) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 9. " WP13 ,MMDC (port 1) Write Protect" "Disabled,Enabled" bitfld.long 0x04 8. " TP13 ,MMDC (port 1) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 7. " BW14 ,WEIM Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 6. " SP14 ,WEIM Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 5. " WP14 ,WEIM Write Protect" "Disabled,Enabled" bitfld.long 0x04 4. " TP14 ,WEIM Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x04 3. " BW15 ,OCOTP_CTRL Buffer Writes" "Disabled,Enabled" bitfld.long 0x04 2. " SP15 ,OCOTP_CTRL Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 1. " WP15 ,OCOTP_CTRL Write Protect" "Disabled,Enabled" bitfld.long 0x04 0. " TP15 ,OCOTP_CTRL Trusted Protect" "Disabled,Enabled" line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Register 2" ; bitfld.long 0x08 31. " BW16 ,CSU Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 30. " SP16 ,CSU Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 29. " WP16 ,CSU Write Protect" "Disabled,Enabled" bitfld.long 0x08 28. " TP16 ,CSU Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 27. " BW17 ,PERFMON-1 Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 26. " SP17 ,PERFMON-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 25. " WP17 ,PERFMON-1 Write Protect" "Disabled,Enabled" bitfld.long 0x08 24. " TP17 ,PERFMON-1 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 23. " BW18 ,PERFORM-2 Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 22. " SP18 ,PERFORM-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 21. " WP18 ,PERFORM-2 Write Protect" "Disabled,Enabled" bitfld.long 0x08 20. " TP18 ,PERFORM-2 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 19. " BW19 ,PERFORM-3 Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 18. " SP19 ,PERFORM-3 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 17. " WP19 ,PERFORM-3 Write Protect" "Disabled,Enabled" bitfld.long 0x08 16. " TP19 ,PERFORM-3 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 15. " BW20 ,TZASC-1 Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 14. " SP20 ,TZASC-1 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 13. " WP20 ,TZASC-1 Write Protect" "Disabled,Enabled" bitfld.long 0x08 12. " TP20 ,TZASC-1 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 11. " BW21 ,TZASC-2 Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 10. " SP21 ,TZASC-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 9. " WP21 ,TZASC-2 Write Protect" "Disabled,Enabled" bitfld.long 0x08 8. " TP21 ,TZASC-2 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 7. " BW22 ,AUDMUX Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 6. " SP22 ,AUDMUX Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 5. " WP22 ,AUDMUX Write Protect" "Disabled,Enabled" bitfld.long 0x08 4. " TP22 ,AUDMUX Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x08 3. " BW23 ,MIPI (port CSI) Buffer Writes" "Disabled,Enabled" bitfld.long 0x08 2. " SP23 ,MIPI (port CSI) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 1. " WP23 ,MIPI (port CSI) Write Protect" "Disabled,Enabled" bitfld.long 0x08 0. " TP23 ,MIPI (port CSI) Trusted Protect" "Disabled,Enabled" line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Register 3" ; bitfld.long 0x0C 31. " BW24 ,MIPI (DSI Port) Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 30. " SP24 ,MIPI (DSI Port) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 29. " WP24 ,MIPI (DSI Port) Write Protect" "Disabled,Enabled" bitfld.long 0x0C 28. " TP24 ,MIPI (DSI Port) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x0C 27. " BW25 ,VDOA (via IPSYNC) Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 26. " SP25 ,VDOA (via IPSYNC) Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 25. " WP25 ,VDOA (via IPSYNC) Write Protect" "Disabled,Enabled" bitfld.long 0x0C 24. " TP25 ,VDOA (via IPSYNC) Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x0C 23. " BW26 ,UART-2 Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 22. " SP26 ,UART-2 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 21. " WP26 ,UART-2 Write Protect" "Disabled,Enabled" bitfld.long 0x0C 20. " TP26 ,UART-2 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x0C 19. " BW27 ,UART-3 Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 18. " SP27 ,UART-3 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 17. " WP27 ,UART-3 Write Protect" "Disabled,Enabled" bitfld.long 0x0C 16. " TP27 ,UART-3 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x0C 15. " BW28 ,UART-4 Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 14. " SP28 ,UART-4 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 13. " WP28 ,UART-4 Write Protect" "Disabled,Enabled" bitfld.long 0x0C 12. " TP28 ,UART-4 Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x0C 11. " BW29 ,UART-5 Buffer Writes" "Disabled,Enabled" bitfld.long 0x0C 10. " SP29 ,UART-5 Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 9. " WP29 ,UART-5 Write Protect" "Disabled,Enabled" bitfld.long 0x0C 8. " TP29 ,UART-5 Trusted Protect" "Disabled,Enabled" line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Register 4" ; bitfld.long 0x10 31. " BW32 ,CAAM Buffer Writes" "Disabled,Enabled" bitfld.long 0x10 30. " SP32 ,CAAM Supervisor Protect" "Disabled,Enabled" bitfld.long 0x10 29. " WP32 ,CAAM Write Protect" "Disabled,Enabled" bitfld.long 0x10 28. " TP32 ,CAAM Trusted Protect" "Disabled,Enabled" textline " " ; bitfld.long 0x10 27. " BW33 ,ARM Platform Buffer Writes" "Disabled,Enabled" bitfld.long 0x10 26. " SP33 ,ARM Platform Supervisor Protect" "Disabled,Enabled" bitfld.long 0x10 25. " WP33 ,ARM Platform Write Protect" "Disabled,Enabled" bitfld.long 0x10 24. " TP33 ,ARM Platform Trusted Protect" "Disabled,Enabled" width 0x0B tree.end tree.end else tree.open "AIPSTZ (AHB to IP Bridge Trust Zone)" tree "AIPSTZ 1" base ad:0x0207C000 width 8. group.long 0x00++0x03 line.long 0x00 "MPR,Master Privilege Register" bitfld.long 0x00 31. " MBW[0] ,Master 0 buffer writes" "Disabled,Enabled" bitfld.long 0x00 30. " MTR[0] ,Master 0 trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 29. " MTW[0] ,Master 0 trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 28. " MPL[0] ,Force accesses from master 0 to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 27. " MBW[1] ,ARM CORE master buffer writes" "Disabled,Enabled" bitfld.long 0x00 26. " MTR[1] ,ARM CORE master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 25. " MTW[1] ,ARM CORE master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 24. " MPL[1] ,Force accesses from ARM CORE master to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 19. " MBW[3] ,SDMA master buffer writes" "Disabled,Enabled" bitfld.long 0x00 18. " MTR[3] ,SDMA master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 17. " MTW[3] ,SDMA master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 16. " MPL[3] ,Force accesses from SDMA master to user-mode" "Forced,Not forced" group.long 0x40++0x13 line.long 0x00 "OPACR0,Off-Platform Peripheral Access Control Register 0" bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 29. " WP0 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WP1 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 21. " WP2 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 17. " WP3 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 13. " WP4 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " WP5 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 5. " WP6 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 1. " WP7 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Disabled,Enabled" line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Register 1" bitfld.long 0x04 30. " SP8 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 29. " WP8 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 28. " TP8 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 26. " SP9 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " WP9 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 24. " TP9 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 22. " SP10 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 21. " WP10 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " TP10 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 18. " SP11 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 17. " WP11 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 16. " TP11 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SP12 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 13. " WP12 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 12. " TP12 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 10. " SP13 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " WP13 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 8. " TP13 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 6. " SP14 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 5. " WP14 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TP14 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 2. " SP15 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 1. " WP15 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 0. " TP15 ,Trusted Protect" "Disabled,Enabled" line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Register 2" bitfld.long 0x08 30. " SP16 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 29. " WP16 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 28. " TP16 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 26. " SP17 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " WP17 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 24. " TP17 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 22. " SP18 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 21. " WP18 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " TP18 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 18. " SP19 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 17. " WP19 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 16. " TP19 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " SP20 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 13. " WP20 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 12. " TP20 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 10. " SP21 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " WP21 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 8. " TP21 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 6. " SP22 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 5. " WP22 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " TP22 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 2. " SP23 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 1. " WP23 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 0. " TP23 ,Trusted Protect" "Disabled,Enabled" line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Register 3" bitfld.long 0x0C 30. " SP24 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 29. " WP24 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 28. " TP24 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 26. " SP25 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WP25 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 24. " TP25 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 22. " SP26 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 21. " WP26 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TP26 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 18. " SP27 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 17. " WP27 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 16. " TP27 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 14. " SP28 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 13. " WP28 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 12. " TP28 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 10. " SP29 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " WP29 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 8. " TP29 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 6. " SP30 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 5. " WP30 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " T30 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 2. " SP31 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 1. " WP31 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 0. " TP31 ,Trusted Protect" "Disabled,Enabled" line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Register 4" bitfld.long 0x10 30. " SP32 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x10 29. " WP32 ,Write Protect" "Disabled,Enabled" bitfld.long 0x10 28. " TP32 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x10 26. " SP33 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " WP33 ,Write Protect" "Disabled,Enabled" bitfld.long 0x10 24. " TP33 ,Trusted Protect" "Disabled,Enabled" width 0x0B tree.end tree "AIPSTZ 2" base ad:0x0217C000 width 8. group.long 0x00++0x03 line.long 0x00 "MPR,Master Privilege Register" bitfld.long 0x00 31. " MBW[0] ,Master 0 buffer writes" "Disabled,Enabled" bitfld.long 0x00 30. " MTR[0] ,Master 0 trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 29. " MTW[0] ,Master 0 trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 28. " MPL[0] ,Force accesses from master 0 to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 27. " MBW[1] ,ARM CORE master buffer writes" "Disabled,Enabled" bitfld.long 0x00 26. " MTR[1] ,ARM CORE master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 25. " MTW[1] ,ARM CORE master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 24. " MPL[1] ,Force accesses from ARM CORE master to user-mode" "Forced,Not forced" textline " " bitfld.long 0x00 19. " MBW[3] ,SDMA master buffer writes" "Disabled,Enabled" bitfld.long 0x00 18. " MTR[3] ,SDMA master trusted for reads" "Not trusted,Trusted" bitfld.long 0x00 17. " MTW[3] ,SDMA master trusted for writes" "Not trusted,Trusted" bitfld.long 0x00 16. " MPL[3] ,Force accesses from SDMA master to user-mode" "Forced,Not forced" group.long 0x40++0x13 line.long 0x00 "OPACR0,Off-Platform Peripheral Access Control Register 0" bitfld.long 0x00 30. " SP0 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 29. " WP0 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 28. " TP0 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 26. " SP1 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WP1 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 24. " TP1 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 22. " SP2 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 21. " WP2 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " TP2 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 18. " SP3 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 17. " WP3 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 16. " TP3 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SP4 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 13. " WP4 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 12. " TP4 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 10. " SP5 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " WP5 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 8. " TP5 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 6. " SP6 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 5. " WP6 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TP6 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x00 2. " SP7 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x00 1. " WP7 ,Write Protect" "Disabled,Enabled" bitfld.long 0x00 0. " TP7 ,Trusted Protect" "Disabled,Enabled" line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Register 1" bitfld.long 0x04 30. " SP8 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 29. " WP8 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 28. " TP8 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 26. " SP9 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " WP9 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 24. " TP9 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 22. " SP10 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 21. " WP10 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " TP10 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 18. " SP11 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 17. " WP11 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 16. " TP11 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SP12 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 13. " WP12 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 12. " TP12 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 10. " SP13 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " WP13 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 8. " TP13 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 6. " SP14 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 5. " WP14 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TP14 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x04 2. " SP15 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x04 1. " WP15 ,Write Protect" "Disabled,Enabled" bitfld.long 0x04 0. " TP15 ,Trusted Protect" "Disabled,Enabled" line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Register 2" bitfld.long 0x08 30. " SP16 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 29. " WP16 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 28. " TP16 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 26. " SP17 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " WP17 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 24. " TP17 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 22. " SP18 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 21. " WP18 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " TP18 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 18. " SP19 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 17. " WP19 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 16. " TP19 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " SP20 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 13. " WP20 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 12. " TP20 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 10. " SP21 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " WP21 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 8. " TP21 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 6. " SP22 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 5. " WP22 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " TP22 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x08 2. " SP23 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x08 1. " WP23 ,Write Protect" "Disabled,Enabled" bitfld.long 0x08 0. " TP23 ,Trusted Protect" "Disabled,Enabled" line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Register 3" bitfld.long 0x0C 30. " SP24 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 29. " WP24 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 28. " TP24 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 26. " SP25 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " WP25 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 24. " TP25 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 22. " SP26 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 21. " WP26 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TP26 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 18. " SP27 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 17. " WP27 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 16. " TP27 ,Trusted Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 14. " SP28 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 13. " WP28 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 12. " TP28 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 10. " SP29 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " WP29 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 8. " TP29 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 6. " SP30 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 5. " WP30 ,Write Protect" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " T30 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x0C 2. " SP31 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x0C 1. " WP31 ,Write Protect" "Disabled,Enabled" bitfld.long 0x0C 0. " TP31 ,Trusted Protect" "Disabled,Enabled" line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Register 4" bitfld.long 0x10 30. " SP32 ,Supervisor Protect" "Disabled,Enabled" bitfld.long 0x10 29. " WP32 ,Write Protect" "Disabled,Enabled" bitfld.long 0x10 28. " TP32 ,Trusted Protect" "Disabled,Enabled" bitfld.long 0x10 26. " SP33 ,Supervisor Protect" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " WP33 ,Write Protect" "Disabled,Enabled" bitfld.long 0x10 24. " TP33 ,Trusted Protect" "Disabled,Enabled" width 0x0B tree.end tree.end endif sif (cpu()!="IMX6SOLOLITE") tree "AABD (AHB-to-APBH Bridge with DMA)" base ad:0x00110000 width 19. group.long 0x00++0x3F line.long 0x00 "HW_APBH_CTRL0,AHB to APBH Bridge Control and Status Register 0" bitfld.long 0x00 31. " SFTRST ,APBH DMA clocking disable" "No,Yes" bitfld.long 0x00 30. " CLKGATE ,Clock gate" "Not gated,Gated" bitfld.long 0x00 29. " AHB_BURST8_EN ,AHB 8-bit burst enable" "Disabled,Enabled" bitfld.long 0x00 28. " APB_BURST_EN ,APB burst enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " CLKGATE_CHANNEL ,Clock gate channel" line.long 0x04 "HW_APBH_CTRL0_SET,AHB to APBH Bridge Control and Status Register 0 Set" bitfld.long 0x04 31. " SFTRST ,APBH DMA clocking disable set" "No effect,Set" bitfld.long 0x04 30. " CLKGATE ,Clock gate set" "No effect,Set" bitfld.long 0x04 29. " AHB_BURST8_EN ,AHB 8-bit burst set" "No effect,Set" bitfld.long 0x04 28. " APB_BURST_EN ,APB burst set" "No effect,Set" line.long 0x08 "HW_APBH_CTRL0_CLR,AHB to APBH Bridge Control and Status Register 0 Clear" bitfld.long 0x08 31. " SFTRST ,APBH DMA clocking disable clear" "No effect,Clear" bitfld.long 0x08 30. " CLKGATE ,Clock gate clear" "No effect,Clear" bitfld.long 0x08 29. " AHB_BURST8_EN ,AHB 8-bit burst clear" "No effect,Clear" bitfld.long 0x08 28. " APB_BURST_EN ,APB burst clear" "No effect,Clear" line.long 0x0C "HW_APBH_CTRL0_TOG,AHB to APBH Bridge Control and Status Register 0 Toggle" bitfld.long 0x0C 31. " SFTRST ,APBH DMA clocking disable toggle" "Not toggled,Toggled" bitfld.long 0x0C 30. " CLKGATE ,Clock gate toggle" "Not toggled,Toggled" bitfld.long 0x0C 29. " AHB_BURST8_EN ,AHB 8-bit burst toggle" "Not toggled,Toggled" bitfld.long 0x0C 28. " APB_BURST_EN ,APB burst toggle" "Not toggled,Toggled" textline " " line.long 0x10 "HW_APBH_CTRL1,AHB to APBH Bridge Control and Status Register 1" bitfld.long 0x10 31. " CH15_CMDCMPLT_IRQ_EN ,APBH DMA channel 15 enable" "Disabled,Enabled" bitfld.long 0x10 30. " CH14_CMDCMPLT_IRQ_EN ,APBH DMA channel 14 enable" "Disabled,Enabled" bitfld.long 0x10 29. " CH13_CMDCMPLT_IRQ_EN ,APBH DMA channel 13 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " CH12_CMDCMPLT_IRQ_EN ,APBH DMA channel 12 enable" "Disabled,Enabled" bitfld.long 0x10 27. " CH11_CMDCMPLT_IRQ_EN ,APBH DMA channel 11 enable" "Disabled,Enabled" bitfld.long 0x10 26. " CH10_CMDCMPLT_IRQ_EN ,APBH DMA channel 10 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " CH9_CMDCMPLT_IRQ_EN ,APBH DMA channel 9 enable" "Disabled,Enabled" bitfld.long 0x10 24. " CH8_CMDCMPLT_IRQ_EN ,APBH DMA channel 8 enable" "Disabled,Enabled" bitfld.long 0x10 23. " CH7_CMDCMPLT_IRQ_EN ,APBH DMA channel 7 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " CH6_CMDCMPLT_IRQ_EN ,APBH DMA channel 6 enable" "Disabled,Enabled" bitfld.long 0x10 21. " CH5_CMDCMPLT_IRQ_EN ,APBH DMA channel 5 enable" "Disabled,Enabled" bitfld.long 0x10 20. " CH4_CMDCMPLT_IRQ_EN ,APBH DMA channel 4 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " CH3_CMDCMPLT_IRQ_EN ,APBH DMA channel 3 enable" "Disabled,Enabled" bitfld.long 0x10 18. " CH2_CMDCMPLT_IRQ_EN ,APBH DMA channel 2 enable" "Disabled,Enabled" bitfld.long 0x10 17. " CH1_CMDCMPLT_IRQ_EN ,APBH DMA channel 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " CH0_CMDCMPLT_IRQ_EN ,APBH DMA channel 0 enable" "Disabled,Enabled" bitfld.long 0x10 15. " CH15_CMDCMPLT_IRQ ,Interrupt 15 request status" "No interrupt,Interrupt" bitfld.long 0x10 14. " CH14_CMDCMPLT_IRQ ,Interrupt 14 request status" "No interrupt,Interrupt" textline " " bitfld.long 0x10 13. " CH13_CMDCMPLT_IRQ ,Interrupt 13 request status" "No interrupt,Interrupt" bitfld.long 0x10 12. " CH12_CMDCMPLT_IRQ ,Interrupt 12 request status" "No interrupt,Interrupt" bitfld.long 0x10 11. " CH11_CMDCMPLT_IRQ ,Interrupt 11 request status" "No interrupt,Interrupt" textline " " bitfld.long 0x10 10. " CH10_CMDCMPLT_IRQ ,Interrupt 10 request status" "No interrupt,Interrupt" bitfld.long 0x10 9. " CH9_CMDCMPLT_IRQ ,Interrupt 9 request status" "No interrupt,Interrupt" bitfld.long 0x10 8. " CH8_CMDCMPLT_IRQ ,Interrupt 8 request status" "No interrupt,Interrupt" textline " " bitfld.long 0x10 7. " CH7_CMDCMPLT_IRQ ,Interrupt 7 request status" "No interrupt,Interrupt" bitfld.long 0x10 6. " CH6_CMDCMPLT_IRQ ,Interrupt 6 request status" "No interrupt,Interrupt" bitfld.long 0x10 5. " CH5_CMDCMPLT_IRQ ,Interrupt 5 request status" "No interrupt,Interrupt" textline " " bitfld.long 0x10 4. " CH4_CMDCMPLT_IRQ ,Interrupt 4 request status" "No interrupt,Interrupt" bitfld.long 0x10 3. " CH3_CMDCMPLT_IRQ ,Interrupt 3 request status" "No interrupt,Interrupt" bitfld.long 0x10 2. " CH2_CMDCMPLT_IRQ ,Interrupt 2 request status" "No interrupt,Interrupt" textline " " bitfld.long 0x10 1. " CH1_CMDCMPLT_IRQ ,Interrupt 1 request status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CH0_CMDCMPLT_IRQ ,Interrupt 0 request status" "No interrupt,Interrupt" line.long 0x14 "HW_APBH_CTRL1_SET,AHB to APBH Bridge Control and Status Register 1 Set" bitfld.long 0x14 31. " CH15_CMDCMPLT_IRQ_EN ,APBH DMA channel 15 set" "No effect,Set" bitfld.long 0x14 30. " CH14_CMDCMPLT_IRQ_EN ,APBH DMA channel 14 set" "No effect,Set" bitfld.long 0x14 29. " CH13_CMDCMPLT_IRQ_EN ,APBH DMA channel 13 set" "No effect,Set" textline " " bitfld.long 0x14 28. " CH12_CMDCMPLT_IRQ_EN ,APBH DMA channel 12 set" "No effect,Set" bitfld.long 0x14 27. " CH11_CMDCMPLT_IRQ_EN ,APBH DMA channel 11 set" "No effect,Set" bitfld.long 0x14 26. " CH10_CMDCMPLT_IRQ_EN ,APBH DMA channel 10 set" "No effect,Set" textline " " bitfld.long 0x14 25. " CH9_CMDCMPLT_IRQ_EN ,APBH DMA channel 9 set" "No effect,Set" bitfld.long 0x14 24. " CH8_CMDCMPLT_IRQ_EN ,APBH DMA channel 8 set" "No effect,Set" bitfld.long 0x14 23. " CH7_CMDCMPLT_IRQ_EN ,APBH DMA channel 7 set" "No effect,Set" textline " " bitfld.long 0x14 22. " CH6_CMDCMPLT_IRQ_EN ,APBH DMA channel 6 set" "No effect,Set" bitfld.long 0x14 21. " CH5_CMDCMPLT_IRQ_EN ,APBH DMA channel 5 set" "No effect,Set" bitfld.long 0x14 20. " CH4_CMDCMPLT_IRQ_EN ,APBH DMA channel 4 set" "No effect,Set" textline " " bitfld.long 0x14 19. " CH3_CMDCMPLT_IRQ_EN ,APBH DMA channel 3 set" "No effect,Set" bitfld.long 0x14 18. " CH2_CMDCMPLT_IRQ_EN ,APBH DMA channel 2 set" "No effect,Set" bitfld.long 0x14 17. " CH1_CMDCMPLT_IRQ_EN ,APBH DMA channel 1 set" "No effect,Set" textline " " bitfld.long 0x14 16. " CH0_CMDCMPLT_IRQ_EN ,APBH DMA channel 0 set" "No effect,Set" bitfld.long 0x14 15. " CH15_CMDCMPLT_IRQ ,Interrupt 15 request status" "No effect,Set" bitfld.long 0x14 14. " CH14_CMDCMPLT_IRQ ,Interrupt 14 request status" "No effect,Set" textline " " bitfld.long 0x14 13. " CH13_CMDCMPLT_IRQ ,Interrupt 13 request status" "No effect,Set" bitfld.long 0x14 12. " CH12_CMDCMPLT_IRQ ,Interrupt 12 request status" "No effect,Set" bitfld.long 0x14 11. " CH11_CMDCMPLT_IRQ ,Interrupt 11 request status" "No effect,Set" textline " " bitfld.long 0x14 10. " CH10_CMDCMPLT_IRQ ,Interrupt 10 request status" "No effect,Set" bitfld.long 0x14 9. " CH9_CMDCMPLT_IRQ ,Interrupt 9 request status" "No effect,Set" bitfld.long 0x14 8. " CH8_CMDCMPLT_IRQ ,Interrupt 8 request status" "No effect,Set" textline " " bitfld.long 0x14 7. " CH7_CMDCMPLT_IRQ ,Interrupt 7 request status" "No effect,Set" bitfld.long 0x14 6. " CH6_CMDCMPLT_IRQ ,Interrupt 6 request status" "No effect,Set" bitfld.long 0x14 5. " CH5_CMDCMPLT_IRQ ,Interrupt 5 request status" "No effect,Set" textline " " bitfld.long 0x14 4. " CH4_CMDCMPLT_IRQ ,Interrupt 4 request status" "No effect,Set" bitfld.long 0x14 3. " CH3_CMDCMPLT_IRQ ,Interrupt 3 request status" "No effect,Set" bitfld.long 0x14 2. " CH2_CMDCMPLT_IRQ ,Interrupt 2 request status" "No effect,Set" textline " " bitfld.long 0x14 1. " CH1_CMDCMPLT_IRQ ,Interrupt 1 request status" "No effect,Set" bitfld.long 0x14 0. " CH0_CMDCMPLT_IRQ ,Interrupt 0 request status" "No effect,Set" line.long 0x18 "HW_APBH_CTRL1_CLR,AHB to APBH Bridge Control and Status Register 1 Clear" bitfld.long 0x18 31. " CH15_CMDCMPLT_IRQ_EN ,APBH DMA channel 15 clear" "No effect,Clear" bitfld.long 0x18 30. " CH14_CMDCMPLT_IRQ_EN ,APBH DMA channel 14 clear" "No effect,Clear" bitfld.long 0x18 29. " CH13_CMDCMPLT_IRQ_EN ,APBH DMA channel 13 clear" "No effect,Clear" textline " " bitfld.long 0x18 28. " CH12_CMDCMPLT_IRQ_EN ,APBH DMA channel 12 clear" "No effect,Clear" bitfld.long 0x18 27. " CH11_CMDCMPLT_IRQ_EN ,APBH DMA channel 11 clear" "No effect,Clear" bitfld.long 0x18 26. " CH10_CMDCMPLT_IRQ_EN ,APBH DMA channel 10 clear" "No effect,Clear" textline " " bitfld.long 0x18 25. " CH9_CMDCMPLT_IRQ_EN ,APBH DMA channel 9 clear" "No effect,Clear" bitfld.long 0x18 24. " CH8_CMDCMPLT_IRQ_EN ,APBH DMA channel 8 clear" "No effect,Clear" bitfld.long 0x18 23. " CH7_CMDCMPLT_IRQ_EN ,APBH DMA channel 7 clear" "No effect,Clear" textline " " bitfld.long 0x18 22. " CH6_CMDCMPLT_IRQ_EN ,APBH DMA channel 6 clear" "No effect,Clear" bitfld.long 0x18 21. " CH5_CMDCMPLT_IRQ_EN ,APBH DMA channel 5 clear" "No effect,Clear" bitfld.long 0x18 20. " CH4_CMDCMPLT_IRQ_EN ,APBH DMA channel 4 clear" "No effect,Clear" textline " " bitfld.long 0x18 19. " CH3_CMDCMPLT_IRQ_EN ,APBH DMA channel 3 clear" "No effect,Clear" bitfld.long 0x18 18. " CH2_CMDCMPLT_IRQ_EN ,APBH DMA channel 2 clear" "No effect,Clear" bitfld.long 0x18 17. " CH1_CMDCMPLT_IRQ_EN ,APBH DMA channel 1 clear" "No effect,Clear" textline " " bitfld.long 0x18 16. " CH0_CMDCMPLT_IRQ_EN ,APBH DMA channel 0 clear" "No effect,Clear" bitfld.long 0x18 15. " CH15_CMDCMPLT_IRQ ,Interrupt 15 request status" "No effect,Clear" bitfld.long 0x18 14. " CH14_CMDCMPLT_IRQ ,Interrupt 14 request status" "No effect,Clear" textline " " bitfld.long 0x18 13. " CH13_CMDCMPLT_IRQ ,Interrupt 13 request status" "No effect,Clear" bitfld.long 0x18 12. " CH12_CMDCMPLT_IRQ ,Interrupt 12 request status" "No effect,Clear" bitfld.long 0x18 11. " CH11_CMDCMPLT_IRQ ,Interrupt 11 request status" "No effect,Clear" textline " " bitfld.long 0x18 10. " CH10_CMDCMPLT_IRQ ,Interrupt 10 request status" "No effect,Clear" bitfld.long 0x18 9. " CH9_CMDCMPLT_IRQ ,Interrupt 9 request status" "No effect,Clear" bitfld.long 0x18 8. " CH8_CMDCMPLT_IRQ ,Interrupt 8 request status" "No effect,Clear" textline " " bitfld.long 0x18 7. " CH7_CMDCMPLT_IRQ ,Interrupt 7 request status" "No effect,Clear" bitfld.long 0x18 6. " CH6_CMDCMPLT_IRQ ,Interrupt 6 request status" "No effect,Clear" bitfld.long 0x18 5. " CH5_CMDCMPLT_IRQ ,Interrupt 5 request status" "No effect,Clear" textline " " bitfld.long 0x18 4. " CH4_CMDCMPLT_IRQ ,Interrupt 4 request status" "No effect,Clear" bitfld.long 0x18 3. " CH3_CMDCMPLT_IRQ ,Interrupt 3 request status" "No effect,Clear" bitfld.long 0x18 2. " CH2_CMDCMPLT_IRQ ,Interrupt 2 request status" "No effect,Clear" textline " " bitfld.long 0x18 1. " CH1_CMDCMPLT_IRQ ,Interrupt 1 request status" "No effect,Clear" bitfld.long 0x18 0. " CH0_CMDCMPLT_IRQ ,Interrupt 0 request status" "No effect,Clear" line.long 0x1C "HW_APBH_CTRL1_TOG,AHB to APBH Bridge Control and Status Register 1 Toggle" bitfld.long 0x1C 31. " CH15_CMDCMPLT_IRQ_EN ,APBH DMA channel 15 toggle" "Not toggled,Toggled" bitfld.long 0x1C 30. " CH14_CMDCMPLT_IRQ_EN ,APBH DMA channel 14 toggle" "Not toggled,Toggled" bitfld.long 0x1C 29. " CH13_CMDCMPLT_IRQ_EN ,APBH DMA channel 13 toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 28. " CH12_CMDCMPLT_IRQ_EN ,APBH DMA channel 12 toggle" "Not toggled,Toggled" bitfld.long 0x1C 27. " CH11_CMDCMPLT_IRQ_EN ,APBH DMA channel 11 toggle" "Not toggled,Toggled" bitfld.long 0x1C 26. " CH10_CMDCMPLT_IRQ_EN ,APBH DMA channel 10 toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 25. " CH9_CMDCMPLT_IRQ_EN ,APBH DMA channel 9 toggle" "Not toggled,Toggled" bitfld.long 0x1C 24. " CH8_CMDCMPLT_IRQ_EN ,APBH DMA channel 8 toggle" "Not toggled,Toggled" bitfld.long 0x1C 23. " CH7_CMDCMPLT_IRQ_EN ,APBH DMA channel 7 toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 22. " CH6_CMDCMPLT_IRQ_EN ,APBH DMA channel 6 toggle" "Not toggled,Toggled" bitfld.long 0x1C 21. " CH5_CMDCMPLT_IRQ_EN ,APBH DMA channel 5 toggle" "Not toggled,Toggled" bitfld.long 0x1C 20. " CH4_CMDCMPLT_IRQ_EN ,APBH DMA channel 4 toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 19. " CH3_CMDCMPLT_IRQ_EN ,APBH DMA channel 3 toggle" "Not toggled,Toggled" bitfld.long 0x1C 18. " CH2_CMDCMPLT_IRQ_EN ,APBH DMA channel 2 toggle" "Not toggled,Toggled" bitfld.long 0x1C 17. " CH1_CMDCMPLT_IRQ_EN ,APBH DMA channel 1 toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 16. " CH0_CMDCMPLT_IRQ_EN ,APBH DMA channel 0 toggle" "Not toggled,Toggled" bitfld.long 0x1C 15. " CH15_CMDCMPLT_IRQ ,Interrupt 15 request status" "Not toggled,Toggled" bitfld.long 0x1C 14. " CH14_CMDCMPLT_IRQ ,Interrupt 14 request status" "Not toggled,Toggled" textline " " bitfld.long 0x1C 13. " CH13_CMDCMPLT_IRQ ,Interrupt 13 request status" "Not toggled,Toggled" bitfld.long 0x1C 12. " CH12_CMDCMPLT_IRQ ,Interrupt 12 request status" "Not toggled,Toggled" bitfld.long 0x1C 11. " CH11_CMDCMPLT_IRQ ,Interrupt 11 request status" "Not toggled,Toggled" textline " " bitfld.long 0x1C 10. " CH10_CMDCMPLT_IRQ ,Interrupt 10 request status" "Not toggled,Toggled" bitfld.long 0x1C 9. " CH9_CMDCMPLT_IRQ ,Interrupt 9 request status" "Not toggled,Toggled" bitfld.long 0x1C 8. " CH8_CMDCMPLT_IRQ ,Interrupt 8 request status" "Not toggled,Toggled" textline " " bitfld.long 0x1C 7. " CH7_CMDCMPLT_IRQ ,Interrupt 7 request status" "Not toggled,Toggled" bitfld.long 0x1C 6. " CH6_CMDCMPLT_IRQ ,Interrupt 6 request status" "Not toggled,Toggled" bitfld.long 0x1C 5. " CH5_CMDCMPLT_IRQ ,Interrupt 5 request status" "Not toggled,Toggled" textline " " bitfld.long 0x1C 4. " CH4_CMDCMPLT_IRQ ,Interrupt 4 request status" "Not toggled,Toggled" bitfld.long 0x1C 3. " CH3_CMDCMPLT_IRQ ,Interrupt 3 request status" "Not toggled,Toggled" bitfld.long 0x1C 2. " CH2_CMDCMPLT_IRQ ,Interrupt 2 request status" "Not toggled,Toggled" textline " " bitfld.long 0x1C 1. " CH1_CMDCMPLT_IRQ ,Interrupt 1 request status" "Not toggled,Toggled" bitfld.long 0x1C 0. " CH0_CMDCMPLT_IRQ ,Interrupt 0 request status" "Not toggled,Toggled" line.long 0x20 "HW_APBH_CTRL2,AHB to APBH Bridge Control and Status Register 2" bitfld.long 0x20 31. " CH15_ERROR_STATUS ,APBH DMA Channel 15 error status" "Early termination,AHB bus error" bitfld.long 0x20 30. " CH14_ERROR_STATUS ,APBH DMA Channel 14 error status" "Early termination,AHB bus error" bitfld.long 0x20 29. " CH13_ERROR_STATUS ,APBH DMA Channel 13 error status" "Early termination,AHB bus error" textline " " bitfld.long 0x20 28. " CH12_ERROR_STATUS ,APBH DMA Channel 12 error status" "Early termination,AHB bus error" bitfld.long 0x20 27. " CH11_ERROR_STATUS ,APBH DMA Channel 11 error status" "Early termination,AHB bus error" bitfld.long 0x20 26. " CH10_ERROR_STATUS ,APBH DMA Channel 10 error status" "Early termination,AHB bus error" textline " " bitfld.long 0x20 25. " CH9_ERROR_STATUS ,APBH DMA Channel 9 error status" "Early termination,AHB bus error" bitfld.long 0x20 24. " CH8_ERROR_STATUS ,APBH DMA Channel 8 error status" "Early termination,AHB bus error" bitfld.long 0x20 23. " CH7_ERROR_STATUS ,APBH DMA Channel 7 error status" "Early termination,AHB bus error" textline " " bitfld.long 0x20 22. " CH6_ERROR_STATUS ,APBH DMA Channel 6 error status" "Early termination,AHB bus error" bitfld.long 0x20 21. " CH5_ERROR_STATUS ,APBH DMA Channel 5 error status" "Early termination,AHB bus error" bitfld.long 0x20 20. " CH4_ERROR_STATUS ,APBH DMA Channel 4 error status" "Early termination,AHB bus error" textline " " bitfld.long 0x20 19. " CH3_ERROR_STATUS ,APBH DMA Channel 3 error status" "Early termination,AHB bus error" bitfld.long 0x20 18. " CH2_ERROR_STATUS ,APBH DMA Channel 2 error status" "Early termination,AHB bus error" bitfld.long 0x20 17. " CH1_ERROR_STATUS ,APBH DMA Channel 1 error status" "Early termination,AHB bus error" textline " " bitfld.long 0x20 16. " CH0_ERROR_STATUS ,APBH DMA Channel 0 error status" "Early termination,AHB bus error" bitfld.long 0x20 15. " CH15_ERROR_IRQ ,Error interrupt 15 status" "No interrupt,Interrupt" bitfld.long 0x20 14. " CH14_ERROR_IRQ ,Error interrupt 14 status" "No interrupt,Interrupt" textline " " bitfld.long 0x20 13. " CH13_ERROR_IRQ ,Error interrupt 13 status" "No interrupt,Interrupt" bitfld.long 0x20 12. " CH12_ERROR_IRQ ,Error interrupt 12 status" "No interrupt,Interrupt" bitfld.long 0x20 11. " CH11_ERROR_IRQ ,Error interrupt 11 status" "No interrupt,Interrupt" textline " " bitfld.long 0x20 10. " CH10_ERROR_IRQ ,Error interrupt 10 status" "No interrupt,Interrupt" bitfld.long 0x20 9. " CH9_ERROR_IRQ ,Error interrupt 9 status" "No interrupt,Interrupt" bitfld.long 0x20 8. " CH8_ERROR_IRQ ,Error interrupt 8 status" "No interrupt,Interrupt" textline " " bitfld.long 0x20 7. " CH7_ERROR_IRQ ,Error interrupt 7 status" "No interrupt,Interrupt" bitfld.long 0x20 6. " CH6_ERROR_IRQ ,Error interrupt 6 status" "No interrupt,Interrupt" bitfld.long 0x20 5. " CH5_ERROR_IRQ ,Error interrupt 5 status" "No interrupt,Interrupt" textline " " bitfld.long 0x20 4. " CH4_ERROR_IRQ ,Error interrupt 4 status" "No interrupt,Interrupt" bitfld.long 0x20 3. " CH3_ERROR_IRQ ,Error interrupt 3 status" "No interrupt,Interrupt" bitfld.long 0x20 2. " CH2_ERROR_IRQ ,Error interrupt 2 status" "No interrupt,Interrupt" textline " " bitfld.long 0x20 1. " CH1_ERROR_IRQ ,Error interrupt 1 status" "No interrupt,Interrupt" bitfld.long 0x20 0. " CH0_ERROR_IRQ ,Error interrupt 0 status" "No interrupt,Interrupt" line.long 0x24 "HW_APBH_CTRL2_SET,AHB to APBH Bridge Control and Status Register 2 Set" bitfld.long 0x24 31. " CH15_ERROR_STATUS ,APBH DMA Channel 15 error status" "No effect,Set" bitfld.long 0x24 30. " CH14_ERROR_STATUS ,APBH DMA Channel 14 error status" "No effect,Set" bitfld.long 0x24 29. " CH13_ERROR_STATUS ,APBH DMA Channel 13 error status" "No effect,Set" textline " " bitfld.long 0x24 28. " CH12_ERROR_STATUS ,APBH DMA Channel 12 error status" "No effect,Set" bitfld.long 0x24 27. " CH11_ERROR_STATUS ,APBH DMA Channel 11 error status" "No effect,Set" bitfld.long 0x24 26. " CH10_ERROR_STATUS ,APBH DMA Channel 10 error status" "No effect,Set" textline " " bitfld.long 0x24 25. " CH9_ERROR_STATUS ,APBH DMA Channel 9 error status" "No effect,Set" bitfld.long 0x24 24. " CH8_ERROR_STATUS ,APBH DMA Channel 8 error status" "No effect,Set" bitfld.long 0x24 23. " CH7_ERROR_STATUS ,APBH DMA Channel 7 error status" "No effect,Set" textline " " bitfld.long 0x24 22. " CH6_ERROR_STATUS ,APBH DMA Channel 6 error status" "No effect,Set" bitfld.long 0x24 21. " CH5_ERROR_STATUS ,APBH DMA Channel 5 error status" "No effect,Set" bitfld.long 0x24 20. " CH4_ERROR_STATUS ,APBH DMA Channel 4 error status" "No effect,Set" textline " " bitfld.long 0x24 19. " CH3_ERROR_STATUS ,APBH DMA Channel 3 error status" "No effect,Set" bitfld.long 0x24 18. " CH2_ERROR_STATUS ,APBH DMA Channel 2 error status" "No effect,Set" bitfld.long 0x24 17. " CH1_ERROR_STATUS ,APBH DMA Channel 1 error status" "No effect,Set" textline " " bitfld.long 0x24 16. " CH0_ERROR_STATUS ,APBH DMA Channel 0 error status" "No effect,Set" bitfld.long 0x24 15. " CH15_ERROR_IRQ ,Error interrupt 15 status" "No effect,Set" bitfld.long 0x24 14. " CH14_ERROR_IRQ ,Error interrupt 14 status" "No effect,Set" textline " " bitfld.long 0x24 13. " CH13_ERROR_IRQ ,Error interrupt 13 status" "No effect,Set" bitfld.long 0x24 12. " CH12_ERROR_IRQ ,Error interrupt 12 status" "No effect,Set" bitfld.long 0x24 11. " CH11_ERROR_IRQ ,Error interrupt 11 status" "No effect,Set" textline " " bitfld.long 0x24 10. " CH10_ERROR_IRQ ,Error interrupt 10 status" "No effect,Set" textline " " bitfld.long 0x24 9. " CH9_ERROR_IRQ ,Error interrupt 9 status" "No effect,Set" bitfld.long 0x24 8. " CH8_ERROR_IRQ ,Error interrupt 8 status" "No effect,Set" bitfld.long 0x24 7. " CH7_ERROR_IRQ ,Error interrupt 7 status" "No effect,Set" textline " " bitfld.long 0x24 6. " CH6_ERROR_IRQ ,Error interrupt 6 status" "No effect,Set" bitfld.long 0x24 5. " CH5_ERROR_IRQ ,Error interrupt 5 status" "No effect,Set" bitfld.long 0x24 4. " CH4_ERROR_IRQ ,Error interrupt 4 status" "No effect,Set" textline " " bitfld.long 0x24 3. " CH3_ERROR_IRQ ,Error interrupt 3 status" "No effect,Set" bitfld.long 0x24 2. " CH2_ERROR_IRQ ,Error interrupt 2 status" "No effect,Set" bitfld.long 0x24 1. " CH1_ERROR_IRQ ,Error interrupt 1 status" "No effect,Set" textline " " bitfld.long 0x24 0. " CH0_ERROR_IRQ ,Error interrupt 0 status" "No effect,Set" line.long 0x28 "HW_APBH_CTRL2_CLR,AHB to APBH Bridge Control and Status Register 2 Clear" bitfld.long 0x28 31. " CH15_ERROR_STATUS ,APBH DMA Channel 15 error status" "No effect,Clear" bitfld.long 0x28 30. " CH14_ERROR_STATUS ,APBH DMA Channel 14 error status" "No effect,Clear" bitfld.long 0x28 29. " CH13_ERROR_STATUS ,APBH DMA Channel 13 error status" "No effect,Clear" textline " " bitfld.long 0x28 28. " CH12_ERROR_STATUS ,APBH DMA Channel 12 error status" "No effect,Clear" bitfld.long 0x28 27. " CH11_ERROR_STATUS ,APBH DMA Channel 11 error status" "No effect,Clear" bitfld.long 0x28 26. " CH10_ERROR_STATUS ,APBH DMA Channel 10 error status" "No effect,Clear" textline " " bitfld.long 0x28 25. " CH9_ERROR_STATUS ,APBH DMA Channel 9 error status" "No effect,Clear" bitfld.long 0x28 24. " CH8_ERROR_STATUS ,APBH DMA Channel 8 error status" "No effect,Clear" bitfld.long 0x28 23. " CH7_ERROR_STATUS ,APBH DMA Channel 7 error status" "No effect,Clear" textline " " bitfld.long 0x28 22. " CH6_ERROR_STATUS ,APBH DMA Channel 6 error status" "No effect,Clear" bitfld.long 0x28 21. " CH5_ERROR_STATUS ,APBH DMA Channel 5 error status" "No effect,Clear" bitfld.long 0x28 20. " CH4_ERROR_STATUS ,APBH DMA Channel 4 error status" "No effect,Clear" textline " " bitfld.long 0x28 19. " CH3_ERROR_STATUS ,APBH DMA Channel 3 error status" "No effect,Clear" bitfld.long 0x28 18. " CH2_ERROR_STATUS ,APBH DMA Channel 2 error status" "No effect,Clear" bitfld.long 0x28 17. " CH1_ERROR_STATUS ,APBH DMA Channel 1 error status" "No effect,Clear" textline " " bitfld.long 0x28 16. " CH0_ERROR_STATUS ,APBH DMA Channel 0 error status" "No effect,Clear" bitfld.long 0x28 15. " CH15_ERROR_IRQ ,Error interrupt 15 status" "No effect,Clear" bitfld.long 0x28 14. " CH14_ERROR_IRQ ,Error interrupt 14 status" "No effect,Clear" textline " " bitfld.long 0x28 13. " CH13_ERROR_IRQ ,Error interrupt 13 status" "No effect,Clear" bitfld.long 0x28 12. " CH12_ERROR_IRQ ,Error interrupt 12 status" "No effect,Clear" bitfld.long 0x28 11. " CH11_ERROR_IRQ ,Error interrupt 11 status" "No effect,Clear" textline " " bitfld.long 0x28 10. " CH10_ERROR_IRQ ,Error interrupt 10 status" "No effect,Clear" bitfld.long 0x28 9. " CH9_ERROR_IRQ ,Error interrupt 9 status" "No effect,Clear" bitfld.long 0x28 8. " CH8_ERROR_IRQ ,Error interrupt 8 status" "No effect,Clear" textline " " bitfld.long 0x28 7. " CH7_ERROR_IRQ ,Error interrupt 7 status" "No effect,Clear" bitfld.long 0x28 6. " CH6_ERROR_IRQ ,Error interrupt 6 status" "No effect,Clear" bitfld.long 0x28 5. " CH5_ERROR_IRQ ,Error interrupt 5 status" "No effect,Clear" textline " " bitfld.long 0x28 4. " CH4_ERROR_IRQ ,Error interrupt 4 status" "No effect,Clear" bitfld.long 0x28 3. " CH3_ERROR_IRQ ,Error interrupt 3 status" "No effect,Clear" bitfld.long 0x28 2. " CH2_ERROR_IRQ ,Error interrupt 2 status" "No effect,Clear" textline " " bitfld.long 0x28 1. " CH1_ERROR_IRQ ,Error interrupt 1 status" "No effect,Clear" bitfld.long 0x28 0. " CH0_ERROR_IRQ ,Error interrupt 0 status" "No effect,Clear" line.long 0x2C "HW_APBH_CTRL2_TOG,AHB to APBH Bridge Control and Status Register 2 Toggle" bitfld.long 0x2C 31. " CH15_ERROR_STATUS ,APBH DMA Channel 15 error status" "Not toggled,Toggled" bitfld.long 0x2C 30. " CH14_ERROR_STATUS ,APBH DMA Channel 14 error status" "Not toggled,Toggled" bitfld.long 0x2C 29. " CH13_ERROR_STATUS ,APBH DMA Channel 13 error status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 28. " CH12_ERROR_STATUS ,APBH DMA Channel 12 error status" "Not toggled,Toggled" bitfld.long 0x2C 27. " CH11_ERROR_STATUS ,APBH DMA Channel 11 error status" "Not toggled,Toggled" bitfld.long 0x2C 26. " CH10_ERROR_STATUS ,APBH DMA Channel 10 error status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 25. " CH9_ERROR_STATUS ,APBH DMA Channel 9 error status" "Not toggled,Toggled" bitfld.long 0x2C 24. " CH8_ERROR_STATUS ,APBH DMA Channel 8 error status" "Not toggled,Toggled" bitfld.long 0x2C 23. " CH7_ERROR_STATUS ,APBH DMA Channel 7 error status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 22. " CH6_ERROR_STATUS ,APBH DMA Channel 6 error status" "Not toggled,Toggled" bitfld.long 0x2C 21. " CH5_ERROR_STATUS ,APBH DMA Channel 5 error status" "Not toggled,Toggled" bitfld.long 0x2C 20. " CH4_ERROR_STATUS ,APBH DMA Channel 4 error status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 19. " CH3_ERROR_STATUS ,APBH DMA Channel 3 error status" "Not toggled,Toggled" bitfld.long 0x2C 18. " CH2_ERROR_STATUS ,APBH DMA Channel 2 error status" "Not toggled,Toggled" bitfld.long 0x2C 17. " CH1_ERROR_STATUS ,APBH DMA Channel 1 error status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 16. " CH0_ERROR_STATUS ,APBH DMA Channel 0 error status" "Not toggled,Toggled" bitfld.long 0x2C 15. " CH15_ERROR_IRQ ,Error interrupt 15 status" "Not toggled,Toggled" bitfld.long 0x2C 14. " CH14_ERROR_IRQ ,Error interrupt 14 status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 13. " CH13_ERROR_IRQ ,Error interrupt 13 status" "Not toggled,Toggled" bitfld.long 0x2C 12. " CH12_ERROR_IRQ ,Error interrupt 12 status" "Not toggled,Toggled" bitfld.long 0x2C 11. " CH11_ERROR_IRQ ,Error interrupt 11 status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 10. " CH10_ERROR_IRQ ,Error interrupt 10 status" "Not toggled,Toggled" bitfld.long 0x2C 9. " CH9_ERROR_IRQ ,Error interrupt 9 status" "Not toggled,Toggled" bitfld.long 0x2C 8. " CH8_ERROR_IRQ ,Error interrupt 8 status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 7. " CH7_ERROR_IRQ ,Error interrupt 7 status" "Not toggled,Toggled" bitfld.long 0x2C 6. " CH6_ERROR_IRQ ,Error interrupt 6 status" "Not toggled,Toggled" bitfld.long 0x2C 5. " CH5_ERROR_IRQ ,Error interrupt 5 status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 4. " CH4_ERROR_IRQ ,Error interrupt 4 status" "Not toggled,Toggled" bitfld.long 0x2C 3. " CH3_ERROR_IRQ ,Error interrupt 3 status" "Not toggled,Toggled" bitfld.long 0x2C 2. " CH2_ERROR_IRQ ,Error interrupt 2 status" "Not toggled,Toggled" textline " " bitfld.long 0x2C 1. " CH1_ERROR_IRQ ,Error interrupt 1 status" "Not toggled,Toggled" bitfld.long 0x2C 0. " CH0_ERROR_IRQ ,Error interrupt 0 status" "Not toggled,Toggled" textline " " width 24. line.long 0x30 "HW_APBH_CHANNEL_CTRL,AHB to APBH Bridge Channel Register" bitfld.long 0x30 24. " RESET_CHANNEL8 ,SSP reset" "No reset,Reset" bitfld.long 0x30 23. " RESET_CHANNEL7 ,Channel 7 reset" "No reset,Reset" bitfld.long 0x30 22. " RESET_CHANNEL6 ,Channel 6 reset" "No reset,Reset" textline " " bitfld.long 0x30 21. " RESET_CHANNEL5 ,Channel 5 reset" "No reset,Reset" bitfld.long 0x30 20. " RESET_CHANNEL4 ,Channel 4 reset" "No reset,Reset" bitfld.long 0x30 19. " RESET_CHANNEL3 ,Channel 3 reset" "No reset,Reset" textline " " bitfld.long 0x30 18. " RESET_CHANNEL2 ,Channel 2 reset" "No reset,Reset" bitfld.long 0x30 17. " RESET_CHANNEL1 ,Channel 1 reset" "No reset,Reset" bitfld.long 0x30 16. " RESET_CHANNEL0 ,Channel 0 reset" "No reset,Reset" textline " " bitfld.long 0x30 8. " FREEZE_CHANNEL8 ,SSP freeze" "No frozen,Frozen" bitfld.long 0x30 7. " FREEZE_CHANNEL7 ,Channel 7 freeze" "No frozen,Frozen" bitfld.long 0x30 6. " FREEZE_CHANNEL6 ,Channel 6 freeze" "No frozen,Frozen" textline " " bitfld.long 0x30 5. " FREEZE_CHANNEL5 ,Channel 5 freeze" "No frozen,Frozen" bitfld.long 0x30 4. " FREEZE_CHANNEL4 ,Channel 4 freeze" "No frozen,Frozen" bitfld.long 0x30 3. " FREEZE_CHANNEL3 ,Channel 3 freeze" "No frozen,Frozen" textline " " bitfld.long 0x30 2. " FREEZE_CHANNEL2 ,Channel 2 freeze" "No frozen,Frozen" bitfld.long 0x30 1. " FREEZE_CHANNEL1 ,Channel 1 freeze" "No frozen,Frozen" bitfld.long 0x30 0. " FREEZE_CHANNEL0 ,Channel 0 freeze" "No frozen,Frozen" line.long 0x34 "HW_APBH_CHANNEL_SET,AHB to APBH Bridge Channel Register" bitfld.long 0x34 24. " RESET_CHANNEL8 ,SSP reset set" "No effect,Set" bitfld.long 0x34 23. " RESET_CHANNEL7 ,Channel 7 reset set" "No effect,Set" bitfld.long 0x34 22. " RESET_CHANNEL6 ,Channel 6 reset set" "No effect,Set" textline " " bitfld.long 0x34 21. " RESET_CHANNEL5 ,Channel 5 reset set" "No effect,Set" bitfld.long 0x34 20. " RESET_CHANNEL4 ,Channel 4 reset set" "No effect,Set" bitfld.long 0x34 19. " RESET_CHANNEL3 ,Channel 3 reset set" "No effect,Set" textline " " bitfld.long 0x34 18. " RESET_CHANNEL2 ,Channel 2 reset set" "No effect,Set" bitfld.long 0x34 17. " RESET_CHANNEL1 ,Channel 1 reset set" "No effect,Set" bitfld.long 0x34 16. " RESET_CHANNEL0 ,Channel 0 reset set" "No effect,Set" textline " " bitfld.long 0x34 8. " FREEZE_CHANNEL8 ,SSP freeze set" "No effect,Set" bitfld.long 0x34 7. " FREEZE_CHANNEL7 ,Channel 7 freeze set" "No effect,Set" bitfld.long 0x34 6. " FREEZE_CHANNEL6 ,Channel 6 freeze set" "No effect,Set" textline " " bitfld.long 0x34 5. " FREEZE_CHANNEL5 ,Channel 5 freeze set" "No effect,Set" bitfld.long 0x34 4. " FREEZE_CHANNEL4 ,Channel 4 freeze set" "No effect,Set" bitfld.long 0x34 3. " FREEZE_CHANNEL3 ,Channel 3 freeze set" "No effect,Set" textline " " bitfld.long 0x34 2. " FREEZE_CHANNEL2 ,Channel 2 freeze set" "No effect,Set" bitfld.long 0x34 1. " FREEZE_CHANNEL1 ,Channel 1 freeze set" "No effect,Set" bitfld.long 0x34 0. " FREEZE_CHANNEL0 ,Channel 0 freeze set" "No effect,Set" line.long 0x38 "HW_APBH_CHANNEL_CLR,AHB to APBH Bridge Channel Register" bitfld.long 0x38 24. " RESET_CHANNEL8 ,SSP reset clear" "No effect,Clear" bitfld.long 0x38 23. " RESET_CHANNEL7 ,Channel 7 reset clear" "No effect,Clear" bitfld.long 0x38 22. " RESET_CHANNEL6 ,Channel 6 reset clear" "No effect,Clear" textline " " bitfld.long 0x38 21. " RESET_CHANNEL5 ,Channel 5 reset clear" "No effect,Clear" bitfld.long 0x38 20. " RESET_CHANNEL4 ,Channel 4 reset clear" "No effect,Clear" bitfld.long 0x38 19. " RESET_CHANNEL3 ,Channel 3 reset clear" "No effect,Clear" textline " " bitfld.long 0x38 18. " RESET_CHANNEL2 ,Channel 2 reset clear" "No effect,Clear" bitfld.long 0x38 17. " RESET_CHANNEL1 ,Channel 1 reset clear" "No effect,Clear" bitfld.long 0x38 16. " RESET_CHANNEL0 ,Channel 0 reset clear" "No effect,Clear" textline " " bitfld.long 0x38 8. " FREEZE_CHANNEL8 ,SSP freeze clear" "No effect,Clear" bitfld.long 0x38 7. " FREEZE_CHANNEL7 ,Channel 7 freeze clear" "No effect,Clear" bitfld.long 0x38 6. " FREEZE_CHANNEL6 ,Channel 6 freeze clear" "No effect,Clear" textline " " bitfld.long 0x38 5. " FREEZE_CHANNEL5 ,Channel 5 freeze clear" "No effect,Clear" bitfld.long 0x38 4. " FREEZE_CHANNEL4 ,Channel 4 freeze clear" "No effect,Clear" bitfld.long 0x38 3. " FREEZE_CHANNEL3 ,Channel 3 freeze clear" "No effect,Clear" textline " " bitfld.long 0x38 2. " FREEZE_CHANNEL2 ,Channel 2 freeze clear" "No effect,Clear" bitfld.long 0x38 1. " FREEZE_CHANNEL1 ,Channel 1 freeze clear" "No effect,Clear" bitfld.long 0x38 0. " FREEZE_CHANNEL0 ,Channel 0 freeze clear" "No effect,Clear" line.long 0x3C "HW_APBH_CHANNEL_TOG,AHB to APBH Bridge Channel Register" bitfld.long 0x3C 24. " RESET_CHANNEL8 ,SSP reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 23. " RESET_CHANNEL7 ,Channel 7 reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 22. " RESET_CHANNEL6 ,Channel 6 reset toggle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 21. " RESET_CHANNEL5 ,Channel 5 reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 20. " RESET_CHANNEL4 ,Channel 4 reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 19. " RESET_CHANNEL3 ,Channel 3 reset toggle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 18. " RESET_CHANNEL2 ,Channel 2 reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 17. " RESET_CHANNEL1 ,Channel 1 reset toggle" "Not toggled,Toggled" bitfld.long 0x3C 16. " RESET_CHANNEL0 ,Channel 0 reset toggle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 8. " FREEZE_CHANNEL8 ,SSP freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 7. " FREEZE_CHANNEL7 ,Channel 7 freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 6. " FREEZE_CHANNEL6 ,Channel 6 freeze toggle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 5. " FREEZE_CHANNEL5 ,Channel 5 freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 4. " FREEZE_CHANNEL4 ,Channel 4 freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 3. " FREEZE_CHANNEL3 ,Channel 3 freeze toggle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 2. " FREEZE_CHANNEL2 ,Channel 2 freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 1. " FREEZE_CHANNEL1 ,Channel 1 freeze toggle" "Not toggled,Toggled" bitfld.long 0x3C 0. " FREEZE_CHANNEL0 ,Channel 0 freeze toggle" "Not toggled,Toggled" ; rgroup.long 0x40++0x3 ; line.long 0x00 "HW_APBH_DEVSEL,AHB to APBH DMA Device Assignment Register" group.long 0x50++0x03 line.long 0x00 "HW_APBH_DMA_BURST_SIZE,AHB to APBH DMA burst size register" bitfld.long 0x00 16.--17. " CH8 ,DMA burst size for SSP" "BURST0,BURST4,BURST8,?..." bitfld.long 0x00 14.--15. " CH7 ,DMA burst size for GPMI channel 7" ",BURST4,?..." bitfld.long 0x00 12.--13. " CH6 ,DMA burst size for GPMI channel 6" ",BURST4,?..." textline " " bitfld.long 0x00 10.--11. " CH5 ,DMA burst size for GPMI channel 5" ",BURST4,?..." bitfld.long 0x00 8.--9. " CH4 ,DMA burst size for GPMI channel 4" ",BURST4,?..." bitfld.long 0x00 6.--7. " CH3 ,DMA burst size for GPMI channel 3" ",BURST4,?..." textline " " bitfld.long 0x00 4.--5. " CH2 ,DMA burst size for GPMI channel 2" ",BURST4,?..." bitfld.long 0x00 2.--3. " CH1 ,DMA burst size for GPMI channel 1" ",BURST4,?..." bitfld.long 0x00 0.--1. " CH0 ,DMA burst size for GPMI channel 0" ",BURST4,?..." group.long 0x60++0x03 line.long 0x00 "HW_APBH_DEBUG,AHB to APBH DMA Debug Register" bitfld.long 0x00 0. " GPMI_ONE_FIFO ,8 GMPI channels share DMA FIFO" "Not shared,Shared" tree "APBH DMA Channel 0" rgroup.long 0x100++0x03 line.long 0x00 "HW_APBH_CH0_CURCMDAR,APBH DMA Channel 0 Current Command Address Register" group.long (0x100+0x10)++0x03 line.long 0x00 "HW_APBH_CH0_NXTCMDAR,APBH DMA Channel 0 Next Command Address Register" rgroup.long (0x100+0x20)++0x03 line.long 0x00 "HW_APBH_CH0_CMD,APBH DMA Channel 0 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x100+0x30)++0x03 line.long 0x00 "HW_APBH_CH0_BAR,APBH DMA Channel 0 Buffer Address Register" group.long (0x100+0x40)++0x03 line.long 0x00 "HW_APBH_CH0_SEMA,APBH DMA Channel 0 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x100+0x50)++0x03 line.long 0x00 "HW_APBH_CH0_DEBUG1,AHB to APBH DMA Channel 0 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 0 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x100+0x60)++0x03 line.long 0x00 "HW_APBH_CH0_DEBUG2,AHB to APBH DMA Channel 0 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 1" rgroup.long 0x170++0x03 line.long 0x00 "HW_APBH_CH1_CURCMDAR,APBH DMA Channel 1 Current Command Address Register" group.long (0x170+0x10)++0x03 line.long 0x00 "HW_APBH_CH1_NXTCMDAR,APBH DMA Channel 1 Next Command Address Register" rgroup.long (0x170+0x20)++0x03 line.long 0x00 "HW_APBH_CH1_CMD,APBH DMA Channel 1 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x170+0x30)++0x03 line.long 0x00 "HW_APBH_CH1_BAR,APBH DMA Channel 1 Buffer Address Register" group.long (0x170+0x40)++0x03 line.long 0x00 "HW_APBH_CH1_SEMA,APBH DMA Channel 1 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x170+0x50)++0x03 line.long 0x00 "HW_APBH_CH1_DEBUG1,AHB to APBH DMA Channel 1 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 1 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x170+0x60)++0x03 line.long 0x00 "HW_APBH_CH1_DEBUG2,AHB to APBH DMA Channel 1 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 2" rgroup.long 0x1E0++0x03 line.long 0x00 "HW_APBH_CH2_CURCMDAR,APBH DMA Channel 2 Current Command Address Register" group.long (0x1E0+0x10)++0x03 line.long 0x00 "HW_APBH_CH2_NXTCMDAR,APBH DMA Channel 2 Next Command Address Register" rgroup.long (0x1E0+0x20)++0x03 line.long 0x00 "HW_APBH_CH2_CMD,APBH DMA Channel 2 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x1E0+0x30)++0x03 line.long 0x00 "HW_APBH_CH2_BAR,APBH DMA Channel 2 Buffer Address Register" group.long (0x1E0+0x40)++0x03 line.long 0x00 "HW_APBH_CH2_SEMA,APBH DMA Channel 2 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x1E0+0x50)++0x03 line.long 0x00 "HW_APBH_CH2_DEBUG1,AHB to APBH DMA Channel 2 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 2 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x1E0+0x60)++0x03 line.long 0x00 "HW_APBH_CH2_DEBUG2,AHB to APBH DMA Channel 2 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 3" rgroup.long 0x250++0x03 line.long 0x00 "HW_APBH_CH3_CURCMDAR,APBH DMA Channel 3 Current Command Address Register" group.long (0x250+0x10)++0x03 line.long 0x00 "HW_APBH_CH3_NXTCMDAR,APBH DMA Channel 3 Next Command Address Register" rgroup.long (0x250+0x20)++0x03 line.long 0x00 "HW_APBH_CH3_CMD,APBH DMA Channel 3 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x250+0x30)++0x03 line.long 0x00 "HW_APBH_CH3_BAR,APBH DMA Channel 3 Buffer Address Register" group.long (0x250+0x40)++0x03 line.long 0x00 "HW_APBH_CH3_SEMA,APBH DMA Channel 3 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x250+0x50)++0x03 line.long 0x00 "HW_APBH_CH3_DEBUG1,AHB to APBH DMA Channel 3 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 3 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x250+0x60)++0x03 line.long 0x00 "HW_APBH_CH3_DEBUG2,AHB to APBH DMA Channel 3 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 4" rgroup.long 0x2C0++0x03 line.long 0x00 "HW_APBH_CH4_CURCMDAR,APBH DMA Channel 4 Current Command Address Register" group.long (0x2C0+0x10)++0x03 line.long 0x00 "HW_APBH_CH4_NXTCMDAR,APBH DMA Channel 4 Next Command Address Register" rgroup.long (0x2C0+0x20)++0x03 line.long 0x00 "HW_APBH_CH4_CMD,APBH DMA Channel 4 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x2C0+0x30)++0x03 line.long 0x00 "HW_APBH_CH4_BAR,APBH DMA Channel 4 Buffer Address Register" group.long (0x2C0+0x40)++0x03 line.long 0x00 "HW_APBH_CH4_SEMA,APBH DMA Channel 4 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x2C0+0x50)++0x03 line.long 0x00 "HW_APBH_CH4_DEBUG1,AHB to APBH DMA Channel 4 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 4 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x2C0+0x60)++0x03 line.long 0x00 "HW_APBH_CH4_DEBUG2,AHB to APBH DMA Channel 4 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 5" rgroup.long 0x330++0x03 line.long 0x00 "HW_APBH_CH5_CURCMDAR,APBH DMA Channel 5 Current Command Address Register" group.long (0x330+0x10)++0x03 line.long 0x00 "HW_APBH_CH5_NXTCMDAR,APBH DMA Channel 5 Next Command Address Register" rgroup.long (0x330+0x20)++0x03 line.long 0x00 "HW_APBH_CH5_CMD,APBH DMA Channel 5 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x330+0x30)++0x03 line.long 0x00 "HW_APBH_CH5_BAR,APBH DMA Channel 5 Buffer Address Register" group.long (0x330+0x40)++0x03 line.long 0x00 "HW_APBH_CH5_SEMA,APBH DMA Channel 5 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x330+0x50)++0x03 line.long 0x00 "HW_APBH_CH5_DEBUG1,AHB to APBH DMA Channel 5 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 5 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x330+0x60)++0x03 line.long 0x00 "HW_APBH_CH5_DEBUG2,AHB to APBH DMA Channel 5 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 6" rgroup.long 0x3A0++0x03 line.long 0x00 "HW_APBH_CH6_CURCMDAR,APBH DMA Channel 6 Current Command Address Register" group.long (0x3A0+0x10)++0x03 line.long 0x00 "HW_APBH_CH6_NXTCMDAR,APBH DMA Channel 6 Next Command Address Register" rgroup.long (0x3A0+0x20)++0x03 line.long 0x00 "HW_APBH_CH6_CMD,APBH DMA Channel 6 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x3A0+0x30)++0x03 line.long 0x00 "HW_APBH_CH6_BAR,APBH DMA Channel 6 Buffer Address Register" group.long (0x3A0+0x40)++0x03 line.long 0x00 "HW_APBH_CH6_SEMA,APBH DMA Channel 6 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x3A0+0x50)++0x03 line.long 0x00 "HW_APBH_CH6_DEBUG1,AHB to APBH DMA Channel 6 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 6 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x3A0+0x60)++0x03 line.long 0x00 "HW_APBH_CH6_DEBUG2,AHB to APBH DMA Channel 6 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 7" rgroup.long 0x410++0x03 line.long 0x00 "HW_APBH_CH7_CURCMDAR,APBH DMA Channel 7 Current Command Address Register" group.long (0x410+0x10)++0x03 line.long 0x00 "HW_APBH_CH7_NXTCMDAR,APBH DMA Channel 7 Next Command Address Register" rgroup.long (0x410+0x20)++0x03 line.long 0x00 "HW_APBH_CH7_CMD,APBH DMA Channel 7 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x410+0x30)++0x03 line.long 0x00 "HW_APBH_CH7_BAR,APBH DMA Channel 7 Buffer Address Register" group.long (0x410+0x40)++0x03 line.long 0x00 "HW_APBH_CH7_SEMA,APBH DMA Channel 7 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x410+0x50)++0x03 line.long 0x00 "HW_APBH_CH7_DEBUG1,AHB to APBH DMA Channel 7 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 7 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x410+0x60)++0x03 line.long 0x00 "HW_APBH_CH7_DEBUG2,AHB to APBH DMA Channel 7 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 8" rgroup.long 0x480++0x03 line.long 0x00 "HW_APBH_CH8_CURCMDAR,APBH DMA Channel 8 Current Command Address Register" group.long (0x480+0x10)++0x03 line.long 0x00 "HW_APBH_CH8_NXTCMDAR,APBH DMA Channel 8 Next Command Address Register" rgroup.long (0x480+0x20)++0x03 line.long 0x00 "HW_APBH_CH8_CMD,APBH DMA Channel 8 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x480+0x30)++0x03 line.long 0x00 "HW_APBH_CH8_BAR,APBH DMA Channel 8 Buffer Address Register" group.long (0x480+0x40)++0x03 line.long 0x00 "HW_APBH_CH8_SEMA,APBH DMA Channel 8 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x480+0x50)++0x03 line.long 0x00 "HW_APBH_CH8_DEBUG1,AHB to APBH DMA Channel 8 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 8 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x480+0x60)++0x03 line.long 0x00 "HW_APBH_CH8_DEBUG2,AHB to APBH DMA Channel 8 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 9" rgroup.long 0x4F0++0x03 line.long 0x00 "HW_APBH_CH9_CURCMDAR,APBH DMA Channel 9 Current Command Address Register" group.long (0x4F0+0x10)++0x03 line.long 0x00 "HW_APBH_CH9_NXTCMDAR,APBH DMA Channel 9 Next Command Address Register" rgroup.long (0x4F0+0x20)++0x03 line.long 0x00 "HW_APBH_CH9_CMD,APBH DMA Channel 9 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x4F0+0x30)++0x03 line.long 0x00 "HW_APBH_CH9_BAR,APBH DMA Channel 9 Buffer Address Register" group.long (0x4F0+0x40)++0x03 line.long 0x00 "HW_APBH_CH9_SEMA,APBH DMA Channel 9 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x4F0+0x50)++0x03 line.long 0x00 "HW_APBH_CH9_DEBUG1,AHB to APBH DMA Channel 9 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 9 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x4F0+0x60)++0x03 line.long 0x00 "HW_APBH_CH9_DEBUG2,AHB to APBH DMA Channel 9 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 10" rgroup.long 0x560++0x03 line.long 0x00 "HW_APBH_CH10_CURCMDAR,APBH DMA Channel 10 Current Command Address Register" group.long (0x560+0x10)++0x03 line.long 0x00 "HW_APBH_CH10_NXTCMDAR,APBH DMA Channel 10 Next Command Address Register" rgroup.long (0x560+0x20)++0x03 line.long 0x00 "HW_APBH_CH10_CMD,APBH DMA Channel 10 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x560+0x30)++0x03 line.long 0x00 "HW_APBH_CH10_BAR,APBH DMA Channel 10 Buffer Address Register" group.long (0x560+0x40)++0x03 line.long 0x00 "HW_APBH_CH10_SEMA,APBH DMA Channel 10 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x560+0x50)++0x03 line.long 0x00 "HW_APBH_CH10_DEBUG1,AHB to APBH DMA Channel 10 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 10 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x560+0x60)++0x03 line.long 0x00 "HW_APBH_CH10_DEBUG2,AHB to APBH DMA Channel 10 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 11" rgroup.long 0x5D0++0x03 line.long 0x00 "HW_APBH_CH11_CURCMDAR,APBH DMA Channel 11 Current Command Address Register" group.long (0x5D0+0x10)++0x03 line.long 0x00 "HW_APBH_CH11_NXTCMDAR,APBH DMA Channel 11 Next Command Address Register" rgroup.long (0x5D0+0x20)++0x03 line.long 0x00 "HW_APBH_CH11_CMD,APBH DMA Channel 11 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x5D0+0x30)++0x03 line.long 0x00 "HW_APBH_CH11_BAR,APBH DMA Channel 11 Buffer Address Register" group.long (0x5D0+0x40)++0x03 line.long 0x00 "HW_APBH_CH11_SEMA,APBH DMA Channel 11 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x5D0+0x50)++0x03 line.long 0x00 "HW_APBH_CH11_DEBUG1,AHB to APBH DMA Channel 11 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 11 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x5D0+0x60)++0x03 line.long 0x00 "HW_APBH_CH11_DEBUG2,AHB to APBH DMA Channel 11 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 12" rgroup.long 0x640++0x03 line.long 0x00 "HW_APBH_CH12_CURCMDAR,APBH DMA Channel 12 Current Command Address Register" group.long (0x640+0x10)++0x03 line.long 0x00 "HW_APBH_CH12_NXTCMDAR,APBH DMA Channel 12 Next Command Address Register" rgroup.long (0x640+0x20)++0x03 line.long 0x00 "HW_APBH_CH12_CMD,APBH DMA Channel 12 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x640+0x30)++0x03 line.long 0x00 "HW_APBH_CH12_BAR,APBH DMA Channel 12 Buffer Address Register" group.long (0x640+0x40)++0x03 line.long 0x00 "HW_APBH_CH12_SEMA,APBH DMA Channel 12 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x640+0x50)++0x03 line.long 0x00 "HW_APBH_CH12_DEBUG1,AHB to APBH DMA Channel 12 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 12 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x640+0x60)++0x03 line.long 0x00 "HW_APBH_CH12_DEBUG2,AHB to APBH DMA Channel 12 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 13" rgroup.long 0x6B0++0x03 line.long 0x00 "HW_APBH_CH13_CURCMDAR,APBH DMA Channel 13 Current Command Address Register" group.long (0x6B0+0x10)++0x03 line.long 0x00 "HW_APBH_CH13_NXTCMDAR,APBH DMA Channel 13 Next Command Address Register" rgroup.long (0x6B0+0x20)++0x03 line.long 0x00 "HW_APBH_CH13_CMD,APBH DMA Channel 13 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x6B0+0x30)++0x03 line.long 0x00 "HW_APBH_CH13_BAR,APBH DMA Channel 13 Buffer Address Register" group.long (0x6B0+0x40)++0x03 line.long 0x00 "HW_APBH_CH13_SEMA,APBH DMA Channel 13 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x6B0+0x50)++0x03 line.long 0x00 "HW_APBH_CH13_DEBUG1,AHB to APBH DMA Channel 13 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 13 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x6B0+0x60)++0x03 line.long 0x00 "HW_APBH_CH13_DEBUG2,AHB to APBH DMA Channel 13 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 14" rgroup.long 0x720++0x03 line.long 0x00 "HW_APBH_CH14_CURCMDAR,APBH DMA Channel 14 Current Command Address Register" group.long (0x720+0x10)++0x03 line.long 0x00 "HW_APBH_CH14_NXTCMDAR,APBH DMA Channel 14 Next Command Address Register" rgroup.long (0x720+0x20)++0x03 line.long 0x00 "HW_APBH_CH14_CMD,APBH DMA Channel 14 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x720+0x30)++0x03 line.long 0x00 "HW_APBH_CH14_BAR,APBH DMA Channel 14 Buffer Address Register" group.long (0x720+0x40)++0x03 line.long 0x00 "HW_APBH_CH14_SEMA,APBH DMA Channel 14 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x720+0x50)++0x03 line.long 0x00 "HW_APBH_CH14_DEBUG1,AHB to APBH DMA Channel 14 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 14 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x720+0x60)++0x03 line.long 0x00 "HW_APBH_CH14_DEBUG2,AHB to APBH DMA Channel 14 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end tree "APBH DMA Channel 15" rgroup.long 0x790++0x03 line.long 0x00 "HW_APBH_CH15_CURCMDAR,APBH DMA Channel 15 Current Command Address Register" group.long (0x790+0x10)++0x03 line.long 0x00 "HW_APBH_CH15_NXTCMDAR,APBH DMA Channel 15 Next Command Address Register" rgroup.long (0x790+0x20)++0x03 line.long 0x00 "HW_APBH_CH15_CMD,APBH DMA Channel 15 Command Register" hexmask.long.word 0x00 16.--31. 1. " XFER_COUNT ,Number of bytes to transfer in the GPMI0 device" bitfld.long 0x00 12.--15. " CMDWORDS ,Number of command words to send" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " HALTONTERMINATE ,Halt DMA channel on terminate" "Not halted,Halted" bitfld.long 0x00 7. " WAIT4ENDCMD ,Wait for end of command to be sent to the DMA" "Not wait,Wait" textline " " bitfld.long 0x00 6. " SEMAPHORE ,Decrement semaphore at the completion of the current command structure" "Not decremented,Decremented" bitfld.long 0x00 5. " NANDWAIT4READY ,NAND DMA channel wait for device ready signal" "Not wait,Wait" bitfld.long 0x00 4. " NANDLOCK ,NAND DMA channel lock" "Not locked,Locked" bitfld.long 0x00 3. " IRQONCMPLT ,Set interrupt status bit upon completion of the current command" "Not set,Set" textline " " bitfld.long 0x00 2. " CHAIN ,Another command is chained onto the end of the current command structure" "Not chained,Chained" bitfld.long 0x00 0.--1. " COMMAND ,Current command" "NO_DMA_XFER,DMA_WRITE,DMA_READ,DMA_SENSE" rgroup.long (0x790+0x30)++0x03 line.long 0x00 "HW_APBH_CH15_BAR,APBH DMA Channel 15 Buffer Address Register" group.long (0x790+0x40)++0x03 line.long 0x00 "HW_APBH_CH15_SEMA,APBH DMA Channel 15 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " PHORE ,Value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT_SEMA ,Value added to the semaphore count" rgroup.long (0x790+0x50)++0x03 line.long 0x00 "HW_APBH_CH15_DEBUG1,AHB to APBH DMA Channel 15 Debug Register 1" bitfld.long 0x00 31. " REQ ,DMA Request Signal status" "0,1" bitfld.long 0x00 30. " BURST ,DMA Burst Signa status" "0,1" bitfld.long 0x00 29. " KICK ,DMA Kick Signal status" "0,1" bitfld.long 0x00 28. " END ,DMA End Command status" "0,1" textline " " bitfld.long 0x00 24. " NEXTCMDADDRVALID ,Next command adress is valid" "0,1" bitfld.long 0x00 23. " RD_FIFO_EMPTY ,DMA Channel Read FIFO Empty signal status" "0,1" bitfld.long 0x00 22. " RD_FIFO_FULL ,DMA Channel Read FIFO Full signal status" "0,1" bitfld.long 0x00 21. " WR_FIFO_EMPTY ,DMA Channel Write FIFO Empty signal status" "0,1" textline " " bitfld.long 0x00 20. " WR_FIFO_FULL ,DMA Channel Write FIFO Full signal status" "0,1" bitfld.long 0x00 0.--4. " STATEMACHINE ,PIO Display of the DMA Channel 15 state machine state" "IDLE,REQ_CMD1,REQ_CMD3,REQ_CMD2,XFER_DECODE,REQ_WAIT,REQ_CMD4,PIO_REQ,READ_FLUSH,READ_WAIT,,,WRITE,READ_REQ,CHECK_CHAIN,XFER_COMPLETE,,,,,TERMINATE,WAIT_END,,,,,,,WRITE_WAIT,HALT_AFTER_TERM,CHECK_WAIT,WAIT_READY" rgroup.long (0x790+0x60)++0x03 line.long 0x00 "HW_APBH_CH15_DEBUG2,AHB to APBH DMA Channel 15 Debug Register 2" hexmask.long.word 0x00 16.--31. 1. " APB_BYTES ,APB bytes remaining to be transfered in the current transfer" hexmask.long.word 0x00 0.--15. 1. " AHB_BYTES ,AHB bytes remaining to be transfered in the current transfer" tree.end textline " " rgroup.long (0x800)++0x03 line.long 0x00 "HW_APBH_VERSION,APBH Bridge Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of the RTL version" width 0x0B tree.end endif sif (cpu()!="IMX6SOLOLITE") tree "ASRC (Asynchronous Sample Rate Converter)" base ad:0x02034000 width 12. group.long 0x00++0x7 line.long 0x00 "ASRCTR,Control Register" bitfld.long 0x00 22. " ATSC ,ASRC Pair C Automatic Selection For Processing Options" "Disabled,Enabled" bitfld.long 0x00 21. " ATSB ,ASRC Pair B Automatic Selection For Processing Options" "Disabled,Enabled" bitfld.long 0x00 20. " ATSA ,ASRC Pair A Automatic Selection For Processing Options" "Disabled,Enabled" bitfld.long 0x00 17.--18. " USRC/IDRC ,Use Ideal Ratio for Pair C" ",,Internal measured ratio,Idea ratio" textline " " bitfld.long 0x00 15.--16. " USRB/IDRB ,Use Ideal Ratio for Pair B" ",,Internal measured ratio,Idea ratio" bitfld.long 0x00 13.--14. " USRA/IDRA ,Use Ideal Ratio for Pair A" ",,Internal measured ratio,Idea ratio" bitfld.long 0x00 4. " SRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 3. " ASREC ,ASRC Enable C" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASREB ,ASRC Enable B" "Disabled,Enabled" bitfld.long 0x00 1. " ASREA ,ASRC Enable A" "Disabled,Enabled" bitfld.long 0x00 0. " ASRCEN ,ASRC Enable" "Disabled,Enabled" line.long 0x04 "ASRIER,Interrupt Enable Register" bitfld.long 0x04 7. " AFPWE ,FP in Wait State Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 6. " AOLIE ,Overload Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 5. " ADOEC ,Data Output C Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 4. " ADOEB ,Data Output B Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " ADOEA ,Data Output A Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " ADIEC ,Data Input C Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 1. " ADIEB ,Data Input B Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " ADIEA ,Data Input A Interrupt Enable" "Disabled,Enabled" group.long 0x0C++0x13 line.long 0x00 "ASRCNCR,Channel Number Configuration Register" bitfld.long 0x00 8.--11. " ANCC ,Number of C Channels" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 4.--7. " ANCB ,Number of B Channels" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. " ANCA ,Number of A Channels" "0,1,2,3,4,5,6,7,8,9,10,?..." line.long 0x04 "ASRCFG,Filter Configuration Status Register" sif (cpu()=="VF7XX-CM4"||cpu()=="VF6XX-CM4"||cpu()=="VF7XX-CA5"||cpu()=="VF6XX-CA5"||cpu()=="VF5XX-CA5"||cpu()=="VF4XX-CA5"||cpu()=="VF3XX-CA5"||cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6DUAL"||cpuis("IMX6QUAD")) rbitfld.long 0x04 23. " INIRQC ,Initialization for Conversion Pair C is served" "Not served,Served" rbitfld.long 0x04 22. " INIRQB ,Initialization for Conversion Pair B is served" "Not served,Served" rbitfld.long 0x04 21. " INIRQA ,Initialization for Conversion Pair A is served" "Not served,Served" textline " " else bitfld.long 0x04 23. " INIRQC ,Initialization for Conversion Pair C is served" "Not served,Served" bitfld.long 0x04 22. " INIRQB ,Initialization for Conversion Pair B is served" "Not served,Served" bitfld.long 0x04 21. " INIRQA ,Initialization for Conversion Pair A is served" "Not served,Served" textline " " endif bitfld.long 0x04 20. " NDPRC ,Not Use Default Parameters for RAM-stored Parameters For Conversion Pair C" "Used,Not used" bitfld.long 0x04 19. " NDPRB ,Not Use Default Parameters for RAM-stored Parameters For Conversion Pair B" "Used,Not used" bitfld.long 0x04 18. " NDPRA ,Not Use Default Parameters for RAM-stored Parameters For Conversion Pair A" "Used,Not used" textline " " bitfld.long 0x04 16.--17. " POSTMODC ,Post-Processing Configuration for Conversion Pair C" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,?..." bitfld.long 0x04 14.--15. " PREMODC ,Pre-Processing Configuration for Conversion Pair C" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,Passthrough" bitfld.long 0x04 12.--13. " POSTMODB ,Post-Processing Configuration for Conversion Pair B" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,?..." textline " " bitfld.long 0x04 10.--11. " PREMODB ,Pre-Processing Configuration for Conversion Pair B" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,Passthrough" bitfld.long 0x04 8.--9. " POSTMODA ,Post-Processing Configuration for Conversion Pair A" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,?..." bitfld.long 0x04 6.--7. " PREMODA ,Pre-Processing Configuration for Conversion Pair A" "Upsampling-by-2,Direct-Connection,Downsampling-by-2,Passthrough" line.long 0x08 "ASRCSR,Clock Source Register" sif (cpuis("IMX6*")) bitfld.long 0x08 20.--23. " AOCSC ,Output Clock Source C" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" bitfld.long 0x08 16.--19. " AOCSB ,Output Clock Source B" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" bitfld.long 0x08 12.--15. " AOCSA ,Output Clock Source A" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" textline " " bitfld.long 0x08 8.--11. " AICSC ,Input Clock Source C" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" bitfld.long 0x08 4.--7. " AICSB ,Input Clock Source B" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" bitfld.long 0x08 0.--3. " AICSA ,Input Clock Source A" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Connected,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,SPDIF1_CLK,,Disabled" elif (cpu()=="VF7XX-CM4"||cpu()=="VF6XX-CM4"||cpu()=="VF7XX-CA5"||cpu()=="VF6XX-CA5"||cpu()=="VF5XX-CA5"||cpu()=="VF4XX-CA5"||cpu()=="VF3XX-CA5") bitfld.long 0x08 20.--23. " AOCSC ,Output Clock Source C" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" bitfld.long 0x08 16.--19. " AOCSB ,Output Clock Source B" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" bitfld.long 0x08 12.--15. " AOCSA ,Output Clock Source A" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" textline " " bitfld.long 0x08 8.--11. " AICSC ,Input Clock Source C" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" bitfld.long 0x08 4.--7. " AICSB ,Input Clock Source B" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" bitfld.long 0x08 0.--3. " AICSA ,Input Clock Source A" "ESAI RX,SAI0 RX,SAI1 RX,SAI2 RX,SAI3 RX,SPDIF RX,MLB Clock in,ESAI Tx,SAI0 TX,SAI3 TX,SPDIF Tx,SSI-3 TX,SPDIF Tx,PLL4,Audio External,SAI1 Tx" else bitfld.long 0x08 20.--23. " AOCSC ,Output Clock Source C" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" bitfld.long 0x08 16.--19. " AOCSB ,Output Clock Source B" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" bitfld.long 0x08 12.--15. " AOCSA ,Output Clock Source A" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" textline " " bitfld.long 0x08 8.--11. " AICSC ,Input Clock Source C" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" bitfld.long 0x08 4.--7. " AICSB ,Input Clock Source B" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" bitfld.long 0x08 0.--3. " AICSA ,Input Clock Source A" "ESAI RX,SSI-1 RX,SSI-2 RX,SSI-3 RX,SPDIF RX,MLB,Tied to zero,Tied to zero,ESAI Tx,SSI-1 Tx,SSI-2 Tx,SSI-3 TX,SPDIF Tx,ASRCKI,ESAI RX,Disabled" endif line.long 0x0C "ASRCDR1,Clock Divider Register 1" bitfld.long 0x0C 21.--23. " AOCDB ,Output Clock Divider B" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0C 18.--20. " AOCPB ,Output Clock Prescaler B" "1,2,4,8,16,32,64,128" bitfld.long 0x0C 15.--17. " AOCDA ,Output Clock Divider A" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x0C 12.--14. " AOCPA ,Output Clock Prescaler A" "1,2,4,8,16,32,64,128" bitfld.long 0x0C 9.--11. " AICDB ,Input Clock Divider B" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0C 6.--8. " AICPB ,Input Clock Prescaler B" "1,2,4,8,16,32,64,128" textline " " bitfld.long 0x0C 3.--5. " AICDA ,Input Clock Divider A" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0C 0.--2. " AICPA ,Input Clock Prescaler A" "1,2,4,8,16,32,64,128" line.long 0x10 "ASRCDR2,Clock Divider Register 2" bitfld.long 0x10 9.--11. " AOCDC ,Output Clock Divider C" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x10 6.--8. " AOCPC ,Output Clock Prescaler C" "1,2,4,8,16,32,64,128" bitfld.long 0x10 3.--5. " AICDC ,Input Clock Divider C" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x10 0.--2. " AICPC ,Input Clock Prescaler C" "1,2,4,8,16,32,64,128" sif (cpu()!="VF7XX-CM4"&&cpu()!="VF6XX-CM4"&&cpu()!="VF7XX-CA5"&&cpu()!="VF6XX-CA5"&&cpu()!="VF5XX-CA5"&&cpu()!="VF4XX-CA5"&&cpu()!="VF3XX-CA5") group.long 0x20++0x03 else rgroup.long 0x20++0x03 endif line.long 0x00 "ASRSTR,Status Register" bitfld.long 0x00 21. " DSLCNT ,DSL Counter Input to FIFO ready" "In process,Stored" bitfld.long 0x00 20. " ATQOL ,Taskque FIFO overload" "Not overloaded,Overloaded" bitfld.long 0x00 19. " AOOLC ,Pair C Output Task Overload" "Not overloaded,Overloaded" textline " " bitfld.long 0x00 18. " AOOLB ,Pair B Output Task Overload" "Not overloaded,Overloaded" bitfld.long 0x00 17. " AOOLA ,Pair A Output Task Overload" "Not overloaded,Overloaded" bitfld.long 0x00 16. " AIOLC ,Pair C Input Task Overload" "Not overloaded,Overloaded" textline " " bitfld.long 0x00 15. " AIOLB ,Pair B Input Task Overload" "Not overloaded,Overloaded" bitfld.long 0x00 14. " AIOLA ,Pair A Input Task Overload" "Not overloaded,Overloaded" bitfld.long 0x00 13. " AODOC ,Output Data Buffer C is overflowed" "Not overloaded,Overloaded" textline " " bitfld.long 0x00 12. " AODOB ,Output Data Buffer B is overflowed" "Not overloaded,Overloaded" bitfld.long 0x00 11. " AODOA ,Output Data Buffer A is overflowed" "Not overloaded,Overloaded" bitfld.long 0x00 10. " AIDUC ,Input Data Buffer C is underflowed" "Not underflowed,Underflowed" textline " " bitfld.long 0x00 9. " AIDUB ,Input Data Buffer B is underflowed" "Not underflowed,Underflowed" bitfld.long 0x00 8. " AIDUA ,Input Data Buffer A is underflowed" "Not underflowed,Underflowed" bitfld.long 0x00 7. " FPWT ,FP is in wait states" "Not wait state,Wait state" textline " " bitfld.long 0x00 6. " AOLE ,Overload Error Flag" "No error,Error" bitfld.long 0x00 5. " AODFC ,Number of data in Output Data Buffer C is greater than threshold" "Less/Equal,Greater" bitfld.long 0x00 4. " AODFB ,Number of data in Output Data Buffer B is greater than threshold" "Less/Equal,Greater" textline " " bitfld.long 0x00 3. " AODFA ,Number of data in Output Data Buffer A is greater than threshold" "Less/Equal,Greater" bitfld.long 0x00 2. " AIDEC ,Number of data in Input Data Buffer C is less than threshold" "Greater/Equal,Less" bitfld.long 0x00 1. " AIDEB ,Number of data in Input Data Buffer B is less than threshold" "Greater/Equal,Less" textline " " bitfld.long 0x00 0. " AIDEA ,Number of data in Input Data Buffer A is less than threshold" "Greater/Equal,Less" textline " " group.long 0x40++0x13 line.long 0x0 "ASRPMn1,Parameter Register 1" hexmask.long.tbyte 0x0 0.--23. 1. " PARAMETER_VALUE_1 ,PARAMETER_VALUE_1" line.long 0x4 "ASRPMn2,Parameter Register 2" hexmask.long.tbyte 0x4 0.--23. 1. " PARAMETER_VALUE_2 ,PARAMETER_VALUE_2" line.long 0x8 "ASRPMn3,Parameter Register 3" hexmask.long.tbyte 0x8 0.--23. 1. " PARAMETER_VALUE_3 ,PARAMETER_VALUE_3" line.long 0xC "ASRPMn4,Parameter Register 4" hexmask.long.tbyte 0xC 0.--23. 1. " PARAMETER_VALUE_4 ,PARAMETER_VALUE_4" line.long 0x10 "ASRPMn5,Parameter Register 5" hexmask.long.tbyte 0x10 0.--23. 1. " PARAMETER_VALUE_5 ,PARAMETER_VALUE_5" textline " " group.long 0x54++0x03 line.long 0x00 "ASRTFR1,Task Queue FIFO Register 1" hexmask.long.byte 0x00 13.--19. 1. " TF_FILL ,Current number of entries in task queue FIFO" hexmask.long.word 0x00 6.--12. 0x40 " TF_BASE ,Base address for task queue FIFO" group.long 0x5C++0x03 line.long 0x00 "ASRCCR,Channel Counter Register" bitfld.long 0x00 20.--23. " ACOC ,The channel counter for Pair C's output FIFO" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 16.--19. " ACOB ,The channel counter for Pair B's output FIFO" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " ACOA ,The channel counter for Pair A's output FIFO" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 8.--11. " ACIC ,The channel counter for Pair C's input FIFO" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--7. " ACIB ,The channel counter for Pair B's input FIFO" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 0.--3. " ACIA ,The channel counter for Pair A's input FIFO" "0,1,2,3,4,5,6,7,8,9,?..." wgroup.long 0x60++0x03 line.long 0x00 "ASRDIA,Data Input Register for Pair A" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data input" wgroup.long 0x68++0x03 line.long 0x00 "ASRDIB,Data Input Register for Pair B" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data input" wgroup.long 0x70++0x03 line.long 0x00 "ASRDIC,Data Input Register for Pair C" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data input" rgroup.long 0x64++0x03 line.long 0x00 "ASRDOA,Data Output Register for Pair A" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data output" rgroup.long 0x6C++0x03 line.long 0x00 "ASRDOB,Data Output Register for Pair B" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data output" rgroup.long 0x74++0x03 line.long 0x00 "ASRDOC,Data Output Register for Pair C" hexmask.long.tbyte 0x00 0.--23. 1. " DATA ,Audio data output" group.long 0x80++0x23 line.long 0x00 "ASRIDRHA,Ideal Ratio for Pair A-High Part" hexmask.long.byte 0x00 0.--7. 1. " IDRATIOA ,IDRATIOA High part of ideal ratio value for pair A" line.long 0x04 "ASRIDRLA,Ideal Ratio for Pair A -Low Part" hexmask.long.tbyte 0x04 0.--23. 1. " IDRATIOA ,IDRATIOA Low part of ideal ratio value for pair A" line.long 0x08 "ASRIDRHB,ASRC Ideal Ratio for Pair B-High Part" hexmask.long.byte 0x08 0.--7. 1. " IDRATIOB ,IDRATIOB High part of ideal ratio value for pair B" line.long 0x0C "ASRIDRLB,Ideal Ratio for Pair B-Low Part" hexmask.long.tbyte 0x0C 0.--23. 1. " IDRATIOB ,IDRATIOB Low part of ideal ratio value for pair B" line.long 0x10 "ASRIDRHC,Ideal Ratio for Pair C-High Part" hexmask.long.byte 0x10 0.--7. 1. " IDRATIOC ,IDRATIOC High part of ideal ratio value for pair C" line.long 0x14 "ASRIDRLC,Ideal Ratio for Pair C-Low Part" hexmask.long.tbyte 0x14 0.--23. 1. " IDRATIOC ,IDRATIOC Low part of ideal ratio value for pair C" line.long 0x18 "ASR76K,76kHz Period in terms of ASRC processing clock" hexmask.long.tbyte 0x18 0.--16. 1. " ASR76K ,Value for the period of the 76kHz sampling clock" line.long 0x1C "ASR56K,56kHz Period in terms of ASRC processing clock" hexmask.long.tbyte 0x1C 0.--16. 1. " ASR56K ,Value for the period of the 56kHz sampling clock" line.long 0x20 "ASRMCRA,Misc Control Register for Pair A" bitfld.long 0x20 23. " ZEROBUFA ,Zeroize the buffer" "Enabled,Disabled" bitfld.long 0x20 22. " EXTTHRSHA ,External thresholds for FIFO control of Pair A" "Default,External" bitfld.long 0x20 21. " BUFSTALLA ,Stall Pair A conversion in case of Buffer Near Empty/Full Condition" "Disabled,Enabled" textline " " bitfld.long 0x20 20. " BYPASSPOLYA ,Bypass Polyphase Filtering for Pair A" "Disabled,Enabled" bitfld.long 0x20 12.--17. " OUTFIFO_THRESHOLDA ,The threshold for Pair A's output FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 11. " RSYNIFA ,Re-sync Input FIFO Channel Counter" "Disabled,Enabled" textline " " bitfld.long 0x20 10. " RSYNOFA ,Re-sync Output FIFO Channel Counter" "Disabled,Enabled" bitfld.long 0x20 0.--5. " INFIFO_THRESHOLDA ,The threshold for Pair A's input FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0xA4++0x03 line.long 0x00 "ASRFSTA,FIFO Status Register for Pair A" bitfld.long 0x00 23. " OAFA ,Output FIFO is near Full for Pair A" "Disabled,Enabled" hexmask.long.byte 0x00 12.--18. 1. " OUTFIFO_FILLA ,The fillings for Pair A's output FIFO per channel" bitfld.long 0x00 11. " IAEA ,Input FIFO is near Empty for Pair A" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--6. 1. " INFIFO_FILLA ,The fillings for Pair A's input FIFO per channel" group.long 0xA8++0x03 line.long 0x00 "ASRMCRB,Misc Control Register for Pair B" bitfld.long 0x00 23. " ZEROBUFB ,Zeroize the buffer" "Enabled,Disabled" bitfld.long 0x00 22. " EXTTHRSHB ,External thresholds for FIFO control of Pair B" "Default,External" bitfld.long 0x00 21. " BUFSTALLB ,Stall Pair B conversion in case of Buffer Near Empty/Full Condition" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " BYPASSPOLYB ,Bypass Polyphase Filtering for Pair B" "Disabled,Enabled" bitfld.long 0x00 12.--17. " OUTFIFO_THRESHOLDB ,The threshold for Pair B's output FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 11. " RSYNIFB ,Re-sync Input FIFO Channel Counter" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RSYNOFB ,Re-sync Output FIFO Channel Counter" "Disabled,Enabled" bitfld.long 0x00 0.--5. " INFIFO_THRESHOLDB ,The threshold for Pair B's input FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0xAC++0x03 line.long 0x00 "ASRFSTB,FIFO Status Register for Pair B" bitfld.long 0x00 23. " OAFB ,Output FIFO is near Full for Pair B" "Disabled,Enabled" hexmask.long.byte 0x00 12.--18. 1. " OUTFIFO_FILLB ,The fillings for Pair B's output FIFO per channel" bitfld.long 0x00 11. " IAEB ,Input FIFO is near Empty for Pair B" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--6. 1. " INFIFO_FILLB ,The fillings for Pair B's input FIFO per channel" group.long 0xB0++0x03 line.long 0x00 "ASRMCRC,Misc Control Register for Pair C" bitfld.long 0x00 23. " ZEROBUFC ,Zeroize the buffer" "Enabled,Disabled" bitfld.long 0x00 22. " EXTTHRSHC ,External thresholds for FIFO control of Pair C" "Default,External" bitfld.long 0x00 21. " BUFSTALLC ,Stall Pair C conversion in case of Buffer Near Empty/Full Condition" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " BYPASSPOLYC ,Bypass Polyphase Filtering for Pair C" "Disabled,Enabled" bitfld.long 0x00 12.--17. " OUTFIFO_THRESHOLDC ,The threshold for Pair C's output FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 11. " RSYNIFC ,Re-sync Input FIFO Channel Counter" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RSYNOFC ,Re-sync Output FIFO Channel Counter" "Disabled,Enabled" bitfld.long 0x00 0.--5. " INFIFO_THRESHOLDC ,The threshold for Pair C's input FIFO per channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0xB4++0x03 line.long 0x00 "ASRFSTC,FIFO Status Register for Pair C" bitfld.long 0x00 23. " OAFC ,Output FIFO is near Full for Pair C" "Disabled,Enabled" hexmask.long.byte 0x00 12.--18. 1. " OUTFIFO_FILLC ,The fillings for Pair C's output FIFO per channel" bitfld.long 0x00 11. " IAEC ,Input FIFO is near Empty for Pair C" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--6. 1. " INFIFO_FILLC ,The fillings for Pair C's input FIFO per channel" group.long 0xC0++0xB line.long 0x0 "ASRMCR1A,Misc Control Register 1 for Pair A" bitfld.long 0x0 9.--11. " IWD ,Data Width of the input FIFO" "24-bit,16-bit,8-bit,?..." bitfld.long 0x0 8. " IMSB ,Data Alignment (Input FIFO)" "LSB,MSB" bitfld.long 0x0 2. " OMSB ,Data Alignment (Output FIFO)" "LSB,MSB" textline " " bitfld.long 0x0 1. " OSGN ,Sign Extension Option (Output FIFO)" "Disabled,Enabled" bitfld.long 0x0 0. " OW16 ,Bit Width Option (Output FIFO)" "24-bit,16-bit" line.long 0x4 "ASRMCR1B,Misc Control Register 1 for Pair B" bitfld.long 0x4 9.--11. " IWD ,Data Width of the input FIFO" "24-bit,16-bit,8-bit,?..." bitfld.long 0x4 8. " IMSB ,Data Alignment (Input FIFO)" "LSB,MSB" bitfld.long 0x4 2. " OMSB ,Data Alignment (Output FIFO)" "LSB,MSB" textline " " bitfld.long 0x4 1. " OSGN ,Sign Extension Option (Output FIFO)" "Disabled,Enabled" bitfld.long 0x4 0. " OW16 ,Bit Width Option (Output FIFO)" "24-bit,16-bit" line.long 0x8 "ASRMCR1C,Misc Control Register 1 for Pair C" bitfld.long 0x8 9.--11. " IWD ,Data Width of the input FIFO" "24-bit,16-bit,8-bit,?..." bitfld.long 0x8 8. " IMSB ,Data Alignment (Input FIFO)" "LSB,MSB" bitfld.long 0x8 2. " OMSB ,Data Alignment (Output FIFO)" "LSB,MSB" textline " " bitfld.long 0x8 1. " OSGN ,Sign Extension Option (Output FIFO)" "Disabled,Enabled" bitfld.long 0x8 0. " OW16 ,Bit Width Option (Output FIFO)" "24-bit,16-bit" width 0x0B tree.end endif tree "AUDMUX (Digital Audio Mux)" base ad:0x021D8000 width 8. group.long (0x00+0x0)++0x07 "Port 1" line.long 0x00 "PTCR1,Port Timing Control Register 1" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR1,Port Data Control Register 1" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x8)++0x07 "Port 2" line.long 0x00 "PTCR2,Port Timing Control Register 2" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR2,Port Data Control Register 2" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x10)++0x07 "Port 3" line.long 0x00 "PTCR3,Port Timing Control Register 3" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR3,Port Data Control Register 3" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x18)++0x07 "Port 4" line.long 0x00 "PTCR4,Port Timing Control Register 4" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR4,Port Data Control Register 4" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x20)++0x07 "Port 5" line.long 0x00 "PTCR5,Port Timing Control Register 5" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR5,Port Data Control Register 5" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x28)++0x07 "Port 6" line.long 0x00 "PTCR6,Port Timing Control Register 6" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR6,Port Data Control Register 6" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" group.long (0x00+0x30)++0x07 "Port 7" line.long 0x00 "PTCR7,Port Timing Control Register 7" bitfld.long 0x00 31. " TFSDIR ,Transmit Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 30. " TFSEL[3] ,Transmit Frame Sync Select" "TxFS,RxFS" bitfld.long 0x00 27.--29. " TFSEL[2:0] ,Transmit Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 26. " TCLKDIR ,Transmit Clock Direction Control" "Input,Output" textline " " bitfld.long 0x00 25. " TCSEL[3] ,Transmit Clock Select" "TxClk,RxClk" bitfld.long 0x00 22.--24. " TCSEL[2:0] ,Transmit Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 21. " RFSDIR ,Receive Frame Sync Direction Control" "Input,Output" bitfld.long 0x00 20. " RFSEL[3] ,Receive Frame Sync Select" "TxFS,RxFS" textline " " bitfld.long 0x00 17.--19. " RFSEL[2:0] ,Receive Frame Sync Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x00 16. " RCLKDIR ,Receive Clock Direction Control" "Input,Output" bitfld.long 0x00 15. " RCSEL[3] ,Receive Clock Select" "TxClk,RxClk" bitfld.long 0x00 12.--14. " RCSEL[2:0] ,Receive Clock Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." textline " " bitfld.long 0x00 11. " SYN ,Synchronous/Asynchronous Select" "Asynchronous,Synchronous" line.long 0x04 "PDCR7,Port Data Control Register 7" bitfld.long 0x04 13.--15. " RXDSEL[2:0] ,Receive Data Select" "Port 1,Port 2,Port 3,Port 4,Port 5,Port 6,Port 7,?..." bitfld.long 0x04 12. " TXRXEN ,Transmit/Receive Switch Enable" "No switch,Switch" bitfld.long 0x04 8. " MODE ,Mode Select" "Normal,Internal Network" bitfld.long 0x04 7. " INMMASK7 ,Internal Network Mode Mask 7" "Included,Excluded" textline " " bitfld.long 0x04 6. " INMMASK6 ,Internal Network Mode Mask 6" "Included,Excluded" bitfld.long 0x04 5. " INMMASK5 ,Internal Network Mode Mask 5" "Included,Excluded" bitfld.long 0x04 4. " INMMASK4 ,Internal Network Mode Mask 4" "Included,Excluded" bitfld.long 0x04 3. " INMMASK3 ,Internal Network Mode Mask 3" "Included,Excluded" textline " " bitfld.long 0x04 2. " INMMASK2 ,Internal Network Mode Mask 2" "Included,Excluded" bitfld.long 0x04 1. " INMMASK1 ,Internal Network Mode Mask 1" "Included,Excluded" bitfld.long 0x04 0. " INMMASK0 ,Internal Network Mode Mask 0" "Included,Excluded" ;group.long 0x38++0x03 "CE Bus Network Mode Control" ; line.long 0x00 "CNMCR,CE Bus Network Mode Control Register" ; bitfld.long 0x00 18. " CEN ,CE Bus Enable" "Held low,Generated" ; bitfld.long 0x00 17. " FSPOL ,Frame Sync Polarity Select" "0,1" ; bitfld.long 0x00 16. " CLKPOL ,Clock Sync Polarity Select" "0,1" ; hexmask.long.byte 0x00 8.--15. 1. " CNTHI[7:0] ,CE Bus Disable Signal High Period Count" ; textline " " ; hexmask.long.byte 0x00 0.--7. 1. " CNTLOW[7:0] ,CE Bus Disable Signal Low Period Count" width 0xb tree.end sif (cpu()!="IMX6SOLOLITE") tree "BCH (40-Bit Correcting ECC Accelerator)" base ad:0x00114000 width 22. group.long 0x00++0x03 line.long 0x00 "HW_BCH_CTRL,Hardware BCH ECC Accelerator Control Register" bitfld.long 0x00 31. " SFTRST ,BCH software reset" "No reset,Reset" bitfld.long 0x00 30. " CLKGATE ,Clock BCH gates" "Clocked,Not clocked" bitfld.long 0x00 22. " DEBUGSYNDROME ,Debug syndromes enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " M2M_LAYOUT ,Flash page format for memory-to-memory operations" "0,1,2,3" textline " " bitfld.long 0x00 17. " M2M_ENCODE ,Encode/decode mode for memory-to-memory operations" "Decode mode,Encode mode" bitfld.long 0x00 16. " M2M_ENABLE ,M2M enable" "Disabled,Enabled" bitfld.long 0x00 10. " DEBUG_STALL_IRQ_EN ,Debug stall mode interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " COMPLETE_IRQ_EN ,Completion of correction interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BM_ERROR_IRQ ,AHB Bus interface Error Interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " DEBUG_STALL_IRQ ,Debug stall Interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " COMPLETE_IRQ ,External interrupt line status" "No interrupt,Interrupt" rgroup.long 0x10++0x3 line.long 0x00 "HW_BCH_STATUS0,Hardware ECC Accelerator Status Register 0" hexmask.long.word 0x00 20.--31. 1. " HANDLE ,12 bit handle" bitfld.long 0x00 16.--19. " COMPLETED_CE ,Chip enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. " STATUS_BLK0 ,BLK0 status" bitfld.long 0x00 4. " ALLONES ,Set all transaction bits to ones" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CORRECTED ,At least one correctable error encountered" "Not encountered,Encountered" bitfld.long 0x00 2. " UNCORRECTABLE ,Uncorrectable error encountered" "Not encountered,Encountered" group.long 0x20++0x3 line.long 0x00 "HW_BCH_MODE,Hardware ECC Accelerator Mode Register" hexmask.long.byte 0x00 0.--7. 1. " ERASE_THRESHOLD ,Maximum number of zero bits on a flash page" group.long 0x30++0x3 line.long 0x00 "HW_BCH_ENCODEPTR,Hardware BCH ECC Loopback Encode Buffer Register" group.long 0x40++0x3 line.long 0x00 "HW_BCH_DATAPTR,Hardware BCH ECC Loopback Data Buffer Register" group.long 0x50++0x3 line.long 0x00 "HW_BCH_METAPTR,Hardware BCH ECC Loopback Metadata Buffer Register" textline " " group.long 0x70++0x3 line.long 0x00 "HW_BCH_LAYOUTSELECT,Hardware ECC Accelerator Layout Select Register" bitfld.long 0x00 30.--31. " CS15_SELECT ,Chip 15 layout select" "0,1,2,3" bitfld.long 0x00 28.--29. " CS14_SELECT ,Chip 14 layout select" "0,1,2,3" bitfld.long 0x00 26.--27. " CS13_SELECT ,Chip 13 layout select" "0,1,2,3" bitfld.long 0x00 24.--25. " CS12_SELECT ,Chip 12 layout select" "0,1,2,3" textline " " bitfld.long 0x00 22.--23. " CS11_SELECT ,Chip 11 layout select" "0,1,2,3" bitfld.long 0x00 20.--21. " CS10_SELECT ,Chip 10 layout select" "0,1,2,3" bitfld.long 0x00 18.--19. " CS9_SELECT ,Chip 9 layout select" "0,1,2,3" bitfld.long 0x00 16.--17. " CS8_SELECT ,Chip 8 layout select" "0,1,2,3" textline " " bitfld.long 0x00 14.--15. " CS7_SELECT ,Chip 7 layout select" "0,1,2,3" bitfld.long 0x00 12.--13. " CS6_SELECT ,Chip 6 layout select" "0,1,2,3" bitfld.long 0x00 10.--11. " CS5_SELECT ,Chip 5 layout select" "0,1,2,3" bitfld.long 0x00 8.--9. " CS4_SELECT ,Chip 4 layout select" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " CS3_SELECT ,Chip 3 layout select" "0,1,2,3" bitfld.long 0x00 4.--5. " CS2_SELECT ,Chip 2 layout select" "0,1,2,3" bitfld.long 0x00 2.--3. " CS1_SELECT ,Chip 1 layout select" "0,1,2,3" bitfld.long 0x00 0.--1. " CS0_SELECT ,Chip 0 layout select" "0,1,2,3" group.long 0x80++0x3 line.long 0x00 "HW_BCH_FLASH0LAYOUT0,Hardware BCH ECC Flash 0 Layout 0 Register" hexmask.long.byte 0x00 24.--31. 1. " NBLOCKS ,Number of subsequent blocks on the flash page" hexmask.long.byte 0x00 16.--23. 1. " META_SIZE ,Metadata size" bitfld.long 0x00 11.--15. " ECC0 ,ECC level for block 0" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" textline " " hexmask.long.word 0x00 0.--9. 1. " DATA0_SIZE ,Data 0 block size" group.long (0x80+0x10)++0x3 line.long 0x00 "HW_BCH_FLASH0LAYOUT1,Hardware BCH ECC Flash 0 Layout 1 Register" hexmask.long.word 0x00 16.--31. 1. " PAGE_SIZE ,Flash page size" bitfld.long 0x00 11.--15. " ECCN ,ECC level for blocks 0-n" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" hexmask.long.word 0x00 0.--9. 1. " DATAN_SIZE ,Size of the subsequent data blocks" group.long 0xA0++0x3 line.long 0x00 "HW_BCH_FLASH1LAYOUT0,Hardware BCH ECC Flash 1 Layout 0 Register" hexmask.long.byte 0x00 24.--31. 1. " NBLOCKS ,Number of subsequent blocks on the flash page" hexmask.long.byte 0x00 16.--23. 1. " META_SIZE ,Metadata size" bitfld.long 0x00 11.--15. " ECC0 ,ECC level for block 0" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" textline " " hexmask.long.word 0x00 0.--9. 1. " DATA0_SIZE ,Data 0 block size" group.long (0xA0+0x10)++0x3 line.long 0x00 "HW_BCH_FLASH1LAYOUT1,Hardware BCH ECC Flash 1 Layout 1 Register" hexmask.long.word 0x00 16.--31. 1. " PAGE_SIZE ,Flash page size" bitfld.long 0x00 11.--15. " ECCN ,ECC level for blocks 0-n" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" hexmask.long.word 0x00 0.--9. 1. " DATAN_SIZE ,Size of the subsequent data blocks" group.long 0xC0++0x3 line.long 0x00 "HW_BCH_FLASH2LAYOUT0,Hardware BCH ECC Flash 2 Layout 0 Register" hexmask.long.byte 0x00 24.--31. 1. " NBLOCKS ,Number of subsequent blocks on the flash page" hexmask.long.byte 0x00 16.--23. 1. " META_SIZE ,Metadata size" bitfld.long 0x00 11.--15. " ECC0 ,ECC level for block 0" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" textline " " hexmask.long.word 0x00 0.--9. 1. " DATA0_SIZE ,Data 0 block size" group.long (0xC0+0x10)++0x3 line.long 0x00 "HW_BCH_FLASH2LAYOUT1,Hardware BCH ECC Flash 2 Layout 1 Register" hexmask.long.word 0x00 16.--31. 1. " PAGE_SIZE ,Flash page size" bitfld.long 0x00 11.--15. " ECCN ,ECC level for blocks 0-n" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" hexmask.long.word 0x00 0.--9. 1. " DATAN_SIZE ,Size of the subsequent data blocks" group.long 0xE0++0x3 line.long 0x00 "HW_BCH_FLASH3LAYOUT0,Hardware BCH ECC Flash 3 Layout 0 Register" hexmask.long.byte 0x00 24.--31. 1. " NBLOCKS ,Number of subsequent blocks on the flash page" hexmask.long.byte 0x00 16.--23. 1. " META_SIZE ,Metadata size" bitfld.long 0x00 11.--15. " ECC0 ,ECC level for block 0" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" textline " " hexmask.long.word 0x00 0.--9. 1. " DATA0_SIZE ,Data 0 block size" group.long (0xE0+0x10)++0x3 line.long 0x00 "HW_BCH_FLASH3LAYOUT1,Hardware BCH ECC Flash 3 Layout 1 Register" hexmask.long.word 0x00 16.--31. 1. " PAGE_SIZE ,Flash page size" bitfld.long 0x00 11.--15. " ECCN ,ECC level for blocks 0-n" "NONE,ECC2,ECC4,ECC6,ECC8,ECC10,ECC12,ECC14,ECC16,ECC18,ECC20,ECC22,ECC24,ECC26,ECC28,ECC30,ECC32,ECC32,ECC34,ECC36,ECC38,ECC40,?..." bitfld.long 0x00 10. " GF13_0_GF14_1 ,GF13/GF14 select" "GF13,GF14" hexmask.long.word 0x00 0.--9. 1. " DATAN_SIZE ,Size of the subsequent data blocks" textline " " group.long 0x100++0x03 line.long 0x00 "HW_BCH_DEBUG0,Hardware BCH ECC Debug Register 0" hexmask.long.word 0x00 16.--24. 1. " KES_DEBUG_SYNDROME_SYMBOL ,KES debug syndrome symbol" bitfld.long 0x00 15. " KES_DEBUG_SHIFT_SYND ,KES debug syndrome shift" "Not shifted,Shifted" bitfld.long 0x00 14. " KES_DEBUG_PAYLOAD_FLAG ,KES debug payload flag" "0,1" bitfld.long 0x00 13. " KES_DEBUG_MODE4K ,KES debug input mode" "0,1" textline " " bitfld.long 0x00 12. " KES_DEBUG_KICK ,KES debug kick" "Not kicked,Kicked" bitfld.long 0x00 11. " KES_STANDALONE ,KES standalone" "Normal,TEST_MODE" bitfld.long 0x00 10. " KES_DEBUG_STEP ,KES debug step" "Not stepped,Stepped" bitfld.long 0x00 9. " KES_DEBUG_STALL ,KES debug stall" "Normal,Wait" textline " " bitfld.long 0x00 8. " BM_KES_TEST_BYPASS ,BM KES test bypass" "Normal,TEST_MODE" bitfld.long 0x00 0.--5. " DEBUG_REG_SELECT ,Internal register state view value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x110++0x3 line.long 0x00 "HW_BCH_DBGKESREAD,KES Debug Read Register" rgroup.long 0x150++0x3 line.long 0x00 "HW_BCH_BLOCKNAME,Block Name Register" rgroup.long 0x160++0x3 line.long 0x00 "HW_BCH_VERSION,BCH Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of the RTL version" rgroup.long 0x170++0x3 line.long 0x00 "BCH_DEBUG1,Hardware BCH ECC Debug Register 1" bitfld.long 0x00 31. " DEBUG1_PREERASECHK ,Blank page pre-erase check enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 1. " ERASED_ZERO_COUNT ,The zero counts on one page" width 0xb tree.end endif tree.open "CCM (Clock Controller Module)" tree "CCM (Clock Controller Module)" base ad:0x020C4000 width 13. group.long 0x00++0x07 line.long 0x00 "CCM_CCR,CCM Control Register" bitfld.long 0x00 27. " RBC_EN ,Enable for REG_BYPASS_COUNTER" "Enabled,Disabled" bitfld.long 0x00 21.--26. " REG_BYPASS_COUNT ,Counter for anatop_reg_bypass signal assertion" "No delay,1 CKIL,2 CKIL,3 CKIL,4 CKIL,5 CKIL,6 CKIL,7 CKIL,8 CKIL,9 CKIL,10 CKIL,11 CKIL,12 CKIL,13 CKIL,14 CKIL,15 CKIL,16 CKIL,17 CKIL,18 CKIL,19 CKIL,20 CKIL,21 CKIL,22 CKIL,23 CKIL,24 CKIL,25 CKIL,26 CKIL,27 CKIL,28 CKIL,29 CKIL,30 CKIL,31 CKIL,32 CKIL,33 CKIL,34 CKIL,35 CKIL,36 CKIL,37 CKIL,38 CKIL,39 CKIL,40 CKIL,41 CKIL,42 CKIL,43 CKIL,44 CKIL,45 CKIL,46 CKIL,47 CKIL,48 CKIL,49 CKIL,50 CKIL,51 CKIL,52 CKIL,53 CKIL,54 CKIL,55 CKIL,56 CKIL,57 CKIL,58 CKIL,59 CKIL,60 CKIL,61 CKIL,62 CKIL,63 CKIL" bitfld.long 0x00 16.--18. " WB_COUNT ,Well Bias counter" "No delay,1 CKIL,2 CKIL,3 CKIL,4 CKIL,5 CKIL,6 CKIL,7 CKIL" textline " " bitfld.long 0x00 12. " COSC_EN ,On chip oscillator enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " OSCNT ,Oscillator ready counter value" line.long 0x04 "CCM_CCDR,CCM Control Divider Register" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x04 17. " MMDC_CH0_MASK ,Mask handshake with MMDC_CH0 module" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MMDC_CH1_MASK ,Mask handshake with MMDC_CH1 module" "Not masked,Masked" else bitfld.long 0x04 16. " MMDC_CH1_MASK ,Mask handshake with MMDC_CH1 module" "Not masked,Masked" endif rgroup.long 0x08++0x03 line.long 0x00 "CCM_CSR,CCM Status Register" bitfld.long 0x00 5. " COSC_READY ,Status indication of on board oscillator" "Not ready,Ready" bitfld.long 0x00 0. " REF_EN_B ,Status of the value of REF_EN_B output of CCM" "0,1" group.long 0x0c++0x33 line.long 0x00 "CCM_CCSR,CCM Clock Switcher Register" bitfld.long 0x00 15. " PDF_540M_DIS_MASK ,Mask of 540M PFD auto-disable" "Masked,Not masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 14. " PDF_720M_DIS_MASK ,Mask of 720M PFD auto-disable" "Masked,Not masked" bitfld.long 0x00 13. " PDF_454M_DIS_MASK ,Mask of 454M PFD auto-disable" "Masked,Not masked" endif textline " " bitfld.long 0x00 12. " PDF_508M_DIS_MASK ,Mask of 508M PFD auto-disable" "Masked,Not masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 11. " PDF_594M_DIS_MASK ,Mask of 594M PFD auto-disable" "Masked,Not masked" bitfld.long 0x00 10. " PDF_352M_DIS_MASK ,Mask of 352M PFD auto-disable" "Masked,Not masked" elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 11. " PDF_528M_DIS_MASK ,Mask of 528M PFD auto-disable" "Masked,Not masked" bitfld.long 0x00 10. " PDF_307M_DIS_MASK ,Mask of 307M PFD auto-disable" "Masked,Not masked" endif textline " " bitfld.long 0x00 9. " PDF_396M_DIS_MASK ,Mask of 396M PFD auto-disable" "Masked,Not masked" bitfld.long 0x00 8. " STEP_SEL ,Step frequency when shifting ARM frequency" "Source 4,PLL2 PDF clock" bitfld.long 0x00 2. " PLL1_SW_CLK_SEL ,Selects source to generate PLL1_SW_CLK" "PLL1_MAIN_CLK,STEP_CLK" sif (cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 1. " PLL2_SW_CLK_SEL ,Selects source to generate PLL2_SW_CLK" "Pll2_main_clk,Pll2 bypass" endif textline " " bitfld.long 0x00 0. " PLL3_SW_CLK_SEL ,Source to generate pll3_sw_clk" "PLL3_MAIN_CLK,Pll3 bypass" line.long 0x04 "CCM_CACRR,CCM Arm Clock Root Register" bitfld.long 0x04 0.--2. " ARM_PODF ,Divider for ARM clock root" "/1,/2,/3,/4,/5,/6,/7,/8" line.long 0x08 "CCM_CBCDR,CCM Bus Clock Divider Register" bitfld.long 0x08 27.--29. " PERIPH_CLK2_PODF ,Divider for periph2 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x08 26. " PERIPH2_CLK_SEL ,Selector for peripheral2 main clock" "PLL2_SW_CLK,PERIPH_CLK2_CLK" sif (cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x08 25. " PERIPH_CLK_SEL ,Selector for peripheral main clock" "PLL2_SW_CLK,PERIPH_CLK2_CLK" bitfld.long 0x08 19.--21. " MMDC_CH0_AXI_PODF ,Divider for MMDC_CH0_AXI podf" "/1,/2,/3,/4,/5,/6,/7,/8" endif textline " " bitfld.long 0x08 16.--18. " AXI_PODF ,Divider for axi podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x08 10.--12. " AHB_PODF ,Divider for ahb podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x08 8.--9. " IPG_PODF ,Divider for ipg podf" "/1,/2,/3,/4" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x08 7. " AXI_ALT_SEL ,AXI alternative clock select" "pll2 396MHz,pll3 540MHz" bitfld.long 0x08 6. " AXI_SEL ,AXI clock source select" "Periph_clk output,AXI alternative clock" bitfld.long 0x08 3.--5. " MMDC_CH1/CB_AXI_PODF ,Divider for MMDC_CH1_AXI podf" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x08 0.--2. " PERIPH2_PODF2_PODF ,Divider for PERIPH2_CLK2 podf" "/1,/2,/3,/4,/5,/6,/7,/8" else bitfld.long 0x08 7. " ORCAM_ALT_CLK_SEL ,CRAM alternative clock select" "PLL2 PFD2,PLL3 PFD1" bitfld.long 0x08 6. " ORCAM_CLK_SEL ,OCRAM clock source selectt" "Periph_clk output,AXI alternative clock" bitfld.long 0x08 3.--5. " FABRIC_MMDC_PODF ,Post divider for fabric / mmdc clock" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x08 0.--2. " PERIPH2_CLK2_PODF ,Divider for PERIPH2_CLK2 podf" "/1,/2,/3,/4,/5,/6,/7,/8" endif line.long 0x0c "CCM_CBCMR,CCM Bus Clock Multiplexer Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0c 29.--31. " GPU2D_CORE_PODF ,Divider for gpu2d_core clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 26.--28. " GPU3D_CORE_PODF ,Divider for GPU3D_CORE clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 23.--25. " EPDC_PIX_PODF ,Post divider for EPDC_PIX" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x0c 21.--22. " PRE_PERIPH2_CLK_SEL ,Selector for PRE_PERIPH2 clock multiplexer" "528MHz PLL2,396MHz PLL2 PFD,307MHz PLL2 PFD,198MHz clock" elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x0c 29.--31. " GPU2D_CORE_PODF ,Divider for gpu2d_core clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 26.--28. " GPU3D_CORE_PODF ,Divider for GPU3D_CORE clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 23.--25. " MLB_SYS_CLK_PODF ,Divider for MLB_SYS_CLK_PODF clock" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x0c 21.--22. " PRE_PERIPH2_CLK_SEL ,Selector for PRE_PERIPH2 clock multiplexer" "528MHz PLL2,396MHz PLL2 PFD,307MHz PLL2 PFD,198MHz clock" else bitfld.long 0x0c 29.--31. " GPU3D_SHADER_PODF ,Divider for GPU3D_SHADER clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 26.--28. " GPU3D_CORE_PODF ,Divider for GPU3D_CORE clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x0c 23.--25. " GPU2D_CORE_PODF ,Divider for GPU2D_CORE clock" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x0c 21.--22. " PRE_PERIPH2_CLK_SEL ,Selector for PRE_PERIPH2 clock multiplexer" "528MHz PLL2,396MHz PLL2 PFD,352MHz PLL2 PFD,198MHz clock" endif bitfld.long 0x0c 20. " PERIPH2_CLK2_SEL ,Selector for PERIPH2_CLK2 clock multiplexer" "PLL3_SW_CLK,PLL2_MAIN" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0c 18.--19. " PRE_PERIPH_CLK_SEL ,Selector for PRE_PERIPH clock multiplexer" "PLL2,PLL2 PFD2,PLL2 PFD0,PLL2 PFD2 (/2)" textline " " elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x0c 18.--19. " PRE_PERIPH_CLK_SEL ,Selector for PRE_PERIPH clock multiplexer" "528MHz PLL2,396MHz PLL2 PFD,307MHz PLL2 PFD,198MHz clock" bitfld.long 0x0c 16.--17. " MLB_SYS_SEL ,SSelector for MLB clock multiplexer" "Axi,PLL3,307M PFD,396M PFD" bitfld.long 0x0c 14.--15. " VPU_AXI_CLK_SEL ,Selector for VPU axi clock multiplexer" "Axi,396M PFD,307M PFD,?..." textline " " else bitfld.long 0x0c 18.--19. " PRE_PERIPH_CLK_SEL ,Selector for PRE_PERIPH clock multiplexer" "528MHz PLL2,396MHz PLL2 PFD,352MHz PLL2 PFD,198MHz clock" bitfld.long 0x0c 16.--17. " GPU2D_CLK_SEL ,Selector for open vg clock multiplexer" "Axi,PLL3,352M PFD,396M PFD" bitfld.long 0x0c 14.--15. " VPU_AXI_CLK_SEL ,Selector for VPU axi clock multiplexer" "Axi,396M PFD,352M PFD,?..." textline " " endif bitfld.long 0x0c 12.--13. " PERIPH_CLK2_SEL ,Selector for peripheral CLK2 clock multiplexer" "PLL3_SW_CLK,PLL1_REF_CLK,PLL2_BURN_IN_CLK,?..." sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x0c 11. " VDOAXI_CLK_SEL ,Selector for VDOAXI clock multiplexer" "AXI,AHB" bitfld.long 0x0c 8.--9. " GPU2D_CORE_SEL ,Selector for GPU2D_CORE_SEL clock multiplexer" "MMDC_CH0_CLK,PLL3_SW_CLK,PFD1,PFD0" bitfld.long 0x0c 4.--5. " GPU2D_CORE_CLK_SEL ,Selector for GPU2D_CORE clock multiplexer" "0,1,2,3" elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x0c 11. " VDOAXI_CLK_SEL ,Selector for VDOAXI clock multiplexer" "Axi,132M clock" bitfld.long 0x0c 10. " PCIE_AXI_CLK_SEL ,Selector for pcie_axi clock multiplexer" "Axi,133M clock" bitfld.long 0x0c 8.--9. " GPU2D_CORE_SEL ,Selector for GPU2D_CORE_SEL clock multiplexer" "MMDC_CH0_CLK,PLL3,528M PFD,?..." textline " " bitfld.long 0x0c 4.--5. " GPU3D_CORE_CLK_SEL ,Selector for GPU3D_CORE clock multiplexer" "MMDC_CH0_CLK,PLL3,528M PFD,396M PFD" else textline " " bitfld.long 0x0c 11. " VDOAXI_CLK_SEL ,Selector for VDOAXI clock multiplexer" "Axi,132M clock" bitfld.long 0x0c 10. " PCIE_AXI_CLK_SEL ,Selector for pcie_axi clock multiplexer" "Axi,SYSTEM_133M CLK" bitfld.long 0x0c 8.--9. " GPU3D_SHADER_CLK_SEL ,Selector for GPU3D_SHADER clock multiplexer" "MMDC_CH0_CLK,PLL3,594M PFD,720M PFD" textline " " bitfld.long 0x0c 4.--5. " GPU3D_CORE_CLK_SEL ,Selector for GPU3D_CORE clock multiplexer" "MMDC_CH0_CLK,PLL3,594M PFD,396M PFD" bitfld.long 0x0c 1. " GPU3D_AXI_CLK_SEL ,Selector for GPU3D_AXI clock multiplexer" "Axi,SYSTEM_133M_CLK" bitfld.long 0x0c 0. " GPU2D_AXI_CLK_SEL ,Selector for GPU2D_AXI clock multiplexer" "Axi,SYSTEM_133M_CLK" endif line.long 0x10 "CCM_CSCMR1,CCM Serial Clock Multiplexer Register 1" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x10 29.--30. " ACLK_EIM_SLOW_SEL ,Selector for ACLK_EIM_SLOW root clock multiplexer" "AXI,PLL3_SW_CLK,PFD2,PDF0" bitfld.long 0x10 23.--25. " ACLK_EIM_SLOW_PODF ,Divider for ACLK_EIM_SLOW clock root" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x10 20.--22. " LCDIF_PIX_PODF ,Post divider for LCDIF_PIX" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x10 19. " USDHC4_CLK_SEL ,Selector for USDHC4 clock multiplexer" "PLL2 PFD2,PLL PFD0" bitfld.long 0x10 18. " USDHC3_CLK_SEL ,Selector for USDHC3 clock multiplexer" "PLL2 PFD2,PLL PFD0" bitfld.long 0x10 17. " USDHC2_CLK_SEL ,Selector for USDHC2 clock multiplexer" "PLL2 PFD2,PLL PFD0" textline " " bitfld.long 0x10 16. " USDHC1_CLK_SEL ,Selector for USDHC1 clock multiplexer" "PLL2 PFD2,PLL PFD0" bitfld.long 0x10 14.--15. " SSI3_CLK_SEL ,Selector for ssi3 clock multiplexer" "PLL3 PFD2,PLL3 PFD3,PLL4,?..." bitfld.long 0x10 12.--13. " SSI2_CLK_SEL ,Selector for ssi2 clock multiplexer" "PLL3 PFD2,PLL3 PFD3,PLL4,?..." textline " " bitfld.long 0x10 10.--11. " SSI1_CLK_SEL ,Selector for SSI1 clock multiplexer" "PLL3 PFD2,PLL3 PFD3,PLL4,?..." bitfld.long 0x10 6. " PERCLK_CLK_SEL ,Selector for the perclk clock multiplexor" "ipg clk root,osc_clk" elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x10 29.--30. " ACLK_EMI_SLOW_SEL ,Selector for ACLK_EMI_SLOW root clock multiplexer" "AXI clk root,PLL3,396M PFD,307M PDF" bitfld.long 0x10 27.--28. " ACLK_EMI_SEL ,Selector for ACLK_EMI root clock multiplexer" "396M PFD,PLL3,AXI clk root,307M PDF" textline " " bitfld.long 0x10 23.--25. " ACLK_EMI_SLOW_PODF ,Divider for ACLK_EMI_SLOW clock root" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x10 20.--22. " ACLK_EMI_PODF ,Divider for ACLK_EMI clock root" "/1,/2,/3,/4,/5,/6,/7,/8" else textline " " bitfld.long 0x10 29.--30. " ACLK_EMI_SLOW_SEL ,Selector for ACLK_EMI_SLOW root clock multiplexer" "AXI clk root,PLL3,396M PFD,352M PDF" bitfld.long 0x10 27.--28. " ACLK_EMI_SEL ,Selector for ACLK_EMI root clock multiplexer" "396M PFD,PLL3,AXI clk root,352M PDF" textline " " bitfld.long 0x10 23.--25. " ACLK_EMI_SLOW_PODF ,Divider for ACLK_EMI_SLOW clock root" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x10 20.--22. " ACLK_EMI_PODF ,Divider for ACLK_EMI clock root" "/1,/2,/3,/4,/5,/6,/7,/8" endif textline " " sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x10 19. " USDHC4_CLK_SEL ,Selector for USDHC4 clock multiplexer" "396M PFD,307M PFD" bitfld.long 0x10 18. " USDHC3_CLK_SEL ,Selector for USDHC3 clock multiplexer" "396M PFD,307M PFD" bitfld.long 0x10 17. " USDHC2_CLK_SEL ,Selector for USDHC2 clock multiplexer" "396M PFD,307M PFD" textline " " bitfld.long 0x10 16. " USDHC1_CLK_SEL ,Selector for USDHC1 clock multiplexer" "396M PFD,307M PFD" bitfld.long 0x10 14.--15. " SSI3_CLK_SEL ,Selector for ssi3 clock multiplexer" "508.2M PFD,,pll4,?..." bitfld.long 0x10 12.--13. " SSI2_CLK_SEL ,Selector for ssi2 clock multiplexer" "508.2M PFD,,pll4,?..." textline " " bitfld.long 0x10 10.--11. " SSI1_CLK_SEL ,Selector for SSI1 clock multiplexer" "508.2M PFD,,pll4,?..." bitfld.long 0x10 0.--5. " PERCLK_PODF ,Divider for PERCLK podf" "/1,/2,/3,/4,/5,/6,/7,/8,?..." elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x10 19. " USDHC4_CLK_SEL ,Selector for USDHC4 clock multiplexer" "396M PFD,352M PFD" bitfld.long 0x10 18. " USDHC3_CLK_SEL ,Selector for USDHC3 clock multiplexer" "396M PFD,352M PFD" bitfld.long 0x10 17. " USDHC2_CLK_SEL ,Selector for USDHC2 clock multiplexer" "396M PFD,352M PFD" textline " " bitfld.long 0x10 16. " USDHC1_CLK_SEL ,Selector for USDHC1 clock multiplexer" "396M PFD,352M PFD" bitfld.long 0x10 14.--15. " SSI3_CLK_SEL ,Selector for ssi3 clock multiplexer" "508.2M PFD,454.7M PFD,pll4,?..." bitfld.long 0x10 12.--13. " SSI2_CLK_SEL ,Selector for ssi2 clock multiplexer" "508.2M PFD,454.7M PFD,pll4,?..." textline " " bitfld.long 0x10 10.--11. " SSI1_CLK_SEL ,Selector for SSI1 clock multiplexer" "508.2M PFD,454.7M PFD,pll4,?..." bitfld.long 0x10 0.--5. " PERCLK_PODF ,Divider for PERCLK podf" "/1,/2,/3,/4,/5,/6,/7,/8,?..." endif line.long 0x14 "CCM_CSCMR2,CCM Serial Clock Multiplexer Register 2" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x14 19.--20. " ESAI_PRE_SEL ,Selector for ESAI predivider clock multiplexer" "pll4,508M PFD,,pll3" elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x14 19.--20. " ESAI_PRE_SEL ,Selector for ESAI predivider clock multiplexer" "pll4,508M PFD,454M PFD,pll3" endif sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x14 19.--20. " EXTERN_AUDIO_CLK_SEL ,Selector for external audio clock multiplexer" "PLL4,PLL3 PFD2,PLL3 PFD3,pll3_sw_clk" else textline " " bitfld.long 0x14 11. " LDB_DI1_IPU_DIV ,Control for divider of LDB clock for IPU di1" "/3.5,/7" bitfld.long 0x14 10. " LDB_DI0_IPU_DIV ,Control for divider of LDB clock for IPU di0" "/3.5,/7" bitfld.long 0x14 2.--7. " CAN_CLK_PODF ,Divider for CAN clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif line.long 0x18 "CCM_CSCDR1,CCM Serial Clock Divider Register 1" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x18 22.--24. " USDHC4_PODF ,Divider for USDHC4 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x18 19.--21. " USDHC3_PODF ,Divider for USDHC3 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x18 16.--18. " USDHC2_PODF ,Divider for USDHC2 clock" "/1,/2,/3,/4,/5,/6,/7,/8" else bitfld.long 0x18 25.--27. " VPU_AXI_PODF , Divider for vpu axi clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x18 22.--24. " USDHC4_PODF ,Divider for ESDHC4 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x18 19.--21. " USDHC3_PODF ,Divider for USDHC3 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x18 16.--18. " ESDHC2_PODF ,Divider for USDHC2 clock" "/1,/2,/3,/4,/5,/6,/7,/8" endif textline " " bitfld.long 0x18 11.--13. " USDHC1_PODF ,Divider for ESDHC1 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x18 6. " UART_CLK_SEL ,Selector for the UART clock multiplexor" "pll3_80m,osc_clk" bitfld.long 0x18 0.--5. " UART_CLK_PODF ,Divider for UART clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else bitfld.long 0x18 0.--5. " UART_CLK_PODF ,Divider for UART clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif line.long 0x1c "CCM_CS1CDR,CCM SSI1 Clock Divider Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x1c 25.--27. " EXTERN_AUDIO_CLK_SEL ,Divider for external audio clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x1c 22.--24. " SSI3_CLK_PRED ,Divider for SSI3 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x1c 16.--21. " SSI3_CLK_PODF ,Divider for SSI3 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.long 0x1c 9.--11. " EXTERN_AUDIO_CLK_PRED ,Divider for external audio clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" else bitfld.long 0x1c 25.--27. " ESAI_CLK_PODF ,Divider for ESAI clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x1c 22.--24. " SSI3_CLK_PRED ,Divider for SSI3 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x1c 16.--21. " SSI3_CLK_PODF ,Divider for SSI3 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.long 0x1c 9.--11. " ESAI_CLK_PRED ,Divider for esai clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" endif textline " " bitfld.long 0x1c 6.--8. " SSI1_CLK_PRED ,Divider for SSI1 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x1c 0.--5. " SSI1_CLK_PODF ,Divider for SSI1 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" line.long 0x20 "CCM_CS2CDR,CCM SSI2 Clock Divider Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x20 12.--14. " LDB_DI1_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 PDF0,PLL2 PFD2,MMDC_CH1 clock,PLL3_SW_CLK,?..." bitfld.long 0x20 9.--11. " LDB_DI0_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 PDF0,PLL2 PFD2,MMDC_CH1 clock,PLL3_SW_CLK,?..." else bitfld.long 0x20 21.--26. " ENFC_CLK_PODF ,Divider for ENFC clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" bitfld.long 0x20 18.--20. " ENFC_CLK_PRED ,Divider for ENFC clock pred divider" "/1,/2,/3,/4,/5,/6,/7,/8" endif sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x20 16.--17. " ENFC_CLK_SEL ,Selector for ENFC clock multiplexer" "PLL2 307M PDF,PLL2 clock,PLL3 clock,PLL2 396M PFD" bitfld.long 0x20 12.--14. " LDB_DI1_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 307M PDF,PLL2 396M PFD,MMDC_CH1 clock,PLL3 clock,?..." bitfld.long 0x20 9.--11. " LDB_DI0_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 307M PDF,PLL2 396M PFD,MMDC_CH1 clock,PLL3 clock,?..." elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x20 16.--17. " ENFC_CLK_SEL ,Selector for ENFC clock multiplexer" "PLL2 352M PDF,PLL2 clock,PLL3 clock,PLL2 396M PFD" bitfld.long 0x20 12.--14. " LDB_DI1_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 352M PDF,PLL2 396M PFD,MMDC_CH1 clock,PLL3 clock,?..." bitfld.long 0x20 9.--11. " LDB_DI0_CLK_SEL ,Selector for LDB_DI1 clock multiplexer" "PLL5 clock,PLL2 352M PDF,PLL2 396M PFD,MMDC_CH1 clock,PLL3 clock,?..." endif textline " " bitfld.long 0x20 6.--8. " SSI2_CLK_PRED ,Divider for SSI2 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x20 0.--5. " SSI2_CLK_PODF ,Divider for SSI2 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" line.long 0x24 "CCM_CDCDR,CCM DI Clock Divider Register" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x24 29.--31. " HSI_TX_PODF ,Divider for HSI_TX clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x24 28. " HSI_TX_CLK_SEL ,Selector for HSI_TX clock multiplexer" "PLL3 120M,PLL2 396M PDF" bitfld.long 0x24 25.--27. " SPDIF0_CLK_PRED ,Divider for SPDIF0 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" textline "" bitfld.long 0x24 22.--24. " SPDIF0_CLK_PODF ,Divider for SPDIF0 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" else bitfld.long 0x24 25.--27. " SPDIF0_CLK_PRED ,Divider for SPDIF0 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x24 22.--24. " SPDIF0_CLK_PODF ,Divider for SPDIF0 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" endif sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x24 20.--21. " SPDIF0_CLK_SEL ,Selector for SPDIF0 clock multiplexer" "Divided PLL4,PLL3 PFD2,PLL3 PFD3,pll3_sw_clk" elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x24 20.--21. " SPDIF0_CLK_SEL ,Selector for SPDIF0 clock multiplexer" "Divided PLL4,508M PFD,,PLL3 clock" else textline " " bitfld.long 0x24 20.--21. " SPDIF0_CLK_SEL ,Selector for SPDIF0 clock multiplexer" "Divided PLL4,508M PFD,454M PFD,PLL3 clock" endif textline " " bitfld.long 0x24 12.--14. " SPDIF1_CLK_PRED ,Divider for SPDIF1 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x24 9.--11. " SPDIF1_CLK_PODF ,Divider for SPDIF1 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x24 7.--8. " SPDIF1_CLK_SEL ,Selector for SPDIF1 clock multiplexer" "Divided PLL4,508M PFD,,PLL3 clock" elif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x24 7.--8. " SPDIF1_CLK_SEL ,Selector for SPDIF1 clock multiplexer" "Divided PLL4,PLL3 PFD2,PLL3 PFD3,pll3_sw_clk" else bitfld.long 0x24 7.--8. " SPDIF1_CLK_SEL ,Selector for SPDIF1 clock multiplexer" "Divided PLL4,508M PFD,454M PFD,PLL3 clock" endif line.long 0x28 "CCM_CHSCCDR,CCM HSC Clock Divider Register" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x28 15.--17. " IPU1_DI1_PRE_CLK_SEL ,Selector for IPU1 di1 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,307M PFD,396M PFD,540M PFD,?..." elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x28 15.--17. " IPU1_DI1_PRE_CLK_SEL ,Selector for IPU1 di1 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,352M PFD,396M PFD,540M PFD,?..." endif sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x28 15.--17. " EPDC_AXI_CLK_SEL ,Selector for epdc_axi root clock multiplexer" "mmdc_ch0,pll3_sw_clk,PLL2 PFD0,PLL2 PFD2,PLL3 PFD1,?..." bitfld.long 0x28 12.--14. " EPDC_AXI_PODF ,Divider for epdc_axi clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" textline " " bitfld.long 0x28 6.--8. " PXP_AXI_CLK_SEL ,Selector for pxp_axi root clock multiplexer" "mmdc_ch0,pll3_sw_clk,PLL2 PFD0,PLL2 PFD2,PLL3 PFD1,?..." bitfld.long 0x28 3.--5. " PXP_AXI_PODF ,Divider for pxp_axi clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" else textline " " bitfld.long 0x28 12.--14. " IPU1_DI1_PODF ,Divider for IPU1_DI clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x28 9.--11. " IPU1_DI1_CLK_SEL ,Selector for IPU1 DI1 root clock multiplexer" "IPU1_DI1_CLK,IPP_DI0_CLK,IPP_DI1_CLK,IDB_DI0_CLK,IDB_DI1_CLK,?..." sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x28 6.--8. " IPU1_DI0_PRE_CLK_SEL ,Selector for IPU1 DI0 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,307M PFD,396M PFD,540M PFD,?..." else textline " " bitfld.long 0x28 6.--8. " IPU1_DI0_PRE_CLK_SEL ,Selector for IPU1 DI0 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,352M PFD,396M PFD,540M PFD,?..." endif textline " " bitfld.long 0x28 3.--5. " IPU1_DI0_PODF ,Divider for IPU1_DI0 clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x28 0.--2. " IPU1_DI0_CLK_SEL ,Selector for IPU1 DI0 root clock multiplexer" "IPU1_DI0_CLK,IPP_DI0_CLK,IPP_DI1_CLK,IDB_DI0_CLK,IDB_DI1_CLK,?..." endif line.long 0x2C "CCM_CSCDR2,CCM Serial Clock Divider Register 2" bitfld.long 0x2C 19.--24. " ECSPI_CLK_PODF ,Divider for ECSPI clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x2C 18. " ECSPI_CLK_SEL ,Selector for the ECSPI clock multiplexor" "pll3_60m,osc_clk" bitfld.long 0x2C 15.--17. " EPDC_PIX_CLK_SEL ,Selector for epdc_pix root clock pre-multiplexer" "mmdc_ch0,pll3_sw_clk,PLL5,PLL2 PFD0,PLL2 PFD2,PLL3 PFD1,?..." textline " " bitfld.long 0x2C 12.--14. " EPDC_PIX_PRED ,Divider for epdc_pix clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x2C 6.--8. " LCDIF_PIX_CLK_SEL ,Selector for lcdif_pix root clock multiplexer" "mmdc_ch0,pll3_sw_clk,PLL5,PLL2 PFD0,PLL2 PFD2,PLL3 PFD1,?..." bitfld.long 0x2C 3.--5. " LCDIF_PIX_PRED ,Divider for lcdif_pix clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" else sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x2C 15.--17. " IPU2_DI1_PRE_CLK_SEL ,Selector for IPU1 DI2 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,307M PFD,396M PFD,540M PFD,?..." else textline " " bitfld.long 0x2C 15.--17. " IPU2_DI1_PRE_CLK_SEL ,Selector for IPU1 DI2 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,352M PFD,396M PFD,540M PFD,?..." endif textline " " bitfld.long 0x2C 12.--14. " IPU2_DI1_PODF ,Divider for IPU2_DI clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x2C 9.--11. " IPU1_DI2_CLK_SEL ,Selector for IPU2 DI1 root clock multiplexer" "IPU1_DI1_CLK,IPP_DI0_CLK,IPP_DI1_CLK,IDB_DI0_CLK,IDB_DI1_CLK,?..." sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x2C 6.--8. " IPU2_DI0_PRE_CLK_SEL ,Selector for IPU2 DI0 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,307M PFD,396M PFD,540M PFD,?..." else textline " " bitfld.long 0x2C 6.--8. " IPU2_DI0_PRE_CLK_SEL ,Selector for IPU2 DI0 root clock pre-multiplexer" "MMDC_CH0_CLK,PLL3,PLL5,352M PFD,396M PFD,540M PFD,?..." endif textline " " bitfld.long 0x2C 3.--5. " IPU2_DI0_PODF ,Divider for IPU2_DI0 clock divider" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x2C 0.--2. " IPU2_DI0_CLK_SEL ,Selector for IPU2 DI0 root clock multiplexer" "IPU1_DI0_CLK,IPP_DI0_CLK,IPP_DI1_CLK,IDB_DI0_CLK,IDB_DI1_CLK,?..." endif line.long 0x30 "CCM_CSCDR3,CCM Serial Clock Divider Register 3" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x30 16.--18. " LCD_AXI_CLK_PODF ,Divider for lcdif_axi clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x30 14.--15. " LCD_AXI_CLK_SEL ,Selector for lcdif_axi clock multiplexer" "mmdc_ch0,PLL2 PFD2,pll3_120M,PLL3 PFD1" textline " " bitfld.long 0x30 11.--13. " SCI_CORE_PODF ,Post divider for csi_core clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x30 9.--10. " SCI_CORE_CLK_SEL ,Selector for csi_core clock multiplexer" "mmdc_ch0,PLL2 PFD2,pll3_120M,PLL3 PFD1" else bitfld.long 0x30 16.--18. " IPU2_HSP_PODF ,Divider for IPU2_HSP clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x30 14.--15. " IPU2_HSP_CLK_SEL ,Selector for IPU2_HSP clock multiplexer" "MMDC_CH0_CLK,396M PFD,120M,540M PFD" textline " " bitfld.long 0x30 11.--13. " IPU1_HSP_PODF ,Divider for IPU1_HSP clock" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.long 0x30 9.--10. " IPU1_HSP_CLK_SEL ,Selector for IPU1_HSP clock multiplexer" "MMDC_CH0_CLK,396M PFD,120M,540M PFD" endif sif (cpu()=="IMX6SOLOLITE") group.long 0x044++0x03 line.long 0x00 "CCM_CWDR,CCM Wakeup Detector Register" endif rgroup.long 0x48++0x03 line.long 0x00 "CCM_CDHIPR,CCM Divider Handshake In-Process Register" bitfld.long 0x00 16. " ARM_PODF_BUSY ,Busy indicator for CCM_CACRR[ARM_PODF]" "Not busy,Busy" bitfld.long 0x00 5. " PERIPH_CLK_SEL_BUSY ,Busy indicator for PERIPH_CLK_SEL mux control" "Not busy,Busy" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 4. " MMDC_CH0_PODF_BUSY ,Busy indicator for MMDC_CH0_AXI_PODF" "Not busy,Busy" endif textline " " bitfld.long 0x00 3. " PERIPH2_CLK_SEL_BUSY ,Busy indicator PERIPH2_CLK_SEL mux control" "Not busy,Busy" bitfld.long 0x00 2. " MMDC_CH1_PODF_BUSY ,Busy indicator for MMDC_CH1_AXI_PODF" "Not busy,Busy" bitfld.long 0x00 1. " AHB_PODF_BUSY ,Busy indicator for AHB_PODF" "Not busy,Busy" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 0. " AXI_PODF_BUSY ,Busy indicator for AXI_PODF" "Not busy,Busy" else bitfld.long 0x00 0. " ORCAM_PODF_BUSY ,Busy indicator for ORCAM_PODF" "Not busy,Busy" endif ;group.long 0x50++0x3 ;line.long 0x00 "CCM_CTOR,CCM Testing Observability Register" ;bitfld.long 0x00 13. " OBS_EN ,Observability enable" "Disabled,Enabled" ;textline " " ;bitfld.long 0x00 8.--12. " OBS_SPARE_OUTPUT_0_SEL ,Observability OBS_OUTPUT_0 signal select" ;"CCM_SYSTEM_IN_STOP_MODE,LPM_CURRENT_STATE[0],HNDSK_CURRENT_STATE[0],SHD_CURRENT_STATE[0],CCM_IPG_STOP,CCM_PDN_4ARM_REQ,MMDC_CH0_CLK_CHANGE_REQ,MMDC_C;H1_CLK_CHANGE_REQ,Reserved,Reserved,PLL_LRF_STICKY1,Reserved,CLK_SRC_ON,IPU_LPSR_WAKEUP_ACK,SRC_WARM_DVFS_REQ,Reserved,Reserved,Reserved,Reserved,MMDC;_CH0/1_LPMD,Reserved,Reserved,Reserved,Reserved,Reserved,OBS_INPUT_6,OBS_INPUT_0,OBS_INPUT_1,OBS_INPUT_2,OBS_INPUT_3,OBS_INPUT_4,OBS_INPUT_5" ;textline " " ;bitfld.long 0x00 4.--7. " OBS_SPARE_OUTPUT_1_SEL ,Observability OBS_OUTPUT_1 signal select" ;"CCM_SYSTEM_IN_WAIT_MODE,PM_CURRENT_STATE[1],HNDSK_CURRENT_STATE[1],Reserved,CCM_IPG_WAIT,Reserved,DPLL_EN_DPLLIP,CCM_PDN_4ALL_REQ,EMI_FREQ_CHANGE_ACK;,IPU_FREQ_CHANGE_ACK,PLL_LRF_STICKY4,Reserved,ARM_DSM_REQUEST,Reserved,GPC_PUP_ACK,PLL_LRF_STICKY2" ;textline " " ;bitfld.long 0x00 0.--3. " OBS_SPARE_OUTPUT_2_SEL ,Observability OBS_OUTPUT_2 signal select" ;"CCM_INT_MEM_IPG_STOP,LPM_CURRENT_STATE[2],HNDSK_CURRENT_STATE[2],SHD_CURRENT_STATE[1],Reserved,SRC_CLOCK_READY,REF_CLK_EN_DPLLIP,CCM_PUP_REQ,MMDC_CH0;_STOP_ACK,MMDC_CH1_STOP_ACK,Reserved,Reserved,SRC_POWER_GATING_RESET_DONE,TZIC_DSM_WAKEUP,GPC_PDN_ACK,PLL_LRF_STICKY3" group.long 0x54++0x2F line.long 0x00 "CCM_CLPCR,CCM Low Power Control Register" bitfld.long 0x00 27. " MASK_L2CC_IDLE ,Mask L2CC IDLE for entering low power mode" "Not masked,Masked" bitfld.long 0x00 26. " MASK_SCU_IDLE ,Mask SCU IDLE for entering low power mode" "Not masked,Masked" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x00 25. " MASK_CORE3_WFI ,Mask WFI of core3 for entering low power mode" "Not masked,Masked" bitfld.long 0x00 24. " MASK_CORE2_WFI ,Mask WFI of core2 for entering low power mode" "Not masked,Masked" textline " " endif textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 23. " MASK_CORE1_WFI ,Mask WFI of core1 for entering low power mode" "Not masked,Masked" textline " " endif bitfld.long 0x00 22. " MASK_CORE0_WFI ,Mask WFI of core0 for entering low power mode" "Not masked,Masked" bitfld.long 0x00 21. " BYPASS_MMDC_CH1_LPM_HS ,Bypass handshake with mmdc_ch1 on next entrance to low power mode" "Not bypassed,Bypassed" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 19. " BYPASS_MMDC_CH0_LPM_HS ,Bypass handshake with mmdc_ch0 on next entrance to low power mode" "Not bypassed,Bypassed" textline " " endif bitfld.long 0x00 16. " WB_PER_AT_STOP ,Enable periphery charge pump for well biasign at STOP mode" "Disabled,Enabled" bitfld.long 0x00 11. " COSC_PWRDOWN ,Oscillator Power Down" "Not powered down,Powered down" bitfld.long 0x00 9.--10. " STBY_COUNT ,Standby counter definition" "2 ckil clocks,4 ckil clocks,8 ckil clocks,16 ckil clocks" textline " " bitfld.long 0x00 8. " VSTBY ,Voltage standby request" "Not requested,Requested" bitfld.long 0x00 7. " DIS_REF_OSC ,External reference oscillator clock disable" "No,Yes" bitfld.long 0x00 6. " SBYOS ,Standby clock oscillator" "Enabled,Disabled" textline " " bitfld.long 0x00 5. " ARM_CLK_DIS_ON_LPM ,ARM clock disabled in WAIT mode" "No,Yes" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 2. " BYPASS_PMIC_VFUNCTIONAL_READY ,Bypass pmic vfunctional" "Not bypassed,Bypassed" textline " " endif bitfld.long 0x00 0.--1. " LPM ,Low power mode" "Remain in RUN mode,Transfer to WAIT mode,Transfer to STOP mode,?..." line.long 0x04 "CCM_CISR,CCM Interrupt Status Register" eventfld.long 0x04 26. " ARM_PODF_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of ARM_PODF" "No interrupt,Interrupt" textline " " sif (cpu()!="IMX6SOLOLITE") eventfld.long 0x04 23. " MMDC_CH0_PODF_LOADED ,Interrupt IPI_INT_1 generated due to update of MMDC_CH0_AXI_PODF" "No interrupt,Interrupt" textline " " endif eventfld.long 0x04 22. " PERIPH_CLK_SEL_LOADED ,Interrupt IPI_INT_1 generated due to update of PERIPH_CLK_SEL" "No interrupt,Interrupt" eventfld.long 0x04 21. " MMDC_CH1_PODF_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of MMDC_CH0_PODF_LOADED" "No interrupt,Interrupt" eventfld.long 0x04 20. " AHB_PODF_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of AHB_PODF" "No interrupt,Interrupt" textline " " eventfld.long 0x04 19. " PERIPH2_CLK_SEL_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of PERIPH2_CLK_SEL" "No interrupt,Interrupt" textline " " sif (cpu()=="IMX6SOLOLITE") eventfld.long 0x04 17. " ORCAM_PODF_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of ocram_podf" "No interrupt,Interrupt" textline " " else eventfld.long 0x04 17. " AXI_A_PODF_LOADED ,Interrupt IPI_INT_1 generated due to frequency change of AXI_A_PODF" "No interrupt,Interrupt" textline " " endif eventfld.long 0x04 6. " COSC_READY ,Interrupt IPI_INT_2 generated when on board oscillator ready" "No interrupt,Interrupt" eventfld.long 0x04 0. " LRF_PLL ,Interrupt IPI_INT_2 generated due to lock of all enabled and not bypaseed plls" "No interrupt,Interrupt" line.long 0x08 "CCM_CIMR,CCM Interrupt Mask Register" bitfld.long 0x08 26. " ARM_PODF_LOADED ,Mask interrupt generation due to frequency change of ARM_PODF" "Not masked,Masked" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x08 23. " MASK_MMDC_CH0_PODF_LOADED ,Mask interrupt generation due to update of MASK_MMDC_CH0_PODF" "Not masked,Masked" textline " " endif bitfld.long 0x08 22. " MASK_PERIPH_CLK_SEL_LOADED ,Mask interrupt generation due to update of PERIPH_CLK_SEL" "Not masked,Masked" textline " " bitfld.long 0x08 21. " MASK_MMDC_CH1_PODF_LOADED ,Mask interrupt generation due to frequency change of MASK_MMDC_CH1_PODF" "Not masked,Masked" textline " " bitfld.long 0x08 20. " MASK_AHB_PODF_LOADED ,Mask interrupt generation due to frequency change of AHB_PODF" "Not masked,Masked" textline " " bitfld.long 0x08 19. " MASK_PERIPH2_CLK_SEL_LOADED ,Mask interrupt generation due to frequency change of PERIPH2_CLK_SEL" "Not masked,Masked" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x08 17. " MASK_OCRAM_PODF_LOADED ,Mask interrupt generation due to frequency change of AXI_PODF" "Not masked,Masked" textline " " else rbitfld.long 0x08 18. " MASK_AXI_B_PODF_LOADED ,Mask interrupt generation due to frequency change of ocram_podf" "Not masked,Masked" bitfld.long 0x08 17. " MASK_AXI_PODF_LOADED ,Mask interrupt generation due to frequency change of AXI_PODF" "Not masked,Masked" textline " " endif bitfld.long 0x08 6. " MASK_COSC_READY ,Mask interrupt generation due to on board oscillator ready" "Not masked,Masked" bitfld.long 0x08 0. " MASK_LRF_PLL1 ,Mask interrupt generation due to lrf of plls" "Not masked,Masked" line.long 0x0C "CCM_CCOSR,CCM Clock Output Source Register" bitfld.long 0x0C 24. " CKO2_EN ,Enable of CKO2 clock" "Disabled,Enabled" bitfld.long 0x0C 21.--23. " CKO2_DIV ,Setting the divider of CKO2" "/1,/2,/3,/4,/5,/6,/7,/8" sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x0C 16.--20. " CLKO2_SEL ,Selection of the clock to be generated on clko2" "mmdc_clk_root,usdhc4_clk_root,usdhc1_clk_root,wrck_clk_root,ecspi_clk_root,usdhc3_clk_root,pcie_clk_root,arm_clk_root,csi_core,lcdif_axi,osc_clk,gpu2d_ovg_core_clk_root,usdhc2_clk_root,ssi1_clk_root,ssi2_clk_root,ssi3_clk_root,gpu2d_core_clk_root,extern_audio_clk_root,aclk_eim_slow_clk_root,uart_clk_root,spdif0_clk_root,spdif1_clk_root,?..." endif sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x0C 16.--20. " CKO2_SEL ,Selection of the clock to be generated on cko2" "MMDC_CH0_AXI_CLK_ROOT,MMDC_CH1_AXI_CLK_ROOT,USDHC4_CLK_ROOT,USDHC1_CLK_ROOT,,WRCK_CLK_ROOT,ECSPI_CLK_ROOT,,USDHC3_CLK_ROOT,PCIE_CLK_ROOT,ARM_AXI_CLK_ROOT,IPU1_HSP_CLK_ROOT,EPDC_AXI_CLK_ROOT,VDO_AXI_CLK_ROOT,OSC_CLK,MLB_SYS_CLK_ROOT,GPU3D_CORE_CLK_ROOT,USDHC2_CLK_ROOT,SSI1_CLK_ROOT,SSI2_CLK_ROOT,SSI3_CLK_ROOT,GPU2D_CORE_CLK_ROOT,VPU_AXI_CLK_ROOT,CAN_CLK_ROOT,LDB_DI0_SERIAL_CLK_ROOT,LDB_DI1_SERIAL_CLK_ROOT,ESAI_CLK_ROOT,ACLK_EMI_SLOW_CLK_ROOT,UART_CLK_ROOT,SPDIF0_CLK_ROOT,SPDIF1_CLK_ROOT,HSI_TX_CLK_ROOT" elif (cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x0C 16.--20. " CKO2_SEL ,Selection of the clock to be generated on cko2" "MMDC_CH0_AXI_CLK_ROOT,MMDC_CH1_AXI_CLK_ROOT,USDHC4_CLK_ROOT,USDHC1_CLK_ROOT,GPU2D_AXI_CLK_ROOT,WRCK_CLK_ROOT,ECSPI_CLK_ROOT,GPU3D_AXI_CLK_ROOT,USDHC3_CLK_ROOT,125M_CLK_ROOT,ARM_AXI_CLK_ROOT,IPU1_HSP_CLK_ROOT,IPU2_HSP_CLK_ROOT,VDO_AXI_CLK_ROOT,OSC_CLK,GPU2D_CORE_CLK_ROOT,GPU3D_CORE_CLK_ROOT,USDHC2_CLK_ROOT,SSI1_CLK_ROOT,SSI2_CLK_ROOT,SSI3_CLK_ROOT,GPU3D_SHADER_CLK_ROOT,VPU_AXI_CLK_ROOT,CAN_CLK_ROOT,LDB_DI0_SERIAL_CLK_ROOT,LDB_DI1_SERIAL_CLK_ROOT,ESAI_CLK_ROOT,ACLK_EMI_SLOW_CLK_ROOT,UART_CLK_ROOT,SPDIF0_CLK_ROOT,SPDIF1_CLK_ROOT,HSI_TX_CLK_ROOT" endif textline " " bitfld.long 0x0C 8. " CKO1_CKO2_SEL ,CKO1 output to reflect cko1 or cko2 clocks" "Cko1,Cko2" bitfld.long 0x0C 7. " CKO1_EN ,Enable of CKO1 clock" "Disabled,Enabled" bitfld.long 0x0C 4.--6. " CKO1_DIV ,Setting the divider of CKO1" "/1,/2,/3,/4,/5,/6,/7,/8" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x0C 0.--3. " CKO1_SEL ,Selection of the clock to be generated on cko1" "PLL3_SW_CLK,PLL2_MAIN_CLK,PLL1_MAIN_CLK,PLL5_MAIN_CLK,VIDEO_27M_CLK_ROOT,DTCP_CLK_ROOT,ENFC_CLK_ROOT,IPU1_DI0_CLK_ROOT,IPU1_DI1_CLK_ROOT,LCDIF_PIX_CLK_ROOT,EPDC_PIX_CLK_ROOT,AHB_CLK_ROOT,IPG_CLK_ROOT,PERCLK_ROOT,CKIL_SYNC_CLK_ROOT,PLL4_MAIN_CLK" else textline " " bitfld.long 0x0C 0.--3. " CKO1_SEL ,Selection of the clock to be generated on cko1" "PLL3_SW_CLK,PLL2_MAIN_CLK,PLL1_MAIN_CLK,PLL5_MAIN_CLK,VIDEO_27M_CLK_ROOT,AXI_CLK_ROOT,ENFC_CLK_ROOT,IPU1_DI0_CLK_ROOT,IPU1_DI1_CLK_ROOT,IPU2_DI0_CLK_ROOT,IPU2_DI1_CLK_ROOT,AHB_CLK_ROOT,IPG_CLK_ROOT,PERCLK_ROOT,CKIL_SYNC_CLK_ROOT,PLL4_MAIN_CLK" endif line.long 0x10 "CCM_CGPR,CCM General Purpose Register" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x10 17. " INT_MEM_CLK_LPM ,Clock to the ARM platform memories" "Disabled,Enabled" bitfld.long 0x10 16. " FPL ,Engage PLL" "Default,3 CKIL" bitfld.long 0x10 4. " EFUSE_PROG_SUPPLY_GATE ,Fuse programing supply voltage is gated" "Disabled,Enabled" else bitfld.long 0x10 16. " FPL ,Engage PLL" "Default,3 CKIL" bitfld.long 0x10 4. " EFUSE_PROG_SUPPLY_GATE ,Fuse programing supply voltage is gated" "Disabled,Enabled" endif textline " " bitfld.long 0x10 2. " MMDC_EXT_CLK_DIS ,Disable external clock driver of MMDC during STOP mode" "No,Yes" bitfld.long 0x10 0. " PMIC_DELAY_SCALER ,Defines clock dividion of clock for stby_count" "Not divided,/8" sif (cpu()=="IMX6SOLOLITE") line.long 0x14 "CCM_CCGR0,CCM Clock Gating Register 0" bitfld.long 0x14 22.--23. " CG11 ,Clock gating for power reduction of CPU debug clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 2.--3. " CG1 ,Clock gating for power reduction of AIPS_TZ2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 0.--1. " CG0 ,Clock gating for power reduction of AIPS_TZ1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x18 "CCM_CCGR1,CCM Clock Gating Register 1" bitfld.long 0x18 26.--27. " CG13 ,Clock gating for power reduction of GPU2D clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 22.--23. " CG11 ,Clock gating for power reduction of GPT serial clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 20.--21. " CG10 ,Clock gating for power reduction of GPT bus clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 16.--17. " CG8 ,Clock gating for power reduction of EXTERN clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 14.--15. " CG7 ,Clock gating for power reduction of EPIT2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 12.--13. " CG6 ,Clock gating for power reduction of EPIT1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 6.--7. " CG3 ,Clock gating for power reduction of ECSPI4 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 4.--5. " CG2 ,Clock gating for power reduction of ECSPI3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 2.--3. " CG1 ,Clock gating for power reduction of ECSPI2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 0.--1. " CG0 ,Clock gating for power reduction of ECSPI1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x1C "CCM_CCGR2,CCM Clock Gating Register 2" bitfld.long 0x1C 26.--27. " CG13 ,Clock gating for power reduction of IPSYNC_VDOA_IPG clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 22.--23. " CG11 ,Clock gating for power reduction of IPSYNC_IP2APB_TZASC1_IPG clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 20.--21. " CG10 ,Clock gating for power reduction of IPMUX3 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 18.--19. " CG9 ,Clock gating for power reduction of IPMUX2 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 16.--17. " CG8 ,Clock gating for power reduction of IPMUX1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 14.--15. " CG7 ,Clock gating for power reduction of IOMUX_IPT_CLK_IO clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 12.--13. " CG6 ,Clock gating for power reduction of OCOTP_CTRL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 10.--11. " CG5 ,Clock gating for power reduction of I2C3_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 8.--9. " CG4 ,Clock gating for power reduction of I2C2_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 6.--7. " CG3 ,Clock gating for power reduction of I2C1_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x20 "CCM_CCGR3,CCM Clock Gating Register 3" bitfld.long 0x20 28.--29. " CG14 ,Clock gating for power reduction of OCRAM clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 26.--27. " CG12 ,Clock gating for power reduction of MMDC_CORE_IPG_CLK_P1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 24.--25. " CG12 ,Clock gating for power reduction of MMDC_CORE_IPG_CLK_P0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x20 20.--21. " CG10 ,Clock gating for power reduction of MMDC_CORE_ACLK_FAST_CORE_P0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 10.--11. " CG2 ,Clock gating for power reduction of EPDC_PIX clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 8.--9. " CG1 ,Clock gating for power reduction of LCDIF_PIX clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x20 6.--7. " CG0 ,Clock gating for power reduction of LCDIF_AXI clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 4.--5. " CG2 ,Clock gating for power reduction of EPDC_AXI clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 2.--3. " CG1 ,Clock gating for power reduction of PXP_AXI clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x20 0.--1. " CG0 ,Clock gating for power reduction of CSI_CORE clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x24 "CCM_CCGR4,CCM Clock Gating Register 4" bitfld.long 0x24 30.--31. " CG15 ,Clock gating for power reduction of RAWNAND_U_GPMI_INPUT_APB clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 28.--29. " CG14 ,Clock gating for power reduction of RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 26.--27. " CG13 ,Clock gating for power reduction of RAWNAND_U_GPMI_BCH_INPUT_BCH clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 24.--25. " CG12 ,Clock gating for power reduction of RAWNAND_U_BCH_INPUT_APB clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 22.--23. " CG11 ,Clock gating for power reduction of PWM4 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 20.--21. " CG10 ,Clock gating for power reduction of PWM3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 18.--19. " CG9 ,Clock gating for power reduction of PWM2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 16.--17. " CG8 ,Clock gating for power reduction of PWM1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 14.--15. " CG7 ,Clock gating for power reduction of PL301_MX63PER2_MAINCLK_ENABLE (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 12.--13. " CG6 ,Clock gating for power reduction of PL301_MX63PER1_BCH clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 8.--9. " CG4 ,Clock gating for power reduction of PL301_MX63FAST1_S133 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" else line.long 0x14 "CCM_CCGR0,CCM Clock Gating Register 0" bitfld.long 0x14 28.--29. " CG14 ,Clock gating for power reduction of DTCP clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 26.--27. " CG13 ,Clock gating for power reduction of DCIC2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 24.--25. " CG12 ,Clock gating for power reduction of DCIC 1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x14 22.--23. " CG11 ,Clock gating for power reduction of CPU debug clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 20.--21. " CG10 ,Clock gating for power reduction of CAN2_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 18.--19. " CG9 ,Clock gating for power reduction of CAN2 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x14 16.--17. " CG8 ,Clock gating for power reduction of CAN1_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 14.--15. " CG7 ,Clock gating for power reduction of CAN1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 12.--13. " CG6 ,Clock gating for power reduction of CAAM_WRAPPER_IPG clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x14 10.--11. " CG5 ,Clock gating for power reduction of CAAM_WRAPPER_ACLK clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 8.--9. " CG4 ,Clock gating for power reduction of CAAM_SECURE_MEM clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 6.--7. " CG3 ,Clock gating for power reduction of ASRC clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x14 4.--5. " CG2 ,Clock gating for power reduction of APBHDMA HCLK clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 2.--3. " CG1 ,Clock gating for power reduction of AIPS_TZ2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x14 0.--1. " CG0 ,Clock gating for power reduction of AIPS_TZ1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x18 "CCM_CCGR1,CCM Clock Gating Register 1" bitfld.long 0x18 26.--27. " CG13 ,Clock gating for power reduction of GPU3D clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 24.--25. " CG12 ,Clock gating for power reduction of GPU2D clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 22.--23. " CG11 ,Clock gating for power reduction of GPT serial clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 20.--21. " CG10 ,Clock gating for power reduction of GPT bus clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 16.--17. " CG8 ,Clock gating for power reduction of ESAI clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 14.--15. " CG7 ,Clock gating for power reduction of EPIT2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 12.--13. " CG6 ,Clock gating for power reduction of EPIT1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 10.--11. " CG5 ,Clock gating for power reduction of ENET clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 8.--9. " CG4 ,Clock gating for power reduction of ECSPI5 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 6.--7. " CG3 ,Clock gating for power reduction of ECSPI4 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 4.--5. " CG2 ,Clock gating for power reduction of ECSPI3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x18 2.--3. " CG1 ,Clock gating for power reduction of ECSPI2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x18 0.--1. " CG0 ,Clock gating for power reduction of ECSPI1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x1C "CCM_CCGR2,CCM Clock Gating Register 2" bitfld.long 0x1C 26.--27. " CG13 ,Clock gating for power reduction of IPSYNC_VDOA_IPG clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 24.--25. " CG12 ,Clock gating for power reduction of IPSYNC_IP2APB_TZASC2_IPG clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 22.--23. " CG11 ,Clock gating for power reduction of IPSYNC_IP2APB_TZASC1_IPG clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 20.--21. " CG10 ,Clock gating for power reduction of IPMUX3 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 18.--19. " CG9 ,Clock gating for power reduction of IPMUX2 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 16.--17. " CG8 ,Clock gating for power reduction of IPMUX1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 14.--15. " CG7 ,Clock gating for power reduction of IOMUX_IPT_CLK_IO clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 12.--13. " CG6 ,Clock gating for power reduction of IIM clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 10.--11. " CG5 ,Clock gating for power reduction of I2C3_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 8.--9. " CG4 ,Clock gating for power reduction of I2C2_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 6.--7. " CG3 ,Clock gating for power reduction of EI2C1_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x1C 4.--5. " CG2 ,Clock gating for power reduction of HDMI_TX_ISFRCLK clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x1C 0.--1. " CG0 ,Clock gating for power reduction of HDMI_TX_IAHBCLK/HDMI_TX_IHCLK clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x20 "CCM_CCGR3,CCM Clock Gating Register 3" bitfld.long 0x20 30.--31. " CG15 ,Clock gating for power reduction of OPENVGAXICLK clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 28.--29. " CG14 ,Clock gating for power reduction of OCRAM clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 24.--25. " CG12 ,Clock gating for power reduction of MMDC_CORE_IPG_CLK_P0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x20 20.--21. " CG10 ,Clock gating for power reduction of MMDC_CORE_ACLK_FAST_CORE_P0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 18.--19. " CG9 ,Clock gating for power reduction of MLB clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 16.--17. " CG8 ,Clock gating for power reduction of MIPI_CORE_CFG clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x20 14.--15. " CG7 ,Clock gating for power reduction of LDB_DI1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 12.--13. " CG6 ,Clock gating for power reduction of LDB_DI0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x20 10.--11. " CG5 ,Clock gating for power reduction of EPDC_PIX clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 6.--7. " CG3 ,Clock gating for power reduction of SPDC/LCDIF/PXP clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" else textline " " bitfld.long 0x20 10.--11. " CG5 ,Clock gating for power reduction of IPU2_IPU_DI1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 8.--9. " CG4 ,Clock gating for power reduction of IPU2_IPU_DI0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 6.--7. " CG3 ,Clock gating for power reduction of IPU2_IPU clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" endif textline " " bitfld.long 0x20 4.--5. " CG2 ,Clock gating for power reduction of IPU1_IPU_DI1 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 2.--3. " CG1 ,Clock gating for power reduction of IPU1_IPU_DI0 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x20 0.--1. " CG0 ,Clock gating for power reduction of IPU1_IPU clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x24 "CCM_CCGR4,CCM Clock Gating Register 4" bitfld.long 0x24 30.--31. " CG15 ,Clock gating for power reduction of RAWNAND_U_GPMI_INPUT_APB clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 28.--29. " CG14 ,Clock gating for power reduction of RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 26.--27. " CG13 ,Clock gating for power reduction of RAWNAND_U_GPMI_BCH_INPUT_BCH clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 24.--25. " CG12 ,Clock gating for power reduction of RAWNAND_U_BCH_INPUT_APB clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 22.--23. " CG11 ,Clock gating for power reduction of PWM4 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 20.--21. " CG10 ,Clock gating for power reduction of PWM3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 18.--19. " CG9 ,Clock gating for power reduction of PWM2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 16.--17. " CG8 ,Clock gating for power reduction of PWM1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 14.--15. " CG7 ,Clock gating for power reduction of PL301_MX63PER2_MAINCLK_ENABLE (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x24 12.--13. " CG6 ,Clock gating for power reduction of PL301_MX63PER1_BCH clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 8.--9. " CG4 ,Clock gating for power reduction of PL301_MX63FAST1_S133 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x24 0.--1. " CG0 ,Clock gating for power reduction of PCIE clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" endif line.long 0x28 "CCM_CCGR5,CCM Clock Gating Register 5" bitfld.long 0x28 26.--27. " CG13 ,Clock gating for power reduction of UART_SERIAL clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 24.--25. " CG12 ,Clock gating for power reduction of UART clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 22.--23. " CG11 ,Clock gating for power reduction of SSI3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x28 20.--21. " CG10 ,Clock gating for power reduction of SSI2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 18.--19. " CG9 ,Clock gating for power reduction of SSI1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 14.--15. " CG7 ,Clock gating for power reduction of SPDIF clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x28 12.--13. " CG6 ,Clock gating for power reduction of SPBA clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 6.--7. " CG3 ,Clock gating for power reduction of SDMA clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x28 4.--5. " CG2 ,Clock gating for power reduction of SATA clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x28 0.--1. " CG0 ,Clock gating for power reduction of ROM clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" line.long 0x2C "CCM_CCGR6,CCM Clock Gating Register 6" bitfld.long 0x2C 14.--15. " CG7 ,Clock gating for power reduction of VPU clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x2C 12.--13. " CG6 ,Clock gating for power reduction of VDOAXICLK root clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x2C 10.--11. " CG5 ,Clock gating for power reduction of EMI_SLOW clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x2C 8.--9. " CG4 ,Clock gating for power reduction of USDHC4 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x2C 6.--7. " CG3 ,Clock gating for power reduction of USDHC3 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x2C 4.--5. " CG2 ,Clock gating for power reduction of USDHC2 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" textline " " bitfld.long 0x2C 2.--3. " CG1 ,Clock gating for power reduction of USDHC1 clocks (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" bitfld.long 0x2C 0.--1. " CG0 ,Clock gating for power reduction of USBOH3 clock (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,,On/On/Off" ; line.long 0x30 "CCGR7,CCM Clock Gating Register 7" ; bitfld.long 0x30 14.--15. " CG07 ,Clock gating for power reduction of UART5_PERCLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 12.--13. " CG06 ,Clock gating for power reduction of UART5_IPG_CLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 10.--11. " CG05 ,Clock gating for power reduction of UART4_PERCLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 8.--9. " CG04 ,Clock gating for power reduction of UART4_IPG_CLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 6.--7. " CG02 ,Clock gating for power reduction of IEEE1588 (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; textline " " ; bitfld.long 0x30 4.--5. " CG02 ,Clock gating for power reduction of MLB_CLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 2.--3. " CG01 ,Clock gating for power reduction of ASRC_ASRCK_CLOCK_D (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" ; bitfld.long 0x30 0.--1. " CG00 ,Clock gating for power reduction of ASRC_IPG_CLK (Run/Wait/Stop)" "Off/Off/Off,On/Off/Off,Reserved,On/On/Off" group.long 0x88++0x3 line.long 0x00 "CCM_CMEOR,CCM Module Enable Override Register" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 30. " MOD_EN_OV_CAN1_CPI ,Override clock enable signal from can1 clock (not gated based on ENABLE_CLK_CPI)" "Not overridden,Overridden" bitfld.long 0x00 28. " MOD_EN_OV_CAN2_CPI ,Override clock enable signal from CAN2 clock (not gated based on ENABLE_CLK_CPI)" "Not overridden,Overridden" bitfld.long 0x00 11. " MOD_EN_OV_GPU3D ,Overide clock enable signal from gpu3d" "Not overridden,Overridden" textline " " endif bitfld.long 0x00 10. " MOD_EN_OV_GPU2D ,Override clock enable signal from GPU2D (not gated based on GPU2D_BUSY)" "Not overridden,Overridden" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 9. " MOD_EN_OV_VPU ,Override clock enable signal from VPU clock (not gated based on VPU_IDLE)" "Not overridden,Overridden" bitfld.long 0x00 8. " MOD_EN_OV_DAP ,Overide clock enable signal from DAP-clock (not gated based on DAP_DBGEN)" "Not overridden,Overridden" textline " " endif bitfld.long 0x00 7. " MOD_EN_USDHC ,Overide clock enable signal from USDHC" "Not overridden,Overridden" bitfld.long 0x00 6. " MOD_EN_OV_EPIT ,Overide clock enable signal from EPIT (not gated based on IPG_ENABLE_CLK)" "Not overridden,Overridden" bitfld.long 0x00 5. " MOD_EN_OV_GPT ,Overide clock enable signal from GPT clock (not gated based on IPG_ENABLE_CLK)" "Not overridden,Overridden" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 4. " MOD_EN_OV_VDOA ,Overide clock enable signal from vdoa" "Not overridden,Overridden" endif width 0x0B tree.end sif (cpu()=="IMX6SOLOLITE") tree "CCMA (Clock Controller Module Analog)" base ad:0x020C8000 width 17. group.long 0x00++0x3F line.long 0x00 "PLL_ARM,Analog ARM PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "0,1" bitfld.long 0x00 17. " LVDS_SEL ,Analog Debug Bit" "0,1" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x00 13. " ENABLE ,Enable the clock output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "PLL_ARM_SET,Analog ARM PLL control Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x04 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "0,1" bitfld.long 0x04 17. " LVDS_SEL ,Analog Debug Bit" "0,1" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x04 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x04 13. " ENABLE ,Enable the clock output" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "PLL_ARM_CLR,Analog ARM PLL control Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x08 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "0,1" bitfld.long 0x08 17. " LVDS_SEL ,Analog Debug Bit" "0,1" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x08 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x08 13. " ENABLE ,Enable the clock output" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "PLL_ARM_TOG,Analog ARM PLL control Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x0C 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "0,1" bitfld.long 0x0C 17. " LVDS_SEL ,Analog Debug Bit" "0,1" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x0C 13. " ENABLE ,Enable the clock output" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x10 "PLL_USB1,Analog USB1 480MHz PLL Control Register" rbitfld.long 0x10 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x10 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x10 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" textline " " bitfld.long 0x10 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x10 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x10 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x10 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x14 "PLL_USB1_SET,Analog USB1 480MHz PLL Control Register" rbitfld.long 0x14 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x14 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x14 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" textline " " bitfld.long 0x14 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x14 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x14 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x14 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x18 "PLL_USB1_CLR,Analog USB1 480MHz PLL Control Register" rbitfld.long 0x18 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x18 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x18 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" textline " " bitfld.long 0x18 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x18 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x18 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x18 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x1C "PLL_USB1_TOG,Analog USB1 480MHz PLL Control Register" rbitfld.long 0x1C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x1C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x1C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" textline " " bitfld.long 0x1C 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x1C 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x1C 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x1C 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x20 "PLL_USB2,Analog USB2 480MHz PLL Control Register" rbitfld.long 0x20 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x20 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x20 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x20 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x20 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x20 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x20 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x24 "PLL_USB2_SET,Analog USB2 480MHz PLL Control Register" rbitfld.long 0x24 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x24 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x24 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x24 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x24 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x24 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x24 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x28 "PLL_USB2_TOG,Analog USB2 480MHz PLL Control Register" rbitfld.long 0x28 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x28 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x28 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x28 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x28 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x28 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x28 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x2C "PLL_USB2_TOG,Analog USB2 480MHz PLL Control Register" rbitfld.long 0x2C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x2C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x2C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x2C 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x2C 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x2C 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY" "Off,On" textline " " bitfld.long 0x2C 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x30 "PLL_SYS,Analog System PLL Control Register" rbitfld.long 0x30 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x30 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x30 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" textline " " bitfld.long 0x30 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" bitfld.long 0x30 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x30 12. " POWER ,Powers up the PLL" "Off,On" textline " " bitfld.long 0x30 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x34 "PLL_SYS_SET,Analog System PLL Control Register" rbitfld.long 0x34 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x34 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x34 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" textline " " bitfld.long 0x34 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" bitfld.long 0x34 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x34 12. " POWER ,Powers up the PLL" "Off,On" textline " " bitfld.long 0x34 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x38 "PLL_SYS_CLR,Analog System PLL Control Register" rbitfld.long 0x38 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x38 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x38 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" textline " " bitfld.long 0x38 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" bitfld.long 0x38 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x38 12. " POWER ,Powers up the PLL" "Off,On" textline " " bitfld.long 0x38 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x3C "PLL_SYS_TOG,Analog System PLL Control Register" rbitfld.long 0x3C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x3C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x3C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" textline " " bitfld.long 0x3C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,GPANAIO,CHRG_DET_B" bitfld.long 0x3C 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x3C 12. " POWER ,Powers up the PLL" "Off,On" textline " " bitfld.long 0x3C 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." group.long 0x70++0x0F line.long 0x00 "PLL_AUDIO,Analog Audio PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 19.--20. " POST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x00 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWER ,Powers up the PLL" "Off,On" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "PLL_AUDIO_SET,Analog Audio PLL control Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x04 19.--20. " POST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x04 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x04 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " POWER ,Powers up the PLL" "Off,On" hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "PLL_AUDIO_CLR,Analog Audio PLL control Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x08 19.--20. " POST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x08 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x08 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " POWER ,Powers up the PLL" "Off,On" hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "PLL_AUDIO_TOG,Analog Audio PLL control Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x0C 19.--20. " POST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x0C 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " POWER ,Powers up the PLL" "Off,On" hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" group.long 0x80++0x03 line.long 0x00 "PLL_AUDIO_NUM,Numerator of Audio PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " A ,30 bit numerator (A) of fractional loop divider" group.long 0x90++0x03 line.long 0x00 "PLL_AUDIO_DENOM,Denominator of Audio PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " B ,30 bit Denominator (B) of fractional loop divider" group.long 0xA0++0x0F line.long 0x00 "PLL_VIDEO,Analog Video PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 19.--20. " TEST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x00 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "PLL_VIDEO_SET,Analog Video PLL control Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x04 19.--20. " TEST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x04 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x04 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "PLL_VIDEO_CLR,Analog Video PLL control Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x08 19.--20. " TEST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x08 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x08 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "PLL_VIDEO_TOG,Analog Video PLL control Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x0C 19.--20. " TEST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" group.long 0xB0++0x03 line.long 0x00 "PLL_VIDEO_NUM,Numerator of Video PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " A ,30 bit numerator (A) of fractional loop divider" group.long 0xC0++0x03 line.long 0x00 "PLL_VIDEO_DENOM,Denominator of Video PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " B ,30 bit Denominator (B) of fractional loop divider" group.long 0xE0++0x2F line.long 0x00 "PLL_ENET,Analog ENET PLL Control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 20. " ENABLE_100M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x00 19. " ENABLE_125M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x00 13. " ENABLE ,Enable the ethernet clock output" "Disabled,Enabled" bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" bitfld.long 0x00 0.--1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "25MHz,50MHz,100MHz,125MHz" line.long 0x04 "PLL_ENET_SET,Analog ENET PLL Control Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x04 20. " ENABLE_100M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x04 19. " ENABLE_125M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x04 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x04 13. " ENABLE ,Enable the ethernet clock output" "Disabled,Enabled" bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" bitfld.long 0x04 0.--1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "25MHz,50MHz,100MHz,125MHz" line.long 0x08 "PLL_ENET_CLR,Analog ENET PLL Control Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x08 20. " ENABLE_100M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x08 19. " ENABLE_125M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x08 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x08 13. " ENABLE ,Enable the ethernet clock output" "Disabled,Enabled" bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" bitfld.long 0x08 0.--1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "25MHz,50MHz,100MHz,125MHz" line.long 0x0C "PLL_ENET_TOG,Analog ENET PLL Control Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x0C 20. " ENABLE_100M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x0C 19. " ENABLE_125M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,," textline " " bitfld.long 0x0C 13. " ENABLE ,Enable the ethernet clock output" "Disabled,Enabled" bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" bitfld.long 0x0C 0.--1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "25MHz,50MHz,100MHz,125MHz" line.long 0x10 "PFD_480,480MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x10 31. " PFD3_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x10 30. " PFD3_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x10 24.--29. " PFD3_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x10 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x10 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x10 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x10 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x10 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x10 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x10 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x10 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x10 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x14 "PFD_480_SET,480MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x14 31. " PFD3_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x14 30. " PFD3_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x14 24.--29. " PFD3_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x14 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x14 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x14 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x14 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x14 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x14 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x14 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x14 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x14 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x18 "PFD_480_CLR,480MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x18 31. " PFD3_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x18 30. " PFD3_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x18 24.--29. " PFD3_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x18 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x18 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x18 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x18 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x18 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x18 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x18 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x18 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x18 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x1C "PFD_480_TOG,480MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x1C 31. " PFD3_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x1C 30. " PFD3_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x1C 24.--29. " PFD3_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x1C 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x1C 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x1C 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x1C 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x1C 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x1C 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x1C 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x1C 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x1C 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x20 "PFD_528,528MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x20 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x20 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x20 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x24 "PFD_528_SET,528MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x24 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x24 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x24 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x24 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x24 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x24 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x24 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x24 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x24 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x28 "PFD_528_CLR,528MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x28 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x28 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x28 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x28 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x28 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x28 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x28 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x28 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x28 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x2C "PFD_528_TOG,528MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x2C 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x2C 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x2C 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x2C 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x2C 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x2C 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x2C 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x2C 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x2C 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." group.long 0x150++0x2F line.long 0x00 "MISC0,Miscellaneous Control Register" bitfld.long 0x00 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x00 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No,Yes" bitfld.long 0x00 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x00 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" bitfld.long 0x00 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable" bitfld.long 0x00 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x00 11.--12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT,," bitfld.long 0x00 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x00 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x00 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x00 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not power down,Power down" line.long 0x04 "MISC0_SET,Miscellaneous Control Register" bitfld.long 0x04 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x04 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No,Yes" bitfld.long 0x04 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x04 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" bitfld.long 0x04 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable" bitfld.long 0x04 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x04 11.--12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT,," bitfld.long 0x04 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x04 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x04 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x04 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not power down,Power down" line.long 0x08 "MISC0_CLR,Miscellaneous Control Register" bitfld.long 0x08 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x08 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No,Yes" bitfld.long 0x08 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x08 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" bitfld.long 0x08 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable" bitfld.long 0x08 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x08 11.--12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT,," bitfld.long 0x08 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x08 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x08 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x08 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not power down,Power down" line.long 0x0C "MISC0_TOG,Miscellaneous Control Register" bitfld.long 0x0C 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x0C 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No,Yes" bitfld.long 0x0C 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x0C 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" bitfld.long 0x0C 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable" bitfld.long 0x0C 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x0C 11.--12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT,," bitfld.long 0x0C 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x0C 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x0C 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x0C 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not power down,Power down" line.long 0x10 "MISC1,Miscellaneous Control Register" eventfld.long 0x10 31. " IRQ_DIG_BO , Set to one when when any of the digital regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x10 30. " IRQ_ANA_BO ,Set to one when when any of the analog regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x10 29. " IRQ_TEMPSENSE ,Set to one when when the temperature sensor interrupt asserts" "No interrupt,Interrupt" textline " " bitfld.long 0x10 12. " LVDSCLK1_IBEN ,Enables the LVDS input buffer for anaclk1/1b" "Disabled,ENABLED" bitfld.long 0x10 10. " LVDSCLK1_OBEN ,Enables the LVDS output buffer for anaclk1/1b." "Disabled,ENABLED" bitfld.long 0x10 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PD7" line.long 0x14 "MISC1_SET,Miscellaneous Control Register" eventfld.long 0x14 31. " IRQ_DIG_BO , Set to one when when any of the digital regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x14 30. " IRQ_ANA_BO ,Set to one when when any of the analog regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x14 29. " IRQ_TEMPSENSE ,Set to one when when the temperature sensor interrupt asserts" "No interrupt,Interrupt" textline " " bitfld.long 0x14 12. " LVDSCLK1_IBEN ,Enables the LVDS input buffer for anaclk1/1b" "Disabled,ENABLED" bitfld.long 0x14 10. " LVDSCLK1_OBEN ,Enables the LVDS output buffer for anaclk1/1b." "Disabled,ENABLED" bitfld.long 0x14 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PD7" line.long 0x18 "MISC1_CLR,Miscellaneous Control Register" eventfld.long 0x18 31. " IRQ_DIG_BO , Set to one when when any of the digital regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x18 30. " IRQ_ANA_BO ,Set to one when when any of the analog regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x18 29. " IRQ_TEMPSENSE ,Set to one when when the temperature sensor interrupt asserts" "No interrupt,Interrupt" textline " " bitfld.long 0x18 12. " LVDSCLK1_IBEN ,Enables the LVDS input buffer for anaclk1/1b" "Disabled,ENABLED" bitfld.long 0x18 10. " LVDSCLK1_OBEN ,Enables the LVDS output buffer for anaclk1/1b." "Disabled,ENABLED" bitfld.long 0x18 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PD7" line.long 0x1C "MISC1_TOG,Miscellaneous Control Register" eventfld.long 0x1C 31. " IRQ_DIG_BO , Set to one when when any of the digital regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x1C 30. " IRQ_ANA_BO ,Set to one when when any of the analog regulator brownout interrupts assert" "No interrupt,Interrupt" eventfld.long 0x1C 29. " IRQ_TEMPSENSE ,Set to one when when the temperature sensor interrupt asserts" "No interrupt,Interrupt" textline " " bitfld.long 0x1C 12. " LVDSCLK1_IBEN ,Enables the LVDS input buffer for anaclk1/1b" "Disabled,ENABLED" bitfld.long 0x1C 10. " LVDSCLK1_OBEN ,Enables the LVDS output buffer for anaclk1/1b." "Disabled,ENABLED" bitfld.long 0x1C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PD7" line.long 0x20 "MISC2,Miscellaneous Control Register" bitfld.long 0x20 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x20 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x20 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x20 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x20 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "/1,/2" rbitfld.long 0x20 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above" textline " " bitfld.long 0x20 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x20 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout" rbitfld.long 0x20 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x20 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "/1,/2" bitfld.long 0x20 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x20 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No brownout,Brownout" textline " " bitfld.long 0x20 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x20 7. " PLL3_DISABLE ,PLL3 Disable" "No,Yes" bitfld.long 0x20 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x20 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No brownout,Brownout" rbitfld.long 0x20 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x24 "MISC2_SET,Miscellaneous Control Register" bitfld.long 0x24 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x24 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x24 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x24 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x24 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "/1,/2" rbitfld.long 0x24 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above" textline " " bitfld.long 0x24 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x24 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout" rbitfld.long 0x24 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x24 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "/1,/2" bitfld.long 0x24 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x24 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No brownout,Brownout" textline " " bitfld.long 0x24 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x24 7. " PLL3_DISABLE ,PLL3 Disable" "No,Yes" bitfld.long 0x24 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x24 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No brownout,Brownout" rbitfld.long 0x24 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x28 "MISC2_CLR,Miscellaneous Control Register" bitfld.long 0x28 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x28 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x28 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x28 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x28 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "/1,/2" rbitfld.long 0x28 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above" textline " " bitfld.long 0x28 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x28 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout" rbitfld.long 0x28 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x28 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "/1,/2" bitfld.long 0x28 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x28 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No brownout,Brownout" textline " " bitfld.long 0x28 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x28 7. " PLL3_DISABLE ,PLL3 Disable" "No,Yes" bitfld.long 0x28 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x28 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No brownout,Brownout" rbitfld.long 0x28 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x2C "MISC2_TOG,Miscellaneous Control Register" bitfld.long 0x2C 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x2C 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x2C 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x2C 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x2C 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "/1,/2" rbitfld.long 0x2C 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above" textline " " bitfld.long 0x2C 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x2C 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout" rbitfld.long 0x2C 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x2C 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "/1,/2" bitfld.long 0x2C 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x2C 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No brownout,Brownout" textline " " bitfld.long 0x2C 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x2C 7. " PLL3_DISABLE ,PLL3 Disable" "No,Yes" bitfld.long 0x2C 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x2C 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No brownout,Brownout" rbitfld.long 0x2C 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" width 0x0B tree.end else tree "CCMA (Clock Controller Module Analog)" base ad:0x020C8000 width 28. group.long 0x0000++0x0F line.long 0x00 "CCM_ANALOG_PLL_ARM,Analog ARM PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "0,1" bitfld.long 0x00 17. " LVDS_SEL ,Analog Debug Bit" "0,1" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" bitfld.long 0x00 13. " ENABLE ,Enable the clock output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "CCM_ANALOG_PLL_ARM_SET,Analog ARM PLL control set Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No effect,Set" bitfld.long 0x04 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "No effect,Set" bitfld.long 0x04 17. " LVDS_SEL ,Analog Debug Bit" "No effect,Set" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 13. " ENABLE ,Enable the clock output" "No effect,Set" bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "No effect,Set" hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "CCM_ANALOG_PLL_ARM_CLR,Analog ARM PLL control clear Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No effect,Clear" bitfld.long 0x08 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "No effect,Clear" bitfld.long 0x08 17. " LVDS_SEL ,Analog Debug Bit" "No effect,Clear" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 13. " ENABLE ,Enable the clock output" "No effect,Clear" bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "No effect,Clear" hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "CCM_ANALOG_PLL_ARM_TOG,Analog ARM PLL control toggle Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "Not toggled,Toggled" bitfld.long 0x0C 18. " LVDS_24MHZ_SEL ,Analog Debug Bit" "Not toggled,Toggled" bitfld.long 0x0C 17. " LVDS_SEL ,Analog Debug Bit" "Not toggled,Toggled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 13. " ENABLE ,Enable the clock output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not toggled,Toggled" hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" group.long 0x10++0x0F line.long 0x00 "CCM_ANALOG_PLL_USB0,Analog USBPHY0 480MHz PLL Control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" textline " " bitfld.long 0x00 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x00 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x00 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY0" "Off,On" textline " " bitfld.long 0x00 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x04 "CCM_ANALOG_PLL_USB0_SET,Analog USB0 480MHz PLL Control Set Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No effect,Set" bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 13. " ENABLE ,Enable the PLL clock output" "No effect,Set" bitfld.long 0x04 12. " POWER ,Powers up the PLL" "No effect,Set" textline " " bitfld.long 0x04 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY0" "No effect,Set" bitfld.long 0x04 1. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Set" bitfld.long 0x04 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Set" line.long 0x08 "CCM_ANALOG_PLL_USB0_CLR,Analog USB0 480MHz PLL Control Clear Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No effect,Clear" bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 13. " ENABLE ,Enable the PLL clock output" "No effect,Clear" bitfld.long 0x08 12. " POWER ,Powers up the PLL" "No effect,Clear" textline " " bitfld.long 0x08 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY0" "No effect,Clear" bitfld.long 0x08 1. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Clear" bitfld.long 0x08 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Clear" line.long 0x0C "CCM_ANALOG_PLL_USB0_TOG,nalog USB0 480MHz PLL Control Toggle Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "Not toggled,Toggled" bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 13. " ENABLE ,Enable the PLL clock output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWER ,Powers up the PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY0" "Not toggled,Toggled" bitfld.long 0x0C 1. " DIV_SELECT ,This field controls the pll loop divider" "Not toggled,Toggled" bitfld.long 0x0C 0. " DIV_SELECT ,This field controls the pll loop divider" "Not toggled,Toggled" group.long 0x20++0x0F line.long 0x00 "CCM_ANALOG_PLL_USB1,Analog USBPHY1 480MHz PLL Control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" textline " " bitfld.long 0x00 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled" bitfld.long 0x00 12. " POWER ,Powers up the PLL" "Off,On" bitfld.long 0x00 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY1" "Off,On" textline " " bitfld.long 0x00 0.--1. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22,?..." line.long 0x04 "CCM_ANALOG_PLL_USB1_SET,Analog USB1 480MHz PLL Control Set Register" rbitfld.long 0x04 31. " LOCK ,PLL is currently locked" "No effect,Set" bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 13. " ENABLE ,Enable the PLL clock output" "No effect,Set" bitfld.long 0x04 12. " POWER ,Powers up the PLL" "No effect,Set" textline " " bitfld.long 0x04 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY1" "No effect,Set" bitfld.long 0x04 1. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Set" bitfld.long 0x04 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Set" line.long 0x08 "CCM_ANALOG_PLL_USB1_CLR,Analog USB1 480MHz PLL Control Clear Register" rbitfld.long 0x08 31. " LOCK ,PLL is currently locked" "No effect,Clear" bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 13. " ENABLE ,Enable the PLL clock output" "No effect,Clear" bitfld.long 0x08 12. " POWER ,Powers up the PLL" "No effect,Clear" textline " " bitfld.long 0x08 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY1" "No effect,Clear" bitfld.long 0x08 1. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Clear" bitfld.long 0x08 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Clear" line.long 0x0C "CCM_ANALOG_PLL_USB1_TOG,nalog USB1 480MHz PLL Control Toggle Register" rbitfld.long 0x0C 31. " LOCK ,PLL is currently locked" "Not toggled,Toggled" bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 13. " ENABLE ,Enable the PLL clock output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWER ,Powers up the PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 6. " EN_USB_CLKS ,Powers the 9-phase PLL outputs for USBPHY1" "Not toggled,Toggled" bitfld.long 0x0C 1. " DIV_SELECT ,This field controls the pll loop divider" "Not toggled,Toggled" bitfld.long 0x0C 0. " DIV_SELECT ,This field controls the pll loop divider" "Not toggled,Toggled" group.long 0x0030++0x13 line.long 0x00 "CCM_ANALOG_PLL_SYS,Analog System PLL Control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" textline " " bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" bitfld.long 0x00 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" textline " " bitfld.long 0x00 0. " DIV_SELECT ,This field controls the pll loop divider" "Fref*20,Fref*22" line.long 0x04 "CCM_ANALOG_PLL_SYS_SET,Analog System PLL Control Set Register" bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Set" bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 13. " ENABLE ,Enable PLL output" "No effect,Set" bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "No effect,Set" textline " " bitfld.long 0x04 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Set" line.long 0x08 "CCM_ANALOG_PLL_SYS_CLR,Analog System PLL Control Clear Register" bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Clear" bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 13. " ENABLE ,Enable PLL output" "No effect,Clear" bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "No effect,Clear" textline " " bitfld.long 0x08 0. " DIV_SELECT ,This field controls the pll loop divider" "No effect,Clear" line.long 0x0C "CCM_ANALOG_PLL_SYS_TOG,Analog System PLL Control Toggle Register" bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 0. " DIV_SELECT ,This field controls the pll loop divider" "Not toggled,Toggled" line.long 0x10 "CCM_ANALOG_PLL_SYS_SS,528MHz System PLL Spread Spectrum Register" hexmask.long.word 0x10 16.--31. 1. " STOP ,Frequency change = stop/B*24MHz" bitfld.long 0x10 15. " ENABLE ,This bit enables the spread spectrum modulation" "Disabled,Enabled" hexmask.long.word 0x10 0.--14. 1. " STEP ,Frequency change step = step/B*24MHz" group.long 0x0050++0x03 line.long 0x0 "CCM_ANALOG_PLL_SYS_NUM,Numerator of 528MHz System PLL Fractional Loop Divider Register" hexmask.long 0x0 0.--29. 1. " A ,30 bit numerator (A) of fractional loop divider" group.long 0x0060++0x03 line.long 0x00 "CCM_ANALOG_PLL_SYS_DENOM,Denominator of 528MHz System PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " B ,30 bit Denominator (B) of fractional loop divider" group.long 0x0070++0x0F line.long 0x00 "CCM_ANALOG_PLL_AUDIO,Analog Audio PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 19.--20. " POST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" bitfld.long 0x00 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "CCM_ANALOG_PLL_AUDIO_SET,Analog Audio PLL control Set Register" bitfld.long 0x04 20. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Set" bitfld.long 0x04 19. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Set" bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Set" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 13. " ENABLE ,Enable PLL output" "No effect,Set" bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "No effect,Set" textline " " hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "CCM_ANALOG_PLL_AUDIO_CLR,Analog Audio PLL control Clear Register" bitfld.long 0x08 20. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Clear" bitfld.long 0x08 19. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Clear" bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Clear" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 13. " ENABLE ,Enable PLL output" "No effect,Clear" bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "No effect,Clear" textline " " hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "CCM_ANALOG_PLL_AUDIO_TOG,Analog Audio PLL control Toggle Register" bitfld.long 0x0C 20. " TEST_DIV_SELECT ,Analog Debug bit" "Not toggled,Toggled" bitfld.long 0x0C 19. " TEST_DIV_SELECT ,Analog Debug bit" "Not toggled,Toggled" bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not toggled,Toggled" textline " " hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" group.long 0x0080++0x03 line.long 0x00 "CCM_ANALOG_PLL_AUDIO_NUM,Numerator of Audio PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " A ,30 bit numerator (A) of fractional loop divider" group.long 0x0090++0x03 line.long 0x00 "CCM_ANALOG_PLL_AUDIO_DENOM,Denominator of Audio PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " B ,30 bit Denominator (B) of fractional loop divider" group.long 0x00A0++0x0F line.long 0x00 "CCM_ANALOG_PLL_VIDEO,Analog Video PLL control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 19.--20. " TEST_DIV_SELECT ,Analog Debug bit" "/4,/2,/1,?..." bitfld.long 0x00 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x00 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" bitfld.long 0x00 13. " ENABLE ,Enable PLL output" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x04 "CCM_ANALOG_PLL_VIDEO_SET,Analog Video PLL control Set Register" bitfld.long 0x04 20. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Set" bitfld.long 0x04 19. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Set" bitfld.long 0x04 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Set" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x04 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x04 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x04 13. " ENABLE ,Enable PLL output" "No effect,Set" bitfld.long 0x04 12. " POWERDOWN ,Powers down the PLL" "No effect,Set" hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x08 "CCM_ANALOG_PLL_VIDEO_CLR,Analog Video PLL control Clear Register" bitfld.long 0x08 20. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Clear" bitfld.long 0x08 19. " TEST_DIV_SELECT ,Analog Debug bit" "No effect,Clear" bitfld.long 0x08 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Clear" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x08 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x08 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x08 13. " ENABLE ,Enable PLL output" "No effect,Clear" bitfld.long 0x08 12. " POWERDOWN ,Powers down the PLL" "No effect,Clear" hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" line.long 0x0C "CCM_ANALOG_PLL_VIDEO_TOG,Analog Video PLL control Toggle Register" bitfld.long 0x0C 20. " TEST_DIV_SELECT ,Analog Debug bit" "Not toggled,Toggled" bitfld.long 0x0C 19. " TEST_DIV_SELECT ,Analog Debug bit" "Not toggled,Toggled" bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x0C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x0C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Not toggled,Toggled" bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "Not toggled,Toggled" hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,This field controls the pll loop divider" group.long 0x00B0++0x03 line.long 0x00 "CCM_ANALOG_PLL_VIDEO_NUM,Numerator of Video PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " A ,30 bit numerator (A) of fractional loop divider" group.long 0x00C0++0x03 line.long 0x00 "CCM_ANALOG_PLL_VIDEO_DENOM,Denominator of Video PLL Fractional Loop Divider Register" hexmask.long 0x00 0.--29. 1. " B ,30 bit Denominator (B) of fractional loop divider" group.long 0x00D0++0x3F line.long 0x00 "CCM_ANALOG_PLL_MLB,MLB PLL Control Register" rbitfld.long 0x00 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x00 26.--28. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17.--19. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " BYPASS ,Bypass the PL" "Not bypassed,Bypassed" textline " " bitfld.long 0x00 12.--13. " PHASE_SEL ,Analog debut bit" "0,1,2,3" bitfld.long 0x00 11. " HOLD_RING_OF ,Analog debug bit" "0,1" line.long 0x04 "CCM_ANALOG_PLL_MLB_SET,MLB PLL Control Set Register" bitfld.long 0x04 28. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Set" bitfld.long 0x04 27. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Set" bitfld.long 0x04 26. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Set" textline " " bitfld.long 0x04 25. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Set" bitfld.long 0x04 24. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Set" bitfld.long 0x04 23. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Set" textline " " bitfld.long 0x04 22. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" bitfld.long 0x04 21. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" bitfld.long 0x04 20. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" textline " " bitfld.long 0x04 19. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" bitfld.long 0x04 18. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" bitfld.long 0x04 17. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Set" textline " " bitfld.long 0x04 16. " BYPASS ,Bypass the PL" "No effect,Set" bitfld.long 0x04 13. " PHASE_SEL ,Analog debut bit" "No effect,Set" bitfld.long 0x04 12. " PHASE_SEL ,Analog debut bit" "No effect,Set" textline " " bitfld.long 0x04 11. " HOLD_RING_OF ,Analog debug bit" "No effect,Set" line.long 0x08 "CCM_ANALOG_PLL_MLB_CLR,MLB PLL Control Clear Register" bitfld.long 0x08 28. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Clear" bitfld.long 0x08 27. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Clear" bitfld.long 0x08 26. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "No effect,Clear" textline " " bitfld.long 0x08 25. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Clear" bitfld.long 0x08 24. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Clear" bitfld.long 0x08 23. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "No effect,Clear" textline " " bitfld.long 0x08 22. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" bitfld.long 0x08 21. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" bitfld.long 0x08 20. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" textline " " bitfld.long 0x08 19. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" bitfld.long 0x08 18. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" bitfld.long 0x08 17. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "No effect,Clear" textline " " bitfld.long 0x08 16. " BYPASS ,Bypass the PL" "No effect,Clear" bitfld.long 0x08 13. " PHASE_SEL ,Analog debut bit" "No effect,Clear" bitfld.long 0x08 12. " PHASE_SEL ,Analog debut bit" "No effect,Clear" textline " " bitfld.long 0x08 11. " HOLD_RING_OF ,Analog debug bit" "No effect,Clear" line.long 0x0C "CCM_ANALOG_PLL_MLB_TOG,MLB PLL Control Toggle Register" bitfld.long 0x0C 28. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 27. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 26. " MLB_FLT_RES_CFG ,Configure the filter resistor for different divider ratio of MLB PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 25. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "Not toggled,Toggled" bitfld.long 0x0C 24. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "Not toggled,Toggled" bitfld.long 0x0C 23. " RX_CLK_DELAY_CFG ,Configure the phase delay of the MLB PLL RX Clock" "Not toggled,Toggled" textline " " bitfld.long 0x0C 22. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 21. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 20. " VDDD_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 19. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 18. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" bitfld.long 0x0C 17. " VDDA_DELAY_CFG ,Configure the phase delay of the MLB PLL" "Not toggled,Toggled" textline " " bitfld.long 0x0C 16. " BYPASS ,Bypass the PL" "Not toggled,Toggled" bitfld.long 0x0C 13. " PHASE_SEL ,Analog debut bit" "Not toggled,Toggled" bitfld.long 0x0C 12. " PHASE_SEL ,Analog debut bit" "Not toggled,Toggled" textline " " bitfld.long 0x0C 11. " HOLD_RING_OF ,Analog debug bit" "Not toggled,Toggled" line.long 0x10 "CCM_ANALOG_PLL_ENET,Analog ENET PLL Control Register" rbitfld.long 0x10 31. " LOCK ,PLL is currently locked" "No,Yes" bitfld.long 0x10 20. " ENABLE_100M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x10 19. " ENABLE_125M ,Enables an offset in the phase frequency detector" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled" bitfld.long 0x10 16. " BYPASS ,Bypass the pll" "Not bypassed,Bypassed" bitfld.long 0x10 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "OSC_24M,ANACLK_1,ANACLK_2,XOR" textline " " bitfld.long 0x10 13. " ENABLE ,Enable the ethernet clock output" "Disabled,Enabled" bitfld.long 0x10 12. " POWERDOWN ,Powers down the PLL" "Not power down,Power down" bitfld.long 0x10 0.--1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "25MHz,50MHz,100MHz,125MHz" line.long 0x14 "CCM_ANALOG_PLL_ENET_SET,Analog ENET PLL Control Set Register" bitfld.long 0x14 20. " ENABLE_SATA ,Enables an offset in the phase frequency detector" "No effect,Set" bitfld.long 0x14 19. " ENABLE_PCIE ,Enables an offset in the phase frequency detector" "No effect,Set" bitfld.long 0x14 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Set" textline " " bitfld.long 0x14 16. " BYPASS ,Bypass the pll" "No effect,Set" bitfld.long 0x14 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" bitfld.long 0x14 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Set" textline " " bitfld.long 0x14 13. " ENABLE ,Enable the ethernet clock output" "No effect,Set" bitfld.long 0x14 12. " POWERDOWN ,Powers down the PLL" "No effect,Set" bitfld.long 0x14 1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "No effect,Set" textline " " bitfld.long 0x14 0. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "No effect,Set" line.long 0x18 "CCM_ANALOG_PLL_ENET_CLR,Analog ENET PLL Control Clear Register" bitfld.long 0x18 20. " ENABLE_SATA ,Enables an offset in the phase frequency detector" "No effect,Clear" bitfld.long 0x18 19. " ENABLE_PCIE ,Enables an offset in the phase frequency detector" "No effect,Clear" bitfld.long 0x18 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "No effect,Clear" textline " " bitfld.long 0x18 16. " BYPASS ,Bypass the pll" "No effect,Clear" bitfld.long 0x18 15. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" bitfld.long 0x18 14. " BYPASS_CLK_SRC ,Determines the bypass source" "No effect,Clear" textline " " bitfld.long 0x18 13. " ENABLE ,Enable the ethernet clock output" "No effect,Clear" bitfld.long 0x18 12. " POWERDOWN ,Powers down the PLL" "No effect,Clear" bitfld.long 0x18 1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "No effect,Clear" textline " " bitfld.long 0x18 0. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "No effect,Clear" line.long 0x1C "CCM_ANALOG_PLL_ENET_TOG,Analog ENET PLL Control Toggle Register" bitfld.long 0x1C 20. " ENABLE_SATA ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" bitfld.long 0x1C 19. " ENABLE_PCIE ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" bitfld.long 0x1C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Not toggled,Toggled" textline " " bitfld.long 0x1C 16. " BYPASS ,Bypass the pll" "Not toggled,Toggled" bitfld.long 0x1C 15. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" bitfld.long 0x1C 14. " BYPASS_CLK_SRC ,Determines the bypass source" "Not toggled,Toggled" textline " " bitfld.long 0x1C 13. " ENABLE ,Enable the ethernet clock output" "Not toggled,Toggled" bitfld.long 0x1C 12. " POWERDOWN ,Powers down the PLL" "Not toggled,Toggled" bitfld.long 0x1C 1. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "Not toggled,Toggled" textline " " bitfld.long 0x1C 0. " DIV_SELECT ,Controls the frequency of the ethernet reference clock" "Not toggled,Toggled" line.long 0x20 "CCM_ANALOG_PFD_480,480MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x20 31. " PFD3_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 30. " PFD3_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 24.--29. " PFD3_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x20 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x20 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x20 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x20 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x20 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x24 "CCM_ANALOG_PFD_480_SET,480MHz Clock Phase Fractional Divider Control Set Register" bitfld.long 0x24 31. " PFD3_CLKGATE ,IO Clock Gate" "No effect,Set" bitfld.long 0x24 29. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 28. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 27. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 26. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 25. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 24. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 23. " PFD2_CLKGATE ,IO Clock Gate" "No effect,Set" bitfld.long 0x24 21. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 20. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 19. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 18. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 17. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 16. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 15. " PFD1_CLKGATE ,IO Clock Gate" "No effect,Set" textline " " bitfld.long 0x24 13. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 12. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 11. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 10. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 9. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 8. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 7. " PFD0_CLKGATE ,IO Clock Gate" "No effect,Set" bitfld.long 0x24 5. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 4. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 3. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 2. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x24 1. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x24 0. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" line.long 0x28 "CCM_ANALOG_PFD_480_CLR,480MHz Clock Phase Fractional Divider Control Clear Register" bitfld.long 0x28 31. " PFD3_CLKGATE ,IO Clock Gate" "No effect,Clear" bitfld.long 0x28 29. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 28. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 27. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 26. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 25. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 24. " PFD3_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 23. " PFD2_CLKGATE ,IO Clock Gate" "No effect,Clear" bitfld.long 0x28 21. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 20. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 19. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 18. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 17. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 16. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 15. " PFD1_CLKGATE ,IO Clock Gate" "No effect,Clear" textline " " bitfld.long 0x28 13. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 12. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 11. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 10. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 9. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 8. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 7. " PFD0_CLKGATE ,IO Clock Gate" "No effect,Clear" bitfld.long 0x28 5. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 4. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 3. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 2. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x28 1. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x28 0. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" line.long 0x2C "CCM_ANALOG_PFD_480_TOG,480MHz Clock Phase Fractional Divider Control Toggle Register" bitfld.long 0x2C 31. " PFD3_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" bitfld.long 0x2C 29. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 28. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 27. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 26. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 25. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 24. " PFD3_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 23. " PFD2_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" bitfld.long 0x2C 21. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 20. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 19. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 18. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 17. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 16. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 15. " PFD1_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" textline " " bitfld.long 0x2C 13. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 12. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 11. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 10. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 9. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 8. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 7. " PFD0_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" bitfld.long 0x2C 5. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 4. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 3. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 2. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x2C 1. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x2C 0. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" line.long 0x30 "CCM_ANALOG_PFD_528,528MHz Clock Phase Fractional Divider Control Register" bitfld.long 0x30 23. " PFD2_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x30 22. " PFD2_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x30 16.--21. " PFD2_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x30 15. " PFD1_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x30 14. " PFD1_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x30 8.--13. " PFD1_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." textline " " bitfld.long 0x30 7. " PFD0_CLKGATE ,IO Clock Gate" "Disabled,Enabled" rbitfld.long 0x30 6. " PFD0_STABLE ,The phase divider clock output" "0,1" bitfld.long 0x30 0.--5. " PFD0_FRAC ,This field controls the fractional divide value" ",,,,,,,,,,,,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x34 "CCM_ANALOG_PFD_528_SET,528MHz Clock Phase Fractional Divider Control Set Register" bitfld.long 0x34 23. " PFD2_CLKGATE ,IO Clock Gate" "No effect,Set" bitfld.long 0x34 21. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 20. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x34 19. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 18. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 17. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x34 16. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 15. " PFD1_CLKGATE ,IO Clock Gate" "No effect,Set" bitfld.long 0x34 13. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x34 12. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 11. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 10. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x34 9. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 8. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 7. " PFD0_CLKGATE ,IO Clock Gate" "No effect,Set" textline " " bitfld.long 0x34 5. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 4. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 3. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" textline " " bitfld.long 0x34 2. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 1. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" bitfld.long 0x34 0. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Set" line.long 0x38 "CCM_ANALOG_PFD_528_CLR,528MHz Clock Phase Fractional Divider Control Clear Register" bitfld.long 0x38 23. " PFD2_CLKGATE ,IO Clock Gate" "No effect,Clear" bitfld.long 0x38 21. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 20. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x38 19. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 18. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 17. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x38 16. " PFD2_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 15. " PFD1_CLKGATE ,IO Clock Gate" "No effect,Clear" bitfld.long 0x38 13. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x38 12. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 11. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 10. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x38 9. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 8. " PFD1_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 7. " PFD0_CLKGATE ,IO Clock Gate" "No effect,Clear" textline " " bitfld.long 0x38 5. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 4. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 3. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" textline " " bitfld.long 0x38 2. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 1. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" bitfld.long 0x38 0. " PFD0_FRAC ,This field controls the fractional divide value" "No effect,Clear" line.long 0x3C "CCM_ANALOG_PFD_528_TOG,528MHz Clock Phase Fractional Divider Control Toggle Register" bitfld.long 0x3C 23. " PFD2_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" bitfld.long 0x3C 21. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 20. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x3C 19. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 18. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 17. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x3C 16. " PFD2_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 15. " PFD1_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" bitfld.long 0x3C 13. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x3C 12. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 11. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 10. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x3C 9. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 8. " PFD1_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 7. " PFD0_CLKGATE ,IO Clock Gate" "Not toggled,Toggled" textline " " bitfld.long 0x3C 5. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 4. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 3. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" textline " " bitfld.long 0x3C 2. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 1. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" bitfld.long 0x3C 0. " PFD0_FRAC ,This field controls the fractional divide value" "Not toggled,Toggled" group.long 0x150++0x0F line.long 0x00 "CCM_ANALOG_MISC0,Miscellaneous Control Register" bitfld.long 0x00 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x00 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No,Yes" bitfld.long 0x00 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x00 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" bitfld.long 0x00 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable" bitfld.long 0x00 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x00 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT" bitfld.long 0x00 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x00 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x00 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x00 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not power down,Power down" line.long 0x04 "CCM_ANALOG_MISC0_SET,Miscellaneous Control Set Register" bitfld.long 0x04 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x04 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No effect,Set" bitfld.long 0x04 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x04 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "No effect,Set" bitfld.long 0x04 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "No effect,Set" bitfld.long 0x04 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x04 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "No effect,Set" bitfld.long 0x04 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "No effect,Set" bitfld.long 0x04 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x04 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No effect,Set" bitfld.long 0x04 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "No effect,Set" line.long 0x08 "CCM_ANALOG_MISC0_CLR,Miscellaneous Control Clear Register" bitfld.long 0x08 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x08 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "No effect,Clear" bitfld.long 0x08 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x08 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "No effect,Clear" bitfld.long 0x08 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "No effect,Clear" bitfld.long 0x08 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x08 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "No effect,Clear" bitfld.long 0x08 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "No effect,Clear" bitfld.long 0x08 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x08 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "No effect,Clear" bitfld.long 0x08 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "No effect,Clear" line.long 0x0C "CCM_ANALOG_MISC0_TOG,Miscellaneous Control Toggle Register" bitfld.long 0x0C 26.--28. " CLKGATE_DELAY ,Specifies delay between powering up the XTAL 24MHz and releasing" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x0C 25. " CLKGATE_CTRL ,Clock gate for the XTAL 24MHz disable" "Not toggled,Toggled" bitfld.long 0x0C 18.--19. " WBCP_VPW_THRESH ,Signal alters the voltage that the pwell is charged pumped to" "NOMINAL_BIAS,PLUS_25MV,MINUS_25MV,MINUS_50MV" textline " " bitfld.long 0x0C 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Not toggled,Toggled" bitfld.long 0x0C 16. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not toggled,Toggled" bitfld.long 0x0C 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "NOMINAL,MINUS_12_5_PERCENT,MINUS_25_PERCENT,MINUS_37_5_PERCENT" textline " " bitfld.long 0x0C 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Not toggled,Toggled" bitfld.long 0x0C 7. " REFTOP_VBGUP ,Status bit that signals the analog bandgap voltage is up and stable" "Not toggled,Toggled" bitfld.long 0x0C 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x0C 3. " REFTOP_SELFBIASOFF ,Control bit to disable the self-bias circuit in the analog bandgap" "Not toggled,Toggled" bitfld.long 0x0C 0. " REFTOP_PWD ,Control bit to power-down the analog bandgap reference circuitry" "Not toggled,Toggled" group.long 0x170++0x0F line.long 0x00 "CCM_ANALOG_MISC2,Miscellaneous Control Register" bitfld.long 0x00 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x00 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x00 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x00 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x00 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "/1,/2" rbitfld.long 0x00 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above" textline " " bitfld.long 0x00 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x00 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout" rbitfld.long 0x00 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x00 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "/1,/2" bitfld.long 0x00 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x00 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No brownout,Brownout" textline " " bitfld.long 0x00 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x00 7. " PLL3_DISABLE ,PLL3 Disable" "No,Yes" bitfld.long 0x00 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No brownout,Brownout" rbitfld.long 0x00 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x04 "CCM_ANALOG_MISC2_SET,Miscellaneous Control Set Register" bitfld.long 0x04 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x04 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x04 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x04 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x04 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "No effect,Set" bitfld.long 0x04 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "No effect,Set" textline " " bitfld.long 0x04 21. " REG2_ENABLE_BO ,Enables the brownout detection" "No effect,Set" bitfld.long 0x04 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No effect,Set" bitfld.long 0x04 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x04 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "No effect,Set" bitfld.long 0x04 13. " REG1_ENABLE_BO ,Enables the brownout detection" "No effect,Set" bitfld.long 0x04 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No effect,Set" textline " " bitfld.long 0x04 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x04 7. " PLL3_DISABLE ,PLL3 Disable" "No effect,Set" bitfld.long 0x04 5. " REG0_ENABLE_BO ,Enables the brownout detection" "No effect,Set" textline " " bitfld.long 0x04 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No effect,Set" bitfld.long 0x04 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x08 "CCM_ANALOG_MISC2_CLR,Miscellaneous Control Clear Register" bitfld.long 0x08 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x08 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x08 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x08 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x08 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "No effect,Clear" bitfld.long 0x08 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "No effect,Clear" textline " " bitfld.long 0x08 21. " REG2_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" bitfld.long 0x08 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No effect,Clear" bitfld.long 0x08 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x08 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "No effect,Clear" bitfld.long 0x08 13. " REG1_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" bitfld.long 0x08 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No effect,Clear" textline " " bitfld.long 0x08 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x08 7. " PLL3_DISABLE ,PLL3 Disable" "No effect,Clear" bitfld.long 0x08 5. " REG0_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" textline " " bitfld.long 0x08 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No effect,Clear" bitfld.long 0x08 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" line.long 0x0C "CCM_ANALOG_MISC2_TOG,Miscellaneous Control Toggle Register" bitfld.long 0x0C 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4" bitfld.long 0x0C 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x0C 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x0C 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x0C 23. " AUDIO_DIV_MSB ,MSB of Post-divider for Audio PLL" "Not toggled,Toggled" bitfld.long 0x0C 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Not toggled,Toggled" textline " " bitfld.long 0x0C 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" bitfld.long 0x0C 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "Not toggled,Toggled" bitfld.long 0x0C 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" textline " " bitfld.long 0x0C 15. " AUDIO_DIV_LSB ,LSB of Post-divider for Audio PLL" "Not toggled,Toggled" bitfld.long 0x0C 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" bitfld.long 0x0C 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Not toggled,Toggled" textline " " bitfld.long 0x0C 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" bitfld.long 0x0C 7. " PLL3_DISABLE ,PLL3 Disable" "Not toggled,Toggled" bitfld.long 0x0C 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "Not toggled,Toggled" bitfld.long 0x0C 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" ",,,,0.100V,,,0.175V" width 0xb tree.end endif tree.end sif (cpu()=="IMX6SOLOLITE") tree "CSI (CMOS Sensor Interface)" base ad:0x020E4000 width 23. group.long 0x00++0x0B line.long 0x00 "CSICR1,CSI Control Register 1" bitfld.long 0x00 31. " SWAP16_EN ,SWAP 16-Bit enable" "Disabled,Enabled" bitfld.long 0x00 30. " EXT_VSYNC ,External VSYNC enable" "Internal,External" bitfld.long 0x00 29. " EOF_INT_EN ,End-of-Frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " PRP_IF_EN ,CSI-PrP interface enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CCIR_MODE ,CCIR Mode Select" "Progressive,Interlace" bitfld.long 0x00 26. " COF_INT_EN ,Change of image field interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " SF_OR_INTEN ,STAT FIFO overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " RF_OR_INTEN ,RXFIFO overrun interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SFF_DMA_DONE_INTEN ,STATFIFO DMA transfer done interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " STATFF_INTEN ,STATFIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " FB2_DMA_DONE_INTEN ,Frame buffer2 DMA transfer done interrupt enable" "Disabled,Enabled" bitfld.long 0x00 19. " FB1_DMA_DONE_INTEN ,Frame buffer1 DMA transfer done interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RXFF_INTEN ,RXFIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " SOF_POL ,SOF interrupt polarity" "Falling,Rising" bitfld.long 0x00 16. " SOF_INTEN ,Start of frame interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " HSYNC_POL ,HSYNC Polarity Select" "Low,High" bitfld.long 0x00 10. " CCIR_EN ,CCIR656 interface enable" "Traditional,CCIR656" bitfld.long 0x00 8. " FCC ,FIFO clear control" "Asynchronous,Synchronous" bitfld.long 0x00 7. " PACK_DIR ,Data packing direction" "From LSB,From MSB" textline " " bitfld.long 0x00 6. " CLR_STATFIFO ,Asynchronous STATFIFO clear" "No effect,Clear" bitfld.long 0x00 5. " CLR_RXFIFO ,Asynchronous RXFIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " GCLK_MODE ,Gated clock mode enable" "Non-gated,Gated" bitfld.long 0x00 3. " INV_DATA ,This bit enables or disables internal inverters on the data lines" "Direct,Inverted" bitfld.long 0x00 2. " INV_PCLK ,Invert pixel clock input" "Direct,Inverted" textline " " bitfld.long 0x00 1. " REDGE ,Valid pixel clock edge select" "Falling,Rising" bitfld.long 0x00 0. " PIXEL_BIT ,This bit indicates the bayer data width for each pixel" "8-bit,10-bit" line.long 0x04 "CSICR2,CSI Control Register 2" bitfld.long 0x04 30.--31. " DMA_BURST_TYPE_RFF ,Burst type of DMA transfer from RXFIFO" "INCR8,INCR4,INCR8,INCR16" bitfld.long 0x04 28.--29. " DMA_BURST_TYPE_SFF ,Burst type of DMA transfer from STATFIFO" "INCR8,INCR4,INCR8,INCR16" bitfld.long 0x04 26. " DRM ,Controls size of statistics grid" "8x6,8x12" bitfld.long 0x04 24.--25. " AFS ,Selects which green pixels are used for auto-focus" "Consecutive,Every third,Every four,Every four" textline " " bitfld.long 0x04 23. " SCE ,Enables or disables the skip count feature" "Disabled,Enabled" bitfld.long 0x04 19.--20. " BTS ,Controls the bayer pattern starting point" "GR,RG,BG,GB" bitfld.long 0x04 16.--18. " LVRM ,Selects the grid size used for live view resolution" "512x384,448x336,384x288,384x256,320x240,288x216,400x300,?..." textline " " hexmask.long.byte 0x04 8.--15. 1. " VSC ,Number of rows to skip" hexmask.long.byte 0x04 0.--7. 1. " HSC ,Number of pixels to skip" line.long 0x08 "CSICR3,CSI Control Register 3" hexmask.long.word 0x08 16.--31. 1. " FRMCNT ,16-bit frame counter" bitfld.long 0x08 15. " FRMCNT_RST ,Frame count reset" "Not reset,Reset" bitfld.long 0x08 14. " DMA_REFLASH_RFF ,This bit reflash the embedded DMA controller for RXFIFO" "Not reflashed,Reflashed" bitfld.long 0x08 13. " DMA_REFLASH_SFF ,This bit reflash the embedded DMA controller for STATFIFO" "Not reflashed,Reflashed" textline " " bitfld.long 0x08 12. " DMA_REQ_EN_RFF ,DMA request enable for RXFIFO" "Disabled,Enabled" bitfld.long 0x08 11. " DMA_REQ_EN_SFF ,DMA request enable for STATFIFO" "Disabled,Enabled" bitfld.long 0x08 8.--10. " STATFF_LEVEL ,Number of data words in STATFIFO which generates an interrupt" "4,8,12,16,24,32,48,64" bitfld.long 0x08 7. " HRESP_ERR_EN ,Hresponse error interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 4.--6. " RXFF_LEVEL ,Number of data words after a RXFIFO full interrupt is generated" "4,8,16,24,32,48,64,96" bitfld.long 0x08 3. " TWO_8BIT_SENSOR ,Two 8-bit sensor mode" "Only one,Two 8-bit" bitfld.long 0x08 2. " ZERO_PACK_EN ,Dummy zero packing enable" "Disabled,Enabled" bitfld.long 0x08 1. " ECC_INT_EN ,Error detection interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " ECC_AUTO_EN ,Automatic error correction enable" "Disabled,Enabled" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "CSISTATFIFO,CSI Statistic FIFO Register" line.long 0x04 "CSIRFIFO,CSI RX FIFO Register" textline " " group.long 0x14++0x07 line.long 0x00 "CSIRXCNT,CSI RX Count Register" hexmask.long.tbyte 0x00 0.--21. 1. " RXCNT ,22-bit counter for RXFIFO" line.long 0x04 "CSISR,CSI Status Register" eventfld.long 0x04 28. " BASEADDR_CHHANGE_ERROR ,Switching occurred before DMA completed" "No error,Error" eventfld.long 0x04 27. " DMA_FIELD0_DONE ,DMA field 0 is complete" "Not completed,Completed" eventfld.long 0x04 26. " DMA_FIELD1_DONE ,DMA field 1 is complete" "Not completed,Completed" eventfld.long 0x04 25. " SF_OR_INT ,STATFIFO overrun interrupt status" "Not overflowed,Overflowed" textline " " eventfld.long 0x04 24. " RF_OR_INT ,RXFIFO overrun interrupt status" "Not overflowed,Overflowed" eventfld.long 0x04 22. " DMA_TSF_DONE_SFF ,DMA transfer done from STATFIFO" "Not completed,Completed" bitfld.long 0x04 21. " STATFF_INT ,STATFIFO full interrupt status" "Not full,Full" eventfld.long 0x04 20. " DMA_TSF_DONE_FB2 ,DMA transfer done in frame buffer2" "Not completed,Completed" textline " " eventfld.long 0x04 19. " DMA_TSF_DONE_FB1 ,DMA transfer done in frame buffer1" "Not completed,Completed" bitfld.long 0x04 18. " RXFF_INT ,RXFIFO full interrupt status" "Not full,Full" eventfld.long 0x04 17. " EOF_INT ,End of frame (Eof) interrupt status" "Not detected,Detected" eventfld.long 0x04 16. " SOF_INT ,Start of frame interrupt status" "Not detected,Detected" textline " " bitfld.long 0x04 15. " F2_INT ,CCIR field 2 interrupt status" "Not detected,About to start" bitfld.long 0x04 14. " F1_INT ,CCIR field 1 interrupt status" "Not detected,About to start" eventfld.long 0x04 13. " COF_INT ,Change of field interrupt status" "Not changed,Change detected" textline " " eventfld.long 0x04 7. " HRESP_ERR_INT ,Hresponse error interrupt status" "No error,Error" eventfld.long 0x04 1. " ECC_INT ,CCIR error interrupt" "No error,Error" bitfld.long 0x04 0. " DRDY ,Presence of data that is ready for transfer in the RXFIFO" "Not ready,Ready" textline " " group.long 0x20++0x2F line.long 0x00 "CSIDMASA_STATFIFO,CSI DMA Start Address Register - For STATFIFO" hexmask.long 0x00 2.--31. 0x04 " DMA_START_ADDR_SFF ,Indicates the start address to write data" line.long 0x04 "CSIDMATS_STATFIFO,CSI DMA Transfer Size Register - For STATFIFO" line.long 0x08 "CSIDMASA_FB1,CSI DMA Start Address Register - For Frame Buffer1" hexmask.long 0x08 2.--31. 0x04 " DMA_START_ADDR_FB1 ,DMA start address in frame buffer1" line.long 0x0C "CSIDMASA_FB2,CSI DMA Transfer Size Register - For Frame Buffer2" hexmask.long 0x0C 2.--31. 0x04 " DMA_START_ADDR_FB2 ,DMA start address in frame buffer2" line.long 0x10 "CSIFBUF_PARA,CSI Frame Buffer Parameter Register" hexmask.long.word 0x10 0.--15. 1. " FBUF_STRIDE ,Indicates the stride of the frame buffer" line.long 0x14 "CSIIMAG_PARA,CSI Image Parameter Register" hexmask.long.word 0x14 16.--31. 1. " IMAGE_WIDTH ,Indicates how many pixels in a line of the image from the sensor" hexmask.long.word 0x14 0.--15. 1. " IMAGE_HEIGHT ,Indicates how many pixels in a column of the image from the sensor" width 0x0B tree.end else tree "CSI2IPU (MIPI CSI to IPU Gasket)" base ad:0x021DCF00 width 16. group.long 0x0000++0x03 line.long 0x00 "CSI2IPU_SW_RST,CSI 2 IPU Gasket Software Reset" bitfld.long 0x00 3. " RGB444_FM ,Rgb888 mode selection" "4'h0 r4b4g4,r4 1'b0 g4 2'b00 b4 1'b0" bitfld.long 0x00 2. " YUV422_8BIT_FM ,YUV422 8-bit mode selection" "YUYV,UYVY" textline " " bitfld.long 0x00 1. " CLK_SEL ,Clock mode selection" "Gated,Non-Gated" bitfld.long 0x00 0. " SW_RST ,Software Reset" "Disabled,Enabled" width 0xB tree.end endif sif (cpu()=="IMX6SOLOLITE") tree "DBGMON (Debug Monitor)" base ad:0x02090000 width 16. group.long 0x00++0x03 line.long 0x00 "CTLR,DBGMON_HW_DBGMON_CTRL" bitfld.long 0x00 31. " SFTRST ,Set to held entire block in reset state" "Operate normally,Reset state" bitfld.long 0x00 30. " CLKGATE ,Set to gate off the clock to the block" "Operate normally,Gated" bitfld.long 0x00 24. " WDOG_IRQ_SEL ,Select the source of WDOG IRQ" "WDOG1,WDOG2" textline " " bitfld.long 0x00 20. " ADDR_MASKEN ,Control the address mask function" "Disabled,Enabled" bitfld.long 0x00 16. " WORKMODE ,Defines whether ignore the transaction in IRQ" "Monitored,Ignored" bitfld.long 0x00 8.--9. " REQSEL ,Defines which sets of AXI transaction will be snaped to SNVS domain registers" "N,N-1,N-2,N-3" textline " " bitfld.long 0x00 5. " ID_TRAPMODE ,Defines the ID trap function" "Disabled,Enabled" bitfld.long 0x00 4. " ADDR_TRAPMODE ,Defines the address trap function" "Disabled,Enabled" bitfld.long 0x00 3. " CLR_SNVS ,Clear the registers in SNVS domain" "Not cleared,Cleared" textline " " eventfld.long 0x00 2. " CLR ,Clear the registers in SOC domain" "Not cleared,Cleared" bitfld.long 0x00 1. " SNAP ,Snapshot the registers selected by REQSEL to SNVS domain registers" "Not snaped,Snaped" bitfld.long 0x00 0. " RUN ,Enables the DBGMON operation" "HALT,RUN" group.long 0x10++0x03 line.long 0x00 "MASTER_EN,DBGMON_HW_DBGMON_MASTER_EN" bitfld.long 0x00 15. " MID15 ,Enables monitoring on MasterID 15" "Disabled,Enabled" bitfld.long 0x00 14. " MID15 ,Enables monitoring on MasterID 14" "Disabled,Enabled" bitfld.long 0x00 13. " MID15 ,Enables monitoring on MasterID 13" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MID15 ,Enables monitoring on MasterID 12" "Disabled,Enabled" bitfld.long 0x00 11. " MID15 ,Enables monitoring on MasterID 11" "Disabled,Enabled" bitfld.long 0x00 10. " MID15 ,Enables monitoring on MasterID 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MID15 ,Enables monitoring on MasterID 9" "Disabled,Enabled" bitfld.long 0x00 8. " MID15 ,Enables monitoring on MasterID 8" "Disabled,Enabled" bitfld.long 0x00 7. " MID15 ,Enables monitoring on MasterID 7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " MID15 ,Enables monitoring on MasterID 6" "Disabled,Enabled" bitfld.long 0x00 5. " MID15 ,Enables monitoring on MasterID 5" "Disabled,Enabled" bitfld.long 0x00 4. " MID15 ,Enables monitoring on MasterID 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MID15 ,Enables monitoring on MasterID 3" "Disabled,Enabled" bitfld.long 0x00 2. " MID15 ,Enables monitoring on MasterID 2" "Disabled,Enabled" bitfld.long 0x00 1. " MID15 ,Enables monitoring on MasterID 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MID15 ,Enables monitoring on MasterID 0" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "IRQ,DBGMON_HW_DBGMON_IRQ" bitfld.long 0x00 31. " IRQ_MID[31] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQ_MID[30] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQ_MID[29] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " IRQ_MID[28] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " IRQ_MID[27] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQ_MID[26] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQ_MID[25] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQ_MID[24] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " IRQ_MID[23] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " IRQ_MID[22] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQ_MID[21] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQ_MID[20] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQ_MID[19] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQ_MID[18] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQ_MID[17] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " IRQ_MID[16] ,Indicates which master sends the interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " ID_TRAP_IRQ ,Indicates the ID trap interrupt is happening" "No interrupt,Interrupt" bitfld.long 0x00 2. " ADDR_TRAP_IRQ ,Indicates the Address trap interrupt is happening" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " ID_TRAP_IRQEN ,ID trap interrupt control" "Disabled,Enabled" bitfld.long 0x00 0. " ADDR_TRAP_IRQEN ,Address trap interrupt control" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "TRAP_ADDR_LOW,DBGMON_HW_DBGMON_TRAP_ADDR_LOW" group.long 0x40++0x03 line.long 0x00 "TRAP_ADDR_HIGH,DBGMON_HW_DBGMON_TRAP_ADDR_HIGH" group.long 0x50++0x03 line.long 0x00 "TRAP_ID,DBGMON_HW_DBGMON_TRAP_ID" hexmask.long.word 0x00 16.--31. 1. " TRAP_ID_HIGH ,Contains 16-bit high ID for ID trap range" hexmask.long.word 0x00 0.--15. 1. " TRAP_ID_LOW ,Contains 16-bit low ID for ID trap range" rgroup.long 0x60++0x03 line.long 0x00 "SNVS_ADDR,DBGMON_HW_DBGMON_SNVS_ADDR" rgroup.long 0x70++0x03 line.long 0x00 "SNVS_DATA,DBGMON_HW_DBGMON_SNVS_DATA" rgroup.long 0x80++0x03 line.long 0x00 "SNVS_INFO,DBGMON_HW_DBGMON_SNVS_INFO" hexmask.long.word 0x00 16.--31. 1. " ID ,Contains the ID of the AXI transaction in SNVS domain" bitfld.long 0x00 1. " RDWR ,Indicates the read/write attribute of AXI transaction in SNVS domain" "Read,Write" bitfld.long 0x00 0. " COMPLETE ,Indicates whether the AXI transaction in SNVS domain complete" "Not completed,Completed" rgroup.long 0x90++0x03 line.long 0x00 "VERSION,DBGMON_HW_DBGMON_VERSION" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Reflecting the MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Reflecting the MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Reflecting the stepping of the RTL version" width 0x0B tree.end endif sif (cpu()=="IMX6SOLOLITE") tree "DCP (Data Co-Processor)" base ad:0x020FC000 width 17. group.long 0x00++0x2F line.long 0x00 "CTRL,DCP Control Register 0" bitfld.long 0x00 31. " SFTRST ,Enable normal DCP operation" "Disabled,Enabled" bitfld.long 0x00 30. " CLKGATE ,This bit must be set to zero for normal operation" "Not gated,Gated" textline " " rbitfld.long 0x00 29. " PRESENT_CRYPTO ,Indicates whether the crypto (Cipher/Hash) functions are present" "Absent,Present" rbitfld.long 0x00 28. " PRESENT_SHA ,Indicates whether the SHA1/SHA2 functions are present" "Absent,Present" textline " " bitfld.long 0x00 23. " GATHER_RESIDUAL_WRITES ,Software should set this bit to enable ragged writes to unaligned buffers to be gathered between multiple write operations" "Disabled,Enabled" bitfld.long 0x00 22. " ENABLE_CONTEXT_CACHING ,Software should set this bit to enable caching of contexts between operations" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ENABLE_CONTEXT_SWITCHING ,Enable automatic context switching for the channels" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CHANNEL_INTERRUPT_ENABLE[3] ,Per-channel interrupt enable bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " CHANNEL_INTERRUPT_ENABLE[2] ,Per-channel interrupt enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CHANNEL_INTERRUPT_ENABLE[1] ,Per-channel interrupt enable bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " CHANNEL_INTERRUPT_ENABLE[0] ,Per-channel interrupt enable bit 0" "Disabled,Enabled" line.long 0x04 "CTRL_SET,DCP Control Register 0" bitfld.long 0x04 31. " SFTRST ,Enable normal DCP operation" "Disabled,Enabled" bitfld.long 0x04 30. " CLKGATE ,This bit must be set to zero for normal operation" "Not gated,Gated" textline " " rbitfld.long 0x04 29. " PRESENT_CRYPTO ,Indicates whether the crypto (Cipher/Hash) functions are present" "Absent,Present" rbitfld.long 0x04 28. " PRESENT_SHA ,Indicates whether the SHA1/SHA2 functions are present" "Absent,Present" textline " " bitfld.long 0x04 23. " GATHER_RESIDUAL_WRITES ,Software should set this bit to enable ragged writes to unaligned buffers to be gathered between multiple write operations" "Disabled,Enabled" bitfld.long 0x04 22. " ENABLE_CONTEXT_CACHING ,Software should set this bit to enable caching of contexts between operations" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " ENABLE_CONTEXT_SWITCHING ,Enable automatic context switching for the channels" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CHANNEL_INTERRUPT_ENABLE[3] ,Per-channel interrupt enable bit 3" "Disabled,Enabled" bitfld.long 0x04 2. " CHANNEL_INTERRUPT_ENABLE[2] ,Per-channel interrupt enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CHANNEL_INTERRUPT_ENABLE[1] ,Per-channel interrupt enable bit 1" "Disabled,Enabled" bitfld.long 0x04 0. " CHANNEL_INTERRUPT_ENABLE[0] ,Per-channel interrupt enable bit 0" "Disabled,Enabled" line.long 0x08 "CTRL_CLR,DCP Control Register 0" bitfld.long 0x08 31. " SFTRST ,Enable normal DCP operation" "Disabled,Enabled" bitfld.long 0x08 30. " CLKGATE ,This bit must be set to zero for normal operation" "Not gated,Gated" textline " " rbitfld.long 0x08 29. " PRESENT_CRYPTO ,Indicates whether the crypto (Cipher/Hash) functions are present" "Absent,Present" rbitfld.long 0x08 28. " PRESENT_SHA ,Indicates whether the SHA1/SHA2 functions are present" "Absent,Present" textline " " bitfld.long 0x08 23. " GATHER_RESIDUAL_WRITES ,Software should set this bit to enable ragged writes to unaligned buffers to be gathered between multiple write operations" "Disabled,Enabled" bitfld.long 0x08 22. " ENABLE_CONTEXT_CACHING ,Software should set this bit to enable caching of contexts between operations" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " ENABLE_CONTEXT_SWITCHING ,Enable automatic context switching for the channels" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " CHANNEL_INTERRUPT_ENABLE[3] ,Per-channel interrupt enable bit 3" "Disabled,Enabled" bitfld.long 0x08 2. " CHANNEL_INTERRUPT_ENABLE[2] ,Per-channel interrupt enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " CHANNEL_INTERRUPT_ENABLE[1] ,Per-channel interrupt enable bit 1" "Disabled,Enabled" bitfld.long 0x08 0. " CHANNEL_INTERRUPT_ENABLE[0] ,Per-channel interrupt enable bit 0" "Disabled,Enabled" line.long 0x0C "CTRL_TOG,DCP Control Register 0" bitfld.long 0x0C 31. " SFTRST ,Enable normal DCP operation" "Disabled,Enabled" bitfld.long 0x0C 30. " CLKGATE ,This bit must be set to zero for normal operation" "Not gated,Gated" textline " " rbitfld.long 0x0C 29. " PRESENT_CRYPTO ,Indicates whether the crypto (Cipher/Hash) functions are present" "Absent,Present" rbitfld.long 0x0C 28. " PRESENT_SHA ,Indicates whether the SHA1/SHA2 functions are present" "Absent,Present" textline " " bitfld.long 0x0C 23. " GATHER_RESIDUAL_WRITES ,Software should set this bit to enable ragged writes to unaligned buffers to be gathered between multiple write operations" "Disabled,Enabled" bitfld.long 0x0C 22. " ENABLE_CONTEXT_CACHING ,Software should set this bit to enable caching of contexts between operations" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " ENABLE_CONTEXT_SWITCHING ,Enable automatic context switching for the channels" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " CHANNEL_INTERRUPT_ENABLE[3] ,Per-channel interrupt enable bit 3" "Disabled,Enabled" bitfld.long 0x0C 2. " CHANNEL_INTERRUPT_ENABLE[2] ,Per-channel interrupt enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " CHANNEL_INTERRUPT_ENABLE[1] ,Per-channel interrupt enable bit 1" "Disabled,Enabled" bitfld.long 0x0C 0. " CHANNEL_INTERRUPT_ENABLE[0] ,Per-channel interrupt enable bit 0" "Disabled,Enabled" line.long 0x10 "STAT,DCP Status Register" rbitfld.long 0x10 28. " OTP_KEY_READY ,OTP key has been shifted from the fuse block and is ready for use" "Not ready,Ready" rbitfld.long 0x10 24.--27. " CUR_CHANNEL ,Current (active) channel (encoded)" "None,CH0,CH1,CH2,CH3,?..." textline " " sif (cpu()=="IMX6ULL") rbitfld.long 0x1C 19. " READY_CHANNELS[3] ,Channel 3 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 18. " READY_CHANNELS[2] ,Channel 2 ready to proceed with a transfer" "Not ready,Ready" textline " " rbitfld.long 0x1C 17. " READY_CHANNELS[1] ,Channel 1 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 16. " READY_CHANNELS[0] ,Channel 0 ready to proceed with a transfer" "Not ready,Ready" textline " " bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hexmask.long.byte 0x1C 16.--23. 1. " READY_CHANNELS ,Indicates which channels are ready to proceed with a transfer" bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x14 "STAT_SET,DCP Status Register" rbitfld.long 0x14 28. " OTP_KEY_READY ,OTP key has been shifted from the fuse block and is ready for use" "Not ready,Ready" rbitfld.long 0x14 24.--27. " CUR_CHANNEL ,Current (active) channel (encoded)" "None,CH0,CH1,CH2,CH3,?..." textline " " sif (cpu()=="IMX6ULL") rbitfld.long 0x1C 19. " READY_CHANNELS[3] ,Channel 3 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 18. " READY_CHANNELS[2] ,Channel 2 ready to proceed with a transfer" "Not ready,Ready" textline " " rbitfld.long 0x1C 17. " READY_CHANNELS[1] ,Channel 1 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 16. " READY_CHANNELS[0] ,Channel 0 ready to proceed with a transfer" "Not ready,Ready" textline " " bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hexmask.long.byte 0x1C 16.--23. 1. " READY_CHANNELS ,Indicates which channels are ready to proceed with a transfer" bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x18 "STAT_CLR,DCP Status Register" rbitfld.long 0x18 28. " OTP_KEY_READY ,OTP key has been shifted from the fuse block and is ready for use" "Not ready,Ready" rbitfld.long 0x18 24.--27. " CUR_CHANNEL ,Current (active) channel (encoded)" "None,CH0,CH1,CH2,CH3,?..." textline " " sif (cpu()=="IMX6ULL") rbitfld.long 0x1C 19. " READY_CHANNELS[3] ,Channel 3 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 18. " READY_CHANNELS[2] ,Channel 2 ready to proceed with a transfer" "Not ready,Ready" textline " " rbitfld.long 0x1C 17. " READY_CHANNELS[1] ,Channel 1 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 16. " READY_CHANNELS[0] ,Channel 0 ready to proceed with a transfer" "Not ready,Ready" textline " " bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hexmask.long.byte 0x1C 16.--23. 1. " READY_CHANNELS ,Indicates which channels are ready to proceed with a transfer" bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x1C "STAT_TOG,DCP Status Register" rbitfld.long 0x1C 28. " OTP_KEY_READY ,OTP key has been shifted from the fuse block and is ready for use" "Not ready,Ready" rbitfld.long 0x1C 24.--27. " CUR_CHANNEL ,Current (active) channel (encoded)" "None,CH0,CH1,CH2,CH3,?..." textline " " sif (cpu()=="IMX6ULL") rbitfld.long 0x1C 19. " READY_CHANNELS[3] ,Channel 3 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 18. " READY_CHANNELS[2] ,Channel 2 ready to proceed with a transfer" "Not ready,Ready" textline " " rbitfld.long 0x1C 17. " READY_CHANNELS[1] ,Channel 1 ready to proceed with a transfer" "Not ready,Ready" rbitfld.long 0x1C 16. " READY_CHANNELS[0] ,Channel 0 ready to proceed with a transfer" "Not ready,Ready" textline " " bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hexmask.long.byte 0x1C 16.--23. 1. " READY_CHANNELS ,Indicates which channels are ready to proceed with a transfer" bitfld.long 0x1C 0.--3. " IRQ ,Indicates which channels have pending interrupt requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x20 "DCHANNELCTRL,DCP Channel Control Register" bitfld.long 0x20 16. " CH0_IRQ_MERGED ,Indicates that the interrupt for channel 0 should be merged with the other interrupts on the shared dcp_irq interrupt" "Not indicated,Indicated" textline " " bitfld.long 0x20 11. " HIGH_PRIORITY_CHANNEL[3] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x20 10. " HIGH_PRIORITY_CHANNEL[2] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x20 9. " HIGH_PRIORITY_CHANNEL[1] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x20 8. " HIGH_PRIORITY_CHANNEL[0] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x20 3. " ENABLE_CHANNEL[3] ,Enable the DMA channel 3" "Disabled,Enabled" bitfld.long 0x20 2. " ENABLE_CHANNEL[2] ,Enable the DMA channel 2" "Disabled,Enabled" textline " " bitfld.long 0x20 1. " ENABLE_CHANNEL[1] ,Enable the DMA channel 1" "Disabled,Enabled" bitfld.long 0x20 0. " ENABLE_CHANNEL[0] ,Enable the DMA channel 0" "Disabled,Enabled" line.long 0x24 "CHANNELCTRL_SET,DCP Channel Control Register" bitfld.long 0x24 16. " CH0_IRQ_MERGED ,Indicates that the interrupt for channel 0 should be merged with the other interrupts on the shared dcp_irq interrupt" "Not indicated,Indicated" textline " " bitfld.long 0x24 11. " HIGH_PRIORITY_CHANNEL[3] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x24 10. " HIGH_PRIORITY_CHANNEL[2] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x24 9. " HIGH_PRIORITY_CHANNEL[1] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x24 8. " HIGH_PRIORITY_CHANNEL[0] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x24 3. " ENABLE_CHANNEL[3] ,Enable the DMA channel 3" "Disabled,Enabled" bitfld.long 0x24 2. " ENABLE_CHANNEL[2] ,Enable the DMA channel 2" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " ENABLE_CHANNEL[1] ,Enable the DMA channel 1" "Disabled,Enabled" bitfld.long 0x24 0. " ENABLE_CHANNEL[0] ,Enable the DMA channel 0" "Disabled,Enabled" line.long 0x28 "CHANNELCTRL_CLR,DCP Channel Control Register" bitfld.long 0x28 16. " CH0_IRQ_MERGED ,Indicates that the interrupt for channel 0 should be merged with the other interrupts on the shared dcp_irq interrupt" "Not indicated,Indicated" textline " " bitfld.long 0x28 11. " HIGH_PRIORITY_CHANNEL[3] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x28 10. " HIGH_PRIORITY_CHANNEL[2] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x28 9. " HIGH_PRIORITY_CHANNEL[1] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x28 8. " HIGH_PRIORITY_CHANNEL[0] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x28 3. " ENABLE_CHANNEL[3] ,Enable the DMA channel 3" "Disabled,Enabled" bitfld.long 0x28 2. " ENABLE_CHANNEL[2] ,Enable the DMA channel 2" "Disabled,Enabled" textline " " bitfld.long 0x28 1. " ENABLE_CHANNEL[1] ,Enable the DMA channel 1" "Disabled,Enabled" bitfld.long 0x28 0. " ENABLE_CHANNEL[0] ,Enable the DMA channel 0" "Disabled,Enabled" line.long 0x2C "CHANNELCTRL_TOG,DCP Channel Control Register" bitfld.long 0x2C 16. " CH0_IRQ_MERGED ,Indicates that the interrupt for channel 0 should be merged with the other interrupts on the shared dcp_irq interrupt" "Not indicated,Indicated" textline " " bitfld.long 0x2C 11. " HIGH_PRIORITY_CHANNEL[3] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x2C 10. " HIGH_PRIORITY_CHANNEL[2] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x2C 9. " HIGH_PRIORITY_CHANNEL[1] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" bitfld.long 0x2C 8. " HIGH_PRIORITY_CHANNEL[0] ,Causes the corresponding channel to have high-priority arbitration" "Not caused,Caused" textline " " bitfld.long 0x2C 3. " ENABLE_CHANNEL[3] ,Enable the DMA channel 3" "Disabled,Enabled" bitfld.long 0x2C 2. " ENABLE_CHANNEL[2] ,Enable the DMA channel 2" "Disabled,Enabled" textline " " bitfld.long 0x2C 1. " ENABLE_CHANNEL[1] ,Enable the DMA channel 1" "Disabled,Enabled" bitfld.long 0x2C 0. " ENABLE_CHANNEL[0] ,Enable the DMA channel 0" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "CAPABILITY0,DCP Capability 0 Register" bitfld.long 0x00 31. " DISABLE_DECRYPT ,Disable decryption" "No,Yes" bitfld.long 0x00 29. " DISABLE_UNIQUE_KEY ,Disable the per-device unique key" "No,Yes" textline " " rbitfld.long 0x00 8.--11. " NUM_CHANNELS ,Encoded value indicating the number of channels implemented in the design" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " NUM_KEYS ,Encoded value indicating the number of key storage locations implemented in the design" rgroup.long 0x40++0x03 line.long 0x00 "CAPABILITY1,DCP Capability 1 Register" hexmask.long.word 0x00 16.--31. 1. " HASH_ALGORITHMS ,One-hot field indicating which hashing features are implemented in HW" hexmask.long.word 0x00 0.--15. 1. " CIPHER_ALGORITHMS ,One-hot field indicating which cipher algorithms are available" group.long 0x50++0x03 line.long 0x00 "CONTEXT,DCP Context Buffer Pointer" group.long 0x60++0x03 line.long 0x00 "KEY,DCP Key Index" bitfld.long 0x00 4.--5. " INDEX ,Key index pointer" "0,1,2,3" bitfld.long 0x00 0.--1. " SUBWORD ,Key subword pointer" "0,1,2,3" group.long 0x70++0x03 line.long 0x00 "KEYDATA,DCP Key Data" rgroup.long 0x80++0x03 line.long 0x00 "PACKET0,DCP Work Packet 0 Status Register" rgroup.long 0x90++0x03 line.long 0x00 "PACKET1,DCP Work Packet 1 Status Register" hexmask.long.byte 0x00 24.--31. 1. " TAG ,Packet Tag" bitfld.long 0x00 23. " OUTPUT_WORDSWAP ,Reflects whether the DCP engine will wordswap output data (big-endian data)" "Not swapped,Swapped" textline " " bitfld.long 0x00 22. " OUTPUT_BYTESWAP ,Reflects whether the DCP engine will byteswap output data (big-endian data)" "Not swapped,Swapped" bitfld.long 0x00 21. " INPUT_WORDSWAP ,Reflects whether the DCP engine will wordswap input data (big-endian data)" "Not swapped,Swapped" textline " " bitfld.long 0x00 20. " INPUT_BYTESWAP ,Reflects whether the DCP engine will byteswap input data (big-endian data)" "Not swapped,Swapped" bitfld.long 0x00 19. " KEY_WORDSWAP ,Reflects whether the DCP engine will swap key words (big-endian key)" "Not swapped,Swapped" textline " " bitfld.long 0x00 18. " KEY_BYTESWAP ,Reflects whether the DCP engine will swap key bytes (big-endian key)" "Not swapped,Swapped" bitfld.long 0x00 17. " TEST_SEMA_IRQ ,Test the channel semaphore transition to 0 - FOR TEST USE ONLY" "0,1" textline " " bitfld.long 0x00 16. " CONSTANT_FILL ,Fill the destination buffer with the value found in the source address field" "Disabled,Enabled" bitfld.long 0x00 15. " HASH_OUTPUT ,Controls whether the input or output data is hashed" "Input,Output" textline " " bitfld.long 0x00 14. " CHECK_HASH ,Reflects whether the calculated hash value should be compared against the hash provided in the payload" "Not compared,Compared" bitfld.long 0x00 13. " HASH_TERM ,Reflects whether the current hashing block is the final block in the hashing operation" "Not final,Final" textline " " bitfld.long 0x00 12. " HASH_INIT ,Reflects whether the current hashing block is the initial block in the hashing operation" "Not initial,Initial" bitfld.long 0x00 11. " PAYLOAD_KEY ,Indicates the payload contains the key" "Not contained,Contained" textline " " bitfld.long 0x00 10. " OTP_KEY ,Reflects whether a hardware-based key should be used" "No,Yes" bitfld.long 0x00 9. " CIPHER_INIT ,Reflects whether the cipher block should load the initialization vector from the payload for this operation" "No,Yes" textline " " bitfld.long 0x00 8. " CIPHER_ENCRYPT ,Indicates whether the operation is encryption or decryption" "Decrypt,Encrypt" bitfld.long 0x00 7. " ENABLE_BLIT ,Reflects whether the DCP should perform a blit operation" "No,Yes" textline " " bitfld.long 0x00 6. " ENABLE_HASH ,Reflects whether the selected hashing function should be enabled for this operation" "Disabled,Enabled" bitfld.long 0x00 5. " ENABLE_CIPHER ,Reflects whether the selected cipher function should be enabled for this operation" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ENABLE_MEMCOPY ,Reflects whether the selected hashing function should be enabled for this operation" "Disabled,Enabled" bitfld.long 0x00 3. " CHAIN_CONTIGUOUS ,Reflects whether the next packet's address is located following this packet's payload" "Not contiguous,Contiguous" textline " " bitfld.long 0x00 2. " CHAIN ,Reflects whether the next command pointer register should be loaded into the channel's current descriptor pointer" "No,Yes" bitfld.long 0x00 1. " DECR_SEMAPHORE ,Reflects whether the channel's semaphore should be decremented at the end of the current operation" "No,Yes" textline " " bitfld.long 0x00 0. " INTERRUPT ,Reflects whether the channel should issue an interrupt upon completion of the packet" "No,Yes" rgroup.long 0xA0++0x03 line.long 0x00 "PACKET2,DCP Work Packet 2 Status Register" hexmask.long.byte 0x00 24.--31. 1. " CIPHER_CFG ,Cipher configuration bits" bitfld.long 0x00 16.--19. " HASH_SELECT ,Hash Selection Field" "SHA1,CRC32,SHA256,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " KEY_SELECT ,Key Selection Field" bitfld.long 0x00 4.--7. " CIPHER_MODE ,Cipher Mode Selection Field" "ECB,CBC,?..." textline " " bitfld.long 0x00 0.--3. " CIPHER_SELECT ,Cipher Selection Field" "AES128,?..." rgroup.long 0xB0++0x03 line.long 0x00 "PACKET3,DCP Work Packet 3 Status Register" rgroup.long 0xC0++0x03 line.long 0x00 "PACKET4,DCP Work Packet 4 Status Register" rgroup.long 0xD0++0x03 line.long 0x00 "PACKET5,DCP Work Packet 5 Status Register" rgroup.long 0xE0++0x03 line.long 0x00 "PACKET6,DCP Work Packet 6 Status Register" tree " Channel 0" width 11. group.long 0x100++0x03 line.long 0x00 "CH0CMDPTR,DCP Channel 0 Command Pointer Address Register" group.long (0x100+0x10)++0x03 line.long 0x00 "CH0SEMA,DCP Channel 0 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " VALUE ,Read-only field shows the current (instantaneous) value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT ,Value written to this field is added to the semaphore count" group.long (0x100+0x20)++0x0F line.long 0x00 "CH0STAT,DCP Channel 0 Status Register" hexmask.long.byte 0x00 24.--31. 1. " TAG ,Indicates the tag from the last completed packet in the command structure" textline " " hexmask.long.byte 0x00 16.--23. 1. " ERROR_CODE ,Indicates additional error codes for some error conditions" bitfld.long 0x00 6. " ERROR_PAGEFAULT ,Indicates a page fault occurred while converting a virtual address to a physical address" "No error,Error" textline " " bitfld.long 0x00 5. " ERROR_DST ,Indicates a bus error occurred when storing to the destination buffer" "No error,Error" bitfld.long 0x00 4. " ERROR_SRC ,Indicates a bus error occurred when reading from the source buffer" "No error,Error" textline " " bitfld.long 0x00 3. " ERROR_PACKET ,Indicates that a a bus error occurred when reading the packet or payload or when writing status back to the packet payload" "No error,Error" bitfld.long 0x00 2. " ERROR_SETUP ,Indicates that the hardware has detected an invalid programming configuration such as a buffer length that is not a multiple of the natural data size for the operation" "No error,Error" textline " " bitfld.long 0x00 1. " HASH_MISMATCH ,Indicates that a hashing check operation mismatched for control packets that enable the HASH_CHECK bit" "Not mismatched,Mismatched" group.long (0x100+0x30)++0x0F line.long 0x00 "CH0OPTS,DCP Channel 0 Options Register" hexmask.long.word 0x00 0.--15. 1. " RECOVERY_TIMER ,Indicates the recovery time for the channel" tree.end tree " Channel 1" width 11. group.long 0x140++0x03 line.long 0x00 "CH1CMDPTR,DCP Channel 1 Command Pointer Address Register" group.long (0x140+0x10)++0x03 line.long 0x00 "CH1SEMA,DCP Channel 1 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " VALUE ,Read-only field shows the current (instantaneous) value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT ,Value written to this field is added to the semaphore count" group.long (0x140+0x20)++0x0F line.long 0x00 "CH1STAT,DCP Channel 1 Status Register" hexmask.long.byte 0x00 24.--31. 1. " TAG ,Indicates the tag from the last completed packet in the command structure" textline " " hexmask.long.byte 0x00 16.--23. 1. " ERROR_CODE ,Indicates additional error codes for some error conditions" bitfld.long 0x00 6. " ERROR_PAGEFAULT ,Indicates a page fault occurred while converting a virtual address to a physical address" "No error,Error" textline " " bitfld.long 0x00 5. " ERROR_DST ,Indicates a bus error occurred when storing to the destination buffer" "No error,Error" bitfld.long 0x00 4. " ERROR_SRC ,Indicates a bus error occurred when reading from the source buffer" "No error,Error" textline " " bitfld.long 0x00 3. " ERROR_PACKET ,Indicates that a a bus error occurred when reading the packet or payload or when writing status back to the packet payload" "No error,Error" bitfld.long 0x00 2. " ERROR_SETUP ,Indicates that the hardware has detected an invalid programming configuration such as a buffer length that is not a multiple of the natural data size for the operation" "No error,Error" textline " " bitfld.long 0x00 1. " HASH_MISMATCH ,Indicates that a hashing check operation mismatched for control packets that enable the HASH_CHECK bit" "Not mismatched,Mismatched" group.long (0x140+0x30)++0x0F line.long 0x00 "CH1OPTS,DCP Channel 1 Options Register" hexmask.long.word 0x00 0.--15. 1. " RECOVERY_TIMER ,Indicates the recovery time for the channel" tree.end tree " Channel 2" width 11. group.long 0x180++0x03 line.long 0x00 "CH2CMDPTR,DCP Channel 2 Command Pointer Address Register" group.long (0x180+0x10)++0x03 line.long 0x00 "CH2SEMA,DCP Channel 2 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " VALUE ,Read-only field shows the current (instantaneous) value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT ,Value written to this field is added to the semaphore count" group.long (0x180+0x20)++0x0F line.long 0x00 "CH2STAT,DCP Channel 2 Status Register" hexmask.long.byte 0x00 24.--31. 1. " TAG ,Indicates the tag from the last completed packet in the command structure" textline " " hexmask.long.byte 0x00 16.--23. 1. " ERROR_CODE ,Indicates additional error codes for some error conditions" bitfld.long 0x00 6. " ERROR_PAGEFAULT ,Indicates a page fault occurred while converting a virtual address to a physical address" "No error,Error" textline " " bitfld.long 0x00 5. " ERROR_DST ,Indicates a bus error occurred when storing to the destination buffer" "No error,Error" bitfld.long 0x00 4. " ERROR_SRC ,Indicates a bus error occurred when reading from the source buffer" "No error,Error" textline " " bitfld.long 0x00 3. " ERROR_PACKET ,Indicates that a a bus error occurred when reading the packet or payload or when writing status back to the packet payload" "No error,Error" bitfld.long 0x00 2. " ERROR_SETUP ,Indicates that the hardware has detected an invalid programming configuration such as a buffer length that is not a multiple of the natural data size for the operation" "No error,Error" textline " " bitfld.long 0x00 1. " HASH_MISMATCH ,Indicates that a hashing check operation mismatched for control packets that enable the HASH_CHECK bit" "Not mismatched,Mismatched" group.long (0x180+0x30)++0x0F line.long 0x00 "CH2OPTS,DCP Channel 2 Options Register" hexmask.long.word 0x00 0.--15. 1. " RECOVERY_TIMER ,Indicates the recovery time for the channel" tree.end tree " Channel 3" width 11. group.long 0x1C0++0x03 line.long 0x00 "CH3CMDPTR,DCP Channel 3 Command Pointer Address Register" group.long (0x1C0+0x10)++0x03 line.long 0x00 "CH3SEMA,DCP Channel 3 Semaphore Register" hexmask.long.byte 0x00 16.--23. 1. " VALUE ,Read-only field shows the current (instantaneous) value of the semaphore counter" hexmask.long.byte 0x00 0.--7. 1. " INCREMENT ,Value written to this field is added to the semaphore count" group.long (0x1C0+0x20)++0x0F line.long 0x00 "CH3STAT,DCP Channel 3 Status Register" hexmask.long.byte 0x00 24.--31. 1. " TAG ,Indicates the tag from the last completed packet in the command structure" textline " " hexmask.long.byte 0x00 16.--23. 1. " ERROR_CODE ,Indicates additional error codes for some error conditions" bitfld.long 0x00 6. " ERROR_PAGEFAULT ,Indicates a page fault occurred while converting a virtual address to a physical address" "No error,Error" textline " " bitfld.long 0x00 5. " ERROR_DST ,Indicates a bus error occurred when storing to the destination buffer" "No error,Error" bitfld.long 0x00 4. " ERROR_SRC ,Indicates a bus error occurred when reading from the source buffer" "No error,Error" textline " " bitfld.long 0x00 3. " ERROR_PACKET ,Indicates that a a bus error occurred when reading the packet or payload or when writing status back to the packet payload" "No error,Error" bitfld.long 0x00 2. " ERROR_SETUP ,Indicates that the hardware has detected an invalid programming configuration such as a buffer length that is not a multiple of the natural data size for the operation" "No error,Error" textline " " bitfld.long 0x00 1. " HASH_MISMATCH ,Indicates that a hashing check operation mismatched for control packets that enable the HASH_CHECK bit" "Not mismatched,Mismatched" group.long (0x1C0+0x30)++0x0F line.long 0x00 "CH3OPTS,DCP Channel 3 Options Register" hexmask.long.word 0x00 0.--15. 1. " RECOVERY_TIMER ,Indicates the recovery time for the channel" tree.end textline " " width 17. group.long 0x400++0x03 line.long 0x00 "DBGSELECT,DCP Debug Select Register" hexmask.long.byte 0x00 0.--7. 1. " INDEX ,Selects a value to read via the debug data register" rgroup.long 0x410++0x03 line.long 0x00 "DBGDATA,DCP Debug Data Register" group.long 0x420++0x03 line.long 0x00 "PAGETABLE,DCP Page Table Register" hexmask.long 0x00 2.--31. 0x04 " BASE ,Page Table Base Address" bitfld.long 0x00 1. " FLUSH ,Page Table Flush control" "Not flushed,Flushed" textline " " bitfld.long 0x00 0. " ENABLE ,Page Table Enable control" "Disabled,Enabled" rgroup.long 0x430++0x03 line.long 0x00 "VERSION,DCP Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-onlyl value reflecting the MAJOR version of the design implementation" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-onlyl value reflecting the MINOR version of the design implementation" textline " " hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-onlyl value reflecting the stepping of version of the design implementation" width 0x0b tree.end endif sif (cpu()!="IMX6SOLOLITE") tree.open "DCIC (Display Content Integrity Checker)" tree "DCIC 1" base ad:0x020E4000 width 9. group.long 0x00++0x0B line.long 0x00 "DCICC,DCIC Control Register" bitfld.long 0x00 7. " CLK_POL ,DISP_CLK signal polarity" "Not inverted,Inverted" bitfld.long 0x00 6. " VSYNC_POL ,VSYNC_IN signal polarity" "Active High,Active Low" bitfld.long 0x00 5. " HSYNC_POL ,HSYNC_IN signal polarity" "Active High,Active Low" bitfld.long 0x00 4. " DE_POL ,DATA_EN_IN signal polarity" "Active High,Active Low" textline " " bitfld.long 0x00 0. " IC_EN ,Integrity Check enable" "Disabled,Enabled" line.long 0x04 "DCICIC,DCIC Interrupt Control Register" bitfld.long 0x04 16. " EXT_SIG_EN ,External controller mismatch indication signal" "Disabled,Enabled" bitfld.long 0x04 3. " FREEZE_MASK ,Disable change of interrupt masks" "No,Yes" bitfld.long 0x04 1. " FI_MASK ,Functional Interrupt mask" "Not masked,Masked" bitfld.long 0x04 0. " EI_MASK ,Error Interrupt mask" "Not masked,Masked" line.long 0x08 "DCICS,DCIC Status Register" eventfld.long 0x08 17. " FI_STAT ,Functional Interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 16. " EI_STAT ,Error Interrupt status" "No interrupt,Interrupt" eventfld.long 0x08 15. " ROI_MATCH_STAT[15] ,Mismatch at ROI 15 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 14. " ROI_MATCH_STAT[14] ,Mismatch at ROI 14 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 13. " ROI_MATCH_STAT[13] ,Mismatch at ROI 13 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 12. " ROI_MATCH_STAT[12] ,Mismatch at ROI 12 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 11. " ROI_MATCH_STAT[11] ,Mismatch at ROI 11 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 10. " ROI_MATCH_STAT[10] ,Mismatch at ROI 10 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 9. " ROI_MATCH_STAT[9] ,Mismatch at ROI 9 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 8. " ROI_MATCH_STAT[8] ,Mismatch at ROI 8 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 7. " ROI_MATCH_STAT[7] ,Mismatch at ROI 7 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 6. " ROI_MATCH_STAT[6] ,Mismatch at ROI 6 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 5. " ROI_MATCH_STAT[5] ,Mismatch at ROI 5 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 4. " ROI_MATCH_STAT[4] ,Mismatch at ROI 4 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 3. " ROI_MATCH_STAT[3] ,Mismatch at ROI 3 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 2. " ROI_MATCH_STAT[2] ,Mismatch at ROI 2 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 1. " ROI_MATCH_STAT[1] ,Mismatch at ROI 1 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 0. " ROI_MATCH_STAT[0] ,Mismatch at ROI 0 calculated CRC " "Not mismatched,Mismatched" tree "ROI Registers" group.long 0x10++0xB line.long 0x00 "DCICRC,DCIC ROI Config Register" bitfld.long 0x00 31. " ROI_EN ,ROI tracking enable" "Disabled,Enabled" bitfld.long 0x00 30. " ROI_FREEZE ,ROI freeze enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--27. 1. " START_OFFSET_Y ,Row number of ROIs upper-left corner" hexmask.long.word 0x00 0.--12. 1. " START_OFFSET_X ,Column number of ROIs upper-left corner" line.long 0x04 "DCICRS,DCIC ROI Size Register" hexmask.long.word 0x04 16.--27. 1. " END_OFFSET_Y ,Row number of ROIs lower-right corner" hexmask.long.word 0x04 0.--12. 1. " END_OFFSET_X ,Column number of ROIs lower-right corner" line.long 0x08 "DCICRRS,DCIC ROI Reference Signature Register" rgroup.long 0x1C++0x3 line.long 0x00 "DCICRCS,DCIC ROI Calculated Signature" tree.end width 0x0B tree.end tree "DCIC 2" base ad:0x020E8000 width 9. group.long 0x00++0x0B line.long 0x00 "DCICC,DCIC Control Register" bitfld.long 0x00 7. " CLK_POL ,DISP_CLK signal polarity" "Not inverted,Inverted" bitfld.long 0x00 6. " VSYNC_POL ,VSYNC_IN signal polarity" "Active High,Active Low" bitfld.long 0x00 5. " HSYNC_POL ,HSYNC_IN signal polarity" "Active High,Active Low" bitfld.long 0x00 4. " DE_POL ,DATA_EN_IN signal polarity" "Active High,Active Low" textline " " bitfld.long 0x00 0. " IC_EN ,Integrity Check enable" "Disabled,Enabled" line.long 0x04 "DCICIC,DCIC Interrupt Control Register" bitfld.long 0x04 16. " EXT_SIG_EN ,External controller mismatch indication signal" "Disabled,Enabled" bitfld.long 0x04 3. " FREEZE_MASK ,Disable change of interrupt masks" "No,Yes" bitfld.long 0x04 1. " FI_MASK ,Functional Interrupt mask" "Not masked,Masked" bitfld.long 0x04 0. " EI_MASK ,Error Interrupt mask" "Not masked,Masked" line.long 0x08 "DCICS,DCIC Status Register" eventfld.long 0x08 17. " FI_STAT ,Functional Interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 16. " EI_STAT ,Error Interrupt status" "No interrupt,Interrupt" eventfld.long 0x08 15. " ROI_MATCH_STAT[15] ,Mismatch at ROI 15 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 14. " ROI_MATCH_STAT[14] ,Mismatch at ROI 14 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 13. " ROI_MATCH_STAT[13] ,Mismatch at ROI 13 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 12. " ROI_MATCH_STAT[12] ,Mismatch at ROI 12 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 11. " ROI_MATCH_STAT[11] ,Mismatch at ROI 11 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 10. " ROI_MATCH_STAT[10] ,Mismatch at ROI 10 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 9. " ROI_MATCH_STAT[9] ,Mismatch at ROI 9 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 8. " ROI_MATCH_STAT[8] ,Mismatch at ROI 8 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 7. " ROI_MATCH_STAT[7] ,Mismatch at ROI 7 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 6. " ROI_MATCH_STAT[6] ,Mismatch at ROI 6 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 5. " ROI_MATCH_STAT[5] ,Mismatch at ROI 5 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 4. " ROI_MATCH_STAT[4] ,Mismatch at ROI 4 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 3. " ROI_MATCH_STAT[3] ,Mismatch at ROI 3 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 2. " ROI_MATCH_STAT[2] ,Mismatch at ROI 2 calculated CRC " "Not mismatched,Mismatched" textline " " eventfld.long 0x08 1. " ROI_MATCH_STAT[1] ,Mismatch at ROI 1 calculated CRC " "Not mismatched,Mismatched" eventfld.long 0x08 0. " ROI_MATCH_STAT[0] ,Mismatch at ROI 0 calculated CRC " "Not mismatched,Mismatched" tree "ROI Registers" group.long 0x10++0xB line.long 0x00 "DCICRC,DCIC ROI Config Register" bitfld.long 0x00 31. " ROI_EN ,ROI tracking enable" "Disabled,Enabled" bitfld.long 0x00 30. " ROI_FREEZE ,ROI freeze enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--27. 1. " START_OFFSET_Y ,Row number of ROIs upper-left corner" hexmask.long.word 0x00 0.--12. 1. " START_OFFSET_X ,Column number of ROIs upper-left corner" line.long 0x04 "DCICRS,DCIC ROI Size Register" hexmask.long.word 0x04 16.--27. 1. " END_OFFSET_Y ,Row number of ROIs lower-right corner" hexmask.long.word 0x04 0.--12. 1. " END_OFFSET_X ,Column number of ROIs lower-right corner" line.long 0x08 "DCICRRS,DCIC ROI Reference Signature Register" rgroup.long 0x1C++0x3 line.long 0x00 "DCICRCS,DCIC ROI Calculated Signature" tree.end width 0x0B tree.end tree.end endif tree.open "eCSPI (Enhanced Configurable Serial Peripheral Interface)" tree "eCSPI 1" base ad:0x02008000 width 15. sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x00++0x03 line.long 0x00 "RXDATA1,Receive Data Register 1" else hgroup.long 0x00++0x03 hide.long 0x00 "RXDATA1,Receive Data Register 1" in endif wgroup.long 0x04++0x03 line.long 0x00 "TXDATA1,Transmit Data Register 1" hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data" group.long 0x08++0x03 line.long 0x00 "CONTROLEG1,Control Register 1" hexmask.long.word 0x00 20.--31. 1. " BURST_LENGTH ,Burst Length" bitfld.long 0x00 18.--19. " CHANNEL_SELECT ,SPI Channel Select" "0,1,2,3" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,?..." else bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,/RSV" endif textline " " bitfld.long 0x00 12.--15. " PRE_DIVIDER ,SPI Pre Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 8.--11. " POST_DIVIDER ,SPI Post Divider" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768" textline " " bitfld.long 0x00 7. " CHANNEL_MODE[3] ,Mode of each SPI channel 3" "Slave,Master" bitfld.long 0x00 6. " CHANNEL_MODE[2] ,Mode of each SPI channel 2" "Slave,Master" textline " " bitfld.long 0x00 5. " CHANNEL_MODE[1] ,Mode of each SPI channel 1" "Slave,Master" bitfld.long 0x00 4. " CHANNEL_MODE[0] ,Mode of each SPI channel 0" "Slave,Master" textline " " bitfld.long 0x00 3. " SMC ,Start Mode Control" "Normal,Automatic" bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 1. " HT ,Hardware Trigger Enable" "Disabled,Enabled" else bitfld.long 0x00 1. " HW ,HW Trigger Enable" "Disabled,Enabled" endif bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled" if (((per.l(ad:0x02008000+0x08))&0xf0)==0x00) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x10) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x20) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x30) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x40) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x50) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x60) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x70) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x80) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0x90) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0xa0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0xb0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0xc0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0xd0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02008000+0x08))&0xf0)==0xe0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" else group.long 0x0c++0x03 line.long 0x00 "CONFIGREG1,Config Register 1" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" endif group.long 0x10++0x07 line.long 0x00 "INTREG1,Interrupt Control Register 1" bitfld.long 0x00 7. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDREN ,RXFIFO Data Request Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TDREN ,TXFIFO Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "DMAREG1,DMA Control Register 1" bitfld.long 0x04 31. " RXTDEN ,RXFIFO TAIL DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 24.--29. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 24.--26. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 23. " RXDEN ,RXFIFO DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 16.--21. " RX_THRESHOLD ,RX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 7. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_THRESHOLD ,TX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 16.--21. " RX_WATER_MARK ,RX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8. " TXDEN ,TXFIFO DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_WATER_MARK ,TX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0x02008000+0x14))&0x80000000)==0x00) group.long 0x18++0x03 line.long 0x00 "STATREG1,Status Register 1" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "RX DMA WATER MARK" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" else group.long 0x18++0x03 line.long 0x00 "STATREG1,Status Register 1" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("iMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD/DMA TAIL DMA" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Full" "RX DMA WATER MARK/DMA TAIL DMA matched" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" endif group.long 0x1c++0x07 line.long 0x00 "PERIODREG1,Sample Period Control Register 1" bitfld.long 0x00 16.--21. " CSD_CTRL ,Chip Select Delay Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("IMX6*")) bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,Low-Frequency Ref. Clock" else bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL" endif textline " " hexmask.long.word 0x00 0.--14. 1. " SAMPLE_PERIOD ,Sample Period Control" line.long 0x04 "TESTREG1,Test Control Register 1" bitfld.long 0x04 31. " LBC ,Loop Back Control" "Not connected,Connected" sif (!(cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 28.--29. " CL ,Catch Latency" "Normal,Half cycle,One cycle,One & half cycle" endif textline " " hexmask.long.byte 0x04 8.--14. 1. " RXCNT ,RXFIFO Counter" hexmask.long.byte 0x04 0.--6. 1. " TXCNT ,TXFIFO Counter" wgroup.long 0x40++0x03 line.long 0x00 "MSGDATA1,Message Data Register" width 0x0B tree.end tree "eCSPI 2" base ad:0x0200C000 width 15. sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x00++0x03 line.long 0x00 "RXDATA2,Receive Data Register 2" else hgroup.long 0x00++0x03 hide.long 0x00 "RXDATA2,Receive Data Register 2" in endif wgroup.long 0x04++0x03 line.long 0x00 "TXDATA2,Transmit Data Register 2" hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data" group.long 0x08++0x03 line.long 0x00 "CONTROLEG2,Control Register 2" hexmask.long.word 0x00 20.--31. 1. " BURST_LENGTH ,Burst Length" bitfld.long 0x00 18.--19. " CHANNEL_SELECT ,SPI Channel Select" "0,1,2,3" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,?..." else bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,/RSV" endif textline " " bitfld.long 0x00 12.--15. " PRE_DIVIDER ,SPI Pre Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 8.--11. " POST_DIVIDER ,SPI Post Divider" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768" textline " " bitfld.long 0x00 7. " CHANNEL_MODE[3] ,Mode of each SPI channel 3" "Slave,Master" bitfld.long 0x00 6. " CHANNEL_MODE[2] ,Mode of each SPI channel 2" "Slave,Master" textline " " bitfld.long 0x00 5. " CHANNEL_MODE[1] ,Mode of each SPI channel 1" "Slave,Master" bitfld.long 0x00 4. " CHANNEL_MODE[0] ,Mode of each SPI channel 0" "Slave,Master" textline " " bitfld.long 0x00 3. " SMC ,Start Mode Control" "Normal,Automatic" bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 1. " HT ,Hardware Trigger Enable" "Disabled,Enabled" else bitfld.long 0x00 1. " HW ,HW Trigger Enable" "Disabled,Enabled" endif bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled" if (((per.l(ad:0x0200C000+0x08))&0xf0)==0x00) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x10) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x20) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x30) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x40) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x50) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x60) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x70) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x80) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0x90) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0xa0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0xb0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0xc0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0xd0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x0200C000+0x08))&0xf0)==0xe0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" else group.long 0x0c++0x03 line.long 0x00 "CONFIGREG2,Config Register 2" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" endif group.long 0x10++0x07 line.long 0x00 "INTREG2,Interrupt Control Register 2" bitfld.long 0x00 7. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDREN ,RXFIFO Data Request Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TDREN ,TXFIFO Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "DMAREG2,DMA Control Register 2" bitfld.long 0x04 31. " RXTDEN ,RXFIFO TAIL DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 24.--29. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 24.--26. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 23. " RXDEN ,RXFIFO DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 16.--21. " RX_THRESHOLD ,RX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 7. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_THRESHOLD ,TX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 16.--21. " RX_WATER_MARK ,RX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8. " TXDEN ,TXFIFO DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_WATER_MARK ,TX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0x0200C000+0x14))&0x80000000)==0x00) group.long 0x18++0x03 line.long 0x00 "STATREG2,Status Register 2" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "RX DMA WATER MARK" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" else group.long 0x18++0x03 line.long 0x00 "STATREG2,Status Register 2" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("iMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD/DMA TAIL DMA" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Full" "RX DMA WATER MARK/DMA TAIL DMA matched" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" endif group.long 0x1c++0x07 line.long 0x00 "PERIODREG2,Sample Period Control Register 2" bitfld.long 0x00 16.--21. " CSD_CTRL ,Chip Select Delay Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("IMX6*")) bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,Low-Frequency Ref. Clock" else bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL" endif textline " " hexmask.long.word 0x00 0.--14. 1. " SAMPLE_PERIOD ,Sample Period Control" line.long 0x04 "TESTREG2,Test Control Register 2" bitfld.long 0x04 31. " LBC ,Loop Back Control" "Not connected,Connected" sif (!(cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 28.--29. " CL ,Catch Latency" "Normal,Half cycle,One cycle,One & half cycle" endif textline " " hexmask.long.byte 0x04 8.--14. 1. " RXCNT ,RXFIFO Counter" hexmask.long.byte 0x04 0.--6. 1. " TXCNT ,TXFIFO Counter" wgroup.long 0x40++0x03 line.long 0x00 "MSGDATA2,Message Data Register" width 0x0B tree.end tree "eCSPI 3" base ad:0x02010000 width 15. sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x00++0x03 line.long 0x00 "RXDATA3,Receive Data Register 3" else hgroup.long 0x00++0x03 hide.long 0x00 "RXDATA3,Receive Data Register 3" in endif wgroup.long 0x04++0x03 line.long 0x00 "TXDATA3,Transmit Data Register 3" hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data" group.long 0x08++0x03 line.long 0x00 "CONTROLEG3,Control Register 3" hexmask.long.word 0x00 20.--31. 1. " BURST_LENGTH ,Burst Length" bitfld.long 0x00 18.--19. " CHANNEL_SELECT ,SPI Channel Select" "0,1,2,3" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,?..." else bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,/RSV" endif textline " " bitfld.long 0x00 12.--15. " PRE_DIVIDER ,SPI Pre Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 8.--11. " POST_DIVIDER ,SPI Post Divider" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768" textline " " bitfld.long 0x00 7. " CHANNEL_MODE[3] ,Mode of each SPI channel 3" "Slave,Master" bitfld.long 0x00 6. " CHANNEL_MODE[2] ,Mode of each SPI channel 2" "Slave,Master" textline " " bitfld.long 0x00 5. " CHANNEL_MODE[1] ,Mode of each SPI channel 1" "Slave,Master" bitfld.long 0x00 4. " CHANNEL_MODE[0] ,Mode of each SPI channel 0" "Slave,Master" textline " " bitfld.long 0x00 3. " SMC ,Start Mode Control" "Normal,Automatic" bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 1. " HT ,Hardware Trigger Enable" "Disabled,Enabled" else bitfld.long 0x00 1. " HW ,HW Trigger Enable" "Disabled,Enabled" endif bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled" if (((per.l(ad:0x02010000+0x08))&0xf0)==0x00) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x10) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x20) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x30) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x40) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x50) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x60) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x70) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x80) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0x90) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0xa0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0xb0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0xc0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0xd0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02010000+0x08))&0xf0)==0xe0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" else group.long 0x0c++0x03 line.long 0x00 "CONFIGREG3,Config Register 3" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" endif group.long 0x10++0x07 line.long 0x00 "INTREG3,Interrupt Control Register 3" bitfld.long 0x00 7. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDREN ,RXFIFO Data Request Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TDREN ,TXFIFO Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "DMAREG3,DMA Control Register 3" bitfld.long 0x04 31. " RXTDEN ,RXFIFO TAIL DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 24.--29. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 24.--26. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 23. " RXDEN ,RXFIFO DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 16.--21. " RX_THRESHOLD ,RX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 7. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_THRESHOLD ,TX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 16.--21. " RX_WATER_MARK ,RX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8. " TXDEN ,TXFIFO DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_WATER_MARK ,TX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0x02010000+0x14))&0x80000000)==0x00) group.long 0x18++0x03 line.long 0x00 "STATREG3,Status Register 3" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "RX DMA WATER MARK" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" else group.long 0x18++0x03 line.long 0x00 "STATREG3,Status Register 3" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("iMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD/DMA TAIL DMA" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Full" "RX DMA WATER MARK/DMA TAIL DMA matched" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" endif group.long 0x1c++0x07 line.long 0x00 "PERIODREG3,Sample Period Control Register 3" bitfld.long 0x00 16.--21. " CSD_CTRL ,Chip Select Delay Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("IMX6*")) bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,Low-Frequency Ref. Clock" else bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL" endif textline " " hexmask.long.word 0x00 0.--14. 1. " SAMPLE_PERIOD ,Sample Period Control" line.long 0x04 "TESTREG3,Test Control Register 3" bitfld.long 0x04 31. " LBC ,Loop Back Control" "Not connected,Connected" sif (!(cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 28.--29. " CL ,Catch Latency" "Normal,Half cycle,One cycle,One & half cycle" endif textline " " hexmask.long.byte 0x04 8.--14. 1. " RXCNT ,RXFIFO Counter" hexmask.long.byte 0x04 0.--6. 1. " TXCNT ,TXFIFO Counter" wgroup.long 0x40++0x03 line.long 0x00 "MSGDATA3,Message Data Register" width 0x0B tree.end tree "eCSPI 4" base ad:0x02014000 width 15. sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x00++0x03 line.long 0x00 "RXDATA4,Receive Data Register 4" else hgroup.long 0x00++0x03 hide.long 0x00 "RXDATA4,Receive Data Register 4" in endif wgroup.long 0x04++0x03 line.long 0x00 "TXDATA4,Transmit Data Register 4" hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data" group.long 0x08++0x03 line.long 0x00 "CONTROLEG4,Control Register 4" hexmask.long.word 0x00 20.--31. 1. " BURST_LENGTH ,Burst Length" bitfld.long 0x00 18.--19. " CHANNEL_SELECT ,SPI Channel Select" "0,1,2,3" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,?..." else bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,/RSV" endif textline " " bitfld.long 0x00 12.--15. " PRE_DIVIDER ,SPI Pre Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 8.--11. " POST_DIVIDER ,SPI Post Divider" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768" textline " " bitfld.long 0x00 7. " CHANNEL_MODE[3] ,Mode of each SPI channel 3" "Slave,Master" bitfld.long 0x00 6. " CHANNEL_MODE[2] ,Mode of each SPI channel 2" "Slave,Master" textline " " bitfld.long 0x00 5. " CHANNEL_MODE[1] ,Mode of each SPI channel 1" "Slave,Master" bitfld.long 0x00 4. " CHANNEL_MODE[0] ,Mode of each SPI channel 0" "Slave,Master" textline " " bitfld.long 0x00 3. " SMC ,Start Mode Control" "Normal,Automatic" bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 1. " HT ,Hardware Trigger Enable" "Disabled,Enabled" else bitfld.long 0x00 1. " HW ,HW Trigger Enable" "Disabled,Enabled" endif bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled" if (((per.l(ad:0x02014000+0x08))&0xf0)==0x00) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x10) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x20) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x30) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x40) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x50) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x60) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x70) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x80) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0x90) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0xa0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0xb0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0xc0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0xd0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02014000+0x08))&0xf0)==0xe0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" else group.long 0x0c++0x03 line.long 0x00 "CONFIGREG4,Config Register 4" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" endif group.long 0x10++0x07 line.long 0x00 "INTREG4,Interrupt Control Register 4" bitfld.long 0x00 7. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDREN ,RXFIFO Data Request Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TDREN ,TXFIFO Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "DMAREG4,DMA Control Register 4" bitfld.long 0x04 31. " RXTDEN ,RXFIFO TAIL DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 24.--29. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 24.--26. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 23. " RXDEN ,RXFIFO DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 16.--21. " RX_THRESHOLD ,RX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 7. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_THRESHOLD ,TX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 16.--21. " RX_WATER_MARK ,RX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8. " TXDEN ,TXFIFO DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_WATER_MARK ,TX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0x02014000+0x14))&0x80000000)==0x00) group.long 0x18++0x03 line.long 0x00 "STATREG4,Status Register 4" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "RX DMA WATER MARK" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" else group.long 0x18++0x03 line.long 0x00 "STATREG4,Status Register 4" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("iMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD/DMA TAIL DMA" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Full" "RX DMA WATER MARK/DMA TAIL DMA matched" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" endif group.long 0x1c++0x07 line.long 0x00 "PERIODREG4,Sample Period Control Register 4" bitfld.long 0x00 16.--21. " CSD_CTRL ,Chip Select Delay Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("IMX6*")) bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,Low-Frequency Ref. Clock" else bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL" endif textline " " hexmask.long.word 0x00 0.--14. 1. " SAMPLE_PERIOD ,Sample Period Control" line.long 0x04 "TESTREG4,Test Control Register 4" bitfld.long 0x04 31. " LBC ,Loop Back Control" "Not connected,Connected" sif (!(cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 28.--29. " CL ,Catch Latency" "Normal,Half cycle,One cycle,One & half cycle" endif textline " " hexmask.long.byte 0x04 8.--14. 1. " RXCNT ,RXFIFO Counter" hexmask.long.byte 0x04 0.--6. 1. " TXCNT ,TXFIFO Counter" wgroup.long 0x40++0x03 line.long 0x00 "MSGDATA4,Message Data Register" width 0x0B tree.end sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6DUALLITE") tree "eCSPI 5" base ad:0x02018000 width 15. sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x00++0x03 line.long 0x00 "RXDATA5,Receive Data Register 5" else hgroup.long 0x00++0x03 hide.long 0x00 "RXDATA5,Receive Data Register 5" in endif wgroup.long 0x04++0x03 line.long 0x00 "TXDATA5,Transmit Data Register 5" hexmask.long 0x00 0.--31. 1. " TXDATA ,Transmit Data" group.long 0x08++0x03 line.long 0x00 "CONTROLEG5,Control Register 5" hexmask.long.word 0x00 20.--31. 1. " BURST_LENGTH ,Burst Length" bitfld.long 0x00 18.--19. " CHANNEL_SELECT ,SPI Channel Select" "0,1,2,3" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,?..." else bitfld.long 0x00 16.--17. " DRCTL ,SPI Data Ready Control" "Don't care /SPI_RDY,Falling edge of /SPI_RDY,Low level of /SPI_RDY,/RSV" endif textline " " bitfld.long 0x00 12.--15. " PRE_DIVIDER ,SPI Pre Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 8.--11. " POST_DIVIDER ,SPI Post Divider" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768" textline " " bitfld.long 0x00 7. " CHANNEL_MODE[3] ,Mode of each SPI channel 3" "Slave,Master" bitfld.long 0x00 6. " CHANNEL_MODE[2] ,Mode of each SPI channel 2" "Slave,Master" textline " " bitfld.long 0x00 5. " CHANNEL_MODE[1] ,Mode of each SPI channel 1" "Slave,Master" bitfld.long 0x00 4. " CHANNEL_MODE[0] ,Mode of each SPI channel 0" "Slave,Master" textline " " bitfld.long 0x00 3. " SMC ,Start Mode Control" "Normal,Automatic" bitfld.long 0x00 2. " XCH ,SPI Exchange Bit" "Idle,Exchanged/Busy" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 1. " HT ,Hardware Trigger Enable" "Disabled,Enabled" else bitfld.long 0x00 1. " HW ,HW Trigger Enable" "Disabled,Enabled" endif bitfld.long 0x00 0. " EN ,SPI Module Enable Control" "Disabled,Enabled" if (((per.l(ad:0x02018000+0x08))&0xf0)==0x00) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x10) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x20) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x30) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x40) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x50) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x60) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x70) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x80) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0x90) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0xa0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0xb0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0xc0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0xd0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" elif (((per.l(ad:0x02018000+0x08))&0xf0)==0xe0) group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "(BURST_LENGTH+1) bits received,?..." textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" else group.long 0x0c++0x03 line.long 0x00 "CONFIGREG5,Config Register 5" bitfld.long 0x00 24.--28. " HT_LENGTH ,Length of message content in HT Mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 23. " SCLK_CTL[3] ,Control inactive state of SCLK line for SPI channel 3" "Low,High" textline " " bitfld.long 0x00 22. " SCLK_CTL[2] ,Control inactive state of SCLK line for SPI channel 2" "Low,High" bitfld.long 0x00 21. " SCLK_CTL[1] ,Control inactive state of SCLK line for SPI channel 1" "Low,High" textline " " bitfld.long 0x00 20. " SCLK_CTL[0] ,Control inactive state of SCLK line for SPI channel 0" "Low,High" bitfld.long 0x00 19. " DATA_CTL[3] ,Control inactive state of Data line for SPI channel 3" "High,Low" textline " " bitfld.long 0x00 18. " DATA_CTL[2] ,Control inactive state of Data line for SPI channel 2" "High,Low" bitfld.long 0x00 17. " DATA_CTL[1] ,Control inactive state of Data line for SPI channel 1" "High,Low" textline " " bitfld.long 0x00 16. " DATA_CTL[0] ,Control inactive state of Data line for SPI channel 0" "High,Low" bitfld.long 0x00 15. " SSB_POL[3] ,Control polarity of SSB for SPI channel 3" "Active Low,Active High" textline " " bitfld.long 0x00 14. " SSB_POL[2] ,Control polarity of SSB for SPI channel 2" "Active Low,Active High" bitfld.long 0x00 13. " SSB_POL[1] ,Control polarity of SSB for SPI channel 1" "Active Low,Active High" textline " " bitfld.long 0x00 12. " SSB_POL[0] ,Control polarity of SSB for SPI channel 0" "Active Low,Active High" textline " " bitfld.long 0x00 11. " SSB_CTRL[3] ,Control behavior of SSB for SPI channel 3" "Single,Multiple" textline " " bitfld.long 0x00 10. " SSB_CTRL[2] ,Control behavior of SSB for SPI channel 2" "Single,Multiple" textline " " bitfld.long 0x00 9. " SSB_CTRL[1] ,Control behavior of SSB for SPI channel 1" "Single,Multiple" textline " " bitfld.long 0x00 8. " SSB_CTRL[0] ,Control behavior of SSB for SPI channel 0" "Single,Multiple" textline " " bitfld.long 0x00 7. " SCLK_POL[3] ,Controls the SCLK Polarity of SPI channel 3" "Active high,Active low" bitfld.long 0x00 6. " SCLK_POL[2] ,Controls the SCLK Polarity of SPI channel 2" "Active high,Active low" textline " " bitfld.long 0x00 5. " SCLK_POL[1] ,Controls the SCLK Polarity of SPI channel 1" "Active high,Active low" bitfld.long 0x00 4. " SCLK_POL[0] ,Controls the SCLK Polarity of SPI channel 0" "Active high,Active low" textline " " bitfld.long 0x00 3. " SCLK_PHA[3] ,Controls the SSB Polarity of SPI channel 3" "Phase 0,Phase 1" bitfld.long 0x00 2. " SCLK_PHA[2] ,Controls the SSB Polarity of SPI channel 2" "Phase 0,Phase 1" textline " " bitfld.long 0x00 1. " SCLK_PHA[1] ,Controls the SSB Polarity of SPI channel 1" "Phase 0,Phase 1" bitfld.long 0x00 0. " SCLK_PHA[0] ,Controls the SSB Polarity of SPI channel 0" "Phase 0,Phase 1" endif group.long 0x10++0x07 line.long 0x00 "INTREG5,Interrupt Control Register 5" bitfld.long 0x00 7. " TCEN ,Transfer Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ROEN ,RXFIFO Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RFEN ,RXFIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDREN ,RXFIFO Data Request Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RREN ,RXFIFO Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TFEN ,TXFIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TDREN ,TXFIFO Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TEEN ,TXFIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "DMAREG5,DMA Control Register 5" bitfld.long 0x04 31. " RXTDEN ,RXFIFO TAIL DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 24.--29. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 24.--26. " RX_DMA_LENGTH ,RX DMA LENGTH" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x04 23. " RXDEN ,RXFIFO DMA Request Enable" "Disabled,Enabled" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x04 16.--21. " RX_THRESHOLD ,RX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 7. " TEDEN ,TXFIFO Empty DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_THRESHOLD ,TX THRESHOLD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x04 16.--21. " RX_WATER_MARK ,RX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8. " TXDEN ,TXFIFO DMA Request Enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TX_WATER_MARK ,TX WATER MARK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0x02018000+0x14))&0x80000000)==0x00) group.long 0x18++0x03 line.long 0x00 "STATREG5,Status Register 5" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "RX DMA WATER MARK" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" else group.long 0x18++0x03 line.long 0x00 "STATREG5,Status Register 5" eventfld.long 0x00 7. " TC ,Transfer Completed" "Busy,Completed" eventfld.long 0x00 6. " RO ,RXFIFO Overflow" "No overflow,Overflow" textline " " rbitfld.long 0x00 5. " RF ,RXFIFO Full" "Not full,Full" textline " " sif (cpuis("iMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 4. " RDR ,RXFIFO Data Request" "<=RX THRESHOLD,>RX THRESHOLD/DMA TAIL DMA" else rbitfld.long 0x00 4. " RDR ,RXFIFO Data Full" "RX DMA WATER MARK/DMA TAIL DMA matched" endif textline " " rbitfld.long 0x00 3. " RR ,RXFIFO Ready" "No valid data,>=1 word" rbitfld.long 0x00 2. " TF ,TXFIFO Full" "Not full,Full" textline " " sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX THRESHOLD,<=TX THRESHOLD" else rbitfld.long 0x00 1. " TDR ,TXFIFO Data Request" ">TX DMA WATER MARK,<=TX DMA WATER MARK" endif textline " " rbitfld.long 0x00 0. " TE ,TXFIFO Empty" "Not empty,Empty" endif group.long 0x1c++0x07 line.long 0x00 "PERIODREG5,Sample Period Control Register 5" bitfld.long 0x00 16.--21. " CSD_CTRL ,Chip Select Delay Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("IMX6*")) bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,Low-Frequency Ref. Clock" else bitfld.long 0x00 15. " CSRC ,Clock Source Control" "SPI Clock,CKIL" endif textline " " hexmask.long.word 0x00 0.--14. 1. " SAMPLE_PERIOD ,Sample Period Control" line.long 0x04 "TESTREG5,Test Control Register 5" bitfld.long 0x04 31. " LBC ,Loop Back Control" "Not connected,Connected" sif (!(cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 28.--29. " CL ,Catch Latency" "Normal,Half cycle,One cycle,One & half cycle" endif textline " " hexmask.long.byte 0x04 8.--14. 1. " RXCNT ,RXFIFO Counter" hexmask.long.byte 0x04 0.--6. 1. " TXCNT ,TXFIFO Counter" wgroup.long 0x40++0x03 line.long 0x00 "MSGDATA5,Message Data Register" width 0x0B tree.end endif tree.end tree "EIM (External Interface Module)" base ad:0x021B8000 sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") width 9. if (((per.l(ad:0x021B8000+0x0))&0x06)==0x00) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x0))&0x06)==0x02) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x0))&0x06)==0x04) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "CS0GCR2,Chip Select 0 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x0+0x08)++0x3 line.long 0x00 "CS0RCR1,Chip Select 0 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x0))&0x3000)==0x0) group.long (0x0+0x0C)++0x3 line.long 0x00 "CS0RCR2,Chip Select 0 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x0+0x0C)++0x3 line.long 0x00 "CS0RCR2,Chip Select 0 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x0))&0x2)==0x0) group.long (0x0+0x10)++0x3 line.long 0x00 "CS0WCR1,Chip Select 0 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x0+0x10)++0x3 line.long 0x00 "CS0WCR1,Chip Select 0 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x0+0x14)++0x3 line.long 0x00 "CS0WCR2,Chip Select 0 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x18))&0x06)==0x00) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x18))&0x06)==0x02) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x18))&0x06)==0x04) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x18+0x04)++0x3 line.long 0x00 "CS1GCR2,Chip Select 1 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x18+0x08)++0x3 line.long 0x00 "CS1RCR1,Chip Select 1 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x18))&0x3000)==0x0) group.long (0x18+0x0C)++0x3 line.long 0x00 "CS1RCR2,Chip Select 1 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x18+0x0C)++0x3 line.long 0x00 "CS1RCR2,Chip Select 1 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x18))&0x2)==0x0) group.long (0x18+0x10)++0x3 line.long 0x00 "CS1WCR1,Chip Select 1 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x18+0x10)++0x3 line.long 0x00 "CS1WCR1,Chip Select 1 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x18+0x14)++0x3 line.long 0x00 "CS1WCR2,Chip Select 1 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x30))&0x06)==0x00) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x30))&0x06)==0x02) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x30))&0x06)==0x04) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x30+0x04)++0x3 line.long 0x00 "CS2GCR2,Chip Select 2 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x30+0x08)++0x3 line.long 0x00 "CS2RCR1,Chip Select 2 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x30))&0x3000)==0x0) group.long (0x30+0x0C)++0x3 line.long 0x00 "CS2RCR2,Chip Select 2 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x30+0x0C)++0x3 line.long 0x00 "CS2RCR2,Chip Select 2 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x30))&0x2)==0x0) group.long (0x30+0x10)++0x3 line.long 0x00 "CS2WCR1,Chip Select 2 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x30+0x10)++0x3 line.long 0x00 "CS2WCR1,Chip Select 2 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x30+0x14)++0x3 line.long 0x00 "CS2WCR2,Chip Select 2 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x48))&0x06)==0x00) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x48))&0x06)==0x02) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x48))&0x06)==0x04) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x48+0x04)++0x3 line.long 0x00 "CS3GCR2,Chip Select 3 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x48+0x08)++0x3 line.long 0x00 "CS3RCR1,Chip Select 3 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x48))&0x3000)==0x0) group.long (0x48+0x0C)++0x3 line.long 0x00 "CS3RCR2,Chip Select 3 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x48+0x0C)++0x3 line.long 0x00 "CS3RCR2,Chip Select 3 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x48))&0x2)==0x0) group.long (0x48+0x10)++0x3 line.long 0x00 "CS3WCR1,Chip Select 3 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x48+0x10)++0x3 line.long 0x00 "CS3WCR1,Chip Select 3 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x48+0x14)++0x3 line.long 0x00 "CS3WCR2,Chip Select 3 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x60))&0x06)==0x00) group.long 0x60++0x3 "CS4" line.long 0x00 "CS4GCR1,Chip Select 4 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x60))&0x06)==0x02) group.long 0x60++0x3 "CS4" line.long 0x00 "CS4GCR1,Chip Select 4 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x60))&0x06)==0x04) group.long 0x60++0x3 "CS4" line.long 0x00 "CS4GCR1,Chip Select 4 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x60++0x3 "CS4" line.long 0x00 "CS4GCR1,Chip Select 4 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x60+0x04)++0x3 line.long 0x00 "CS4GCR2,Chip Select 4 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x60+0x08)++0x3 line.long 0x00 "CS4RCR1,Chip Select 4 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x60))&0x3000)==0x0) group.long (0x60+0x0C)++0x3 line.long 0x00 "CS4RCR2,Chip Select 4 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x60+0x0C)++0x3 line.long 0x00 "CS4RCR2,Chip Select 4 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x60))&0x2)==0x0) group.long (0x60+0x10)++0x3 line.long 0x00 "CS4WCR1,Chip Select 4 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x60+0x10)++0x3 line.long 0x00 "CS4WCR1,Chip Select 4 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x60+0x14)++0x3 line.long 0x00 "CS4WCR2,Chip Select 4 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x78))&0x06)==0x00) group.long 0x78++0x3 "CS5" line.long 0x00 "CS5GCR1,Chip Select 5 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x78))&0x06)==0x02) group.long 0x78++0x3 "CS5" line.long 0x00 "CS5GCR1,Chip Select 5 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x78))&0x06)==0x04) group.long 0x78++0x3 "CS5" line.long 0x00 "CS5GCR1,Chip Select 5 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x78++0x3 "CS5" line.long 0x00 "CS5GCR1,Chip Select 5 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x78+0x04)++0x3 line.long 0x00 "CS5GCR2,Chip Select 5 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x78+0x08)++0x3 line.long 0x00 "CS5RCR1,Chip Select 5 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x78))&0x3000)==0x0) group.long (0x78+0x0C)++0x3 line.long 0x00 "CS5RCR2,Chip Select 5 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x78+0x0C)++0x3 line.long 0x00 "CS5RCR2,Chip Select 5 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x78))&0x2)==0x0) group.long (0x78+0x10)++0x3 line.long 0x00 "CS5WCR1,Chip Select 5 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x78+0x10)++0x3 line.long 0x00 "CS5WCR1,Chip Select 5 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x78+0x14)++0x3 line.long 0x00 "CS5WCR2,Chip Select 5 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") group.long 0x90++0x3 "Common" line.long 0x00 "WCR,EIM Configuration Register" bitfld.long 0x00 11. " FRUN_ACLK_EN ,Free run ACLK enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " WDOG_LIMIT ,Memory Wdog cycle limit" "128 cycles,256 cycles,512 cycles,1024 cycles" bitfld.long 0x00 8. " WDOG_EN ,Memory Wdog enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTPOL ,Interrupt Polarity" "Active low,Active high" bitfld.long 0x00 4. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CONT_BCLK_SEL ,Continuous BCLK select" "BCLK,BCLK Continuous" textline " " bitfld.long 0x00 1.--2. " GBCD ,General Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 0. " BCM ,Burst Clock Mode" "Depend on CS config,When aclk active" group.long 0x94++0x03 line.long 0x00 "DCR,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,Reference DLL Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23.--27. " DLL_CTRL_SLV_UPDATE_INT ,Slave DLL Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x00 16.--22. 1. " DLL_CTRL_REF_INTIAL_VAL ,Reference DLL Initial Value" hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave DLL Override Value" textline " " bitfld.long 0x00 8. " DLL_CTRL_SLV_OVVERIDE ,Enable slave DLL override" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,Gate DLL Update" "Not updated,Updated" textline " " bitfld.long 0x00 4.--6. " DLL_CTRL_SLV_OFFSET_DEC ,Slave DLL offset" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,Slave DLL force update" "Not updated,Updated" textline " " bitfld.long 0x00 1. " DLL_CTRL_RESET ,Reset DLL" "No reset,Reset" bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,Enable DLL" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "DSR,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference DLL Selection" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave DLL Selection" textline " " bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL Lock" "Not locked,Locked" bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave DLL Lock" "Not locked,Locked" group.long 0x9C++0x3 line.long 0x00 "WIAR,WEIM IP Access Register" bitfld.long 0x00 4. " ACLK_EN ,ACLK enable" "Disabled,Enabled" bitfld.long 0x00 3. " ERRST ,Enable READY After Reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT ,Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IPS_ACK ,WEIM is ready for ips access" "Not accessed,Accessed" textline " " bitfld.long 0x00 0. " IPS_REQ ,IPS request" "Not requested,Requested" sif (cpu()=="IMX6SOLOLITE") group.long 0xA0++0x3 line.long 0x00 "EAR,Error Address Register" else rgroup.long 0xA0++0x3 line.long 0x00 "EAR,Error Address Register" endif else group.long 0x90++0x3 "Common" line.long 0x00 "WCR,WEIM Configuration Register" bitfld.long 0x00 9.--10. " WDOG_LIMIT ,Memory Wdog cycle limit" "128 cycles,256 cycles,512 cycles,1024 cycles" bitfld.long 0x00 8. " WDOG_EN ,Memory Wdog enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTPOL ,Interrupt Polarity" "Active low,Active high" bitfld.long 0x00 4. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--2. " GBCD ,General Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 0. " BCM ,Burst Clock Mode" "Depend on CS config,When aclk active" group.long 0x94++0x3 line.long 0x00 "WIAR,WEIM IP Access Register" bitfld.long 0x00 4. " ACLK_EN ,ACLK enable" "Disabled,Enabled" bitfld.long 0x00 3. " ERRST ,Enable READY After Reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT ,Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IPS_ACK ,WEIM is ready for ips access" "Not accessed,Accessed" textline " " bitfld.long 0x00 0. " IPS_REQ ,IPS request" "Not requested,Requested" rgroup.long 0x98++0x3 line.long 0x00 "EAR,Error Address Register" endif sif !cpuis("IMX50*") width 5. tree "Chip Select Memory" base ad:0xF0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS0,EIM CS0 Memory Region" button "CS0 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS1,EIM CS1 Memory Region" button "CS1 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS2,EIM CS2 Memory Region" button "CS2 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS3,EIM CS3 Memory Region" button "CS3 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 sif (!cpuis("IMX6*")) hgroup.long 0x00++0x3 hide.long 0x00 "CS4,EIM CS4 Memory Region" button "CS4 " "d ad:0xf0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS5,EIM CS5 Memory Region" button "CS5 " "d ad:0xf0000000--ad:0xffffffff /long" endif tree.end endif width 0x0B else width 9. if (((per.l(ad:0x021B8000+0x0))&0x06)==0x00) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x0))&0x06)==0x02) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x0))&0x06)==0x04) group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x0++0x3 "CS0" line.long 0x00 "CS0GCR1,Chip Select 0 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "CS0GCR2,Chip Select 0 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x0+0x08)++0x3 line.long 0x00 "CS0RCR1,Chip Select 0 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x0))&0x3000)==0x0) group.long (0x0+0x0C)++0x3 line.long 0x00 "CS0RCR2,Chip Select 0 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x0+0x0C)++0x3 line.long 0x00 "CS0RCR2,Chip Select 0 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x0))&0x2)==0x0) group.long (0x0+0x10)++0x3 line.long 0x00 "CS0WCR1,Chip Select 0 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x0+0x10)++0x3 line.long 0x00 "CS0WCR1,Chip Select 0 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x0+0x14)++0x3 line.long 0x00 "CS0WCR2,Chip Select 0 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x18))&0x06)==0x00) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x18))&0x06)==0x02) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x18))&0x06)==0x04) group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x18++0x3 "CS1" line.long 0x00 "CS1GCR1,Chip Select 1 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x18+0x04)++0x3 line.long 0x00 "CS1GCR2,Chip Select 1 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x18+0x08)++0x3 line.long 0x00 "CS1RCR1,Chip Select 1 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x18))&0x3000)==0x0) group.long (0x18+0x0C)++0x3 line.long 0x00 "CS1RCR2,Chip Select 1 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x18+0x0C)++0x3 line.long 0x00 "CS1RCR2,Chip Select 1 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x18))&0x2)==0x0) group.long (0x18+0x10)++0x3 line.long 0x00 "CS1WCR1,Chip Select 1 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x18+0x10)++0x3 line.long 0x00 "CS1WCR1,Chip Select 1 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x18+0x14)++0x3 line.long 0x00 "CS1WCR2,Chip Select 1 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x30))&0x06)==0x00) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x30))&0x06)==0x02) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x30))&0x06)==0x04) group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x30++0x3 "CS2" line.long 0x00 "CS2GCR1,Chip Select 2 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x30+0x04)++0x3 line.long 0x00 "CS2GCR2,Chip Select 2 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x30+0x08)++0x3 line.long 0x00 "CS2RCR1,Chip Select 2 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x30))&0x3000)==0x0) group.long (0x30+0x0C)++0x3 line.long 0x00 "CS2RCR2,Chip Select 2 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x30+0x0C)++0x3 line.long 0x00 "CS2RCR2,Chip Select 2 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x30))&0x2)==0x0) group.long (0x30+0x10)++0x3 line.long 0x00 "CS2WCR1,Chip Select 2 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x30+0x10)++0x3 line.long 0x00 "CS2WCR1,Chip Select 2 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x30+0x14)++0x3 line.long 0x00 "CS2WCR2,Chip Select 2 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" if (((per.l(ad:0x021B8000+0x48))&0x06)==0x00) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x48))&0x06)==0x02) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" elif (((per.l(ad:0x021B8000+0x48))&0x06)==0x04) group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" else group.long 0x48++0x3 "CS3" line.long 0x00 "CS3GCR1,Chip Select 3 General Control Register 1" bitfld.long 0x00 28.--31. " PSZ ,Page Size" "8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,?..." bitfld.long 0x00 27. " WP ,Write Protect" "Not protected,Protected" textline " " bitfld.long 0x00 24.--26. " GBC ,Gap Between Chip Selects" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 23. " AUS ,Address UnShifted" "Shifted,Unshifted" textline " " bitfld.long 0x00 20.--22. " CSREC ,CS Recovery" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 19. " SP ,Supervisor Protect" "Not protected,Protected" textline " " bitfld.long 0x00 16.--18. " DSZ ,Data Port Size" ",16-bit[15:0],16-bit[31:16],32-bit[31:0],8 bit[7:0],8 bit[15:8],8 bit[23:16],8 bit[31:24]" bitfld.long 0x00 14.--15. " BCS ,Burst clock start delay" "No cycles,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x00 12.--13. " BCD ,Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 11. " WC ,Write Continuous" "Not continuous,Continuous" textline " " bitfld.long 0x00 8.--10. " BL ,Burst Length" "4 words,8 words,16 words,32 words,Continuous,?..." bitfld.long 0x00 7. " CREP ,Configuration register enable polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " CRE ,Configuration register enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFL ,Read Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 4. " WFL ,Write Fix Latency" "Wait,Terminated internally" textline " " bitfld.long 0x00 3. " MUM ,Multiplexed Mode" "Disabled,Enabled" bitfld.long 0x00 2. " SRD ,Synchronous Read Data" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " SWR ,Synchronous Write Data" "Asynchronous,Synchronous" bitfld.long 0x00 0. " CSEN ,CS Enable" "Disabled,Enabled" endif group.long (0x48+0x04)++0x3 line.long 0x00 "CS3GCR2,Chip Select 3 General Control Register 2" bitfld.long 0x00 12. " MUX16_BYP_GRANT ,Muxed 16 bypass grant" "Wait for grant,Ignore grant" bitfld.long 0x00 9. " DAP ,Data Acknowledge Polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " DAE ,Data Acknowledge Enable" "Disabled,Enabled" bitfld.long 0x00 4.--7. " DAPS ,Data Acknowledge Poling Start" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" textline " " bitfld.long 0x00 0.--1. " ADH ,Address hold time" "0 cycles,1 cycle,2 cycles,?..." group.long (0x48+0x08)++0x3 line.long 0x00 "CS3RCR1,Chip Select 3 Read Control Register 1" bitfld.long 0x00 24.--29. " RWSC ,Read Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " RADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 19. " RAL ,Read ADV Low" "RADVN,Ignored" bitfld.long 0x00 16.--18. " RADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 12.--14. " OEA ,OE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 8.--10. " OEN ,OE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 4.--6. " RCSA ,Read CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RCSN ,Read CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" if (((per.l(ad:0x021B8000+0x48))&0x3000)==0x0) group.long (0x48+0x0C)++0x3 line.long 0x00 "CS3RCR2,Chip Select 3 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1,2,3,4" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x48+0x0C)++0x3 line.long 0x00 "CS3RCR2,Chip Select 3 Read Control Register 2" bitfld.long 0x00 15. " APR ,Asynchronous Page Read" "Word,Page" bitfld.long 0x00 12.--14. " PAT ,Page Access Time" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles" textline " " bitfld.long 0x00 8.--9. " RL ,Read Latency" "1.5,2.5,3.5,4.5" bitfld.long 0x00 4.--6. " RBEA ,Read BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RBE ,Read BE enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RBEN ,Read /BE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif if (((per.l(ad:0x021B8000+0x48))&0x2)==0x0) group.long (0x48+0x10)++0x3 line.long 0x00 "CS3WCR1,Chip Select 3 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 15.--17. " WBEA ,BE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 12.--14. " WBEN ,BE[3:0] Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WEN ,WE Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " WCSN ,Write CS Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x48+0x10)++0x3 line.long 0x00 "CS3WCR1,Chip Select 3 Write Control Register 1" bitfld.long 0x00 31. " WAL ,Write ADV Low" "As WADVN,Ignored" bitfld.long 0x00 30. " WBED ,Write Byte Enable Disable" "No,Yes" textline " " bitfld.long 0x00 24.--29. " WWSC ,Write Wait State Control" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 21.--23. " WADVA ,ADV Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 18.--20. " WADVN ,ADV Negation" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 9.--11. " WEA ,WE Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " WCSA ,Write CS Assertion" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif group.long (0x48+0x14)++0x3 line.long 0x00 "CS3WCR2,Chip Select 3 Write Configuration Register 2" bitfld.long 0x00 0. " WBCDD ,Write Burst Clock Divisor Decrement" "No effect,Preformed" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") group.long 0x90++0x3 "Common" line.long 0x00 "WCR,EIM Configuration Register" bitfld.long 0x00 11. " FRUN_ACLK_EN ,Free run ACLK enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " WDOG_LIMIT ,Memory Wdog cycle limit" "128 cycles,256 cycles,512 cycles,1024 cycles" bitfld.long 0x00 8. " WDOG_EN ,Memory Wdog enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTPOL ,Interrupt Polarity" "Active low,Active high" bitfld.long 0x00 4. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CONT_BCLK_SEL ,Continuous BCLK select" "BCLK,BCLK Continuous" textline " " bitfld.long 0x00 1.--2. " GBCD ,General Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 0. " BCM ,Burst Clock Mode" "Depend on CS config,When aclk active" group.long 0x94++0x03 line.long 0x00 "DCR,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,Reference DLL Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23.--27. " DLL_CTRL_SLV_UPDATE_INT ,Slave DLL Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x00 16.--22. 1. " DLL_CTRL_REF_INTIAL_VAL ,Reference DLL Initial Value" hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave DLL Override Value" textline " " bitfld.long 0x00 8. " DLL_CTRL_SLV_OVVERIDE ,Enable slave DLL override" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,Gate DLL Update" "Not updated,Updated" textline " " bitfld.long 0x00 4.--6. " DLL_CTRL_SLV_OFFSET_DEC ,Slave DLL offset" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,Slave DLL force update" "Not updated,Updated" textline " " bitfld.long 0x00 1. " DLL_CTRL_RESET ,Reset DLL" "No reset,Reset" bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,Enable DLL" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "DSR,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference DLL Selection" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave DLL Selection" textline " " bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL Lock" "Not locked,Locked" bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave DLL Lock" "Not locked,Locked" group.long 0x9C++0x3 line.long 0x00 "WIAR,WEIM IP Access Register" bitfld.long 0x00 4. " ACLK_EN ,ACLK enable" "Disabled,Enabled" bitfld.long 0x00 3. " ERRST ,Enable READY After Reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT ,Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IPS_ACK ,WEIM is ready for ips access" "Not accessed,Accessed" textline " " bitfld.long 0x00 0. " IPS_REQ ,IPS request" "Not requested,Requested" sif (cpu()=="IMX6SOLOLITE") group.long 0xA0++0x3 line.long 0x00 "EAR,Error Address Register" else rgroup.long 0xA0++0x3 line.long 0x00 "EAR,Error Address Register" endif else group.long 0x90++0x3 "Common" line.long 0x00 "WCR,WEIM Configuration Register" bitfld.long 0x00 9.--10. " WDOG_LIMIT ,Memory Wdog cycle limit" "128 cycles,256 cycles,512 cycles,1024 cycles" bitfld.long 0x00 8. " WDOG_EN ,Memory Wdog enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTPOL ,Interrupt Polarity" "Active low,Active high" bitfld.long 0x00 4. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--2. " GBCD ,General Burst Clock Divisor" "Div by 1,Div by 2,Div by 3,Div by 4" bitfld.long 0x00 0. " BCM ,Burst Clock Mode" "Depend on CS config,When aclk active" group.long 0x94++0x3 line.long 0x00 "WIAR,WEIM IP Access Register" bitfld.long 0x00 4. " ACLK_EN ,ACLK enable" "Disabled,Enabled" bitfld.long 0x00 3. " ERRST ,Enable READY After Reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT ,Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IPS_ACK ,WEIM is ready for ips access" "Not accessed,Accessed" textline " " bitfld.long 0x00 0. " IPS_REQ ,IPS request" "Not requested,Requested" rgroup.long 0x98++0x3 line.long 0x00 "EAR,Error Address Register" endif sif !cpuis("IMX50*") width 5. tree "Chip Select Memory" base ad:0xF0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS0,EIM CS0 Memory Region" button "CS0 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS1,EIM CS1 Memory Region" button "CS1 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS2,EIM CS2 Memory Region" button "CS2 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS3,EIM CS3 Memory Region" button "CS3 " "d ad:0xF0000000--ad:0xffffffff /long" base ad:0xf0000000 sif (!cpuis("IMX6*")) hgroup.long 0x00++0x3 hide.long 0x00 "CS4,EIM CS4 Memory Region" button "CS4 " "d ad:0xf0000000--ad:0xffffffff /long" base ad:0xf0000000 hgroup.long 0x00++0x3 hide.long 0x00 "CS5,EIM CS5 Memory Region" button "CS5 " "d ad:0xf0000000--ad:0xffffffff /long" endif tree.end endif width 0x0B endif tree.end sif (cpu()=="IMX6SOLOLITE") tree "eLCDIF (Enhanced LCD Interface)" base ad:0x020F8000 width 11. tree "Control registers" if (((per.l(ad:0x020F8000+0x00))&0x040000)==0x040000)&&(((per.l(ad:0x020F8000+0x00))&0x01)==0x01) group.long 0x00++0x0F line.long 0x00 "RL,eLCDIF General Control Register" bitfld.long 0x00 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x00 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x00 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x00 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x00 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x00 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x00 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x00 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x00 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x00 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x00 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x00 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x00 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x00 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x00 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x00 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x00 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x04 "RL_SET,eLCDIF General Control Register" bitfld.long 0x04 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x04 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x04 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x04 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x04 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x04 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x04 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x04 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x04 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x04 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x04 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x04 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x04 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x04 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x04 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x04 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x04 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x04 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x08 "RL_CLR,eLCDIF General Control Register" bitfld.long 0x08 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x08 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x08 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x08 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x08 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x08 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x08 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x08 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x08 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x08 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x08 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x08 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x08 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x08 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x08 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x08 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x08 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x08 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x0C "RL_TOG,eLCDIF General Control Register" bitfld.long 0x0C 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x0C 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x0C 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x0C 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x0C 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x0C 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x0C 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x0C 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x0C 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x0C 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x0C 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x0C 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x0C 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x0C 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x0C 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x0C 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x0C 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x0C 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" elif (((per.l(ad:0x020F8000+0x00))&0x040000)==0x040000)&&(((per.l(ad:0x020F8000+0x00))&0x01)==0x00) group.long 0x00++0x0F line.long 0x00 "RL,eLCDIF General Control Register" bitfld.long 0x00 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x00 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x00 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x00 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x00 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x00 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x00 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x00 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x00 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x00 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x00 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x00 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x00 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x00 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x00 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x00 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x00 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x00 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x00 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x04 "RL_SET,eLCDIF General Control Register" bitfld.long 0x04 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x04 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x04 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x04 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x04 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x04 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x04 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x04 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x04 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x04 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x04 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x04 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x04 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x04 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x04 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x04 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x04 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x04 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x04 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x08 "RL_CLR,eLCDIF General Control Register" bitfld.long 0x08 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x08 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x08 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x08 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x08 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x08 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x08 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x08 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x08 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x08 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x08 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x08 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x08 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x08 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x08 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x08 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x08 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x08 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x08 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x0C "RL_TOG,eLCDIF General Control Register" bitfld.long 0x0C 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x0C 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x0C 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x0C 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x0C 27. " WAIT_FOR_VSYNC_EDGE ,VSYNC edge triggering" "No,Yes" bitfld.long 0x0C 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x0C 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x0C 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x0C 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x0C 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x0C 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x0C 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x0C 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x0C 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x0C 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x0C 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x0C 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x0C 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x0C 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" elif (((per.l(ad:0x020F8000+0x00))&0x040000)==0x00)&&(((per.l(ad:0x020F8000+0x00))&0x01)==0x01) group.long 0x00++0x0F line.long 0x00 "RL,eLCDIF General Control Register" bitfld.long 0x00 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x00 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x00 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x00 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x00 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x00 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x00 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x00 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x00 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x00 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x00 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x00 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x00 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x00 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x00 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x00 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x04 "RL_SET,eLCDIF General Control Register" bitfld.long 0x04 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x04 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x04 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x04 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x04 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x04 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x04 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x04 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x04 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x04 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x04 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x04 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x04 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x04 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x04 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x04 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x04 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x08 "RL_CLR,eLCDIF General Control Register" bitfld.long 0x08 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x08 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x08 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x08 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x08 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x08 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x08 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x08 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x08 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x08 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x08 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x08 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x08 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x08 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x08 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x08 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x08 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x0C "RL_TOG,eLCDIF General Control Register" bitfld.long 0x0C 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x0C 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x0C 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x0C 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x0C 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x0C 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x0C 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x0C 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x0C 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" textline " " bitfld.long 0x0C 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x0C 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x0C 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x0C 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x0C 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x0C 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x0C 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x0C 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" else group.long 0x00++0x0F line.long 0x00 "RL,eLCDIF General Control Register" bitfld.long 0x00 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x00 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x00 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x00 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x00 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x00 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x00 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x00 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x00 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x00 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x00 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x00 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x00 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x00 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x00 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x00 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x00 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x00 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x04 "RL_SET,eLCDIF General Control Register" bitfld.long 0x04 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x04 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x04 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x04 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x04 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x04 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x04 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x04 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x04 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x04 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x04 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x04 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x04 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x04 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x04 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x04 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x04 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x04 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x04 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x08 "RL_CLR,eLCDIF General Control Register" bitfld.long 0x08 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x08 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x08 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x08 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x08 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x08 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x08 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x08 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x08 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x08 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x08 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x08 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x08 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x08 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x08 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x08 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x08 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x08 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x08 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" line.long 0x0C "RL_TOG,eLCDIF General Control Register" bitfld.long 0x0C 31. " SFTRST ,Operation of the eLCDIF" "Normal operation,Block level reset" bitfld.long 0x0C 30. " CLKGATE ,Clock gating" "Normal,Gated off" bitfld.long 0x0C 29. " YCBCR422_INPUT ,Color format" "RGB,YCbCr 4:2:2" textline " " bitfld.long 0x0C 28. " READ_WRITEB ,Mode select" "Write mode,6800/8080 MPU read mode" bitfld.long 0x0C 26. " DATA_SHIFT_DIR ,Direction of shift of transmit data" "Left,Right" textline " " bitfld.long 0x0C 21.--25. " SHIFT_NUM_BITS ,The data to be transmitted is shifted left or right by this number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 20. " DVI_MODE ,Mode" "0,1" bitfld.long 0x0C 19. " BYPASS_COUNT ,Block operation controller" "Transfer count,Block itself" textline " " bitfld.long 0x0C 18. " VSYNC_MODE ,VSYNC mode" "Disabled,Enabled" bitfld.long 0x0C 17. " DOTCLK_MODE ,DOTCLK mode" "Disabled,Enabled" bitfld.long 0x0C 16. " DATA_SELECT ,Command Mode polarity bit" "Command,Data" textline " " bitfld.long 0x0C 14.--15. " INPUT_DATA_SWIZZLE ,Swapping the bytes fetched by the bus master interface" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 12.--13. " CSC_DATA_SWIZZLE ,Swapping the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x0C 10.--11. " LCD_DATABUS_WIDTH ,LCD Data bus transfer width" "16 bit,8 bit,18 bit,24 bit" textline " " bitfld.long 0x0C 8.--9. " WORD_LENGTH ,Input data format" "16 bit,8 bit,18 bit,24 bit" bitfld.long 0x0C 7. " RGB_TO_YCBCR422_CSC ,Conversion from RGB to YCbCr colorspace" "Disabled,Enabled" bitfld.long 0x0C 6. " ENABLE_PXP_HANDSHAKE ,Handshake mechanism between eLCDIF and ePXP" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " MASTER ,eLCDIF mode" "PIO,Bus master" bitfld.long 0x0C 3. " DATA_FORMAT_16_BIT ,16bit data format" "RGB565,ARGB555" bitfld.long 0x0C 2. " DATA_FORMAT_18_BIT ,18bit data format" "Lower,Upper" textline " " bitfld.long 0x0C 1. " DATA_FORMAT_24_BIT ,24bit data format" "All valid,Drop 2 bits" bitfld.long 0x0C 0. " RUN ,Transferring data between the SoC and the display" "Not running,Running" endif if (((per.l(ad:0x020F8000+0x00))&0x20000)==0x20000)||(((per.l(ad:0x020F8000+0x00))&0x100000)==0x100000) group.long 0x10++0x0F line.long 0x00 "CTRL1,eLCDIF General Control1 Register" bitfld.long 0x00 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x00 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x00 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x00 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x00 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x00 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x00 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x00 20. " IRQ_ON_ALTERNATE_FIELDS ,Assertion of the cur_frame_done interrupt" "Odd and even fields,Alternate fields" bitfld.long 0x00 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x00 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x00 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x00 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x00 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x00 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x00 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x00 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x00 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x00 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x00 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in the VSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x00 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x00 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x04 "CTRL1_SET,eLCDIF General Control1 Register" bitfld.long 0x04 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x04 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x04 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x04 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x04 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x04 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x04 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x04 20. " IRQ_ON_ALTERNATE_FIELDS ,Assertion of the cur_frame_done interrupt" "Odd and even fields,Alternatate fields" bitfld.long 0x04 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x04 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x04 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x04 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x04 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x04 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x04 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x04 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x04 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x04 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x04 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in tVSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x04 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x04 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x08 "CTRL1_CLR,eLCDIF General Control1 Register" bitfld.long 0x08 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x08 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x08 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x08 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x08 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x08 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x08 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x08 20. " IRQ_ON_ALTERNATE_FIELDS ,Assertion of the cur_frame_done interrupt" "Odd and even fields,Alternatate fields" bitfld.long 0x08 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x08 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x08 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x08 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x08 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x08 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x08 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x08 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x08 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x08 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x08 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in tVSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x08 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x08 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x0C "CTRL1_TOG,eLCDIF General Control1 Register" bitfld.long 0x0C 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x0C 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x0C 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x0C 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x0C 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x0C 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x0C 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x0C 20. " IRQ_ON_ALTERNATE_FIELDS ,Assertion of the cur_frame_done interrupt" "Odd and even fields,Alternatate fields" bitfld.long 0x0C 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x0C 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x0C 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x0C 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x0C 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x0C 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x0C 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x0C 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x0C 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x0C 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in tVSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x0C 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x0C 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" else group.long 0x10++0x0F line.long 0x00 "CTRL1,eLCDIF General Control1 Register" bitfld.long 0x00 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x00 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x00 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x00 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x00 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x00 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x00 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x00 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x00 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x00 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x00 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x00 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x00 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x00 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x00 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x00 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x00 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x00 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in the VSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x00 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x00 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x04 "CTRL1_SET,eLCDIF General Control1 Register" bitfld.long 0x04 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x04 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x04 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x04 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x04 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x04 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x04 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x04 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x04 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x04 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x04 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x04 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x04 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x04 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x04 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x04 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x04 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x04 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in the VSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x04 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x04 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x08 "CTRL1_CLR,eLCDIF General Control1 Register" bitfld.long 0x08 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x08 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x08 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x08 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x08 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x08 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x08 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x08 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x08 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x08 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x08 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x08 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x08 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x08 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x08 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x08 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x08 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x08 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in the VSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x08 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x08 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" line.long 0x0C "CTRL1_TOG,eLCDIF General Control1 Register" bitfld.long 0x0C 27. " COMBINE_MPU_WR_STRB ,Write strobe driving" "LCD_WR_RWn/LCD_RD_E,LCD_WR_RWn" bitfld.long 0x0C 26. " BM_ERROR_IRQ_EN ,Bus master error interrupt in the eLCDIF master mode" "Disabled,Enabled" bitfld.long 0x0C 25. " BM_ERROR_IRQ ,Interrupt request by the eLCDIF block" "Not requested,Requested" textline " " bitfld.long 0x0C 24. " RECOVER_ON_UNDERFLOW ,eLCDIF block recovery in the next field/frame if there was an underflow in the current field/frame" "Disabled,Enabled" bitfld.long 0x0C 23. " INTERLACE_FIELDS ,Fetching odd lines in one field and even lines in the other field by eLCDIF block" "Not required,Required" bitfld.long 0x0C 22. " START_INTERLACE_FROM_SECOND_FIELD ,Grabbing the odd lines first and then the even lines" "Not required,Required" textline " " bitfld.long 0x0C 21. " FIFO_CLEAR ,Clearing all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO" "Not cleared,Clear" bitfld.long 0x0C 19. " BYTE_PACKING_FORMAT_3 ,Bitfield is used to show that 1st most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x0C 18. " BYTE_PACKING_FORMAT_2 ,Bitfield is used to show that 2nd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x0C 17. " BYTE_PACKING_FORMAT_1 ,Bitfield is used to show that 3rd most significant data byte in a 32-bit word is valid" "Not valid,Valid" bitfld.long 0x0C 16. " BYTE_PACKING_FORMAT_0 ,Bitfield is used to show that 4th most significant data byte in a 32-bit word is valid" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OVERFLOW_IRQ_EN ,Overflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x0C 14. " UNDERFLOW_IRQ_EN ,Underflow interrupt in the TXFIFO in the write mode" "Disabled,Enabled" bitfld.long 0x0C 13. " CUR_FRAME_DONE_IRQ_EN ,Hardware entered in the vertical blanking state" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " VSYNC_EDGE_IRQ_EN ,Hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode" "Disabled,Enabled" bitfld.long 0x0C 11. " OVERFLOW_IRQ ,Overflow interrupt is requested by the eLCDIF block" "Not requested,Requested" bitfld.long 0x0C 10. " UNDERFLOW_IRQ ,Underflow interrupt is requested by the eLCDIF block when" "Not requested,Requested" textline " " bitfld.long 0x0C 9. " CUR_FRAME_DONE_IRQ ,Interrupt is requested by the eLCDIF block when the hardware has completed transmitting the current frame and is in the vertical blanking period in the DOTCLK/DVI modes" "Not requested,Requested" bitfld.long 0x0C 8. " VSYNC_EDGE_IRQ ,Interrupt is requested by the eLCDIF block when VSYNC edge is detected in the VSYNC and DOTCLK modes" "Not requested,Requested" bitfld.long 0x0C 2. " BUSY_ENABLE ,Use of the interface's busy signal input" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " MODE86 ,Select between the 8080 and 6800 series of microprocessor modes" "8080_MODE,6800_MODE" bitfld.long 0x0C 0. " RESET ,Reset bit for the external LCD controller" "LCDRESET_LOW,LCDRESET_HIGH" endif textline "" if (((per.l(ad:0x020F8000+0x00))&0x20)==0x20) group.long 0x20++0x0F line.long 0x00 "CTRL2,eLCDIF General Control2 Register" bitfld.long 0x00 21.--23. " OUTSTANDING_REQS ,Maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master" "REQ_1,REQ_2,REQ_4,REQ_8,REQ_16,,," bitfld.long 0x00 20. " BURST_LEN_8 ,Issuing bursts of length 8" "Disabled,Enabled" bitfld.long 0x00 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x00 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x00 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x00 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x00 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x00 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x04 "CTRL2_SET,eLCDIF General Control2 Register" bitfld.long 0x04 21.--23. " OUTSTANDING_REQS ,Maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master" "REQ_1,REQ_2,REQ_4,REQ_8,REQ_16,,," bitfld.long 0x04 20. " BURST_LEN_8 ,Issuing bursts of length 8" "Disabled,Enabled" bitfld.long 0x04 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x04 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x04 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x04 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x04 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x04 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x08 "CTRL2_CLR,eLCDIF General Control2 Register" bitfld.long 0x08 21.--23. " OUTSTANDING_REQS ,Maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master" "REQ_1,REQ_2,REQ_4,REQ_8,REQ_16,,," bitfld.long 0x08 20. " BURST_LEN_8 ,Issuing bursts of length 8" "Disabled,Enabled" bitfld.long 0x08 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x08 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x08 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x08 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x08 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x08 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x0C "CTRL2_TOG,eLCDIF General Control2 Register" bitfld.long 0x0C 21.--23. " OUTSTANDING_REQS ,Maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master" "REQ_1,REQ_2,REQ_4,REQ_8,REQ_16,,," bitfld.long 0x0C 20. " BURST_LEN_8 ,Issuing bursts of length 8" "Disabled,Enabled" bitfld.long 0x0C 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x0C 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x0C 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x0C 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x0C 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x0C 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" else group.long 0x00++0x0F line.long 0x00 "CTRL2,eLCDIF General Control2 Register" bitfld.long 0x00 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x00 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x00 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x00 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x00 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x00 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x04 "CTRL2_SET,eLCDIF General Control2 Register" bitfld.long 0x04 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x04 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x04 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x04 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x04 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x04 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x08 "CTRL2_CLR,eLCDIF General Control2 Register" bitfld.long 0x08 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x08 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x08 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x08 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x08 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x08 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" line.long 0x0C "CTRL2_TOG,eLCDIF General Control2 Register" bitfld.long 0x0C 16.--18. " ODD_LINE_PATTERN ,Order of the RGB components of each pixel in ODD lines" "RGB,RBG,GBR,GRB,BRG,BGR,," textline " " bitfld.long 0x0C 12.--14. " EVEN_LINE_PATTERN ,Order of the RGB components of each pixel in EVEN lines" "RGB,RBG,GBR,GRB,BRG,BGR,," bitfld.long 0x0C 10. " READ_PACK_DIR ,Direction of reading data bits" "Little Endian,Big Endian" bitfld.long 0x0C 9. " READ_MODE_OUTPUT_IN_RGB_FORMAT ,Incoming data conversion to the RGB format given by WORD_LENGTH bitfield" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " READ_MODE_6_BIT_INPUT ,6 bit input mode" "Disabled,Enabled" bitfld.long 0x0C 4.--6. " READ_MODE_NUM_PACKED_SUBWORDS ,Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode" "0,1,2,3,4,,," bitfld.long 0x0C 1.--3. " INITIAL_DUMMY_READ ,Indicates the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller" "0,1,2,3,4,5,6,7" endif tree.end textline "" width 16. group.long 0x030++0x03 line.long 0x00 "TRANSFER_COUNT,eLCDIF Horizontal and Vertical Valid Data Count Register" hexmask.long.word 0x00 16.--31. 1. " V_COUNT ,Number of horizontal lines per frame which contain valid data" hexmask.long.word 0x00 0.--15. 1. " H_COUNT ,Total valid data (pixels) in each horizontal line" group.long 0x040++0x03 line.long 0x00 "CUR_BUF,LCD Interface Current Buffer Address Register" group.long 0x050++0x03 line.long 0x00 "NEXT_BUF,LCD Interface Next Buffer Address Register" group.long 0x060++0x03 line.long 0x00 "TIMING,LCD Interface Timing Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_HOLD ,Number of CLK_DIS_LCDIFn cycles that the DCn signal is active after CEn is deasserted" hexmask.long.byte 0x00 16.--23. 1. " CMD_SETUP ,Number of CLK_DIS_LCDIFn cycles that the DCn signal is active before CEn is asserted" hexmask.long.byte 0x00 8.--15. 1. " DATA_HOLD ,Data bus hold time in CLK_DIS_LCDIFn cycles" hexmask.long.byte 0x00 0.--7. 1. " DATA_SETUP ,Data bus setup time in CLK_DIS_LCDIFn cycles" tree "VDCTRL" width 13. group.long 0x070++0x0F line.long 0x00 "VDCTRL0,eLCDIF VSYNC Mode and Dotclk Mode Control Register0" bitfld.long 0x00 29. " VSYNC_OEB ,VSYNC mode" "Output,Input" bitfld.long 0x00 28. " ENABLE_PRESENT ,Enable present" "0,1" bitfld.long 0x00 27. " VSYNC_POL ,VSYNC polarity" "Not inverted,Inverted" bitfld.long 0x00 26. " HSYNC_POL ,HSYNC polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 25. " DOTCLK_POL ,DOTCLK polarity" "Not inverted,Inverted" bitfld.long 0x00 24. " ENABLE_POL ,Enable polarity" "0,1" bitfld.long 0x00 21. " VSYNC_PERIOD_UNIT ,Terms of counting VSYNC_PERIOD" "Cycles,Horizontal lines" bitfld.long 0x00 20. " VSYNC_PULSE_WIDTH_UNIT ,Terms of counting VSYNC_PULSE_WIDTH" "Cycles,Horizontal lines" textline " " bitfld.long 0x00 19. " HALF_LINE ,Adding to VSYNC_PERIOD half of the HORIZONTAL_PERIOD field" "Disabled,Enabled" bitfld.long 0x00 18. " HALF_LINE_MODE ,Enable beginning with half a horizontal line" "Disabled,Enabled" hexmask.long.tbyte 0x00 0.--17. 1. " VSYNC_PULSE_WIDTH ,Number of units for which VSYNC signal is active" line.long 0x04 "VDCTRL0_SET,eLCDIF VSYNC Mode and Dotclk Mode Control Register0" bitfld.long 0x04 29. " VSYNC_OEB ,VSYNC mode" "Output,Input" bitfld.long 0x04 28. " ENABLE_PRESENT ,Enable present" "0,1" bitfld.long 0x04 27. " VSYNC_POL ,VSYNC polarity" "Not inverted,Inverted" bitfld.long 0x04 26. " HSYNC_POL ,HSYNC polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 25. " DOTCLK_POL ,DOTCLK polarity" "Not inverted,Inverted" bitfld.long 0x04 24. " ENABLE_POL ,Enable polarity" "0,1" bitfld.long 0x04 21. " VSYNC_PERIOD_UNIT ,Terms of counting VSYNC_PERIOD" "Cycles,Horizontal lines" bitfld.long 0x04 20. " VSYNC_PULSE_WIDTH_UNIT ,Terms of counting VSYNC_PULSE_WIDTH" "Cycles,Horizontal lines" textline " " bitfld.long 0x04 19. " HALF_LINE ,Adding to VSYNC_PERIOD half of the HORIZONTAL_PERIOD field" "Disabled,Enabled" bitfld.long 0x04 18. " HALF_LINE_MODE ,Enable beginning with half a horizontal line" "Disabled,Enabled" hexmask.long.tbyte 0x04 0.--17. 1. " VSYNC_PULSE_WIDTH ,Number of units for which VSYNC signal is active" line.long 0x08 "VDCTRL0_CLR,eLCDIF VSYNC Mode and Dotclk Mode Control Register0" bitfld.long 0x08 29. " VSYNC_OEB ,VSYNC mode" "Output,Input" bitfld.long 0x08 28. " ENABLE_PRESENT ,Enable present" "0,1" bitfld.long 0x08 27. " VSYNC_POL ,VSYNC polarity" "Not inverted,Inverted" bitfld.long 0x08 26. " HSYNC_POL ,HSYNC polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 25. " DOTCLK_POL ,DOTCLK polarity" "Not inverted,Inverted" bitfld.long 0x08 24. " ENABLE_POL ,Enable polarity" "0,1" bitfld.long 0x08 21. " VSYNC_PERIOD_UNIT ,Terms of counting VSYNC_PERIOD" "Cycles,Horizontal lines" bitfld.long 0x08 20. " VSYNC_PULSE_WIDTH_UNIT ,Terms of counting VSYNC_PULSE_WIDTH" "Cycles,Horizontal lines" textline " " bitfld.long 0x08 19. " HALF_LINE ,Adding to VSYNC_PERIOD half of the HORIZONTAL_PERIOD field" "Disabled,Enabled" bitfld.long 0x08 18. " HALF_LINE_MODE ,Enable beginning with half a horizontal line" "Disabled,Enabled" hexmask.long.tbyte 0x08 0.--17. 1. " VSYNC_PULSE_WIDTH ,Number of units for which VSYNC signal is active" line.long 0x0C "VDCTRL0_TOG,eLCDIF VSYNC Mode and Dotclk Mode Control Register0" bitfld.long 0x0C 29. " VSYNC_OEB ,VSYNC mode" "Output,Input" bitfld.long 0x0C 28. " ENABLE_PRESENT ,Enable present" "0,1" bitfld.long 0x0C 27. " VSYNC_POL ,VSYNC polarity" "Not inverted,Inverted" bitfld.long 0x0C 26. " HSYNC_POL ,HSYNC polarity" "Not inverted,Inverted" textline " " bitfld.long 0x00 25. " DOTCLK_POL ,DOTCLK polarity" "Not inverted,Inverted" bitfld.long 0x0C 24. " ENABLE_POL ,Enable polarity" "0,1" bitfld.long 0x0C 21. " VSYNC_PERIOD_UNIT ,Terms of counting VSYNC_PERIOD" "Cycles,Horizontal lines" bitfld.long 0x0C 20. " VSYNC_PULSE_WIDTH_UNIT ,Terms of counting VSYNC_PULSE_WIDTH" "Cycles,Horizontal lines" textline " " bitfld.long 0x0C 19. " HALF_LINE ,Adding to VSYNC_PERIOD half of the HORIZONTAL_PERIOD field" "Disabled,Enabled" bitfld.long 0x0C 18. " HALF_LINE_MODE ,Enable beginning with half a horizontal line" "Disabled,Enabled" hexmask.long.tbyte 0x0C 0.--17. 1. " VSYNC_PULSE_WIDTH ,Number of units for which VSYNC signal is active" group.long 0x80++0x03 line.long 0x00 "VDCTRL1,eLCDIF VSYNC Mode and Dotclk Mode Control Register1" group.long 0x90++0x03 line.long 0x00 "VDCTRL2,eLCDIF VSYNC Mode and Dotclk Mode Control Register2" hexmask.long.word 0x00 18.--31. 1. " HSYNC_PULSE_WIDTH ,Number of CLK_DIS_LCDIFn cycles for which HSYNC signal is active" hexmask.long.tbyte 0x00 0.--17. 1. " HSYNC_PERIOD ,Total number of CLK_DIS_LCDIFn cycles between two positive or two negative edges of the HSYNC signal" group.long 0xA0++0x03 line.long 0x00 "VDCTRL3,eLCDIF VSYNC Mode and Dotclk Mode Control Register3" bitfld.long 0x00 29. " MUX_SYNC_SIGNALS ,Internally multiplexed signals" "Separated,Multiplexed" bitfld.long 0x00 28. " VSYNC_ONLY ,Mode of operation" "DOTCLK,VSYNC" hexmask.long.word 0x00 16.--27. 1. " HORIZONTAL_WAIT_CNT ,Wait for this number of clocks from edge" hexmask.long.word 0x00 0.--15. 1. " VERTICAL_WAIT_CNT ,Wait for this number of CLK_DIS_LCDIFn cycles from the VSYNC edge before starting LCD transactions" if (((per.l(ad:0x020F8000+0x00))&0x20000)==0x20000) group.long 0xB0++0x03 line.long 0x00 "VDCTRL4,eLCDIF VSYNC Mode and Dotclk Mode Control Register4" bitfld.long 0x00 29.--31. " DOTCLK_DLY_SEL ,Amount of time by which the DOTCLK signal should be delayed before coming out of the LCD_DOTCK pin" "2ns,4ns,6ns,8ns,,,," bitfld.long 0x00 18. " SYNC_SIGNALS_ON ,VSYNC or VSYNC/HSYNC/DOTCLK control signals should be active at least one frame before the data transfers actually start and remain active at least one frame after the data transfers end" "0,1" hexmask.long.tbyte 0x00 0.--17. 1. " DOTCLK_H_VALID_DATA_CNT ,Total number of CLK_DIS_LCDIFn cycles on each horizontal line that carry valid data in DOTCLK mode" else hgroup.long 0xB0++0x03 hide.long 0x00 "VDCTRL4,eLCDIF VSYNC Mode and Dotclk Mode Control Register4" in endif tree.end width 10. tree "DVICTRLx registers" group.long 0xC0++0x03 line.long 0x00 "DVICTRL0,Digital Video Interface Control 0 Register" hexmask.long.word 0x00 16.--27. 1. " H_ACTIVE_CNT ,Number of active video samples to be transmitted" hexmask.long.word 0x00 0.--11. 1. " H_BLANKING_CNT ,Number of blanking samples to be inserted between EAV and SAV during horizontal blanking interval" group.long 0xD0++0x03 line.long 0x00 "DVICTRL1,Digital Video Interface Control 1 Register" hexmask.long.word 0x00 20.--29. 1. " F1_START_LINE ,Vertical line number from which Field 1 begins" hexmask.long.word 0x00 10.--19. 1. " F1_END_LINE ,Vertical line number at which Field 1 ends" hexmask.long.word 0x00 0.--9. 1. " F2_START_LINE ,Vertical line number from which Field 2 begins" group.long 0xE0++0x03 line.long 0x00 "DVICTRL2,Digital Video Interface Control 2 Register" hexmask.long.word 0x00 20.--29. 1. " F2_END_LINE ,Vertical line number at which Field 2 ends" hexmask.long.word 0x00 10.--19. 1. " V1_BLANK_START_LINE ,Vertical line number towards the end of Field1 where first Vertical Blanking interval starts" hexmask.long.word 0x00 0.--9. 1. " V1_BLANK_END_LINE ,Vertical line number in the beginning part of Field2 where first Vertical Blanking interval ends" group.long 0xF0++0x03 line.long 0x00 "DVICTRL3,Digital Video Interface Control 3 Register" hexmask.long.word 0x00 20.--29. 1. " V2_BLANK_START_LINE ,Vertical line number towards the end of Field2 where second Vertical Blanking interval starts" hexmask.long.word 0x00 10.--19. 1. " V2_BLANK_END_LINE ,Vertical line number in the beginning part of Field1 where second Vertical Blanking interval ends" hexmask.long.word 0x00 0.--9. 1. " V_LINES_CNT ,Total number of vertical lines per frame" group.long 0x100++0x03 line.long 0x00 "DVICTRL4,Digital Video Interface Control 4 Register" hexmask.long.byte 0x00 24.--31. 1. " Y_FILL_VALUE ,Value of Y component of filler data" hexmask.long.byte 0x00 16.--23. 1. " CB_FILL_VALUE ,Value of CB component of filler data" hexmask.long.byte 0x00 8.--15. 1. " CR_FILL_VALUE ,Value of CR component of filler data" hexmask.long.byte 0x00 0.--7. 1. " H_FILL_CNT ,Number of active video samples that have to be filled with the filler data in the front and back portions of the active horizontal interval" tree.end width 12. tree "COEFFx registers" group.long 0x110++0x03 line.long 0x00 "CSC_COEFF0,RGB to YCbCr 4:2:2 CSC Coefficient0 Register" hexmask.long.word 0x00 16.--25. 1. " C0 ,Two's complement red multiplier coefficient for Y" bitfld.long 0x00 0.--1. " CSC_SUBSAMPLE_FILTER ,Filtering and subsampling scheme to be performed on the chroma components in order to convert from YCbCr 4:4:4 to YCbCr 4:2:2 space" "SAMPLE_AND_HOLD,,INTERSTITIAL,COSITED" group.long 0x120++0x03 line.long 0x00 "CSC_COEFF1,RGB to YCbCr 4:2:2 CSC Coefficient1 Register" hexmask.long.word 0x00 16.--25. 1. " C2 ,Two's complement blue multiplier coefficient for Y" hexmask.long.word 0x00 0.--9. 1. " C1 ,Two's complement green multiplier coefficient for Y" group.long 0x130++0x03 line.long 0x00 "CSC_COEFF2,RGB to YCbCr 4:2:2 CSC Coefficient2 Register" hexmask.long.word 0x00 16.--25. 1. " C4 ,Two's complement green multiplier coefficient for Cb" hexmask.long.word 0x00 0.--9. 1. " C3 ,Two's complement red multiplier coefficient for Cb" group.long 0x140++0x03 line.long 0x00 "CSC_COEFF3,RGB to YCbCr 4:2:2 CSC Coefficient3 Register" hexmask.long.word 0x00 16.--25. 1. " C6 ,Two's complement red multiplier coefficient for Cr" hexmask.long.word 0x00 0.--9. 1. " C5 ,Two's complement blue multiplier coefficient for Cb" group.long 0x150++0x03 line.long 0x00 "CSC_COEFF4,RGB to YCbCr 4:2:2 CSC Coefficient4 Register" hexmask.long.word 0x00 16.--25. 1. " C8 ,Two's complement blue multiplier coefficient for Cr" hexmask.long.word 0x00 0.--9. 1. " C7 ,Two's complement green multiplier coefficient for Cr" tree.end textline "" width 15. group.long 0x160++0x03 line.long 0x00 "CSC_OFFSET,RGB to YCbCr 4:2:2 CSC Offset Register" hexmask.long.word 0x00 16.--24. 1. " CBCR_OFFSET ,Two's complement offset for the Cb and Cr components" hexmask.long.word 0x00 0.--8. 1. " Y_OFFSET ,Two's complement offset for the Y component" group.long 0x170++0x03 line.long 0x00 "CSC_LIMIT,RGB to YCbCr 4:2:2 CSC Limit Register" hexmask.long.byte 0x00 24.--31. 1. " CBCR_MIN ,Lower limit of Cb and Cr after RGB to 4:2:2 YCbCr conversion" hexmask.long.byte 0x00 16.--23. 1. " CBCR_MAX ,Upper limit of Cb and Cr after RGB to 4:2:2 YCbCr conversion" hexmask.long.byte 0x00 8.--15. 1. " Y_MIN ,Lower limit of Y after RGB to 4:2:2 YCbCr conversion" hexmask.long.byte 0x00 0.--7. 1. " Y_MAX ,Upper limit of Y after RGB to 4:2:2 YCbCr conversion" group.long 0x180++0x03 line.long 0x00 "DATA,LCD Interface Data Register" hexmask.long.byte 0x00 24.--31. 1. " DATA_THREE ,Byte 3 (most significant byte) of data written to LCDIF" hexmask.long.byte 0x00 16.--23. 1. " DATA_TWO ,Byte 2 of data written to eLCDIF" hexmask.long.byte 0x00 8.--15. 1. " DATA_ONE ,Byte 1 of data written to eLCDIF" hexmask.long.byte 0x00 0.--7. 1. " DATA_ZERO ,Byte 0 (least significant byte) of data written to eLCDIF" group.long 0x190++0x03 line.long 0x00 "BM_ERROR_STAT,Bus Master Error Status Register" group.long 0x1A0++0x03 line.long 0x00 "CRC_STAT,CRC Status Register" rgroup.long 0x1B0++0x03 line.long 0x00 "STAT,LCD Interface Status Register" bitfld.long 0x00 31. " PRESENT ,eLCDIF presence" "Not present,Present" bitfld.long 0x00 29. " LFIFO_FULL ,Indicates that LCD read datapath FIFO is full" "Not full,Full" bitfld.long 0x00 28. " LFIFO_EMPTY ,Indicates that LCD read datapath FIFO is empty" "Not empty,Empty" bitfld.long 0x00 27. " TXFIFO_FULL ,Indicates that LCD write datapath FIFO is full" "Not full,Full" textline " " bitfld.long 0x00 26. " TXFIFO_EMPTY ,Indicates that LCD write datapath FIFO is empty" "Not empty,Empty" bitfld.long 0x00 25. " BUSY ,View of the input busy signal from the external LCD controller" "Not busy,Busy" bitfld.long 0x00 24. " DVI_CURRENT_FIELD ,View of the current field being transmitted" "Field 1,Field 2" hexmask.long.word 0x00 0.--8. 1. " LFIFO_COUNT ,Current count in Latency buffer" rgroup.long 0x1C0++0x03 line.long 0x00 "VERSION,LCD Interface Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of RTL version" width 8. tree "Debug registers" rgroup.long 0x1D0++0x03 line.long 0x00 "DEBUG0,LCD Interface Debug0 Register" bitfld.long 0x00 31. " STREAMING_END_DETECTED ,DOTCLK_MODE or DVI_MODE bit going from 1 to 0" "0,1" bitfld.long 0x00 30. " WAIT_FOR_VSYNC_EDGE_OUT ,WAIT_FOR_VSYNC_EDGE bit in the VSYNC mode after it comes out of the TXFIFO" "0,1" bitfld.long 0x00 29. " SYNC_SIGNALS_ON_REG ,Read only view of internal sync_signals_on_reg signal" "0,1" textline " " bitfld.long 0x00 27. " ENABLE ,Read only view of ENABLE signal" "0,1" bitfld.long 0x00 26. " HSYNC ,Read only view of HSYNC signal" "0,1" bitfld.long 0x00 25. " VSYNC ,Read only view of VSYNC signal" "0,1" textline " " bitfld.long 0x00 24. " CUR_FRAME_TX ,Indicates that the current frame is being transmitted in the VSYNC mode" "Not transmitted,Transmitted" bitfld.long 0x00 23. " EMPTY_WORD ,Indicates that the current word is empty" "Not empty,Empty" hexmask.long.byte 0x00 16.--22. 1. " CUR_STATE ,View of the current state machine state in the current mode of operation" textline " " bitfld.long 0x00 15. " PXP_B0_READY ,Buffer0 ready signal issued by ePXP" "0,1" bitfld.long 0x00 14. " PXP_B0_DONE ,Buffer0 done signal issued by eLCDIF" "0,1" bitfld.long 0x00 13. " PXP_B1_READY ,Buffer1 ready signal issued by ePXP" "0,1" textline " " bitfld.long 0x00 12. " PXP_B1_DONE ,Buffer1 done signal issued by eLCDIF" "0,1" bitfld.long 0x00 10.--11. " CUR_REQ_STATE ,Read only view of the request state machine" "0,1,2,3" bitfld.long 0x00 9. " MST_AVALID ,MST_AVALID signal issued by the AXI bus master" "0,1" textline " " bitfld.long 0x00 4.--8. " MST_OUTSTANDING_REQS ,Current outstanding requests issued by the AXI bus master" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " MST_WORDS ,Current bursts issued by the AXI bus master" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline "" rgroup.long 0x1E0++0x03 line.long 0x00 "DEBUG1,LCD Interface Debug1 Register" hexmask.long.word 0x00 16.--31. 1. " H_DATA_COUNT ,Horizontal data counter" hexmask.long.word 0x00 0.--15. 1. " V_DATA_COUNT ,Vertical data counter" rgroup.long 0x1F0++0x03 line.long 0x00 "DEBUG2,LCD Interface Debug2 Register" rgroup.long 0x270++0x03 line.long 0x00 "DEBUG3,eLCDIF Interface Debug3 Register" bitfld.long 0x00 10.--11. " CUR_REQ_STATE ,Request state machine" "0,1,2,3" bitfld.long 0x00 9. " MST_AVALID ,MST_AVALID signal issued by the AXI bus master" "0,1" bitfld.long 0x00 4.--8. " MST_OUTSTANDING_REQS ,Current outstanding requests issued by the AXI bus master" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " MST_WORDS ,Current bursts issued by the AXI bus master" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x280++0x03 line.long 0x00 "DEBUG4,eLCDIF Interface Debug4 Register" hexmask.long.word 0x00 16.--31. 1. " H_DATA_COUNT ,Current AS state of the horizontal data counter" hexmask.long.word 0x00 0.--15. 1. " V_DATA_COUNT ,Current AS state of the vertical data counter" rgroup.long 0x290++0x03 line.long 0x00 "DEBUG5,eLCDIF Interface Debug5 Register" tree.end width 15. tree "AS registers" group.long 0x200++0x03 line.long 0x00 "THRES,eLCDIF Threshold Register" hexmask.long.word 0x00 16.--24. 1. " FASTCLOCK ,This value should be set to a value of pixels from 0 to 511" hexmask.long.word 0x00 0.--8. 1. " PANIC ,Panic level" group.long 0x210++0x03 line.long 0x00 "AS_CTRL,eLCDIF AS Buffer Control Register" bitfld.long 0x00 31. " CSI_VSYNC_ENABLE ,LCDIF work as sync mode with CSI input" "Disabled,Enabled" bitfld.long 0x00 30. " CSI_VSYNC_POL ,CSI VSYNC polarity" "Not inverted,Inverted" bitfld.long 0x00 29. " CSI_VSYNC_MODE ,Vsync generate mode" "Internal,External" bitfld.long 0x00 28. " CSI_SYNC_ON_IRQ_EN ,Enables interrupt when LCDIF lock with CSI vsync input" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CSI_SYNC_ON_IRQ ,Vsync generate mode" "Internal,External" bitfld.long 0x00 23. " PS_DISABLE ,LCDIF will disable PS buffer data" "No,Yes" bitfld.long 0x00 21.--22. " INPUT_DATA_SWIZZLE ,How to swap the bytes either in the HW_DATA register or those fetched by the AXI master part of LCDIF" "No swap,Big endian,Half-words,Bytes/Half-word" bitfld.long 0x00 20. " ALPHA_INVERT ,Alpha value inversion" "Unaffected,Inverted" textline " " bitfld.long 0x00 16.--19. " ROP ,Raster operation to perform when enabled" "MASKAS,MASKNOTAS,MASKASNOT,MERGEAS,MERGENOTAS,MERGEASNOT,NOTCOPYAS,NOT,NOTMASKAS,NOTMERGEAS,XORAS,NOTXORAS,,,," hexmask.long.byte 0x00 8.--15. 1. " ALPHA ,Alpha modifier used when the ALPHA_MULTIPLY or ALPHA_OVERRIDE values are programmed in REG_AS_CTRL" bitfld.long 0x00 4.--7. " FORMAT ,Indicates the input buffer format for AS" "ARGB8888,,,,RGB888,,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565," bitfld.long 0x00 3. " ENABLE_COLORKEY ,Colorkey functionality for alpha surface" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--2. " ALPHA_CTRL ,Alpha value construction" "Embedded,Override,Multiply,ROPs" bitfld.long 0x00 0. " AS_ENABLE ,Fetching AS buffer data in bus master mode and combine it with another buffer" "Disabled,Enabled" group.long 0x220++0x03 line.long 0x00 "AS_BUF,Alpha Surface Buffer Pointer" group.long 0x230++0x03 line.long 0x00 "AS_NEXT_BUF,AS_NEXT_BUF" group.long 0x240++0x03 line.long 0x00 "AS_CLRKEYLOW,eLCDIF Overlay Color Key Low" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,Low range of RGB color key applied to AS buffer" group.long 0x250++0x03 line.long 0x00 "AS_CLRKEYHIGH,eLCDIF Overlay Color Key High" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,High range of RGB color key applied to AS buffer" group.long 0x260++0x03 line.long 0x00 "AS_CLRKEYHIGH,eLCDIF Overlay Color Key High" hexmask.long.word 0x00 16.--31. 1. " V_COUNT_DELAY ,LCDIF VSYNC delayed counter for CSI_VSYNC" hexmask.long.word 0x00 0.--15. 1. " H_COUNT_DELAY ,LCDIF VSYNC delayed counter for CSI_VSYNC" tree.end width 0x0b tree.end endif sif (cpu()!="IMX6SOLOLITE") tree "ENET (Ethernet MAC)" base ad:0x02188000 width 13. group.long 0x0004++0x07 line.long 0x00 "ENET_EIR,Interrupt Event Register" eventfld.long 0x00 30. " BABR ,Babbling Receive Error" "Not occurred,Occurred" eventfld.long 0x00 29. " BABT ,Babbling Transmit Error" "Not occurred,Occurred" eventfld.long 0x00 28. " GRA ,Graceful Stop Complete" "No interrupt,Interrupt" textline " " eventfld.long 0x00 27. " TXF ,Transmit Frame Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 26. " TXB ,Transmit Buffer Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " RXF ,Receive Frame Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 24. " RXB ,Receive Buffer Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 23. " MII ,MII Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " EBERR ,Ethernet Bus Error" "Not occurred,Occurred" textline " " eventfld.long 0x00 21. " LC ,Late Collision" "Not occurred,Occurred" eventfld.long 0x00 20. " RL ,Collision Retry Limit" "Not occurred,Occurred" eventfld.long 0x00 19. " UN ,Transmit FIFO underrun" "Not occurred,Occurred" textline " " eventfld.long 0x00 18. " PLR ,Payload receive error" "Not occurred,Occurred" eventfld.long 0x00 17. " WAKEUP ,Node wake-up request indication" "Not detected,Detected" eventfld.long 0x00 16. " TS_AVAIL ,Transmit timestamp available" "Unavailable,Available" textline " " eventfld.long 0x00 15. " TS_TIMER ,Timestamp timer" "No interrupt,Interrupt" line.long 0x04 "ENET_EIMR,Interrupt Mask Register" bitfld.long 0x04 30. " BABR ,BABR interrupt mask" "Masked,Not masked" bitfld.long 0x04 29. " BABT ,BABT interrupt mask" "Masked,Not masked" bitfld.long 0x04 28. " GRA ,GRA interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 27. " TXF ,TXF interrupt mask" "Masked,Not masked" bitfld.long 0x04 26. " TXB ,TXB interrupt mask" "Masked,Not masked" bitfld.long 0x04 25. " RXF ,RXF interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 24. " RXB ,RXB interrupt mask" "Masked,Not masked" bitfld.long 0x04 23. " MII ,MII interrupt mask" "Masked,Not masked" bitfld.long 0x04 22. " EBERR ,EBERR interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " LC ,LC interrupt mask" "Masked,Not masked" bitfld.long 0x04 20. " RL ,RL interrupt mask" "Masked,Not masked" bitfld.long 0x04 19. " UN ,UN interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 18. " PLR ,PLR interrupt mask" "Masked,Not masked" bitfld.long 0x04 17. " WAKEUP ,WAKEUP interrupt mask" "Masked,Not masked" bitfld.long 0x04 16. " TS_AVAIL ,TS_AVAIL interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " TS_TIMER ,TS_TIMER interrupt mask" "Masked,Not masked" group.long 0x0010++0x07 line.long 0x00 "ENET_RDAR,Receive Descriptor Active Register" bitfld.long 0x00 24. " RDAR ,Receive descriptor active" "Not active,Active" line.long 0x04 "ENET_TDAR,Transmit Descriptor Active Register" bitfld.long 0x04 24. " TDAR ,Transmit descriptor active" "Not active,Active" group.long 0x0024++0x03 line.long 0x00 "ENET_ECR,Ethernet Control Register" bitfld.long 0x00 8. " DBSWP ,Descriptor Byte Swapping Enable" "Not swapped,Swapped" bitfld.long 0x00 7. " STOPEN ,STOPEN Signal Control" "Enabled,Disabled" bitfld.long 0x00 6. " DBGEN ,Debug enable" "Continues operation,Freeze mode" textline " " bitfld.long 0x00 5. " SPEED ,Selects between 10/100 and 1000 Mbps modes of operation" "10/100,1000" bitfld.long 0x00 4. " EN1588 ,Enables enhanced functionality of the MAC" "Legacy FEC buffer,Frame time-stamping" bitfld.long 0x00 3. " SLEEP ,Sleep mode enable" "Normal operating,Sleep" textline " " bitfld.long 0x00 2. " MAGICEN ,Enables/disables magic packet detection" "Disabled,Enabled" bitfld.long 0x00 1. " ETHEREN ,Ethernet enable" "Disabled,Enabled" bitfld.long 0x00 0. " RESET ,Ethernet MAC reset" "No effect,Reset" group.long 0x0040++0x07 line.long 0x00 "ENET_MMFR,MII Management Frame Register" bitfld.long 0x00 30.--31. " ST ,Start of frame delimiter" "0,1,2,3" bitfld.long 0x00 28.--29. " OP ,Determines the frame operation" "Write/Not MII compliant,Write,Read,Read/Not MII compliant" bitfld.long 0x00 23.--27. " PA ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 18.--22. " RA ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--17. " TA ,Turn around" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " DATA ,Management frame data" line.long 0x04 "ENET_MSCR,MII Speed Control Register" bitfld.long 0x04 8.--10. " HOLDTIME ,Holdtime on MDIO output" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x04 7. " DIS_PRE ,Disable preamble" "No,Yes" bitfld.long 0x04 1.--6. " MII_SPEED ,Controls the frequency of the MII management interface clock" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x0064++0x03 line.long 0x00 "ENET_MIBC,MIB Control Register" bitfld.long 0x00 31. " MIB_DIS ,Disable MIB logic" "No,Yes" rbitfld.long 0x00 30. " MIB_IDLE ,MIB idle" "No,Yes" bitfld.long 0x00 29. " MIB_CLEAR ,MIB clear" "No effect,Clear" group.long 0x0084++0x03 line.long 0x00 "ENET_RCR,Receive Control Register" rbitfld.long 0x00 31. " GRS ,Graceful receive stopped" "Not stopped,Stopped" bitfld.long 0x00 30. " NLC ,Payload length check disable" "Disabled,Enabled" hexmask.long.word 0x00 16.--29. 1. " MAX_FL ,Maximum frame length" textline " " bitfld.long 0x00 15. " CFEN ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 14. " CRCFWD ,Terminate/forward received CRC" "Transmitted,Stripped" bitfld.long 0x00 13. " PAUFWD ,Terminate/forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 12. " PADEN ,Enable frame padding remove on receive" "Not removed,Removed" bitfld.long 0x00 9. " RMII_10T ,Enables 10-Mbps mode of the RMII or RGMII" "100 Mbps,10 Mbps" bitfld.long 0x00 8. " RMII_MODE ,RMII mode enable" "MII mode,RMII operation" textline " " bitfld.long 0x00 6. " RGMII_EN ,RGMII mode enable" "Non-RGMII,RGMII" bitfld.long 0x00 5. " FCE ,Flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected" textline " " bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled" bitfld.long 0x00 2. " MII_MODE ,Media independent interface mode" ",MII or RMII mode" bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "No,Yes" textline " " bitfld.long 0x00 0. " LOOP ,Internal loopback" "Disabled,Loopback" group.long 0x00C4++0x03 line.long 0x00 "ENET_TCR,Transmit Control Register" bitfld.long 0x00 9. " CRCFWD ,Forward frame from application with CRC" "Controled,Not appended" bitfld.long 0x00 8. " ADDINS ,Set MAC address on transmit" "Not modified,Overwritten" bitfld.long 0x00 5.--7. " ADDSEL ,Source MAC address select on transmit" "PADDR1/2,?..." textline " " rbitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" "Not received,Received" bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "Not transmitted,Transmitted" bitfld.long 0x00 2. " FDEN ,Full duplex enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "No effect,Stopped" group.long 0x00E4++0x0B line.long 0x00 "ENET_PALR,Physical Address Lower Register" line.long 0x04 "ENET_PAUR,Physical Address Upper Register" hexmask.long.word 0x04 16.--31. 1. " PADDR2 ,Pause address" hexmask.long.word 0x04 0.--15. 1. " TYPE ,Type field in PAUSE frames" line.long 0x08 "ENET_OPD,Opcode/Pause Duration Register" hexmask.long.word 0x08 16.--31. 1. " OPCODE ,Opcode field in PAUSE frames" hexmask.long.word 0x08 0.--15. 1. " PAUSE_DUR ,Pause duration" group.long 0x0118++0x0F line.long 0x00 "ENET_IAUR,Descriptor Individual Upper Address Register" line.long 0x04 "ENET_IALR,Descriptor Individual Lower Address Register" line.long 0x08 "ENET_GAUR,Descriptor Group Upper Address Register" line.long 0x0C "ENET_GALR,Descriptor Group Lower Address Register" group.long 0x0144++0x03 line.long 0x00 "ENET_TFWR,Transmit FIFO Watermark Register" bitfld.long 0x00 8. " STRFWD ,Store and forward enable" "Disabled,Enabled" bitfld.long 0x00 0.--5. " TFWR ,Indicates the number of bytes written to the transmit FIFO" "64,64,128,192,256,320,384,448,512,576,640,704,768,832,896,960,1024,1088,1152,1216,1280,1344,1408,1472,1536,1600,1664,1728,1792,1856,1920,1984,2048,2112,2176,2240,2304,2368,2432,2496,2560,2624,2688,2752,2816,2880,2944,3008,3072,3136,3200,3264,3328,3392,3456,3520,3584,3648,3712,3776,3840,3904,3968,4032" group.long 0x0180++0x0B line.long 0x00 "ENET_RDSR,Receive Descriptor Ring Start Register" hexmask.long 0x00 3.--31. 1. " R_DES_START ,Pointer to the start of the receive buffer descriptor queue" line.long 0x04 "ENET_TDSR,Transmit Buffer Descriptor Ring Start Register" hexmask.long 0x04 3.--31. 1. " X_DES_START ,Pointer to the start of the transmit buffer descriptor queue" line.long 0x08 "ENET_MRBR,Maximum Receive Buffer Size Register" hexmask.long.word 0x08 4.--13. 1. " R_BUF_SIZE ,Receive buffer size in bytes" group.long 0x0190++0x23 line.long 0x00 "ENET_RSFL,Receive FIFO Section Full Threshold" hexmask.long.word 0x00 0.--8. 1. " RX_SECTION_FULL ,Value of receive FIFO section full threshold" line.long 0x04 "ENET_RSEM,Receive FIFO Section Empty Threshold" hexmask.long.word 0x04 0.--8. 1. " RX_SECTION_EMPTY ,Value of the receive FIFO section empty threshold" line.long 0x08 "ENET_RAEM,Receive FIFO Almost Empty Threshold" hexmask.long.word 0x08 0.--8. 1. " RX_ALMOST_EMPTY ,Value of the receive FIFO almost empty threshold" line.long 0x0C "ENET_RAFL,Receive FIFO Almost Full Threshold" hexmask.long.word 0x0C 0.--8. 1. " RX_ALMOST_FULL ,Value of the receive FIFO almost full threshold" line.long 0x10 "ENET_TSEM,Transmit FIFO Section Empty Threshold" hexmask.long.word 0x10 0.--8. 1. " TX_SECTION_EMPTY ,Value of the transmit FIFO section empty threshold" line.long 0x14 "ENET_TAEM,Transmit FIFO Almost Empty Threshold" hexmask.long.word 0x14 0.--8. 1. " TX_ALMOST_EMPTY ,Value of transmit FIFO almost empty threshold" line.long 0x18 "ENET_TAFL,Transmit FIFO Almost Full Threshold" hexmask.long.word 0x18 0.--8. 1. " TX_ALMOST_FULL ,Value of the transmit FIFO almost full threshold" line.long 0x1C "ENET_TIPG,Transmit Inter-Packet Gap" bitfld.long 0x1C 0.--4. " IPG ,Transmit inter-packet gap" "8,8,8,8,8,8,8,8,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,27,27,27,27" line.long 0x20 "ENET_FTRL,Frame Truncation Length" hexmask.long.word 0x20 0.--13. 1. " TRUNC_FL ,Frame truncation length" group.long 0x01C0++0x07 line.long 0x00 "ENET_TACC,Transmit Accelerator Function Configuration" bitfld.long 0x00 4. " PROCHK ,Enables insertion of protocol checksum" "Disabled,Enabled" bitfld.long 0x00 3. " IPCHK ,Enables insertion of IP header checksum" "Disabled,Enabled" bitfld.long 0x00 0. " SHIFT16 ,TX FIFO shift-16" "Disabled,Enabled" line.long 0x04 "ENET_RACC,Receive Accelerator Function Configuration" bitfld.long 0x04 7. " SHIFT16 ,RX FIFO shift-16" "Disabled,Enabled" bitfld.long 0x04 6. " LINEDIS ,Enable discard of frames with MAC layer errors" "Disabled,Enabled" bitfld.long 0x04 2. " PRODIS ,Enable discard of frames with wrong protocol checksum" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " IPDIS ,Enable discard of frames with wrong IPv4 header checksum" "Disabled,Enabled" bitfld.long 0x04 0. " PADREM ,Enable padding removal for short IP frames" "Not removed,Removed" if (((per.l(ad:0x02188000+0x0400))&0x2000)==0x2000) group.long 0x0400++0x03 line.long 0x00 "ENET_ATCR,Timer Control Register" bitfld.long 0x00 13. " SLAVE ,Enable timer slave mode" "Disabled,Enabled" bitfld.long 0x00 11. " CAPTURE ,Capture timer value" "No effect,Captured" else group.long 0x0400++0x03 line.long 0x00 "ENET_ATCR,Timer Control Register" bitfld.long 0x00 13. " SLAVE ,Enable timer slave mode" "Disabled,Enabled" bitfld.long 0x00 11. " CAPTURE ,Capture timer value" "No effect,Captured" bitfld.long 0x00 9. " RESTART ,Reset timer" "No effect,Reset" textline " " bitfld.long 0x00 7. " PINPER ,Enables event signal output assertion on period event" "Disabled,Enabled" bitfld.long 0x00 4. " PEREN ,Enable periodical event" "Disabled,Enabled" bitfld.long 0x00 3. " OFFRST ,Reset timer on offset event" "No effect,Reset" textline " " bitfld.long 0x00 2. " OFFEN ,Enable one-shot offset event" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable timer" "Disabled,Enabled" endif group.long 0x0404++0x13 line.long 0x00 "ENET_ATVR,Timer Value Register" line.long 0x04 "ENET_ATOFF,Timer Offset Register" line.long 0x08 "ENET_ATPER,Timer Period Register" line.long 0x0C "ENET_ATCOR,Timer Correction Register" hexmask.long 0x0C 0.--30. 1. " COR ,Correction counter wrap-around value" line.long 0x10 "ENET_ATINC,Time-Stamping Clock Period Register" hexmask.long.byte 0x10 8.--14. 1. " INC_CORR ,Correction increment value" hexmask.long.byte 0x10 0.--6. 1. " INC ,Clock period of the timestamping clock in nanoseconds" rgroup.long 0x0418++0x03 line.long 0x00 "ENET_ATSTMP,Timestamp of Last Transmitted Frame" group.long 0x0604++0x03 line.long 0x00 "ENET_TGSR,Timer Global Status Register" eventfld.long 0x00 3. " TF3 ,Copy of Timer Flag for channel 3" "Clear,Set" eventfld.long 0x00 2. " TF2 ,Copy of Timer Flag for channel 2" "Clear,Set" eventfld.long 0x00 1. " TF1 ,Copy of Timer Flag for channel 1" "Clear,Set" textline " " eventfld.long 0x00 0. " TF0 ,Copy of Timer Flag for channel 0" "Clear,Set" group.long 0x608++0x07 line.long 0x00 "ENET_TCSR0,Timer Control Status Register 0" eventfld.long 0x00 7. " TF ,Timer Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2.--5. " TMODE ,Timer Mode" "Disabled,Rising edge,Falling edge,Both,Software only,Toggle,Clear,Set,,Set/Clear,Clear/Set,Set/Clear,,,Low pulse,High pulse" textline " " bitfld.long 0x00 0. " TDRE ,Timer DMA Request Enable" "Disabled,Enabled" line.long 0x04 "ENET_TCCR0,Timer Compare Capture Register 0" group.long 0x610++0x07 line.long 0x00 "ENET_TCSR1,Timer Control Status Register 1" eventfld.long 0x00 7. " TF ,Timer Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2.--5. " TMODE ,Timer Mode" "Disabled,Rising edge,Falling edge,Both,Software only,Toggle,Clear,Set,,Set/Clear,Clear/Set,Set/Clear,,,Low pulse,High pulse" textline " " bitfld.long 0x00 0. " TDRE ,Timer DMA Request Enable" "Disabled,Enabled" line.long 0x04 "ENET_TCCR1,Timer Compare Capture Register 1" group.long 0x618++0x07 line.long 0x00 "ENET_TCSR2,Timer Control Status Register 2" eventfld.long 0x00 7. " TF ,Timer Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2.--5. " TMODE ,Timer Mode" "Disabled,Rising edge,Falling edge,Both,Software only,Toggle,Clear,Set,,Set/Clear,Clear/Set,Set/Clear,,,Low pulse,High pulse" textline " " bitfld.long 0x00 0. " TDRE ,Timer DMA Request Enable" "Disabled,Enabled" line.long 0x04 "ENET_TCCR2,Timer Compare Capture Register 2" group.long 0x620++0x07 line.long 0x00 "ENET_TCSR3,Timer Control Status Register 3" eventfld.long 0x00 7. " TF ,Timer Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2.--5. " TMODE ,Timer Mode" "Disabled,Rising edge,Falling edge,Both,Software only,Toggle,Clear,Set,,Set/Clear,Clear/Set,Set/Clear,,,Low pulse,High pulse" textline " " bitfld.long 0x00 0. " TDRE ,Timer DMA Request Enable" "Disabled,Enabled" line.long 0x04 "ENET_TCCR3,Timer Compare Capture Register 3" tree "Statistic Event Counters" width 20. group.long 0x200++0x7B line.long 0x00 "RMON_T_DROP,Count of frames not counted correctly" hexmask.long.word 0x00 0.--15. 1. " RMON_T_DROP ,RMON_T_DROP" group.long 0x204++0x43 line.long 0x00 "RMON_T_PACKETS,RMON Tx Packet Count Register" hexmask.long.word 0x00 0.--15. 1. " RMON_T_PACKETS ,RMON Tx Packet Count" line.long 0x04 "RMON_T_BC_PKT,RMON Tx Broadcast Packets Register" hexmask.long.word 0x04 0.--15. 1. " RMON_T_BC_PKT ,RMON Tx Broadcast Packets" line.long 0x08 "RMON_T_MC_PKT,RMON Tx Multicast Packets Register" hexmask.long.word 0x08 0.--15. 1. " RMON_T_MC_PKT ,RMON Tx Multicast Packets" line.long 0x0C "RMON_T_CRC_ALIGN,RMON Tx Packets CRC/Align Error Register" hexmask.long.word 0x0C 0.--15. 1. " RMON_T_CRC_ALIGN ,RMON Tx Packets CRC/Align Error" line.long 0x10 "RMON_T_UNDERSIZE,RMON Tx Packets 64 bytes Good CRC Register" hexmask.long.word 0x10 0.--15. 1. " RMON_T_UNDERSIZE ,RMON Tx Packets 64 bytes Good CRC" line.long 0x14 "RMON_T_OVERSIZE,Good CRC Register" hexmask.long.word 0x14 0.--15. 1. " RMON_T_OVERSIZE ,Good CRC" line.long 0x18 "RMON_T_FRAG,Bad CRC Register" hexmask.long.word 0x18 0.--15. 1. " RMON_T_FRAG ,Bad CRC" line.long 0x1C "RMON_T_JAB,Bad CRC Register" hexmask.long.word 0x1C 0.--15. 1. " RMON_T_JAB ,Bad CRC" line.long 0x20 "RMON_T_COL,RMON Tx Collision Count Register" hexmask.long.word 0x20 0.--15. 1. " RMON_T_COL ,RMON Tx Collision Count" line.long 0x24 "RMON_T_P64,RMON Tx 64 Byte Packets Register" hexmask.long.word 0x24 0.--15. 1. " RMON_T_P64 ,RMON Tx 64 Byte Packets" line.long 0x28 "RMON_T_P65TO127n,RMON Tx 65 to 127 Byte Packets Register" hexmask.long.word 0x28 0.--15. 1. " RMON_T_P65TO127n ,RMON Tx 65 to 127 Byte Packets" line.long 0x2C "RMON_T_P128TO255n,RMON Tx 128 to 255 Byte Packets Register" hexmask.long.word 0x2C 0.--15. 1. " RMON_T_P128TO255n ,RMON Tx 128 to 255 Byte Packets" line.long 0x30 "RMON_T_P256TO511,RMON Tx 256 to 511 Byte Packets Register" hexmask.long.word 0x30 0.--15. 1. " RMON_T_P256TO511 ,RMON Tx 256 to 511 Byte Packets" line.long 0x34 "RMON_T_P512TO1023,RMON Tx 512 to 1023 Byte Packets Register" hexmask.long.word 0x34 0.--15. 1. " RMON_T_P512TO1023 ,RMON Tx 512 to 1023 Byte Packets" line.long 0x38 "RMON_T_P1024TO2047,RMON Tx 1024 to 2047 Byte Packets Register" hexmask.long.word 0x38 0.--15. 1. " RMON_T_P1024TO2047 ,RMON Tx 1024 to 2047 Byte Packets" line.long 0x3C "RMON_T_P_GTE2048,RMON Tx Packets 2048 Bytes Register" hexmask.long.word 0x3C 0.--15. 1. " RMON_T_P_GTE2048 ,RMON Tx Packets 2048 Bytes" line.long 0x40 "RMON_T_OCTETS,RMON Tx Octets Register" group.long 0x24C++0x2B line.long 0x00 "IEEE_T_FRAME_OK,Frames Transmitted OK Register" hexmask.long.word 0x00 0.--15. 1. " IEEE_T_FRAME_OK ,Frames Transmitted OK" line.long 0x04 "IEEE_T_1COL,Frames Transmitted with Single Collision Register" hexmask.long.word 0x04 0.--15. 1. " IEEE_T_1COL ,Frames Transmitted with Single Collision" line.long 0x08 "IEEE_T_MCOL,Frames Transmitted with Multiple Collisions Register" hexmask.long.word 0x08 0.--15. 1. " IEEE_T_MCOL ,Frames Transmitted with Multiple Collisions" line.long 0x0C "IEEE_T_DEF,Frames Transmitted after Deferral Delay Register" hexmask.long.word 0x0C 0.--15. 1. " IEEE_T_DEF ,Frames Transmitted after Deferral Delay" line.long 0x10 "IEEE_T_LCOL,Frames Transmitted with Late Collision Register" hexmask.long.word 0x10 0.--15. 1. " IEEE_T_LCOL ,Frames Transmitted with Late Collision" line.long 0x14 "IEEE_T_EX-COL,Frames Transmitted with Excessive Collisions Register" hexmask.long.word 0x14 0.--15. 1. " IEEE_T_EX-COL ,Frames Transmitted with Excessive Collisions" line.long 0x18 "IEEE_T_MAC-ERR,Frames Transmitted with Tx FIFO Underrun Register" hexmask.long.word 0x18 0.--15. 1. " IEEE_T_MAC-ERR ,Frames Transmitted with Tx FIFO Underrun" line.long 0x1C "IEEE_T_CSERR,Frames Transmitted with Carrier Sense Error Register" hexmask.long.word 0x1C 0.--15. 1. " IEEE_T_CSERR ,Frames Transmitted with Carrier Sense Error" line.long 0x20 "IEEE_T_SQE,Frames Transmitted with SQE Error Register" hexmask.long.word 0x20 0.--15. 1. " IEEE_T_SQE ,Frames Transmitted with SQE Error" line.long 0x24 "IEEE_T_FDXFC,Flow Control Pause Frames Transmitted Register" hexmask.long.word 0x24 0.--15. 1. " IEEE_T_FDXFC ,Flow Control Pause Frames Transmitted" line.long 0x28 "IEEE_T_OCTETS_OK,Octet Count for Frames Transmitted Error Register" rgroup.long 0x284++0x1F line.long 0x00 "RMON_R_PACKETS,RMON Rx Packet Count Register" hexmask.long.word 0x00 0.--15. 1. " RMON_R_PACKETS ,RMON Rx Packet Count" line.long 0x04 "RMON_R_BC_PKT,RMON Rx Broadcast Packets Register" hexmask.long.word 0x04 0.--15. 1. " RMON_R_BC_PKT ,RMON Rx Broadcast Packets" line.long 0x08 "RMON_R_MC_PKT,RMON Rx Multicast Packets Register" hexmask.long.word 0x08 0.--15. 1. " RMON_R_MC_PKT ,RMON Rx Multicast Packets" line.long 0x0c "RMON_R_CRC_ALIGN,RMON Rx Packets CRC/Align Error Register" hexmask.long.word 0x0c 0.--15. 1. " RMON_R_CRC_ALIGN ,RMON Rx Packets CRC/Align Error" line.long 0x10 "RMON_R_UNDERSIZE,Good CRC Register" hexmask.long.word 0x10 0.--15. 1. " RMON_R_UNDERSIZE ,Number of receive packets with less than 64 bytes and good CRC" line.long 0x14 "RMON_R_OVERSIZE,Good CRC Register" hexmask.long.word 0x14 0.--15. 1. " RMON_R_OVERSIZE ,Number of receive packets greater than MAX_FL and good CRC" line.long 0x18 "RMON_R_FRAG,Bad CRC Register" hexmask.long.word 0x18 0.--15. 1. " RMON_R_FRAG ,Number of receive packets with less than 64 bytes and bad CRC" line.long 0x1c "RMON_R_JAB,Bad CRC Register" hexmask.long.word 0x1c 0.--15. 1. " RMON_R_JAB ,Number of receive packets greater than MAX_FL and bad CRC" rgroup.long 0x2A8++0x3B line.long 0x00 "RMON_R_P64,RMON Rx 64 Byte Packets Register" hexmask.long.word 0x00 0.--15. 1. " RMON_R_P64 ,RMON Rx 64 Byte Packets" line.long 0x04 "RMON_R_P65TO127,RMON Rx 65 to 127 Byte Packets Register" hexmask.long.word 0x04 0.--15. 1. " RMON_R_P65TO127 ,RMON Rx 65 to 127 Byte Packets" line.long 0x08 "RMON_R_P128TO255,RMON Rx 128 to 255 Byte Packets Register" hexmask.long.word 0x08 0.--15. 1. " RMON_R_P128TO255 ,RMON Rx 128 to 255 Byte Packets" line.long 0x0c "RMON_R_P256TO511,RMON Rx 256 to 511 Byte Packets Register" hexmask.long.word 0x0c 0.--15. 1. " RMON_R_P256TO511 ,RMON Rx 256 to 511 Byte Packets" line.long 0x10 "RMON_R_P512TO1023,RMON Rx 512 to 1023 Byte Packets Register" hexmask.long.word 0x10 0.--15. 1. " RMON_R_P512TO1023 ,RMON Rx 512 to 1023 Byte Packets" line.long 0x14 "RMON_R_P1024TO2047,RMON Rx 1024 to 2047 Byte Backets Register" hexmask.long.word 0x14 0.--15. 1. " RMON_R_P1024TO2047 ,RMON Rx 1024 to 2047 Byte Backets" line.long 0x18 "RMON_R_P_GTE2048,RMON Rx Packets 2048 Bytes Register" hexmask.long.word 0x18 0.--15. 1. " RMON_R_P_GTE2048 ,RMON Rx Packets 2048 Bytes" line.long 0x1C "RMON_R_OCTETS,RMON Rx Octets Register" line.long 0x20 "IEEE_R_DROP,Count of Frames Not Counted Correctly Register" hexmask.long.word 0x20 0.--15. 1. " IEEE_R_DROP ,Count of Frames Not Counted Correctly" line.long 0x24 "IEEE_R_FRAME_OK,Frames Received OK Register" hexmask.long.word 0x24 0.--15. 1. " IEEE_R_FRAME_OK ,Frames Received OK" line.long 0x28 "IEEE_R_CRC,Frames Received with CRC Error Register" hexmask.long.word 0x28 0.--15. 1. " IEEE_R_CRC ,Frames Received with CRC Error" line.long 0x2c "IEEE_R_ALIGN,Frames Received with Alignment Error Register" hexmask.long.word 0x2c 0.--15. 1. " IEEE_R_ALIGN ,Frames Received with Alignment Error" line.long 0x30 "IEEE_R_MACERR,Receive Fifo Overflow Count Register" hexmask.long.word 0x30 0.--15. 1. " IEEE_R_MACERR ,Receive Fifo Overflow Count" line.long 0x34 "IEEE_R_FDXFC,Flow Control Pause Frames Received Register" hexmask.long.word 0x34 0.--15. 1. " IEEE_R_FDXFC ,Flow Control Pause Frames Received" line.long 0x38 "IEEE_R_OCTETS_OK,Octet Count for Frames Rcvd Error Register" tree.end width 0x0B tree.end endif sif (cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") tree "EPDC (Electrophoretic Display Controller)" base ad:0x020F4000 width 18. group.long 0x00++0x0F line.long 0x00 "CTRL,EPDC Control Register" bitfld.long 0x00 31. " SFTRST ,Normal EPDC operation" "Enabled,Disabled" bitfld.long 0x00 30. " CLKGATE ,Gates off the clocks to the block" "Not gated,Gated" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 8. " SRAM_PD ,Power-down of embedded SRAM memories" "Disabled,Enabled" endif textline " " bitfld.long 0x00 6.--7. " UPD_DATA_SWIZZLE ,Mode of swap the bytes for the UPD data before the WB construction" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x00 4.--5. " LUT_DATA_SWIZZLE ,Mode of swap the bytes for the LUT data before store to LUTRAM" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x00 0. " BURST_LEN_8 ,Length of bursts" "16,8" line.long 0x04 "CTRL_SET,EPDC Control Set Register" bitfld.long 0x04 31. " SFTRST ,Normal EPDC operation" "No effect,Set" bitfld.long 0x04 30. " CLKGATE ,Gates off the clocks to the block" "No effect,Set" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x04 8. " SRAM_PD ,Power-down of embedded SRAM memories" "Disabled,Enabled" endif textline " " bitfld.long 0x04 6.--7. " UPD_DATA_SWIZZLE ,Mode of swap of the bytes for the UPD data before the WB construction" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x04 4.--5. " LUT_DATA_SWIZZLE ,Mode of swap of the bytes for the LUT data before store to LUTRAM" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x04 0. " BURST_LEN_8 ,Length of bursts" "No effect,Set" line.long 0x08 "CTRL_CLR,EPDC Control Clear Register" bitfld.long 0x08 31. " SFTRST ,Normal EPDC operation" "No effect,Clear" bitfld.long 0x08 30. " CLKGATE ,Gates off the clocks to the block" "No effect,Clear" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x08 8. " SRAM_PD ,Power-down of embedded SRAM memories" "Disabled,Enabled" endif textline " " bitfld.long 0x08 6.--7. " UPD_DATA_SWIZZLE ,Mode of swap the bytes for the UPD data before the WB construction" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x08 4.--5. " LUT_DATA_SWIZZLE ,Mode of swap the bytes for the LUT data before store to LUTRAM" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x08 0. " BURST_LEN_8 ,Length of bursts" "No effect,Clear" line.long 0x0C "CTRL_TOG,EPDC Control Toggle Register" bitfld.long 0x0C 31. " SFTRST ,Normal EPDC operation" "Not toggled,Toggled" bitfld.long 0x0C 30. " CLKGATE ,Gates off the clocks to the block" "Not toggled,Toggled" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x0C 8. " SRAM_PD ,Power-down of embedded SRAM memories" "Disabled,Enabled" endif textline " " bitfld.long 0x0C 6.--7. " UPD_DATA_SWIZZLE ,Mode of swap the bytes for the UPD data before the WB construction" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x0C 4.--5. " LUT_DATA_SWIZZLE ,Mode of swap the bytes for the LUT data before store to LUTRAM" "Not swapped,All bytes swapped,Half-word swapped,Bytes within each half-word swapped" bitfld.long 0x0C 0. " BURST_LEN_8 ,Length of bursts" "Not toggled,Toggled" textline " " group.long 0x20++0x03 line.long 0x00 "WVADDR,EPDC Waveform Address Pointer" group.long 0x30++0x03 line.long 0x00 "WB_ADDR,EPDC Working Buffer Address" group.long 0x40++0x03 line.long 0x00 "RES,EPDC Screen Resolution" hexmask.long.word 0x00 16.--28. 1. " VERTICAL ,Vertical Resoltion (in pixels)" hexmask.long.word 0x00 0.--12. 1. " HORIZONTAL ,Horizontal Resolution (in pixels)" group.long 0x50++0x0F line.long 0x00 "FORMAT,EPDC Format Control Register" bitfld.long 0x00 24. " BUF_PIX_SCALE ,Method of conversion from 8-bit input" "Truncate,Rounding" hexmask.long.byte 0x00 16.--23. 1. " DEFAULT_TFT_PIX ,Default TFT pixel value" bitfld.long 0x00 8.--10. " BUF_PIX_FOR ,EPDC Input Buffer Pixel format" ",,2-bit,3-bit,4-bit,5-bit,?..." bitfld.long 0x00 0.--1. " TFT_PIX_FOR ,EPDC TFT Pixel Format" "2-bit,2-bit & VCOM,4-bit,4-bit & VCOM" line.long 0x04 "FORMAT_SET,EPDC Format Control Set Register" bitfld.long 0x04 24. " BUF_PIX_SCALE ,Method of conversion from 8-bit input" "No effect,Set" hexmask.long.byte 0x04 16.--23. 1. " DEFAULT_TFT_PIX ,Default TFT pixel value" bitfld.long 0x04 8.--10. " BUF_PIX_FOR ,EPDC Input Buffer Pixel format" ",,2-bit,3-bit,4-bit,5-bit,?..." bitfld.long 0x04 0.--1. " TFT_PIX_FOR ,EPDC TFT Pixel Format" "2-bit,2-bit & VCOM,4-bit,4-bit & VCOM" line.long 0x08 "FORMAT_CLR,EPDC Format Control Clear Register" bitfld.long 0x08 24. " BUF_PIX_SCALE ,Method of conversion from 8-bit input" "No effect,Clear" hexmask.long.byte 0x08 16.--23. 1. " DEFAULT_TFT_PIX ,Default TFT pixel value" bitfld.long 0x08 8.--10. " BUF_PIX_FOR ,EPDC Input Buffer Pixel format" ",,2-bit,3-bit,4-bit,5-bit,?..." bitfld.long 0x08 0.--1. " TFT_PIX_FOR ,EPDC TFT Pixel Format" "2-bit,2-bit & VCOM,4-bit,4-bit & VCOM" line.long 0x0C "FORMAT_TOG,EPDC Format Control Toggle Register" bitfld.long 0x0C 24. " BUF_PIX_SCALE ,Method of conversion from 8-bit input" "Not toggled,Toggled" hexmask.long.byte 0x0C 16.--23. 1. " DEFAULT_TFT_PIX ,Default TFT pixel value" bitfld.long 0x0C 8.--10. " BUF_PIX_FOR ,EPDC Input Buffer Pixel format" ",,2-bit,3-bit,4-bit,5-bit,?..." bitfld.long 0x0C 0.--1. " TFT_PIX_FOR ,EPDC TFT Pixel Format" "2-bit,2-bit & VCOM,4-bit,4-bit & VCOM" group.long 0xA0++0x0F line.long 0x00 "FIFOCTRL,EPDC FIFO control register" bitfld.long 0x00 31. " EN_PRIOR ,Watermark-based priority elevation mechanism" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIFO_INIT_LEV ,Watermark for the pixel-fifo" hexmask.long.byte 0x00 8.--15. 1. " FIFO_H_LEV ,Upper level value of FIFO watermark" hexmask.long.byte 0x00 0.--7. 1. " FIFO_L_LEV ,Lower level value of FIFO watermark" line.long 0x04 "FIFOCTRL_SET,EPDC FIFO control set register" bitfld.long 0x04 31. " EN_PRIOR ,Watermark-based priority elevation mechanism" "No effect,Set" hexmask.long.byte 0x04 16.--23. 1. " FIFO_INIT_LEV ,Watermark for the pixel-fifo" hexmask.long.byte 0x04 8.--15. 1. " FIFO_H_LEV ,Upper level value of FIFO watermark" hexmask.long.byte 0x04 0.--7. 1. " FIFO_L_LEV ,Lower level value of FIFO watermark" line.long 0x08 "FIFOCTRL_CLR,EPDC FIFO control clear register" bitfld.long 0x08 31. " EN_PRIOR ,Watermark-based priority elevation mechanism" "No effect,Clear" hexmask.long.byte 0x08 16.--23. 1. " FIFO_INIT_LEV ,Watermark for the pixel-fifo" hexmask.long.byte 0x08 8.--15. 1. " FIFO_H_LEV ,Upper level value of FIFO watermark" hexmask.long.byte 0x08 0.--7. 1. " FIFO_L_LEV ,Lower level value of FIFO watermark" line.long 0x0C "FIFOCTRL_TOG,EPDC FIFO control toggle register" bitfld.long 0x0C 31. " EN_PRIOR ,Watermark-based priority elevation mechanism" "Not toggled,Toggled" hexmask.long.byte 0x0C 16.--23. 1. " FIFO_INIT_LEV ,Watermark for the pixel-fifo" hexmask.long.byte 0x0C 8.--15. 1. " FIFO_H_LEV ,Upper level value of FIFO watermark" hexmask.long.byte 0x0C 0.--7. 1. " FIFO_L_LEV ,Lower level value of FIFO watermark" group.long 0x100++0x03 line.long 0x00 "UPD_ADDR,EPDC Update Region Address" group.long 0x110++0x03 line.long 0x00 "UPD_STRIDE,EPDC Update Region Stride" group.long 0x120++0x03 line.long 0x00 "UPD_CORD,EPDC Update Command Co-ordinate" hexmask.long.word 0x00 16.--28. 1. " YCORD ,Y co-ordinate for incoming region update" hexmask.long.word 0x00 0.--12. 1. " XCORD ,X co-ordinate for incoming region update" group.long 0x140++0x03 line.long 0x00 "UPD_SIZE,EPDC Update Command Size" hexmask.long.word 0x00 16.--28. 1. " HEIGHT ,Height (in pixels)" hexmask.long.word 0x00 0.--12. 1. " WIDTH ,Width (in pixels)" group.long 0x160++0x0F line.long 0x00 "UPD_CTRL,EPDC Update Command Control" bitfld.long 0x00 31. " USE_FIXED ,Use fixed pixel values" "Not used,Used" bitfld.long 0x00 16.--21. " LUT_SEL ,LUT select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 8.--15. 1. " WAVEFORM_MODE ,Waveform Mode" bitfld.long 0x00 3. " AUTOWV_PAUSE ,Automatical waveform mode selection" "AUTO,MANUAL" textline " " bitfld.long 0x00 2. " AUTOWV ,Enable automatical waveform mode selection" "Disabled,Enabled" bitfld.long 0x00 1. " DRY_RUN ,Enable Dry Run mode" "Disabled,Enabled" bitfld.long 0x00 0. " UPDATE_MODE ,Update Mode" "Partial,Full" line.long 0x04 "UPD_CTRL_SET,EPDC Update Command Control Set" bitfld.long 0x04 31. " USE_FIXED ,Use fixed pixel values" "No effect,Set" bitfld.long 0x04 16.--21. " LUT_SEL ,LUT select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x04 8.--15. 1. " WAVEFORM_MODE ,Waveform Mode" bitfld.long 0x04 3. " AUTOWV_PAUSE ,Automatical waveform mode selection" "No effect,Set" textline " " bitfld.long 0x04 2. " AUTOWV ,Enable automatical waveform mode selection" "No effect,Set" bitfld.long 0x04 1. " DRY_RUN ,Enable Dry Run mode" "No effect,Set" bitfld.long 0x04 0. " UPDATE_MODE ,Update Mode" "No effect,Set" line.long 0x08 "UPD_CTRL_CLR,EPDC Update Command Control Clear" bitfld.long 0x08 31. " USE_FIXED ,Use fixed pixel values" "No effect,Clear" bitfld.long 0x08 16.--21. " LUT_SEL ,LUT select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 8.--15. 1. " WAVEFORM_MODE ,Waveform Mode" textline " " bitfld.long 0x08 3. " AUTOWV_PAUSE ,Automatical waveform mode selection" "No effect,Clear" bitfld.long 0x08 2. " AUTOWV ,Enable automatical waveform mode selection" "No effect,Clear" bitfld.long 0x08 1. " DRY_RUN ,Enable Dry Run mode" "No effect,Clear" textline " " bitfld.long 0x08 0. " UPDATE_MODE ,Update Mode" "No effect,Clear" line.long 0x0C "UPD_CTRL,EPDC Update Command Control Toggle" bitfld.long 0x0C 31. " USE_FIXED ,Use fixed pixel values" "Not toggled,Toggled" bitfld.long 0x0C 16.--21. " LUT_SEL ,LUT select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x0C 8.--15. 1. " WAVEFORM_MODE ,Waveform Mode" bitfld.long 0x0C 3. " AUTOWV_PAUSE ,Automatical waveform mode selection" "Not toggled,Toggled" textline " " bitfld.long 0x0C 2. " AUTOWV ,Enable automatical waveform mode selection" "Not toggled,Toggled" bitfld.long 0x0C 1. " DRY_RUN ,Enable Dry Run mode" "Not toggled,Toggled" bitfld.long 0x0C 0. " UPDATE_MODE ,Update Mode" "Not toggled,Toggled" group.long 0x180++0x0F line.long 0x00 "UPD_FIXED,EPDC Update Fixed Pixel Control" bitfld.long 0x00 31. " FIXNP_EN ,Update region with NP value in FIXNP" "Not updated,Updated" bitfld.long 0x00 30. " FIXCP_EN ,Update region with CP value in FIXCP" "Not updated,Updated" hexmask.long.byte 0x00 8.--15. 1. " FIXNP ,NP value" hexmask.long.byte 0x00 0.--7. 1. " FIXCP ,CP value" line.long 0x04 "UPD_FIXED_SET,EPDC Update Fixed Pixel Control Set" bitfld.long 0x04 31. " FIXNP_EN ,Update region with NP value in FIXNP" "No effect,Set" bitfld.long 0x04 30. " FIXCP_EN ,Update region with CP value in FIXCP" "No effect,Set" hexmask.long.byte 0x04 8.--15. 1. " FIXNP ,NP value" hexmask.long.byte 0x04 0.--7. 1. " FIXCP ,CP value" line.long 0x08 "UPD_FIXED_CLR,EPDC Update Fixed Pixel Control Clear" bitfld.long 0x08 31. " FIXNP_EN ,Update region with NP value in FIXNP" "No effect,Clear" bitfld.long 0x08 30. " FIXCP_EN ,Update region with CP value in FIXCP" "No effect,Clear" hexmask.long.byte 0x08 8.--15. 1. " FIXNP ,NP value" hexmask.long.byte 0x08 0.--7. 1. " FIXCP ,CP value" line.long 0x0C "UPD_FIXED_TOG,EPDC Update Fixed Pixel Control Toggle" bitfld.long 0x0C 31. " FIXNP_EN ,Update region with NP value in FIXNP" "Not toggled,Toggled" bitfld.long 0x0C 30. " FIXCP_EN ,Update region with CP value in FIXCP" "Not toggled,Toggled" hexmask.long.byte 0x0C 8.--15. 1. " FIXNP ,NP value" hexmask.long.byte 0x0C 0.--7. 1. " FIXCP ,CP value" group.long 0x1A0++0x03 line.long 0x00 "TEMP,EPDC Temperature Register" group.long 0x1C0++0x03 line.long 0x00 "AUTOWV_LUT,Waveform Mode Lookup Table Control Register" hexmask.long.byte 0x00 16.--23. 1. " DATA ,DATA" hexmask.long.byte 0x00 0.--7. 1. " ADDR ,ADDR" if (((per.l(ad:0x020F4000+0x200))&0x44)==0x44) group.long 0x200++0x0F line.long 0x00 "TCE_CTRL,EPDC Timing Control Engine Control Register" hexmask.long.word 0x00 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x00 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x00 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Manual,Auto" bitfld.long 0x00 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "Not drove,Drove" textline " " bitfld.long 0x00 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "Not drove,Drove" bitfld.long 0x00 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not used,Used" bitfld.long 0x00 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Up,Down" textline " " bitfld.long 0x00 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not applied,Applied" bitfld.long 0x00 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "8-bit,16-bit" bitfld.long 0x00 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x04 "TCE_CTRL_SET,EPDC Timing Control Engine Control Set Register" hexmask.long.word 0x04 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x04 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x04 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Set" bitfld.long 0x04 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "No effect,Set" textline " " bitfld.long 0x04 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "No effect,Set" bitfld.long 0x04 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Set" bitfld.long 0x04 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Set" bitfld.long 0x04 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Set" textline " " bitfld.long 0x04 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Set" bitfld.long 0x04 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Set" bitfld.long 0x04 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x08 "TCE_CTRL_CLR,EPDC Timing Control Engine Control Clear Register" hexmask.long.word 0x08 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x08 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x08 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Clear" bitfld.long 0x08 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "No effect,Clear" textline " " bitfld.long 0x08 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "No effect,Clear" bitfld.long 0x08 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Clear" bitfld.long 0x08 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Clear" bitfld.long 0x08 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Clear" textline " " bitfld.long 0x08 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Clear" bitfld.long 0x08 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Clear" bitfld.long 0x08 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x0C "TCE_CTRL_TOG,EPDC Timing Control Engine Control Toggle Register" hexmask.long.word 0x0C 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x0C 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x0C 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Not toggled,Toggled" bitfld.long 0x0C 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "Not toggled,Toggled" textline " " bitfld.long 0x0C 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "Not toggled,Toggled" bitfld.long 0x0C 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not toggled,Toggled" bitfld.long 0x0C 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" bitfld.long 0x0C 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not toggled,Toggled" bitfld.long 0x0C 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "Not toggled,Toggled" bitfld.long 0x0C 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" elif (((per.l(ad:0x020F4000+0x200))&0x44)==0x04) group.long 0x200++0x0F line.long 0x00 "TCE_CTRL,EPDC Timing Control Engine Control Register" hexmask.long.word 0x00 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x00 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x00 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Manual,Auto" bitfld.long 0x00 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not used,Used" textline " " bitfld.long 0x00 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not applied,Applied" bitfld.long 0x00 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "8-bit,16-bit" textline " " bitfld.long 0x00 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x04 "TCE_CTRL_SET,EPDC Timing Control Engine Control Set Register" hexmask.long.word 0x04 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x04 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x04 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Set" bitfld.long 0x04 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Set" textline " " bitfld.long 0x04 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Set" bitfld.long 0x04 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Set" bitfld.long 0x04 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Set" bitfld.long 0x04 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Set" textline " " bitfld.long 0x04 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x08 "TCE_CTRL_CLR,EPDC Timing Control Engine Control Clear Register" hexmask.long.word 0x08 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x08 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x08 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Clear" bitfld.long 0x08 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Clear" textline " " bitfld.long 0x08 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Clear" bitfld.long 0x08 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Clear" bitfld.long 0x08 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Clear" bitfld.long 0x08 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Clear" textline " " bitfld.long 0x08 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x0C "TCE_CTRL_TOG,EPDC Timing Control Engine Control Toggle Register" hexmask.long.word 0x0C 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x0C 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x0C 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Not toggled,Toggled" bitfld.long 0x0C 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not toggled,Toggled" textline " " bitfld.long 0x0C 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" bitfld.long 0x0C 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" bitfld.long 0x0C 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not toggled,Toggled" bitfld.long 0x0C 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "Not toggled,Toggled" textline " " bitfld.long 0x0C 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" elif (((per.l(ad:0x020F4000+0x200))&0x44)==0x40) group.long 0x200++0x0F line.long 0x00 "TCE_CTRL,EPDC Timing Control Engine Control Register" hexmask.long.word 0x00 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x00 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x00 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Manual,Auto" bitfld.long 0x00 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "Not drove,Drove" textline " " bitfld.long 0x00 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "Not drove,Drove" bitfld.long 0x00 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not used,Used" bitfld.long 0x00 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Up,Down" textline " " bitfld.long 0x00 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not applied,Applied" bitfld.long 0x00 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "8-bit,16-bit" bitfld.long 0x00 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x04 "TCE_CTRL_SET,EPDC Timing Control Engine Control Set Register" hexmask.long.word 0x04 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x04 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x04 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Set" bitfld.long 0x04 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "No effect,Set" textline " " bitfld.long 0x04 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "No effect,Set" bitfld.long 0x04 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Set" bitfld.long 0x04 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Set" bitfld.long 0x04 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Set" textline " " bitfld.long 0x04 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Set" bitfld.long 0x04 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Set" bitfld.long 0x04 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x08 "TCE_CTRL_CLR,EPDC Timing Control Engine Control Clear Register" hexmask.long.word 0x08 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x08 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x08 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Clear" bitfld.long 0x08 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "No effect,Clear" textline " " bitfld.long 0x08 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "No effect,Clear" bitfld.long 0x08 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "No effect,Clear" bitfld.long 0x08 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Clear" bitfld.long 0x08 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Clear" textline " " bitfld.long 0x08 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "No effect,Clear" bitfld.long 0x08 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Clear" bitfld.long 0x08 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x0C "TCE_CTRL_TOG,EPDC Timing Control Engine Control Toggle Register" hexmask.long.word 0x0C 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x0C 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x0C 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Not toggled,Toggled" bitfld.long 0x0C 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "Not toggled,Toggled" textline " " bitfld.long 0x0C 7. " LVDS_MODE_CE ,SDCE[9:5] drives as the differential inverse of SDCE[4:0]" "Not toggled,Toggled" bitfld.long 0x0C 6. " LVDS_MODE ,Upper 8-bit of the SDDO bus are used for LVDS differential signalling" "Not toggled,Toggled" bitfld.long 0x0C 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" bitfld.long 0x0C 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " DUAL_SCAN ,Dual scan-mode applies to each 8-bit segment of the SDDO bus" "Not toggled,Toggled" bitfld.long 0x0C 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "Not toggled,Toggled" bitfld.long 0x0C 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" else group.long 0x200++0x0F line.long 0x00 "TCE_CTRL,EPDC Timing Control Engine Control Register" hexmask.long.word 0x00 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x00 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x00 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Manual,Auto" bitfld.long 0x00 8. " DDR_MODE ,SDDO data is driven on both positive and negative edges of SDCLK" "Not drove,Drove" textline " " bitfld.long 0x00 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Up,Down" bitfld.long 0x00 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "8-bit,16-bit" bitfld.long 0x00 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x04 "TCE_CTRL_SET,EPDC Timing Control Engine Control Set Register" hexmask.long.word 0x04 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x04 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x04 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Set" bitfld.long 0x04 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Set" textline " " bitfld.long 0x04 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Set" bitfld.long 0x04 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Set" bitfld.long 0x04 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x08 "TCE_CTRL_CLR,EPDC Timing Control Engine Control Clear Register" hexmask.long.word 0x08 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x08 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x08 9. " VCOM_MODE ,Method used to drive the VCOM signal" "No effect,Clear" bitfld.long 0x08 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "No effect,Clear" textline " " bitfld.long 0x08 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "No effect,Clear" bitfld.long 0x08 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "No effect,Clear" bitfld.long 0x08 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" line.long 0x0C "TCE_CTRL_TOG,EPDC Timing Control Engine Control Toggle Register" hexmask.long.word 0x0C 16.--24. 1. " VSCAN_HOLDOFF ,Portion of the vertical blanking available for new LUTs to be activated" bitfld.long 0x0C 10.--11. " VCOM_VAL ,VCOM value for the VCOM[1:0] pins" "0,1,2,3" bitfld.long 0x0C 9. " VCOM_MODE ,Method used to drive the VCOM signal" "Not toggled,Toggled" bitfld.long 0x0C 5. " SCAN_DIR_1 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" textline " " bitfld.long 0x0C 4. " SCAN_DIR_0 ,Scan direction for each half of the TFT panel" "Not toggled,Toggled" bitfld.long 0x0C 2. " SDDO_WIDTH ,SDDO bus format (in bits)" "Not toggled,Toggled" bitfld.long 0x0C 0.--1. " PIXELS_PER_SDCLK ,Number of TFT pixels per SDCLK period" ",Two,Four,Eight" endif group.long 0x220++0x0F line.long 0x00 "TCE_SDCFG,EPDC Timing Control Engine Source-Driver Config Register" bitfld.long 0x00 21. " SDCLK_HOLD ,Holds the SDCLK low during LINE_BEGIN" "Not held,Held" bitfld.long 0x00 20. " SDSHR ,Value for source-driver shift direction output port" "Low,High" bitfld.long 0x00 16.--19. " NUM_CE ,Number of source driver IC chip-enables" ",1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 14.--15. " SDDO_REFORMAT ,Re-formatting options to enable more flexibility in the source-driver interface" "STANDARD,FLIP_PIXELS,?..." textline " " bitfld.long 0x00 13. " SDDO_INVERT ,Reverses the polarity of each SDDO bit" "Not reversed,Reversed" hexmask.long.word 0x00 0.--12. 1. " PIXELS_PER_CE ,Number of pixels (outputs) per source-driver IC" line.long 0x04 "TCE_SDCFG_SET,EPDC Timing Control Engine Source-Driver Config Set Register" bitfld.long 0x04 21. " SDCLK_HOLD ,Holds the SDCLK low during LINE_BEGIN" "No effect,Set" bitfld.long 0x04 20. " SDSHR ,Value for source-driver shift direction output port" "No effect,Set" bitfld.long 0x04 16.--19. " NUM_CE ,Number of source driver IC chip-enables" ",1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 14.--15. " SDDO_REFORMAT ,Re-formatting options to enable more flexibility in the source-driver interface" "STANDARD,FLIP_PIXELS,?..." textline " " bitfld.long 0x04 13. " SDDO_INVERT ,Reverses the polarity of each SDDO bit" "No effect,Set" hexmask.long.word 0x04 0.--12. 1. " PIXELS_PER_CE ,Number of pixels (outputs) per source-driver IC" line.long 0x08 "TCE_SDCFG_CLR,EPDC Timing Control Engine Source-Driver Config Clear Register" bitfld.long 0x08 21. " SDCLK_HOLD ,Holds the SDCLK low during LINE_BEGIN" "No effect,Clear" bitfld.long 0x08 20. " SDSHR ,Value for source-driver shift direction output port" "No effect,Clear" bitfld.long 0x08 16.--19. " NUM_CE ,Number of source driver IC chip-enables" ",1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x08 14.--15. " SDDO_REFORMAT ,Re-formatting options to enable more flexibility in the source-driver interface" "STANDARD,FLIP_PIXELS,?..." textline " " bitfld.long 0x08 13. " SDDO_INVERT ,Reverses the polarity of each SDDO bit" "No effect,Clear" hexmask.long.word 0x08 0.--12. 1. " PIXELS_PER_CE ,Number of pixels (outputs) per source-driver IC" line.long 0x0C "TCE_SDCFG_TOG,EPDC Timing Control Engine Source-Driver Config Toggle Register" bitfld.long 0x0C 21. " SDCLK_HOLD ,Holds the SDCLK low during LINE_BEGIN" "Not toggled,Toggled" bitfld.long 0x0C 20. " SDSHR ,Value for source-driver shift direction output port" "Not toggled,Toggled" bitfld.long 0x0C 16.--19. " NUM_CE ,Number of source driver IC chip-enables" ",1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x0C 14.--15. " SDDO_REFORMAT ,Re-formatting options to enable more flexibility in the source-driver interface" "STANDARD,FLIP_PIXELS,?..." textline " " bitfld.long 0x0C 13. " SDDO_INVERT ,Reverses the polarity of each SDDO bit" "Not toggled,Toggled" hexmask.long.word 0x0C 0.--12. 1. " PIXELS_PER_CE ,Number of pixels (outputs) per source-driver IC" group.long 0x240++0x0F line.long 0x00 "TCE_GDCFG,EPDC Timing Control Engine Gate-Driver Config Register" hexmask.long.word 0x00 16.--31. 1. " PERIOD_VSCAN ,Counter period" bitfld.long 0x00 4. " GDRL ,Value for gate-driver right/left shift output port" "Low,High" bitfld.long 0x00 1. " GDOE_MODE ,Method for driving GDOE signal" "All times,Delayed" bitfld.long 0x00 0. " GDSP_MODE ,Method for driving GDSP pulse" "Fixed,FRAME_SYNC" line.long 0x04 "TCE_GDCFG_SET,EPDC Timing Control Engine Gate-Driver Config Set Register" hexmask.long.word 0x04 16.--31. 1. " PERIOD_VSCAN ,Counter period" bitfld.long 0x04 4. " GDRL ,Value for gate-driver right/left shift output port" "No effect,Set" bitfld.long 0x04 1. " GDOE_MODE ,Method for driving GDOE signal" "No effect,Set" bitfld.long 0x04 0. " GDSP_MODE ,Method for driving GDSP pulse" "No effect,Set" line.long 0x08 "TCE_GDCFG_CLR,EPDC Timing Control Engine Gate-Driver Config Clear Register" hexmask.long.word 0x08 16.--31. 1. " PERIOD_VSCAN ,Counter period" bitfld.long 0x08 4. " GDRL ,Value for gate-driver right/left shift output port" "No effect,Clear" bitfld.long 0x08 1. " GDOE_MODE ,Method for driving GDOE signal" "No effect,Clear" bitfld.long 0x08 0. " GDSP_MODE ,Method for driving GDSP pulse" "No effect,Clear" line.long 0x0C "TCE_GDCFG_TOG,EPDC Timing Control Engine Gate-Driver Config Toggle Register" hexmask.long.word 0x0C 16.--31. 1. " PERIOD_VSCAN ,Counter period" bitfld.long 0x0C 4. " GDRL ,Value for gate-driver right/left shift output port" "Not toggled,Toggled" bitfld.long 0x0C 1. " GDOE_MODE ,Method for driving GDOE signal" "Not toggled,Toggled" bitfld.long 0x0C 0. " GDSP_MODE ,Method for driving GDSP pulse" "Not toggled,Toggled" group.long 0x260++0x0F line.long 0x00 "TCE_HSCAN1,EPDC Timing Control Engine Horizontal Timing Register 1" hexmask.long.word 0x00 16.--27. 1. " LINE_SYNC_WIDTH ,Number of PIXCLK cycles for the SDLE active time" hexmask.long.word 0x00 0.--11. 1. " LINE_SYNC ,Number of PIXCLK cycles for line sync duration" line.long 0x04 "TCE_HSCAN1_SET,EPDC Timing Control Engine Horizontal Timing Set Register 1" hexmask.long.word 0x04 16.--27. 1. " LINE_SYNC_WIDTH ,Number of PIXCLK cycles for the SDLE active time" hexmask.long.word 0x04 0.--11. 1. " LINE_SYNC ,Number of PIXCLK cycles for line sync duration" line.long 0x08 "TCE_HSCAN1_CLR,EPDC Timing Control Engine Horizontal Timing Clear Register 1" hexmask.long.word 0x08 16.--27. 1. " LINE_SYNC_WIDTH ,Number of PIXCLK cycles for the SDLE active time" hexmask.long.word 0x08 0.--11. 1. " LINE_SYNC ,Number of PIXCLK cycles for line sync duration" line.long 0x0C "TCE_HSCAN1_TOG,EPDC Timing Control Engine Horizontal Timing Toggle Register 1" hexmask.long.word 0x0C 16.--27. 1. " LINE_SYNC_WIDTH ,Number of PIXCLK cycles for the SDLE active time" hexmask.long.word 0x0C 0.--11. 1. " LINE_SYNC ,Number of PIXCLK cycles for line sync duration" group.long 0x280++0x0F line.long 0x00 "TCE_HSCAN2,EPDC Timing Control Engine Horizontal Timing Register 2" hexmask.long.word 0x00 16.--27. 1. " LINE_END ,Number of PIXCLK cycles for line end duration" hexmask.long.word 0x00 0.--11. 1. " LINE_BEGIN ,Number of PIXCLK cycles for line begin duration" line.long 0x04 "TCE_HSCAN2_SET,EPDC Timing Control Engine Horizontal Timing Set Register 2" hexmask.long.word 0x04 16.--27. 1. " LINE_END ,Number of PIXCLK cycles for line end duration" hexmask.long.word 0x04 0.--11. 1. " LINE_BEGIN ,Number of PIXCLK cycles for line begin duration" line.long 0x08 "TCE_HSCAN2_CLR,EPDC Timing Control Engine Horizontal Timing Clear Register 2" hexmask.long.word 0x08 16.--27. 1. " LINE_END ,Number of PIXCLK cycles for line end duration" hexmask.long.word 0x08 0.--11. 1. " LINE_BEGIN ,Number of PIXCLK cycles for line begin duration" line.long 0x0C "TCE_HSCAN2_TOG,EPDC Timing Control Engine Horizontal Timing Toggle Register 2" hexmask.long.word 0x0C 16.--27. 1. " LINE_END ,Number of PIXCLK cycles for line end duration" hexmask.long.word 0x0C 0.--11. 1. " LINE_BEGIN ,Number of PIXCLK cycles for line begin duration" group.long 0x2A0++0x0F line.long 0x00 "TCE_VSCAN,EPDC Timing Control Engine Vertical Timing Register" hexmask.long.byte 0x00 16.--23. 1. " FRAME_END ,Number of lines for frame end duration" hexmask.long.byte 0x00 8.--15. 1. " FRAME_BEGIN ,Number of lines for frame begin duration" hexmask.long.byte 0x00 0.--7. 1. " FRAME_SYNC ,Number of lines for frame sync duration" line.long 0x04 "TCE_VSCAN_SET,EPDC Timing Control Engine Vertical Timing Set Register" hexmask.long.byte 0x04 16.--23. 1. " FRAME_END ,Number of lines for frame end duration" hexmask.long.byte 0x04 8.--15. 1. " FRAME_BEGIN ,Number of lines for frame begin duration" hexmask.long.byte 0x04 0.--7. 1. " FRAME_SYNC ,Number of lines for frame sync duration" line.long 0x08 "TCE_VSCAN_CLR,EPDC Timing Control Engine Vertical Timing Clear Register" hexmask.long.byte 0x08 16.--23. 1. " FRAME_END ,Number of lines for frame end duration" hexmask.long.byte 0x08 8.--15. 1. " FRAME_BEGIN ,Number of lines for frame begin duration" hexmask.long.byte 0x08 0.--7. 1. " FRAME_SYNC ,Number of lines for frame sync duration" line.long 0x0C "TCE_VSCAN_TOG,EPDC Timing Control Engine Vertical Timing Toggle Register" hexmask.long.byte 0x0C 16.--23. 1. " FRAME_END ,Number of lines for frame end duration" hexmask.long.byte 0x0C 8.--15. 1. " FRAME_BEGIN ,Number of lines for frame begin duration" hexmask.long.byte 0x0C 0.--7. 1. " FRAME_SYNC ,Number of lines for frame sync duration" group.long 0x2C0++0x0F line.long 0x00 "TCE_OE,EPDC Timing Control Engine OE timing control Register" hexmask.long.byte 0x00 24.--31. 1. " SDOED_WIDTH ,Number of PIXCLK cycles from SDOED high to SDOED falling" hexmask.long.byte 0x00 16.--23. 1. " SDOED_DLY ,Number of PIXCLK cycles from SDOEZ low to SDOED rising" hexmask.long.byte 0x00 8.--15. 1. " SDOEZ_WIDTH ,Number of PIXCLK cycles from SDOEZ high to SDOEZ falling" hexmask.long.byte 0x00 0.--7. 1. " SDOEZ_DLY ,Number of PIXCLK cycles from SDLE falling edge to SDOEZ rising" line.long 0x04 "TCE_OE_SET,EPDC Timing Control Engine OE timing control set Register" hexmask.long.byte 0x04 24.--31. 1. " SDOED_WIDTH ,Number of PIXCLK cycles from SDOED high to SDOED falling" hexmask.long.byte 0x04 16.--23. 1. " SDOED_DLY ,Number of PIXCLK cycles from SDOEZ low to SDOED rising" hexmask.long.byte 0x04 8.--15. 1. " SDOEZ_WIDTH ,Number of PIXCLK cycles from SDOEZ high to SDOEZ falling" hexmask.long.byte 0x04 0.--7. 1. " SDOEZ_DLY ,Number of PIXCLK cycles from SDLE falling edge to SDOEZ rising" line.long 0x08 "TCE_OE_CLR,EPDC Timing Control Engine OE timing control clear Register" hexmask.long.byte 0x08 24.--31. 1. " SDOED_WIDTH ,Number of PIXCLK cycles from SDOED high to SDOED falling" hexmask.long.byte 0x08 16.--23. 1. " SDOED_DLY ,Number of PIXCLK cycles from SDOEZ low to SDOED rising" hexmask.long.byte 0x08 8.--15. 1. " SDOEZ_WIDTH ,Number of PIXCLK cycles from SDOEZ high to SDOEZ falling" hexmask.long.byte 0x08 0.--7. 1. " SDOEZ_DLY ,Number of PIXCLK cycles from SDLE falling edge to SDOEZ rising" line.long 0x0C "TCE_OE_TOG,EPDC Timing Control Engine OE timing control toggle Register" hexmask.long.byte 0x0C 24.--31. 1. " SDOED_WIDTH ,Number of PIXCLK cycles from SDOED high to SDOED falling" hexmask.long.byte 0x0C 16.--23. 1. " SDOED_DLY ,Number of PIXCLK cycles from SDOEZ low to SDOED rising" hexmask.long.byte 0x0C 8.--15. 1. " SDOEZ_WIDTH ,Number of PIXCLK cycles from SDOEZ high to SDOEZ falling" hexmask.long.byte 0x0C 0.--7. 1. " SDOEZ_DLY ,Number of PIXCLK cycles from SDLE falling edge to SDOEZ rising" group.long 0x2E0++0x03 line.long 0x00 "TCE_POLARITY,EPDC Timing Control Engine Driver Polarity Register" bitfld.long 0x00 4. " GDSP_POL ,GDSP output" "Active Low,Active High" bitfld.long 0x00 3. " GDOE_POL ,GDOE output" "Active Low,Active High" bitfld.long 0x00 2. " SDOE_POL ,SDOE" "Active Low,Active High" bitfld.long 0x00 1. " SDLE_POL ,SDLE output" "Active Low,Active High" textline " " bitfld.long 0x00 0. " SDCE_POL ,All 10 SDCE outputs" "Active Low,Active High" group.long 0x300++0x2F line.long 0x00 "TCE_TIMING1,EPDC Timing Control Engine Timing Register 1" bitfld.long 0x00 4.--5. " SDLE_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 3 PIXCLK cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" bitfld.long 0x00 3. " SDCLK_INVERT ,Invert phase of SDCLK" "Not inverted,Inverted" bitfld.long 0x00 0.--1. " SDCLK_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 4 cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" line.long 0x04 "TCE_TIMING1_SET,EPDC Timing Control Engine Timing Set Register 1" bitfld.long 0x04 4.--5. " SDLE_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 3 PIXCLK cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" bitfld.long 0x04 3. " SDCLK_INVERT ,Invert phase of SDCLK" "Not set,Set" bitfld.long 0x04 0.--1. " SDCLK_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 4 cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" line.long 0x08 "TCE_TIMING1_CLR,EPDC Timing Control Engine Timing Clear Register 1" bitfld.long 0x08 4.--5. " SDLE_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 3 PIXCLK cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" bitfld.long 0x08 3. " SDCLK_INVERT ,Invert phase of SDCLK" "No effect,Clear" bitfld.long 0x08 0.--1. " SDCLK_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 4 cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" line.long 0x0C "TCE_TIMING1_TOG,EPDC Timing Control Engine Timing Toggle Register 1" bitfld.long 0x0C 4.--5. " SDLE_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 3 PIXCLK cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" bitfld.long 0x0C 3. " SDCLK_INVERT ,Invert phase of SDCLK" "Not toggled,Toggled" bitfld.long 0x0C 0.--1. " SDCLK_SHIFT ,Implement additional timing setup/hold adjustment of source driver signals by adjusting the SDCLK up to 4 cycles" "No shift,1 pixclk cycle,2 pixclk cycles,3 pixclk cycles" line.long 0x10 "TCE_TIMING2,EPDC Timing Control Engine Timing Register 2" hexmask.long.word 0x10 16.--31. 1. " GDCLK_HP ,GDCLK high-pulse width" hexmask.long.word 0x10 0.--15. 1. " GDSP_OFFSET ,Shift the GDSP pulse by N PIXCLKs" line.long 0x14 "TCE_TIMING2_SET,EPDC Timing Control Engine Timing Set Register 2" hexmask.long.word 0x14 16.--31. 1. " GDCLK_HP ,GDCLK high-pulse width" hexmask.long.word 0x14 0.--15. 1. " GDSP_OFFSET ,Shift the GDSP pulse by N PIXCLKs" line.long 0x18 "TCE_TIMING2_CLR,EPDC Timing Control Engine Timing Clear Register 2" hexmask.long.word 0x18 16.--31. 1. " GDCLK_HP ,GDCLK high-pulse width" hexmask.long.word 0x18 0.--15. 1. " GDSP_OFFSET ,Shift the GDSP pulse by N PIXCLKs" line.long 0x1C "TCE_TIMING2_TOG,EPDC Timing Control Engine Timing Register 2" hexmask.long.word 0x1C 16.--31. 1. " GDCLK_HP ,GDCLK high-pulse width" hexmask.long.word 0x1C 0.--15. 1. " GDSP_OFFSET ,Shift the GDSP pulse by N PIXCLKs" line.long 0x20 "TCE_TIMING3,EPDC Timing Control Engine Timing Register 3" hexmask.long.word 0x20 16.--31. 1. " GDOE_OFFSET ,Delay from GDCLK to the GDOE in terms of N PIXCLK cycles" hexmask.long.word 0x20 0.--15. 1. " GDCLK_OFFSET ,Shift the GDCLK from the line time by N PIXCLK cycles" line.long 0x24 "TCE_TIMING3_SET,EPDC Timing Control Engine Timing Register 3" hexmask.long.word 0x24 16.--31. 1. " GDOE_OFFSET ,Delay from GDCLK to the GDOE in terms of N PIXCLK cycles" hexmask.long.word 0x24 0.--15. 1. " GDCLK_OFFSET ,Shift the GDCLK from the line time by N PIXCLK cycles" line.long 0x28 "TCE_TIMING3_CLR,EPDC Timing Control Engine Timing Register 3" hexmask.long.word 0x28 16.--31. 1. " GDOE_OFFSET ,Delay from GDCLK to the GDOE in terms of N PIXCLK cycles" hexmask.long.word 0x28 0.--15. 1. " GDCLK_OFFSET ,Shift the GDCLK from the line time by N PIXCLK cycles" line.long 0x2C "TCE_TIMING3_TOG,EPDC Timing Control Engine Timing Register 3" hexmask.long.word 0x2C 16.--31. 1. " GDOE_OFFSET ,Delay from GDCLK to the GDOE in terms of N PIXCLK cycles" hexmask.long.word 0x2C 0.--15. 1. " GDCLK_OFFSET ,Shift the GDCLK from the line time by N PIXCLK cycles" group.long 0x380++0x1F line.long 0x00 "PIGEON_CTRL0,EPDC Pigeon Mode Control Register 0" hexmask.long.word 0x00 16.--27. 1. " LD_PERIOD ,Period of pclk counter during LD phase" hexmask.long.word 0x00 0.--11. 1. " FD_PERIOD ,Period of line counter during FD phase" line.long 0x04 "PIGEON_CTRL0_SET,EPDC Pigeon Mode Control Set Register 0" hexmask.long.word 0x04 16.--27. 1. " LD_PERIOD ,Period of pclk counter during LD phase" hexmask.long.word 0x04 0.--11. 1. " FD_PERIOD ,Period of line counter during FD phase" line.long 0x08 "PIGEON_CTRL0_CLR,EPDC Pigeon Mode Control Clear Register 0" hexmask.long.word 0x08 16.--27. 1. " LD_PERIOD ,Period of pclk counter during LD phase" hexmask.long.word 0x08 0.--11. 1. " FD_PERIOD ,Period of line counter during FD phase" line.long 0x0C "PIGEON_CTRL0_TOG,EPDC Pigeon Mode Control Toggle Register 0" hexmask.long.word 0x0C 16.--27. 1. " LD_PERIOD ,Period of pclk counter during LD phase" hexmask.long.word 0x0C 0.--11. 1. " FD_PERIOD ,Period of line counter during FD phase" line.long 0x10 "PIGEON_CTRL1,EPDC Pigeon Mode Control Register 1" hexmask.long.word 0x10 16.--27. 1. " FRAME_CNT_CYCLES ,Max cycles of frame counter" hexmask.long.word 0x10 0.--11. 1. " FRAME_CNT_PERIOD ,Period of frame counter" line.long 0x14 "PIGEON_CTRL1_SET,EPDC Pigeon Mode Control Set Register 1" hexmask.long.word 0x14 16.--27. 1. " FRAME_CNT_CYCLES ,Max cycles of frame counter" hexmask.long.word 0x14 0.--11. 1. " FRAME_CNT_PERIOD ,Period of frame counter" line.long 0x18 "PIGEON_CTRL1_CLR,EPDC Pigeon Mode Control Clear Register 1" hexmask.long.word 0x18 16.--27. 1. " FRAME_CNT_CYCLES ,Max cycles of frame counter" hexmask.long.word 0x18 0.--11. 1. " FRAME_CNT_PERIOD ,Period of frame counter" line.long 0x1C "PIGEON_CTRL1_TOG,EPDC Pigeon Mode Control Register 1" hexmask.long.word 0x1C 16.--27. 1. " FRAME_CNT_CYCLES ,Max cycles of frame counter" hexmask.long.word 0x1C 0.--11. 1. " FRAME_CNT_PERIOD ,Period of frame counter" textline " " group.long 0x3C0++0x4F line.long 0x00 "IRQ_MASK1,EPDC IRQ Mask Register for LUT 0-31" bitfld.long 0x00 31. " LUT31_CMPLT_IRQ_EN ,LUT31 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,LUT30 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,LUT29 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,LUT28 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [27] ,LUT27 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,LUT26 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,LUT25 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,LUT24 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,LUT23 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,LUT22 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,LUT21 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,LUT20 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,LUT19 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,LUT18 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,LUT17 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,LUT16 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,LUT15 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,LUT14 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,LUT13 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,LUT12 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,LUT11 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,LUT10 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,LUT9 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,LUT8 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,LUT7 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,LUT6 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,LUT5 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,LUT4 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,LUT3 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,LUT2 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,LUT1 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,LUT0 Complete Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IRQ_MASK1_SET,EPDC IRQ Mask Set Register for LUT 0-31" bitfld.long 0x04 31. " LUT31_CMPLT_IRQ_SET ,LUT31 Complete Interrupt Set" "No effect,Set" bitfld.long 0x04 24. " [24] ,LUT24 Complete Interrupt Set" "No effect,Set" bitfld.long 0x04 22. " [22] ,LUT22 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 21. " [21] ,LUT21 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 20. " [20] ,LUT20 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 19. " [19] ,LUT19 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 18. " [18] ,LUT18 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 17. " [17] ,LUT17 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 16. " [16] ,LUT16 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 15. " [15] ,LUT15 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 14. " [14] ,LUT14 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 13. " [13] ,LUT13 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 12. " [12] ,LUT12 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 11. " [11] ,LUT11 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 10. " [10] ,LUT10 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 9. " [9] ,LUT9 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 8. " [8] ,LUT8 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 7. " [7] ,LUT7 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 6. " [6] ,LUT6 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 5. " [5] ,LUT5 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 4. " [4] ,LUT4 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 3. " [3] ,LUT3 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 2. " [2] ,LUT2 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x04 1. " [1] ,LUT1 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x04 0. " [0] ,LUT0 Complete Interrupt Clear" "No effect,Clear" line.long 0x0C "IRQ_MASK1_TOG,EPDC IRQ Mask Toggle Register for LUT 0-31" bitfld.long 0x0C 31. " LUTN_CMPLT_IRQ_TOG ,LUT31 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 30. " [30] ,LUT30 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 29. " [29] ,LUT29 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 28. " [28] ,LUT28 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 27. " [27] ,LUT27 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 26. " [26] ,LUT26 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 25. " [25] ,LUT25 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 24. " [24] ,LUT24 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 23. " [23] ,LUT23 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 22. " [22] ,LUT22 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 21. " [21] ,LUT21 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 20. " [20] ,LUT20 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 19. " [19] ,LUT19 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 18. " [18] ,LUT18 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 17. " [17] ,LUT17 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 16. " [16] ,LUT16 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 15. " [15] ,LUT15 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 14. " [14] ,LUT14 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 13. " [13] ,LUT13 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 12. " [12] ,LUT12 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 11. " [11] ,LUT11 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 10. " [10] ,LUT10 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 9. " [9] ,LUT9 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 8. " [8] ,LUT8 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 7. " [7] ,LUT7 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 6. " [6] ,LUT6 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 5. " [5] ,LUT5 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 4. " [4] ,LUT4 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " [3] ,LUT3 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 2. " [2] ,LUT2 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 1. " [1] ,LUT1 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x0C 0. " [0] ,LUT0 Complete Interrupt Toggle" "Not toggled,Toggled" line.long 0x10 "IRQ_MASK2,EPDC IRQ Mask Register for LUT 32-63" bitfld.long 0x10 31. " LUT63_CMPLT_IRQ_EN ,LUT63 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 30. " [62] ,LUT62 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 29. " [61] ,LUT61 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 28. " [60] ,LUT60 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " [59] ,LUT59 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 26. " [58] ,LUT58 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 25. " [57] ,LUT57 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 24. " [56] ,LUT56 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " [55] ,LUT55 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 22. " [54] ,LUT54 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 21. " [53] ,LUT53 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 20. " [52] ,LUT52 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " [51] ,LUT51 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 18. " [50] ,LUT50 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 17. " [49] ,LUT49 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 16. " [48] ,LUT48 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " [47] ,LUT47 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 14. " [46] ,LUT46 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 13. " [45] ,LUT45 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 12. " [44] ,LUT44 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " [43] ,LUT43 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 10. " [42] ,LUT42 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 9. " [41] ,LUT41 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 8. " [40] ,LUT40 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " [39] ,LUT39 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 6. " [38] ,LUT38 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 5. " [37] ,LUT37 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 4. " [36] ,LUT36 Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " [35] ,LUT35 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 2. " [34] ,LUT34 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 1. " [33] ,LUT33 Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 0. " [32] ,LUT32 Complete Interrupt Enable" "Disabled,Enabled" line.long 0x14 "IRQ_MASK2_SET,EPDC IRQ Mask Set Register for LUT 32-63" bitfld.long 0x14 31. " LUT63_CMPLT_IRQ_SET ,LUT63 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 30. " [62] ,LUT62 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 29. " [61] ,LUT61 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 28. " [60] ,LUT60 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 27. " [59] ,LUT59 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 26. " [58] ,LUT58 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 25. " [57] ,LUT57 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 24. " [56] ,LUT56 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 23. " [55] ,LUT55 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 22. " [54] ,LUT54 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 21. " [53] ,LUT53 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 20. " [52] ,LUT52 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 19. " [51] ,LUT51 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 18. " [50] ,LUT50 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 17. " [49] ,LUT49 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 16. " [48] ,LUT48 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 15. " [47] ,LUT47 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 14. " [46] ,LUT46 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 13. " [45] ,LUT45 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 12. " [44] ,LUT44 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 11. " [43] ,LUT43 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 10. " [42] ,LUT42 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 9. " [41] ,LUT41 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 8. " [40] ,LUT40 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 7. " [39] ,LUT39 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 6. " [38] ,LUT38 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 5. " [37] ,LUT37 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 4. " [36] ,LUT36 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x14 3. " [35] ,LUT35 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 2. " [34] ,LUT34 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 1. " [33] ,LUT33 Complete Interrupt Set" "No effect,Set" bitfld.long 0x14 0. " [32] ,LUT32 Complete Interrupt Set" "No effect,Set" line.long 0x18 "IRQ_MASK2_CLR,EPDC IRQ Mask Clear Register for LUT 32-63" bitfld.long 0x18 31. " LUT63_CMPLT_IRQ_CLR ,LUT63 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 30. " [62] ,LUT62 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 29. " [61] ,LUT61 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 28. " [60] ,LUT60 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 27. " [59] ,LUT59 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 26. " [58] ,LUT58 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 25. " [57] ,LUT57 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 24. " [56] ,LUT56 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 23. " [55] ,LUT55 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 22. " [54] ,LUT54 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 21. " [53] ,LUT53 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 20. " [52] ,LUT52 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 19. " [51] ,LUT51 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 18. " [50] ,LUT50 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 17. " [49] ,LUT49 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 16. " [48] ,LUT48 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 15. " [47] ,LUT47 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 14. " [46] ,LUT46 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 13. " [45] ,LUT45 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 12. " [44] ,LUT44 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 11. " [43] ,LUT43 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 10. " [42] ,LUT42 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 9. " [41] ,LUT41 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 8. " [40] ,LUT40 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 7. " [39] ,LUT39 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 6. " [38] ,LUT38 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 5. " [37] ,LUT37 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 4. " [36] ,LUT36 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x18 3. " [35] ,LUT35 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 2. " [34] ,LUT34 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 1. " [33] ,LUT33 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x18 0. " [32] ,LUT32 Complete Interrupt Clear" "No effect,Clear" line.long 0x1C "IRQ_MASK2_TOG,EPDC IRQ Mask Toggle Register for LUT 32-63" bitfld.long 0x1C 31. " LUT63_CMPLT_IRQ_TOG ,LUT63 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 30. " [62] ,LUT62 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 29. " [61] ,LUT61 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 28. " [60] ,LUT60 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 27. " [59] ,LUT59 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 26. " [58] ,LUT58 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 25. " [57] ,LUT57 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 24. " [56] ,LUT56 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 23. " [55] ,LUT55 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 22. " [54] ,LUT54 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 21. " [53] ,LUT53 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 20. " [52] ,LUT52 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 19. " [51] ,LUT51 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 18. " [50] ,LUT50 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 17. " [49] ,LUT49 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 16. " [48] ,LUT48 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 15. " [47] ,LUT47 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 14. " [46] ,LUT46 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 13. " [45] ,LUT45 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 12. " [44] ,LUT44 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 11. " [43] ,LUT43 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 10. " [42] ,LUT42 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 9. " [41] ,LUT41 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 8. " [40] ,LUT40 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 7. " [39] ,LUT39 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 6. " [38] ,LUT38 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 5. " [37] ,LUT37 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 4. " [36] ,LUT36 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 3. " [35] ,LUT35 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 2. " [34] ,LUT34 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 1. " [33] ,LUT33 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x1C 0. " [32] ,LUT32 Complete Interrupt Toggle" "Not toggled,Toggled" line.long 0x20 "IRQ1,EPDC Interrupt Register for LUT 0-31" bitfld.long 0x20 31. " LUT31_CMPLT_IRQ ,LUT31 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 30. " [30] ,LUT30 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 29. " [29] ,LUT29 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 28. " [28] ,LUT28 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 27. " [27] ,LUT27 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 26. " [26] ,LUT26 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 25. " [25] ,LUT25 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 24. " [24] ,LUT24 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 23. " [23] ,LUT23 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 22. " [22] ,LUT22 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 21. " [21] ,LUT21 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 20. " [20] ,LUT20 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 19. " [19] ,LUT19 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 18. " [18] ,LUT18 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 17. " [17] ,LUT17 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 16. " [16] ,LUT16 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 15. " [15] ,LUT15 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 14. " [14] ,LUT14 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 13. " [13] ,LUT13 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 12. " [12] ,LUT12 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 11. " [11] ,LUT11 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 10. " [10] ,LUT10 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 9. " [9] ,LUT9 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 8. " [8] ,LUT8 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 7. " [7] ,LUT7 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 6. " [6] ,LUT6 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 5. " [5] ,LUT5 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 4. " [4] ,LUT4 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x20 3. " [3] ,LUT3 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 2. " [2] ,LUT2 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 1. " [1] ,LUT1 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x20 0. " [0] ,LUT0 Complete Interrupt" "No interrupt,Interrupt" line.long 0x24 "IRQ1_SET,EPDC Interrupt Set Register for LUT 0-31" bitfld.long 0x24 31. " LUT31_CMPLT_IRQ_SET ,LUT31 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 30. " [30] ,LUT30 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 29. " [29] ,LUT29 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 28. " [28] ,LUT28 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 27. " [27] ,LUT27 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 26. " [26] ,LUT26 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 25. " [25] ,LUT25 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 24. " [24] ,LUT24 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 23. " [23] ,LUT23 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 22. " [22] ,LUT22 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 21. " [21] ,LUT21 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 20. " [20] ,LUT20 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 19. " [19] ,LUT19 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 18. " [18] ,LUT18 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 17. " [17] ,LUT17 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 16. " [16] ,LUT16 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 15. " [15] ,LUT15 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 14. " [14] ,LUT14 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 13. " [13] ,LUT13 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 12. " [12] ,LUT12 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 11. " [11] ,LUT11 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 10. " [10] ,LUT10 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 9. " [9] ,LUT9 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 8. " [8] ,LUT8 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 7. " [7] ,LUT7 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 6. " [6] ,LUT6 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 5. " [5] ,LUT5 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 4. " [4] ,LUT4 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x24 3. " [3] ,LUT3 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 2. " [2] ,LUT2 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 1. " [1] ,LUT1 Complete Interrupt Set" "No effect,Set" bitfld.long 0x24 0. " [0] ,LUT0 Complete Interrupt Set" "No effect,Set" line.long 0x28 "IRQ1_CLR,EPDC Interrupt Clear Register for LUT 0-31" bitfld.long 0x28 31. " LUT31_CMPLT_IRQ_CLR ,LUT31 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 30. " [30] ,LUT30 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 29. " [29] ,LUT29 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 28. " [28] ,LUT28 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 27. " [27] ,LUT27 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 26. " [26] ,LUT26 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 25. " [25] ,LUT25 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 24. " [24] ,LUT24 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 23. " [23] ,LUT23 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 22. " [22] ,LUT22 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 21. " [21] ,LUT21 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 20. " [20] ,LUT20 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 19. " [19] ,LUT19 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 18. " [18] ,LUT18 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 17. " [17] ,LUT17 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 16. " [16] ,LUT16 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 15. " [15] ,LUT15 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 14. " [14] ,LUT14 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 13. " [13] ,LUT13 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 12. " [12] ,LUT12 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 11. " [11] ,LUT11 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 10. " [10] ,LUT10 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 9. " [9] ,LUT9 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 8. " [8] ,LUT8 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 7. " [7] ,LUT7 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 6. " [6] ,LUT6 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 5. " [5] ,LUT5 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 4. " [4] ,LUT4 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x28 3. " [3] ,LUT3 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 2. " [2] ,LUT2 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 1. " [1] ,LUT1 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x28 0. " [0] ,LUT0 Complete Interrupt Clear" "No effect,Clear" line.long 0x2C "IRQ1_TOG,EPDC Interrupt Toggle Register for LUT 0-31" bitfld.long 0x2C 31. " LUT31_CMPLT_IRQ_TOG ,LUT31 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 30. " [30] ,LUT30 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 29. " [29] ,LUT29 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 28. " [28] ,LUT28 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 27. " [27] ,LUT27 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 26. " [26] ,LUT26 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 25. " [25] ,LUT25 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 24. " [24] ,LUT24 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 23. " [23] ,LUT23 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 22. " [22] ,LUT22 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 21. " [21] ,LUT21 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 20. " [20] ,LUT20 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 19. " [19] ,LUT19 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 18. " [18] ,LUT18 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 17. " [17] ,LUT17 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 16. " [16] ,LUT16 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 15. " [15] ,LUT15 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 14. " [14] ,LUT14 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 13. " [13] ,LUT13 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 12. " [12] ,LUT12 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 11. " [11] ,LUT11 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 10. " [10] ,LUT10 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 9. " [9] ,LUT9 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 8. " [8] ,LUT8 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 7. " [7] ,LUT7 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 6. " [6] ,LUT6 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 5. " [5] ,LUT5 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 4. " [4] ,LUT4 Complete Interrupt Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x2C 3. " [3] ,LUT3 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 2. " [2] ,LUT2 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 1. " [1] ,LUT1 Complete Interrupt Toggle" "Not toggled,Toggled" bitfld.long 0x2C 0. " [0] ,LUT0 Complete Interrupt Toggle" "Not toggled,Toggled" line.long 0x30 "IRQ2,EPDC Interrupt Registerr for LUT 32-63" bitfld.long 0x30 31. " LUT63_CMPLT_IRQ ,LUT63 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 30. " [62] ,LUT62 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 29. " [61] ,LUT61 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 28. " [60] ,LUT60 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 27. " [59] ,LUT59 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 26. " [58] ,LUT58 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 25. " [57] ,LUT57 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 24. " [56] ,LUT56 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 23. " [55] ,LUT55 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 22. " [54] ,LUT54 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 21. " [53] ,LUT53 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 20. " [52] ,LUT52 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 19. " [51] ,LUT51 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 18. " [50] ,LUT50 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 17. " [49] ,LUT49 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 16. " [48] ,LUT48 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 15. " [47] ,LUT47 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 14. " [46] ,LUT46 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 13. " [45] ,LUT45 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 12. " [44] ,LUT44 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 11. " [43] ,LUT43 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 10. " [42] ,LUT42 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 9. " [41] ,LUT41 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 8. " [40] ,LUT40 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 7. " [39] ,LUT39 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 6. " [38] ,LUT38 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 5. " [37] ,LUT37 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 4. " [36] ,LUT36 Complete Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x30 3. " [35] ,LUT35 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 2. " [34] ,LUT34 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 1. " [33] ,LUT33 Complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x30 0. " [32] ,LUT32 Complete Interrupt" "No interrupt,Interrupt" line.long 0x34 "IRQ2_SET,EPDC Interrupt Set Registerr for LUT 32-63" bitfld.long 0x34 31. " LUT63_CMPLT_IRQ_SET ,LUT63 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 30. " [62] ,LUT62 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 29. " [61] ,LUT61 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 28. " [60] ,LUT60 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 27. " [59] ,LUT59 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 26. " [58] ,LUT58 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 25. " [57] ,LUT57 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 24. " [56] ,LUT56 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 23. " [55] ,LUT55 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 22. " [54] ,LUT54 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 21. " [53] ,LUT53 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 20. " [52] ,LUT52 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 19. " [51] ,LUT51 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 18. " [50] ,LUT50 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 17. " [49] ,LUT49 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 16. " [48] ,LUT48 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 15. " [47] ,LUT47 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 14. " [46] ,LUT46 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 13. " [45] ,LUT45 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 12. " [44] ,LUT44 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 11. " [43] ,LUT43 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 10. " [42] ,LUT42 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 9. " [41] ,LUT41 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 8. " [40] ,LUT40 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 7. " [39] ,LUT39 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 6. " [38] ,LUT38 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 5. " [37] ,LUT37 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 4. " [36] ,LUT36 Complete Interrupt Set" "No effect,Set" textline " " bitfld.long 0x34 3. " [35] ,LUT35 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 2. " [34] ,LUT34 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 1. " [33] ,LUT33 Complete Interrupt Set" "No effect,Set" bitfld.long 0x34 0. " [32] ,LUT32 Complete Interrupt Set" "No effect,Set" line.long 0x38 "IRQ2_CLR,EPDC Interrupt Clear Registerr for LUT 32-63" bitfld.long 0x38 31. " LUT63_CMPLT_IRQ_CLR ,LUT63 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 30. " [62] ,LUT62 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 29. " [61] ,LUT61 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 28. " [60] ,LUT60 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 27. " [59] ,LUT59 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 26. " [58] ,LUT58 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 25. " [57] ,LUT57 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 24. " [56] ,LUT56 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 23. " [55] ,LUT55 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 22. " [54] ,LUT54 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 21. " [53] ,LUT53 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 20. " [52] ,LUT52 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 19. " [51] ,LUT51 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 18. " [50] ,LUT50 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 17. " [49] ,LUT49 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 16. " [48] ,LUT48 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 15. " [47] ,LUT47 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 14. " [46] ,LUT46 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 13. " [45] ,LUT45 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 12. " [44] ,LUT44 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 11. " [43] ,LUT43 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 10. " [42] ,LUT42 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 9. " [41] ,LUT41 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 8. " [40] ,LUT40 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 7. " [39] ,LUT39 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 6. " [38] ,LUT38 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 5. " [37] ,LUT37 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 4. " [36] ,LUT36 Complete Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x38 3. " [35] ,LUT35 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 2. " [34] ,LUT34 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 1. " [33] ,LUT33 Complete Interrupt Clear" "No effect,Clear" bitfld.long 0x38 0. " [32] ,LUT32 Complete Interrupt Clear" "No effect,Clear" line.long 0x3C "IRQ2_TOG,EPDC Interrupt Toggle Registerr for LUT 32-63" bitfld.long 0x3C 31. " LUT63_CMPLT_IRQ_TOG ,LUT63 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 30. " [62] ,LUT62 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 29. " [61] ,LUT61 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 28. " [60] ,LUT60 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 27. " [59] ,LUT59 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 26. " [58] ,LUT58 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 25. " [57] ,LUT57 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 24. " [56] ,LUT56 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 23. " [55] ,LUT55 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 22. " [54] ,LUT54 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 21. " [53] ,LUT53 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 20. " [52] ,LUT52 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 19. " [51] ,LUT51 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 18. " [50] ,LUT50 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 17. " [49] ,LUT49 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 16. " [48] ,LUT48 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 15. " [47] ,LUT47 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 14. " [46] ,LUT46 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 13. " [45] ,LUT45 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 12. " [44] ,LUT44 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 11. " [43] ,LUT43 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 10. " [42] ,LUT42 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 9. " [41] ,LUT41 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 8. " [40] ,LUT40 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 7. " [39] ,LUT39 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 6. " [38] ,LUT38 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 5. " [37] ,LUT37 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 4. " [36] ,LUT36 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " bitfld.long 0x3C 3. " [35] ,LUT35 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 2. " [34] ,LUT34 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 1. " [33] ,LUT33 Complete Interrupt Toogle" "Not toggled,Toggled" bitfld.long 0x3C 0. " [32] ,LUT32 Complete Interrupt Toogle" "Not toggled,Toggled" textline " " line.long 0x40 "IRQ_MASK,EPDC IRQ Mask Register" bitfld.long 0x40 23. " PWR_IRQ_EN ,Enable power interrupt" "Disabled,Enabled" bitfld.long 0x40 22. " UPD_DONE_IRQ_EN ,Enable UPD complete interrupt" "Disabled,Enabled" bitfld.long 0x40 21. " TCE_IDLE_IRQ_EN ,Enable TCE Idle interrupt detection" "Disabled,Enabled" bitfld.long 0x40 20. " BUS_ERROR_IRQ_EN ,Enable AXI BUS ERROR interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x40 19. " FRAME_END_IRQ_EN ,Assert the current frame end interrupt" "Disabled,Enabled" bitfld.long 0x40 18. " TCE_UNDERRUN_IRQ_EN ,Enable pixel FIFO under-run condition detection" "Disabled,Enabled" bitfld.long 0x40 17. " COL_IRQ_EN ,Enable collision detection interrupts for all LUTs" "Disabled,Enabled" bitfld.long 0x40 16. " WB_CMPLT_IRQ_EN ,Enable WB complete interrupt" "Disabled,Enabled" line.long 0x44 "IRQ_MASK_SET,EPDC IRQ Mask Set Register" bitfld.long 0x44 23. " PWR_IRQ_EN ,Enable power interrupt set" "No effect,Set" bitfld.long 0x44 22. " UPD_DONE_IRQ_EN ,Enable UPD complete interrupt set" "No effect,Set" bitfld.long 0x44 21. " TCE_IDLE_IRQ_EN ,Enable TCE Idle interrupt detection set" "No effect,Set" bitfld.long 0x44 20. " BUS_ERROR_IRQ_EN ,Enable AXI BUS ERROR interrupt detection set" "No effect,Set" textline " " bitfld.long 0x44 19. " FRAME_END_IRQ_EN ,Assert the current frame end interrupt set" "No effect,Set" bitfld.long 0x44 18. " TCE_UNDERRUN_IRQ_EN ,Enable pixel FIFO under-run condition detection set" "No effect,Set" bitfld.long 0x44 17. " COL_IRQ_EN ,Enable collision detection interrupts for all LUTs set" "No effect,Set" bitfld.long 0x44 16. " WB_CMPLT_IRQ_EN ,Enable WB complete interrupt set" "No effect,Set" line.long 0x48 "IRQ_MASK_CLR,EPDC IRQ Mask Clear Register" bitfld.long 0x48 23. " PWR_IRQ_EN ,Enable power interrupt clear" "No effect,Clear" bitfld.long 0x48 22. " UPD_DONE_IRQ_EN ,Enable UPD complete interrupt clear" "No effect,Clear" bitfld.long 0x48 21. " TCE_IDLE_IRQ_EN ,Enable TCE Idle interrupt detection clear" "No effect,Clear" bitfld.long 0x48 20. " BUS_ERROR_IRQ_EN ,Enable AXI BUS ERROR interrupt detection clear" "No effect,Clear" textline " " bitfld.long 0x48 19. " FRAME_END_IRQ_EN ,Assert the current frame end interrupt clear" "No effect,Clear" bitfld.long 0x48 18. " TCE_UNDERRUN_IRQ_EN ,Enable pixel FIFO under-run condition detection clear" "No effect,Clear" bitfld.long 0x48 17. " COL_IRQ_EN ,Enable collision detection interrupts for all LUTs clear" "No effect,Clear" bitfld.long 0x48 16. " WB_CMPLT_IRQ_EN ,Enable WB complete interrupt clear" "No effect,Clear" line.long 0x4C "IRQ_MASK_TOG,EPDC IRQ Mask Toggle Register" bitfld.long 0x4C 23. " PWR_IRQ_EN ,Enable power interrupt toggle" "Not toggled,Toggled" bitfld.long 0x4C 22. " UPD_DONE_IRQ_EN ,Enable UPD complete interrupt toggle" "Not toggled,Toggled" bitfld.long 0x4C 21. " TCE_IDLE_IRQ_EN ,Enable TCE Idle interrupt detection toggle" "Not toggled,Toggled" bitfld.long 0x4C 20. " BUS_ERROR_IRQ_EN ,Enable AXI BUS ERROR interrupt detection togle" "Not toggled,Toggled" textline " " bitfld.long 0x4C 19. " FRAME_END_IRQ_EN ,Assert the current frame end interrupt toggle" "Not toggled,Toggled" bitfld.long 0x4C 18. " TCE_UNDERRUN_IRQ_EN ,Enable pixel FIFO under-run condition detection toggle" "Not toggled,Toggled" bitfld.long 0x4C 17. " COL_IRQ_EN ,Enable collision detection interrupts for all LUTs toggle" "Not toggled,Toggled" bitfld.long 0x4C 16. " WB_CMPLT_IRQ_EN ,Enable WB complete interrupt toggle" "Not toggled,Toggled" group.long 0x420++0x0F line.long 0x00 "IRQ,EPDC Interrupt Register" bitfld.long 0x00 23. " PWR_IRQ ,Power interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " UPD_DONE_IRQ ,Working buffer process complete Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " TCE_IDLE_IRQ ,Interrupt to indicate that the TCE has completed TFT frame scans and is in an idle state" "No interrupt,Interrupt" bitfld.long 0x00 20. " BUS_ERROR_IRQ ,Interrupt to indicate AXI BUS error occurs" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " FRAME_END_IRQ ,Interrupt to indicate EPDC has completed the current frame and is in the vertical blanking period" "No interrupt,Interrupt" bitfld.long 0x00 18. " TCE_UNDERRUN_IRQ ,Interrupt to indicate that a pixel FIFO under-run has occured" "No interrupt,Interrupt" bitfld.long 0x00 17. " LUT_COL_IRQ ,Collision detection interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " WB_CMPLT_IRQ ,Working buffer process complete Interrupt" "No interrupt,Interrupt" line.long 0x04 "IRQ_SET,EPDC Interrupt Set Register" bitfld.long 0x04 23. " PWR_IRQ ,Power interrupt set" "No effect,Set" bitfld.long 0x04 22. " UPD_DONE_IRQ ,Working buffer process complete Interrupt set" "No effect,Set" bitfld.long 0x04 21. " TCE_IDLE_IRQ ,Interrupt to indicate that the TCE has completed TFT frame scans and is in an idle state set" "No effect,Set" bitfld.long 0x04 20. " BUS_ERROR_IRQ ,Interrupt to indicate AXI BUS error occurs set" "No effect,Set" textline " " bitfld.long 0x04 19. " FRAME_END_IRQ ,Interrupt to indicate EPDC has completed the current frame and is in the vertical blanking period set" "No effect,Set" bitfld.long 0x04 18. " TCE_UNDERRUN_IRQ ,Interrupt to indicate that a pixel FIFO under-run has occured set" "No effect,Set" bitfld.long 0x04 17. " LUT_COL_IRQ ,Collision detection interrupt set" "No effect,Set" bitfld.long 0x04 16. " WB_CMPLT_IRQ ,Working buffer process complete Interrupt set" "No effect,Set" line.long 0x08 "IRQ_CLR,EPDC Interrupt Clear Register" bitfld.long 0x08 23. " PWR_IRQ ,Power interrupt clear" "No effect,Clear" bitfld.long 0x08 22. " UPD_DONE_IRQ ,Working buffer process complete Interrupt clear" "No effect,Clear" bitfld.long 0x08 21. " TCE_IDLE_IRQ ,Interrupt to indicate that the TCE has completed TFT frame scans and is in an idle state clear" "No effect,Clear" bitfld.long 0x08 20. " BUS_ERROR_IRQ ,Interrupt to indicate AXI BUS error occurs clear" "No effect,Clear" textline " " bitfld.long 0x08 19. " FRAME_END_IRQ ,Interrupt to indicate EPDC has completed the current frame and is in the vertical blanking period clear" "No effect,Clear" bitfld.long 0x08 18. " TCE_UNDERRUN_IRQ ,Interrupt to indicate that a pixel FIFO under-run has occured clear" "No effect,Clear" bitfld.long 0x08 17. " LUT_COL_IRQ ,Collision detection interrupt clear" "No effect,Clear" bitfld.long 0x08 16. " WB_CMPLT_IRQ ,Working buffer process complete Interrupt clear" "No effect,Clear" line.long 0x0C "IRQ_TOG,EPDC Interrupt Toggle Register" bitfld.long 0x0C 23. " PWR_IRQ ,Power interrupt toggle" "Not toggled,Toggled" bitfld.long 0x0C 22. " UPD_DONE_IRQ ,Working buffer process complete Interrupt toggle" "Not toggled,Toggled" bitfld.long 0x0C 21. " TCE_IDLE_IRQ ,Interrupt to indicate that the TCE has completed TFT frame scans and is in an idle state toggle" "Not toggled,Toggled" bitfld.long 0x0C 20. " BUS_ERROR_IRQ ,Interrupt to indicate AXI BUS error occurs toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 19. " FRAME_END_IRQ ,Interrupt to indicate EPDC has completed the current frame and is in the vertical blanking period toggle" "Not toggled,Toggled" bitfld.long 0x0C 18. " TCE_UNDERRUN_IRQ ,Interrupt to indicate that a pixel FIFO under-run has occured toggle" "Not toggled,Toggled" bitfld.long 0x0C 17. " LUT_COL_IRQ ,Collision detection interrupt toggle" "Not toggled,Toggled" bitfld.long 0x0C 16. " WB_CMPLT_IRQ ,Working buffer process complete Interrupt toggle" "Not toggled,Toggled" textline " " group.long 0x440++0x1F line.long 0x00 "STATUS_LUTS1,EPDC Status Register - LUTs" bitfld.long 0x00 31. " LUT31_STS ,LUT31 Status" "Idle,Active" bitfld.long 0x00 30. " [30] ,LUT30 Status" "Idle,Active" bitfld.long 0x00 29. " [29] ,LUT29 Status" "Idle,Active" bitfld.long 0x00 28. " [28] ,LUT28 Status" "Idle,Active" textline " " bitfld.long 0x00 27. " [27] ,LUT27 Status" "Idle,Active" bitfld.long 0x00 26. " [26] ,LUT26 Status" "Idle,Active" bitfld.long 0x00 25. " [25] ,LUT25 Status" "Idle,Active" bitfld.long 0x00 24. " [24] ,LUT24 Status" "Idle,Active" textline " " bitfld.long 0x00 23. " [23] ,LUT23 Status" "Idle,Active" bitfld.long 0x00 22. " [22] ,LUT22 Status" "Idle,Active" bitfld.long 0x00 21. " [21] ,LUT21 Status" "Idle,Active" bitfld.long 0x00 20. " [20] ,LUT20 Status" "Idle,Active" textline " " bitfld.long 0x00 19. " [19] ,LUT19 Status" "Idle,Active" bitfld.long 0x00 18. " [18] ,LUT18 Status" "Idle,Active" bitfld.long 0x00 17. " [17] ,LUT17 Status" "Idle,Active" bitfld.long 0x00 16. " [16] ,LUT16 Status" "Idle,Active" textline " " bitfld.long 0x00 15. " [15] ,LUT15 Status" "Idle,Active" bitfld.long 0x00 14. " [14] ,LUT14 Status" "Idle,Active" bitfld.long 0x00 13. " [13] ,LUT13 Status" "Idle,Active" bitfld.long 0x00 12. " [12] ,LUT12 Status" "Idle,Active" textline " " bitfld.long 0x00 11. " [11] ,LUT11 Status" "Idle,Active" bitfld.long 0x00 10. " [10] ,LUT10 Status" "Idle,Active" bitfld.long 0x00 9. " [9] ,LUT9 Status" "Idle,Active" bitfld.long 0x00 8. " [8] ,LUT8 Status" "Idle,Active" textline " " bitfld.long 0x00 7. " [7] ,LUT7 Status" "Idle,Active" bitfld.long 0x00 6. " [6] ,LUT6 Status" "Idle,Active" bitfld.long 0x00 5. " [5] ,LUT5 Status" "Idle,Active" bitfld.long 0x00 4. " [4] ,LUT4 Status" "Idle,Active" textline " " bitfld.long 0x00 3. " [3] ,LUT3 Status" "Idle,Active" bitfld.long 0x00 2. " [2] ,LUT2 Status" "Idle,Active" bitfld.long 0x00 1. " [1] ,LUT1 Status" "Idle,Active" bitfld.long 0x00 0. " [0] ,LUT0 Status" "Idle,Active" line.long 0x04 "STATUS_LUTS1_SET,EPDC Status Set Register - LUTs" bitfld.long 0x04 31. " LUT31_STS ,LUT31 Status Set" "No effect,Set" bitfld.long 0x04 30. " [30] ,LUT30 Status Set" "No effect,Set" bitfld.long 0x04 29. " [29] ,LUT29 Status Set" "No effect,Set" bitfld.long 0x04 28. " [28] ,LUT28 Status Set" "No effect,Set" textline " " bitfld.long 0x04 27. " [27] ,LUT27 Status Set" "No effect,Set" bitfld.long 0x04 26. " [26] ,LUT26 Status Set" "No effect,Set" bitfld.long 0x04 25. " [25] ,LUT25 Status Set" "No effect,Set" bitfld.long 0x04 24. " [24] ,LUT24 Status Set" "No effect,Set" textline " " bitfld.long 0x04 23. " [23] ,LUT23 Status Set" "No effect,Set" bitfld.long 0x04 22. " [22] ,LUT22 Status Set" "No effect,Set" bitfld.long 0x04 21. " [21] ,LUT21 Status Set" "No effect,Set" bitfld.long 0x04 20. " [20] ,LUT20 Status Set" "No effect,Set" textline " " bitfld.long 0x04 19. " [19] ,LUT19 Status Set" "No effect,Set" bitfld.long 0x04 18. " [18] ,LUT18 Status Set" "No effect,Set" bitfld.long 0x04 17. " [17] ,LUT17 Status Set" "No effect,Set" bitfld.long 0x04 16. " [16] ,LUT16 Status Set" "No effect,Set" textline " " bitfld.long 0x04 15. " [15] ,LUT15 Status Set" "No effect,Set" bitfld.long 0x04 14. " [14] ,LUT14 Status Set" "No effect,Set" bitfld.long 0x04 13. " [13] ,LUT13 Status Set" "No effect,Set" bitfld.long 0x04 12. " [12] ,LUT12 Status Set" "No effect,Set" textline " " bitfld.long 0x04 11. " [11] ,LUT11 Status Set" "No effect,Set" bitfld.long 0x04 10. " [10] ,LUT10 Status Set" "No effect,Set" bitfld.long 0x04 9. " [9] ,LUT9 Status Set" "No effect,Set" bitfld.long 0x04 8. " [8] ,LUT8 Status Set" "No effect,Set" textline " " bitfld.long 0x04 7. " [7] ,LUT7 Status Set" "No effect,Set" bitfld.long 0x04 6. " [6] ,LUT6 Status Set" "No effect,Set" bitfld.long 0x04 5. " [5] ,LUT5 Status Set" "No effect,Set" bitfld.long 0x04 4. " [4] ,LUT4 Status Set" "No effect,Set" textline " " bitfld.long 0x04 3. " [3] ,LUT3 Status Set" "No effect,Set" bitfld.long 0x04 2. " [2] ,LUT2 Status Set" "No effect,Set" bitfld.long 0x04 1. " [1] ,LUT1 Status Set" "No effect,Set" bitfld.long 0x04 0. " [0] ,LUT0 Status Set" "No effect,Set" line.long 0x08 "STATUS_LUTS1_CLR,EPDC Status Clear Register - LUTs" bitfld.long 0x08 31. " LUT31_STS ,LUT31 Status Clear" "No effect,Clear" bitfld.long 0x08 30. " [30] ,LUT30 Status Clear" "No effect,Clear" bitfld.long 0x08 29. " [29] ,LUT29 Status Clear" "No effect,Clear" bitfld.long 0x08 28. " [28] ,LUT28 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 27. " [27] ,LUT27 Status Clear" "No effect,Clear" bitfld.long 0x08 26. " [26] ,LUT26 Status Clear" "No effect,Clear" bitfld.long 0x08 25. " [25] ,LUT25 Status Clear" "No effect,Clear" bitfld.long 0x08 24. " [24] ,LUT24 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 23. " [23] ,LUT23 Status Clear" "No effect,Clear" bitfld.long 0x08 22. " [22] ,LUT22 Status Clear" "No effect,Clear" bitfld.long 0x08 21. " [21] ,LUT21 Status Clear" "No effect,Clear" bitfld.long 0x08 20. " [20] ,LUT20 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 19. " [19] ,LUT19 Status Clear" "No effect,Clear" bitfld.long 0x08 18. " [18] ,LUT18 Status Clear" "No effect,Clear" bitfld.long 0x08 17. " [17] ,LUT17 Status Clear" "No effect,Clear" bitfld.long 0x08 16. " [16] ,LUT16 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 15. " [15] ,LUT15 Status Clear" "No effect,Clear" bitfld.long 0x08 14. " [14] ,LUT14 Status Clear" "No effect,Clear" bitfld.long 0x08 13. " [13] ,LUT13 Status Clear" "No effect,Clear" bitfld.long 0x08 12. " [12] ,LUT12 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 11. " [11] ,LUT11 Status Clear" "No effect,Clear" bitfld.long 0x08 10. " [10] ,LUT10 Status Clear" "No effect,Clear" bitfld.long 0x08 9. " [9] ,LUT9 Status Clear" "No effect,Clear" bitfld.long 0x08 8. " [8] ,LUT8 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 7. " [7] ,LUT7 Status Clear" "No effect,Clear" bitfld.long 0x08 6. " [6] ,LUT6 Status Clear" "No effect,Clear" bitfld.long 0x08 5. " [5] ,LUT5 Status Clear" "No effect,Clear" bitfld.long 0x08 4. " [4] ,LUT4 Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,LUT3 Status Clear" "No effect,Clear" bitfld.long 0x08 2. " [2] ,LUT2 Status Clear" "No effect,Clear" bitfld.long 0x08 1. " [1] ,LUT1 Status Clear" "No effect,Clear" bitfld.long 0x08 0. " [0] ,LUT0 Status Clear" "No effect,Clear" line.long 0x0C "STATUS_LUTS1_TOG,EPDC Status Toggle Register - LUTs" bitfld.long 0x0C 31. " LUT31_STS ,LUT31 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 30. " [30] ,LUT30 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 29. " [29] ,LUT29 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 28. " [28] ,LUT28 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 27. " [27] ,LUT27 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 26. " [26] ,LUT26 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 25. " [25] ,LUT25 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 24. " [24] ,LUT24 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 23. " [23] ,LUT23 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 22. " [22] ,LUT22 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 21. " [21] ,LUT21 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 20. " [20] ,LUT20 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 19. " [19] ,LUT19 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 18. " [18] ,LUT18 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 17. " [17] ,LUT17 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 16. " [16] ,LUT16 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 15. " [15] ,LUT15 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 14. " [14] ,LUT14 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 13. " [13] ,LUT13 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 12. " [12] ,LUT12 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 11. " [11] ,LUT11 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 10. " [10] ,LUT10 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 9. " [9] ,LUT9 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 8. " [8] ,LUT8 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 7. " [7] ,LUT7 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 6. " [6] ,LUT6 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 5. " [5] ,LUT5 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 4. " [4] ,LUT4 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " [3] ,LUT3 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 2. " [2] ,LUT2 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 1. " [1] ,LUT1 Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 0. " [0] ,LUT0 Status Toggle" "Not toggled,Toggled" line.long 0x10 "STATUS_LUTS2,EPDC Status Register - LUTs" bitfld.long 0x10 31. " LUT63_STS ,LUT63 Status" "Idle,Active" bitfld.long 0x10 30. " [62] ,LUT62 Status" "Idle,Active" bitfld.long 0x10 29. " [61] ,LUT61 Status" "Idle,Active" bitfld.long 0x10 28. " [60] ,LUT60 Status" "Idle,Active" textline " " bitfld.long 0x10 27. " [59] ,LUT59 Status" "Idle,Active" bitfld.long 0x10 26. " [58] ,LUT58 Status" "Idle,Active" bitfld.long 0x10 25. " [57] ,LUT57 Status" "Idle,Active" bitfld.long 0x10 24. " [56] ,LUT56 Status" "Idle,Active" textline " " bitfld.long 0x10 23. " [55] ,LUT55 Status" "Idle,Active" bitfld.long 0x10 22. " [54] ,LUT54 Status" "Idle,Active" bitfld.long 0x10 21. " [53] ,LUT53 Status" "Idle,Active" bitfld.long 0x10 20. " [52] ,LUT52 Status" "Idle,Active" textline " " bitfld.long 0x10 19. " [51] ,LUT51 Status" "Idle,Active" bitfld.long 0x10 18. " [50] ,LUT50 Status" "Idle,Active" bitfld.long 0x10 17. " [49] ,LUT49 Status" "Idle,Active" bitfld.long 0x10 16. " [48] ,LUT48 Status" "Idle,Active" textline " " bitfld.long 0x10 15. " [47] ,LUT47 Status" "Idle,Active" bitfld.long 0x10 14. " [46] ,LUT46 Status" "Idle,Active" bitfld.long 0x10 13. " [45] ,LUT45 Status" "Idle,Active" bitfld.long 0x10 12. " [44] ,LUT44 Status" "Idle,Active" textline " " bitfld.long 0x10 11. " [43] ,LUT43 Status" "Idle,Active" bitfld.long 0x10 10. " [42] ,LUT42 Status" "Idle,Active" bitfld.long 0x10 9. " [41] ,LUT41 Status" "Idle,Active" bitfld.long 0x10 8. " [40] ,LUT40 Status" "Idle,Active" textline " " bitfld.long 0x10 7. " [39] ,LUT39 Status" "Idle,Active" bitfld.long 0x10 6. " [38] ,LUT38 Status" "Idle,Active" bitfld.long 0x10 5. " [37] ,LUT37 Status" "Idle,Active" bitfld.long 0x10 4. " [36] ,LUT36 Status" "Idle,Active" textline " " bitfld.long 0x10 3. " [35] ,LUT35 Status" "Idle,Active" bitfld.long 0x10 2. " [34] ,LUT34 Status" "Idle,Active" bitfld.long 0x10 1. " [33] ,LUT33 Status" "Idle,Active" bitfld.long 0x10 0. " [32] ,LUT32 Status" "Idle,Active" line.long 0x14 "STATUS_LUTS2_SET,EPDC Status Set Register - LUTs" bitfld.long 0x14 31. " LUT63_STS ,LUT63 Status Set" "No effect,Set" bitfld.long 0x14 30. " [62] ,LUT62 Status Set" "No effect,Set" bitfld.long 0x14 29. " [61] ,LUT61 Status Set" "No effect,Set" bitfld.long 0x14 28. " [60] ,LUT60 Status Set" "No effect,Set" textline " " bitfld.long 0x14 27. " [59] ,LUT59 Status Set" "No effect,Set" bitfld.long 0x14 26. " [58] ,LUT58 Status Set" "No effect,Set" bitfld.long 0x14 25. " [57] ,LUT57 Status Set" "No effect,Set" bitfld.long 0x14 24. " [56] ,LUT56 Status Set" "No effect,Set" textline " " bitfld.long 0x14 23. " [55] ,LUT55 Status Set" "No effect,Set" bitfld.long 0x14 22. " [54] ,LUT54 Status Set" "No effect,Set" bitfld.long 0x14 21. " [53] ,LUT53 Status Set" "No effect,Set" bitfld.long 0x14 20. " [52] ,LUT52 Status Set" "No effect,Set" textline " " bitfld.long 0x14 19. " [51] ,LUT51 Status Set" "No effect,Set" bitfld.long 0x14 18. " [50] ,LUT50 Status Set" "No effect,Set" bitfld.long 0x14 17. " [49] ,LUT49 Status Set" "No effect,Set" bitfld.long 0x14 16. " [48] ,LUT48 Status Set" "No effect,Set" textline " " bitfld.long 0x14 15. " [47] ,LUT47 Status Set" "No effect,Set" bitfld.long 0x14 14. " [46] ,LUT46 Status Set" "No effect,Set" bitfld.long 0x14 13. " [45] ,LUT45 Status Set" "No effect,Set" bitfld.long 0x14 12. " [44] ,LUT44 Status Set" "No effect,Set" textline " " bitfld.long 0x14 11. " [43] ,LUT43 Status Set" "No effect,Set" bitfld.long 0x14 10. " [42] ,LUT42 Status Set" "No effect,Set" bitfld.long 0x14 9. " [41] ,LUT41 Status Set" "No effect,Set" bitfld.long 0x14 8. " [40] ,LUT40 Status Set" "No effect,Set" textline " " bitfld.long 0x14 7. " [39] ,LUT39 Status Set" "No effect,Set" bitfld.long 0x14 6. " [38] ,LUT38 Status Set" "No effect,Set" bitfld.long 0x14 5. " [37] ,LUT37 Status Set" "No effect,Set" bitfld.long 0x14 4. " [36] ,LUT36 Status Set" "No effect,Set" textline " " bitfld.long 0x14 3. " [35] ,LUT35 Status Set" "No effect,Set" bitfld.long 0x14 2. " [34] ,LUT34 Status Set" "No effect,Set" bitfld.long 0x14 1. " [33] ,LUT33 Status Set" "No effect,Set" bitfld.long 0x14 0. " [32] ,LUT32 Status Set" "No effect,Set" line.long 0x18 "STATUS_LUTS2_CLR,EPDC Status Clear Register - LUTs" bitfld.long 0x18 31. " LUT63_STS ,LUT63 Status Clear" "No effect,Clear" bitfld.long 0x18 30. " [62] ,LUT62 Status Set" "No effect,Set" bitfld.long 0x18 29. " [61] ,LUT61 Status Set" "No effect,Set" bitfld.long 0x18 28. " [60] ,LUT60 Status Set" "No effect,Set" textline " " bitfld.long 0x18 27. " [59] ,LUT59 Status Set" "No effect,Set" bitfld.long 0x18 26. " [58] ,LUT58 Status Set" "No effect,Set" bitfld.long 0x18 25. " [57] ,LUT57 Status Set" "No effect,Set" bitfld.long 0x18 24. " [56] ,LUT56 Status Set" "No effect,Set" textline " " bitfld.long 0x18 23. " [55] ,LUT55 Status Set" "No effect,Set" bitfld.long 0x18 22. " [54] ,LUT54 Status Set" "No effect,Set" bitfld.long 0x18 21. " [53] ,LUT53 Status Set" "No effect,Set" bitfld.long 0x18 20. " [52] ,LUT52 Status Set" "No effect,Set" textline " " bitfld.long 0x18 19. " [51] ,LUT51 Status Set" "No effect,Set" bitfld.long 0x18 18. " [50] ,LUT50 Status Set" "No effect,Set" bitfld.long 0x18 17. " [49] ,LUT49 Status Set" "No effect,Set" bitfld.long 0x18 16. " [48] ,LUT48 Status Set" "No effect,Set" textline " " bitfld.long 0x18 15. " [47] ,LUT47 Status Set" "No effect,Set" bitfld.long 0x18 14. " [46] ,LUT46 Status Set" "No effect,Set" bitfld.long 0x18 13. " [45] ,LUT45 Status Set" "No effect,Set" bitfld.long 0x18 12. " [44] ,LUT44 Status Set" "No effect,Set" textline " " bitfld.long 0x18 11. " [43] ,LUT43 Status Set" "No effect,Set" bitfld.long 0x18 10. " [42] ,LUT42 Status Set" "No effect,Set" bitfld.long 0x18 9. " [41] ,LUT41 Status Set" "No effect,Set" bitfld.long 0x18 8. " [40] ,LUT40 Status Set" "No effect,Set" textline " " bitfld.long 0x18 7. " [39] ,LUT39 Status Set" "No effect,Set" bitfld.long 0x18 6. " [38] ,LUT38 Status Set" "No effect,Set" bitfld.long 0x18 5. " [37] ,LUT37 Status Set" "No effect,Set" bitfld.long 0x18 4. " [36] ,LUT36 Status Set" "No effect,Set" textline " " bitfld.long 0x18 3. " [35] ,LUT35 Status Set" "No effect,Set" bitfld.long 0x18 2. " [34] ,LUT34 Status Set" "No effect,Set" bitfld.long 0x18 1. " [33] ,LUT33 Status Set" "No effect,Set" bitfld.long 0x18 0. " [32] ,LUT32 Status Set" "No effect,Set" line.long 0x1C "STATUS_LUTS2_TOG,EPDC Status Toggle Register - LUTs" bitfld.long 0x1C 31. " LUT63_STS ,LUT63 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 30. " [62] ,LUT62 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 29. " [61] ,LUT61 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 28. " [60] ,LUT60 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 27. " [59] ,LUT59 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 26. " [58] ,LUT58 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 25. " [57] ,LUT57 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 24. " [56] ,LUT56 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 23. " [55] ,LUT55 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 22. " [54] ,LUT54 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 21. " [53] ,LUT53 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 20. " [52] ,LUT52 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 19. " [51] ,LUT51 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 18. " [50] ,LUT50 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 17. " [49] ,LUT49 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 16. " [48] ,LUT48 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 15. " [47] ,LUT47 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 14. " [46] ,LUT46 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 13. " [45] ,LUT45 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 12. " [44] ,LUT44 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 11. " [43] ,LUT43 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 10. " [42] ,LUT42 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 9. " [41] ,LUT41 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 8. " [40] ,LUT40 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 7. " [39] ,LUT39 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 6. " [38] ,LUT38 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 5. " [37] ,LUT37 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 4. " [36] ,LUT36 Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 3. " [35] ,LUT35 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 2. " [34] ,LUT34 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 1. " [33] ,LUT33 Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 0. " [32] ,LUT32 Status Toggle" "Not toggled,Toggled" rgroup.long 0x460++0x03 line.long 0x00 "STATUS_NEXTLUT,EPDC Status Register - Next Available LUT" bitfld.long 0x00 8. " NEXT_LUT_VALID ,Checks against a LUTs full condition" "Not checked,Checked" bitfld.long 0x00 0.--5. " NEXT_LUT ,Next available LUT value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x480++0x1F line.long 0x00 "STATUS_COL1,EPDC LUT Collision Status" bitfld.long 0x00 31. " LUT31_COL_STS ,LUT31 Collision Status" "No collision,Collision" bitfld.long 0x00 30. " [30] ,LUT30 Collision Status" "No collision,Collision" bitfld.long 0x00 29. " [29] ,LUT29 Collision Status" "No collision,Collision" bitfld.long 0x00 28. " [28] ,LUT28 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 27. " [27] ,LUT27 Collision Status" "No collision,Collision" bitfld.long 0x00 26. " [26] ,LUT26 Collision Status" "No collision,Collision" bitfld.long 0x00 25. " [25] ,LUT25 Collision Status" "No collision,Collision" bitfld.long 0x00 24. " [24] ,LUT24 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 23. " [23] ,LUT23 Collision Status" "No collision,Collision" bitfld.long 0x00 22. " [22] ,LUT22 Collision Status" "No collision,Collision" bitfld.long 0x00 21. " [21] ,LUT21 Collision Status" "No collision,Collision" bitfld.long 0x00 20. " [20] ,LUT20 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 19. " [19] ,LUT19 Collision Status" "No collision,Collision" bitfld.long 0x00 18. " [18] ,LUT18 Collision Status" "No collision,Collision" bitfld.long 0x00 17. " [17] ,LUT17 Collision Status" "No collision,Collision" bitfld.long 0x00 16. " [16] ,LUT16 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 15. " [15] ,LUT15 Collision Status" "No collision,Collision" bitfld.long 0x00 14. " [14] ,LUT14 Collision Status" "No collision,Collision" bitfld.long 0x00 13. " [13] ,LUT13 Collision Status" "No collision,Collision" bitfld.long 0x00 12. " [12] ,LUT12 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 11. " [11] ,LUT11 Collision Status" "No collision,Collision" bitfld.long 0x00 10. " [10] ,LUT10 Collision Status" "No collision,Collision" bitfld.long 0x00 9. " [9] ,LUT9 Collision Status" "No collision,Collision" bitfld.long 0x00 8. " [8] ,LUT8 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 7. " [7] ,LUT7 Collision Status" "No collision,Collision" bitfld.long 0x00 6. " [6] ,LUT6 Collision Status" "No collision,Collision" bitfld.long 0x00 5. " [5] ,LUT5 Collision Status" "No collision,Collision" bitfld.long 0x00 4. " [4] ,LUT4 Collision Status" "No collision,Collision" textline " " bitfld.long 0x00 3. " [3] ,LUT3 Collision Status" "No collision,Collision" bitfld.long 0x00 2. " [2] ,LUT2 Collision Status" "No collision,Collision" bitfld.long 0x00 1. " [1] ,LUT1 Collision Status" "No collision,Collision" bitfld.long 0x00 0. " [0] ,LUT0 Collision Status" "No collision,Collision" line.long 0x04 "STATUS_COL1_SET,EPDC LUT Collision Status Set" bitfld.long 0x04 31. " LUT31_COL_STS ,LUT31 Collision Status Set" "No effect,Set" bitfld.long 0x04 30. " [30] ,LUT30 Collision Status Set" "No effect,Set" bitfld.long 0x04 29. " [29] ,LUT29 Collision Status Set" "No effect,Set" bitfld.long 0x04 28. " [28] ,LUT28 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 27. " [27] ,LUT27 Collision Status Set" "No effect,Set" bitfld.long 0x04 26. " [26] ,LUT26 Collision Status Set" "No effect,Set" bitfld.long 0x04 25. " [25] ,LUT25 Collision Status Set" "No effect,Set" bitfld.long 0x04 24. " [24] ,LUT24 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 23. " [23] ,LUT23 Collision Status Set" "No effect,Set" bitfld.long 0x04 22. " [22] ,LUT22 Collision Status Set" "No effect,Set" bitfld.long 0x04 21. " [21] ,LUT21 Collision Status Set" "No effect,Set" bitfld.long 0x04 20. " [20] ,LUT20 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 19. " [19] ,LUT19 Collision Status Set" "No effect,Set" bitfld.long 0x04 18. " [18] ,LUT18 Collision Status Set" "No effect,Set" bitfld.long 0x04 17. " [17] ,LUT17 Collision Status Set" "No effect,Set" bitfld.long 0x04 16. " [16] ,LUT16 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 15. " [15] ,LUT15 Collision Status Set" "No effect,Set" bitfld.long 0x04 14. " [14] ,LUT14 Collision Status Set" "No effect,Set" bitfld.long 0x04 13. " [13] ,LUT13 Collision Status Set" "No effect,Set" bitfld.long 0x04 12. " [12] ,LUT12 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 11. " [11] ,LUT11 Collision Status Set" "No effect,Set" bitfld.long 0x04 10. " [10] ,LUT10 Collision Status Set" "No effect,Set" bitfld.long 0x04 9. " [9] ,LUT9 Collision Status Set" "No effect,Set" bitfld.long 0x04 8. " [8] ,LUT8 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 7. " [7] ,LUT7 Collision Status Set" "No effect,Set" bitfld.long 0x04 6. " [6] ,LUT6 Collision Status Set" "No effect,Set" bitfld.long 0x04 5. " [5] ,LUT5 Collision Status Set" "No effect,Set" bitfld.long 0x04 4. " [4] ,LUT4 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x04 3. " [3] ,LUT3 Collision Status Set" "No effect,Set" bitfld.long 0x04 2. " [2] ,LUT2 Collision Status Set" "No effect,Set" bitfld.long 0x04 1. " [1] ,LUT1 Collision Status Set" "No effect,Set" bitfld.long 0x04 0. " [0] ,LUT0 Collision Status Set" "No effect,Set" line.long 0x08 "STATUS_COL1_CLR,EPDC LUT Collision Status Clear" bitfld.long 0x08 31. " LUT31_COL_STS ,LUT31 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 30. " [30] ,LUT30 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 29. " [29] ,LUT29 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 28. " [28] ,LUT28 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 27. " [27] ,LUT27 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 26. " [26] ,LUT26 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 25. " [25] ,LUT25 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 24. " [24] ,LUT24 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 23. " [23] ,LUT23 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 22. " [22] ,LUT22 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 21. " [21] ,LUT21 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 20. " [20] ,LUT20 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 19. " [19] ,LUT19 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 18. " [18] ,LUT18 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 17. " [17] ,LUT17 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 16. " [16] ,LUT16 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 15. " [15] ,LUT15 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 14. " [14] ,LUT14 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 13. " [13] ,LUT13 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 12. " [12] ,LUT12 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 11. " [11] ,LUT11 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 10. " [10] ,LUT10 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 9. " [9] ,LUT9 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 8. " [8] ,LUT8 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 7. " [7] ,LUT7 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 6. " [6] ,LUT6 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 5. " [5] ,LUT5 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 4. " [4] ,LUT4 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x08 3. " [3] ,LUT3 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 2. " [2] ,LUT2 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 1. " [1] ,LUT1 Collision Status Clear" "No effect,Clear" bitfld.long 0x08 0. " [0] ,LUT0 Collision Status Clear" "No effect,Clear" line.long 0x0C "STATUS_COL1_TOG,EPDC LUT Collision Status Toggle" bitfld.long 0x0C 31. " LUT31_COL_STS ,LUT31 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 30. " [30] ,LUT30 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 29. " [29] ,LUT29 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 28. " [28] ,LUT28 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 27. " [27] ,LUT27 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 26. " [26] ,LUT26 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 25. " [25] ,LUT25 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 24. " [24] ,LUT24 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 23. " [23] ,LUT23 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 22. " [22] ,LUT22 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 21. " [21] ,LUT21 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 20. " [20] ,LUT20 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 19. " [19] ,LUT19 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 18. " [18] ,LUT18 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 17. " [17] ,LUT17 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 16. " [16] ,LUT16 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 15. " [15] ,LUT15 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 14. " [14] ,LUT14 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 13. " [13] ,LUT13 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 12. " [12] ,LUT12 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 11. " [11] ,LUT11 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 10. " [10] ,LUT10 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 9. " [9] ,LUT9 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 8. " [8] ,LUT8 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 7. " [7] ,LUT7 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 6. " [6] ,LUT6 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 5. " [5] ,LUT5 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 4. " [4] ,LUT4 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " [3] ,LUT3 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 2. " [2] ,LUT2 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 1. " [1] ,LUT1 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x0C 0. " [0] ,LUT0 Collision Status Toggle" "Not toggled,Toggled" line.long 0x10 "STATUS_COL2,EPDC LUT Collision Status" bitfld.long 0x10 31. " LUT63_COL_STS ,LUT63 Collision Status" "No collision,Collision" bitfld.long 0x10 30. " [62] ,LUT62 Collision Status" "No collision,Collision" bitfld.long 0x10 29. " [61] ,LUT61 Collision Status" "No collision,Collision" bitfld.long 0x10 28. " [60] ,LUT60 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 27. " [59] ,LUT59 Collision Status" "No collision,Collision" bitfld.long 0x10 26. " [58] ,LUT58 Collision Status" "No collision,Collision" bitfld.long 0x10 25. " [57] ,LUT57 Collision Status" "No collision,Collision" bitfld.long 0x10 24. " [56] ,LUT56 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 23. " [55] ,LUT55 Collision Status" "No collision,Collision" bitfld.long 0x10 22. " [54] ,LUT54 Collision Status" "No collision,Collision" bitfld.long 0x10 21. " [53] ,LUT53 Collision Status" "No collision,Collision" bitfld.long 0x10 20. " [52] ,LUT52 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 19. " [51] ,LUT51 Collision Status" "No collision,Collision" bitfld.long 0x10 18. " [50] ,LUT50 Collision Status" "No collision,Collision" bitfld.long 0x10 17. " [49] ,LUT49 Collision Status" "No collision,Collision" bitfld.long 0x10 16. " [48] ,LUT48 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 15. " [47] ,LUT47 Collision Status" "No collision,Collision" bitfld.long 0x10 14. " [46] ,LUT46 Collision Status" "No collision,Collision" bitfld.long 0x10 13. " [45] ,LUT45 Collision Status" "No collision,Collision" bitfld.long 0x10 12. " [44] ,LUT44 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 11. " [43] ,LUT43 Collision Status" "No collision,Collision" bitfld.long 0x10 10. " [42] ,LUT42 Collision Status" "No collision,Collision" bitfld.long 0x10 9. " [41] ,LUT41 Collision Status" "No collision,Collision" bitfld.long 0x10 8. " [40] ,LUT40 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 7. " [39] ,LUT39 Collision Status" "No collision,Collision" bitfld.long 0x10 6. " [38] ,LUT38 Collision Status" "No collision,Collision" bitfld.long 0x10 5. " [37] ,LUT37 Collision Status" "No collision,Collision" bitfld.long 0x10 4. " [36] ,LUT36 Collision Status" "No collision,Collision" textline " " bitfld.long 0x10 3. " [35] ,LUT35 Collision Status" "No collision,Collision" bitfld.long 0x10 2. " [34] ,LUT34 Collision Status" "No collision,Collision" bitfld.long 0x10 1. " [33] ,LUT33 Collision Status" "No collision,Collision" bitfld.long 0x10 0. " [32] ,LUT32 Collision Status" "No collision,Collision" line.long 0x14 "STATUS_COL2_SET,EPDC LUT Collision Status Set" bitfld.long 0x14 31. " LUTN_COL_STS ,LUT63 Collision Status Set" "No effect,Set" bitfld.long 0x14 30. " [62] ,LUT62 Collision Status Set" "No effect,Set" bitfld.long 0x14 29. " [61] ,LUT61 Collision Status Set" "No effect,Set" bitfld.long 0x14 28. " [60] ,LUT60 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 27. " [59] ,LUT59 Collision Status Set" "No effect,Set" bitfld.long 0x14 26. " [58] ,LUT58 Collision Status Set" "No effect,Set" bitfld.long 0x14 25. " [57] ,LUT57 Collision Status Set" "No effect,Set" bitfld.long 0x14 24. " [56] ,LUT56 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 23. " [55] ,LUT55 Collision Status Set" "No effect,Set" bitfld.long 0x14 22. " [54] ,LUT54 Collision Status Set" "No effect,Set" bitfld.long 0x14 21. " [53] ,LUT53 Collision Status Set" "No effect,Set" bitfld.long 0x14 20. " [52] ,LUT52 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 19. " [51] ,LUT51 Collision Status Set" "No effect,Set" bitfld.long 0x14 18. " [50] ,LUT50 Collision Status Set" "No effect,Set" bitfld.long 0x14 17. " [49] ,LUT49 Collision Status Set" "No effect,Set" bitfld.long 0x14 16. " [48] ,LUT48 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 15. " [47] ,LUT47 Collision Status Set" "No effect,Set" bitfld.long 0x14 14. " [46] ,LUT46 Collision Status Set" "No effect,Set" bitfld.long 0x14 13. " [45] ,LUT45 Collision Status Set" "No effect,Set" bitfld.long 0x14 12. " [44] ,LUT44 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 11. " [43] ,LUT43 Collision Status Set" "No effect,Set" bitfld.long 0x14 10. " [42] ,LUT42 Collision Status Set" "No effect,Set" bitfld.long 0x14 9. " [41] ,LUT41 Collision Status Set" "No effect,Set" bitfld.long 0x14 8. " [40] ,LUT40 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 7. " [39] ,LUT39 Collision Status Set" "No effect,Set" bitfld.long 0x14 6. " [38] ,LUT38 Collision Status Set" "No effect,Set" bitfld.long 0x14 5. " [37] ,LUT37 Collision Status Set" "No effect,Set" bitfld.long 0x14 4. " [36] ,LUT36 Collision Status Set" "No effect,Set" textline " " bitfld.long 0x14 3. " [35] ,LUT35 Collision Status Set" "No effect,Set" bitfld.long 0x14 2. " [34] ,LUT34 Collision Status Set" "No effect,Set" bitfld.long 0x14 1. " [33] ,LUT33 Collision Status Set" "No effect,Set" bitfld.long 0x14 0. " [32] ,LUT32 Collision Status Set" "No effect,Set" line.long 0x18 "STATUS_COL2_CLR,EPDC LUT Collision Status Clear" bitfld.long 0x18 31. " LUTN_COL_STS ,LUT63 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 30. " [62] ,LUT62 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 29. " [61] ,LUT61 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 28. " [60] ,LUT60 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 27. " [59] ,LUT59 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 26. " [58] ,LUT58 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 25. " [57] ,LUT57 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 24. " [56] ,LUT56 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 23. " [55] ,LUT55 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 22. " [54] ,LUT54 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 21. " [53] ,LUT53 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 20. " [52] ,LUT52 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 19. " [51] ,LUT51 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 18. " [50] ,LUT50 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 17. " [49] ,LUT49 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 16. " [48] ,LUT48 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 15. " [47] ,LUT47 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 14. " [46] ,LUT46 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 13. " [45] ,LUT45 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 12. " [44] ,LUT44 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 11. " [43] ,LUT43 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 10. " [42] ,LUT42 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 9. " [41] ,LUT41 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 8. " [40] ,LUT40 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 7. " [39] ,LUT39 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 6. " [38] ,LUT38 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 5. " [37] ,LUT37 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 4. " [36] ,LUT36 Collision Status Clear" "No effect,Clear" textline " " bitfld.long 0x18 3. " [35] ,LUT35 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 2. " [34] ,LUT34 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 1. " [33] ,LUT33 Collision Status Clear" "No effect,Clear" bitfld.long 0x18 0. " [32] ,LUT32 Collision Status Clear" "No effect,Clear" line.long 0x1C "STATUS_COL2_TOG,EPDC LUT Collision Status Toggle" bitfld.long 0x1C 31. " LUTN_COL_STS ,LUT63 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 30. " [62] ,LUT62 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 29. " [61] ,LUT61 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 28. " [60] ,LUT60 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 27. " [59] ,LUT59 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 26. " [58] ,LUT58 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 25. " [57] ,LUT57 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 24. " [56] ,LUT56 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 23. " [55] ,LUT55 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 22. " [54] ,LUT54 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 21. " [53] ,LUT53 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 20. " [52] ,LUT52 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 19. " [51] ,LUT51 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 18. " [50] ,LUT50 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 17. " [49] ,LUT49 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 16. " [48] ,LUT48 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 15. " [47] ,LUT47 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 14. " [46] ,LUT46 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 13. " [45] ,LUT45 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 12. " [44] ,LUT44 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 11. " [43] ,LUT43 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 10. " [42] ,LUT42 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 9. " [41] ,LUT41 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 8. " [40] ,LUT40 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 7. " [39] ,LUT39 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 6. " [38] ,LUT38 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 5. " [37] ,LUT37 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 4. " [36] ,LUT36 Collision Status Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x1C 3. " [35] ,LUT35 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 2. " [34] ,LUT34 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 1. " [33] ,LUT33 Collision Status Toggle" "Not toggled,Toggled" bitfld.long 0x1C 0. " [32] ,LUT32 Collision Status Toggle" "Not toggled,Toggled" textline " " group.long 0x4A0++0x0F line.long 0x00 "STATUS,EPDC General Status Register" bitfld.long 0x00 20. " HIST_CP4 ,Existing bitmap pixels fully contained within the HIST16 (4-bit grayscale) histogram" "Not contained,Contained" bitfld.long 0x00 19. " HIST_CP3 ,Existing bitmap pixels fully contained within the HIST8 (3-bit grayscale) histogram" "Not contained,Contained" bitfld.long 0x00 18. " HIST_CP2 ,Existing bitmap pixels fully contained within the HIST4 (2-bit grayscale) histogram" "Not contained,Contained" bitfld.long 0x00 17. " HIST_CP1 ,Existing bitmap pixels fully contained within the HIST2 (black/white) histogram" "Not contained,Contained" textline " " bitfld.long 0x00 16. " HIST_CP0 ,Existing bitmap pixels fully contained within the HIST1 (single color) histogram" "Not contained,Contained" bitfld.long 0x00 12. " HIST_NP4 ,Processed bitmap pixels were fully contained within the HIST16 (4-bit grayscale) histogram" "Not contained,Contained" bitfld.long 0x00 11. " HIST_NP3 ,Processed bitmap pixels were fully contained within the HIST8 (3-bit grayscale) histogram" "Not contained,Contained" bitfld.long 0x00 10. " HIST_NP2 ,Processed bitmap pixels were fully contained within the HIST4 (2-bit grayscale) histogram" "Not contained,Contained" textline " " bitfld.long 0x00 9. " HIST_NP1 ,Processed bitmap pixels were fully contained within the HIST2 (black/white) histogram" "Not contained,Contained" bitfld.long 0x00 8. " HIST_NP0 ,Processed bitmap pixels were fully contained within the HIST1 (single color) histogram" "Not contained,Contained" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" rbitfld.long 0x00 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " rbitfld.long 0x00 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" else bitfld.long 0x00 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" bitfld.long 0x00 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " bitfld.long 0x00 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" endif line.long 0x04 "STATUS_SET,EPDC General Status Set Register" bitfld.long 0x04 20. " HIST_CP4 ,Existing bitmap pixels fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Set" bitfld.long 0x04 19. " HIST_CP3 ,Existing bitmap pixels fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Set" bitfld.long 0x04 18. " HIST_CP2 ,Existing bitmap pixels fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Set" bitfld.long 0x04 17. " HIST_CP1 ,Existing bitmap pixels fully contained within the HIST2 (black/white) histogram" "No effect,Set" textline " " bitfld.long 0x04 16. " HIST_CP0 ,Existing bitmap pixels fully contained within the HIST1 (single color) histogram" "No effect,Set" bitfld.long 0x04 12. " HIST_NP4 ,Processed bitmap pixels were fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Set" bitfld.long 0x04 11. " HIST_NP3 ,Processed bitmap pixels were fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Set" bitfld.long 0x04 10. " HIST_NP2 ,Processed bitmap pixels were fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Set" textline " " bitfld.long 0x04 9. " HIST_NP1 ,Processed bitmap pixels were fully contained within the HIST2 (black/white) histogram" "No effect,Set" bitfld.long 0x04 8. " HIST_N0 ,Processed bitmap pixels were fully contained within the HIST1 (single color) histogram" "No effect,Set" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x04 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" rbitfld.long 0x04 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " rbitfld.long 0x04 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" else bitfld.long 0x04 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" bitfld.long 0x04 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " bitfld.long 0x04 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" endif line.long 0x08 "STATUS_CLR,EPDC General Status Clear Register" bitfld.long 0x08 20. " HIST_CP4 ,Existing bitmap pixels fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Clear" bitfld.long 0x08 19. " HIST_CP3 ,Existing bitmap pixels fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Clear" bitfld.long 0x08 18. " HIST_CP2 ,Existing bitmap pixels fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Clear" bitfld.long 0x08 17. " HIST_CP1 ,Existing bitmap pixels fully contained within the HIST2 (black/white) histogram" "No effect,Clear" textline " " bitfld.long 0x08 16. " HIST_CP0 ,Existing bitmap pixels fully contained within the HIST1 (single color) histogram" "No effect,Clear" bitfld.long 0x08 12. " HIST_NP4 ,Processed bitmap pixels were fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Clear" bitfld.long 0x08 11. " HIST_NP3 ,Processed bitmap pixels were fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Clear" bitfld.long 0x08 10. " HIST_NP2 ,Processed bitmap pixels were fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Clear" textline " " bitfld.long 0x08 9. " HIST_NP1 ,Processed bitmap pixels were fully contained within the HIST2 (black/white) histogram" "No effect,Clear" bitfld.long 0x08 8. " HIST_N0 ,Processed bitmap pixels were fully contained within the HIST1 (single color) histogram" "No effect,Clear" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x08 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" rbitfld.long 0x08 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " rbitfld.long 0x08 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" else bitfld.long 0x08 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" bitfld.long 0x08 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " bitfld.long 0x08 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" endif line.long 0x0C "STATUS_TOG,EPDC General Status Toggle Register" bitfld.long 0x0C 20. " HIST_CP4 ,Existing bitmap pixels fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Toggled" bitfld.long 0x0C 19. " HIST_CP3 ,Existing bitmap pixels fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Toggled" bitfld.long 0x0C 18. " HIST_CP2 ,Existing bitmap pixels fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Toggled" bitfld.long 0x0C 17. " HIST_CP1 ,Existing bitmap pixels fully contained within the HIST2 (black/white) histogram" "No effect,Toggled" textline " " bitfld.long 0x0C 16. " HIST_CP0 ,Existing bitmap pixels fully contained within the HIST1 (single color) histogram" "No effect,Toggled" bitfld.long 0x0C 12. " HIST_NP4 ,Processed bitmap pixels were fully contained within the HIST16 (4-bit grayscale) histogram" "No effect,Toggled" bitfld.long 0x0C 11. " HIST_NP3 ,Processed bitmap pixels were fully contained within the HIST8 (3-bit grayscale) histogram" "No effect,Toggled" bitfld.long 0x0C 10. " HIST_NP2 ,Processed bitmap pixels were fully contained within the HIST4 (2-bit grayscale) histogram" "No effect,Toggled" textline " " bitfld.long 0x0C 9. " HIST_NP1 ,Processed bitmap pixels were fully contained within the HIST2 (black/white) histogram" "No effect,Toggled" bitfld.long 0x0C 8. " HIST_N0 ,Processed bitmap pixels were fully contained within the HIST1 (single color) histogram" "No effect,Toggled" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x0C 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" rbitfld.long 0x0C 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " rbitfld.long 0x0C 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" else bitfld.long 0x0C 2. " LUTS_UNDERRUN ,Status of LUT fill" "Completed all,Not enough time" bitfld.long 0x0C 1. " LUTS_BUSY ,Status of LUTs" "Not busy,Busy" textline " " bitfld.long 0x0C 0. " WB_BUSY ,Working buffer process" "Not busy,Busy" endif rgroup.long 0x4C0++0x03 line.long 0x00 "UPD_COL_CORD,EPDC Collision Region Co-ordinate" hexmask.long.word 0x00 16.--28. 1. " YCORD ,Y co-ordinate for collision region of the latest completed update" hexmask.long.word 0x00 0.--12. 1. " XCORD ,X co-ordinate for collision region of the latest completed update" rgroup.long 0x4E0++0x03 line.long 0x00 "UPD_COL_SIZE,EPDC Collision Region Size" hexmask.long.word 0x00 16.--28. 1. " HEIGHT ,Height (in pixels)" hexmask.long.word 0x00 0.--12. 1. " WIDTH ,Width (in pixels)" group.long 0x600++0x03 line.long 0x00 "HIST1_PARAM,1-level Histogram Parameter Register" bitfld.long 0x00 0.--4. " VALUE0 ,Value for 1-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x610++0x03 line.long 0x00 "HIST2_PARAM,2-level Histogram Parameter Register" bitfld.long 0x00 8.--12. " VALUE1 ,White value for 2-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE0 ,Black value for 2-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x620++0x03 line.long 0x00 "HIST4_PARAM,4-level Histogram Parameter Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 (White) value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x630++0x03 line.long 0x00 "HIST8_PARAM0,8-level Histogram Parameter 0 Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x640++0x03 line.long 0x00 "HIST8_PARAM1,8-level Histogram Parameter 1 Register" bitfld.long 0x00 24.--28. " VALUE7 ,GRAY7 (White) value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE6 ,GRAY6 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE5 ,GRAY5 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE4 ,GRAY4 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x650++0x03 line.long 0x00 "HIST16_PARAM0,16-level Histogram Parameter 0 Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x660++0x03 line.long 0x00 "HIST16_PARAM1,16-level Histogram Parameter 1 Register" bitfld.long 0x00 24.--28. " VALUE7 ,GRAY7 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE6 ,GRAY6 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE5 ,GRAY5 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE4 ,GRAY4 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x670++0x03 line.long 0x00 "HIST16_PARAM2,16-level Histogram Parameter 2 Register" bitfld.long 0x00 24.--28. " VALUE11 ,GRAY11 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE10 ,GRAY10 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE9 ,GRAY9 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE8 ,GRAY8 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x680++0x03 line.long 0x00 "HIST16_PARAM3,16-level Histogram Parameter 3 Register" bitfld.long 0x00 24.--28. " VALUE15 ,GRAY15 (White) value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE14 ,GRAY14 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE13 ,GRAY13 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE12 ,GRAY12 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x700++0x0F line.long 0x00 "GPIO,EPDC General Purpose I/O Debug register" rbitfld.long 0x00 8. " PWRSTAT ,IPP_EPDC_PWRSTAT input" "Low,High" bitfld.long 0x00 7. " PWRWAKE ,IPP_EPDC_PWRWAKE output" "Low,High" bitfld.long 0x00 6. " PWRCOM ,IPP_EPDC_PWRCOM output" "Low,High" bitfld.long 0x00 5. " PWRCTRL3 ,IPP_EPDC_PWRCTRL[3] output" "Low,High" textline " " bitfld.long 0x00 4. " PWRCTRL2 ,IPP_EPDC_PWRCTRL[2] output" "Low,High" bitfld.long 0x00 3. " PWRCTRL1 ,IPP_EPDC_PWRCTRL[1] output" "Low,High" bitfld.long 0x00 2. " PWRCTRL0 ,IPP_EPDC_PWRCTRL[0] output" "Low,High" bitfld.long 0x00 1. " BDR1 ,IPP_EPDC_BDR[1] output" "Low,High" textline " " bitfld.long 0x00 0. " BDR0 ,IPP_EPDC_BDR[0] output" "Low,High" line.long 0x04 "GPIO_SET,EPDC General Purpose I/O Debug Set register" bitfld.long 0x04 8. " PWRSTAT ,IPP_EPDC_PWRSTAT input" "No effect,Set" bitfld.long 0x04 7. " PWRWAKE ,IPP_EPDC_PWRWAKE output" "No effect,Set" bitfld.long 0x04 6. " PWRCOM ,IPP_EPDC_PWRCOM output" "No effect,Set" bitfld.long 0x04 5. " PWRCTRL3 ,IPP_EPDC_PWRCTRL[3] output" "No effect,Set" textline " " bitfld.long 0x04 4. " PWRCTRL2 ,IPP_EPDC_PWRCTRL[2] output" "No effect,Set" bitfld.long 0x04 3. " PWRCTRL1 ,IPP_EPDC_PWRCTRL[1] output" "No effect,Set" bitfld.long 0x04 2. " PWRCTRL0 ,IPP_EPDC_PWRCTRL[0] output" "No effect,Set" bitfld.long 0x04 1. " BDR1 ,IPP_EPDC_BDR[1] output" "No effect,Set" textline " " bitfld.long 0x04 0. " BDR0 ,IPP_EPDC_BDR[0] output" "No effect,Set" line.long 0x08 "GPIO_CLR,EPDC General Purpose I/O Debug Clear register" bitfld.long 0x08 8. " PWRSTAT ,IPP_EPDC_PWRSTAT input" "No effect,Clear" bitfld.long 0x08 7. " PWRWAKE ,IPP_EPDC_PWRWAKE output" "No effect,Clear" bitfld.long 0x08 6. " PWRCOM ,IPP_EPDC_PWRCOM output" "No effect,Clear" bitfld.long 0x08 5. " PWRCTRL3 ,IPP_EPDC_PWRCTRL[3] output" "No effect,Clear" textline " " bitfld.long 0x08 4. " PWRCTRL2 ,IPP_EPDC_PWRCTRL[2] output" "No effect,Clear" bitfld.long 0x08 3. " PWRCTRL1 ,IPP_EPDC_PWRCTRL[1] output" "No effect,Clear" bitfld.long 0x08 2. " PWRCTRL0 ,IPP_EPDC_PWRCTRL[0] output" "No effect,Clear" bitfld.long 0x08 1. " BDR1 ,IPP_EPDC_BDR[1] output" "No effect,Clear" textline " " bitfld.long 0x08 0. " BDR0 ,IPP_EPDC_BDR[0] output" "No effect,Clear" line.long 0x0C "GPIO_TOG,EPDC General Purpose I/O Debug Toggle register" bitfld.long 0x0C 8. " PWRSTAT ,IPP_EPDC_PWRSTAT input" "Not toggled,Toggled" bitfld.long 0x0C 7. " PWRWAKE ,IPP_EPDC_PWRWAKE output" "Not toggled,Toggled" bitfld.long 0x0C 6. " PWRCOM ,IPP_EPDC_PWRCOM output" "Not toggled,Toggled" bitfld.long 0x0C 5. " PWRCTRL3 ,IPP_EPDC_PWRCTRL[3] output" "Not toggled,Toggled" textline " " bitfld.long 0x0C 4. " PWRCTRL2 ,IPP_EPDC_PWRCTRL[2] output" "Not toggled,Toggled" bitfld.long 0x0C 3. " PWRCTRL1 ,IPP_EPDC_PWRCTRL[1] output" "Not toggled,Toggled" bitfld.long 0x0C 2. " PWRCTRL0 ,IPP_EPDC_PWRCTRL[0] output" "Not toggled,Toggled" bitfld.long 0x0C 1. " BDR1 ,IPP_EPDC_BDR[1] output" "Not toggled,Toggled" textline " " bitfld.long 0x0C 0. " BDR0 ,IPP_EPDC_BDR[0] output" "Not toggled,Toggled" group.long 0x7F0++0x03 line.long 0x00 "VERSION,EPDC Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-only value reflecting the MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-only value reflecting the MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-only value reflecting the stepping of the RTL version" group.long 0x800++0x03 line.long 0x00 "PIGEON_0 _0,Panel Interface Signal Generator Register 0 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x800+0x10)++0x03 line.long 0x00 "PIGEON_0 _1,Panel Interface Signal Generator Register 0 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x800+0x20)++0x03 line.long 0x00 "PIGEON_0 _2,Panel Interface Signal Generator Register 0 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x840++0x03 line.long 0x00 "PIGEON_1 _0,Panel Interface Signal Generator Register 1 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x840+0x10)++0x03 line.long 0x00 "PIGEON_1 _1,Panel Interface Signal Generator Register 1 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x840+0x20)++0x03 line.long 0x00 "PIGEON_1 _2,Panel Interface Signal Generator Register 1 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x880++0x03 line.long 0x00 "PIGEON_2 _0,Panel Interface Signal Generator Register 2 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x880+0x10)++0x03 line.long 0x00 "PIGEON_2 _1,Panel Interface Signal Generator Register 2 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x880+0x20)++0x03 line.long 0x00 "PIGEON_2 _2,Panel Interface Signal Generator Register 2 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x8C0++0x03 line.long 0x00 "PIGEON_3 _0,Panel Interface Signal Generator Register 3 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x8C0+0x10)++0x03 line.long 0x00 "PIGEON_3 _1,Panel Interface Signal Generator Register 3 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x8C0+0x20)++0x03 line.long 0x00 "PIGEON_3 _2,Panel Interface Signal Generator Register 3 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x900++0x03 line.long 0x00 "PIGEON_4 _0,Panel Interface Signal Generator Register 4 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x900+0x10)++0x03 line.long 0x00 "PIGEON_4 _1,Panel Interface Signal Generator Register 4 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x900+0x20)++0x03 line.long 0x00 "PIGEON_4 _2,Panel Interface Signal Generator Register 4 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x940++0x03 line.long 0x00 "PIGEON_5 _0,Panel Interface Signal Generator Register 5 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x940+0x10)++0x03 line.long 0x00 "PIGEON_5 _1,Panel Interface Signal Generator Register 5 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x940+0x20)++0x03 line.long 0x00 "PIGEON_5 _2,Panel Interface Signal Generator Register 5 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x980++0x03 line.long 0x00 "PIGEON_6 _0,Panel Interface Signal Generator Register 6 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x980+0x10)++0x03 line.long 0x00 "PIGEON_6 _1,Panel Interface Signal Generator Register 6 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x980+0x20)++0x03 line.long 0x00 "PIGEON_6 _2,Panel Interface Signal Generator Register 6 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0x9C0++0x03 line.long 0x00 "PIGEON_7 _0,Panel Interface Signal Generator Register 7 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0x9C0+0x10)++0x03 line.long 0x00 "PIGEON_7 _1,Panel Interface Signal Generator Register 7 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0x9C0+0x20)++0x03 line.long 0x00 "PIGEON_7 _2,Panel Interface Signal Generator Register 7 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xA00++0x03 line.long 0x00 "PIGEON_8 _0,Panel Interface Signal Generator Register 8 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xA00+0x10)++0x03 line.long 0x00 "PIGEON_8 _1,Panel Interface Signal Generator Register 8 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xA00+0x20)++0x03 line.long 0x00 "PIGEON_8 _2,Panel Interface Signal Generator Register 8 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xA40++0x03 line.long 0x00 "PIGEON_9 _0,Panel Interface Signal Generator Register 9 _0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xA40+0x10)++0x03 line.long 0x00 "PIGEON_9 _1,Panel Interface Signal Generator Register 9 _1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xA40+0x20)++0x03 line.long 0x00 "PIGEON_9 _2,Panel Interface Signal Generator Register 9 _1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xA80++0x03 line.long 0x00 "PIGEON_10_0,Panel Interface Signal Generator Register 10_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xA80+0x10)++0x03 line.long 0x00 "PIGEON_10_1,Panel Interface Signal Generator Register 10_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xA80+0x20)++0x03 line.long 0x00 "PIGEON_10_2,Panel Interface Signal Generator Register 10_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xAC0++0x03 line.long 0x00 "PIGEON_11_0,Panel Interface Signal Generator Register 11_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xAC0+0x10)++0x03 line.long 0x00 "PIGEON_11_1,Panel Interface Signal Generator Register 11_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xAC0+0x20)++0x03 line.long 0x00 "PIGEON_11_2,Panel Interface Signal Generator Register 11_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xB00++0x03 line.long 0x00 "PIGEON_12_0,Panel Interface Signal Generator Register 12_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xB00+0x10)++0x03 line.long 0x00 "PIGEON_12_1,Panel Interface Signal Generator Register 12_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xB00+0x20)++0x03 line.long 0x00 "PIGEON_12_2,Panel Interface Signal Generator Register 12_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xB40++0x03 line.long 0x00 "PIGEON_13_0,Panel Interface Signal Generator Register 13_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xB40+0x10)++0x03 line.long 0x00 "PIGEON_13_1,Panel Interface Signal Generator Register 13_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xB40+0x20)++0x03 line.long 0x00 "PIGEON_13_2,Panel Interface Signal Generator Register 13_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xB80++0x03 line.long 0x00 "PIGEON_14_0,Panel Interface Signal Generator Register 14_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xB80+0x10)++0x03 line.long 0x00 "PIGEON_14_1,Panel Interface Signal Generator Register 14_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xB80+0x20)++0x03 line.long 0x00 "PIGEON_14_2,Panel Interface Signal Generator Register 14_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xBC0++0x03 line.long 0x00 "PIGEON_15_0,Panel Interface Signal Generator Register 15_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xBC0+0x10)++0x03 line.long 0x00 "PIGEON_15_1,Panel Interface Signal Generator Register 15_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xBC0+0x20)++0x03 line.long 0x00 "PIGEON_15_2,Panel Interface Signal Generator Register 15_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." group.long 0xC00++0x03 line.long 0x00 "PIGEON_16_0,Panel Interface Signal Generator Register 16_0" hexmask.long.byte 0x00 24.--31. 1. " STATE_MASK ,Select any combination of scan states as reference point for local counter to start ticking" hexmask.long.word 0x00 12.--23. 1. " MASK_CNT ,This value matches to global counter selected" bitfld.long 0x00 8.--11. " MASK_CNT_SEL ,Select global counters as mask condition" "HSTATE_CNT,HSTATE_CYCLE,VSTATE_CNT,VSTATE_CYCLE,FRAME_CNT,FRAME_CYCLE,HCNT,VCNT,?..." bitfld.long 0x00 4.--7. " OFFSET ,Offset on pclk unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2.--3. " INC_SEL ,Event to incrment local counter" "PCLK,LINE,FRAME,SIG_ANOTHER" bitfld.long 0x00 1. " POL ,Polarity of signal output" "Active high,Active low" bitfld.long 0x00 0. " EN ,Enable pigeon mode on this signal" "Disabled,Enabled" group.long (0xC00+0x10)++0x03 line.long 0x00 "PIGEON_16_1,Panel Interface Signal Generator Register 16_1" hexmask.long.word 0x00 16.--31. 1. " CLR_CNT ,Deassert signal output when counter match this value" hexmask.long.word 0x00 0.--15. 1. " SET_CNT ,Assert signal output when counter match this value" group.long (0xC00+0x20)++0x03 line.long 0x00 "PIGEON_16_2,Panel Interface Signal Generator Register 16_1" bitfld.long 0x00 4.--8. " SIG_ANOTHER ,Select another signal for logic operation or as mask or counter tick event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " SIG_LOGIC ,Logic operation with another signal" "Disabled,AND,OR,MASK,?..." width 0x0B tree.end endif tree.open "EPIT (Enhanced Periodic Interrupt Timer)" tree "EPIT 1" base ad:0x020D0000 width 12. if ((per.l(ad:0x020D0000)&0x8)==0x8) group.long 0x00++0x03 line.long 0x00 "EPITCR1,EPIT Control Register" sif (cpuis("IMX6*")||cpuis("IMX50*")) bitfld.long 0x00 24.--25. " CLKSRC ,Clock Source" "Clock is off,Peripheral clock,High-frequency reference clock,Low-frequency reference clock" else bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,Ipg_clk,Ipg_clk_highfreq,Ipg_clk_32k" endif textline " " bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set" bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " WAITEN ,EPIT Wait Mode Enable" "Disabled,Enabled" bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled" bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset" textline " " hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " RLD ,Counter Reload Control" "Free running,Set and Forget" textline " " bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,Load value" textline " " bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "EPITCR1,EPIT Control Register" sif (cpuis("IMX6*")||cpuis("IMX50*")) bitfld.long 0x00 24.--25. " CLKSRC ,Clock Source" "Clock is off,Peripheral clock,High-frequency reference clock,Low-frequency reference clock" else bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,Ipg_clk,Ipg_clk_highfreq,Ipg_clk_32k" endif textline " " bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set" bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " WAITEN ,EPIT Wait Mode Enable" "Disabled,Enabled" bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled" bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset" textline " " hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " RLD ,Counter Reload Control" "Free running,Set and Forget" textline " " bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,0xFFFFFFFF" textline " " bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled" endif group.long 0x04++0x0b line.long 0x00 "EPITSR1,EPIT Status Register" eventfld.long 0x00 0. " OCIF ,Output Compare Interrupt Flag" "Not occurred,Occurred" line.long 0x04 "EPITLR1,EPIT Load Register" line.long 0x08 "EPITCMPR1,EPIT Compare Register" rgroup.long 0x10++0x03 line.long 0x00 "EPITCNR1,EPIT Counter Register" width 0xb tree.end tree "EPIT 2" base ad:0x020D4000 width 12. if ((per.l(ad:0x020D4000)&0x8)==0x8) group.long 0x00++0x03 line.long 0x00 "EPITCR2,EPIT Control Register" sif (cpuis("IMX6*")||cpuis("IMX50*")) bitfld.long 0x00 24.--25. " CLKSRC ,Clock Source" "Clock is off,Peripheral clock,High-frequency reference clock,Low-frequency reference clock" else bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,Ipg_clk,Ipg_clk_highfreq,Ipg_clk_32k" endif textline " " bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set" bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " WAITEN ,EPIT Wait Mode Enable" "Disabled,Enabled" bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled" bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset" textline " " hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " RLD ,Counter Reload Control" "Free running,Set and Forget" textline " " bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,Load value" textline " " bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "EPITCR2,EPIT Control Register" sif (cpuis("IMX6*")||cpuis("IMX50*")) bitfld.long 0x00 24.--25. " CLKSRC ,Clock Source" "Clock is off,Peripheral clock,High-frequency reference clock,Low-frequency reference clock" else bitfld.long 0x00 24.--25. " CLKSRC ,Select Clock Source" "Clock is off,Ipg_clk,Ipg_clk_highfreq,Ipg_clk_32k" endif textline " " bitfld.long 0x00 22.--23. " OM ,EPIT Output Configuration" "Disconnected,Toggled,Cleared,Set" bitfld.long 0x00 21. " STOPEN ,EPIT Stop Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " WAITEN ,EPIT Wait Mode Enable" "Disabled,Enabled" bitfld.long 0x00 18. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " IOVW ,EPIT Counter Overwrite Enable" "Disabled,Enabled" bitfld.long 0x00 16. " SWR ,Software Reset" "Out of reset,Reset" textline " " hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " RLD ,Counter Reload Control" "Free running,Set and Forget" textline " " bitfld.long 0x00 2. " OCIEN ,Output Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " ENMOD ,EPIT Enable Mode" "Current value,0xFFFFFFFF" textline " " bitfld.long 0x00 0. " EN ,EPIT Enable" "Disabled,Enabled" endif group.long 0x04++0x0b line.long 0x00 "EPITSR2,EPIT Status Register" eventfld.long 0x00 0. " OCIF ,Output Compare Interrupt Flag" "Not occurred,Occurred" line.long 0x04 "EPITLR2,EPIT Load Register" line.long 0x08 "EPITCMPR2,EPIT Compare Register" rgroup.long 0x10++0x03 line.long 0x00 "EPITCNR2,EPIT Counter Register" width 0xb tree.end tree.end sif (cpu()!="IMX6SOLOLITE") tree "ESAI (Enhanced Serial Audio Interface)" base ad:0x02024000 width 7. wgroup.long 0x00++0x03 line.long 0x00 "ETDR,ESAI Transmit Data Register" hgroup.long 0x04++0x03 hide.long 0x00 "ERDR,ESAI Receive Data Register" in group.long 0x08++0x03 line.long 0x00 "ECR,ESAI Control Register" bitfld.long 0x00 19. " ETI ,EXTAL Transmitter In" "HCKT normal,EXTAL muxed into HCKT" bitfld.long 0x00 18. " ETO ,EXTAL Transmitter Out" "HCKT normal,EXTAL driven onto HCKT" textline " " bitfld.long 0x00 17. " ERI ,EXTAL Receiver In" "HCKR normal,EXTAL muxed into HCKR" bitfld.long 0x00 16. " ERO ,EXTAL Receiver Out" "HCKR normal,EXTAL driven onto HCKR" textline " " bitfld.long 0x00 1. " ERST ,ESAI Reset" "No reset,Reset" sif (cpu()=="VF7XX-CM4"||cpu()=="VF6XX-CM4"||cpu()=="VF7XX-CA5"||cpu()=="VF6XX-CA5"||cpu()=="VF5XX-CA5"||cpu()=="VF4XX-CA5"||cpu()=="VF3XX-CA5"||cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6QUAD"||cpu()=="IMX6DUAL") bitfld.long 0x00 0. " ESAIEN ,ESAI Enable" "Disabled,Enabled" else bitfld.long 0x00 0. " ESAIEN ,ESAI Enable" "Enabled,Disabled" endif rgroup.long 0x0c++0x03 line.long 0x00 "ESR,ESAI Status Register" bitfld.long 0x00 10. " TINIT ,Transmit Initialization" "Finished,Not finished" bitfld.long 0x00 9. " RFF ,Receive FIFO Full" "< Rx FIFO watermark,>= Rx FIFO watermark" textline " " bitfld.long 0x00 8. " TFE ,Transmit FIFO Empty" "< Tx FIFO watermark,>= Tx FIFO watermark" bitfld.long 0x00 7. " TLS ,Transmit Last Slot" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 6. " TDE ,Transmit Data Exception" "Not highest priority,Highest priority" bitfld.long 0x00 5. " TED ,Transmit Even Data" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 4. " TD ,Transmit Data" "Not highest priority,Highest priority" bitfld.long 0x00 3. " RLS ,Receive Last Slot" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 2. " RDE ,Receive Data Exception" "Not highest priority,Highest priority" bitfld.long 0x00 1. " RED ,Receive Even Data" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 0. " RD ,Receive Data" "Not highest priority,Highest priority" group.long 0x10++0x03 line.long 0x00 "TFCR,Transmit FIFO Configuration Register" bitfld.long 0x00 19. " TIEN ,Transmitter Initialization Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " TWA ,Transmit Word Alignment" "MSB=bit 31./bits 7-0 ignored,MSB=bit 27./bits 3-0 ignored,MSB=bit 23.,MSB=bit 19./Bottom 4 bits zeroed,MSB=bit 15./Bottom 8 bits zeroed,MSB=bit 11./Bottom 12 bits zeroed,MSB=bit 7./Bottom 16 bits zeroed,MSB=bit 3./Bottom 20 bits zeroed" textline " " hexmask.long.byte 0x00 8.--15. 1. " TFWM ,Transmit FIFO Watermark" bitfld.long 0x00 7. " TE5 ,Transmitter #5 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TE4 ,Transmitter #4 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TE3 ,Transmitter #3 FIFO Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE2 ,Transmitter #2 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TE1 ,Transmitter #1 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TE0 ,Transmitter #0 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFR ,Transmit FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "TFSR,Transmit FIFO Status Register" bitfld.long 0x00 12.--14. " NTFO ,Next Transmitter FIFO Out" "#0,#1,#2,#3,#4,#5,?..." bitfld.long 0x00 8.--10. " NTFI ,Next Transmitter FIFO In" "#0,#1,#2,#3,#4,#5,?..." hexmask.long.byte 0x00 0.--7. 1. " TFCNT ,Transmit FIFO Counter" group.long 0x18++0x03 line.long 0x00 "RFCR,Receive FIFO Configuration Register" bitfld.long 0x00 19. " REXT ,Receive Extension" "Zero,Sign" textline " " bitfld.long 0x00 16.--18. " RWA ,Receive Word Alignment" "MSB=bit 31./bits 7-0 zeroed,MSB=bit 27./bits 3-0 zeroed,MSB=bit 23,MSB=bit 19./bits 3-0 ignored,MSB=bit 15./bits 7-0 ignored,MSB=bit 11./bits 11-0 ignored,MSB=bit 7./bits 15-0 ignored,MSB=bit 3./bits 19-0 ignored" textline " " hexmask.long.byte 0x00 8.--15. 1. " RFWM ,Receive FIFO Watermark" bitfld.long 0x00 5. " RE3 ,Receiver #3 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RE2 ,Receiver #2 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 3. " RE1 ,Receiver #1 FIFO Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RE0 ,Receiver #0 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RFR ,Receive FIFO Reset" "No reset,Reset" bitfld.long 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "RFSR,Receive FIFO Status Register" bitfld.long 0x00 12.--13. " NRFI ,Next Receiver FIFO In" "#0,#1,#2,#3" bitfld.long 0x00 8.--9. " NRFO ,Next Receiver FIFO Out" "#0,#1,#2,#3" hexmask.long.byte 0x00 0.--7. 1. " RFCNT ,Receive FIFO Counter" wgroup.long 0x80++0x017 line.long 0x0 "TX0,ESAI Transmit Data Register 0" hexmask.long.tbyte 0x0 0.--23. 1. " TX0 ,Stores the data to be transmitted" line.long 0x4 "TX1,ESAI Transmit Data Register 1" hexmask.long.tbyte 0x4 0.--23. 1. " TX1 ,Stores the data to be transmitted" line.long 0x8 "TX2,ESAI Transmit Data Register 2" hexmask.long.tbyte 0x8 0.--23. 1. " TX2 ,Stores the data to be transmitted" line.long 0xC "TX3,ESAI Transmit Data Register 3" hexmask.long.tbyte 0xC 0.--23. 1. " TX3 ,Stores the data to be transmitted" line.long 0x10 "TX4,ESAI Transmit Data Register 4" hexmask.long.tbyte 0x10 0.--23. 1. " TX4 ,Stores the data to be transmitted" line.long 0x14 "TX5,ESAI Transmit Data Register 5" hexmask.long.tbyte 0x14 0.--23. 1. " TX5 ,Stores the data to be transmitted" wgroup.long 0x98++0x03 line.long 0x00 "TSR,ESAI Transmit Slot Register" hexmask.long.tbyte 0x00 0.--23. 1. " TSR ,Transmit Slot Register" rgroup.long 0xa0++0x0f line.long 0x0 "RX0,ESAI Receive Data Registers 0" hexmask.long.tbyte 0x0 0.--23. 1. " RX0 ,Data from the receive shift register" line.long 0x4 "RX1,ESAI Receive Data Registers 1" hexmask.long.tbyte 0x4 0.--23. 1. " RX1 ,Data from the receive shift register" line.long 0x8 "RX2,ESAI Receive Data Registers 2" hexmask.long.tbyte 0x8 0.--23. 1. " RX2 ,Data from the receive shift register" line.long 0xC "RX3,ESAI Receive Data Registers 3" hexmask.long.tbyte 0xC 0.--23. 1. " RX3 ,Data from the receive shift register" textline " " rgroup.long 0xcc++0x03 line.long 0x00 "SAISR,ESAI Status Register" bitfld.long 0x00 17. " TODFE ,SAISR Transmit Odd-Data Register Empty" "Not empty,Empty" bitfld.long 0x00 16. " TEDE ,SAISR Transmit Even-Data Register Empty" "Not empty,Empty" bitfld.long 0x00 15. " TDE ,SAISR Transmit Data Register Empty" "Not empty,Empty" textline " " bitfld.long 0x00 14. " TUE ,SAISR Transmit Underrun Error Flag" "No error,Error" bitfld.long 0x00 13. " TFS ,SAISR Transmit Frame Sync Flag" "Not occurred,Occurred" bitfld.long 0x00 10. " RODF ,SAISR Receive Odd-Data Register Full" "Not full,Full" textline " " bitfld.long 0x00 9. " REDF ,SAISR Receive Even-Data Register Full" "Not full,Full" bitfld.long 0x00 8. " RDF ,SAISR Receive Data Register Full" "Not full,Full" bitfld.long 0x00 7. " ROE ,SAISR Receive Overrun Error Flag" "No error,Error" textline " " bitfld.long 0x00 6. " RFS ,SAISR Receive Frame Sync Flag" "Not occurred,Occurred" bitfld.long 0x00 2. " IF2 ,SAISR Serial Input Flag 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " IF1 ,SAISR Serial Inout Flag 1" "Not occurred,Occurred" bitfld.long 0x00 0. " IF0 ,SAISR Serial Input Flag 0" "Not occurred,Occurred" group.long 0xd0++0x3 line.long 0x00 "SAICR,ESAI Common Control Register" bitfld.long 0x00 8. " ALC ,SAICR Alignment Control" "23 bit,15 bit" bitfld.long 0x00 7. " TEBE ,SAICR Transmit External Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 6. " SYNC ,SAICR Synchronous Mode Selection" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 2. " OF2 ,SAICR Serial Output Flag 2" "Not occurred,Occurred" bitfld.long 0x00 1. " OF1 ,SAICR Serial Output Flag 1" "Not occurred,Occurred" bitfld.long 0x00 0. " OF0 ,SAICR Serial Output Flag 0" "Not occurred,Occurred" if ((per.l(ad:0x02024000+0xD8)&0x3e00)==0x0) group.long 0xD4++0x03 line.long 0x0 "TCR,Transmit Control Register" bitfld.long 0x0 23. " TLIE ,Transmit Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " TEDIE ,Transmit Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " TEIE ,Transmit Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " TPR ,Transmit Section Personal Reset" "No effect,Reset" bitfld.long 0x0 17. " PADC ,Transmit Zero Padding Control" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " TFSR ,Transmit Frame Sync Relative Timing" "First bit of data,Last bit of prev data" bitfld.long 0x0 15. " TFSL ,Transmit Frame Sync Length" "Word-length,1-bit clock period" textline " " bitfld.long 0x0 10.--14. " TSWS ,Transmit Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" bitfld.long 0x0 8.--9. " TMOD ,Transmit Network Mode Control" "Normal,On-Demand,,AC97" textline " " bitfld.long 0x0 7. " TWA ,Transmit Word Alignment Control" "Left,Right" bitfld.long 0x0 6. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x0 5. " TE5 ,ESAI Transmit 5 Enable" "Disabled,Enabled" bitfld.long 0x0 4. " TE4 ,ESAI Transmit 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TE3 ,ESAI Transmit 3 Enable" "Disabled,Enabled" bitfld.long 0x0 2. " TE2 ,ESAI Transmit 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TE1 ,ESAI Transmit 1 Enable" "Disabled,Enabled" bitfld.long 0x0 0. " TE0 ,ESAI Transmit 0 Enable" "Disabled,Enabled" else group.long 0xD4++0x03 line.long 0x0 "TCR,Transmit Control Register" bitfld.long 0x0 23. " TLIE ,Transmit Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " TEDIE ,Transmit Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " TEIE ,Transmit Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " TPR ,Transmit Section Personal Reset" "No effect,Reset" bitfld.long 0x0 17. " PADC ,Transmit Zero Padding Control" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " TFSR ,Transmit Frame Sync Relative Timing" "First bit of data,Last bit of prev data" bitfld.long 0x0 15. " TFSL ,Transmit Frame Sync Length" "Word-length,1-bit clock period" textline " " bitfld.long 0x0 10.--14. " TSWS ,Transmit Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" bitfld.long 0x0 8.--9. " TMOD ,Transmit Network Mode Control" "Normal,Network,,AC97" textline " " bitfld.long 0x0 7. " TWA ,Transmit Word Alignment Control" "Left,Right" bitfld.long 0x0 6. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x0 5. " TE5 ,ESAI Transmit 5 Enable" "Disabled,Enabled" bitfld.long 0x0 4. " TE4 ,ESAI Transmit 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TE3 ,ESAI Transmit 3 Enable" "Disabled,Enabled" bitfld.long 0x0 2. " TE2 ,ESAI Transmit 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TE1 ,ESAI Transmit 1 Enable" "Disabled,Enabled" bitfld.long 0x0 0. " TE0 ,ESAI Transmit 0 Enable" "Disabled,Enabled" endif if ((per.l(ad:0x02024000+0xD4)&0x300)==0x100) group.long 0xD8++0x3 line.long 0x0 "TCCR,Transmit Clock Control Register" bitfld.long 0x0 23. " THCKD ,High Frequency Clock Direction (HCKR pin) (HCKT pin)" "Input,Output" bitfld.long 0x0 22. " TFSD ,Frame Sync Signal Direction (FST pin)" "Input,Output" textline " " bitfld.long 0x0 21. " TCKD ,Transmitter Clock Source Direction (SCKT pin)" "External,Internal" bitfld.long 0x0 20. " THCKP ,Transmitter High Frequency Clock Polarity" "Normal,Inverted" textline " " bitfld.long 0x0 19. " TFSP ,Transmitter Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " TCKP ,Transmitter Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " TFP ,Tx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " TDC ,Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " TPSR ,TCCR Transmit Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " TPM ,TCCR Transmit Prescale Modulus Select (divide ratio from 1 to 256)" else group.long 0xD8++0x3 line.long 0x0 "TCCR,Transmit Clock Control Register" bitfld.long 0x0 23. " THCKD ,High Frequency Clock Direction (HCKR pin) (HCKT pin)" "Input,Output" bitfld.long 0x0 22. " TFSD ,Frame Sync Signal Direction (FST pin)" "Input,Output" textline " " bitfld.long 0x0 21. " TCKD ,Transmitter Clock Source Direction (SCKT pin)" "External,Internal" bitfld.long 0x0 20. " THCKP ,Transmitter High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " TFSP ,Transmitter Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " TCKP ,Transmitter Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " TFP ,Tx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " TDC ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " TPSR ,TCCR Transmit Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " TPM ,TCCR Transmit Prescale Modulus Select (divide ratio from 1 to 256)" endif if ((per.l(ad:0x02024000+0xE0)&0x3e00)==0x0) group.long 0xDC++0x3 line.long 0x0 "RCR,Receive Control Register" bitfld.long 0x0 23. " RLIE ,Receive Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " REDIE ,Receive Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " REIE ,Receive Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " RPR ,Receiver Section Personal Reset" "No effect,Reset" bitfld.long 0x0 16. " RFSR ,Receiver Frame Sync Relative Timing" "First bit of data,Last bit of prev data" textline " " bitfld.long 0x0 15. " RFSL ,Receiver Frame Sync Length" "Word-length,1-bit clock period" bitfld.long 0x0 10.--14. " RSWS ,Receiver Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" textline " " bitfld.long 0x0 8.--9. " RMOD ,Receiver Network Mode Control" "Normal,On-Demand,,AC97" bitfld.long 0x0 7. " RWA ,Receiver Word Alignment Control" "Left,Right" textline " " bitfld.long 0x0 6. " RSHFD ,Receiver Shift Direction" "MSB first,LSB first" bitfld.long 0x0 3. " RE3 ,ESAI Receiver 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " RE2 ,ESAI Receiver 2 Enable" "Disabled,Enabled" bitfld.long 0x0 1. " RE1 ,ESAI Receiver 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RE0 ,ESAI Receiver 0 Enable" "Disabled,Enabled" else group.long 0xDC++0x3 line.long 0x0 "RCR,Receive Control Register" bitfld.long 0x0 23. " RLIE ,Receive Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " REDIE ,Receive Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " REIE ,Receive Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " RPR ,Receiver Section Personal Reset" "No effect,Reset" bitfld.long 0x0 16. " RFSR ,Receiver Frame Sync Relative Timing" "First bit of data,Last bit of prev data" textline " " bitfld.long 0x0 15. " RFSL ,Receiver Frame Sync Length" "Word-length,1-bit clock period" bitfld.long 0x0 10.--14. " RSWS ,Receiver Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" textline " " bitfld.long 0x0 8.--9. " RMOD ,Receiver Network Mode Control" "Normal,Network,,AC97" bitfld.long 0x0 7. " RWA ,Receiver Word Alignment Control" "Left,Right" textline " " bitfld.long 0x0 6. " RSHFD ,Receiver Shift Direction" "MSB first,LSB first" bitfld.long 0x0 3. " RE3 ,ESAI Receiver 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " RE2 ,ESAI Receiver 2 Enable" "Disabled,Enabled" bitfld.long 0x0 1. " RE1 ,ESAI Receiver 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RE0 ,ESAI Receiver 0 Enable" "Disabled,Enabled" endif if ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "HCKR input,HCKR output" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "FSR input,FSR output" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "SCKR input,SCKR output" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "IF1,OF1" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x80) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" ",TxBufferEnable" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xD0)&0x40)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "HCKR input,HCKR output" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "FSR input,FSR output" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "SCKR input,SCKR output" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif (((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x0)) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "IF1,OF1" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif (((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x80)) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" ",TxBufferEnable" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" else hgroup.long 0xE0++0x3 hide.long 0x0 "RCCR,Receive Clock Control Register" endif textline " " group.long 0xe4++0xf line.long 0x00 "TSMA,ESAI Transmit Slot Mask Register A" bitfld.long 0x00 15. " TS15 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 14. " TS14 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 13. " TS13 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 12. " TS12 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TS11 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 10. " TS10 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 09. " TS09 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 08. " TS08 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 07. " TS07 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 06. " TS06 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 05. " TS05 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 04. " TS04 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 03. " TS03 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 02. " TS02 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 01. " TS01 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 00. " TS00 ,Transmit Slot" "Disabled,Enabled" line.long 0x04 "TSMB,ESAI Transmit Slot Mask Register B" bitfld.long 0x04 15. " TS31 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 14. " TS30 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 13. " TS29 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 12. " TS28 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " TS27 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 10. " TS26 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 09. " TS25 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 08. " TS24 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 07. " TS23 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 06. " TS22 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 05. " TS21 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 04. " TS20 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 03. " TS19 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 02. " TS18 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 01. " TS17 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 00. " TS16 ,Transmit Slot" "Disabled,Enabled" line.long 0x08 "RSMA,ESAI Receive Slot Mask Register A" bitfld.long 0x08 15. " RS15 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 14. " RS14 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 13. " RS13 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 12. " RS12 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " RS11 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 10. " RS10 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 09. " RS09 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 08. " RS08 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 07. " RS07 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 06. " RS06 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 05. " RS05 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 04. " RS04 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 03. " RS03 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 02. " RS02 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 01. " RS01 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 00. " RS00 ,Receive Slot" "Disabled,Enabled" line.long 0x0c "RSMB,ESAI Receive Slot Mask Register B" bitfld.long 0x0c 15. " RS31 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 14. " RS30 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 13. " RS29 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 12. " RS28 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 11. " RS27 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 10. " RS26 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 09. " RS25 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 08. " RS24 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 07. " RS23 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 06. " RS22 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 05. " RS21 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 04. " RS20 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 03. " RS19 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 02. " RS18 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 01. " RS17 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 00. " RS16 ,Receive Slot" "Disabled,Enabled" group.long 0xf8++0x7 line.long 0x00 "PRRC,Port C Direction Register" bitfld.long 0x00 11. " PDC11 ,Port C Direction pin 11" "0,1" bitfld.long 0x00 10. " PDC10 ,Port C Direction pin 10" "0,1" bitfld.long 0x00 9. " PDC9 ,Port C Direction pin 9" "0,1" bitfld.long 0x00 8. " PDC8 ,Port C Direction pin 8" "0,1" bitfld.long 0x00 7. " PDC7 ,Port C Direction pin 7" "0,1" bitfld.long 0x00 6. " PDC6 ,Port C Direction pin 6" "0,1" textline " " bitfld.long 0x00 5. " PDC5 ,Port C Direction pin 5" "0,1" bitfld.long 0x00 4. " PDC4 ,Port C Direction pin 4" "0,1" bitfld.long 0x00 3. " PDC3 ,Port C Direction pin 3" "0,1" bitfld.long 0x00 2. " PDC2 ,Port C Direction pin 2" "0,1" bitfld.long 0x00 1. " PDC1 ,Port C Direction pin 1" "0,1" bitfld.long 0x00 0. " PDC0 ,Port C Direction pin 0" "0,1" line.long 0x04 "PCRC,Port C Control Register" bitfld.long 0x04 11. " PC11 ,Port C Control pin 11" "0,1" bitfld.long 0x04 10. " PC10 ,Port C Control pin 10" "0,1" bitfld.long 0x04 9. " PC9 ,Port C Control pin 9" "0,1" bitfld.long 0x04 8. " PC8 ,Port C Control pin 8" "0,1" bitfld.long 0x04 7. " PC7 ,Port C Control pin 7" "0,1" bitfld.long 0x04 6. " PC6 ,Port C Control pin 6" "0,1" textline " " bitfld.long 0x04 5. " PC5 ,Port C Control pin 5" "0,1" bitfld.long 0x04 4. " PC4 ,Port C Control pin 4" "0,1" bitfld.long 0x04 3. " PC3 ,Port C Control pin 3" "0,1" bitfld.long 0x04 2. " PC2 ,Port C Control pin 2" "0,1" bitfld.long 0x04 1. " PC1 ,Port C Control pin 1" "0,1" bitfld.long 0x04 0. " PC0 ,Port C Control pin 0" "0,1" width 0x0B tree.end endif sif (cpu()!="IMX6SOLOLITE") tree "ESAI (Enhanced Serial Audio Interface)" base ad:0x02024000 width 7. wgroup.long 0x00++0x03 line.long 0x00 "ETDR,ESAI Transmit Data Register" hgroup.long 0x04++0x03 hide.long 0x00 "ERDR,ESAI Receive Data Register" in group.long 0x08++0x03 line.long 0x00 "ECR,ESAI Control Register" bitfld.long 0x00 19. " ETI ,EXTAL Transmitter In" "HCKT normal,EXTAL muxed into HCKT" bitfld.long 0x00 18. " ETO ,EXTAL Transmitter Out" "HCKT normal,EXTAL driven onto HCKT" textline " " bitfld.long 0x00 17. " ERI ,EXTAL Receiver In" "HCKR normal,EXTAL muxed into HCKR" bitfld.long 0x00 16. " ERO ,EXTAL Receiver Out" "HCKR normal,EXTAL driven onto HCKR" textline " " bitfld.long 0x00 1. " ERST ,ESAI Reset" "No reset,Reset" sif (cpu()=="VF7XX-CM4"||cpu()=="VF6XX-CM4"||cpu()=="VF7XX-CA5"||cpu()=="VF6XX-CA5"||cpu()=="VF5XX-CA5"||cpu()=="VF4XX-CA5"||cpu()=="VF3XX-CA5"||cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6QUAD"||cpu()=="IMX6DUAL") bitfld.long 0x00 0. " ESAIEN ,ESAI Enable" "Disabled,Enabled" else bitfld.long 0x00 0. " ESAIEN ,ESAI Enable" "Enabled,Disabled" endif rgroup.long 0x0c++0x03 line.long 0x00 "ESR,ESAI Status Register" bitfld.long 0x00 10. " TINIT ,Transmit Initialization" "Finished,Not finished" bitfld.long 0x00 9. " RFF ,Receive FIFO Full" "< Rx FIFO watermark,>= Rx FIFO watermark" textline " " bitfld.long 0x00 8. " TFE ,Transmit FIFO Empty" "< Tx FIFO watermark,>= Tx FIFO watermark" bitfld.long 0x00 7. " TLS ,Transmit Last Slot" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 6. " TDE ,Transmit Data Exception" "Not highest priority,Highest priority" bitfld.long 0x00 5. " TED ,Transmit Even Data" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 4. " TD ,Transmit Data" "Not highest priority,Highest priority" bitfld.long 0x00 3. " RLS ,Receive Last Slot" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 2. " RDE ,Receive Data Exception" "Not highest priority,Highest priority" bitfld.long 0x00 1. " RED ,Receive Even Data" "Not highest priority,Highest priority" textline " " bitfld.long 0x00 0. " RD ,Receive Data" "Not highest priority,Highest priority" group.long 0x10++0x03 line.long 0x00 "TFCR,Transmit FIFO Configuration Register" bitfld.long 0x00 19. " TIEN ,Transmitter Initialization Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " TWA ,Transmit Word Alignment" "MSB=bit 31./bits 7-0 ignored,MSB=bit 27./bits 3-0 ignored,MSB=bit 23.,MSB=bit 19./Bottom 4 bits zeroed,MSB=bit 15./Bottom 8 bits zeroed,MSB=bit 11./Bottom 12 bits zeroed,MSB=bit 7./Bottom 16 bits zeroed,MSB=bit 3./Bottom 20 bits zeroed" textline " " hexmask.long.byte 0x00 8.--15. 1. " TFWM ,Transmit FIFO Watermark" bitfld.long 0x00 7. " TE5 ,Transmitter #5 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TE4 ,Transmitter #4 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TE3 ,Transmitter #3 FIFO Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE2 ,Transmitter #2 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TE1 ,Transmitter #1 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TE0 ,Transmitter #0 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFR ,Transmit FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "TFSR,Transmit FIFO Status Register" bitfld.long 0x00 12.--14. " NTFO ,Next Transmitter FIFO Out" "#0,#1,#2,#3,#4,#5,?..." bitfld.long 0x00 8.--10. " NTFI ,Next Transmitter FIFO In" "#0,#1,#2,#3,#4,#5,?..." hexmask.long.byte 0x00 0.--7. 1. " TFCNT ,Transmit FIFO Counter" group.long 0x18++0x03 line.long 0x00 "RFCR,Receive FIFO Configuration Register" bitfld.long 0x00 19. " REXT ,Receive Extension" "Zero,Sign" textline " " bitfld.long 0x00 16.--18. " RWA ,Receive Word Alignment" "MSB=bit 31./bits 7-0 zeroed,MSB=bit 27./bits 3-0 zeroed,MSB=bit 23,MSB=bit 19./bits 3-0 ignored,MSB=bit 15./bits 7-0 ignored,MSB=bit 11./bits 11-0 ignored,MSB=bit 7./bits 15-0 ignored,MSB=bit 3./bits 19-0 ignored" textline " " hexmask.long.byte 0x00 8.--15. 1. " RFWM ,Receive FIFO Watermark" bitfld.long 0x00 5. " RE3 ,Receiver #3 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RE2 ,Receiver #2 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 3. " RE1 ,Receiver #1 FIFO Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RE0 ,Receiver #0 FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RFR ,Receive FIFO Reset" "No reset,Reset" bitfld.long 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "RFSR,Receive FIFO Status Register" bitfld.long 0x00 12.--13. " NRFI ,Next Receiver FIFO In" "#0,#1,#2,#3" bitfld.long 0x00 8.--9. " NRFO ,Next Receiver FIFO Out" "#0,#1,#2,#3" hexmask.long.byte 0x00 0.--7. 1. " RFCNT ,Receive FIFO Counter" wgroup.long 0x80++0x017 line.long 0x0 "TX0,ESAI Transmit Data Register 0" hexmask.long.tbyte 0x0 0.--23. 1. " TX0 ,Stores the data to be transmitted" line.long 0x4 "TX1,ESAI Transmit Data Register 1" hexmask.long.tbyte 0x4 0.--23. 1. " TX1 ,Stores the data to be transmitted" line.long 0x8 "TX2,ESAI Transmit Data Register 2" hexmask.long.tbyte 0x8 0.--23. 1. " TX2 ,Stores the data to be transmitted" line.long 0xC "TX3,ESAI Transmit Data Register 3" hexmask.long.tbyte 0xC 0.--23. 1. " TX3 ,Stores the data to be transmitted" line.long 0x10 "TX4,ESAI Transmit Data Register 4" hexmask.long.tbyte 0x10 0.--23. 1. " TX4 ,Stores the data to be transmitted" line.long 0x14 "TX5,ESAI Transmit Data Register 5" hexmask.long.tbyte 0x14 0.--23. 1. " TX5 ,Stores the data to be transmitted" wgroup.long 0x98++0x03 line.long 0x00 "TSR,ESAI Transmit Slot Register" hexmask.long.tbyte 0x00 0.--23. 1. " TSR ,Transmit Slot Register" rgroup.long 0xa0++0x0f line.long 0x0 "RX0,ESAI Receive Data Registers 0" hexmask.long.tbyte 0x0 0.--23. 1. " RX0 ,Data from the receive shift register" line.long 0x4 "RX1,ESAI Receive Data Registers 1" hexmask.long.tbyte 0x4 0.--23. 1. " RX1 ,Data from the receive shift register" line.long 0x8 "RX2,ESAI Receive Data Registers 2" hexmask.long.tbyte 0x8 0.--23. 1. " RX2 ,Data from the receive shift register" line.long 0xC "RX3,ESAI Receive Data Registers 3" hexmask.long.tbyte 0xC 0.--23. 1. " RX3 ,Data from the receive shift register" textline " " rgroup.long 0xcc++0x03 line.long 0x00 "SAISR,ESAI Status Register" bitfld.long 0x00 17. " TODFE ,SAISR Transmit Odd-Data Register Empty" "Not empty,Empty" bitfld.long 0x00 16. " TEDE ,SAISR Transmit Even-Data Register Empty" "Not empty,Empty" bitfld.long 0x00 15. " TDE ,SAISR Transmit Data Register Empty" "Not empty,Empty" textline " " bitfld.long 0x00 14. " TUE ,SAISR Transmit Underrun Error Flag" "No error,Error" bitfld.long 0x00 13. " TFS ,SAISR Transmit Frame Sync Flag" "Not occurred,Occurred" bitfld.long 0x00 10. " RODF ,SAISR Receive Odd-Data Register Full" "Not full,Full" textline " " bitfld.long 0x00 9. " REDF ,SAISR Receive Even-Data Register Full" "Not full,Full" bitfld.long 0x00 8. " RDF ,SAISR Receive Data Register Full" "Not full,Full" bitfld.long 0x00 7. " ROE ,SAISR Receive Overrun Error Flag" "No error,Error" textline " " bitfld.long 0x00 6. " RFS ,SAISR Receive Frame Sync Flag" "Not occurred,Occurred" bitfld.long 0x00 2. " IF2 ,SAISR Serial Input Flag 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " IF1 ,SAISR Serial Inout Flag 1" "Not occurred,Occurred" bitfld.long 0x00 0. " IF0 ,SAISR Serial Input Flag 0" "Not occurred,Occurred" group.long 0xd0++0x3 line.long 0x00 "SAICR,ESAI Common Control Register" bitfld.long 0x00 8. " ALC ,SAICR Alignment Control" "23 bit,15 bit" bitfld.long 0x00 7. " TEBE ,SAICR Transmit External Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 6. " SYNC ,SAICR Synchronous Mode Selection" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 2. " OF2 ,SAICR Serial Output Flag 2" "Not occurred,Occurred" bitfld.long 0x00 1. " OF1 ,SAICR Serial Output Flag 1" "Not occurred,Occurred" bitfld.long 0x00 0. " OF0 ,SAICR Serial Output Flag 0" "Not occurred,Occurred" if ((per.l(ad:0x02024000+0xD8)&0x3e00)==0x0) group.long 0xD4++0x03 line.long 0x0 "TCR,Transmit Control Register" bitfld.long 0x0 23. " TLIE ,Transmit Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " TEDIE ,Transmit Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " TEIE ,Transmit Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " TPR ,Transmit Section Personal Reset" "No effect,Reset" bitfld.long 0x0 17. " PADC ,Transmit Zero Padding Control" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " TFSR ,Transmit Frame Sync Relative Timing" "First bit of data,Last bit of prev data" bitfld.long 0x0 15. " TFSL ,Transmit Frame Sync Length" "Word-length,1-bit clock period" textline " " bitfld.long 0x0 10.--14. " TSWS ,Transmit Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" bitfld.long 0x0 8.--9. " TMOD ,Transmit Network Mode Control" "Normal,On-Demand,,AC97" textline " " bitfld.long 0x0 7. " TWA ,Transmit Word Alignment Control" "Left,Right" bitfld.long 0x0 6. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x0 5. " TE5 ,ESAI Transmit 5 Enable" "Disabled,Enabled" bitfld.long 0x0 4. " TE4 ,ESAI Transmit 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TE3 ,ESAI Transmit 3 Enable" "Disabled,Enabled" bitfld.long 0x0 2. " TE2 ,ESAI Transmit 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TE1 ,ESAI Transmit 1 Enable" "Disabled,Enabled" bitfld.long 0x0 0. " TE0 ,ESAI Transmit 0 Enable" "Disabled,Enabled" else group.long 0xD4++0x03 line.long 0x0 "TCR,Transmit Control Register" bitfld.long 0x0 23. " TLIE ,Transmit Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " TEDIE ,Transmit Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " TEIE ,Transmit Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " TPR ,Transmit Section Personal Reset" "No effect,Reset" bitfld.long 0x0 17. " PADC ,Transmit Zero Padding Control" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " TFSR ,Transmit Frame Sync Relative Timing" "First bit of data,Last bit of prev data" bitfld.long 0x0 15. " TFSL ,Transmit Frame Sync Length" "Word-length,1-bit clock period" textline " " bitfld.long 0x0 10.--14. " TSWS ,Transmit Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" bitfld.long 0x0 8.--9. " TMOD ,Transmit Network Mode Control" "Normal,Network,,AC97" textline " " bitfld.long 0x0 7. " TWA ,Transmit Word Alignment Control" "Left,Right" bitfld.long 0x0 6. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x0 5. " TE5 ,ESAI Transmit 5 Enable" "Disabled,Enabled" bitfld.long 0x0 4. " TE4 ,ESAI Transmit 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TE3 ,ESAI Transmit 3 Enable" "Disabled,Enabled" bitfld.long 0x0 2. " TE2 ,ESAI Transmit 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TE1 ,ESAI Transmit 1 Enable" "Disabled,Enabled" bitfld.long 0x0 0. " TE0 ,ESAI Transmit 0 Enable" "Disabled,Enabled" endif if ((per.l(ad:0x02024000+0xD4)&0x300)==0x100) group.long 0xD8++0x3 line.long 0x0 "TCCR,Transmit Clock Control Register" bitfld.long 0x0 23. " THCKD ,High Frequency Clock Direction (HCKR pin) (HCKT pin)" "Input,Output" bitfld.long 0x0 22. " TFSD ,Frame Sync Signal Direction (FST pin)" "Input,Output" textline " " bitfld.long 0x0 21. " TCKD ,Transmitter Clock Source Direction (SCKT pin)" "External,Internal" bitfld.long 0x0 20. " THCKP ,Transmitter High Frequency Clock Polarity" "Normal,Inverted" textline " " bitfld.long 0x0 19. " TFSP ,Transmitter Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " TCKP ,Transmitter Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " TFP ,Tx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " TDC ,Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " TPSR ,TCCR Transmit Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " TPM ,TCCR Transmit Prescale Modulus Select (divide ratio from 1 to 256)" else group.long 0xD8++0x3 line.long 0x0 "TCCR,Transmit Clock Control Register" bitfld.long 0x0 23. " THCKD ,High Frequency Clock Direction (HCKR pin) (HCKT pin)" "Input,Output" bitfld.long 0x0 22. " TFSD ,Frame Sync Signal Direction (FST pin)" "Input,Output" textline " " bitfld.long 0x0 21. " TCKD ,Transmitter Clock Source Direction (SCKT pin)" "External,Internal" bitfld.long 0x0 20. " THCKP ,Transmitter High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " TFSP ,Transmitter Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " TCKP ,Transmitter Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " TFP ,Tx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " TDC ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " TPSR ,TCCR Transmit Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " TPM ,TCCR Transmit Prescale Modulus Select (divide ratio from 1 to 256)" endif if ((per.l(ad:0x02024000+0xE0)&0x3e00)==0x0) group.long 0xDC++0x3 line.long 0x0 "RCR,Receive Control Register" bitfld.long 0x0 23. " RLIE ,Receive Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " REDIE ,Receive Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " REIE ,Receive Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " RPR ,Receiver Section Personal Reset" "No effect,Reset" bitfld.long 0x0 16. " RFSR ,Receiver Frame Sync Relative Timing" "First bit of data,Last bit of prev data" textline " " bitfld.long 0x0 15. " RFSL ,Receiver Frame Sync Length" "Word-length,1-bit clock period" bitfld.long 0x0 10.--14. " RSWS ,Receiver Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" textline " " bitfld.long 0x0 8.--9. " RMOD ,Receiver Network Mode Control" "Normal,On-Demand,,AC97" bitfld.long 0x0 7. " RWA ,Receiver Word Alignment Control" "Left,Right" textline " " bitfld.long 0x0 6. " RSHFD ,Receiver Shift Direction" "MSB first,LSB first" bitfld.long 0x0 3. " RE3 ,ESAI Receiver 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " RE2 ,ESAI Receiver 2 Enable" "Disabled,Enabled" bitfld.long 0x0 1. " RE1 ,ESAI Receiver 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RE0 ,ESAI Receiver 0 Enable" "Disabled,Enabled" else group.long 0xDC++0x3 line.long 0x0 "RCR,Receive Control Register" bitfld.long 0x0 23. " RLIE ,Receive Last Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 22. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " REDIE ,Receive Even Slot Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 20. " REIE ,Receive Exception Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " RPR ,Receiver Section Personal Reset" "No effect,Reset" bitfld.long 0x0 16. " RFSR ,Receiver Frame Sync Relative Timing" "First bit of data,Last bit of prev data" textline " " bitfld.long 0x0 15. " RFSL ,Receiver Frame Sync Length" "Word-length,1-bit clock period" bitfld.long 0x0 10.--14. " RSWS ,Receiver Slot and Word Length Select" "Slot-8/Word-8,Slot-12/Word-12,Slot-16/Word-16,Slot-20/Word-20,Slot-12/Word-8,Slot-16/Word-12,Slot-20/Word-16,Slot-24/Word-20,Slot-16/Word-8,Slot-20/Word-12,Slot-24/Word-16,,Slot-20/Word-8,Slot-24/Word-12,,Slot-32/Word-20,Slot-24/Word-8,,Slot-32/Word-16,,,Slot-32/Word-12,,,Slot-32/Word-8,,,,,,Slot-24/Word-24,Slot-32/Word-24" textline " " bitfld.long 0x0 8.--9. " RMOD ,Receiver Network Mode Control" "Normal,Network,,AC97" bitfld.long 0x0 7. " RWA ,Receiver Word Alignment Control" "Left,Right" textline " " bitfld.long 0x0 6. " RSHFD ,Receiver Shift Direction" "MSB first,LSB first" bitfld.long 0x0 3. " RE3 ,ESAI Receiver 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " RE2 ,ESAI Receiver 2 Enable" "Disabled,Enabled" bitfld.long 0x0 1. " RE1 ,ESAI Receiver 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RE0 ,ESAI Receiver 0 Enable" "Disabled,Enabled" endif if ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "HCKR input,HCKR output" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "FSR input,FSR output" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "SCKR input,SCKR output" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "IF1,OF1" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xDC)&0x300)==0x100)&&((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x80) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" ",TxBufferEnable" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "On-demand,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif ((per.l(ad:0x02024000+0xD0)&0x40)==0x0) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "HCKR input,HCKR output" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "FSR input,FSR output" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "SCKR input,SCKR output" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif (((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x0)) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" "IF1,OF1" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" elif (((per.l(ad:0x02024000+0xD0)&0x40)==0x40)&&((per.l(ad:0x02024000+0xD0)&0x80)==0x80)) group.long 0xE0++0x3 line.long 0x0 "RCCR,Receive Clock Control Register" bitfld.long 0x0 23. " RHCKD ,High Frequency Clock Direction (HCKR pin)" "IF2,OF2" bitfld.long 0x0 22. " RFSD ,Frame Sync Signal Direction (FSR pin)" ",TxBufferEnable" textline " " bitfld.long 0x0 21. " RCKD ,Clock Source Direction (SCKR pin)" "IF0,OF0" bitfld.long 0x0 20. " RHCKP ,Receiver High Frequency Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 19. " RFSP ,Receiver Frame Sync Polarity" "Positive-High,Negative-Low" bitfld.long 0x0 18. " RCKP ,Receiver Clock Polarity" "Positive,Negative" textline " " bitfld.long 0x0 14.--17. " RFP ,Rx High Frequency Clock Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 9.--13. " RDC ,Rx Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x0 8. " RPSR ,Receiver Prescaler Range" "Div by 8,Bypassed" hexmask.long.byte 0x0 0.--7. 1. " RPM ,Receiver Prescale Modulus Select (divide ratio from 1 to 256)" else hgroup.long 0xE0++0x3 hide.long 0x0 "RCCR,Receive Clock Control Register" endif textline " " group.long 0xe4++0xf line.long 0x00 "TSMA,ESAI Transmit Slot Mask Register A" bitfld.long 0x00 15. " TS15 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 14. " TS14 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 13. " TS13 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 12. " TS12 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TS11 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 10. " TS10 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 09. " TS09 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 08. " TS08 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 07. " TS07 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 06. " TS06 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 05. " TS05 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 04. " TS04 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x00 03. " TS03 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 02. " TS02 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 01. " TS01 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x00 00. " TS00 ,Transmit Slot" "Disabled,Enabled" line.long 0x04 "TSMB,ESAI Transmit Slot Mask Register B" bitfld.long 0x04 15. " TS31 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 14. " TS30 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 13. " TS29 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 12. " TS28 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " TS27 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 10. " TS26 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 09. " TS25 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 08. " TS24 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 07. " TS23 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 06. " TS22 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 05. " TS21 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 04. " TS20 ,Transmit Slot" "Disabled,Enabled" textline " " bitfld.long 0x04 03. " TS19 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 02. " TS18 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 01. " TS17 ,Transmit Slot" "Disabled,Enabled" bitfld.long 0x04 00. " TS16 ,Transmit Slot" "Disabled,Enabled" line.long 0x08 "RSMA,ESAI Receive Slot Mask Register A" bitfld.long 0x08 15. " RS15 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 14. " RS14 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 13. " RS13 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 12. " RS12 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " RS11 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 10. " RS10 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 09. " RS09 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 08. " RS08 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 07. " RS07 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 06. " RS06 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 05. " RS05 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 04. " RS04 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x08 03. " RS03 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 02. " RS02 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 01. " RS01 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x08 00. " RS00 ,Receive Slot" "Disabled,Enabled" line.long 0x0c "RSMB,ESAI Receive Slot Mask Register B" bitfld.long 0x0c 15. " RS31 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 14. " RS30 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 13. " RS29 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 12. " RS28 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 11. " RS27 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 10. " RS26 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 09. " RS25 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 08. " RS24 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 07. " RS23 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 06. " RS22 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 05. " RS21 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 04. " RS20 ,Receive Slot" "Disabled,Enabled" textline " " bitfld.long 0x0c 03. " RS19 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 02. " RS18 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 01. " RS17 ,Receive Slot" "Disabled,Enabled" bitfld.long 0x0c 00. " RS16 ,Receive Slot" "Disabled,Enabled" group.long 0xf8++0x7 line.long 0x00 "PRRC,Port C Direction Register" bitfld.long 0x00 11. " PDC11 ,Port C Direction pin 11" "0,1" bitfld.long 0x00 10. " PDC10 ,Port C Direction pin 10" "0,1" bitfld.long 0x00 9. " PDC9 ,Port C Direction pin 9" "0,1" bitfld.long 0x00 8. " PDC8 ,Port C Direction pin 8" "0,1" bitfld.long 0x00 7. " PDC7 ,Port C Direction pin 7" "0,1" bitfld.long 0x00 6. " PDC6 ,Port C Direction pin 6" "0,1" textline " " bitfld.long 0x00 5. " PDC5 ,Port C Direction pin 5" "0,1" bitfld.long 0x00 4. " PDC4 ,Port C Direction pin 4" "0,1" bitfld.long 0x00 3. " PDC3 ,Port C Direction pin 3" "0,1" bitfld.long 0x00 2. " PDC2 ,Port C Direction pin 2" "0,1" bitfld.long 0x00 1. " PDC1 ,Port C Direction pin 1" "0,1" bitfld.long 0x00 0. " PDC0 ,Port C Direction pin 0" "0,1" line.long 0x04 "PCRC,Port C Control Register" bitfld.long 0x04 11. " PC11 ,Port C Control pin 11" "0,1" bitfld.long 0x04 10. " PC10 ,Port C Control pin 10" "0,1" bitfld.long 0x04 9. " PC9 ,Port C Control pin 9" "0,1" bitfld.long 0x04 8. " PC8 ,Port C Control pin 8" "0,1" bitfld.long 0x04 7. " PC7 ,Port C Control pin 7" "0,1" bitfld.long 0x04 6. " PC6 ,Port C Control pin 6" "0,1" textline " " bitfld.long 0x04 5. " PC5 ,Port C Control pin 5" "0,1" bitfld.long 0x04 4. " PC4 ,Port C Control pin 4" "0,1" bitfld.long 0x04 3. " PC3 ,Port C Control pin 3" "0,1" bitfld.long 0x04 2. " PC2 ,Port C Control pin 2" "0,1" bitfld.long 0x04 1. " PC1 ,Port C Control pin 1" "0,1" bitfld.long 0x04 0. " PC0 ,Port C Control pin 0" "0,1" width 0x0B tree.end endif sif (cpu()!="IMX6SOLOLITE") tree.open "FlexCAN (Controller Area Network)" tree "CAN 1" base ad:0x02090000 width 10. tree "Common Registers" group.long 0x00++0x03 line.long 0x00 "MCR,Module Configuration Register" bitfld.long 0x00 31. " MDIS ,Module disable" "No,Yes" bitfld.long 0x00 30. " FRZ ,Freeze enable" "Disabled,Enabled" bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enable" "Disabled,Enabled" bitfld.long 0x00 28. " HALT ,FlexCAN freeze mode" "Not requested,Requested" textline " " rbitfld.long 0x00 27. " NOT_RDY ,FlexCAN not ready" "Normal/listen-only/loopback,Disable/stop/freeze" bitfld.long 0x00 26. " WAK_MSK ,Wake-up interrupt mask" "Disabled,Enabled" bitfld.long 0x00 25. " SOFT_RST ,Soft reset" "No reset,Reset" rbitfld.long 0x00 24. " FRZ_ACK ,Freeze mode acknowledge" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 23. " SUPV ,Supervisor mode" "Disabled,Enabled" bitfld.long 0x00 22. " SLF_WAK ,Self wake-up" "Disabled,Enabled" bitfld.long 0x00 21. " WRN_EN ,Warning Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 20. " LPM_ACK ,Low power mode acknowledge" "No low-power,Disable/stop" textline " " bitfld.long 0x00 19. " WAK_SRC ,Wake-up source" "Unfiltered Rx,Filtered Rx" bitfld.long 0x00 17. " SRX_DIS ,Self Reception Disable" "No,Yes" bitfld.long 0x00 16. " IRMQ ,Individual Rx masking and queue feature enable" "Disabled,Enabled" bitfld.long 0x00 13. " LPRIO_EN ,Local priority feature enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D" hexmask.long.byte 0x00 00.--06. 1. " MAXMB ,Maximum number of message buffers" if (((per.l(ad:0x02090000))&0x1200000)==0x1200000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" bitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" bitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" bitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" bitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" bitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " bitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" bitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" bitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" elif (((per.l(ad:0x02090000))&0x1200000)==0x0200000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" rbitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" rbitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" rbitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" bitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" rbitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" rbitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " rbitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" rbitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" rbitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" elif (((per.l(ad:0x02090000))&0x1200000)==0x1000000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" bitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" bitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" bitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" rbitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" bitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " bitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" bitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" bitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" else group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" rbitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" rbitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" rbitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" rbitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" rbitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" rbitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " rbitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" rbitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" rbitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" endif group.long 0x08++0x03 line.long 0x00 "TIMER,Free-Running Timer Register" hexmask.long.word 0x00 00.--15. 1. " TIMER ,Timer value" textline " " if (((per.l(ad:0x02090000))&0x1000000)==0x1000000) group.long 0x10++0x0B line.long 0x00 "RXGMASK,Rx Global Mask Register" bitfld.long 0x00 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x00 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x00 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register" bitfld.long 0x04 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x04 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x04 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x04 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x04 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x04 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x04 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x04 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x04 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x04 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x04 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x04 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x04 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x04 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x04 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x04 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x04 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x04 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x04 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x04 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x04 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x04 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x04 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x04 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x04 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x04 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x04 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x04 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x04 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x04 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x04 00. ",Extended ID mask bit 0" "0,1" line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register" bitfld.long 0x08 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x08 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x08 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x08 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x08 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x08 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x08 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x08 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x08 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x08 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x08 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x08 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x08 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x08 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x08 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x08 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x08 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x08 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x08 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x08 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x08 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x08 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x08 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x08 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x08 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x08 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x08 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x08 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x08 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x08 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x08 00. ",Extended ID mask bit 0" "0,1" else rgroup.long 0x10++0x0B line.long 0x00 "RXGMASK,Rx Global Mask Register" bitfld.long 0x00 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x00 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x00 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register" bitfld.long 0x04 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x04 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x04 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x04 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x04 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x04 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x04 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x04 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x04 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x04 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x04 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x04 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x04 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x04 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x04 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x04 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x04 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x04 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x04 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x04 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x04 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x04 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x04 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x04 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x04 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x04 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x04 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x04 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x04 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x04 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x04 00. ",Extended ID mask bit 0" "0,1" line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register" bitfld.long 0x08 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x08 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x08 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x08 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x08 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x08 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x08 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x08 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x08 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x08 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x08 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x08 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x08 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x08 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x08 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x08 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x08 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x08 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x08 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x08 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x08 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x08 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x08 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x08 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x08 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x08 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x08 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x08 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x08 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x08 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x08 00. ",Extended ID mask bit 0" "0,1" endif textline " " group.long 0x1C++0x03 line.long 0x00 "ECR,Error Counter Register" hexmask.long.byte 0x00 08.--15. 1. " RX_ERR_COUNTER ,Rx Error Counter" hexmask.long.byte 0x00 00.--07. 1. " TX_ERR_COUNTER ,Tx Error Counter" hgroup.long 0x0020++0x03 hide.long 0x00 "ESR1,Error and Status Register 1" in textline " " group.long 0x0024++0x0B line.long 0x00 "IMASK2,Interrupt Mask Register 2" bitfld.long 0x00 31. " BUF63M ,Buffer 63 MB Mask" "Disabled,Enabled" bitfld.long 0x00 30. " BUF62M ,Buffer 62 MB Mask" "Disabled,Enabled" bitfld.long 0x00 29. " BUF61M ,Buffer 61 MB Mask" "Disabled,Enabled" bitfld.long 0x00 28. " BUF60M ,Buffer 60 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BUF59M ,Buffer 59 MB Mask" "Disabled,Enabled" bitfld.long 0x00 26. " BUF58M ,Buffer 58 MB Mask" "Disabled,Enabled" bitfld.long 0x00 25. " BUF57M ,Buffer 57 MB Mask" "Disabled,Enabled" bitfld.long 0x00 24. " BUF56M ,Buffer 56 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BUF55M ,Buffer 55 MB Mask" "Disabled,Enabled" bitfld.long 0x00 22. " BUF54M ,Buffer 54 MB Mask" "Disabled,Enabled" bitfld.long 0x00 21. " BUF53M ,Buffer 53 MB Mask" "Disabled,Enabled" bitfld.long 0x00 20. " BUF52M ,Buffer 52 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " BUF51M ,Buffer 51 MB Mask" "Disabled,Enabled" bitfld.long 0x00 18. " BUF50M ,Buffer 50 MB Mask" "Disabled,Enabled" bitfld.long 0x00 17. " BUF49M ,Buffer 49 MB Mask" "Disabled,Enabled" bitfld.long 0x00 16. " BUF48M ,Buffer 48 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " BUF47M ,Buffer 47 MB Mask" "Disabled,Enabled" bitfld.long 0x00 14. " BUF46M ,Buffer 46 MB Mask" "Disabled,Enabled" bitfld.long 0x00 13. " BUF45M ,Buffer 45 MB Mask" "Disabled,Enabled" bitfld.long 0x00 12. " BUF44M ,Buffer 44 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " BUF43M ,Buffer 43 MB Mask" "Disabled,Enabled" bitfld.long 0x00 10. " BUF42M ,Buffer 42 MB Mask" "Disabled,Enabled" bitfld.long 0x00 9. " BUF41M ,Buffer 41 MB Mask" "Disabled,Enabled" bitfld.long 0x00 8. " BUF40M ,Buffer 40 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUF39M ,Buffer 39 MB Mask" "Disabled,Enabled" bitfld.long 0x00 6. " BUF38M ,Buffer 38 MB Mask" "Disabled,Enabled" bitfld.long 0x00 5. " BUF37M ,Buffer 37 MB Mask" "Disabled,Enabled" bitfld.long 0x00 4. " BUF36M ,Buffer 36 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF35M ,Buffer 35 MB Mask" "Disabled,Enabled" bitfld.long 0x00 2. " BUF34M ,Buffer 34 MB Mask" "Disabled,Enabled" bitfld.long 0x00 1. " BUF33M ,Buffer 33 MB Mask" "Disabled,Enabled" bitfld.long 0x00 0. " BUF32M ,Buffer 32 MB Mask" "Disabled,Enabled" line.long 0x04 "IMASK1,Interrupt Masks Register 1" bitfld.long 0x04 31. " BUF31M ,Buffer 31 MB Mask" "Disabled,Enabled" bitfld.long 0x04 30. " BUF30M ,Buffer 30 MB Mask" "Disabled,Enabled" bitfld.long 0x04 29. " BUF29M ,Buffer 29 MB Mask" "Disabled,Enabled" bitfld.long 0x04 28. " BUF28M ,Buffer 28 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " BUF27M ,Buffer 27 MB Mask" "Disabled,Enabled" bitfld.long 0x04 26. " BUF26M ,Buffer 26 MB Mask" "Disabled,Enabled" bitfld.long 0x04 25. " BUF25M ,Buffer 25 MB Mask" "Disabled,Enabled" bitfld.long 0x04 24. " BUF24M ,Buffer 24 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " BUF23M ,Buffer 23 MB Mask" "Disabled,Enabled" bitfld.long 0x04 22. " BUF22M ,Buffer 22 MB Mask" "Disabled,Enabled" bitfld.long 0x04 21. " BUF21M ,Buffer 21 MB Mask" "Disabled,Enabled" bitfld.long 0x04 20. " BUF20M ,Buffer 20 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " BUF19M ,Buffer 19 MB Mask" "Disabled,Enabled" bitfld.long 0x04 18. " BUF18M ,Buffer 18 MB Mask" "Disabled,Enabled" bitfld.long 0x04 17. " BUF17M ,Buffer 17 MB Mask" "Disabled,Enabled" bitfld.long 0x04 16. " BUF16M ,Buffer 16 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " BUF15M ,Buffer 15 MB Mask" "Disabled,Enabled" bitfld.long 0x04 14. " BUF14M ,Buffer 14 MB Mask" "Disabled,Enabled" bitfld.long 0x04 13. " BUF13M ,Buffer 13 MB Mask" "Disabled,Enabled" bitfld.long 0x04 12. " BUF12M ,Buffer 12 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " BUF11M ,Buffer 11 MB Mask" "Disabled,Enabled" bitfld.long 0x04 10. " BUF10M ,Buffer 10 MB Mask" "Disabled,Enabled" bitfld.long 0x04 09. " BUF9M ,Buffer 9 MB Mask" "Disabled,Enabled" bitfld.long 0x04 08. " BUF8M ,Buffer 8 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 07. " BUF7M ,Buffer 7 MB Mask" "Disabled,Enabled" bitfld.long 0x04 06. " BUF6M ,Buffer 6 MB Mask" "Disabled,Enabled" bitfld.long 0x04 05. " BUF5M ,Buffer 5 MB Mask" "Disabled,Enabled" bitfld.long 0x04 04. " BUF4M ,Buffer 4 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 03. " BUF3M ,Buffer 3 MB Mask" "Disabled,Enabled" bitfld.long 0x04 02. " BUF2M ,Buffer 2 MB Mask" "Disabled,Enabled" bitfld.long 0x04 01. " BUF1M ,Buffer 1 MB Mask" "Disabled,Enabled" bitfld.long 0x04 00. " BUF0M ,Buffer 0 MB Mask" "Disabled,Enabled" line.long 0x08 "IFLAG2,Interrupt Flags 2 Register" eventfld.long 0x08 31. " BUF63I ,Buffer 63 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 30. " BUF62I ,Buffer 62 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 29. " BUF61I ,Buffer 61 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 28. " BUF60I ,Buffer 60 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 27. " BUF59I ,Buffer 59 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 26. " BUF58I ,Buffer 58 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 25. " BUF57I ,Buffer 57 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 24. " BUF56I ,Buffer 56 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 23. " BUF55I ,Buffer 55 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 22. " BUF54I ,Buffer 54 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 21. " BUF53I ,Buffer 53 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 20. " BUF52I ,Buffer 52 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 19. " BUF51I ,Buffer 51 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 18. " BUF50I ,Buffer 50 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 17. " BUF49I ,Buffer 49 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 16. " BUF48I ,Buffer 48 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 15. " BUF47I ,Buffer 47 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 14. " BUF46I ,Buffer 46 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 13. " BUF45I ,Buffer 45 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 12. " BUF44I ,Buffer 44 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 11. " BUF43I ,Buffer 43 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 10. " BUF42I ,Buffer 42 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 9. " BUF41I ,Buffer 41 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 8. " BUF40I ,Buffer 40 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 7. " BUF39I ,Buffer 39 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 6. " BUF38I ,Buffer 38 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 5. " BUF37I ,Buffer 37 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 4. " BUF36I ,Buffer 36 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 3. " BUF35I ,Buffer 35 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 2. " BUF34I ,Buffer 34 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 1. " BUF33I ,Buffer 33 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 0. " BUF32I ,Buffer 32 MB Interrupt" "Not occurred,Occurred" if (((per.l(ad:0x02090000))&0x20000000)==0x00) group.long 0x0030++0x03 line.long 0x00 "IFLAG1,Interrupt Flags 1 Register" eventfld.long 0x00 31. " BUF31I ,Buffer 31 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 30. " BUF30I ,Buffer 30 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 29. " BUF29I ,Buffer 29 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 28. " BUF28I ,Buffer 28 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 27. " BUF27I ,Buffer 27 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 26. " BUF26I ,Buffer 26 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 25. " BUF25I ,Buffer 25 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 24. " BUF24I ,Buffer 24 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " BUF23I ,Buffer 23 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 22. " BUF22I ,Buffer 22 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 21. " BUF21I ,Buffer 21 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 20. " BUF20I ,Buffer 20 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " BUF19I ,Buffer 19 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 18. " BUF18I ,Buffer 18 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 17. " BUF17I ,Buffer 17 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 16. " BUF16I ,Buffer 16 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " BUF15I ,Buffer 15 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 14. " BUF14I ,Buffer 14 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 13. " BUF13I ,Buffer 13 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 12. " BUF12I ,Buffer 12 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 11. " BUF11I ,Buffer 11 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 10. " BUF10I ,Buffer 10 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 09. " BUF9I ,Buffer 9 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 08. " BUF8I ,Buffer 8 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 07. " BUF7I ,Buffer 7 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 06. " BUF6I ,Buffer 6 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 05. " BUF5I ,Buffer 5 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 04. " BUF4I ,Buffer 4 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 03. " BUF3I ,Buffer 3 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 02. " BUF2I ,Buffer 2 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 01. " BUF1I ,Buffer 1 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 00. " BUF0I ,Buffer 0 MB Interrupt" "Not occurred,Occurred" else group.long 0x0030++0x03 line.long 0x00 "IFLAG1,Interrupt Flags 1 Register" eventfld.long 0x00 31. " BUF31I ,Buffer 31 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 30. " BUF30I ,Buffer 30 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 29. " BUF29I ,Buffer 29 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 28. " BUF28I ,Buffer 28 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 27. " BUF27I ,Buffer 27 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 26. " BUF26I ,Buffer 26 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 25. " BUF25I ,Buffer 25 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 24. " BUF24I ,Buffer 24 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " BUF23I ,Buffer 23 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 22. " BUF22I ,Buffer 22 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 21. " BUF21I ,Buffer 21 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 20. " BUF20I ,Buffer 20 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " BUF19I ,Buffer 19 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 18. " BUF18I ,Buffer 18 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 17. " BUF17I ,Buffer 17 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 16. " BUF16I ,Buffer 16 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " BUF15I ,Buffer 15 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 14. " BUF14I ,Buffer 14 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 13. " BUF13I ,Buffer 13 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 12. " BUF12I ,Buffer 12 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 11. " BUF11I ,Buffer 11 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 10. " BUF10I ,Buffer 10 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 09. " BUF9I ,Buffer 9 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 08. " BUF8I ,Buffer 8 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 07. " BUF7I ,FIFO overflow condition" "No overflow,Overflow" eventfld.long 0x00 06. " BUF6I ,4 out of 6 buffers of the FIFO are already occupied" "Not occupied,Occupied" eventfld.long 0x00 05. " BUF5I ,Least one frame is available to be read from the FIFO" "Not available,Available" endif sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX6*") group.long 0x34++0x3 line.long 0x00 "GFWR,Glitch Filter Width Register" hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch Filter Width" else group.long 0x34++0x3 line.long 0x00 "CTRL2,Control 2 Register" bitfld.long 0x00 28. " WRMFRZ ,Unrestricted write access to FlexCAN memory enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " RFEN ,Number of Rx FIFO filters" "8,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128" bitfld.long 0x00 19.--23. " TASD ,Tx Can bits delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " MRP ,Matching start process" "Rx FIFO->Mailboxes,Mailboxes->Rx FIFO" textline " " bitfld.long 0x00 17. " RRS ,Remote Request Frame generate/store" "Generated,Stored" bitfld.long 0x00 16. " EACEN ,IDE and RTR comparison enable" "Disabled,Enabled" rgroup.long 0x38++0x3 line.long 0x00 "ESR2,Error and Status Register 2" hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Lowest number of inactive Mailbox" bitfld.long 0x00 14. " VPS ,Contents of IMB and LPTM valid" "Not valid,Valid" bitfld.long 0x00 13. " IMB ,Inactive Mailbox available" "Not available,Available" rgroup.long 0x44++0x3 line.long 0x00 "CRCR,CRC Register" hexmask.long.byte 0x00 16.--22. 1. " MBCRC ,Tx CRC Mailbox number" hexmask.long.word 0x00 0.--14. 1. " TXCRC ,CRC value of the last message transmitted" textline " " if (((per.l(ad:0x02090000))&0x300)!=0x00) group.long 0x48++0x3 line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register" bitfld.long 0x00 31. " FGM[31:0] ,Standard and Extended ID mask bit 31" "0,1" bitfld.long 0x00 30. ",Standard ID mask bit 30" "0,1" bitfld.long 0x00 29. ",Standard ID mask bit 29" "0,1" bitfld.long 0x00 28. ",Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" else group.long 0x48++0x3 line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register" bitfld.long 0x00 31. " FGM[31:0] ,Standard and Extended ID mask bit 31" "0,1" bitfld.long 0x00 30. ",Standard ID mask bit 30" "0,1" bitfld.long 0x00 29. ",Standard ID mask bit 29" "0,1" bitfld.long 0x00 28. ",Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" endif rgroup.long 0x4C++0x3 line.long 0x00 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x00 0.--8. 1. " IDHIT ,Identifier Acceptance Filter hit by the received message" group.long 0x9e0++0x3 line.long 0x00 "GFWR,Glitch Filter Width Register" hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch Filter Width" endif tree.end width 12. tree "Message Buffer & Rx FIFO registers" if (((per.l(ad:0x02090000))&0x20000000)==0x20000000) group.long 0x80++0x03 line.long 0x00 "RXFIFO0,Rx FIFO Structure 0" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" hexmask.long.byte 0x00 16.--19. 1. " DLC ,DLC" textline " " hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x80)))&0x00200000)==0x00000000) group.long 0x84++0x03 line.long 0x00 "ID0,Identifier Field 0" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long 0x84++0x03 line.long 0x00 "ID0,Identifier Field 0" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long 0x88++0x07 line.long 0x00 "DATA0-3,Data Field 0-3" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7,Data Field 4-7" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long 0xE0++0x3 line.long 0x00 "IDFTE0,ID Filter Table Element 0" group.long 0xE4++0x3 line.long 0x00 "IDFTE1,ID Filter Table Element 1" group.long 0xE8++0x3 line.long 0x00 "IDFTE2,ID Filter Table Element 2" group.long 0xEC++0x3 line.long 0x00 "IDFTE3,ID Filter Table Element 3" group.long 0xF0++0x3 line.long 0x00 "IDFTE4,ID Filter Table Element 4" group.long 0xF4++0x3 line.long 0x00 "IDFTE5,ID Filter Table Element 5" group.long 0xF8++0x3 line.long 0x00 "IDFTE6,ID Filter Table Element 6" group.long 0xFC++0x3 line.long 0x00 "IDFTE7,ID Filter Table Element 7" group.long 0x100++0x3 line.long 0x00 "IDFTE8,ID Filter Table Element 8" group.long 0x104++0x3 line.long 0x00 "IDFTE9,ID Filter Table Element 9" group.long 0x108++0x3 line.long 0x00 "IDFTE10,ID Filter Table Element 10" group.long 0x10C++0x3 line.long 0x00 "IDFTE11,ID Filter Table Element 11" group.long 0x110++0x3 line.long 0x00 "IDFTE12,ID Filter Table Element 12" group.long 0x114++0x3 line.long 0x00 "IDFTE13,ID Filter Table Element 13" group.long 0x118++0x3 line.long 0x00 "IDFTE14,ID Filter Table Element 14" group.long 0x11C++0x3 line.long 0x00 "IDFTE15,ID Filter Table Element 15" group.long 0x120++0x3 line.long 0x00 "IDFTE16,ID Filter Table Element 16" group.long 0x124++0x3 line.long 0x00 "IDFTE17,ID Filter Table Element 17" group.long 0x128++0x3 line.long 0x00 "IDFTE18,ID Filter Table Element 18" group.long 0x12C++0x3 line.long 0x00 "IDFTE19,ID Filter Table Element 19" group.long 0x130++0x3 line.long 0x00 "IDFTE20,ID Filter Table Element 20" group.long 0x134++0x3 line.long 0x00 "IDFTE21,ID Filter Table Element 21" group.long 0x138++0x3 line.long 0x00 "IDFTE22,ID Filter Table Element 22" group.long 0x13C++0x3 line.long 0x00 "IDFTE23,ID Filter Table Element 23" group.long 0x140++0x3 line.long 0x00 "IDFTE24,ID Filter Table Element 24" group.long 0x144++0x3 line.long 0x00 "IDFTE25,ID Filter Table Element 25" group.long 0x148++0x3 line.long 0x00 "IDFTE26,ID Filter Table Element 26" group.long 0x14C++0x3 line.long 0x00 "IDFTE27,ID Filter Table Element 27" group.long 0x150++0x3 line.long 0x00 "IDFTE28,ID Filter Table Element 28" group.long 0x154++0x3 line.long 0x00 "IDFTE29,ID Filter Table Element 29" group.long 0x158++0x3 line.long 0x00 "IDFTE30,ID Filter Table Element 30" group.long 0x15C++0x3 line.long 0x00 "IDFTE31,ID Filter Table Element 31" group.long 0x160++0x3 line.long 0x00 "IDFTE32,ID Filter Table Element 32" group.long 0x164++0x3 line.long 0x00 "IDFTE33,ID Filter Table Element 33" group.long 0x168++0x3 line.long 0x00 "IDFTE34,ID Filter Table Element 34" group.long 0x16C++0x3 line.long 0x00 "IDFTE35,ID Filter Table Element 35" group.long 0x170++0x3 line.long 0x00 "IDFTE36,ID Filter Table Element 36" group.long 0x174++0x3 line.long 0x00 "IDFTE37,ID Filter Table Element 37" group.long 0x178++0x3 line.long 0x00 "IDFTE38,ID Filter Table Element 38" group.long 0x17C++0x3 line.long 0x00 "IDFTE39,ID Filter Table Element 39" group.long 0x180++0x3 line.long 0x00 "IDFTE40,ID Filter Table Element 40" group.long 0x184++0x3 line.long 0x00 "IDFTE41,ID Filter Table Element 41" group.long 0x188++0x3 line.long 0x00 "IDFTE42,ID Filter Table Element 42" group.long 0x18C++0x3 line.long 0x00 "IDFTE43,ID Filter Table Element 43" group.long 0x190++0x3 line.long 0x00 "IDFTE44,ID Filter Table Element 44" group.long 0x194++0x3 line.long 0x00 "IDFTE45,ID Filter Table Element 45" group.long 0x198++0x3 line.long 0x00 "IDFTE46,ID Filter Table Element 46" group.long 0x19C++0x3 line.long 0x00 "IDFTE47,ID Filter Table Element 47" group.long 0x1A0++0x3 line.long 0x00 "IDFTE48,ID Filter Table Element 48" group.long 0x1A4++0x3 line.long 0x00 "IDFTE49,ID Filter Table Element 49" group.long 0x1A8++0x3 line.long 0x00 "IDFTE50,ID Filter Table Element 50" group.long 0x1AC++0x3 line.long 0x00 "IDFTE51,ID Filter Table Element 51" group.long 0x1B0++0x3 line.long 0x00 "IDFTE52,ID Filter Table Element 52" group.long 0x1B4++0x3 line.long 0x00 "IDFTE53,ID Filter Table Element 53" group.long 0x1B8++0x3 line.long 0x00 "IDFTE54,ID Filter Table Element 54" group.long 0x1BC++0x3 line.long 0x00 "IDFTE55,ID Filter Table Element 55" group.long 0x1C0++0x3 line.long 0x00 "IDFTE56,ID Filter Table Element 56" group.long 0x1C4++0x3 line.long 0x00 "IDFTE57,ID Filter Table Element 57" group.long 0x1C8++0x3 line.long 0x00 "IDFTE58,ID Filter Table Element 58" group.long 0x1CC++0x3 line.long 0x00 "IDFTE59,ID Filter Table Element 59" group.long 0x1D0++0x3 line.long 0x00 "IDFTE60,ID Filter Table Element 60" group.long 0x1D4++0x3 line.long 0x00 "IDFTE61,ID Filter Table Element 61" group.long 0x1D8++0x3 line.long 0x00 "IDFTE62,ID Filter Table Element 62" group.long 0x1DC++0x3 line.long 0x00 "IDFTE63,ID Filter Table Element 63" group.long 0x1E0++0x3 line.long 0x00 "IDFTE64,ID Filter Table Element 64" group.long 0x1E4++0x3 line.long 0x00 "IDFTE65,ID Filter Table Element 65" group.long 0x1E8++0x3 line.long 0x00 "IDFTE66,ID Filter Table Element 66" group.long 0x1EC++0x3 line.long 0x00 "IDFTE67,ID Filter Table Element 67" group.long 0x1F0++0x3 line.long 0x00 "IDFTE68,ID Filter Table Element 68" group.long 0x1F4++0x3 line.long 0x00 "IDFTE69,ID Filter Table Element 69" group.long 0x1F8++0x3 line.long 0x00 "IDFTE70,ID Filter Table Element 70" group.long 0x1FC++0x3 line.long 0x00 "IDFTE71,ID Filter Table Element 71" group.long 0x200++0x3 line.long 0x00 "IDFTE72,ID Filter Table Element 72" group.long 0x204++0x3 line.long 0x00 "IDFTE73,ID Filter Table Element 73" group.long 0x208++0x3 line.long 0x00 "IDFTE74,ID Filter Table Element 74" group.long 0x20C++0x3 line.long 0x00 "IDFTE75,ID Filter Table Element 75" group.long 0x210++0x3 line.long 0x00 "IDFTE76,ID Filter Table Element 76" group.long 0x214++0x3 line.long 0x00 "IDFTE77,ID Filter Table Element 77" group.long 0x218++0x3 line.long 0x00 "IDFTE78,ID Filter Table Element 78" group.long 0x21C++0x3 line.long 0x00 "IDFTE79,ID Filter Table Element 79" group.long 0x220++0x3 line.long 0x00 "IDFTE80,ID Filter Table Element 80" group.long 0x224++0x3 line.long 0x00 "IDFTE81,ID Filter Table Element 81" group.long 0x228++0x3 line.long 0x00 "IDFTE82,ID Filter Table Element 82" group.long 0x22C++0x3 line.long 0x00 "IDFTE83,ID Filter Table Element 83" group.long 0x230++0x3 line.long 0x00 "IDFTE84,ID Filter Table Element 84" group.long 0x234++0x3 line.long 0x00 "IDFTE85,ID Filter Table Element 85" group.long 0x238++0x3 line.long 0x00 "IDFTE86,ID Filter Table Element 86" group.long 0x23C++0x3 line.long 0x00 "IDFTE87,ID Filter Table Element 87" group.long 0x240++0x3 line.long 0x00 "IDFTE88,ID Filter Table Element 88" group.long 0x244++0x3 line.long 0x00 "IDFTE89,ID Filter Table Element 89" group.long 0x248++0x3 line.long 0x00 "IDFTE90,ID Filter Table Element 90" group.long 0x24C++0x3 line.long 0x00 "IDFTE91,ID Filter Table Element 91" group.long 0x250++0x3 line.long 0x00 "IDFTE92,ID Filter Table Element 92" group.long 0x254++0x3 line.long 0x00 "IDFTE93,ID Filter Table Element 93" group.long 0x258++0x3 line.long 0x00 "IDFTE94,ID Filter Table Element 94" group.long 0x25C++0x3 line.long 0x00 "IDFTE95,ID Filter Table Element 95" group.long 0x260++0x3 line.long 0x00 "IDFTE96,ID Filter Table Element 96" group.long 0x264++0x3 line.long 0x00 "IDFTE97,ID Filter Table Element 97" group.long 0x268++0x3 line.long 0x00 "IDFTE98,ID Filter Table Element 98" group.long 0x26C++0x3 line.long 0x00 "IDFTE99,ID Filter Table Element 99" group.long 0x270++0x3 line.long 0x00 "IDFTE100,ID Filter Table Element 100" group.long 0x274++0x3 line.long 0x00 "IDFTE101,ID Filter Table Element 101" group.long 0x278++0x3 line.long 0x00 "IDFTE102,ID Filter Table Element 102" group.long 0x27C++0x3 line.long 0x00 "IDFTE103,ID Filter Table Element 103" group.long 0x280++0x3 line.long 0x00 "IDFTE104,ID Filter Table Element 104" group.long 0x284++0x3 line.long 0x00 "IDFTE105,ID Filter Table Element 105" group.long 0x288++0x3 line.long 0x00 "IDFTE106,ID Filter Table Element 106" group.long 0x28C++0x3 line.long 0x00 "IDFTE107,ID Filter Table Element 107" group.long 0x290++0x3 line.long 0x00 "IDFTE108,ID Filter Table Element 108" group.long 0x294++0x3 line.long 0x00 "IDFTE109,ID Filter Table Element 109" group.long 0x298++0x3 line.long 0x00 "IDFTE110,ID Filter Table Element 110" group.long 0x29C++0x3 line.long 0x00 "IDFTE111,ID Filter Table Element 111" group.long 0x2A0++0x3 line.long 0x00 "IDFTE112,ID Filter Table Element 112" group.long 0x2A4++0x3 line.long 0x00 "IDFTE113,ID Filter Table Element 113" group.long 0x2A8++0x3 line.long 0x00 "IDFTE114,ID Filter Table Element 114" group.long 0x2AC++0x3 line.long 0x00 "IDFTE115,ID Filter Table Element 115" group.long 0x2B0++0x3 line.long 0x00 "IDFTE116,ID Filter Table Element 116" group.long 0x2B4++0x3 line.long 0x00 "IDFTE117,ID Filter Table Element 117" group.long 0x2B8++0x3 line.long 0x00 "IDFTE118,ID Filter Table Element 118" group.long 0x2BC++0x3 line.long 0x00 "IDFTE119,ID Filter Table Element 119" group.long 0x2C0++0x3 line.long 0x00 "IDFTE120,ID Filter Table Element 120" group.long 0x2C4++0x3 line.long 0x00 "IDFTE121,ID Filter Table Element 121" group.long 0x2C8++0x3 line.long 0x00 "IDFTE122,ID Filter Table Element 122" group.long 0x2CC++0x3 line.long 0x00 "IDFTE123,ID Filter Table Element 123" group.long 0x2D0++0x3 line.long 0x00 "IDFTE124,ID Filter Table Element 124" group.long 0x2D4++0x3 line.long 0x00 "IDFTE125,ID Filter Table Element 125" group.long 0x2D8++0x3 line.long 0x00 "IDFTE126,ID Filter Table Element 126" group.long 0x2DC++0x3 line.long 0x00 "IDFTE127,ID Filter Table Element 127" else group.long (0x0080+0x0)++0x03 "Message Buffer Register 0" line.long 0x00 "C/S0,Control and Status 0" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x0)))&0x00200000)==0x00000000) group.long (0x0084+0x0)++0x03 line.long 0x00 "ID0,Identifier Field 0" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x0)++0x03 line.long 0x00 "ID0,Identifier Field 0" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x0)++0x07 line.long 0x00 "DATA0-3_0,Data Field 0-3 0" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_0,Data Field 4-7 0" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x10)++0x03 "Message Buffer Register 1" line.long 0x00 "C/S1,Control and Status 1" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x10)))&0x00200000)==0x00000000) group.long (0x0084+0x10)++0x03 line.long 0x00 "ID1,Identifier Field 1" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x10)++0x03 line.long 0x00 "ID1,Identifier Field 1" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x10)++0x07 line.long 0x00 "DATA0-3_1,Data Field 0-3 1" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_1,Data Field 4-7 1" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x20)++0x03 "Message Buffer Register 2" line.long 0x00 "C/S2,Control and Status 2" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x20)))&0x00200000)==0x00000000) group.long (0x0084+0x20)++0x03 line.long 0x00 "ID2,Identifier Field 2" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x20)++0x03 line.long 0x00 "ID2,Identifier Field 2" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x20)++0x07 line.long 0x00 "DATA0-3_2,Data Field 0-3 2" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_2,Data Field 4-7 2" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x30)++0x03 "Message Buffer Register 3" line.long 0x00 "C/S3,Control and Status 3" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x30)))&0x00200000)==0x00000000) group.long (0x0084+0x30)++0x03 line.long 0x00 "ID3,Identifier Field 3" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x30)++0x03 line.long 0x00 "ID3,Identifier Field 3" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x30)++0x07 line.long 0x00 "DATA0-3_3,Data Field 0-3 3" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_3,Data Field 4-7 3" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x40)++0x03 "Message Buffer Register 4" line.long 0x00 "C/S4,Control and Status 4" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x40)))&0x00200000)==0x00000000) group.long (0x0084+0x40)++0x03 line.long 0x00 "ID4,Identifier Field 4" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x40)++0x03 line.long 0x00 "ID4,Identifier Field 4" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x40)++0x07 line.long 0x00 "DATA0-3_4,Data Field 0-3 4" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_4,Data Field 4-7 4" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x50)++0x03 "Message Buffer Register 5" line.long 0x00 "C/S5,Control and Status 5" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x50)))&0x00200000)==0x00000000) group.long (0x0084+0x50)++0x03 line.long 0x00 "ID5,Identifier Field 5" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x50)++0x03 line.long 0x00 "ID5,Identifier Field 5" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x50)++0x07 line.long 0x00 "DATA0-3_5,Data Field 0-3 5" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_5,Data Field 4-7 5" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x60)++0x03 "Message Buffer Register 6" line.long 0x00 "C/S6,Control and Status 6" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x60)))&0x00200000)==0x00000000) group.long (0x0084+0x60)++0x03 line.long 0x00 "ID6,Identifier Field 6" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x60)++0x03 line.long 0x00 "ID6,Identifier Field 6" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x60)++0x07 line.long 0x00 "DATA0-3_6,Data Field 0-3 6" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_6,Data Field 4-7 6" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x70)++0x03 "Message Buffer Register 7" line.long 0x00 "C/S7,Control and Status 7" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x70)))&0x00200000)==0x00000000) group.long (0x0084+0x70)++0x03 line.long 0x00 "ID7,Identifier Field 7" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x70)++0x03 line.long 0x00 "ID7,Identifier Field 7" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x70)++0x07 line.long 0x00 "DATA0-3_7,Data Field 0-3 7" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_7,Data Field 4-7 7" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x80)++0x03 "Message Buffer Register 8" line.long 0x00 "C/S8,Control and Status 8" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x80)))&0x00200000)==0x00000000) group.long (0x0084+0x80)++0x03 line.long 0x00 "ID8,Identifier Field 8" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x80)++0x03 line.long 0x00 "ID8,Identifier Field 8" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x80)++0x07 line.long 0x00 "DATA0-3_8,Data Field 0-3 8" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_8,Data Field 4-7 8" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x90)++0x03 "Message Buffer Register 9" line.long 0x00 "C/S9,Control and Status 9" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x90)))&0x00200000)==0x00000000) group.long (0x0084+0x90)++0x03 line.long 0x00 "ID9,Identifier Field 9" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x90)++0x03 line.long 0x00 "ID9,Identifier Field 9" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x90)++0x07 line.long 0x00 "DATA0-3_9,Data Field 0-3 9" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_9,Data Field 4-7 9" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xA0)++0x03 "Message Buffer Register 10" line.long 0x00 "C/S10,Control and Status 10" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xA0)))&0x00200000)==0x00000000) group.long (0x0084+0xA0)++0x03 line.long 0x00 "ID10,Identifier Field 10" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xA0)++0x03 line.long 0x00 "ID10,Identifier Field 10" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xA0)++0x07 line.long 0x00 "DATA0-3_10,Data Field 0-3 10" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_10,Data Field 4-7 10" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xB0)++0x03 "Message Buffer Register 11" line.long 0x00 "C/S11,Control and Status 11" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xB0)))&0x00200000)==0x00000000) group.long (0x0084+0xB0)++0x03 line.long 0x00 "ID11,Identifier Field 11" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xB0)++0x03 line.long 0x00 "ID11,Identifier Field 11" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xB0)++0x07 line.long 0x00 "DATA0-3_11,Data Field 0-3 11" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_11,Data Field 4-7 11" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xC0)++0x03 "Message Buffer Register 12" line.long 0x00 "C/S12,Control and Status 12" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xC0)))&0x00200000)==0x00000000) group.long (0x0084+0xC0)++0x03 line.long 0x00 "ID12,Identifier Field 12" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xC0)++0x03 line.long 0x00 "ID12,Identifier Field 12" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xC0)++0x07 line.long 0x00 "DATA0-3_12,Data Field 0-3 12" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_12,Data Field 4-7 12" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xD0)++0x03 "Message Buffer Register 13" line.long 0x00 "C/S13,Control and Status 13" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xD0)))&0x00200000)==0x00000000) group.long (0x0084+0xD0)++0x03 line.long 0x00 "ID13,Identifier Field 13" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xD0)++0x03 line.long 0x00 "ID13,Identifier Field 13" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xD0)++0x07 line.long 0x00 "DATA0-3_13,Data Field 0-3 13" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_13,Data Field 4-7 13" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xE0)++0x03 "Message Buffer Register 14" line.long 0x00 "C/S14,Control and Status 14" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xE0)))&0x00200000)==0x00000000) group.long (0x0084+0xE0)++0x03 line.long 0x00 "ID14,Identifier Field 14" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xE0)++0x03 line.long 0x00 "ID14,Identifier Field 14" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xE0)++0x07 line.long 0x00 "DATA0-3_14,Data Field 0-3 14" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_14,Data Field 4-7 14" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xF0)++0x03 "Message Buffer Register 15" line.long 0x00 "C/S15,Control and Status 15" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0xF0)))&0x00200000)==0x00000000) group.long (0x0084+0xF0)++0x03 line.long 0x00 "ID15,Identifier Field 15" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xF0)++0x03 line.long 0x00 "ID15,Identifier Field 15" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xF0)++0x07 line.long 0x00 "DATA0-3_15,Data Field 0-3 15" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_15,Data Field 4-7 15" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x100)++0x03 "Message Buffer Register 16" line.long 0x00 "C/S16,Control and Status 16" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x100)))&0x00200000)==0x00000000) group.long (0x0084+0x100)++0x03 line.long 0x00 "ID16,Identifier Field 16" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x100)++0x03 line.long 0x00 "ID16,Identifier Field 16" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x100)++0x07 line.long 0x00 "DATA0-3_16,Data Field 0-3 16" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_16,Data Field 4-7 16" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x110)++0x03 "Message Buffer Register 17" line.long 0x00 "C/S17,Control and Status 17" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x110)))&0x00200000)==0x00000000) group.long (0x0084+0x110)++0x03 line.long 0x00 "ID17,Identifier Field 17" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x110)++0x03 line.long 0x00 "ID17,Identifier Field 17" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x110)++0x07 line.long 0x00 "DATA0-3_17,Data Field 0-3 17" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_17,Data Field 4-7 17" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x120)++0x03 "Message Buffer Register 18" line.long 0x00 "C/S18,Control and Status 18" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x120)))&0x00200000)==0x00000000) group.long (0x0084+0x120)++0x03 line.long 0x00 "ID18,Identifier Field 18" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x120)++0x03 line.long 0x00 "ID18,Identifier Field 18" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x120)++0x07 line.long 0x00 "DATA0-3_18,Data Field 0-3 18" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_18,Data Field 4-7 18" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x130)++0x03 "Message Buffer Register 19" line.long 0x00 "C/S19,Control and Status 19" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x130)))&0x00200000)==0x00000000) group.long (0x0084+0x130)++0x03 line.long 0x00 "ID19,Identifier Field 19" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x130)++0x03 line.long 0x00 "ID19,Identifier Field 19" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x130)++0x07 line.long 0x00 "DATA0-3_19,Data Field 0-3 19" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_19,Data Field 4-7 19" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x140)++0x03 "Message Buffer Register 20" line.long 0x00 "C/S20,Control and Status 20" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x140)))&0x00200000)==0x00000000) group.long (0x0084+0x140)++0x03 line.long 0x00 "ID20,Identifier Field 20" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x140)++0x03 line.long 0x00 "ID20,Identifier Field 20" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x140)++0x07 line.long 0x00 "DATA0-3_20,Data Field 0-3 20" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_20,Data Field 4-7 20" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x150)++0x03 "Message Buffer Register 21" line.long 0x00 "C/S21,Control and Status 21" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x150)))&0x00200000)==0x00000000) group.long (0x0084+0x150)++0x03 line.long 0x00 "ID21,Identifier Field 21" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x150)++0x03 line.long 0x00 "ID21,Identifier Field 21" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x150)++0x07 line.long 0x00 "DATA0-3_21,Data Field 0-3 21" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_21,Data Field 4-7 21" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x160)++0x03 "Message Buffer Register 22" line.long 0x00 "C/S22,Control and Status 22" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x160)))&0x00200000)==0x00000000) group.long (0x0084+0x160)++0x03 line.long 0x00 "ID22,Identifier Field 22" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x160)++0x03 line.long 0x00 "ID22,Identifier Field 22" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x160)++0x07 line.long 0x00 "DATA0-3_22,Data Field 0-3 22" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_22,Data Field 4-7 22" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x170)++0x03 "Message Buffer Register 23" line.long 0x00 "C/S23,Control and Status 23" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x170)))&0x00200000)==0x00000000) group.long (0x0084+0x170)++0x03 line.long 0x00 "ID23,Identifier Field 23" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x170)++0x03 line.long 0x00 "ID23,Identifier Field 23" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x170)++0x07 line.long 0x00 "DATA0-3_23,Data Field 0-3 23" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_23,Data Field 4-7 23" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x180)++0x03 "Message Buffer Register 24" line.long 0x00 "C/S24,Control and Status 24" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x180)))&0x00200000)==0x00000000) group.long (0x0084+0x180)++0x03 line.long 0x00 "ID24,Identifier Field 24" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x180)++0x03 line.long 0x00 "ID24,Identifier Field 24" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x180)++0x07 line.long 0x00 "DATA0-3_24,Data Field 0-3 24" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_24,Data Field 4-7 24" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x190)++0x03 "Message Buffer Register 25" line.long 0x00 "C/S25,Control and Status 25" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x190)))&0x00200000)==0x00000000) group.long (0x0084+0x190)++0x03 line.long 0x00 "ID25,Identifier Field 25" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x190)++0x03 line.long 0x00 "ID25,Identifier Field 25" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x190)++0x07 line.long 0x00 "DATA0-3_25,Data Field 0-3 25" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_25,Data Field 4-7 25" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1A0)++0x03 "Message Buffer Register 26" line.long 0x00 "C/S26,Control and Status 26" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1A0)))&0x00200000)==0x00000000) group.long (0x0084+0x1A0)++0x03 line.long 0x00 "ID26,Identifier Field 26" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1A0)++0x03 line.long 0x00 "ID26,Identifier Field 26" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1A0)++0x07 line.long 0x00 "DATA0-3_26,Data Field 0-3 26" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_26,Data Field 4-7 26" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1B0)++0x03 "Message Buffer Register 27" line.long 0x00 "C/S27,Control and Status 27" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1B0)))&0x00200000)==0x00000000) group.long (0x0084+0x1B0)++0x03 line.long 0x00 "ID27,Identifier Field 27" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1B0)++0x03 line.long 0x00 "ID27,Identifier Field 27" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1B0)++0x07 line.long 0x00 "DATA0-3_27,Data Field 0-3 27" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_27,Data Field 4-7 27" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1C0)++0x03 "Message Buffer Register 28" line.long 0x00 "C/S28,Control and Status 28" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1C0)))&0x00200000)==0x00000000) group.long (0x0084+0x1C0)++0x03 line.long 0x00 "ID28,Identifier Field 28" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1C0)++0x03 line.long 0x00 "ID28,Identifier Field 28" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1C0)++0x07 line.long 0x00 "DATA0-3_28,Data Field 0-3 28" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_28,Data Field 4-7 28" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1D0)++0x03 "Message Buffer Register 29" line.long 0x00 "C/S29,Control and Status 29" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1D0)))&0x00200000)==0x00000000) group.long (0x0084+0x1D0)++0x03 line.long 0x00 "ID29,Identifier Field 29" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1D0)++0x03 line.long 0x00 "ID29,Identifier Field 29" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1D0)++0x07 line.long 0x00 "DATA0-3_29,Data Field 0-3 29" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_29,Data Field 4-7 29" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1E0)++0x03 "Message Buffer Register 30" line.long 0x00 "C/S30,Control and Status 30" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1E0)))&0x00200000)==0x00000000) group.long (0x0084+0x1E0)++0x03 line.long 0x00 "ID30,Identifier Field 30" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1E0)++0x03 line.long 0x00 "ID30,Identifier Field 30" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1E0)++0x07 line.long 0x00 "DATA0-3_30,Data Field 0-3 30" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_30,Data Field 4-7 30" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1F0)++0x03 "Message Buffer Register 31" line.long 0x00 "C/S31,Control and Status 31" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x1F0)))&0x00200000)==0x00000000) group.long (0x0084+0x1F0)++0x03 line.long 0x00 "ID31,Identifier Field 31" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1F0)++0x03 line.long 0x00 "ID31,Identifier Field 31" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1F0)++0x07 line.long 0x00 "DATA0-3_31,Data Field 0-3 31" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_31,Data Field 4-7 31" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x200)++0x03 "Message Buffer Register 32" line.long 0x00 "C/S32,Control and Status 32" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x200)))&0x00200000)==0x00000000) group.long (0x0084+0x200)++0x03 line.long 0x00 "ID32,Identifier Field 32" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x200)++0x03 line.long 0x00 "ID32,Identifier Field 32" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x200)++0x07 line.long 0x00 "DATA0-3_32,Data Field 0-3 32" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_32,Data Field 4-7 32" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x210)++0x03 "Message Buffer Register 33" line.long 0x00 "C/S33,Control and Status 33" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x210)))&0x00200000)==0x00000000) group.long (0x0084+0x210)++0x03 line.long 0x00 "ID33,Identifier Field 33" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x210)++0x03 line.long 0x00 "ID33,Identifier Field 33" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x210)++0x07 line.long 0x00 "DATA0-3_33,Data Field 0-3 33" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_33,Data Field 4-7 33" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x220)++0x03 "Message Buffer Register 34" line.long 0x00 "C/S34,Control and Status 34" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x220)))&0x00200000)==0x00000000) group.long (0x0084+0x220)++0x03 line.long 0x00 "ID34,Identifier Field 34" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x220)++0x03 line.long 0x00 "ID34,Identifier Field 34" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x220)++0x07 line.long 0x00 "DATA0-3_34,Data Field 0-3 34" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_34,Data Field 4-7 34" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x230)++0x03 "Message Buffer Register 35" line.long 0x00 "C/S35,Control and Status 35" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x230)))&0x00200000)==0x00000000) group.long (0x0084+0x230)++0x03 line.long 0x00 "ID35,Identifier Field 35" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x230)++0x03 line.long 0x00 "ID35,Identifier Field 35" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x230)++0x07 line.long 0x00 "DATA0-3_35,Data Field 0-3 35" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_35,Data Field 4-7 35" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x240)++0x03 "Message Buffer Register 36" line.long 0x00 "C/S36,Control and Status 36" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x240)))&0x00200000)==0x00000000) group.long (0x0084+0x240)++0x03 line.long 0x00 "ID36,Identifier Field 36" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x240)++0x03 line.long 0x00 "ID36,Identifier Field 36" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x240)++0x07 line.long 0x00 "DATA0-3_36,Data Field 0-3 36" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_36,Data Field 4-7 36" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x250)++0x03 "Message Buffer Register 37" line.long 0x00 "C/S37,Control and Status 37" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x0080+0x250)))&0x00200000)==0x00000000) group.long (0x0084+0x250)++0x03 line.long 0x00 "ID37,Identifier Field 37" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x250)++0x03 line.long 0x00 "ID37,Identifier Field 37" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x250)++0x07 line.long 0x00 "DATA0-3_37,Data Field 0-3 37" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_37,Data Field 4-7 37" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" endif group.long (0x02E0+0x0)++0x03 "Message Buffer Register 38" line.long 0x00 "C/S38,Control and Status 38" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x0)))&0x00200000)==0x00000000) group.long (0x2E4+0x0)++0x03 line.long 0x00 "ID38,Identifier Field 38" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x0)++0x03 line.long 0x00 "ID38,Identifier Field 38" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x0)++0x07 line.long 0x00 "DATA0-3_38,Data Field 0-3 38" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_38,Data Field 4-7 38" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x10)++0x03 "Message Buffer Register 39" line.long 0x00 "C/S39,Control and Status 39" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x10)))&0x00200000)==0x00000000) group.long (0x2E4+0x10)++0x03 line.long 0x00 "ID39,Identifier Field 39" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x10)++0x03 line.long 0x00 "ID39,Identifier Field 39" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x10)++0x07 line.long 0x00 "DATA0-3_39,Data Field 0-3 39" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_39,Data Field 4-7 39" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x20)++0x03 "Message Buffer Register 40" line.long 0x00 "C/S40,Control and Status 40" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x20)))&0x00200000)==0x00000000) group.long (0x2E4+0x20)++0x03 line.long 0x00 "ID40,Identifier Field 40" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x20)++0x03 line.long 0x00 "ID40,Identifier Field 40" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x20)++0x07 line.long 0x00 "DATA0-3_40,Data Field 0-3 40" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_40,Data Field 4-7 40" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x30)++0x03 "Message Buffer Register 41" line.long 0x00 "C/S41,Control and Status 41" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x30)))&0x00200000)==0x00000000) group.long (0x2E4+0x30)++0x03 line.long 0x00 "ID41,Identifier Field 41" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x30)++0x03 line.long 0x00 "ID41,Identifier Field 41" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x30)++0x07 line.long 0x00 "DATA0-3_41,Data Field 0-3 41" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_41,Data Field 4-7 41" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x40)++0x03 "Message Buffer Register 42" line.long 0x00 "C/S42,Control and Status 42" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x40)))&0x00200000)==0x00000000) group.long (0x2E4+0x40)++0x03 line.long 0x00 "ID42,Identifier Field 42" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x40)++0x03 line.long 0x00 "ID42,Identifier Field 42" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x40)++0x07 line.long 0x00 "DATA0-3_42,Data Field 0-3 42" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_42,Data Field 4-7 42" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x50)++0x03 "Message Buffer Register 43" line.long 0x00 "C/S43,Control and Status 43" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x50)))&0x00200000)==0x00000000) group.long (0x2E4+0x50)++0x03 line.long 0x00 "ID43,Identifier Field 43" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x50)++0x03 line.long 0x00 "ID43,Identifier Field 43" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x50)++0x07 line.long 0x00 "DATA0-3_43,Data Field 0-3 43" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_43,Data Field 4-7 43" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x60)++0x03 "Message Buffer Register 44" line.long 0x00 "C/S44,Control and Status 44" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x60)))&0x00200000)==0x00000000) group.long (0x2E4+0x60)++0x03 line.long 0x00 "ID44,Identifier Field 44" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x60)++0x03 line.long 0x00 "ID44,Identifier Field 44" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x60)++0x07 line.long 0x00 "DATA0-3_44,Data Field 0-3 44" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_44,Data Field 4-7 44" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x70)++0x03 "Message Buffer Register 45" line.long 0x00 "C/S45,Control and Status 45" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x70)))&0x00200000)==0x00000000) group.long (0x2E4+0x70)++0x03 line.long 0x00 "ID45,Identifier Field 45" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x70)++0x03 line.long 0x00 "ID45,Identifier Field 45" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x70)++0x07 line.long 0x00 "DATA0-3_45,Data Field 0-3 45" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_45,Data Field 4-7 45" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x80)++0x03 "Message Buffer Register 46" line.long 0x00 "C/S46,Control and Status 46" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x80)))&0x00200000)==0x00000000) group.long (0x2E4+0x80)++0x03 line.long 0x00 "ID46,Identifier Field 46" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x80)++0x03 line.long 0x00 "ID46,Identifier Field 46" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x80)++0x07 line.long 0x00 "DATA0-3_46,Data Field 0-3 46" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_46,Data Field 4-7 46" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x90)++0x03 "Message Buffer Register 47" line.long 0x00 "C/S47,Control and Status 47" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x90)))&0x00200000)==0x00000000) group.long (0x2E4+0x90)++0x03 line.long 0x00 "ID47,Identifier Field 47" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x90)++0x03 line.long 0x00 "ID47,Identifier Field 47" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x90)++0x07 line.long 0x00 "DATA0-3_47,Data Field 0-3 47" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_47,Data Field 4-7 47" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xA0)++0x03 "Message Buffer Register 48" line.long 0x00 "C/S48,Control and Status 48" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xA0)))&0x00200000)==0x00000000) group.long (0x2E4+0xA0)++0x03 line.long 0x00 "ID48,Identifier Field 48" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xA0)++0x03 line.long 0x00 "ID48,Identifier Field 48" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xA0)++0x07 line.long 0x00 "DATA0-3_48,Data Field 0-3 48" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_48,Data Field 4-7 48" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xB0)++0x03 "Message Buffer Register 49" line.long 0x00 "C/S49,Control and Status 49" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xB0)))&0x00200000)==0x00000000) group.long (0x2E4+0xB0)++0x03 line.long 0x00 "ID49,Identifier Field 49" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xB0)++0x03 line.long 0x00 "ID49,Identifier Field 49" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xB0)++0x07 line.long 0x00 "DATA0-3_49,Data Field 0-3 49" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_49,Data Field 4-7 49" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xC0)++0x03 "Message Buffer Register 50" line.long 0x00 "C/S50,Control and Status 50" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xC0)))&0x00200000)==0x00000000) group.long (0x2E4+0xC0)++0x03 line.long 0x00 "ID50,Identifier Field 50" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xC0)++0x03 line.long 0x00 "ID50,Identifier Field 50" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xC0)++0x07 line.long 0x00 "DATA0-3_50,Data Field 0-3 50" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_50,Data Field 4-7 50" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xD0)++0x03 "Message Buffer Register 51" line.long 0x00 "C/S51,Control and Status 51" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xD0)))&0x00200000)==0x00000000) group.long (0x2E4+0xD0)++0x03 line.long 0x00 "ID51,Identifier Field 51" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xD0)++0x03 line.long 0x00 "ID51,Identifier Field 51" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xD0)++0x07 line.long 0x00 "DATA0-3_51,Data Field 0-3 51" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_51,Data Field 4-7 51" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xE0)++0x03 "Message Buffer Register 52" line.long 0x00 "C/S52,Control and Status 52" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xE0)))&0x00200000)==0x00000000) group.long (0x2E4+0xE0)++0x03 line.long 0x00 "ID52,Identifier Field 52" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xE0)++0x03 line.long 0x00 "ID52,Identifier Field 52" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xE0)++0x07 line.long 0x00 "DATA0-3_52,Data Field 0-3 52" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_52,Data Field 4-7 52" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xF0)++0x03 "Message Buffer Register 53" line.long 0x00 "C/S53,Control and Status 53" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0xF0)))&0x00200000)==0x00000000) group.long (0x2E4+0xF0)++0x03 line.long 0x00 "ID53,Identifier Field 53" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xF0)++0x03 line.long 0x00 "ID53,Identifier Field 53" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xF0)++0x07 line.long 0x00 "DATA0-3_53,Data Field 0-3 53" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_53,Data Field 4-7 53" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x100)++0x03 "Message Buffer Register 54" line.long 0x00 "C/S54,Control and Status 54" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x100)))&0x00200000)==0x00000000) group.long (0x2E4+0x100)++0x03 line.long 0x00 "ID54,Identifier Field 54" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x100)++0x03 line.long 0x00 "ID54,Identifier Field 54" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x100)++0x07 line.long 0x00 "DATA0-3_54,Data Field 0-3 54" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_54,Data Field 4-7 54" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x110)++0x03 "Message Buffer Register 55" line.long 0x00 "C/S55,Control and Status 55" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x110)))&0x00200000)==0x00000000) group.long (0x2E4+0x110)++0x03 line.long 0x00 "ID55,Identifier Field 55" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x110)++0x03 line.long 0x00 "ID55,Identifier Field 55" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x110)++0x07 line.long 0x00 "DATA0-3_55,Data Field 0-3 55" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_55,Data Field 4-7 55" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x120)++0x03 "Message Buffer Register 56" line.long 0x00 "C/S56,Control and Status 56" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x120)))&0x00200000)==0x00000000) group.long (0x2E4+0x120)++0x03 line.long 0x00 "ID56,Identifier Field 56" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x120)++0x03 line.long 0x00 "ID56,Identifier Field 56" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x120)++0x07 line.long 0x00 "DATA0-3_56,Data Field 0-3 56" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_56,Data Field 4-7 56" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x130)++0x03 "Message Buffer Register 57" line.long 0x00 "C/S57,Control and Status 57" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x130)))&0x00200000)==0x00000000) group.long (0x2E4+0x130)++0x03 line.long 0x00 "ID57,Identifier Field 57" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x130)++0x03 line.long 0x00 "ID57,Identifier Field 57" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x130)++0x07 line.long 0x00 "DATA0-3_57,Data Field 0-3 57" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_57,Data Field 4-7 57" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x140)++0x03 "Message Buffer Register 58" line.long 0x00 "C/S58,Control and Status 58" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x140)))&0x00200000)==0x00000000) group.long (0x2E4+0x140)++0x03 line.long 0x00 "ID58,Identifier Field 58" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x140)++0x03 line.long 0x00 "ID58,Identifier Field 58" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x140)++0x07 line.long 0x00 "DATA0-3_58,Data Field 0-3 58" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_58,Data Field 4-7 58" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x150)++0x03 "Message Buffer Register 59" line.long 0x00 "C/S59,Control and Status 59" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x150)))&0x00200000)==0x00000000) group.long (0x2E4+0x150)++0x03 line.long 0x00 "ID59,Identifier Field 59" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x150)++0x03 line.long 0x00 "ID59,Identifier Field 59" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x150)++0x07 line.long 0x00 "DATA0-3_59,Data Field 0-3 59" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_59,Data Field 4-7 59" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x160)++0x03 "Message Buffer Register 60" line.long 0x00 "C/S60,Control and Status 60" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x160)))&0x00200000)==0x00000000) group.long (0x2E4+0x160)++0x03 line.long 0x00 "ID60,Identifier Field 60" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x160)++0x03 line.long 0x00 "ID60,Identifier Field 60" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x160)++0x07 line.long 0x00 "DATA0-3_60,Data Field 0-3 60" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_60,Data Field 4-7 60" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x170)++0x03 "Message Buffer Register 61" line.long 0x00 "C/S61,Control and Status 61" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x170)))&0x00200000)==0x00000000) group.long (0x2E4+0x170)++0x03 line.long 0x00 "ID61,Identifier Field 61" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x170)++0x03 line.long 0x00 "ID61,Identifier Field 61" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x170)++0x07 line.long 0x00 "DATA0-3_61,Data Field 0-3 61" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_61,Data Field 4-7 61" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x180)++0x03 "Message Buffer Register 62" line.long 0x00 "C/S62,Control and Status 62" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x180)))&0x00200000)==0x00000000) group.long (0x2E4+0x180)++0x03 line.long 0x00 "ID62,Identifier Field 62" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x180)++0x03 line.long 0x00 "ID62,Identifier Field 62" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x180)++0x07 line.long 0x00 "DATA0-3_62,Data Field 0-3 62" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_62,Data Field 4-7 62" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x190)++0x03 "Message Buffer Register 63" line.long 0x00 "C/S63,Control and Status 63" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02090000+0x02E0+0x190)))&0x00200000)==0x00000000) group.long (0x2E4+0x190)++0x03 line.long 0x00 "ID63,Identifier Field 63" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x190)++0x03 line.long 0x00 "ID63,Identifier Field 63" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x190)++0x07 line.long 0x00 "DATA0-3_63,Data Field 0-3 63" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_63,Data Field 4-7 63" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" tree.end width 9. tree "Rx Individual Mask Registers 0-15" if ((((per.l(ad:0x02090000+0x80))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x80))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x80))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x90))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x90))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x90))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xA0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xA0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xA0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xB0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xB0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xB0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xC0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xC0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xC0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xD0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xD0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xD0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xE0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xE0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xE0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0xF0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xF0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0xF0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x100))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x100))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x100))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x110))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x110))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x110))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x120))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x120))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x120))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x130))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x130))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x130))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x140))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x140))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x140))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x150))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x150))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x150))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x160))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x160))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x160))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x170))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x170))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x170))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 16-31" if ((((per.l(ad:0x02090000+0x180))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x180))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x180))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x190))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x190))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x190))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1A0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1B0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1C0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1D0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1E0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x1F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x1F0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x200))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x200))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x200))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x210))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x210))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x210))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x220))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x220))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x220))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x230))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x230))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x230))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x240))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x240))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x240))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x250))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x250))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x250))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x260))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x260))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x260))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x270))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x270))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x270))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 32-47" if ((((per.l(ad:0x02090000+0x280))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x280))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x280))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x290))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x290))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x290))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2A0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2B0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2C0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2D0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2E0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x2F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x2F0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x300))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x300))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x300))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x310))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x310))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x310))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x320))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x320))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x320))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x330))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x330))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x330))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x340))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x340))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x340))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x350))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x350))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x350))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x360))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x360))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x360))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x370))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x370))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x370))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 48-63" if ((((per.l(ad:0x02090000+0x380))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x380))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x380))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x390))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x390))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x390))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3A0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3B0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3C0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3D0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3E0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x3F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x3F0))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x400))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x400))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x400))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x410))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x410))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x410))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x420))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x420))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x420))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x430))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x430))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x430))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x440))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x440))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x440))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x450))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x450))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x450))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x460))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x460))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x460))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02090000+0x470))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x470))&0x200000)==0x00000000)&&(((per.l(ad:0x02090000))&0x1000000)==0x00)) rgroup.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02090000+0x470))&0x200000)==0x200000)&&(((per.l(ad:0x02090000))&0x1000000)==0x1000000)) group.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end width 0x0B tree.end tree "CAN 2" base ad:0x02094000 width 10. tree "Common Registers" group.long 0x00++0x03 line.long 0x00 "MCR,Module Configuration Register" bitfld.long 0x00 31. " MDIS ,Module disable" "No,Yes" bitfld.long 0x00 30. " FRZ ,Freeze enable" "Disabled,Enabled" bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enable" "Disabled,Enabled" bitfld.long 0x00 28. " HALT ,FlexCAN freeze mode" "Not requested,Requested" textline " " rbitfld.long 0x00 27. " NOT_RDY ,FlexCAN not ready" "Normal/listen-only/loopback,Disable/stop/freeze" bitfld.long 0x00 26. " WAK_MSK ,Wake-up interrupt mask" "Disabled,Enabled" bitfld.long 0x00 25. " SOFT_RST ,Soft reset" "No reset,Reset" rbitfld.long 0x00 24. " FRZ_ACK ,Freeze mode acknowledge" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 23. " SUPV ,Supervisor mode" "Disabled,Enabled" bitfld.long 0x00 22. " SLF_WAK ,Self wake-up" "Disabled,Enabled" bitfld.long 0x00 21. " WRN_EN ,Warning Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 20. " LPM_ACK ,Low power mode acknowledge" "No low-power,Disable/stop" textline " " bitfld.long 0x00 19. " WAK_SRC ,Wake-up source" "Unfiltered Rx,Filtered Rx" bitfld.long 0x00 17. " SRX_DIS ,Self Reception Disable" "No,Yes" bitfld.long 0x00 16. " IRMQ ,Individual Rx masking and queue feature enable" "Disabled,Enabled" bitfld.long 0x00 13. " LPRIO_EN ,Local priority feature enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D" hexmask.long.byte 0x00 00.--06. 1. " MAXMB ,Maximum number of message buffers" if (((per.l(ad:0x02094000))&0x1200000)==0x1200000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" bitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" bitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" bitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" bitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" bitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " bitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" bitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" bitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" elif (((per.l(ad:0x02094000))&0x1200000)==0x0200000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" rbitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" rbitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" rbitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" bitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" rbitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" rbitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " rbitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" rbitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" rbitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" elif (((per.l(ad:0x02094000))&0x1200000)==0x1000000) group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" bitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" bitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" bitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" rbitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" bitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " bitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" bitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" bitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" else group.long 0x04++0x03 line.long 0x00 "CTRL1,Control Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Prescaler division factor" bitfld.long 0x00 22.--23. " RJW ,Resync jump width" "1,2,3,4" rbitfld.long 0x00 19.--21. " PSEG1 ,Phase Buffer Segment 1" "1,2,3,4,5,6,7,8" rbitfld.long 0x00 16.--18. " PSEG2 ,Phase Buffer Segment 2" ",2,3,4,5,6,7,8" textline " " bitfld.long 0x00 15. " BOFF_MSK , Bus off mask" "Disabled,Enabled" bitfld.long 0x00 14. " ERR_MSK , Error mask" "Disabled,Enabled" rbitfld.long 0x00 12. " LPB ,Loop back" "Disabled,Enabled" rbitfld.long 0x00 11. " TWRN_MSK ,Tx Warning interrupt mask" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " RWRN_MSK ,Rx Warning Interrupt Mask" "Disabled,Enabled" rbitfld.long 0x00 07. " SMP ,Sampling mode" "1 sample,3 samples" bitfld.long 0x00 06. " BOFF_REC ,Bus off recovery mode" "Enabled,Disabled" rbitfld.long 0x00 05. " TSYN ,Timer sync mode" "Disabled,Enabled" textline " " rbitfld.long 0x00 04. " LBUF ,Lowest buffer transmitted first" "With highest priority,Lowest number" rbitfld.long 0x00 03. " LOM ,Listen-only mode" "Disabled,Enabled" rbitfld.long 0x00 00.--02. " PROPSEG ,Propagation segment" "1,2,3,4,5,6,7,8" endif group.long 0x08++0x03 line.long 0x00 "TIMER,Free-Running Timer Register" hexmask.long.word 0x00 00.--15. 1. " TIMER ,Timer value" textline " " if (((per.l(ad:0x02094000))&0x1000000)==0x1000000) group.long 0x10++0x0B line.long 0x00 "RXGMASK,Rx Global Mask Register" bitfld.long 0x00 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x00 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x00 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register" bitfld.long 0x04 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x04 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x04 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x04 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x04 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x04 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x04 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x04 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x04 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x04 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x04 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x04 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x04 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x04 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x04 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x04 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x04 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x04 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x04 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x04 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x04 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x04 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x04 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x04 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x04 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x04 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x04 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x04 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x04 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x04 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x04 00. ",Extended ID mask bit 0" "0,1" line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register" bitfld.long 0x08 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x08 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x08 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x08 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x08 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x08 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x08 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x08 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x08 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x08 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x08 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x08 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x08 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x08 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x08 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x08 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x08 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x08 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x08 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x08 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x08 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x08 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x08 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x08 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x08 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x08 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x08 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x08 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x08 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x08 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x08 00. ",Extended ID mask bit 0" "0,1" else rgroup.long 0x10++0x0B line.long 0x00 "RXGMASK,Rx Global Mask Register" bitfld.long 0x00 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x00 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x00 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register" bitfld.long 0x04 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x04 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x04 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x04 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x04 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x04 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x04 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x04 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x04 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x04 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x04 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x04 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x04 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x04 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x04 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x04 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x04 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x04 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x04 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x04 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x04 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x04 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x04 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x04 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x04 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x04 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x04 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x04 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x04 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x04 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x04 00. ",Extended ID mask bit 0" "0,1" line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register" bitfld.long 0x08 31. " RTR ,RTR bit of Incoming Frame" "0,1" bitfld.long 0x08 30. " IDE ,IDE bit of Incoming Frame" "0,1" textline " " bitfld.long 0x08 28. " MI[28:0] ,Standard ID mask bit 28" "0,1" bitfld.long 0x08 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x08 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x08 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x08 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x08 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x08 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x08 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x08 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x08 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x08 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x08 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x08 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x08 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x08 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x08 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x08 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x08 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x08 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x08 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x08 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x08 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x08 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x08 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x08 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x08 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x08 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x08 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x08 00. ",Extended ID mask bit 0" "0,1" endif textline " " group.long 0x1C++0x03 line.long 0x00 "ECR,Error Counter Register" hexmask.long.byte 0x00 08.--15. 1. " RX_ERR_COUNTER ,Rx Error Counter" hexmask.long.byte 0x00 00.--07. 1. " TX_ERR_COUNTER ,Tx Error Counter" hgroup.long 0x0020++0x03 hide.long 0x00 "ESR1,Error and Status Register 1" in textline " " group.long 0x0024++0x0B line.long 0x00 "IMASK2,Interrupt Mask Register 2" bitfld.long 0x00 31. " BUF63M ,Buffer 63 MB Mask" "Disabled,Enabled" bitfld.long 0x00 30. " BUF62M ,Buffer 62 MB Mask" "Disabled,Enabled" bitfld.long 0x00 29. " BUF61M ,Buffer 61 MB Mask" "Disabled,Enabled" bitfld.long 0x00 28. " BUF60M ,Buffer 60 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BUF59M ,Buffer 59 MB Mask" "Disabled,Enabled" bitfld.long 0x00 26. " BUF58M ,Buffer 58 MB Mask" "Disabled,Enabled" bitfld.long 0x00 25. " BUF57M ,Buffer 57 MB Mask" "Disabled,Enabled" bitfld.long 0x00 24. " BUF56M ,Buffer 56 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BUF55M ,Buffer 55 MB Mask" "Disabled,Enabled" bitfld.long 0x00 22. " BUF54M ,Buffer 54 MB Mask" "Disabled,Enabled" bitfld.long 0x00 21. " BUF53M ,Buffer 53 MB Mask" "Disabled,Enabled" bitfld.long 0x00 20. " BUF52M ,Buffer 52 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " BUF51M ,Buffer 51 MB Mask" "Disabled,Enabled" bitfld.long 0x00 18. " BUF50M ,Buffer 50 MB Mask" "Disabled,Enabled" bitfld.long 0x00 17. " BUF49M ,Buffer 49 MB Mask" "Disabled,Enabled" bitfld.long 0x00 16. " BUF48M ,Buffer 48 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " BUF47M ,Buffer 47 MB Mask" "Disabled,Enabled" bitfld.long 0x00 14. " BUF46M ,Buffer 46 MB Mask" "Disabled,Enabled" bitfld.long 0x00 13. " BUF45M ,Buffer 45 MB Mask" "Disabled,Enabled" bitfld.long 0x00 12. " BUF44M ,Buffer 44 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " BUF43M ,Buffer 43 MB Mask" "Disabled,Enabled" bitfld.long 0x00 10. " BUF42M ,Buffer 42 MB Mask" "Disabled,Enabled" bitfld.long 0x00 9. " BUF41M ,Buffer 41 MB Mask" "Disabled,Enabled" bitfld.long 0x00 8. " BUF40M ,Buffer 40 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUF39M ,Buffer 39 MB Mask" "Disabled,Enabled" bitfld.long 0x00 6. " BUF38M ,Buffer 38 MB Mask" "Disabled,Enabled" bitfld.long 0x00 5. " BUF37M ,Buffer 37 MB Mask" "Disabled,Enabled" bitfld.long 0x00 4. " BUF36M ,Buffer 36 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF35M ,Buffer 35 MB Mask" "Disabled,Enabled" bitfld.long 0x00 2. " BUF34M ,Buffer 34 MB Mask" "Disabled,Enabled" bitfld.long 0x00 1. " BUF33M ,Buffer 33 MB Mask" "Disabled,Enabled" bitfld.long 0x00 0. " BUF32M ,Buffer 32 MB Mask" "Disabled,Enabled" line.long 0x04 "IMASK1,Interrupt Masks Register 1" bitfld.long 0x04 31. " BUF31M ,Buffer 31 MB Mask" "Disabled,Enabled" bitfld.long 0x04 30. " BUF30M ,Buffer 30 MB Mask" "Disabled,Enabled" bitfld.long 0x04 29. " BUF29M ,Buffer 29 MB Mask" "Disabled,Enabled" bitfld.long 0x04 28. " BUF28M ,Buffer 28 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " BUF27M ,Buffer 27 MB Mask" "Disabled,Enabled" bitfld.long 0x04 26. " BUF26M ,Buffer 26 MB Mask" "Disabled,Enabled" bitfld.long 0x04 25. " BUF25M ,Buffer 25 MB Mask" "Disabled,Enabled" bitfld.long 0x04 24. " BUF24M ,Buffer 24 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " BUF23M ,Buffer 23 MB Mask" "Disabled,Enabled" bitfld.long 0x04 22. " BUF22M ,Buffer 22 MB Mask" "Disabled,Enabled" bitfld.long 0x04 21. " BUF21M ,Buffer 21 MB Mask" "Disabled,Enabled" bitfld.long 0x04 20. " BUF20M ,Buffer 20 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " BUF19M ,Buffer 19 MB Mask" "Disabled,Enabled" bitfld.long 0x04 18. " BUF18M ,Buffer 18 MB Mask" "Disabled,Enabled" bitfld.long 0x04 17. " BUF17M ,Buffer 17 MB Mask" "Disabled,Enabled" bitfld.long 0x04 16. " BUF16M ,Buffer 16 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " BUF15M ,Buffer 15 MB Mask" "Disabled,Enabled" bitfld.long 0x04 14. " BUF14M ,Buffer 14 MB Mask" "Disabled,Enabled" bitfld.long 0x04 13. " BUF13M ,Buffer 13 MB Mask" "Disabled,Enabled" bitfld.long 0x04 12. " BUF12M ,Buffer 12 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " BUF11M ,Buffer 11 MB Mask" "Disabled,Enabled" bitfld.long 0x04 10. " BUF10M ,Buffer 10 MB Mask" "Disabled,Enabled" bitfld.long 0x04 09. " BUF9M ,Buffer 9 MB Mask" "Disabled,Enabled" bitfld.long 0x04 08. " BUF8M ,Buffer 8 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 07. " BUF7M ,Buffer 7 MB Mask" "Disabled,Enabled" bitfld.long 0x04 06. " BUF6M ,Buffer 6 MB Mask" "Disabled,Enabled" bitfld.long 0x04 05. " BUF5M ,Buffer 5 MB Mask" "Disabled,Enabled" bitfld.long 0x04 04. " BUF4M ,Buffer 4 MB Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 03. " BUF3M ,Buffer 3 MB Mask" "Disabled,Enabled" bitfld.long 0x04 02. " BUF2M ,Buffer 2 MB Mask" "Disabled,Enabled" bitfld.long 0x04 01. " BUF1M ,Buffer 1 MB Mask" "Disabled,Enabled" bitfld.long 0x04 00. " BUF0M ,Buffer 0 MB Mask" "Disabled,Enabled" line.long 0x08 "IFLAG2,Interrupt Flags 2 Register" eventfld.long 0x08 31. " BUF63I ,Buffer 63 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 30. " BUF62I ,Buffer 62 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 29. " BUF61I ,Buffer 61 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 28. " BUF60I ,Buffer 60 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 27. " BUF59I ,Buffer 59 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 26. " BUF58I ,Buffer 58 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 25. " BUF57I ,Buffer 57 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 24. " BUF56I ,Buffer 56 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 23. " BUF55I ,Buffer 55 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 22. " BUF54I ,Buffer 54 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 21. " BUF53I ,Buffer 53 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 20. " BUF52I ,Buffer 52 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 19. " BUF51I ,Buffer 51 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 18. " BUF50I ,Buffer 50 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 17. " BUF49I ,Buffer 49 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 16. " BUF48I ,Buffer 48 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 15. " BUF47I ,Buffer 47 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 14. " BUF46I ,Buffer 46 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 13. " BUF45I ,Buffer 45 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 12. " BUF44I ,Buffer 44 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 11. " BUF43I ,Buffer 43 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 10. " BUF42I ,Buffer 42 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 9. " BUF41I ,Buffer 41 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 8. " BUF40I ,Buffer 40 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 7. " BUF39I ,Buffer 39 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 6. " BUF38I ,Buffer 38 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 5. " BUF37I ,Buffer 37 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 4. " BUF36I ,Buffer 36 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x08 3. " BUF35I ,Buffer 35 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 2. " BUF34I ,Buffer 34 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 1. " BUF33I ,Buffer 33 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x08 0. " BUF32I ,Buffer 32 MB Interrupt" "Not occurred,Occurred" if (((per.l(ad:0x02094000))&0x20000000)==0x00) group.long 0x0030++0x03 line.long 0x00 "IFLAG1,Interrupt Flags 1 Register" eventfld.long 0x00 31. " BUF31I ,Buffer 31 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 30. " BUF30I ,Buffer 30 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 29. " BUF29I ,Buffer 29 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 28. " BUF28I ,Buffer 28 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 27. " BUF27I ,Buffer 27 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 26. " BUF26I ,Buffer 26 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 25. " BUF25I ,Buffer 25 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 24. " BUF24I ,Buffer 24 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " BUF23I ,Buffer 23 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 22. " BUF22I ,Buffer 22 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 21. " BUF21I ,Buffer 21 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 20. " BUF20I ,Buffer 20 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " BUF19I ,Buffer 19 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 18. " BUF18I ,Buffer 18 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 17. " BUF17I ,Buffer 17 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 16. " BUF16I ,Buffer 16 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " BUF15I ,Buffer 15 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 14. " BUF14I ,Buffer 14 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 13. " BUF13I ,Buffer 13 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 12. " BUF12I ,Buffer 12 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 11. " BUF11I ,Buffer 11 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 10. " BUF10I ,Buffer 10 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 09. " BUF9I ,Buffer 9 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 08. " BUF8I ,Buffer 8 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 07. " BUF7I ,Buffer 7 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 06. " BUF6I ,Buffer 6 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 05. " BUF5I ,Buffer 5 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 04. " BUF4I ,Buffer 4 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 03. " BUF3I ,Buffer 3 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 02. " BUF2I ,Buffer 2 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 01. " BUF1I ,Buffer 1 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 00. " BUF0I ,Buffer 0 MB Interrupt" "Not occurred,Occurred" else group.long 0x0030++0x03 line.long 0x00 "IFLAG1,Interrupt Flags 1 Register" eventfld.long 0x00 31. " BUF31I ,Buffer 31 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 30. " BUF30I ,Buffer 30 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 29. " BUF29I ,Buffer 29 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 28. " BUF28I ,Buffer 28 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 27. " BUF27I ,Buffer 27 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 26. " BUF26I ,Buffer 26 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 25. " BUF25I ,Buffer 25 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 24. " BUF24I ,Buffer 24 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " BUF23I ,Buffer 23 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 22. " BUF22I ,Buffer 22 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 21. " BUF21I ,Buffer 21 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 20. " BUF20I ,Buffer 20 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " BUF19I ,Buffer 19 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 18. " BUF18I ,Buffer 18 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 17. " BUF17I ,Buffer 17 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 16. " BUF16I ,Buffer 16 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " BUF15I ,Buffer 15 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 14. " BUF14I ,Buffer 14 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 13. " BUF13I ,Buffer 13 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 12. " BUF12I ,Buffer 12 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 11. " BUF11I ,Buffer 11 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 10. " BUF10I ,Buffer 10 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 09. " BUF9I ,Buffer 9 MB Interrupt" "Not occurred,Occurred" eventfld.long 0x00 08. " BUF8I ,Buffer 8 MB Interrupt" "Not occurred,Occurred" textline " " eventfld.long 0x00 07. " BUF7I ,FIFO overflow condition" "No overflow,Overflow" eventfld.long 0x00 06. " BUF6I ,4 out of 6 buffers of the FIFO are already occupied" "Not occupied,Occupied" eventfld.long 0x00 05. " BUF5I ,Least one frame is available to be read from the FIFO" "Not available,Available" endif sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX6*") group.long 0x34++0x3 line.long 0x00 "GFWR,Glitch Filter Width Register" hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch Filter Width" else group.long 0x34++0x3 line.long 0x00 "CTRL2,Control 2 Register" bitfld.long 0x00 28. " WRMFRZ ,Unrestricted write access to FlexCAN memory enable" "Disabled,Enabled" bitfld.long 0x00 24.--27. " RFEN ,Number of Rx FIFO filters" "8,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128" bitfld.long 0x00 19.--23. " TASD ,Tx Can bits delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " MRP ,Matching start process" "Rx FIFO->Mailboxes,Mailboxes->Rx FIFO" textline " " bitfld.long 0x00 17. " RRS ,Remote Request Frame generate/store" "Generated,Stored" bitfld.long 0x00 16. " EACEN ,IDE and RTR comparison enable" "Disabled,Enabled" rgroup.long 0x38++0x3 line.long 0x00 "ESR2,Error and Status Register 2" hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Lowest number of inactive Mailbox" bitfld.long 0x00 14. " VPS ,Contents of IMB and LPTM valid" "Not valid,Valid" bitfld.long 0x00 13. " IMB ,Inactive Mailbox available" "Not available,Available" rgroup.long 0x44++0x3 line.long 0x00 "CRCR,CRC Register" hexmask.long.byte 0x00 16.--22. 1. " MBCRC ,Tx CRC Mailbox number" hexmask.long.word 0x00 0.--14. 1. " TXCRC ,CRC value of the last message transmitted" textline " " if (((per.l(ad:0x02094000))&0x300)!=0x00) group.long 0x48++0x3 line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register" bitfld.long 0x00 31. " FGM[31:0] ,Standard and Extended ID mask bit 31" "0,1" bitfld.long 0x00 30. ",Standard ID mask bit 30" "0,1" bitfld.long 0x00 29. ",Standard ID mask bit 29" "0,1" bitfld.long 0x00 28. ",Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" bitfld.long 0x00 00. ",Extended ID mask bit 0" "0,1" else group.long 0x48++0x3 line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register" bitfld.long 0x00 31. " FGM[31:0] ,Standard and Extended ID mask bit 31" "0,1" bitfld.long 0x00 30. ",Standard ID mask bit 30" "0,1" bitfld.long 0x00 29. ",Standard ID mask bit 29" "0,1" bitfld.long 0x00 28. ",Standard ID mask bit 28" "0,1" bitfld.long 0x00 27. ",Standard ID mask bit 27" "0,1" bitfld.long 0x00 26. ",Standard ID mask bit 26" "0,1" bitfld.long 0x00 25. ",Standard ID mask bit 25" "0,1" bitfld.long 0x00 24. ",Standard ID mask bit 24" "0,1" bitfld.long 0x00 23. ",Standard ID mask bit 23" "0,1" bitfld.long 0x00 22. ",Standard ID mask bit 22" "0,1" bitfld.long 0x00 21. ",Standard ID mask bit 21" "0,1" bitfld.long 0x00 20. ",Standard ID mask bit 20" "0,1" bitfld.long 0x00 19. ",Standard ID mask bit 19" "0,1" bitfld.long 0x00 18. ",Standard ID mask bit 18" "0,1" bitfld.long 0x00 17. ",Extended ID mask bit 17" "0,1" bitfld.long 0x00 16. ",Extended ID mask bit 16" "0,1" bitfld.long 0x00 15. ",Extended ID mask bit 15" "0,1" bitfld.long 0x00 14. ",Extended ID mask bit 14" "0,1" bitfld.long 0x00 13. ",Extended ID mask bit 13" "0,1" bitfld.long 0x00 12. ",Extended ID mask bit 12" "0,1" bitfld.long 0x00 11. ",Extended ID mask bit 11" "0,1" bitfld.long 0x00 10. ",Extended ID mask bit 10" "0,1" bitfld.long 0x00 09. ",Extended ID mask bit 9" "0,1" bitfld.long 0x00 08. ",Extended ID mask bit 8" "0,1" bitfld.long 0x00 07. ",Extended ID mask bit 7" "0,1" bitfld.long 0x00 06. ",Extended ID mask bit 6" "0,1" bitfld.long 0x00 05. ",Extended ID mask bit 5" "0,1" bitfld.long 0x00 04. ",Extended ID mask bit 4" "0,1" bitfld.long 0x00 03. ",Extended ID mask bit 3" "0,1" bitfld.long 0x00 02. ",Extended ID mask bit 2" "0,1" bitfld.long 0x00 01. ",Extended ID mask bit 1" "0,1" endif rgroup.long 0x4C++0x3 line.long 0x00 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x00 0.--8. 1. " IDHIT ,Identifier Acceptance Filter hit by the received message" group.long 0x9e0++0x3 line.long 0x00 "GFWR,Glitch Filter Width Register" hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch Filter Width" endif tree.end width 12. tree "Message Buffer & Rx FIFO registers" if (((per.l(ad:0x02094000))&0x20000000)==0x20000000) group.long 0x80++0x03 line.long 0x00 "RXFIFO0,Rx FIFO Structure 0" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" hexmask.long.byte 0x00 16.--19. 1. " DLC ,DLC" textline " " hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x80)))&0x00200000)==0x00000000) group.long 0x84++0x03 line.long 0x00 "ID0,Identifier Field 0" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long 0x84++0x03 line.long 0x00 "ID0,Identifier Field 0" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long 0x88++0x07 line.long 0x00 "DATA0-3,Data Field 0-3" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7,Data Field 4-7" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long 0xE0++0x3 line.long 0x00 "IDFTE0,ID Filter Table Element 0" group.long 0xE4++0x3 line.long 0x00 "IDFTE1,ID Filter Table Element 1" group.long 0xE8++0x3 line.long 0x00 "IDFTE2,ID Filter Table Element 2" group.long 0xEC++0x3 line.long 0x00 "IDFTE3,ID Filter Table Element 3" group.long 0xF0++0x3 line.long 0x00 "IDFTE4,ID Filter Table Element 4" group.long 0xF4++0x3 line.long 0x00 "IDFTE5,ID Filter Table Element 5" group.long 0xF8++0x3 line.long 0x00 "IDFTE6,ID Filter Table Element 6" group.long 0xFC++0x3 line.long 0x00 "IDFTE7,ID Filter Table Element 7" group.long 0x100++0x3 line.long 0x00 "IDFTE8,ID Filter Table Element 8" group.long 0x104++0x3 line.long 0x00 "IDFTE9,ID Filter Table Element 9" group.long 0x108++0x3 line.long 0x00 "IDFTE10,ID Filter Table Element 10" group.long 0x10C++0x3 line.long 0x00 "IDFTE11,ID Filter Table Element 11" group.long 0x110++0x3 line.long 0x00 "IDFTE12,ID Filter Table Element 12" group.long 0x114++0x3 line.long 0x00 "IDFTE13,ID Filter Table Element 13" group.long 0x118++0x3 line.long 0x00 "IDFTE14,ID Filter Table Element 14" group.long 0x11C++0x3 line.long 0x00 "IDFTE15,ID Filter Table Element 15" group.long 0x120++0x3 line.long 0x00 "IDFTE16,ID Filter Table Element 16" group.long 0x124++0x3 line.long 0x00 "IDFTE17,ID Filter Table Element 17" group.long 0x128++0x3 line.long 0x00 "IDFTE18,ID Filter Table Element 18" group.long 0x12C++0x3 line.long 0x00 "IDFTE19,ID Filter Table Element 19" group.long 0x130++0x3 line.long 0x00 "IDFTE20,ID Filter Table Element 20" group.long 0x134++0x3 line.long 0x00 "IDFTE21,ID Filter Table Element 21" group.long 0x138++0x3 line.long 0x00 "IDFTE22,ID Filter Table Element 22" group.long 0x13C++0x3 line.long 0x00 "IDFTE23,ID Filter Table Element 23" group.long 0x140++0x3 line.long 0x00 "IDFTE24,ID Filter Table Element 24" group.long 0x144++0x3 line.long 0x00 "IDFTE25,ID Filter Table Element 25" group.long 0x148++0x3 line.long 0x00 "IDFTE26,ID Filter Table Element 26" group.long 0x14C++0x3 line.long 0x00 "IDFTE27,ID Filter Table Element 27" group.long 0x150++0x3 line.long 0x00 "IDFTE28,ID Filter Table Element 28" group.long 0x154++0x3 line.long 0x00 "IDFTE29,ID Filter Table Element 29" group.long 0x158++0x3 line.long 0x00 "IDFTE30,ID Filter Table Element 30" group.long 0x15C++0x3 line.long 0x00 "IDFTE31,ID Filter Table Element 31" group.long 0x160++0x3 line.long 0x00 "IDFTE32,ID Filter Table Element 32" group.long 0x164++0x3 line.long 0x00 "IDFTE33,ID Filter Table Element 33" group.long 0x168++0x3 line.long 0x00 "IDFTE34,ID Filter Table Element 34" group.long 0x16C++0x3 line.long 0x00 "IDFTE35,ID Filter Table Element 35" group.long 0x170++0x3 line.long 0x00 "IDFTE36,ID Filter Table Element 36" group.long 0x174++0x3 line.long 0x00 "IDFTE37,ID Filter Table Element 37" group.long 0x178++0x3 line.long 0x00 "IDFTE38,ID Filter Table Element 38" group.long 0x17C++0x3 line.long 0x00 "IDFTE39,ID Filter Table Element 39" group.long 0x180++0x3 line.long 0x00 "IDFTE40,ID Filter Table Element 40" group.long 0x184++0x3 line.long 0x00 "IDFTE41,ID Filter Table Element 41" group.long 0x188++0x3 line.long 0x00 "IDFTE42,ID Filter Table Element 42" group.long 0x18C++0x3 line.long 0x00 "IDFTE43,ID Filter Table Element 43" group.long 0x190++0x3 line.long 0x00 "IDFTE44,ID Filter Table Element 44" group.long 0x194++0x3 line.long 0x00 "IDFTE45,ID Filter Table Element 45" group.long 0x198++0x3 line.long 0x00 "IDFTE46,ID Filter Table Element 46" group.long 0x19C++0x3 line.long 0x00 "IDFTE47,ID Filter Table Element 47" group.long 0x1A0++0x3 line.long 0x00 "IDFTE48,ID Filter Table Element 48" group.long 0x1A4++0x3 line.long 0x00 "IDFTE49,ID Filter Table Element 49" group.long 0x1A8++0x3 line.long 0x00 "IDFTE50,ID Filter Table Element 50" group.long 0x1AC++0x3 line.long 0x00 "IDFTE51,ID Filter Table Element 51" group.long 0x1B0++0x3 line.long 0x00 "IDFTE52,ID Filter Table Element 52" group.long 0x1B4++0x3 line.long 0x00 "IDFTE53,ID Filter Table Element 53" group.long 0x1B8++0x3 line.long 0x00 "IDFTE54,ID Filter Table Element 54" group.long 0x1BC++0x3 line.long 0x00 "IDFTE55,ID Filter Table Element 55" group.long 0x1C0++0x3 line.long 0x00 "IDFTE56,ID Filter Table Element 56" group.long 0x1C4++0x3 line.long 0x00 "IDFTE57,ID Filter Table Element 57" group.long 0x1C8++0x3 line.long 0x00 "IDFTE58,ID Filter Table Element 58" group.long 0x1CC++0x3 line.long 0x00 "IDFTE59,ID Filter Table Element 59" group.long 0x1D0++0x3 line.long 0x00 "IDFTE60,ID Filter Table Element 60" group.long 0x1D4++0x3 line.long 0x00 "IDFTE61,ID Filter Table Element 61" group.long 0x1D8++0x3 line.long 0x00 "IDFTE62,ID Filter Table Element 62" group.long 0x1DC++0x3 line.long 0x00 "IDFTE63,ID Filter Table Element 63" group.long 0x1E0++0x3 line.long 0x00 "IDFTE64,ID Filter Table Element 64" group.long 0x1E4++0x3 line.long 0x00 "IDFTE65,ID Filter Table Element 65" group.long 0x1E8++0x3 line.long 0x00 "IDFTE66,ID Filter Table Element 66" group.long 0x1EC++0x3 line.long 0x00 "IDFTE67,ID Filter Table Element 67" group.long 0x1F0++0x3 line.long 0x00 "IDFTE68,ID Filter Table Element 68" group.long 0x1F4++0x3 line.long 0x00 "IDFTE69,ID Filter Table Element 69" group.long 0x1F8++0x3 line.long 0x00 "IDFTE70,ID Filter Table Element 70" group.long 0x1FC++0x3 line.long 0x00 "IDFTE71,ID Filter Table Element 71" group.long 0x200++0x3 line.long 0x00 "IDFTE72,ID Filter Table Element 72" group.long 0x204++0x3 line.long 0x00 "IDFTE73,ID Filter Table Element 73" group.long 0x208++0x3 line.long 0x00 "IDFTE74,ID Filter Table Element 74" group.long 0x20C++0x3 line.long 0x00 "IDFTE75,ID Filter Table Element 75" group.long 0x210++0x3 line.long 0x00 "IDFTE76,ID Filter Table Element 76" group.long 0x214++0x3 line.long 0x00 "IDFTE77,ID Filter Table Element 77" group.long 0x218++0x3 line.long 0x00 "IDFTE78,ID Filter Table Element 78" group.long 0x21C++0x3 line.long 0x00 "IDFTE79,ID Filter Table Element 79" group.long 0x220++0x3 line.long 0x00 "IDFTE80,ID Filter Table Element 80" group.long 0x224++0x3 line.long 0x00 "IDFTE81,ID Filter Table Element 81" group.long 0x228++0x3 line.long 0x00 "IDFTE82,ID Filter Table Element 82" group.long 0x22C++0x3 line.long 0x00 "IDFTE83,ID Filter Table Element 83" group.long 0x230++0x3 line.long 0x00 "IDFTE84,ID Filter Table Element 84" group.long 0x234++0x3 line.long 0x00 "IDFTE85,ID Filter Table Element 85" group.long 0x238++0x3 line.long 0x00 "IDFTE86,ID Filter Table Element 86" group.long 0x23C++0x3 line.long 0x00 "IDFTE87,ID Filter Table Element 87" group.long 0x240++0x3 line.long 0x00 "IDFTE88,ID Filter Table Element 88" group.long 0x244++0x3 line.long 0x00 "IDFTE89,ID Filter Table Element 89" group.long 0x248++0x3 line.long 0x00 "IDFTE90,ID Filter Table Element 90" group.long 0x24C++0x3 line.long 0x00 "IDFTE91,ID Filter Table Element 91" group.long 0x250++0x3 line.long 0x00 "IDFTE92,ID Filter Table Element 92" group.long 0x254++0x3 line.long 0x00 "IDFTE93,ID Filter Table Element 93" group.long 0x258++0x3 line.long 0x00 "IDFTE94,ID Filter Table Element 94" group.long 0x25C++0x3 line.long 0x00 "IDFTE95,ID Filter Table Element 95" group.long 0x260++0x3 line.long 0x00 "IDFTE96,ID Filter Table Element 96" group.long 0x264++0x3 line.long 0x00 "IDFTE97,ID Filter Table Element 97" group.long 0x268++0x3 line.long 0x00 "IDFTE98,ID Filter Table Element 98" group.long 0x26C++0x3 line.long 0x00 "IDFTE99,ID Filter Table Element 99" group.long 0x270++0x3 line.long 0x00 "IDFTE100,ID Filter Table Element 100" group.long 0x274++0x3 line.long 0x00 "IDFTE101,ID Filter Table Element 101" group.long 0x278++0x3 line.long 0x00 "IDFTE102,ID Filter Table Element 102" group.long 0x27C++0x3 line.long 0x00 "IDFTE103,ID Filter Table Element 103" group.long 0x280++0x3 line.long 0x00 "IDFTE104,ID Filter Table Element 104" group.long 0x284++0x3 line.long 0x00 "IDFTE105,ID Filter Table Element 105" group.long 0x288++0x3 line.long 0x00 "IDFTE106,ID Filter Table Element 106" group.long 0x28C++0x3 line.long 0x00 "IDFTE107,ID Filter Table Element 107" group.long 0x290++0x3 line.long 0x00 "IDFTE108,ID Filter Table Element 108" group.long 0x294++0x3 line.long 0x00 "IDFTE109,ID Filter Table Element 109" group.long 0x298++0x3 line.long 0x00 "IDFTE110,ID Filter Table Element 110" group.long 0x29C++0x3 line.long 0x00 "IDFTE111,ID Filter Table Element 111" group.long 0x2A0++0x3 line.long 0x00 "IDFTE112,ID Filter Table Element 112" group.long 0x2A4++0x3 line.long 0x00 "IDFTE113,ID Filter Table Element 113" group.long 0x2A8++0x3 line.long 0x00 "IDFTE114,ID Filter Table Element 114" group.long 0x2AC++0x3 line.long 0x00 "IDFTE115,ID Filter Table Element 115" group.long 0x2B0++0x3 line.long 0x00 "IDFTE116,ID Filter Table Element 116" group.long 0x2B4++0x3 line.long 0x00 "IDFTE117,ID Filter Table Element 117" group.long 0x2B8++0x3 line.long 0x00 "IDFTE118,ID Filter Table Element 118" group.long 0x2BC++0x3 line.long 0x00 "IDFTE119,ID Filter Table Element 119" group.long 0x2C0++0x3 line.long 0x00 "IDFTE120,ID Filter Table Element 120" group.long 0x2C4++0x3 line.long 0x00 "IDFTE121,ID Filter Table Element 121" group.long 0x2C8++0x3 line.long 0x00 "IDFTE122,ID Filter Table Element 122" group.long 0x2CC++0x3 line.long 0x00 "IDFTE123,ID Filter Table Element 123" group.long 0x2D0++0x3 line.long 0x00 "IDFTE124,ID Filter Table Element 124" group.long 0x2D4++0x3 line.long 0x00 "IDFTE125,ID Filter Table Element 125" group.long 0x2D8++0x3 line.long 0x00 "IDFTE126,ID Filter Table Element 126" group.long 0x2DC++0x3 line.long 0x00 "IDFTE127,ID Filter Table Element 127" else group.long (0x0080+0x0)++0x03 "Message Buffer Register 0" line.long 0x00 "C/S0,Control and Status 0" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x0)))&0x00200000)==0x00000000) group.long (0x0084+0x0)++0x03 line.long 0x00 "ID0,Identifier Field 0" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x0)++0x03 line.long 0x00 "ID0,Identifier Field 0" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x0)++0x07 line.long 0x00 "DATA0-3_0,Data Field 0-3 0" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_0,Data Field 4-7 0" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x10)++0x03 "Message Buffer Register 1" line.long 0x00 "C/S1,Control and Status 1" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x10)))&0x00200000)==0x00000000) group.long (0x0084+0x10)++0x03 line.long 0x00 "ID1,Identifier Field 1" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x10)++0x03 line.long 0x00 "ID1,Identifier Field 1" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x10)++0x07 line.long 0x00 "DATA0-3_1,Data Field 0-3 1" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_1,Data Field 4-7 1" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x20)++0x03 "Message Buffer Register 2" line.long 0x00 "C/S2,Control and Status 2" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x20)))&0x00200000)==0x00000000) group.long (0x0084+0x20)++0x03 line.long 0x00 "ID2,Identifier Field 2" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x20)++0x03 line.long 0x00 "ID2,Identifier Field 2" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x20)++0x07 line.long 0x00 "DATA0-3_2,Data Field 0-3 2" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_2,Data Field 4-7 2" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x30)++0x03 "Message Buffer Register 3" line.long 0x00 "C/S3,Control and Status 3" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x30)))&0x00200000)==0x00000000) group.long (0x0084+0x30)++0x03 line.long 0x00 "ID3,Identifier Field 3" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x30)++0x03 line.long 0x00 "ID3,Identifier Field 3" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x30)++0x07 line.long 0x00 "DATA0-3_3,Data Field 0-3 3" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_3,Data Field 4-7 3" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x40)++0x03 "Message Buffer Register 4" line.long 0x00 "C/S4,Control and Status 4" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x40)))&0x00200000)==0x00000000) group.long (0x0084+0x40)++0x03 line.long 0x00 "ID4,Identifier Field 4" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x40)++0x03 line.long 0x00 "ID4,Identifier Field 4" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x40)++0x07 line.long 0x00 "DATA0-3_4,Data Field 0-3 4" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_4,Data Field 4-7 4" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x50)++0x03 "Message Buffer Register 5" line.long 0x00 "C/S5,Control and Status 5" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x50)))&0x00200000)==0x00000000) group.long (0x0084+0x50)++0x03 line.long 0x00 "ID5,Identifier Field 5" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x50)++0x03 line.long 0x00 "ID5,Identifier Field 5" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x50)++0x07 line.long 0x00 "DATA0-3_5,Data Field 0-3 5" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_5,Data Field 4-7 5" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x60)++0x03 "Message Buffer Register 6" line.long 0x00 "C/S6,Control and Status 6" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x60)))&0x00200000)==0x00000000) group.long (0x0084+0x60)++0x03 line.long 0x00 "ID6,Identifier Field 6" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x60)++0x03 line.long 0x00 "ID6,Identifier Field 6" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x60)++0x07 line.long 0x00 "DATA0-3_6,Data Field 0-3 6" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_6,Data Field 4-7 6" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x70)++0x03 "Message Buffer Register 7" line.long 0x00 "C/S7,Control and Status 7" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x70)))&0x00200000)==0x00000000) group.long (0x0084+0x70)++0x03 line.long 0x00 "ID7,Identifier Field 7" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x70)++0x03 line.long 0x00 "ID7,Identifier Field 7" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x70)++0x07 line.long 0x00 "DATA0-3_7,Data Field 0-3 7" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_7,Data Field 4-7 7" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x80)++0x03 "Message Buffer Register 8" line.long 0x00 "C/S8,Control and Status 8" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x80)))&0x00200000)==0x00000000) group.long (0x0084+0x80)++0x03 line.long 0x00 "ID8,Identifier Field 8" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x80)++0x03 line.long 0x00 "ID8,Identifier Field 8" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x80)++0x07 line.long 0x00 "DATA0-3_8,Data Field 0-3 8" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_8,Data Field 4-7 8" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x90)++0x03 "Message Buffer Register 9" line.long 0x00 "C/S9,Control and Status 9" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x90)))&0x00200000)==0x00000000) group.long (0x0084+0x90)++0x03 line.long 0x00 "ID9,Identifier Field 9" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x90)++0x03 line.long 0x00 "ID9,Identifier Field 9" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x90)++0x07 line.long 0x00 "DATA0-3_9,Data Field 0-3 9" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_9,Data Field 4-7 9" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xA0)++0x03 "Message Buffer Register 10" line.long 0x00 "C/S10,Control and Status 10" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xA0)))&0x00200000)==0x00000000) group.long (0x0084+0xA0)++0x03 line.long 0x00 "ID10,Identifier Field 10" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xA0)++0x03 line.long 0x00 "ID10,Identifier Field 10" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xA0)++0x07 line.long 0x00 "DATA0-3_10,Data Field 0-3 10" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_10,Data Field 4-7 10" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xB0)++0x03 "Message Buffer Register 11" line.long 0x00 "C/S11,Control and Status 11" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xB0)))&0x00200000)==0x00000000) group.long (0x0084+0xB0)++0x03 line.long 0x00 "ID11,Identifier Field 11" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xB0)++0x03 line.long 0x00 "ID11,Identifier Field 11" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xB0)++0x07 line.long 0x00 "DATA0-3_11,Data Field 0-3 11" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_11,Data Field 4-7 11" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xC0)++0x03 "Message Buffer Register 12" line.long 0x00 "C/S12,Control and Status 12" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xC0)))&0x00200000)==0x00000000) group.long (0x0084+0xC0)++0x03 line.long 0x00 "ID12,Identifier Field 12" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xC0)++0x03 line.long 0x00 "ID12,Identifier Field 12" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xC0)++0x07 line.long 0x00 "DATA0-3_12,Data Field 0-3 12" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_12,Data Field 4-7 12" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xD0)++0x03 "Message Buffer Register 13" line.long 0x00 "C/S13,Control and Status 13" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xD0)))&0x00200000)==0x00000000) group.long (0x0084+0xD0)++0x03 line.long 0x00 "ID13,Identifier Field 13" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xD0)++0x03 line.long 0x00 "ID13,Identifier Field 13" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xD0)++0x07 line.long 0x00 "DATA0-3_13,Data Field 0-3 13" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_13,Data Field 4-7 13" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xE0)++0x03 "Message Buffer Register 14" line.long 0x00 "C/S14,Control and Status 14" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xE0)))&0x00200000)==0x00000000) group.long (0x0084+0xE0)++0x03 line.long 0x00 "ID14,Identifier Field 14" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xE0)++0x03 line.long 0x00 "ID14,Identifier Field 14" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xE0)++0x07 line.long 0x00 "DATA0-3_14,Data Field 0-3 14" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_14,Data Field 4-7 14" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0xF0)++0x03 "Message Buffer Register 15" line.long 0x00 "C/S15,Control and Status 15" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0xF0)))&0x00200000)==0x00000000) group.long (0x0084+0xF0)++0x03 line.long 0x00 "ID15,Identifier Field 15" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0xF0)++0x03 line.long 0x00 "ID15,Identifier Field 15" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0xF0)++0x07 line.long 0x00 "DATA0-3_15,Data Field 0-3 15" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_15,Data Field 4-7 15" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x100)++0x03 "Message Buffer Register 16" line.long 0x00 "C/S16,Control and Status 16" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x100)))&0x00200000)==0x00000000) group.long (0x0084+0x100)++0x03 line.long 0x00 "ID16,Identifier Field 16" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x100)++0x03 line.long 0x00 "ID16,Identifier Field 16" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x100)++0x07 line.long 0x00 "DATA0-3_16,Data Field 0-3 16" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_16,Data Field 4-7 16" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x110)++0x03 "Message Buffer Register 17" line.long 0x00 "C/S17,Control and Status 17" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x110)))&0x00200000)==0x00000000) group.long (0x0084+0x110)++0x03 line.long 0x00 "ID17,Identifier Field 17" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x110)++0x03 line.long 0x00 "ID17,Identifier Field 17" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x110)++0x07 line.long 0x00 "DATA0-3_17,Data Field 0-3 17" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_17,Data Field 4-7 17" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x120)++0x03 "Message Buffer Register 18" line.long 0x00 "C/S18,Control and Status 18" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x120)))&0x00200000)==0x00000000) group.long (0x0084+0x120)++0x03 line.long 0x00 "ID18,Identifier Field 18" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x120)++0x03 line.long 0x00 "ID18,Identifier Field 18" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x120)++0x07 line.long 0x00 "DATA0-3_18,Data Field 0-3 18" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_18,Data Field 4-7 18" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x130)++0x03 "Message Buffer Register 19" line.long 0x00 "C/S19,Control and Status 19" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x130)))&0x00200000)==0x00000000) group.long (0x0084+0x130)++0x03 line.long 0x00 "ID19,Identifier Field 19" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x130)++0x03 line.long 0x00 "ID19,Identifier Field 19" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x130)++0x07 line.long 0x00 "DATA0-3_19,Data Field 0-3 19" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_19,Data Field 4-7 19" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x140)++0x03 "Message Buffer Register 20" line.long 0x00 "C/S20,Control and Status 20" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x140)))&0x00200000)==0x00000000) group.long (0x0084+0x140)++0x03 line.long 0x00 "ID20,Identifier Field 20" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x140)++0x03 line.long 0x00 "ID20,Identifier Field 20" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x140)++0x07 line.long 0x00 "DATA0-3_20,Data Field 0-3 20" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_20,Data Field 4-7 20" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x150)++0x03 "Message Buffer Register 21" line.long 0x00 "C/S21,Control and Status 21" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x150)))&0x00200000)==0x00000000) group.long (0x0084+0x150)++0x03 line.long 0x00 "ID21,Identifier Field 21" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x150)++0x03 line.long 0x00 "ID21,Identifier Field 21" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x150)++0x07 line.long 0x00 "DATA0-3_21,Data Field 0-3 21" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_21,Data Field 4-7 21" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x160)++0x03 "Message Buffer Register 22" line.long 0x00 "C/S22,Control and Status 22" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x160)))&0x00200000)==0x00000000) group.long (0x0084+0x160)++0x03 line.long 0x00 "ID22,Identifier Field 22" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x160)++0x03 line.long 0x00 "ID22,Identifier Field 22" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x160)++0x07 line.long 0x00 "DATA0-3_22,Data Field 0-3 22" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_22,Data Field 4-7 22" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x170)++0x03 "Message Buffer Register 23" line.long 0x00 "C/S23,Control and Status 23" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x170)))&0x00200000)==0x00000000) group.long (0x0084+0x170)++0x03 line.long 0x00 "ID23,Identifier Field 23" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x170)++0x03 line.long 0x00 "ID23,Identifier Field 23" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x170)++0x07 line.long 0x00 "DATA0-3_23,Data Field 0-3 23" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_23,Data Field 4-7 23" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x180)++0x03 "Message Buffer Register 24" line.long 0x00 "C/S24,Control and Status 24" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x180)))&0x00200000)==0x00000000) group.long (0x0084+0x180)++0x03 line.long 0x00 "ID24,Identifier Field 24" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x180)++0x03 line.long 0x00 "ID24,Identifier Field 24" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x180)++0x07 line.long 0x00 "DATA0-3_24,Data Field 0-3 24" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_24,Data Field 4-7 24" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x190)++0x03 "Message Buffer Register 25" line.long 0x00 "C/S25,Control and Status 25" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x190)))&0x00200000)==0x00000000) group.long (0x0084+0x190)++0x03 line.long 0x00 "ID25,Identifier Field 25" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x190)++0x03 line.long 0x00 "ID25,Identifier Field 25" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x190)++0x07 line.long 0x00 "DATA0-3_25,Data Field 0-3 25" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_25,Data Field 4-7 25" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1A0)++0x03 "Message Buffer Register 26" line.long 0x00 "C/S26,Control and Status 26" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1A0)))&0x00200000)==0x00000000) group.long (0x0084+0x1A0)++0x03 line.long 0x00 "ID26,Identifier Field 26" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1A0)++0x03 line.long 0x00 "ID26,Identifier Field 26" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1A0)++0x07 line.long 0x00 "DATA0-3_26,Data Field 0-3 26" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_26,Data Field 4-7 26" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1B0)++0x03 "Message Buffer Register 27" line.long 0x00 "C/S27,Control and Status 27" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1B0)))&0x00200000)==0x00000000) group.long (0x0084+0x1B0)++0x03 line.long 0x00 "ID27,Identifier Field 27" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1B0)++0x03 line.long 0x00 "ID27,Identifier Field 27" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1B0)++0x07 line.long 0x00 "DATA0-3_27,Data Field 0-3 27" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_27,Data Field 4-7 27" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1C0)++0x03 "Message Buffer Register 28" line.long 0x00 "C/S28,Control and Status 28" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1C0)))&0x00200000)==0x00000000) group.long (0x0084+0x1C0)++0x03 line.long 0x00 "ID28,Identifier Field 28" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1C0)++0x03 line.long 0x00 "ID28,Identifier Field 28" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1C0)++0x07 line.long 0x00 "DATA0-3_28,Data Field 0-3 28" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_28,Data Field 4-7 28" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1D0)++0x03 "Message Buffer Register 29" line.long 0x00 "C/S29,Control and Status 29" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1D0)))&0x00200000)==0x00000000) group.long (0x0084+0x1D0)++0x03 line.long 0x00 "ID29,Identifier Field 29" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1D0)++0x03 line.long 0x00 "ID29,Identifier Field 29" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1D0)++0x07 line.long 0x00 "DATA0-3_29,Data Field 0-3 29" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_29,Data Field 4-7 29" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1E0)++0x03 "Message Buffer Register 30" line.long 0x00 "C/S30,Control and Status 30" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1E0)))&0x00200000)==0x00000000) group.long (0x0084+0x1E0)++0x03 line.long 0x00 "ID30,Identifier Field 30" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1E0)++0x03 line.long 0x00 "ID30,Identifier Field 30" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1E0)++0x07 line.long 0x00 "DATA0-3_30,Data Field 0-3 30" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_30,Data Field 4-7 30" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x1F0)++0x03 "Message Buffer Register 31" line.long 0x00 "C/S31,Control and Status 31" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x1F0)))&0x00200000)==0x00000000) group.long (0x0084+0x1F0)++0x03 line.long 0x00 "ID31,Identifier Field 31" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x1F0)++0x03 line.long 0x00 "ID31,Identifier Field 31" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x1F0)++0x07 line.long 0x00 "DATA0-3_31,Data Field 0-3 31" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_31,Data Field 4-7 31" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x200)++0x03 "Message Buffer Register 32" line.long 0x00 "C/S32,Control and Status 32" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x200)))&0x00200000)==0x00000000) group.long (0x0084+0x200)++0x03 line.long 0x00 "ID32,Identifier Field 32" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x200)++0x03 line.long 0x00 "ID32,Identifier Field 32" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x200)++0x07 line.long 0x00 "DATA0-3_32,Data Field 0-3 32" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_32,Data Field 4-7 32" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x210)++0x03 "Message Buffer Register 33" line.long 0x00 "C/S33,Control and Status 33" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x210)))&0x00200000)==0x00000000) group.long (0x0084+0x210)++0x03 line.long 0x00 "ID33,Identifier Field 33" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x210)++0x03 line.long 0x00 "ID33,Identifier Field 33" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x210)++0x07 line.long 0x00 "DATA0-3_33,Data Field 0-3 33" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_33,Data Field 4-7 33" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x220)++0x03 "Message Buffer Register 34" line.long 0x00 "C/S34,Control and Status 34" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x220)))&0x00200000)==0x00000000) group.long (0x0084+0x220)++0x03 line.long 0x00 "ID34,Identifier Field 34" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x220)++0x03 line.long 0x00 "ID34,Identifier Field 34" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x220)++0x07 line.long 0x00 "DATA0-3_34,Data Field 0-3 34" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_34,Data Field 4-7 34" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x230)++0x03 "Message Buffer Register 35" line.long 0x00 "C/S35,Control and Status 35" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x230)))&0x00200000)==0x00000000) group.long (0x0084+0x230)++0x03 line.long 0x00 "ID35,Identifier Field 35" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x230)++0x03 line.long 0x00 "ID35,Identifier Field 35" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x230)++0x07 line.long 0x00 "DATA0-3_35,Data Field 0-3 35" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_35,Data Field 4-7 35" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x240)++0x03 "Message Buffer Register 36" line.long 0x00 "C/S36,Control and Status 36" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x240)))&0x00200000)==0x00000000) group.long (0x0084+0x240)++0x03 line.long 0x00 "ID36,Identifier Field 36" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x240)++0x03 line.long 0x00 "ID36,Identifier Field 36" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x240)++0x07 line.long 0x00 "DATA0-3_36,Data Field 0-3 36" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_36,Data Field 4-7 36" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x0080+0x250)++0x03 "Message Buffer Register 37" line.long 0x00 "C/S37,Control and Status 37" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x0080+0x250)))&0x00200000)==0x00000000) group.long (0x0084+0x250)++0x03 line.long 0x00 "ID37,Identifier Field 37" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x0084+0x250)++0x03 line.long 0x00 "ID37,Identifier Field 37" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x0088+0x250)++0x07 line.long 0x00 "DATA0-3_37,Data Field 0-3 37" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_37,Data Field 4-7 37" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" endif group.long (0x02E0+0x0)++0x03 "Message Buffer Register 38" line.long 0x00 "C/S38,Control and Status 38" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x0)))&0x00200000)==0x00000000) group.long (0x2E4+0x0)++0x03 line.long 0x00 "ID38,Identifier Field 38" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x0)++0x03 line.long 0x00 "ID38,Identifier Field 38" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x0)++0x07 line.long 0x00 "DATA0-3_38,Data Field 0-3 38" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_38,Data Field 4-7 38" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x10)++0x03 "Message Buffer Register 39" line.long 0x00 "C/S39,Control and Status 39" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x10)))&0x00200000)==0x00000000) group.long (0x2E4+0x10)++0x03 line.long 0x00 "ID39,Identifier Field 39" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x10)++0x03 line.long 0x00 "ID39,Identifier Field 39" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x10)++0x07 line.long 0x00 "DATA0-3_39,Data Field 0-3 39" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_39,Data Field 4-7 39" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x20)++0x03 "Message Buffer Register 40" line.long 0x00 "C/S40,Control and Status 40" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x20)))&0x00200000)==0x00000000) group.long (0x2E4+0x20)++0x03 line.long 0x00 "ID40,Identifier Field 40" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x20)++0x03 line.long 0x00 "ID40,Identifier Field 40" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x20)++0x07 line.long 0x00 "DATA0-3_40,Data Field 0-3 40" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_40,Data Field 4-7 40" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x30)++0x03 "Message Buffer Register 41" line.long 0x00 "C/S41,Control and Status 41" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x30)))&0x00200000)==0x00000000) group.long (0x2E4+0x30)++0x03 line.long 0x00 "ID41,Identifier Field 41" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x30)++0x03 line.long 0x00 "ID41,Identifier Field 41" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x30)++0x07 line.long 0x00 "DATA0-3_41,Data Field 0-3 41" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_41,Data Field 4-7 41" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x40)++0x03 "Message Buffer Register 42" line.long 0x00 "C/S42,Control and Status 42" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x40)))&0x00200000)==0x00000000) group.long (0x2E4+0x40)++0x03 line.long 0x00 "ID42,Identifier Field 42" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x40)++0x03 line.long 0x00 "ID42,Identifier Field 42" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x40)++0x07 line.long 0x00 "DATA0-3_42,Data Field 0-3 42" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_42,Data Field 4-7 42" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x50)++0x03 "Message Buffer Register 43" line.long 0x00 "C/S43,Control and Status 43" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x50)))&0x00200000)==0x00000000) group.long (0x2E4+0x50)++0x03 line.long 0x00 "ID43,Identifier Field 43" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x50)++0x03 line.long 0x00 "ID43,Identifier Field 43" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x50)++0x07 line.long 0x00 "DATA0-3_43,Data Field 0-3 43" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_43,Data Field 4-7 43" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x60)++0x03 "Message Buffer Register 44" line.long 0x00 "C/S44,Control and Status 44" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x60)))&0x00200000)==0x00000000) group.long (0x2E4+0x60)++0x03 line.long 0x00 "ID44,Identifier Field 44" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x60)++0x03 line.long 0x00 "ID44,Identifier Field 44" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x60)++0x07 line.long 0x00 "DATA0-3_44,Data Field 0-3 44" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_44,Data Field 4-7 44" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x70)++0x03 "Message Buffer Register 45" line.long 0x00 "C/S45,Control and Status 45" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x70)))&0x00200000)==0x00000000) group.long (0x2E4+0x70)++0x03 line.long 0x00 "ID45,Identifier Field 45" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x70)++0x03 line.long 0x00 "ID45,Identifier Field 45" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x70)++0x07 line.long 0x00 "DATA0-3_45,Data Field 0-3 45" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_45,Data Field 4-7 45" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x80)++0x03 "Message Buffer Register 46" line.long 0x00 "C/S46,Control and Status 46" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x80)))&0x00200000)==0x00000000) group.long (0x2E4+0x80)++0x03 line.long 0x00 "ID46,Identifier Field 46" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x80)++0x03 line.long 0x00 "ID46,Identifier Field 46" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x80)++0x07 line.long 0x00 "DATA0-3_46,Data Field 0-3 46" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_46,Data Field 4-7 46" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x90)++0x03 "Message Buffer Register 47" line.long 0x00 "C/S47,Control and Status 47" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x90)))&0x00200000)==0x00000000) group.long (0x2E4+0x90)++0x03 line.long 0x00 "ID47,Identifier Field 47" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x90)++0x03 line.long 0x00 "ID47,Identifier Field 47" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x90)++0x07 line.long 0x00 "DATA0-3_47,Data Field 0-3 47" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_47,Data Field 4-7 47" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xA0)++0x03 "Message Buffer Register 48" line.long 0x00 "C/S48,Control and Status 48" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xA0)))&0x00200000)==0x00000000) group.long (0x2E4+0xA0)++0x03 line.long 0x00 "ID48,Identifier Field 48" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xA0)++0x03 line.long 0x00 "ID48,Identifier Field 48" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xA0)++0x07 line.long 0x00 "DATA0-3_48,Data Field 0-3 48" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_48,Data Field 4-7 48" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xB0)++0x03 "Message Buffer Register 49" line.long 0x00 "C/S49,Control and Status 49" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xB0)))&0x00200000)==0x00000000) group.long (0x2E4+0xB0)++0x03 line.long 0x00 "ID49,Identifier Field 49" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xB0)++0x03 line.long 0x00 "ID49,Identifier Field 49" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xB0)++0x07 line.long 0x00 "DATA0-3_49,Data Field 0-3 49" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_49,Data Field 4-7 49" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xC0)++0x03 "Message Buffer Register 50" line.long 0x00 "C/S50,Control and Status 50" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xC0)))&0x00200000)==0x00000000) group.long (0x2E4+0xC0)++0x03 line.long 0x00 "ID50,Identifier Field 50" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xC0)++0x03 line.long 0x00 "ID50,Identifier Field 50" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xC0)++0x07 line.long 0x00 "DATA0-3_50,Data Field 0-3 50" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_50,Data Field 4-7 50" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xD0)++0x03 "Message Buffer Register 51" line.long 0x00 "C/S51,Control and Status 51" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xD0)))&0x00200000)==0x00000000) group.long (0x2E4+0xD0)++0x03 line.long 0x00 "ID51,Identifier Field 51" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xD0)++0x03 line.long 0x00 "ID51,Identifier Field 51" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xD0)++0x07 line.long 0x00 "DATA0-3_51,Data Field 0-3 51" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_51,Data Field 4-7 51" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xE0)++0x03 "Message Buffer Register 52" line.long 0x00 "C/S52,Control and Status 52" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xE0)))&0x00200000)==0x00000000) group.long (0x2E4+0xE0)++0x03 line.long 0x00 "ID52,Identifier Field 52" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xE0)++0x03 line.long 0x00 "ID52,Identifier Field 52" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xE0)++0x07 line.long 0x00 "DATA0-3_52,Data Field 0-3 52" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_52,Data Field 4-7 52" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0xF0)++0x03 "Message Buffer Register 53" line.long 0x00 "C/S53,Control and Status 53" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0xF0)))&0x00200000)==0x00000000) group.long (0x2E4+0xF0)++0x03 line.long 0x00 "ID53,Identifier Field 53" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0xF0)++0x03 line.long 0x00 "ID53,Identifier Field 53" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0xF0)++0x07 line.long 0x00 "DATA0-3_53,Data Field 0-3 53" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_53,Data Field 4-7 53" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x100)++0x03 "Message Buffer Register 54" line.long 0x00 "C/S54,Control and Status 54" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x100)))&0x00200000)==0x00000000) group.long (0x2E4+0x100)++0x03 line.long 0x00 "ID54,Identifier Field 54" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x100)++0x03 line.long 0x00 "ID54,Identifier Field 54" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x100)++0x07 line.long 0x00 "DATA0-3_54,Data Field 0-3 54" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_54,Data Field 4-7 54" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x110)++0x03 "Message Buffer Register 55" line.long 0x00 "C/S55,Control and Status 55" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x110)))&0x00200000)==0x00000000) group.long (0x2E4+0x110)++0x03 line.long 0x00 "ID55,Identifier Field 55" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x110)++0x03 line.long 0x00 "ID55,Identifier Field 55" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x110)++0x07 line.long 0x00 "DATA0-3_55,Data Field 0-3 55" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_55,Data Field 4-7 55" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x120)++0x03 "Message Buffer Register 56" line.long 0x00 "C/S56,Control and Status 56" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x120)))&0x00200000)==0x00000000) group.long (0x2E4+0x120)++0x03 line.long 0x00 "ID56,Identifier Field 56" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x120)++0x03 line.long 0x00 "ID56,Identifier Field 56" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x120)++0x07 line.long 0x00 "DATA0-3_56,Data Field 0-3 56" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_56,Data Field 4-7 56" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x130)++0x03 "Message Buffer Register 57" line.long 0x00 "C/S57,Control and Status 57" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x130)))&0x00200000)==0x00000000) group.long (0x2E4+0x130)++0x03 line.long 0x00 "ID57,Identifier Field 57" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x130)++0x03 line.long 0x00 "ID57,Identifier Field 57" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x130)++0x07 line.long 0x00 "DATA0-3_57,Data Field 0-3 57" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_57,Data Field 4-7 57" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x140)++0x03 "Message Buffer Register 58" line.long 0x00 "C/S58,Control and Status 58" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x140)))&0x00200000)==0x00000000) group.long (0x2E4+0x140)++0x03 line.long 0x00 "ID58,Identifier Field 58" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x140)++0x03 line.long 0x00 "ID58,Identifier Field 58" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x140)++0x07 line.long 0x00 "DATA0-3_58,Data Field 0-3 58" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_58,Data Field 4-7 58" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x150)++0x03 "Message Buffer Register 59" line.long 0x00 "C/S59,Control and Status 59" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x150)))&0x00200000)==0x00000000) group.long (0x2E4+0x150)++0x03 line.long 0x00 "ID59,Identifier Field 59" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x150)++0x03 line.long 0x00 "ID59,Identifier Field 59" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x150)++0x07 line.long 0x00 "DATA0-3_59,Data Field 0-3 59" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_59,Data Field 4-7 59" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x160)++0x03 "Message Buffer Register 60" line.long 0x00 "C/S60,Control and Status 60" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x160)))&0x00200000)==0x00000000) group.long (0x2E4+0x160)++0x03 line.long 0x00 "ID60,Identifier Field 60" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x160)++0x03 line.long 0x00 "ID60,Identifier Field 60" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x160)++0x07 line.long 0x00 "DATA0-3_60,Data Field 0-3 60" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_60,Data Field 4-7 60" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x170)++0x03 "Message Buffer Register 61" line.long 0x00 "C/S61,Control and Status 61" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x170)))&0x00200000)==0x00000000) group.long (0x2E4+0x170)++0x03 line.long 0x00 "ID61,Identifier Field 61" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x170)++0x03 line.long 0x00 "ID61,Identifier Field 61" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x170)++0x07 line.long 0x00 "DATA0-3_61,Data Field 0-3 61" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_61,Data Field 4-7 61" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x180)++0x03 "Message Buffer Register 62" line.long 0x00 "C/S62,Control and Status 62" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x180)))&0x00200000)==0x00000000) group.long (0x2E4+0x180)++0x03 line.long 0x00 "ID62,Identifier Field 62" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x180)++0x03 line.long 0x00 "ID62,Identifier Field 62" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x180)++0x07 line.long 0x00 "DATA0-3_62,Data Field 0-3 62" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_62,Data Field 4-7 62" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" group.long (0x02E0+0x190)++0x03 "Message Buffer Register 63" line.long 0x00 "C/S63,Control and Status 63" hexmask.long.byte 0x00 24.--27. 1. " CODE ,Message buffer code" bitfld.long 0x00 22. " SRR ,Substitute remote request" "Not requested,Requested" bitfld.long 0x00 21. " IDE ,ID extended bit" "Standard,Extended" bitfld.long 0x00 20. " RTR ,Remote transmission request" "Data frame,Remote frame" textline " " hexmask.long.byte 0x00 16.--19. 1. " LENGTH ,Length of data in bytes" hexmask.long.word 0x00 00.--15. 1. " TIMESTAMP ,Free-running counter time stamp" if (((per.l((ad:0x02094000+0x02E0+0x190)))&0x00200000)==0x00000000) group.long (0x2E4+0x190)++0x03 line.long 0x00 "ID63,Identifier Field 63" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 18.--28. 1. " ID ,Standard frame identifier" else group.long (0x2E4+0x190)++0x03 line.long 0x00 "ID63,Identifier Field 63" bitfld.long 0x00 29.--31. " PRIO ,Local priority" "0,1,2,3,4,5,6,7" hexmask.long 0x00 00.--28. 1. " ID ,Extended Frame identifier" endif group.long (0x2E8+0x190)++0x07 line.long 0x00 "DATA0-3_63,Data Field 0-3 63" hexmask.long.byte 0x00 24.--31. 1. " DATA0 ,Data Byte 0" hexmask.long.byte 0x00 16.--23. 1. " DATA1 ,Data Byte 1" hexmask.long.byte 0x00 08.--15. 1. " DATA2 ,Data Byte 2" hexmask.long.byte 0x00 00.--07. 1. " DATA3 ,Data Byte 3" line.long 0x04 "DATA4-7_63,Data Field 4-7 63" hexmask.long.byte 0x04 24.--31. 1. " DATA4 ,Data Byte 4" hexmask.long.byte 0x04 16.--23. 1. " DATA5 ,Data Byte 5" hexmask.long.byte 0x04 08.--15. 1. " DATA6 ,Data Byte 6" hexmask.long.byte 0x04 00.--07. 1. " DATA7 ,Data Byte 7" tree.end width 9. tree "Rx Individual Mask Registers 0-15" if ((((per.l(ad:0x02094000+0x80))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x80))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x80))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x0)++0x3 line.long 0x0 "RXIMR0,Rx Individual Mask Register 0" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x90))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x90))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x90))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x4)++0x3 line.long 0x0 "RXIMR1,Rx Individual Mask Register 1" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xA0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xA0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xA0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x8)++0x3 line.long 0x0 "RXIMR2,Rx Individual Mask Register 2" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xB0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xB0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xB0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC)++0x3 line.long 0x0 "RXIMR3,Rx Individual Mask Register 3" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xC0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xC0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xC0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x10)++0x3 line.long 0x0 "RXIMR4,Rx Individual Mask Register 4" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xD0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xD0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xD0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x14)++0x3 line.long 0x0 "RXIMR5,Rx Individual Mask Register 5" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xE0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xE0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xE0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x18)++0x3 line.long 0x0 "RXIMR6,Rx Individual Mask Register 6" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0xF0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xF0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0xF0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x1C)++0x3 line.long 0x0 "RXIMR7,Rx Individual Mask Register 7" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x100))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x100))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x100))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x20)++0x3 line.long 0x0 "RXIMR8,Rx Individual Mask Register 8" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x110))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x110))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x110))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x24)++0x3 line.long 0x0 "RXIMR9,Rx Individual Mask Register 9" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x120))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x120))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x120))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x28)++0x3 line.long 0x0 "RXIMR10,Rx Individual Mask Register 10" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x130))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x130))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x130))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x2C)++0x3 line.long 0x0 "RXIMR11,Rx Individual Mask Register 11" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x140))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x140))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x140))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x30)++0x3 line.long 0x0 "RXIMR12,Rx Individual Mask Register 12" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x150))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x150))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x150))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x34)++0x3 line.long 0x0 "RXIMR13,Rx Individual Mask Register 13" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x160))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x160))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x160))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x38)++0x3 line.long 0x0 "RXIMR14,Rx Individual Mask Register 14" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x170))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x170))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x170))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x3C)++0x3 line.long 0x0 "RXIMR15,Rx Individual Mask Register 15" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 16-31" if ((((per.l(ad:0x02094000+0x180))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x180))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x180))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x40)++0x3 line.long 0x0 "RXIMR16,Rx Individual Mask Register 16" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x190))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x190))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x190))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x44)++0x3 line.long 0x0 "RXIMR17,Rx Individual Mask Register 17" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1A0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x48)++0x3 line.long 0x0 "RXIMR18,Rx Individual Mask Register 18" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1B0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x4C)++0x3 line.long 0x0 "RXIMR19,Rx Individual Mask Register 19" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1C0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x50)++0x3 line.long 0x0 "RXIMR20,Rx Individual Mask Register 20" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1D0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x54)++0x3 line.long 0x0 "RXIMR21,Rx Individual Mask Register 21" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1E0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x58)++0x3 line.long 0x0 "RXIMR22,Rx Individual Mask Register 22" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x1F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x1F0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x5C)++0x3 line.long 0x0 "RXIMR23,Rx Individual Mask Register 23" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x200))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x200))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x200))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x60)++0x3 line.long 0x0 "RXIMR24,Rx Individual Mask Register 24" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x210))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x210))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x210))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x64)++0x3 line.long 0x0 "RXIMR25,Rx Individual Mask Register 25" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x220))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x220))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x220))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x68)++0x3 line.long 0x0 "RXIMR26,Rx Individual Mask Register 26" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x230))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x230))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x230))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x6C)++0x3 line.long 0x0 "RXIMR27,Rx Individual Mask Register 27" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x240))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x240))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x240))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x70)++0x3 line.long 0x0 "RXIMR28,Rx Individual Mask Register 28" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x250))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x250))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x250))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x74)++0x3 line.long 0x0 "RXIMR29,Rx Individual Mask Register 29" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x260))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x260))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x260))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x78)++0x3 line.long 0x0 "RXIMR30,Rx Individual Mask Register 30" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x270))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x270))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x270))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x7C)++0x3 line.long 0x0 "RXIMR31,Rx Individual Mask Register 31" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 32-47" if ((((per.l(ad:0x02094000+0x280))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x280))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x280))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x80)++0x3 line.long 0x0 "RXIMR32,Rx Individual Mask Register 32" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x290))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x290))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x290))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x84)++0x3 line.long 0x0 "RXIMR33,Rx Individual Mask Register 33" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2A0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x88)++0x3 line.long 0x0 "RXIMR34,Rx Individual Mask Register 34" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2B0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x8C)++0x3 line.long 0x0 "RXIMR35,Rx Individual Mask Register 35" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2C0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x90)++0x3 line.long 0x0 "RXIMR36,Rx Individual Mask Register 36" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2D0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x94)++0x3 line.long 0x0 "RXIMR37,Rx Individual Mask Register 37" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2E0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x98)++0x3 line.long 0x0 "RXIMR38,Rx Individual Mask Register 38" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x2F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x2F0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0x9C)++0x3 line.long 0x0 "RXIMR39,Rx Individual Mask Register 39" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x300))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x300))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x300))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA0)++0x3 line.long 0x0 "RXIMR40,Rx Individual Mask Register 40" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x310))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x310))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x310))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA4)++0x3 line.long 0x0 "RXIMR41,Rx Individual Mask Register 41" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x320))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x320))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x320))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xA8)++0x3 line.long 0x0 "RXIMR42,Rx Individual Mask Register 42" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x330))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x330))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x330))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xAC)++0x3 line.long 0x0 "RXIMR43,Rx Individual Mask Register 43" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x340))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x340))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x340))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB0)++0x3 line.long 0x0 "RXIMR44,Rx Individual Mask Register 44" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x350))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x350))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x350))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB4)++0x3 line.long 0x0 "RXIMR45,Rx Individual Mask Register 45" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x360))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x360))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x360))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xB8)++0x3 line.long 0x0 "RXIMR46,Rx Individual Mask Register 46" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x370))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x370))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x370))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xBC)++0x3 line.long 0x0 "RXIMR47,Rx Individual Mask Register 47" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end tree "Rx Individual Mask Registers 48-63" if ((((per.l(ad:0x02094000+0x380))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x380))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x380))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC0)++0x3 line.long 0x0 "RXIMR48,Rx Individual Mask Register 48" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x390))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x390))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x390))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC4)++0x3 line.long 0x0 "RXIMR49,Rx Individual Mask Register 49" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3A0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3A0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xC8)++0x3 line.long 0x0 "RXIMR50,Rx Individual Mask Register 50" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3B0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3B0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xCC)++0x3 line.long 0x0 "RXIMR51,Rx Individual Mask Register 51" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3C0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3C0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD0)++0x3 line.long 0x0 "RXIMR52,Rx Individual Mask Register 52" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3D0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3D0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD4)++0x3 line.long 0x0 "RXIMR53,Rx Individual Mask Register 53" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3E0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3E0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xD8)++0x3 line.long 0x0 "RXIMR54,Rx Individual Mask Register 54" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x3F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3F0))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x3F0))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xDC)++0x3 line.long 0x0 "RXIMR55,Rx Individual Mask Register 55" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x400))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x400))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x400))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE0)++0x3 line.long 0x0 "RXIMR56,Rx Individual Mask Register 56" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x410))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x410))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x410))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE4)++0x3 line.long 0x0 "RXIMR57,Rx Individual Mask Register 57" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x420))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x420))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x420))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xE8)++0x3 line.long 0x0 "RXIMR58,Rx Individual Mask Register 58" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x430))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x430))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x430))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xEC)++0x3 line.long 0x0 "RXIMR59,Rx Individual Mask Register 59" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x440))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x440))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x440))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF0)++0x3 line.long 0x0 "RXIMR60,Rx Individual Mask Register 60" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x450))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x450))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x450))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF4)++0x3 line.long 0x0 "RXIMR61,Rx Individual Mask Register 61" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x460))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x460))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x460))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xF8)++0x3 line.long 0x0 "RXIMR62,Rx Individual Mask Register 62" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif if ((((per.l(ad:0x02094000+0x470))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x470))&0x200000)==0x00000000)&&(((per.l(ad:0x02094000))&0x1000000)==0x00)) rgroup.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:18] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" elif ((((per.l(ad:0x02094000+0x470))&0x200000)==0x200000)&&(((per.l(ad:0x02094000))&0x1000000)==0x1000000)) group.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" else rgroup.long (0x880+0xFC)++0x3 line.long 0x0 "RXIMR63,Rx Individual Mask Register 63" bitfld.long 0x0 28. " MI[28:0] ,Standard ID Mask Bit 28" "0,1" bitfld.long 0x0 27. ",Standard ID Mask Bit 27" "0,1" bitfld.long 0x0 26. ",Standard ID Mask Bit 26" "0,1" bitfld.long 0x0 25. ",Standard ID Mask Bit 25" "0,1" bitfld.long 0x0 24. ",Standard ID Mask Bit 24" "0,1" bitfld.long 0x0 23. ",Standard ID Mask Bit 23" "0,1" bitfld.long 0x0 22. ",Standard ID Mask Bit 22" "0,1" bitfld.long 0x0 21. ",Standard ID Mask Bit 21" "0,1" bitfld.long 0x0 20. ",Standard ID Mask Bit 20" "0,1" bitfld.long 0x0 19. ",Standard ID Mask Bit 19" "0,1" bitfld.long 0x0 18. ",Standard ID Mask Bit 18" "0,1" bitfld.long 0x0 17. ",Extended ID Mask Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Mask Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Mask Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Mask Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Mask Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Mask Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Mask Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Mask Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Mask Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Mask Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Mask Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Mask Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Mask Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Mask Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Mask Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Mask Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Mask Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Mask Bit 0" "0,1" endif tree.end width 0x0B tree.end tree.end endif sif (cpu()=="IMX6SOLOLITE") tree "FEC (Fast Ethernet Controller)" base ad:0x02188000 width 7. group.long 0x04++0x7 line.long 0x00 "EIR,Ethernet Interrupt Event Register" bitfld.long 0x00 31. " HBERR ,Heartbeat error" "No error,Error" bitfld.long 0x00 30. " BABR ,Babbling receive error" "No error,Error" bitfld.long 0x00 29. " BABT ,Babbling transmit error" "No error,Error" textline " " bitfld.long 0x00 28. " GRA ,Graceful stop complete" "Not completed,Completed" bitfld.long 0x00 27. " TXF ,Transmit frame interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TXB ,Transmit buffer interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " RXF ,Receive frame interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " RXB ,Receive buffer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " MII ,MII interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " EBERR ,Ethernet bus error" "No error,Error" bitfld.long 0x00 21. " LC ,Late collision" "Not occurred,Occurred" bitfld.long 0x00 20. " RL ,Collision retry limit" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " UN ,Transmit FIFO underrun" "Not empty,Empty" line.long 0x04 "EIMR,Interrupt Mask Register" bitfld.long 0x04 31. " HBERR ,Heartbeat error" "Masked,Not masked" bitfld.long 0x04 30. " BABR ,Babbling receive error" "Masked,Not masked" bitfld.long 0x04 29. " BABT ,Babbling transmit error" "Masked,Not masked" textline " " bitfld.long 0x04 28. " GRA ,Graceful stop complete" "Masked,Not masked" bitfld.long 0x04 27. " TXF ,Transmit frame interrupt" "Masked,Not masked" bitfld.long 0x04 26. " TXB ,Transmit buffer interrupt" "Masked,Not masked" textline " " bitfld.long 0x04 25. " RXF ,Receive frame interrupt" "Masked,Not masked" bitfld.long 0x04 24. " RXB ,Receive buffer interrupt" "Masked,Not masked" bitfld.long 0x04 23. " MII ,MII interrupt" "Masked,Not masked" textline " " bitfld.long 0x04 22. " EBERR ,Ethernet bus error" "Masked,Not masked" bitfld.long 0x04 21. " LC ,Late collision" "Masked,Not masked" bitfld.long 0x04 20. " RL ,Collision retry limit" "Masked,Not masked" textline " " bitfld.long 0x04 19. " UN ,Transmit FIFO underrun" "Masked,Not masked" group.long 0x10++0x7 line.long 0x00 "RDAR,Receive Descriptor Active Register" bitfld.long 0x00 24. " R_DES_ACTIVE ,Receive descriptor ring update" "Not received,Received" line.long 0x04 "TDAR,Transmit Descriptor Active Register" bitfld.long 0x04 24. " X_DES_ACTIVE ,Transmit descriptor ring update" "Not transmitted,Transmitted" group.long 0x24++0x03 line.long 0x00 "ECR,Ethernet Control Register" bitfld.long 0x00 1. " ETHER_EN ,Ethernet enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESET ,Reset" "No reset,Reset" group.long 0x40++0x07 line.long 0x00 "MMFR,MII Management Frame Register" bitfld.long 0x00 30.--31. " ST ,Start of frame delimiter" "0,1,2,3" bitfld.long 0x00 28.--29. " OP ,Operation code" "Write,Write for MII frame,Read for MII frame,Read" textline " " bitfld.long 0x00 23.--27. " PA ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18.--22. " RA ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--17. " TA ,Turn around" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " DATA ,Management frame data" line.long 0x04 "MSCR,MII Speed Control Register" bitfld.long 0x04 7. " DIS_PREAMBLE ,Preamble not to be prepended to the MII management frame" "Prepended,Not prepended" bitfld.long 0x04 1.--6. " MII_SPEED ,Controls the frequency of the MII management interface clock" "Turned off,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x64++0x03 line.long 0x00 "MIBC,MIB Control Register" bitfld.long 0x00 31. " MIB_DISABLE ,A read/write control" "Not halted,Halted" rbitfld.long 0x00 30. " MB_IDLE ,A read-only status" "Updated,Not updated" if (((per.l(ad:0x02188000+0x24))&0x10)==0x00) group.long 0x84++0x03 line.long 0x00 "RCR,Receive Control Register" hexmask.long.word 0x00 16.--26. 1. " MAX_FL ,Maximum frame length" bitfld.long 0x00 5. " FCE ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected" bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MII_MODE ,Media independent interface mode" "7-wire,MII" bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "No,Yes" textline " " bitfld.long 0x00 0. " LOOP ,Internal loopback" "Not looped,Looped" else rgroup.long 0x84++0x03 line.long 0x00 "RCR,Receive Control Register" hexmask.long.word 0x00 16.--26. 1. " MAX_FL ,Maximum frame length" bitfld.long 0x00 5. " FCE ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected" bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MII_MODE ,Media independent interface mode" "7-wire,MII" bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "No,Yes" textline " " bitfld.long 0x00 0. " LOOP ,Internal loopback" "Not looped,Looped" endif if (((per.l(ad:0x02188000+0x24))&0x10)==0x00) group.long 0xC4++0x03 line.long 0x00 "TCR,Transmit Control Register" bitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" "Not received,Received" bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 2. " FDEN ,Full duplex enable" "Disabled,Enabled" bitfld.long 0x00 1. " HBC ,Heartbeat control" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "Not stopped,Stopped" else group.long 0xC4++0x03 line.long 0x00 "TCR,Transmit Control Register" bitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" " Not received,Received" bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "Not transmitted,Transmitted" textline " " rbitfld.long 0x00 2. " FDEN ,Full duplex enable" "Disabled,Enabled" rbitfld.long 0x00 1. " HBC ,Heartbeat control" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "Not stopped,Stopped" endif group.long 0xE4++0xb line.long 0x00 "PALR,Physical Address Low Register" hexmask.long.byte 0x00 24.--31. 1. " PADDR1_0 ,Byte 0 of the 6 byte destination address" hexmask.long.byte 0x00 16.--23. 1. " PADDR1_1 ,Byte 1 of the 6 byte destination address" textline " " hexmask.long.byte 0x00 8.--15. 1. " PADDR1_2 ,Byte 2 of the 6 byte destination address" hexmask.long.byte 0x00 0.--7. 1. " PADDR1_3 ,Byte 3 of the 6 byte destination address" line.long 0x04 "PAUR,Physical Address High Register" hexmask.long.byte 0x04 24.--31. 1. " PADDR2_4 ,Byte 4 of the 6 byte destination address" hexmask.long.byte 0x04 16.--23. 1. " PADDR2_5 ,Byte 5 of the 6 byte destination address" textline " " hexmask.long.word 0x04 0.--15. 1. " TYPE ,Type field in PAUSE frames" line.long 0x08 "OPD,Opcode/Pause Duration Register" hexmask.long.word 0x08 16.--31. 1. " OPCODE ,Opcode field used in PAUSE frames" hexmask.long.word 0x08 0.--15. 1. " PAUSE_DUR ,Pause Duration field used in PAUSE frames" group.long 0x118++0xF line.long 0x00 "IAUR,Descriptor Individual Upper Address Registers" line.long 0x04 "IALR,Descriptor Individual Lower Address Register" line.long 0x08 "GAUR,Descriptor Group Upper Address Register" line.long 0x0C "GALR,Descriptor Group Lower Address Register" group.long 0x144++0x3 line.long 0x00 "TFWR,Transmit FIFO Watermark Register" bitfld.long 0x00 0.--1. " X_WMRK ,Number of bytes written to transmit FIFO before transmission of a frame begins" "64 bytes,64 bytes,128 bytes,192 bytes" rgroup.long 0x14c++0x03 line.long 0x00 "FRBR,FIFO Receive Bound Register" hexmask.long.word 0x00 2.--9. 0x4 " R_BOUND ,Highest valid FIFO RAM address" group.long 0x150++0x03 line.long 0x00 "FRSR,FIFO Receive Start Register" hexmask.long.word 0x00 2.--9. 0x04 " R_FSTART ,Address of first receive FIFO location" group.long 0x180++0x0b line.long 0x00 "ERDSR,Receive Buffer Descriptor Ring Start Register" hexmask.long 0x00 2.--31. 0x4 " R_DES_START ,Pointer to start of receive buffer descriptor queue" line.long 0x04 "ETDSR,Transmit Buffer Descriptor Ring Start Register" hexmask.long 0x04 2.--31. 0x4 " X_DES_START ,Pointer to start of transmit buffer descriptor queue" line.long 0x08 "EMRBR,Receive Buffer Size Register" hexmask.long.byte 0x08 4.--10. 1. " R_BUF_SIZE ,Receive buffer size" width 0x0B tree.end endif tree.open "GPC (Global Power Controller)" tree "GPC registers" base ad:0x020DC000 width 8. group.long 0x00++0x7 line.long 0x00 "CNTR,Control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 22. " L2_PGE ,L2 Cache Power Gate Enable" "Disabled,Enabled" bitfld.long 0x00 21. " GPCIRQM ,GPC interrupt/event masking" "Not masked,Masked" textline " " rbitfld.long 0x00 16. " DVFS0CR ,DVFS0 (ARM) Change request" "Not requested,Requested" else bitfld.long 0x00 21. " GPCIRQM ,GPC interrupt/event masking" "Not masked,Masked" rbitfld.long 0x00 16. " DVFS0CR ,DVFS0 (ARM) Change request" "Not requested,Requested" endif sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 5. " DISPLAY_PUP_REQ ,Display Power Up request" "Not requested,Requested" bitfld.long 0x00 4. " DISPLAY_PDN_REQ ,Display Power Down request" "Not requested,Requested" endif textline " " bitfld.long 0x00 1. " GPU_VPU_PUP_REQ ,GPU/VPU Power Up request" "Not requested,Requested" bitfld.long 0x00 0. " GPU_VPU_PDN_REQ ,GPU/VPU Power Down request" "Not requested,Requested" line.long 0x04 "PGR,Power Gating Register" bitfld.long 0x04 29.--30. " DRCIC ,DPTC ref cir in mux control" "CCM_COSR_1_CLK_IN,CCM_COSR_2_CLK_IN,?..." group.long 0x08++0x0F line.long 0x00 "IMR1,IRQ Masking Register 1" bitfld.long 0x00 31. " IMR63 ,IRQ63 mask" "Not masked,Masked" bitfld.long 0x00 30. " IMR62 ,IRQ62 mask" "Not masked,Masked" bitfld.long 0x00 29. " IMR61 ,IRQ61 mask" "Not masked,Masked" bitfld.long 0x00 28. " IMR60 ,IRQ60 mask" "Not masked,Masked" textline " " bitfld.long 0x00 27. " IMR59 ,IRQ59 mask" "Not masked,Masked" bitfld.long 0x00 26. " IMR58 ,IRQ58 mask" "Not masked,Masked" bitfld.long 0x00 25. " IMR57 ,IRQ57 mask" "Not masked,Masked" bitfld.long 0x00 24. " IMR56 ,IRQ56 mask" "Not masked,Masked" textline " " bitfld.long 0x00 23. " IMR55 ,IRQ55 mask" "Not masked,Masked" bitfld.long 0x00 22. " IMR54 ,IRQ54 mask" "Not masked,Masked" bitfld.long 0x00 21. " IMR53 ,IRQ53 mask" "Not masked,Masked" bitfld.long 0x00 20. " IMR52 ,IRQ52 mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " IMR51 ,IRQ51 mask" "Not masked,Masked" bitfld.long 0x00 18. " IMR50 ,IRQ50 mask" "Not masked,Masked" bitfld.long 0x00 17. " IMR49 ,IRQ49 mask" "Not masked,Masked" bitfld.long 0x00 16. " IMR48 ,IRQ48 mask" "Not masked,Masked" textline " " bitfld.long 0x00 15. " IMR47 ,IRQ47 mask" "Not masked,Masked" bitfld.long 0x00 14. " IMR46 ,IRQ46 mask" "Not masked,Masked" bitfld.long 0x00 13. " IMR45 ,IRQ45 mask" "Not masked,Masked" bitfld.long 0x00 12. " IMR44 ,IRQ44 mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " IMR43 ,IRQ43 mask" "Not masked,Masked" bitfld.long 0x00 10. " IMR42 ,IRQ42 mask" "Not masked,Masked" bitfld.long 0x00 9. " IMR41 ,IRQ41 mask" "Not masked,Masked" bitfld.long 0x00 8. " IMR40 ,IRQ40 mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " IMR39 ,IRQ39 mask" "Not masked,Masked" bitfld.long 0x00 6. " IMR38 ,IRQ38 mask" "Not masked,Masked" bitfld.long 0x00 5. " IMR37 ,IRQ37 mask" "Not masked,Masked" bitfld.long 0x00 4. " IMR36 ,IRQ36 mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " IMR35 ,IRQ35 mask" "Not masked,Masked" bitfld.long 0x00 2. " IMR34 ,IRQ34 mask" "Not masked,Masked" bitfld.long 0x00 1. " IMR33 ,IRQ33 mask" "Not masked,Masked" bitfld.long 0x00 0. " IMR32 ,IRQ32 mask" "Not masked,Masked" line.long 0x04 "IMR2,IRQ Masking Register 2" bitfld.long 0x04 31. " IMR95 ,IRQ95 mask" "Not masked,Masked" bitfld.long 0x04 30. " IMR94 ,IRQ94 mask" "Not masked,Masked" bitfld.long 0x04 29. " IMR93 ,IRQ93 mask" "Not masked,Masked" bitfld.long 0x04 28. " IMR92 ,IRQ92 mask" "Not masked,Masked" textline " " bitfld.long 0x04 27. " IMR91 ,IRQ91 mask" "Not masked,Masked" bitfld.long 0x04 26. " IMR90 ,IRQ90 mask" "Not masked,Masked" bitfld.long 0x04 25. " IMR89 ,IRQ89 mask" "Not masked,Masked" bitfld.long 0x04 24. " IMR88 ,IRQ88 mask" "Not masked,Masked" textline " " bitfld.long 0x04 23. " IMR87 ,IRQ87 mask" "Not masked,Masked" bitfld.long 0x04 22. " IMR86 ,IRQ86 mask" "Not masked,Masked" bitfld.long 0x04 21. " IMR85 ,IRQ85 mask" "Not masked,Masked" bitfld.long 0x04 20. " IMR84 ,IRQ84 mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " IMR83 ,IRQ83 mask" "Not masked,Masked" bitfld.long 0x04 18. " IMR82 ,IRQ82 mask" "Not masked,Masked" bitfld.long 0x04 17. " IMR81 ,IRQ81 mask" "Not masked,Masked" bitfld.long 0x04 16. " IMR80 ,IRQ80 mask" "Not masked,Masked" textline " " bitfld.long 0x04 15. " IMR79 ,IRQ79 mask" "Not masked,Masked" bitfld.long 0x04 14. " IMR78 ,IRQ78 mask" "Not masked,Masked" bitfld.long 0x04 13. " IMR77 ,IRQ77 mask" "Not masked,Masked" bitfld.long 0x04 12. " IMR76 ,IRQ76 mask" "Not masked,Masked" textline " " bitfld.long 0x04 11. " IMR75 ,IRQ75 mask" "Not masked,Masked" bitfld.long 0x04 10. " IMR74 ,IRQ74 mask" "Not masked,Masked" bitfld.long 0x04 9. " IMR73 ,IRQ73 mask" "Not masked,Masked" bitfld.long 0x04 8. " IMR72 ,IRQ72 mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " IMR71 ,IRQ71 mask" "Not masked,Masked" bitfld.long 0x04 6. " IMR70 ,IRQ70 mask" "Not masked,Masked" bitfld.long 0x04 5. " IMR69 ,IRQ69 mask" "Not masked,Masked" bitfld.long 0x04 4. " IMR68 ,IRQ68 mask" "Not masked,Masked" textline " " bitfld.long 0x04 3. " IMR67 ,IRQ67 mask" "Not masked,Masked" bitfld.long 0x04 2. " IMR66 ,IRQ66 mask" "Not masked,Masked" bitfld.long 0x04 1. " IMR65 ,IRQ65 mask" "Not masked,Masked" bitfld.long 0x04 0. " IMR64 ,IRQ64 mask" "Not masked,Masked" line.long 0x08 "IMR3,IRQ Masking Register 3" bitfld.long 0x08 31. " IMR127 ,IRQ127 mask" "Not masked,Masked" bitfld.long 0x08 30. " IMR126 ,IRQ126 mask" "Not masked,Masked" bitfld.long 0x08 29. " IMR125 ,IRQ125 mask" "Not masked,Masked" bitfld.long 0x08 28. " IMR124 ,IRQ124 mask" "Not masked,Masked" textline " " bitfld.long 0x08 27. " IMR123 ,IRQ123 mask" "Not masked,Masked" bitfld.long 0x08 26. " IMR122 ,IRQ122 mask" "Not masked,Masked" bitfld.long 0x08 25. " IMR121 ,IRQ121 mask" "Not masked,Masked" bitfld.long 0x08 24. " IMR120 ,IRQ120 mask" "Not masked,Masked" textline " " bitfld.long 0x08 23. " IMR119 ,IRQ119 mask" "Not masked,Masked" bitfld.long 0x08 22. " IMR118 ,IRQ118 mask" "Not masked,Masked" bitfld.long 0x08 21. " IMR117 ,IRQ117 mask" "Not masked,Masked" bitfld.long 0x08 20. " IMR116 ,IRQ116 mask" "Not masked,Masked" textline " " bitfld.long 0x08 19. " IMR115 ,IRQ115 mask" "Not masked,Masked" bitfld.long 0x08 18. " IMR114 ,IRQ114 mask" "Not masked,Masked" bitfld.long 0x08 17. " IMR113 ,IRQ113 mask" "Not masked,Masked" bitfld.long 0x08 16. " IMR112 ,IRQ112 mask" "Not masked,Masked" textline " " bitfld.long 0x08 15. " IMR111 ,IRQ111 mask" "Not masked,Masked" bitfld.long 0x08 14. " IMR110 ,IRQ110 mask" "Not masked,Masked" bitfld.long 0x08 13. " IMR109 ,IRQ109 mask" "Not masked,Masked" bitfld.long 0x08 12. " IMR108 ,IRQ108 mask" "Not masked,Masked" textline " " bitfld.long 0x08 11. " IMR107 ,IRQ107 mask" "Not masked,Masked" bitfld.long 0x08 10. " IMR106 ,IRQ106 mask" "Not masked,Masked" bitfld.long 0x08 9. " IMR105 ,IRQ105 mask" "Not masked,Masked" bitfld.long 0x08 8. " IMR104 ,IRQ104 mask" "Not masked,Masked" textline " " bitfld.long 0x08 7. " IMR103 ,IRQ103 mask" "Not masked,Masked" bitfld.long 0x08 6. " IMR102 ,IRQ102 mask" "Not masked,Masked" bitfld.long 0x08 5. " IMR101 ,IRQ101 mask" "Not masked,Masked" bitfld.long 0x08 4. " IMR100 ,IRQ100 mask" "Not masked,Masked" textline " " bitfld.long 0x08 3. " IMR99 ,IRQ99 mask" "Not masked,Masked" bitfld.long 0x08 2. " IMR98 ,IRQ98 mask" "Not masked,Masked" bitfld.long 0x08 1. " IMR97 ,IRQ97 mask" "Not masked,Masked" bitfld.long 0x08 0. " IMR96 ,IRQ96 mask" "Not masked,Masked" line.long 0x0C "IMR4,IRQ Masking Register 4" bitfld.long 0x0C 31. " IMR159 ,IRQ159 mask" "Not masked,Masked" bitfld.long 0x0C 30. " IMR158 ,IRQ158 mask" "Not masked,Masked" bitfld.long 0x0C 29. " IMR157 ,IRQ157 mask" "Not masked,Masked" bitfld.long 0x0C 28. " IMR156 ,IRQ156 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 27. " IMR155 ,IRQ155 mask" "Not masked,Masked" bitfld.long 0x0C 26. " IMR154 ,IRQ154 mask" "Not masked,Masked" bitfld.long 0x0C 25. " IMR153 ,IRQ153 mask" "Not masked,Masked" bitfld.long 0x0C 24. " IMR152 ,IRQ152 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 23. " IMR151 ,IRQ151 mask" "Not masked,Masked" bitfld.long 0x0C 22. " IMR150 ,IRQ150 mask" "Not masked,Masked" bitfld.long 0x0C 21. " IMR149 ,IRQ149 mask" "Not masked,Masked" bitfld.long 0x0C 20. " IMR148 ,IRQ148 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 19. " IMR147 ,IRQ147 mask" "Not masked,Masked" bitfld.long 0x0C 18. " IMR146 ,IRQ146 mask" "Not masked,Masked" bitfld.long 0x0C 17. " IMR145 ,IRQ145 mask" "Not masked,Masked" bitfld.long 0x0C 16. " IMR144 ,IRQ144 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 15. " IMR143 ,IRQ143 mask" "Not masked,Masked" bitfld.long 0x0C 14. " IMR142 ,IRQ142 mask" "Not masked,Masked" bitfld.long 0x0C 13. " IMR141 ,IRQ141 mask" "Not masked,Masked" bitfld.long 0x0C 12. " IMR140 ,IRQ140 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 11. " IMR139 ,IRQ139 mask" "Not masked,Masked" bitfld.long 0x0C 10. " IMR138 ,IRQ138 mask" "Not masked,Masked" bitfld.long 0x0C 9. " IMR137 ,IRQ137 mask" "Not masked,Masked" bitfld.long 0x0C 8. " IMR136 ,IRQ136 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 7. " IMR135 ,IRQ135 mask" "Not masked,Masked" bitfld.long 0x0C 6. " IMR134 ,IRQ134 mask" "Not masked,Masked" bitfld.long 0x0C 5. " IMR133 ,IRQ133 mask" "Not masked,Masked" bitfld.long 0x0C 4. " IMR132 ,IRQ132 mask" "Not masked,Masked" textline " " bitfld.long 0x0C 3. " IMR131 ,IRQ131 mask" "Not masked,Masked" bitfld.long 0x0C 2. " IMR130 ,IRQ130 mask" "Not masked,Masked" bitfld.long 0x0C 1. " IMR129 ,IRQ129 mask" "Not masked,Masked" bitfld.long 0x0C 0. " IMR128 ,IRQ128 mask" "Not masked,Masked" rgroup.long 0x18++0xF line.long 0x00 "ISR1,IRQ Status Register 1" bitfld.long 0x00 31. " ISR63 ,IRQ63 status" "No interrupt,Interrupt" bitfld.long 0x00 30. " ISR62 ,IRQ62 status" "No interrupt,Interrupt" bitfld.long 0x00 29. " ISR61 ,IRQ61 status" "No interrupt,Interrupt" bitfld.long 0x00 28. " ISR60 ,IRQ60 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " ISR59 ,IRQ59 status" "No interrupt,Interrupt" bitfld.long 0x00 26. " ISR58 ,IRQ58 status" "No interrupt,Interrupt" bitfld.long 0x00 25. " ISR57 ,IRQ57 status" "No interrupt,Interrupt" bitfld.long 0x00 24. " ISR56 ,IRQ56 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " ISR55 ,IRQ55 status" "No interrupt,Interrupt" bitfld.long 0x00 22. " ISR54 ,IRQ54 status" "No interrupt,Interrupt" bitfld.long 0x00 21. " ISR53 ,IRQ53 status" "No interrupt,Interrupt" bitfld.long 0x00 20. " ISR52 ,IRQ52 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " ISR51 ,IRQ51 status" "No interrupt,Interrupt" bitfld.long 0x00 18. " ISR50 ,IRQ50 status" "No interrupt,Interrupt" bitfld.long 0x00 17. " ISR49 ,IRQ49 status" "No interrupt,Interrupt" bitfld.long 0x00 16. " ISR48 ,IRQ48 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " ISR47 ,IRQ47 status" "No interrupt,Interrupt" bitfld.long 0x00 14. " ISR46 ,IRQ46 status" "No interrupt,Interrupt" bitfld.long 0x00 13. " ISR45 ,IRQ45 status" "No interrupt,Interrupt" bitfld.long 0x00 12. " ISR44 ,IRQ44 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " ISR43 ,IRQ43 status" "No interrupt,Interrupt" bitfld.long 0x00 10. " ISR42 ,IRQ42 status" "No interrupt,Interrupt" bitfld.long 0x00 9. " ISR41 ,IRQ41 status" "No interrupt,Interrupt" bitfld.long 0x00 8. " ISR40 ,IRQ40 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISR39 ,IRQ39 status" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISR38 ,IRQ38 status" "No interrupt,Interrupt" bitfld.long 0x00 5. " ISR37 ,IRQ37 status" "No interrupt,Interrupt" bitfld.long 0x00 4. " ISR36 ,IRQ36 status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " ISR35 ,IRQ35 status" "No interrupt,Interrupt" bitfld.long 0x00 2. " ISR34 ,IRQ34 status" "No interrupt,Interrupt" bitfld.long 0x00 1. " ISR33 ,IRQ33 status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ISR32 ,IRQ32 status" "No interrupt,Interrupt" line.long 0x04 "ISR2,IRQ Status Register 2" bitfld.long 0x04 31. " ISR95 ,IRQ95 status" "No interrupt,Interrupt" bitfld.long 0x04 30. " ISR94 ,IRQ94 status" "No interrupt,Interrupt" bitfld.long 0x04 29. " ISR93 ,IRQ93 status" "No interrupt,Interrupt" bitfld.long 0x04 28. " ISR92 ,IRQ92 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " ISR91 ,IRQ91 status" "No interrupt,Interrupt" bitfld.long 0x04 26. " ISR90 ,IRQ90 status" "No interrupt,Interrupt" bitfld.long 0x04 25. " ISR89 ,IRQ89 status" "No interrupt,Interrupt" bitfld.long 0x04 24. " ISR88 ,IRQ88 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " ISR87 ,IRQ87 status" "No interrupt,Interrupt" bitfld.long 0x04 22. " ISR86 ,IRQ86 status" "No interrupt,Interrupt" bitfld.long 0x04 21. " ISR85 ,IRQ85 status" "No interrupt,Interrupt" bitfld.long 0x04 20. " ISR84 ,IRQ84 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " ISR83 ,IRQ83 status" "No interrupt,Interrupt" bitfld.long 0x04 18. " ISR82 ,IRQ82 status" "No interrupt,Interrupt" bitfld.long 0x04 17. " ISR81 ,IRQ81 status" "No interrupt,Interrupt" bitfld.long 0x04 16. " ISR80 ,IRQ80 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " ISR79 ,IRQ79 status" "No interrupt,Interrupt" bitfld.long 0x04 14. " ISR78 ,IRQ78 status" "No interrupt,Interrupt" bitfld.long 0x04 13. " ISR77 ,IRQ77 status" "No interrupt,Interrupt" bitfld.long 0x04 12. " ISR76 ,IRQ76 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " ISR75 ,IRQ75 status" "No interrupt,Interrupt" bitfld.long 0x04 10. " ISR74 ,IRQ74 status" "No interrupt,Interrupt" bitfld.long 0x04 9. " ISR73 ,IRQ73 status" "No interrupt,Interrupt" bitfld.long 0x04 8. " ISR72 ,IRQ72 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " ISR71 ,IRQ71 status" "No interrupt,Interrupt" bitfld.long 0x04 6. " ISR70 ,IRQ70 status" "No interrupt,Interrupt" bitfld.long 0x04 5. " ISR69 ,IRQ69 status" "No interrupt,Interrupt" bitfld.long 0x04 4. " ISR68 ,IRQ68 status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " ISR67 ,IRQ67 status" "No interrupt,Interrupt" bitfld.long 0x04 2. " ISR66 ,IRQ66 status" "No interrupt,Interrupt" bitfld.long 0x04 1. " ISR65 ,IRQ65 status" "No interrupt,Interrupt" bitfld.long 0x04 0. " ISR64 ,IRQ64 status" "No interrupt,Interrupt" line.long 0x08 "ISR3,IRQ Status Register 3" bitfld.long 0x08 31. " ISR127 ,IRQ127 status" "No interrupt,Interrupt" bitfld.long 0x08 30. " ISR126 ,IRQ126 status" "No interrupt,Interrupt" bitfld.long 0x08 29. " ISR125 ,IRQ125 status" "No interrupt,Interrupt" bitfld.long 0x08 28. " ISR124 ,IRQ124 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " ISR123 ,IRQ123 status" "No interrupt,Interrupt" bitfld.long 0x08 26. " ISR122 ,IRQ122 status" "No interrupt,Interrupt" bitfld.long 0x08 25. " ISR121 ,IRQ121 status" "No interrupt,Interrupt" bitfld.long 0x08 24. " ISR120 ,IRQ120 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 23. " ISR119 ,IRQ119 status" "No interrupt,Interrupt" bitfld.long 0x08 22. " ISR118 ,IRQ118 status" "No interrupt,Interrupt" bitfld.long 0x08 21. " ISR117 ,IRQ117 status" "No interrupt,Interrupt" bitfld.long 0x08 20. " ISR116 ,IRQ116 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " ISR115 ,IRQ115 status" "No interrupt,Interrupt" bitfld.long 0x08 18. " ISR114 ,IRQ114 status" "No interrupt,Interrupt" bitfld.long 0x08 17. " ISR113 ,IRQ113 status" "No interrupt,Interrupt" bitfld.long 0x08 16. " ISR112 ,IRQ112 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 15. " ISR111 ,IRQ111 status" "No interrupt,Interrupt" bitfld.long 0x08 14. " ISR110 ,IRQ110 status" "No interrupt,Interrupt" bitfld.long 0x08 13. " ISR109 ,IRQ109 status" "No interrupt,Interrupt" bitfld.long 0x08 12. " ISR108 ,IRQ108 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 11. " ISR107 ,IRQ107 status" "No interrupt,Interrupt" bitfld.long 0x08 10. " ISR106 ,IRQ106 status" "No interrupt,Interrupt" bitfld.long 0x08 9. " ISR105 ,IRQ105 status" "No interrupt,Interrupt" bitfld.long 0x08 8. " ISR104 ,IRQ104 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " ISR103 ,IRQ103 status" "No interrupt,Interrupt" bitfld.long 0x08 6. " ISR102 ,IRQ102 status" "No interrupt,Interrupt" bitfld.long 0x08 5. " ISR101 ,IRQ101 status" "No interrupt,Interrupt" bitfld.long 0x08 4. " ISR100 ,IRQ100 status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " ISR99 ,IRQ99 status" "No interrupt,Interrupt" bitfld.long 0x08 2. " ISR98 ,IRQ98 status" "No interrupt,Interrupt" bitfld.long 0x08 1. " ISR97 ,IRQ97 status" "No interrupt,Interrupt" bitfld.long 0x08 0. " ISR96 ,IRQ96 status" "No interrupt,Interrupt" line.long 0x0C "ISR4,IRQ Status Register 4" bitfld.long 0x0C 31. " ISR159 ,IRQ159 status" "No interrupt,Interrupt" bitfld.long 0x0C 30. " ISR158 ,IRQ158 status" "No interrupt,Interrupt" bitfld.long 0x0C 29. " ISR157 ,IRQ157 status" "No interrupt,Interrupt" bitfld.long 0x0C 28. " ISR156 ,IRQ156 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 27. " ISR155 ,IRQ155 status" "No interrupt,Interrupt" bitfld.long 0x0C 26. " ISR154 ,IRQ154 status" "No interrupt,Interrupt" bitfld.long 0x0C 25. " ISR153 ,IRQ153 status" "No interrupt,Interrupt" bitfld.long 0x0C 24. " ISR152 ,IRQ152 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 23. " ISR151 ,IRQ151 status" "No interrupt,Interrupt" bitfld.long 0x0C 22. " ISR150 ,IRQ150 status" "No interrupt,Interrupt" bitfld.long 0x0C 21. " ISR149 ,IRQ149 status" "No interrupt,Interrupt" bitfld.long 0x0C 20. " ISR148 ,IRQ148 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 19. " ISR147 ,IRQ147 status" "No interrupt,Interrupt" bitfld.long 0x0C 18. " ISR146 ,IRQ146 status" "No interrupt,Interrupt" bitfld.long 0x0C 17. " ISR145 ,IRQ145 status" "No interrupt,Interrupt" bitfld.long 0x0C 16. " ISR144 ,IRQ144 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 15. " ISR143 ,IRQ143 status" "No interrupt,Interrupt" bitfld.long 0x0C 14. " ISR142 ,IRQ142 status" "No interrupt,Interrupt" bitfld.long 0x0C 13. " ISR141 ,IRQ141 status" "No interrupt,Interrupt" bitfld.long 0x0C 12. " ISR140 ,IRQ140 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 11. " ISR139 ,IRQ139 status" "No interrupt,Interrupt" bitfld.long 0x0C 10. " ISR138 ,IRQ138 status" "No interrupt,Interrupt" bitfld.long 0x0C 9. " ISR137 ,IRQ137 status" "No interrupt,Interrupt" bitfld.long 0x0C 8. " ISR136 ,IRQ136 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 7. " ISR135 ,IRQ135 status" "No interrupt,Interrupt" bitfld.long 0x0C 6. " ISR134 ,IRQ134 status" "No interrupt,Interrupt" bitfld.long 0x0C 5. " ISR133 ,IRQ133 status" "No interrupt,Interrupt" bitfld.long 0x0C 4. " ISR132 ,IRQ132 status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 3. " ISR131 ,IRQ131 status" "No interrupt,Interrupt" bitfld.long 0x0C 2. " ISR130 ,IRQ130 status" "No interrupt,Interrupt" bitfld.long 0x0C 1. " ISR129 ,IRQ129 status" "No interrupt,Interrupt" bitfld.long 0x0C 0. " ISR128 ,IRQ128 status" "No interrupt,Interrupt" width 0x0B tree.end tree "PGC registers" base ad:0x020DC240 width 20. sif (cpu()=="IMX6SOLOLITE") group.long 0x00++0xF line.long 0x00 "PGC_DISPLAY_CTRL,PGC Control Register" bitfld.long 0x0 0. " PCR ,Power control" "No switch off,Switch off" line.long 0x04 "PGC_DISPLAY_PUPSCR,Power Up Sequence Control Register" bitfld.long 0x04 8.--13. " SW2ISO ,Number of clocks before negating isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SW ,Number of clocks before asserting switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PGC_DISPLAY_PDNSCR,Pull Down Sequence Control Register" bitfld.long 0x8 8.--13. " ISO2SW ,Number of clocks before negating switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 0.--5. " ISO ,Number of clocks before asserting isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "PGC_DISPLAY_SR,Power Gating Controller Status Register" eventfld.long 0xc 0. " PSR ,Power status" "Not powered down,Powered down" group.long 0x20++0xF line.long 0x00 "PGC_GPU_CTRL,PGC Control Register" bitfld.long 0x0 0. " PCR ,Power control" "No switch off,Switch off" line.long 0x04 "PGC_GPU_PUPSCR,Power Up Sequence Control Register" bitfld.long 0x04 8.--13. " SW2ISO ,Number of clocks before negating isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SW ,Number of clocks before asserting switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PGC_GPU_PDNSCR,Pull Down Sequence Control Register" bitfld.long 0x8 8.--13. " ISO2SW ,Number of clocks before negating switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 0.--5. " ISO ,Number of clocks before asserting isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "PGC_GPU_SR,Power Gating Controller Status Register" eventfld.long 0xc 0. " PSR ,Power status" "Not powered down,Powered down" group.long 0x60++0xF line.long 0x00 "PGC_CPU_CTRL,PGC Control Register" bitfld.long 0x0 0. " PCR ,Power control" "No switch off,Switch off" line.long 0x04 "PGC_CPU_PUPSCR,Power Up Sequence Control Register" bitfld.long 0x04 8.--13. " SW2ISO ,Number of clocks before negating isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SW ,Number of clocks before asserting switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PGC_CPU_PDNSCR,Pull Down Sequence Control Register" bitfld.long 0x8 8.--13. " ISO2SW ,Number of clocks before negating switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 0.--5. " ISO ,Number of clocks before asserting isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "PGC_CPU_SR,Power Gating Controller Status Register" eventfld.long 0xc 0. " PSR ,Power status" "Not powered down,Powered down" else group.long 0x20++0xF line.long 0x00 "PGC_GPU_CTRL,PGC Control Register" bitfld.long 0x0 0. " PCR ,Power control" "No switch off,Switch off" line.long 0x04 "PGC_GPU_PUPSCR,Power Up Sequence Control Register" bitfld.long 0x04 8.--13. " SW2ISO ,Number of clocks before negating isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SW ,Number of clocks before asserting switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PGC_GPU_PDNSCR,Pull Down Sequence Control Register" bitfld.long 0x8 8.--13. " ISO2SW ,Number of clocks before negating switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 0.--5. " ISO ,Number of clocks before asserting isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "PGC_GPU_SR,Power Gating Controller Status Register" eventfld.long 0xc 0. " PSR ,Power status" "Not powered down,Powered down" group.long 0x60++0xF line.long 0x00 "PGC_CPU_CTRL,PGC Control Register" bitfld.long 0x0 0. " PCR ,Power control" "No switch off,Switch off" line.long 0x04 "PGC_CPU_PUPSCR,Power Up Sequence Control Register" bitfld.long 0x04 8.--13. " SW2ISO ,Number of clocks before negating isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SW ,Number of clocks before asserting switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "PGC_CPU_PDNSCR,Pull Down Sequence Control Register" bitfld.long 0x8 8.--13. " ISO2SW ,Number of clocks before negating switch_b" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 0.--5. " ISO ,Number of clocks before asserting isolation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "PGC_CPU_SR,Power Gating Controller Status Register" eventfld.long 0xc 0. " PSR ,Power status" "Not powered down,Powered down" endif width 0x0B tree.end tree "DVFS (Dynamic Voltage Frequency Scaling)" base ad:0x020DC180 width 12. group.long 0x00++0x23 line.long 0x00 "DVFSTHRS,DVFSTHRS Register" hexmask.long.byte 0x00 22.--27. 1. " UPTHR ,Upper treshold for load tracking" hexmask.long.byte 0x00 16.--21. 1. " DWTHR ,Down treshold for load tracking" hexmask.long.byte 0x00 0.--5. 1. " PNCTHR ,Panic treshold for load tracking" line.long 0x04 "DVFSCOUN,DVFSCOUN Register" hexmask.long.byte 0x04 16.--23. 1. " DNCNT ,Down counter threshold value" hexmask.long.byte 0x04 0.--7. 1. " UPCNT ,UP counter threshold value" line.long 0x08 "DVFSSIG1,DVFSSIG1 Register" bitfld.long 0x08 29.--31. " WSW15 ,General purpose load tracking signal weight dvfs_w_sig[15]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 26.--28. " WSW14 ,General purpose load tracking signal weight dvfs_w_sig[14]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23.--25. " WSW13 ,General purpose load tracking signal weight dvfs_w_sig[13]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " WSW12 ,General purpose load tracking signal weight dvfs_w_sig[12]" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 17.--19. " WSW11 ,General purpose load tracking signal weight dvfs_w_sig[11]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 14.--16. " WSW10 ,General purpose load tracking signal weight dvfs_w_sig[10]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 11.--13. " WSW9 ,General purpose load tracking signal weight dvfs_w_sig[9]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " WSW8 ,General purpose load tracking signal weight dvfs_w_sig[8]" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 5.--7. " WSW7 ,General purpose load tracking signal weight dvfs_w_sig[7]" "0,1,2,3,4,5,6,7" bitfld.long 0x08 2.--4. " WSW6 ,General purpose load tracking signal weight dvfs_w_sig[6]" "0,1,2,3,4,5,6,7" line.long 0x0c "DVFSSIG0,DVFSSIG0 Register" bitfld.long 0x0C 29.--31. " WSW5 ,General purpose load tracking signal weight dvfs_w_sig[5]" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 26.--28. " WSW4 ,General purpose load tracking signal weight dvfs_w_sig[4]" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23.--25. " WSW3 ,General purpose load tracking signal weight dvfs_w_sig[3]" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 20.--22. " WSW2 ,General purpose load tracking signal weight dvfs_w_sig[2]" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 6.--11. " WSW1 ,General purpose load tracking signal weight dvfs_w_sig[1]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " WSW0 ,General purpose load tracking signal weight dvfs_w_sig[0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "DVFSGPC0,DVFSGPC0 Register" bitfld.long 0x10 31. " C0STRT ,Counter 0 start" "Not started,Started" rbitfld.long 0x10 30. " C0ACT ,Counter 0 active indicator" "Reached,Not reached" hexmask.long.tbyte 0x10 0.--16. 1. " GPBC0 ,General Purpose bits Counter 0" line.long 0x14 "DVFSGPC1,DVFSGPC1 Register" bitfld.long 0x14 31. " C1STRT ,Counter 1start" "Not started,Started" rbitfld.long 0x14 30. " C1ACT ,Counter 1 active indicator" "Reached,Not reached" hexmask.long.tbyte 0x14 0.--16. 1. " GPBC1 ,General Purpose bits Counter 1" line.long 0x18 "DVFSGPBT,DVFSGPBT Register" bitfld.long 0x18 15. " GPB15 ,General purpose bit 15" "Low,High" bitfld.long 0x18 14. " GPB14 ,General purpose bit 14" "Low,High" bitfld.long 0x18 13. " GPB13 ,General purpose bit 13" "Low,High" bitfld.long 0x18 12. " GPB12 ,General purpose bit 12" "Low,High" textline " " bitfld.long 0x18 11. " GPB11 ,General purpose bit 11" "Low,High" bitfld.long 0x18 10. " GPB10 ,General purpose bit 10" "Low,High" bitfld.long 0x18 9. " GPB09 ,General purpose bit 9" "Low,High" bitfld.long 0x18 8. " GPB08 ,General purpose bit 8" "Low,High" textline " " bitfld.long 0x18 7. " GPB07 ,General purpose bit 7" "Low,High" bitfld.long 0x18 6. " GPB06 ,General purpose bit 6" "Low,High" bitfld.long 0x18 5. " GPB05 ,General purpose bit 5" "Low,High" bitfld.long 0x18 4. " GPB04 ,General purpose bit 4" "Low,High" textline " " bitfld.long 0x18 3. " GPB03 ,General purpose bit 3" "Low,High" bitfld.long 0x18 2. " GPB02 ,General purpose bit 2" "Low,High" bitfld.long 0x18 1. " GPB01 ,General purpose bit 1" "Low,High" bitfld.long 0x18 0. " GPB00 ,General purpose bit 0" "Low,High" line.long 0x1c "DVFSEMAC,DVFSEMAC Register" sif (cpuis("IMX6*")) sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6DUALLITE") bitfld.long 0x1C 27. " WFIM3 ,DVFS Wait for Interrupt of core 3 mask" "Not masked,Masked" bitfld.long 0x1C 26. " WFIM2 ,DVFS Wait for Interrupt of core 2 mask" "Not masked,Masked" textline " " endif sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x1C 25. " WFIM1 ,DVFS Wait for Interrupt of core 1 mask" "Not masked,Masked" bitfld.long 0x1C 24. " WFIM0 ,DVFS Wait for Interrupt of core 0 mask" "Not masked,Masked" else bitfld.long 0x1C 24. " WFIM0 ,DVFS Wait for Interrupt of core 0 mask" "Not masked,Masked" endif textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6DUALLITE") rbitfld.long 0x1C 22.--23. " FSVAI3 ,DVFS Frequency adjustment status of core 3" "Not changed,Increased,Decreased,Increased immediately" rbitfld.long 0x1C 20.--21. " FSVAI2 ,DVFS Frequency adjustment status of core 2" "Not changed,Increased,Decreased,Increased immediately" textline " " endif sif (cpu()!="IMX6SOLOLITE") rbitfld.long 0x1C 18.--19. " FSVAI1 ,DVFS Frequency adjustment status of core 1" "Not changed,Increased,Decreased,Increased immediately" rbitfld.long 0x1C 16.--17. " FSVAI0 ,DVFS Frequency adjustment status of core 0" "Not changed,Increased,Decreased,Increased immediately" else rbitfld.long 0x1C 16.--17. " FSVAI0 ,DVFS Frequency adjustment status of core 0" "Not changed,Increased,Decreased,Increased immediately" endif textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6DUALLITE") bitfld.long 0x1C 12. " DVFEN3 ,DVFS tracking for core3 enable" "Disabled,Enabled" bitfld.long 0x1C 11. " DVFEN2 ,DVFS tracking for core2 enable" "Disabled,Enabled" textline " " endif sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x1C 10. " DVFEN1 ,DVFS tracking for core1 enable" "Disabled,Enabled" bitfld.long 0x1C 9. " DVFEN0 ,DVFS tracking for core0 enable" "Disabled,Enabled" else bitfld.long 0x1C 9. " DVFEN0 ,DVFS tracking for core0 enable" "Disabled,Enabled" endif textline " " endif hexmask.long.word 0x1c 0.--8. 1. " EMAC ,EMA control value" line.long 0x20 "DVFSCNTR,DVFS Register" bitfld.long 0x20 29.--31. " DIV3CK ,Div_3_clk division ratio inside the DVFS module" "1,4,16,64,256,1024,?..." bitfld.long 0x20 28. " DVFEV ,DVFS event" "Not given,Given" bitfld.long 0x20 27. " LBMI ,Load buffer full mask interrupt" "Not masked,Masked" eventfld.long 0x20 26. " LBFL1 ,Load buffer 1" "Not full,Full" textline " " eventfld.long 0x20 25. " LBFL0 ,Load buffer 0" "Not full,Full" bitfld.long 0x20 24. " DVFIS ,DVFS Interrupt select" "SDMA,MCU" eventfld.long 0x20 23. " PIRQS ,Pattern IRQ Sourse" "No pattern,Pattern" bitfld.long 0x20 22. " FSVAIM ,DVFS Frequency adjustment interrupt mask" "Not masked,Masked" textline " " rbitfld.long 0x20 20.--21. " FSVAI ,DVFS Frequency adjustment interrupt" "No interrupt,Increased,Decreased,Increased immediately" textline " " sif (!cpuis("IMX6*")) bitfld.long 0x20 19. " WFIM ,DVFS Wait for Interrupt mask bit" "Not masked,Masked" textline " " endif bitfld.long 0x20 18. " MAXF ,Maximum frequency reached" "Not reached,Reached" bitfld.long 0x20 17. " MINF ,Minimum frequency reached" "Not reached,Reached" bitfld.long 0x20 11.--16. " DIV_RATO ,Divider value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x20 9. " PFUE ,Period Frequency Update Enable" "Disabled,Enabled" textline " " rbitfld.long 0x20 6.--8. " PFUS ,Periodic Frequency Update Status" "No update,,,,DVFSPT0,DVFSPT1,DVFSPT2,DVFSPT3" bitfld.long 0x20 5. " LTBRSH ,Load Tracking Buffer Register Shift" "[5:2] value,[4:1] value" bitfld.long 0x20 3.--4. " LTBRSR ,Load Tracking Buffer Register Source" "Pre_ld_add,Ld_add,After ema,?..." sif (!cpuis("IMX6*")) textline " " bitfld.long 0x20 0. " DVFEN ,DVFS enable" "Disabled,Enabled" endif rgroup.long 0x24++0x0f line.long 0x00 "DVFSLTR0_0,DVFSLTR0_0 Register" bitfld.long 0x00 28.--31. " LTS0_7 ,Load Tracking Sample 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " LTS0_6 ,Load Tracking Sample 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " LTS0_5 ,Load Tracking Sample 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " LTS0_4 ,Load Tracking Sample 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " LTS0_3 ,Load Tracking Sample 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " LTS0_2 ,Load Tracking Sample 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " LTS0_1 ,Load Tracking Sample 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " LTS0_0 ,Load Tracking Sample 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DVFSLTR0_1,DVFSLTR0_1 Register" bitfld.long 0x04 28.--31. " LTS0_15 ,Load Tracking Sample 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. " LTS0_14 ,Load Tracking Sample 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " LTS0_13 ,Load Tracking Sample 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " LTS0_12 ,Load Tracking Sample 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " LTS0_11 ,Load Tracking Sample 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " LTS0_10 ,Load Tracking Sample 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " LTS0_9 ,Load Tracking Sample 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " LTS0_8 ,Load Tracking Sample 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DVFSLTR1_0,DVFSLTR1_0 Register" bitfld.long 0x08 28.--31. " LTS1_7 ,Load Tracking Sample 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " LTS1_6 ,Load Tracking Sample 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " LTS1_5 ,Load Tracking Sample 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " LTS1_4 ,Load Tracking Sample 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 12.--15. " LTS1_3 ,Load Tracking Sample 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " LTS1_2 ,Load Tracking Sample 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " LTS1_1 ,Load Tracking Sample 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " LTS1_0 ,Load Tracking Sample 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0c "DVFSLTR1_1,DVFSLTR1_1 Register" bitfld.long 0x0c 28.--31. " LTS1_15 ,Load Tracking Sample 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 24.--27. " LTS1_14 ,Load Tracking Sample 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 20.--23. " LTS1_13 ,Load Tracking Sample 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 16.--19. " LTS1_12 ,Load Tracking Sample 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0c 12.--15. " LTS1_11 ,Load Tracking Sample 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 8.--11. " LTS1_10 ,Load Tracking Sample 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 4.--7. " LTS1_9 ,Load Tracking Sample 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 0.--3. " LTS1_8 ,Load Tracking Sample 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x0f line.long 0x00 "DVFSPT0,DVFSPT0 Register" rbitfld.long 0x00 17. " PT0A ,Pattern 0 currently active" "Not active,Active" hexmask.long.tbyte 0x00 0.--16. 1. " FPTN0 ,Frequency pattern 0 counter" line.long 0x04 "DVFSPT1,DVFSPT1 Register" rbitfld.long 0x04 17. " PT1A ,Pattern 1 currently active" "Not active,Active" hexmask.long.tbyte 0x04 0.--16. 1. " FPTN1 ,Frequency pattern 1 counter" line.long 0x08 "DVFSPT2,DVFSPT2 Register" bitfld.long 0x08 26.--31. " P2THR ,Pattern 2 Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x08 17. " PT2A ,Pattern 2 currently active" "Not active,Active" hexmask.long.tbyte 0x08 0.--16. 1. " FPTN2 ,Frequency pattern 2 counter" line.long 0x0c "DVFSPT3,DVFSPT3 Register" rbitfld.long 0x0C 17. " PT3A ,Pattern 3 currently active" "Not active,Active" hexmask.long.tbyte 0x0C 0.--16. 1. " FPTN3 ,Frequency pattern 3 counter" width 0x0B tree.end tree.end tree.open "GPIO (General Purpose Input/Output)" tree "GPIO 1" base ad:0x0209C000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end tree "GPIO 2" base ad:0x020A0000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end tree "GPIO 3" base ad:0x020A4000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end tree "GPIO 4" base ad:0x020A8000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end sif (cpu()=="IMX6SOLOLITE") tree "GPIO 5" base ad:0x020AC000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" textline " " bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" textline " " bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" textline " " bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" textline " " bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x03 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" textline " " bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" textline " " bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" textline " " bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" textline " " bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" textline " " bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end else tree "GPIO 5" base ad:0x020AC000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end endif sif (cpu()!="IMX6SOLOLITE") tree "GPIO 6" base ad:0x020B0000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end tree "GPIO 7" base ad:0x020B4000 width 6. group.long 0x00++0x07 line.long 0x00 "DR,GPIO Data Register" bitfld.long 0x00 31. " DR31 ,Data bit 31" "Low,High" bitfld.long 0x00 30. " DR30 ,Data bit 30" "Low,High" bitfld.long 0x00 29. " DR29 ,Data bit 29" "Low,High" bitfld.long 0x00 28. " DR28 ,Data bit 28" "Low,High" bitfld.long 0x00 27. " DR27 ,Data bit 27" "Low,High" bitfld.long 0x00 26. " DR26 ,Data bit 26" "Low,High" bitfld.long 0x00 25. " DR25 ,Data bit 25" "Low,High" bitfld.long 0x00 24. " DR24 ,Data bit 24" "Low,High" textline " " bitfld.long 0x00 23. " DR23 ,Data bit 23" "Low,High" bitfld.long 0x00 22. " DR22 ,Data bit 22" "Low,High" bitfld.long 0x00 21. " DR21 ,Data bit 21" "Low,High" bitfld.long 0x00 20. " DR20 ,Data bit 20" "Low,High" bitfld.long 0x00 19. " DR19 ,Data bit 19" "Low,High" bitfld.long 0x00 18. " DR18 ,Data bit 18" "Low,High" bitfld.long 0x00 17. " DR17 ,Data bit 17" "Low,High" bitfld.long 0x00 16. " DR16 ,Data bit 16" "Low,High" textline " " bitfld.long 0x00 15. " DR15 ,Data bit 15" "Low,High" bitfld.long 0x00 14. " DR14 ,Data bit 14" "Low,High" bitfld.long 0x00 13. " DR13 ,Data bit 13" "Low,High" bitfld.long 0x00 12. " DR12 ,Data bit 12" "Low,High" bitfld.long 0x00 11. " DR11 ,Data bit 11" "Low,High" bitfld.long 0x00 10. " DR10 ,Data bit 10" "Low,High" bitfld.long 0x00 9. " DR9 ,Data bit 9" "Low,High" bitfld.long 0x00 8. " DR8 ,Data bit 8" "Low,High" textline " " bitfld.long 0x00 7. " DR7 ,Data bit 7" "Low,High" bitfld.long 0x00 6. " DR6 ,Data bit 6" "Low,High" bitfld.long 0x00 5. " DR5 ,Data bit 5" "Low,High" bitfld.long 0x00 4. " DR4 ,Data bit 4" "Low,High" bitfld.long 0x00 3. " DR3 ,Data bit 3" "Low,High" bitfld.long 0x00 2. " DR2 ,Data bit 2" "Low,High" bitfld.long 0x00 1. " DR1 ,Data bit 1" "Low,High" bitfld.long 0x00 0. " DR0 ,Data bit 0" "Low,High" line.long 0x04 "GDIR,GPIO Direction Register" bitfld.long 0x04 31. " GDIR31 ,GPIO Direction 31 bit" "Input,Output" bitfld.long 0x04 30. " GDIR30 ,GPIO Direction 30 bit" "Input,Output" bitfld.long 0x04 29. " GDIR29 ,GPIO Direction 29 bit" "Input,Output" bitfld.long 0x04 28. " GDIR28 ,GPIO Direction 28 bit" "Input,Output" bitfld.long 0x04 27. " GDIR27 ,GPIO Direction 27 bit" "Input,Output" bitfld.long 0x04 26. " GDIR26 ,GPIO Direction 26 bit" "Input,Output" bitfld.long 0x04 25. " GDIR25 ,GPIO Direction 25 bit" "Input,Output" bitfld.long 0x04 24. " GDIR24 ,GPIO Direction 24 bit" "Input,Output" textline " " bitfld.long 0x04 23. " GDIR23 ,GPIO Direction 23 bit" "Input,Output" bitfld.long 0x04 22. " GDIR22 ,GPIO Direction 22 bit" "Input,Output" bitfld.long 0x04 21. " GDIR21 ,GPIO Direction 21 bit" "Input,Output" bitfld.long 0x04 20. " GDIR20 ,GPIO Direction 20 bit" "Input,Output" bitfld.long 0x04 19. " GDIR19 ,GPIO Direction 19 bit" "Input,Output" bitfld.long 0x04 18. " GDIR18 ,GPIO Direction 18 bit" "Input,Output" bitfld.long 0x04 17. " GDIR17 ,GPIO Direction 17 bit" "Input,Output" bitfld.long 0x04 16. " GDIR16 ,GPIO Direction 16 bit" "Input,Output" textline " " bitfld.long 0x04 15. " GDIR15 ,GPIO Direction 15 bit" "Input,Output" bitfld.long 0x04 14. " GDIR14 ,GPIO Direction 14 bit" "Input,Output" bitfld.long 0x04 13. " GDIR13 ,GPIO Direction 13 bit" "Input,Output" bitfld.long 0x04 12. " GDIR12 ,GPIO Direction 12 bit" "Input,Output" bitfld.long 0x04 11. " GDIR11 ,GPIO Direction 11 bit" "Input,Output" bitfld.long 0x04 10. " GDIR10 ,GPIO Direction 10 bit" "Input,Output" bitfld.long 0x04 9. " GDIR9 ,GPIO Direction 9 bit" "Input,Output" bitfld.long 0x04 8. " GDIR8 ,GPIO Direction 8 bit" "Input,Output" textline " " bitfld.long 0x04 7. " GDIR7 ,GPIO Direction 7 bit" "Input,Output" bitfld.long 0x04 6. " GDIR6 ,GPIO Direction 6 bit" "Input,Output" bitfld.long 0x04 5. " GDIR5 ,GPIO Direction 5 bit" "Input,Output" bitfld.long 0x04 4. " GDIR4 ,GPIO Direction 4 bit" "Input,Output" bitfld.long 0x04 3. " GDIR3 ,GPIO Direction 3 bit" "Input,Output" bitfld.long 0x04 2. " GDIR2 ,GPIO Direction 2 bit" "Input,Output" bitfld.long 0x04 1. " GDIR1 ,GPIO Direction 1 bit" "Input,Output" bitfld.long 0x04 0. " GDIR0 ,GPIO Direction 0 bit" "Input,Output" rgroup.long 0x08++0x3 line.long 0x00 "PSR,GPIO Pad Status Register" bitfld.long 0x00 31. " PSR31 ,GPIO Pad Status bit 31" "Low,High" bitfld.long 0x00 30. " PSR30 ,GPIO Pad Status bit 30" "Low,High" bitfld.long 0x00 29. " PSR29 ,GPIO Pad Status bit 29" "Low,High" bitfld.long 0x00 28. " PSR28 ,GPIO Pad Status bit 28" "Low,High" bitfld.long 0x00 27. " PSR27 ,GPIO Pad Status bit 27" "Low,High" bitfld.long 0x00 26. " PSR26 ,GPIO Pad Status bit 26" "Low,High" bitfld.long 0x00 25. " PSR25 ,GPIO Pad Status bit 25" "Low,High" bitfld.long 0x00 24. " PSR24 ,GPIO Pad Status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " PSR23 ,GPIO Pad Status bit 23" "Low,High" bitfld.long 0x00 22. " PSR22 ,GPIO Pad Status bit 22" "Low,High" bitfld.long 0x00 21. " PSR21 ,GPIO Pad Status bit 21" "Low,High" bitfld.long 0x00 20. " PSR20 ,GPIO Pad Status bit 20" "Low,High" bitfld.long 0x00 19. " PSR19 ,GPIO Pad Status bit 19" "Low,High" bitfld.long 0x00 18. " PSR18 ,GPIO Pad Status bit 18" "Low,High" bitfld.long 0x00 17. " PSR17 ,GPIO Pad Status bit 17" "Low,High" bitfld.long 0x00 16. " PSR16 ,GPIO Pad Status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " PSR15 ,GPIO Pad Status bit 15" "Low,High" bitfld.long 0x00 14. " PSR14 ,GPIO Pad Status bit 14" "Low,High" bitfld.long 0x00 13. " PSR13 ,GPIO Pad Status bit 13" "Low,High" bitfld.long 0x00 12. " PSR12 ,GPIO Pad Status bit 12" "Low,High" bitfld.long 0x00 11. " PSR11 ,GPIO Pad Status bit 11" "Low,High" bitfld.long 0x00 10. " PSR10 ,GPIO Pad Status bit 10" "Low,High" bitfld.long 0x00 9. " PSR9 ,GPIO Pad Status bit 9" "Low,High" bitfld.long 0x00 8. " PSR8 ,GPIO Pad Status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " PSR7 ,GPIO Pad Status bit 7" "Low,High" bitfld.long 0x00 6. " PSR6 ,GPIO Pad Status bit 6" "Low,High" bitfld.long 0x00 5. " PSR5 ,GPIO Pad Status bit 5" "Low,High" bitfld.long 0x00 4. " PSR4 ,GPIO Pad Status bit 4" "Low,High" bitfld.long 0x00 3. " PSR3 ,GPIO Pad Status bit 3" "Low,High" bitfld.long 0x00 2. " PSR2 ,GPIO Pad Status bit 2" "Low,High" bitfld.long 0x00 1. " PSR1 ,GPIO Pad Status bit 1" "Low,High" bitfld.long 0x00 0. " PSR0 ,GPIO Pad Status bit 0" "Low,High" tree "GPIO Interrupt Registers" group.long 0x0C++0x0F line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1" bitfld.long 0x00 30.--31. " ICR1_15 ,Interrupt 15 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 28.--29. " ICR1_14 ,Interrupt 14 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 26.--27. " ICR1_13 ,Interrupt 13 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 24.--25. " ICR1_12 ,Interrupt 12 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 22.--23. " ICR1_11 ,Interrupt 11 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 20.--21. " ICR1_10 ,Interrupt 10 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 18.--19. " ICR1_9 ,Interrupt 9 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 16.--17. " ICR1_8 ,Interrupt 8 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 14.--15. " ICR1_7 ,Interrupt 7 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 12.--13. " ICR1_6 ,Interrupt 6 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 10.--11. " ICR1_5 ,Interrupt 5 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 8.--9. " ICR1_4 ,Interrupt 4 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x00 6.--7. " ICR1_3 ,Interrupt 3 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 4.--5. " ICR1_2 ,Interrupt 2 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 2.--3. " ICR1_1 ,Interrupt 1 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x00 0.--1. " ICR1_0 ,Interrupt 0 Configuration 1 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x04 "ICR2,GPIO Interrupt Configuration Register 2" bitfld.long 0x04 30.--31. " ICR2_31 ,Interrupt 31 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 28.--29. " ICR2_30 ,Interrupt 30 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 26.--27. " ICR2_29 ,Interrupt 29 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 24.--25. " ICR2_28 ,Interrupt 28 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 22.--23. " ICR2_27 ,Interrupt 27 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 20.--21. " ICR2_26 ,Interrupt 26 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 18.--19. " ICR2_25 ,Interrupt 25 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 16.--17. " ICR2_24 ,Interrupt 24 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 14.--15. " ICR2_23 ,Interrupt 23 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 12.--13. " ICR2_22 ,Interrupt 22 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 10.--11. " ICR2_21 ,Interrupt 21 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 8.--9. " ICR2_20 ,Interrupt 20 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" textline " " bitfld.long 0x04 6.--7. " ICR2_19 ,Interrupt 19 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 4.--5. " ICR2_18 ,Interrupt 18 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 2.--3. " ICR2_17 ,Interrupt 17 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" bitfld.long 0x04 0.--1. " ICR2_16 ,Interrupt 16 Configuration 2 bits" "Low-level,High-level,Rise-edge,Fall-edge" line.long 0x08 "IMR,GPIO Interrupt Mask Register" bitfld.long 0x08 31. " IMR31 ,Interrupt 31 Mask bit" "Masked,Not masked" bitfld.long 0x08 30. " IMR30 ,Interrupt 30 Mask bit" "Masked,Not masked" bitfld.long 0x08 29. " IMR29 ,Interrupt 29 Mask bit" "Masked,Not masked" bitfld.long 0x08 28. " IMR28 ,Interrupt 28 Mask bit" "Masked,Not masked" bitfld.long 0x08 27. " IMR27 ,Interrupt 27 Mask bit" "Masked,Not masked" bitfld.long 0x08 26. " IMR26 ,Interrupt 26 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 25. " IMR25 ,Interrupt 25 Mask bit" "Masked,Not masked" bitfld.long 0x08 24. " IMR24 ,Interrupt 24 Mask bit" "Masked,Not masked" bitfld.long 0x08 23. " IMR23 ,Interrupt 23 Mask bit" "Masked,Not masked" bitfld.long 0x08 22. " IMR22 ,Interrupt 22 Mask bit" "Masked,Not masked" bitfld.long 0x08 21. " IMR21 ,Interrupt 21 Mask bit" "Masked,Not masked" bitfld.long 0x08 20. " IMR20 ,Interrupt 20 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 19. " IMR19 ,Interrupt 19 Mask bit" "Masked,Not masked" bitfld.long 0x08 18. " IMR18 ,Interrupt 18 Mask bit" "Masked,Not masked" bitfld.long 0x08 17. " IMR17 ,Interrupt 17 Mask bit" "Masked,Not masked" bitfld.long 0x08 16. " IMR16 ,Interrupt 16 Mask bit" "Masked,Not masked" bitfld.long 0x08 15. " IMR15 ,Interrupt 15 Mask bit" "Masked,Not masked" bitfld.long 0x08 14. " IMR14 ,Interrupt 14 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 13. " IMR13 ,Interrupt 13 Mask bit" "Masked,Not masked" bitfld.long 0x08 12. " IMR12 ,Interrupt 12 Mask bit" "Masked,Not masked" bitfld.long 0x08 11. " IMR11 ,Interrupt 11 Mask bit" "Masked,Not masked" bitfld.long 0x08 10. " IMR10 ,Interrupt 10 Mask bit" "Masked,Not masked" bitfld.long 0x08 9. " IMR9 ,Interrupt 9 Mask bit" "Masked,Not masked" bitfld.long 0x08 8. " IMR8 ,Interrupt 8 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 7. " IMR7 ,Interrupt 7 Mask bit" "Masked,Not masked" bitfld.long 0x08 6. " IMR6 ,Interrupt 6 Mask bit" "Masked,Not masked" bitfld.long 0x08 5. " IMR5 ,Interrupt 5 Mask bit" "Masked,Not masked" bitfld.long 0x08 4. " IMR4 ,Interrupt 4 Mask bit" "Masked,Not masked" bitfld.long 0x08 3. " IMR3 ,Interrupt 3 Mask bit" "Masked,Not masked" bitfld.long 0x08 2. " IMR2 ,Interrupt 2 Mask bit" "Masked,Not masked" textline " " bitfld.long 0x08 1. " IMR1 ,Interrupt 1 Mask bit" "Masked,Not masked" bitfld.long 0x08 0. " IMR0 ,Interrupt 0 Mask bit" "Masked,Not masked" line.long 0x0C "ISR,GPIO Interrupt Status Register" eventfld.long 0x0C 31. " ISR31 ,Interrupt 31 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 30. " ISR30 ,Interrupt 30 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 29. " ISR29 ,Interrupt 29 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 28. " ISR28 ,Interrupt 28 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 27. " ISR27 ,Interrupt 27 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 26. " ISR26 ,Interrupt 26 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 25. " ISR25 ,Interrupt 25 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 24. " ISR24 ,Interrupt 24 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 23. " ISR23 ,Interrupt 23 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 22. " ISR22 ,Interrupt 22 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 21. " ISR21 ,Interrupt 21 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 20. " ISR20 ,Interrupt 20 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 19. " ISR19 ,Interrupt 19 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 18. " ISR18 ,Interrupt 18 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 17. " ISR17 ,Interrupt 17 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 16. " ISR16 ,Interrupt 16 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 15. " ISR15 ,Interrupt 15 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 14. " ISR14 ,Interrupt 14 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 13. " ISR13 ,Interrupt 13 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 12. " ISR12 ,Interrupt 12 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 11. " ISR11 ,Interrupt 11 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 10. " ISR10 ,Interrupt 10 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 9. " ISR9 ,Interrupt 9 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 8. " ISR8 ,Interrupt 8 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 7. " ISR7 ,Interrupt 7 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 6. " ISR6 ,Interrupt 6 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 5. " ISR5 ,Interrupt 5 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 4. " ISR4 ,Interrupt 4 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 3. " ISR3 ,Interrupt 3 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 2. " ISR2 ,Interrupt 2 Status bit" "No interrupt,Interrupt" textline " " eventfld.long 0x0C 1. " ISR1 ,Interrupt 1 Status bit" "No interrupt,Interrupt" eventfld.long 0x0C 0. " ISR0 ,Interrupt 0 Status bit" "No interrupt,Interrupt" tree.end textline " " width 0x0B width 10. group.long 0x1C++0x03 line.long 0x00 "EDGE_SEL,GPIO Edge Select Register" bitfld.long 0x00 31. " EDGE_SEL31 ,Edge Selection 31" "ICR_2_31,Any edge" bitfld.long 0x00 30. " EDGE_SEL30 ,Edge Selection 30" "ICR_2_30,Any edge" bitfld.long 0x00 29. " EDGE_SEL29 ,Edge Selection 29" "ICR_2_29,Any edge" bitfld.long 0x00 28. " EDGE_SEL28 ,Edge Selection 28" "ICR_2_28,Any edge" bitfld.long 0x00 27. " EDGE_SEL27 ,Edge Selection 27" "ICR_2_27,Any edge" bitfld.long 0x00 26. " EDGE_SEL26 ,Edge Selection 26" "ICR_2_26,Any edge" textline " " bitfld.long 0x00 25. " EDGE_SEL25 ,Edge Selection 25" "ICR_2_25,Any edge" bitfld.long 0x00 24. " EDGE_SEL24 ,Edge Selection 24" "ICR_2_24,Any edge" bitfld.long 0x00 23. " EDGE_SEL23 ,Edge Selection 23" "ICR_2_23,Any edge" bitfld.long 0x00 22. " EDGE_SEL22 ,Edge Selection 22" "ICR_2_22,Any edge" bitfld.long 0x00 21. " EDGE_SEL21 ,Edge Selection 21" "ICR_2_21,Any edge" bitfld.long 0x00 20. " EDGE_SEL20 ,Edge Selection 20" "ICR_2_20,Any edge" textline " " bitfld.long 0x00 19. " EDGE_SEL19 ,Edge Selection 19" "ICR_2_19,Any edge" bitfld.long 0x00 18. " EDGE_SEL18 ,Edge Selection 18" "ICR_2_18,Any edge" bitfld.long 0x00 17. " EDGE_SEL17 ,Edge Selection 17" "ICR_2_17,Any edge" bitfld.long 0x00 16. " EDGE_SEL16 ,Edge Selection 16" "ICR_2_16,Any edge" bitfld.long 0x00 15. " EDGE_SEL15 ,Edge Selection 15" "ICR_1_15,Any edge" bitfld.long 0x00 14. " EDGE_SEL14 ,Edge Selection 14" "ICR_1_14,Any edge" textline " " bitfld.long 0x00 13. " EDGE_SEL13 ,Edge Selection 13" "ICR_1_13,Any edge" bitfld.long 0x00 12. " EDGE_SEL12 ,Edge Selection 12" "ICR_1_12,Any edge" bitfld.long 0x00 11. " EDGE_SEL11 ,Edge Selection 11" "ICR_1_11,Any edge" bitfld.long 0x00 10. " EDGE_SEL10 ,Edge Selection 10" "ICR_1_10,Any edge" bitfld.long 0x00 9. " EDGE_SEL9 ,Edge Selection 9" "ICR_1_9,Any edge" bitfld.long 0x00 8. " EDGE_SEL8 ,Edge Selection 8" "ICR_1_8,Any edge" textline " " bitfld.long 0x00 7. " EDGE_SEL7 ,Edge Selection 7" "ICR_1_7,Any edge" bitfld.long 0x00 6. " EDGE_SEL6 ,Edge Selection 6" "ICR_1_6,Any edge" bitfld.long 0x00 5. " EDGE_SEL5 ,Edge Selection 5" "ICR_1_5,Any edge" bitfld.long 0x00 4. " EDGE_SEL4 ,Edge Selection 4" "ICR_1_4,Any edge" bitfld.long 0x00 3. " EDGE_SEL3 ,Edge Selection 3" "ICR_1_3,Any edge" bitfld.long 0x00 2. " EDGE_SEL2 ,Edge Selection 2" "ICR_1_2,Any edge" textline " " bitfld.long 0x00 1. " EDGE_SEL1 ,Edge Selection 1" "ICR_1_1,Any edge" bitfld.long 0x00 0. " EDGE_SEL0 ,Edge Selection 0" "ICR_1_0,Any edge" width 0x0B tree.end endif tree.end sif (cpu()!="IMX6SOLOLITE") tree "GPMI (General-Purpose Media Interface)" base ad:0x00112000 width 18. group.long 0x00++0x13 line.long 0x00 "GPMI_CTRL0,GPMI Control Register 0" bitfld.long 0x00 31. " SFTRST ,Soft reset" "Run,Reset" bitfld.long 0x00 30. " CLKGATE ,Clock gate" "Run,No_clks" bitfld.long 0x00 29. " RUN ,GPMI busy running" "Idle,Busy" bitfld.long 0x00 28. " DEV_IRQ_EN ,DEV IRQ enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOCK_CS ,Chip select lock bit" "Disabled,Enabled" bitfld.long 0x00 26. " UDMA ,ATA-Ultra DMA enable" "Disabled,Enabled" bitfld.long 0x00 24.--25. " COMMAND_MODE ,Command mode" "Write,Read,Read and compare,Wait for ready" bitfld.long 0x00 23. " WORD_LENGTH ,Data bus mode" ",8-bit" textline " " bitfld.long 0x00 20.--22. " CS ,Chip select bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17.--19. " ADDRESS ,Address" "Nand data,Nand CLE,Nand ALE,?..." bitfld.long 0x00 16. " ADDRESS_INCREMENT ,Adress increment" "Not incremented,Incremented" hexmask.long.word 0x00 0.--15. 1. " XFER_COUNT ,Number of words (8 or 16 bit wide) to transfer for this command" line.long 0x04 "GPMI_CTRL0_SET,GPMI Control Set Register 0" bitfld.long 0x04 31. " SFTRST ,Soft reset" "No effect,Set" bitfld.long 0x04 30. " CLKGATE ,Clock gate" "No effect,Set" bitfld.long 0x04 29. " RUN ,GPMI busy running" "No effect,Set" bitfld.long 0x04 28. " DEV_IRQ_EN ,DEV IRQ enable" "No effect,Set" textline " " bitfld.long 0x04 27. " TIMEOUT_IRQ_EN ,Timeout interrupt enable" "No effect,Set" bitfld.long 0x04 26. " UDMA ,ATA-Ultra DMA enable" "No effect,Set" bitfld.long 0x04 24.--25. " COMMAND_MODE ,Command mode" "Write,Read,Read and compare,Wait for ready" bitfld.long 0x04 23. " WORD_LENGTH ,Data bus mode" ",8-bit" textline " " bitfld.long 0x04 20.--22. " CS ,Chip select bit" "0,1,2,3,4,5,6,7" bitfld.long 0x04 17.--19. " ADDRESS ,Address" "Nand data,Nand CLE,Nand ALE,?..." bitfld.long 0x04 16. " ADDRESS_INCREMENT ,Adress increment" "No effect,Set" hexmask.long.word 0x04 0.--15. 1. " XFER_COUNT ,Number of words (8 or 16 bit wide) to transfer for this command" line.long 0x08 "GPMI_CTRL0_CLR,GPMI Control Clear Register 0" bitfld.long 0x08 31. " SFTRST ,Soft reset" "No effect,Clear" bitfld.long 0x08 30. " CLKGATE ,Clock gate" "No effect,Clear" bitfld.long 0x08 29. " RUN ,GPMI busy running" "No effect,Clear" bitfld.long 0x08 28. " DEV_IRQ_EN ,DEV IRQ enable" "No effect,Clear" textline " " bitfld.long 0x08 27. " LOCK_CS ,Chip select lock bit" "No effect,Clear" bitfld.long 0x08 26. " UDMA ,ATA-Ultra DMA enable" "No effect,Clear" bitfld.long 0x08 24.--25. " COMMAND_MODE ,Command mode" "Write,Read,Read and compare,Wait for ready" bitfld.long 0x08 23. " WORD_LENGTH ,Data bus mode" ",8-bit" textline " " bitfld.long 0x08 20.--22. " CS ,Chip select bit" "0,1,2,3,4,5,6,7" bitfld.long 0x08 17.--19. " ADDRESS ,Address" "Nand data,Nand CLE,Nand ALE,?..." bitfld.long 0x08 16. " ADDRESS_INCREMENT ,Adress increment" "No effect,Clear" hexmask.long.word 0x08 0.--15. 1. " XFER_COUNT ,Number of words (8 or 16 bit wide) to transfer for this command" line.long 0x0c "GPMI_CTRL0_TOG,GPMI Control Toggle Register 0" bitfld.long 0x0c 31. " SFTRST ,Soft reset" "Not toggled,Toggled" bitfld.long 0x0c 30. " CLKGATE ,Clock gate" "Not toggled,Toggled" bitfld.long 0x0c 29. " RUN ,GPMI busy running" "Not toggled,Toggled" bitfld.long 0x0c 28. " DEV_IRQ_EN ,DEV IRQ enable" "Not toggled,Toggled" textline " " bitfld.long 0x0c 27. " LOCK_CS ,Chip select lock bit" "Not toggled,Toggled" bitfld.long 0x0c 26. " UDMA ,ATA-Ultra DMA enable" "Not toggled,Toggled" bitfld.long 0x0c 24.--25. " COMMAND_MODE ,Command mode" "Write,Read,Read and compare,Wait for ready" bitfld.long 0x0c 23. " WORD_LENGTH ,Data bus mode" ",8-bit" textline " " bitfld.long 0x0c 20.--22. " CS ,Chip select bit" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 17.--19. " ADDRESS ,Address" "Nand data,Nand CLE,Nand ALE,?..." bitfld.long 0x0c 16. " ADDRESS_INCREMENT ,Adress increment" "Not toggled,Toggled" hexmask.long.word 0x0c 0.--15. 1. " XFER_COUNT ,Number of words (8 or 16 bit wide) to transfer for this command" line.long 0x10 "GPMI_COMPARE,GPMI Compare Register Description" hexmask.long.word 0x10 16.--31. 1. " MASK ,16-bit mask which is applied after the read data is XORed with the REFERENCE bit field" hexmask.long.word 0x10 0.--15. 1. " REFERENCE ,16-bit value which is XORed with data read from the NAND device" group.long 0x20++0x13 line.long 0x00 "GPMI_ECCCTRL,GPMI Integrated ECC Control Register" hexmask.long.word 0x00 16.--31. 1. " HANDLE ,Attach an identifier to a transaction in progress" bitfld.long 0x00 13.--14. " ECC_CMD ,ECC Command information" "DECODE,ENCODE,?..." bitfld.long 0x00 12. " ENABLE_ECC ,Enable ECC processing of GPMI transfers" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 1. " BUFFER_MASK ,ECC buffer information" line.long 0x04 "GPMI_ECCCTRL_SET,GPMI Integrated ECC Control Set Register" hexmask.long.word 0x04 16.--31. 1. " HANDLE ,Attach an identifier to a transaction in progress" bitfld.long 0x04 13.--14. " ECC_CMD ,ECC Command information" "DECODE,ENCODE,?..." bitfld.long 0x04 12. " ENABLE_ECC ,Enable ECC processing of GPMI transfers" "No effect,Set" hexmask.long.word 0x04 0.--8. 1. " BUFFER_MASK ,ECC buffer information" line.long 0x08 "GPMI_ECCCTRL_CLR,GPMI Integrated ECC Control Clear Register" hexmask.long.word 0x08 16.--31. 1. " HANDLE ,Attach an identifier to a transaction in progress" bitfld.long 0x08 13.--14. " ECC_CMD ,ECC Command information" "DECODE,ENCODE,?..." bitfld.long 0x08 12. " ENABLE_ECC ,Enable ECC processing of GPMI transfers" "No effect,Clear" hexmask.long.word 0x08 0.--8. 1. " BUFFER_MASK ,ECC buffer information" line.long 0x0c "GPMI_ECCCTRL_TOG,GPMI Integrated ECC Control Toggle Register" hexmask.long.word 0x0c 16.--31. 1. " HANDLE ,Attach an identifier to a transaction in progress" bitfld.long 0x0c 13.--14. " ECC_CMD ,ECC Command information" "DECODE,ENCODE,?..." bitfld.long 0x0c 12. " ENABLE_ECC ,Enable ECC processing of GPMI transfers" "Not toggled,Toggled" hexmask.long.word 0x0c 0.--8. 1. " BUFFER_MASK ,ECC buffer information" line.long 0x10 "GPMI_ECCCOUNT,GPMI Integrated ECC Transfer Count Register" hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of bytes to pass through ECC" group.long 0x40++0x03 line.long 0x00 "GPMI_PAYLOAD,GPMI Payload Address" hexmask.long 0x00 2.--31. 0x04 " ADDRESS ,Pointer to an array of one or more 512 byte payload buffers" group.long 0x50++0x03 line.long 0x00 "GPMI_AUXILIARY,GPMI Auxiliary Address Register" hexmask.long 0x00 2.--31. 0x04 " ADDRESS ,Pointer to ECC control structure and meta-data storage" textline " " group.long 0x60++0x13 line.long 0x00 "GPMI_CTRL1,GPMI Control Register 1" bitfld.long 0x00 31. " DEV_CLK_STOP ,Device clock stop" "Not stopped,Stopped" bitfld.long 0x00 30. " SSYNC_CLK_STOP ,Source synchronous mode clock stop" "Not stopped,Stopped" bitfld.long 0x00 29. " WRITE_CLK_STOP ,Stop clock durning data write" "Not stopped,Stopped" bitfld.long 0x00 28. " TOGGLE_MODE ,Samsung toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " GPMI_CLK_DIV2_EN ,GPMI clk divider enable" "Disabled,Enabled" bitfld.long 0x00 26. " UPDATE_CS ,Force CS value update" "Not updated,Updated" bitfld.long 0x00 25. " SSYNCMODE ,Asynchronous/synchronous mode" "Async,Sync" bitfld.long 0x00 24. " DECOUPLE_CS ,Decouple Chip Select from DMA Channel" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " WRN_DLY_SEL ,Delay on GPMI write strobe (WRN)" "4-8 ns,6-10 ns,7-12 ns,No delay" bitfld.long 0x00 20. " TIMEOUT_IRQ_EN ,Enable timeout IRQ for WAIT_FOR_READY commands in Nand mode" "Disabled,Enabled" bitfld.long 0x00 19. " GANGED_RDYBUSY ,Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0" "Not forced,Forced" bitfld.long 0x00 18. " BCH_MODE ,This bit selects which error correction unit will access GPMI" ",BCH" textline " " bitfld.long 0x00 17. " DLL_ENABLE ,GPMI DLL enable bit" "Disabled,Enabled" bitfld.long 0x00 16. " HALF_PERIOD ,Clock period is greater than 16ns for proper DLL operation" "Disabled,Enabled" bitfld.long 0x00 12.--15. " RDN_DELAY ,delay to apply to the internal read strobe for correct read data sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " DMA2ECC_MODE ,DMA ECC mode" "0,1" textline " " bitfld.long 0x00 10. " DEV_IRQ ,ATA device interrupt received" "Not received,Received" bitfld.long 0x00 9. " TIMEOUT_IRQ ,Interrupt timeout" "Not occurred,Occurred" bitfld.long 0x00 8. " BURST_EN ,4-transfer burst on APB bus enable" "Disabled,Enabled" bitfld.long 0x00 7. " ABORT_WAIT_REQUEST ,Request to abort the wait for ready command" "Not aborted,Aborted" textline " " bitfld.long 0x00 4.--6. " ABORT_WAIT_FOR_READY_CHANNEL ,Abort a wait for ready command on selected channel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " DEV_RESET ,Device reset" "No reset,Reset" bitfld.long 0x00 2. " ATA_IRQRDY_POLARITY ,External RDY_BUSY[1] and RDY_BUSY[0] polarity" "Low,High" bitfld.long 0x00 1. " CAMERA_MODE ,CAMERA Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " GPMI_MODE ,GPMI Mode" "NAND,ATA" line.long 0x04 "GPMI_CTRL1_SET,GPMI Control Set Register 1" bitfld.long 0x04 31. " DEV_CLK_STOP ,Device clock stop" "No effect,Set" bitfld.long 0x04 30. " SSYNC_CLK_STOP ,Source synchronous mode clock stop" "No effect,Set" bitfld.long 0x04 29. " WRITE_CLK_STOP ,Stop clock durning data write" "No effect,Set" bitfld.long 0x04 28. " TOGGLE_MODE ,Samsung toggle mode enable" "No effect,Set" textline " " bitfld.long 0x04 27. " GPMI_CLK_DIV2_EN ,gpmi clk divider enable" "No effect,Set" bitfld.long 0x04 26. " UPDATE_CS ,Force CS value update" "No effect,Set" bitfld.long 0x04 25. " SSYNCMODE ,Asynchronous/synchronous mode" "Async,Sync" bitfld.long 0x04 24. " DECOUPLE_CS ,Decouple Chip Select from DMA Channel" "No effect,Set" textline " " bitfld.long 0x04 22.--23. " WRN_DLY_SEL ,Delay on GPMI write strobe (WRN)" "4-8 ns,6-10 ns,7-12 ns,No delay" bitfld.long 0x04 20. " TIMEOUT_IRQ_EN ,Enable timeout IRQ for WAIT_FOR_READY commands in Nand mode" "No effect,Set" bitfld.long 0x04 19. " GANGED_RDYBUSY ,Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0" "No effect,Set" bitfld.long 0x04 18. " BCH_MODE ,This bit selects which error correction unit will access GPMI" "No effect,Set" textline " " bitfld.long 0x04 17. " DLL_ENABLE ,GPMI DLL enable bit" "No effect,Set" bitfld.long 0x04 16. " HALF_PERIOD ,Clock period is greater than 16ns for proper DLL operation" "No effect,Set" bitfld.long 0x04 12.--15. " RDN_DELAY ,delay to apply to the internal read strobe for correct read data sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 11. " DMA2ECC_MODE ,DMA ECC mode" "No effect,Set" textline " " bitfld.long 0x04 10. " DEV_IRQ ,ATA device interrupt received" "No effect,Set" bitfld.long 0x04 9. " TIMEOUT_IRQ ,Interrupt timeout" "No effect,Set" bitfld.long 0x04 8. " BURST_EN ,4-transfer burst on APB bus enable" "No effect,Set" bitfld.long 0x04 7. " ABORT_WAIT_REQUEST ,Request to abort the wait for ready command" "No effect,Set" textline " " bitfld.long 0x04 4.--6. " ABORT_WAIT_FOR_READY_CHANNEL ,Abort a wait for ready command on selected channel" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3. " DEV_RESET ,Device reset" "No effect,Set" bitfld.long 0x04 2. " ATA_IRQRDY_POLARITY ,External RDY_BUSY[1] and RDY_BUSY[0] polarity" "No effect,Set" bitfld.long 0x04 1. " CAMERA_MODE ,CAMERA Mode" "No effect,Set" textline " " bitfld.long 0x04 0. " GPMI_MODE ,GPMI Mode" "No effect,Set" line.long 0x08 "GPMI_CTRL1_CLR,GPMI Control Clear Register 1" bitfld.long 0x08 31. " DEV_CLK_STOP ,Device clock stop" "No effect,Clear" bitfld.long 0x08 30. " SSYNC_CLK_STOP ,Source synchronous mode clock stop" "No effect,Clear" bitfld.long 0x08 29. " WRITE_CLK_STOP ,Stop clock durning data write" "No effect,Clear" bitfld.long 0x08 28. " TOGGLE_MODE ,Samsung toggle mode enable" "No effect,Clear" textline " " bitfld.long 0x08 27. " GPMI_CLK_DIV2_EN ,gpmi clk divider enable" "No effect,Clear" bitfld.long 0x08 26. " UPDATE_CS ,Force CS value update" "No effect,Clear" bitfld.long 0x08 25. " SSYNCMODE ,Asynchronous/synchronous mode" "Async,Sync" bitfld.long 0x08 24. " DECOUPLE_CS ,Decouple Chip Select from DMA Channel" "No effect,Clear" textline " " bitfld.long 0x08 22.--23. " WRN_DLY_SEL ,Delay on GPMI write strobe (WRN)" "4-8 ns,6-10 ns,7-12 ns,No delay" bitfld.long 0x08 20. " TIMEOUT_IRQ_EN ,Enable timeout IRQ for WAIT_FOR_READY commands in Nand mode" "No effect,Clear" bitfld.long 0x08 19. " GANGED_RDYBUSY ,Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0" "No effect,Clear" bitfld.long 0x08 18. " BCH_MODE ,This bit selects which error correction unit will access GPMI" "No effect,Clear" textline " " bitfld.long 0x08 17. " DLL_ENABLE ,GPMI DLL enable bit" "No effect,Clear" bitfld.long 0x08 16. " HALF_PERIOD ,Clock period is greater than 16ns for proper DLL operation" "No effect,Clear" bitfld.long 0x08 12.--15. " RDN_DELAY ,delay to apply to the internal read strobe for correct read data sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 11. " DMA2ECC_MODE ,DMA ECC mode" "No effect,Clear" textline " " bitfld.long 0x08 10. " DEV_IRQ ,ATA device interrupt received" "No effect,Clear" bitfld.long 0x08 9. " TIMEOUT_IRQ ,Interrupt timeout" "No effect,Clear" bitfld.long 0x08 8. " BURST_EN ,4-transfer burst on APB bus enable" "No effect,Clear" bitfld.long 0x08 7. " ABORT_WAIT_REQUEST ,Request to abort the wait for ready command" "No effect,Clear" textline " " bitfld.long 0x08 4.--6. " ABORT_WAIT_FOR_READY_CHANNEL ,Abort a wait for ready command on selected channel" "0,1,2,3,4,5,6,7" bitfld.long 0x08 3. " DEV_RESET ,Device reset" "No effect,Clear" bitfld.long 0x08 2. " ATA_IRQRDY_POLARITY ,External RDY_BUSY[1] and RDY_BUSY[0] polarity" "No effect,Clear" bitfld.long 0x08 1. " CAMERA_MODE ,CAMERA Mode" "No effect,Clear" textline " " bitfld.long 0x08 0. " GPMI_MODE ,GPMI Mode" "No effect,Clear" line.long 0x0c "GPMI_CTRL1_TOG,GPMI Control Toggle Register 1" bitfld.long 0x0c 31. " DEV_CLK_STOP ,Device clock stop" "Not toggled,Toggled" bitfld.long 0x0c 30. " SSYNC_CLK_STOP ,Source synchronous mode clock stop" "Not toggled,Toggled" bitfld.long 0x0c 29. " WRITE_CLK_STOP ,Stop clock durning data write" "Not toggled,Toggled" bitfld.long 0x0c 28. " TOGGLE_MODE ,Samsung toggle mode enable" "Not toggled,Toggled" textline " " bitfld.long 0x0c 27. " GPMI_CLK_DIV2_EN ,gpmi clk divider enable" "Not toggled,Toggled" bitfld.long 0x0c 26. " UPDATE_CS ,Force CS value update" "Not toggled,Toggled" bitfld.long 0x0c 25. " SSYNCMODE ,Asynchronous/synchronous mode" "Async,Sync" bitfld.long 0x0c 24. " DECOUPLE_CS ,Decouple Chip Select from DMA Channel" "Not toggled,Toggled" textline " " bitfld.long 0x0c 22.--23. " WRN_DLY_SEL ,Delay on GPMI write strobe (WRN)" "4-8 ns,6-10 ns,7-12 ns,No delay" bitfld.long 0x0c 20. " TIMEOUT_IRQ_EN ,Enable timeout IRQ for WAIT_FOR_READY commands in Nand mode" "Not toggled,Toggled" bitfld.long 0x0c 19. " GANGED_RDYBUSY ,Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0" "Not toggled,Toggled" bitfld.long 0x0c 18. " BCH_MODE ,This bit selects which error correction unit will access GPMI" "Not toggled,Toggled" textline " " bitfld.long 0x0c 17. " DLL_ENABLE ,GPMI DLL enable bit" "Not toggled,Toggled" bitfld.long 0x0c 16. " HALF_PERIOD ,Clock period is greater than 16ns for proper DLL operation" "Not toggled,Toggled" bitfld.long 0x0c 12.--15. " RDN_DELAY ,delay to apply to the internal read strobe for correct read data sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 11. " DMA2ECC_MODE ,DMA ECC mode" "Not toggled,Toggled" textline " " bitfld.long 0x0c 10. " DEV_IRQ ,ATA device interrupt received" "Not toggled,Toggled" bitfld.long 0x0c 9. " TIMEOUT_IRQ ,Interrupt timeout" "Not toggled,Toggled" bitfld.long 0x0c 8. " BURST_EN ,4-transfer burst on APB bus enable" "Not toggled,Toggled" bitfld.long 0x0c 7. " ABORT_WAIT_REQUEST ,Request to abort the wait for ready command" "Not toggled,Toggled" textline " " bitfld.long 0x0c 4.--6. " ABORT_WAIT_FOR_READY_CHANNEL ,Abort a wait for ready command on selected channel" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 3. " DEV_RESET ,Device reset" "Not toggled,Toggled" bitfld.long 0x0c 2. " ATA_IRQRDY_POLARITY ,External RDY_BUSY[1] and RDY_BUSY[0] polarity" "Not toggled,Toggled" bitfld.long 0x0c 1. " CAMERA_MODE ,CAMERA Mode" "Not toggled,Toggled" textline " " bitfld.long 0x0c 0. " GPMI_MODE ,GPMI Mode" "Not toggled,Toggled" textline " " line.long 0x10 "GPMI_TIMING0,GPMI Timing Register 0" hexmask.long.byte 0x10 16.--23. 1. " ADDRESS_SETUP ,Number of GPMICLK cycles that the CE signals are active before a strobe is asserted" hexmask.long.byte 0x10 8.--15. 1. " DATA_HOLD ,Data bus hold time in GPMICLK cycles" hexmask.long.byte 0x10 0.--7. 1. " DATA_SETUP ,Data bus setup time in GPMICLK cycles" group.long 0x80++0x03 line.long 0x00 "GPMI_TIMING1,GPMI Timing Register 1" hexmask.long.word 0x00 16.--31. 1. " DEVICE_BUSY_TIMEOUT ,Timeout waiting for NAND Ready/Busy" group.long 0x90++0x03 line.long 0x00 "GPMI_TIMING2,GPMI Timing Register 2" bitfld.long 0x00 24.--26. " READ_LATENCY ,Read latency" "0,1,2,3,4,5,3,3" bitfld.long 0x00 16.--20. " CE_DELAY ,CE delay" "32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--15. " PREAMBLE_DELAY ,Pre-amble delay" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " POSTAMBLE_DELAY ,Post-amble delay" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " CMDADD_PAUSE ,Delay time from cmd/addr pause to cmd/addr resume in GPMICLK cycles" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DATA_PAUSE ,Delay time from data pause to data resume in GPMICLK cycles" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xa0++0x03 line.long 0x00 "GPMI_DATA,GPMI DMA Data Transfer Register" rgroup.long 0xb0++0x03 line.long 0x00 "GPMI_STAT,GPMI Status Register" hexmask.long.byte 0x00 24.--31. 1. " READY_BUSY ,NAND Ready_Busy Input pins" bitfld.long 0x00 23. " RDY_TIMEOUT[7] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" bitfld.long 0x00 22. " RDY_TIMEOUT[6] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" textline " " bitfld.long 0x00 21. " RDY_TIMEOUT[5] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" bitfld.long 0x00 20. " RDY_TIMEOUT[4] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" bitfld.long 0x00 19. " RDY_TIMEOUT[3] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" textline " " bitfld.long 0x00 18. " RDY_TIMEOUT[2] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" bitfld.long 0x00 17. " RDY_TIMEOUT[1] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" bitfld.long 0x00 16. " RDY_TIMEOUT[0] ,State of the RDY/BUSY Timeout Flag" "No timeout,Timeout" textline " " bitfld.long 0x00 15. " DEV7_ERROR ,Error condition on NAND Device accessed by DMA channel 7" "No error,Error" bitfld.long 0x00 14. " DEV6_ERROR ,Error condition on NAND Device accessed by DMA channel 6" "No error,Error" bitfld.long 0x00 13. " DEV5_ERROR ,Error condition on NAND Device accessed by DMA channel 5" "No error,Error" textline " " bitfld.long 0x00 12. " DEV4_ERROR ,Error condition on NAND Device accessed by DMA channel 4" "No error,Error" bitfld.long 0x00 11. " DEV3_ERROR ,Error condition on NAND Device accessed by DMA channel 3" "No error,Error" bitfld.long 0x00 10. " DEV2_ERROR ,Error condition on NAND Device accessed by DMA channel 2" "No error,Error" textline " " bitfld.long 0x00 9. " DEV1_ERROR ,Error condition on NAND Device accessed by DMA channel 1" "No error,Error" bitfld.long 0x00 8. " DEV0_ERROR ,Error condition on NAND Device accessed by DMA channel 0" "No error,Error" bitfld.long 0x00 4. " ATA_IRQ ,Status of ATA_IRQ input pin" "Low,High" textline " " bitfld.long 0x00 3. " INVALID_BUFFER_MASK ,ECC Buffer Mask" "Not invalid,Invalid" bitfld.long 0x00 2. " FIFO_EMPTY ,Fifo empty" "Not empty,Empty" bitfld.long 0x00 1. " FIFO_FULL ,Fifo full" "Not full,Full" textline " " bitfld.long 0x00 0. " PRESENT ,GPMI present" "Not present,Present" rgroup.long 0xc0++0x03 line.long 0x00 "GPMI_DEBUG,GPMI Debug Information Register" bitfld.long 0x00 31. " WAIT_FOR_READY_END[7] ,WAIT_FOR_READY command end of channel 7" "Not occurred,Occurred" bitfld.long 0x00 30. " WAIT_FOR_READY_END[6] ,WAIT_FOR_READY command end of channel 6" "Not occurred,Occurred" bitfld.long 0x00 29. " WAIT_FOR_READY_END[5] ,WAIT_FOR_READY command end of channel 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 28. " WAIT_FOR_READY_END[4] ,WAIT_FOR_READY command end of channel 4" "Not occurred,Occurred" bitfld.long 0x00 27. " WAIT_FOR_READY_END[3] ,WAIT_FOR_READY command end of channel 3" "Not occurred,Occurred" bitfld.long 0x00 26. " WAIT_FOR_READY_END[2] ,WAIT_FOR_READY command end of channel 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 25. " WAIT_FOR_READY_END[1] ,WAIT_FOR_READY command end of channel 1" "Not occurred,Occurred" bitfld.long 0x00 24. " WAIT_FOR_READY_END[0] ,WAIT_FOR_READY command end of channel 0" "Not occurred,Occurred" bitfld.long 0x00 23. " DMA_SENSE[7] ,Sense state of channel 7" "No effect,Failed/Timeouted" textline " " bitfld.long 0x00 22. " DMA_SENSE[6] ,Sense state of channel 6" "No effect,Failed/Timeouted" bitfld.long 0x00 21. " DMA_SENSE[5] ,Sense state of channel 5" "No effect,Failed/Timeouted" bitfld.long 0x00 20. " DMA_SENSE[4] ,Sense state of channel 4" "No effect,Failed/Timeouted" textline " " bitfld.long 0x00 19. " DMA_SENSE[3] ,Sense state of channel 3" "No effect,Failed/Timeouted" bitfld.long 0x00 18. " DMA_SENSE[2] ,Sense state of channel 2" "No effect,Failed/Timeouted" bitfld.long 0x00 17. " DMA_SENSE[1] ,Sense state of channel 1" "No effect,Failed/Timeouted" textline " " bitfld.long 0x00 16. " DMA_SENSE[0] ,Sense state of channel 0" "No effect,Failed/Timeouted" bitfld.long 0x00 15. " DMAREQ[7] ,DMA request line for channel 7" "Not requested,Requested" bitfld.long 0x00 14. " DMAREQ[6] ,DMA request line for channel 6" "Not requested,Requested" textline " " bitfld.long 0x00 13. " DMAREQ[5] ,DMA request line for channel 5" "Not requested,Requested" bitfld.long 0x00 12. " DMAREQ[4] ,DMA request line for channel 4" "Not requested,Requested" bitfld.long 0x00 11. " DMAREQ[3] ,DMA request line for channel 3" "Not requested,Requested" textline " " bitfld.long 0x00 10. " DMAREQ[2] ,DMA request line for channel 2" "Not requested,Requested" bitfld.long 0x00 9. " DMAREQ[1] ,DMA request line for channel 1" "Not requested,Requested" bitfld.long 0x00 8. " DMAREQ[0] ,DMA request line for channel 0" "Not requested,Requested" textline " " bitfld.long 0x00 7. " CMD_END[7] ,Command End toggle to DMA Channel 7" "Not finished,Finished" bitfld.long 0x00 6. " CMD_END[6] ,Command End toggle to DMA Channel 6" "Not finished,Finished" bitfld.long 0x00 5. " CMD_END[5] ,Command End toggle to DMA Channel 5" "Not finished,Finished" textline " " bitfld.long 0x00 4. " CMD_END[4] ,Command End toggle to DMA Channel 4" "Not finished,Finished" bitfld.long 0x00 3. " CMD_END[3] ,Command End toggle to DMA Channel 3" "Not finished,Finished" bitfld.long 0x00 2. " CMD_END[2] ,Command End toggle to DMA Channel 2" "Not finished,Finished" textline " " bitfld.long 0x00 1. " CMD_END[1] ,Command End toggle to DMA Channel 1" "Not finished,Finished" bitfld.long 0x00 0. " CMD_END[0] ,Command End toggle to DMA Channel 0" "Not finished,Finished" rgroup.long 0xd0++0x03 line.long 0x00 "GPMI_VERSION,GPMI Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-only value reflecting the MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-only value reflecting the MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-only value reflecting the stepping of the RTL version" group.long 0x0E0++0x03 line.long 0x00 "GPMI_DEBUG2,GPMI Debug2 Information Register" rbitfld.long 0x00 24.--27. " UDMA_STATE ,UDMA state" "USM_IDLE,USM_DMARQ,USM_ACK,USM_FIFO_E,USM_WPAUSE,USM_TSTRB,USM_CAPTUR,USM_DATOUT,USM_CRC,USM_WAIT_R,USM_END,USM_WAIT_S,USM_RPAUSE,USM_RSTOP,USM_WTERM,USM_RTERM" rbitfld.long 0x00 23. " BUSY ,When asserted the GPMI is busy" "Disabled,Enabled" rbitfld.long 0x00 20.--22. " PIN_STATE ,Pin state" "PSM_IDLE,PSM_BYTCNT,PSM_ADDR,PSM_STALL,PSM_STROBE,PSM_ATARDY,PSM_DHOLD,PSM_DONE" textline " " rbitfld.long 0x00 16.--19. " MAIN_STATE ,Main state" "MSM_IDLE,MSM_BYTCNT,MSM_WAITFE,MSM_WAITFR,MSM_DMAREQ,MSM_DMAACK,MSM_WAITFF,MSM_LDFIFO,MSM_LDDMAR,MSM_RDCMP,MSM_DONE,?..." rbitfld.long 0x00 12.--15. " SYND2GPMI_BE ,Data byte enable Input from BCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 11. " GPMI2SYND_VALID ,Data handshake output to BCH" "Not valid,Valid" textline " " rbitfld.long 0x00 10. " GPMI2SYND_READY ,Data handshake output to BCH" "Not ready,Ready" rbitfld.long 0x00 9. " SYND2GPMI_VALID ,Data handshake Input from BCH" "Not valid,Valid" rbitfld.long 0x00 8. " SYND2GPMI_READY ,Data handshake Input from BCH" "Not ready,Ready" textline " " bitfld.long 0x00 7. " VIEW_DELAYED_RDN ,feedback RDN to drive the GPMI_ADDR[0]" "No delay,Delay" rbitfld.long 0x00 6. " UPDATE_WINDOW ,DLL is busy generating the required delay" "No,Yes" rbitfld.long 0x00 0.--5. " RDN_TAP ,This is the DLL tap calculated by the DLL controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x0F0++0x03 line.long 0x00 "GPMI_DEBUG3,GPMI Debug3 Information Register Description" hexmask.long.word 0x00 16.--31. 1. " APB_WORD_CNTR ,Reflects the number of words remains to be transferred on the APB bus" hexmask.long.word 0x00 0.--15. 1. " DEV_WORD_CNTR ,Reflects the number of words remains to be transferred on the ATA/Nand bus" textline " " width 25. group.long 0x0100++0x03 line.long 0x00 "GPMI_READ_DDR_DLL_CTRL,GPMI Double Rate Read DLL Control Register" bitfld.long 0x00 28.--31. " REF_UPDATE_INT ,Additional delay cycles to the DLL control loop" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17" hexmask.long.byte 0x00 20.--27. 1. " SLV_UPDATE_INT ,Update interval of 256 GPMICLK cycles" hexmask.long.byte 0x00 10.--17. 1. " SLV_OVERRIDE_VAL ,Select 1 of 256 physical taps manually" bitfld.long 0x00 9. " SLV_OVERRIDE ,Enable manual override for slave delay chain" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REFCLK_ON ,Reference clock" "Off,On" bitfld.long 0x00 7. " GATE_UPDATE ,Slave delay line" "No effect,Not updated" bitfld.long 0x00 3.--6. " SLV_DLY_TARGET ,The delay target for the read clock" "1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16,16/16" bitfld.long 0x00 2. " SLV_FORCE_UPD ,Slave delay line" "No effect,Updated" textline " " bitfld.long 0x00 1. " RESET ,Reset on DLL" "No effect,Reset" bitfld.long 0x00 0. " ENABLE ,Enable the DLL and delay chain" "Disabled,Enabled" group.long 0x0110++0x03 line.long 0x00 "GPMI_WRITE_DDR_DLL_CTRL,GPMI Double Rate Write DLL Control Register" bitfld.long 0x00 28.--31. " REF_UPDATE_INT ,Additional delay cycles to the DLL control loop" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17" hexmask.long.byte 0x00 20.--27. 1. " SLV_UPDATE_INT ,Update interval of 256 GPMICLK cycles" hexmask.long.byte 0x00 10.--17. 1. " SLV_OVERRIDE_VAL ,Select 1 of 256 physical taps manually" bitfld.long 0x00 9. " SLV_OVERRIDE ,Enable manual override for slave delay chain" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REFCLK_ON ,Reference clock" "Off,On" bitfld.long 0x00 7. " GATE_UPDATE ,Slave delay line" "No effect,Not updated" bitfld.long 0x00 3.--6. " SLV_DLY_TARGET ,The delay target for the read clock" "1/16,2/16,3/16,4/16,5/16,6/16,7/16,8/16,9/16,10/16,11/16,12/16,13/16,14/16,15/16,16/16" bitfld.long 0x00 2. " SLV_FORCE_UPD ,Slave delay line" "No effect,Updated" textline " " bitfld.long 0x00 1. " RESET ,Reset on DLL" "No effect,Reset" bitfld.long 0x00 0. " ENABLE ,Enable the DLL and delay chain" "Disabled,Enabled" rgroup.long 0x0120++0x03 line.long 0x00 "GPMI_READ_DDR_DLL_STS,GPMI Double Rate Read DLL Status Register" hexmask.long.byte 0x00 17.--24. 1. " REF_SEL ,Reference delay line select status" bitfld.long 0x00 16. " REF_LOCK ,Reference DLL lock status" "Not locked,Locked" hexmask.long.byte 0x00 1.--8. 1. " SLV_SEL ,Slave delay line select status" bitfld.long 0x00 0. " SLV_LOCK ,Slave delay-line lock status" "Low,High" rgroup.long 0x0130++0x03 line.long 0x00 "GPMI_WRITE_DDR_DLL_STS,GPMI Double Rate Write DLL Status Register" hexmask.long.byte 0x00 17.--24. 1. " REF_SEL ,Reference delay line select status" bitfld.long 0x00 16. " REF_LOCK ,Reference DLL lock status" "Not locked,Locked" hexmask.long.byte 0x00 1.--8. 1. " SLV_SEL ,Slave delay line select status" bitfld.long 0x00 0. " SLV_LOCK ,Slave delay-line lock status" "Low,High" width 0x0B tree.end endif tree "GPT (General Purpose Timer)" base ad:0x02098000 width 9. group.long 0x00++0x1B line.long 0x00 "GPTCR,GPT Control Register" bitfld.long 0x00 31. " FO3 ,Force Output Compare Channel 3" "No effect,Compare" bitfld.long 0x00 30. " FO2 ,Force Output Compare Channel 2" "No effect,Compare" bitfld.long 0x00 29. " FO1 ,Force Output Compare Channel 1" "No effect,Compare" textline " " bitfld.long 0x00 26.--28. " OM3 ,Output Compare Channel 3 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse" bitfld.long 0x00 23.--25. " OM2 ,Output Compare Channel 2 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse" bitfld.long 0x00 20.--22. " OM1 ,Output Compare Channel 1 Operating Mode" "Disconnected,Toggled,Cleared,Set,Pulse,Pulse,Pulse,Pulse" textline " " bitfld.long 0x00 18.--19. " IM2 ,Input Capture Channel 2 Operating Mode" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x00 16.--17. " IM1 ,Input Capture Channel 1 Operating Mode" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x00 15. " SWR ,Software Reset" "No reset,Reset" textline " " sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") bitfld.long 0x00 10. " 24MEN ,Enable 24MHz clock input from crystal" "Disabled,Enabled" textline " " endif bitfld.long 0x00 9. " FRR ,Freerun Or Restart Mode" "Restart,Freerun" textline " " sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") bitfld.long 0x00 6.--8. " CLKSRC ,Clock Source Select" "No clock,Peripheral Clock,High Frequency,External Clock,Low Frequency,Low Frequency,Low Frequency,Low Frequency" elif (cpu()=="IMX6DUAL"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6QUAD") bitfld.long 0x00 6.--8. " CLKSRC ,Clock Source Select" "No clock,Peripheral Clock,High Frequency,External Clock,Low Frequency,Crystal oscillator/8,,Crystal oscillator" elif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE"||cpuis("IMX50*")) bitfld.long 0x00 6.--8. " CLKSRC ,Clock Source Select" "No clock,Peripheral Clock,High Frequency,External Clock,Low Frequency,Crystal oscillator,?..." else bitfld.long 0x00 6.--8. " CLKSRC ,Clock Source Select" "No clock,ipg_clk,ipg_clk_highfreq,ipp_ind_clkin,ipg_clk_32k,ipg_clk_32k,ipg_clk_32k,ipg_clk_32k" endif textline " " bitfld.long 0x00 5. " STOPEN ,GPT Stop Mode Enable" "Disabled,Enabled" textline " " sif (cpuis("IMX6*")||cpuis("IMX50*")) bitfld.long 0x00 4. " DOZEEN ,GPT Doze Mode Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 3. " WAITEN ,GPT Wait Mode Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DBGEN ,GPT Debug Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ENMODE ,GPT Enable Mode" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,GPT Enable" "Disabled,Enabled" line.long 0x04 "GPTPR,GPT Prescaler Register" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") bitfld.long 0x04 12.--15. " PRESCALER24M ,Prescaler bits" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" textline " " endif hexmask.long.word 0x04 0.--11. 1. " PRESCALER ,Prescaler" line.long 0x08 "GPTSR,GPT Status Register" eventfld.long 0x08 5. " ROV ,Rollover Flag" "Not occurred,Occurred" eventfld.long 0x08 4. " IF2 ,Input Capture 2 Flag" "Not occurred,Occurred" eventfld.long 0x08 3. " IF1 ,Input Capture 1 Flag" "Not occurred,Occurred" textline " " eventfld.long 0x08 2. " OF3 ,Output Compare 3 Flag" "Not occurred,Occurred" eventfld.long 0x08 1. " OF2 ,Output Compare 2 Flag" "Not occurred,Occurred" eventfld.long 0x08 0. " OF1 ,Output Compare 1Flag" "Not occurred,Occurred" line.long 0x0c "GPTIR,GPT Interrupt Register" bitfld.long 0x0C 5. " ROVIE ,Rollover Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " IF2IE ,Input Capture 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0C 3. " IF1IE ,Input Capture 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " OF3IE ,Output Compare 3 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " OF2IE ,Output Compare 2Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " OF1IE ,Output Compare 1Interrupt Enable" "Disabled,Enabled" line.long 0x10 "GPTOCR1,GPT Output Compare Register 1" line.long 0x14 "GPTOCR2,GPT Output Compare Register 2" line.long 0x18 "GPTOCR3,GPT Output Compare Register 3" rgroup.long 0x1C++0x0B line.long 0x00 "GPTICR1,GPT Input Capture Register 1" line.long 0x04 "GPTICR2,GPT Input Capture Register 2" line.long 0x08 "GPTCNT,GPT Counter Register" width 0x0B tree.end sif (cpu()!="IMX6SOLOLITE") tree "HDMI (High Definition Multimedia Interface)" base ad:0x00120000 width 34. rgroup.byte 0x0000++0x07 line.byte 0x00 "HDMI_DESIGN_ID,Design Identification Register" line.byte 0x01 "HDMI_REVISION_ID,Revision Identification Register" line.byte 0x02 "HDMI_PRODUCT_ID0,Product Identification Register 0" line.byte 0x03 "HDMI_PRODUCT_ID1,Product Identification Register 1" line.byte 0x04 "HDMI_CONFIG0_ID,Configuration Identification Register 0" bitfld.byte 0x04 7. " PREPEN ,Use internal pixel repetition" "Not possible,Possible" bitfld.byte 0x04 6. " AUDHBR ,HBR interface" "Not present,Present" textline " " bitfld.byte 0x04 5. " AUDSPDIF ,SPDIF interface" "Not present,Present" bitfld.byte 0x04 4. " AUDI2S ,I2S interface" "Not present,Present" textline " " bitfld.byte 0x04 3. " HDMI14 ,HDMI 1.4 features" "Not present,Present" bitfld.byte 0x04 2. " CSC ,Color Space Conversion block" "Not present,Present" textline " " bitfld.byte 0x04 1. " CEC ,CEC" "Not present,Present" bitfld.byte 0x04 0. " HDCP ,HDCP" "Not present,Present" line.byte 0x05 "HDMI_CONFIG1_ID,Configuration Identification Register 1" bitfld.byte 0x05 4. " CONFSFRDIR ,Configuration interface is SFR interface" "No,Yes" bitfld.byte 0x05 3. " CONFI2C ,Configuration interface is I2C interface" "No,Yes" textline " " bitfld.byte 0x05 2. " CONFOCP ,Configuration interface is OCP interface" "No,Yes" bitfld.byte 0x05 1. " CONFABP ,Configuration interface is APB interface" "No,Yes" textline " " bitfld.byte 0x05 0. " CONFAHB ,Configuration interface is AHB interface" "No,Yes" line.byte 0x06 "HDMI_CONFIG2_ID,Configuration Identification Register 2" line.byte 0x07 "HDMI_CONFIG3_ID,Configuration Identification Register 3" bitfld.byte 0x07 0. " CONFGPAUD ,Configuration interface is Generic Parallel Audio interface" "No,Yes" group.byte 0x0100++0x09 line.byte 0x00 "HDMI_IH_FC_STAT0,Frame Composer Interrupt Status Register 0" eventfld.byte 0x00 7. " AUDI ,Audio InfoFrame packet" "No interrupt,Interrupt" eventfld.byte 0x00 6. " ACP ,Audio Content Protection packet" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 5. " HBR ,Audio HBR packet" "No interrupt,Interrupt" eventfld.byte 0x00 2. " AUDS ,Audio Sample packet" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 1. " ACR ,Audio Clock Regeneration" "No interrupt,Interrupt" eventfld.byte 0x00 0. " NULL ,Null packet" "No interrupt,Interrupt" line.byte 0x01 "HDMI_IH_FC_STAT1,Frame Composer Interrupt Status Register 1" eventfld.byte 0x01 7. " GMD ,Gamut metadata packet" "No interrupt,Interrupt" eventfld.byte 0x01 6. " ISCR1 ,International Standard Recording Code 1 packet" "No interrupt,Interrupt" textline " " eventfld.byte 0x01 5. " ISCR2 ,International Standard Recording Code 2 packet" "No interrupt,Interrupt" eventfld.byte 0x01 4. " VSD ,Vendor Specific Data infoFrame packet" "No interrupt,Interrupt" textline " " eventfld.byte 0x01 3. " SPD ,Source Product Descriptor infoFrame packet" "No interrupt,Interrupt" eventfld.byte 0x01 1. " AVI ,AVI infoFrame packet" "No interrupt,Interrupt" textline " " eventfld.byte 0x01 0. " GCP ,General Control Packet" "No interrupt,Interrupt" line.byte 0x02 "HDMI_IH_FC_STAT2,Frame Composer Interrupt Status Register 2" eventfld.byte 0x02 1. " LOWPRIORITY_OVERFLOW ,Frame Composer low priority packet queue descriptor overflow indication" "No interrupt,Interrupt" eventfld.byte 0x02 0. " HIGHPRIORITY_OVERFLOW ,Frame Composer high priority packet queue descriptor overflow indication" "No interrupt,Interrupt" line.byte 0x03 "HDMI_IH_AS_STAT0,Audio Sampler Interrupt Status Register" eventfld.byte 0x03 2. " AUD_FIFO_UNDERFLOW_THR ,Audio Sampler audio FIFO empty threshold indication" "No interrupt,Interrupt" eventfld.byte 0x03 1. " AUD_FIFO_UNDERFLOW ,Audio Sampler audio FIFO empty indication" "No interrupt,Interrupt" textline " " eventfld.byte 0x03 0. " AUD_FIFO_OVERFLOW ,Audio Sampler audio FIFO full indication" "No interrupt,Interrupt" line.byte 0x04 "HDMI_IH_PHY_STAT0,PHY Interface Interrupt Status Register" eventfld.byte 0x04 5. " RX_SENSE[3] ,TX PHY RX_SENSE indication for driver 3" "No interrupt,Interrupt" eventfld.byte 0x04 4. " RX_SENSE[2] ,TX PHY RX_SENSE indication for driver 2" "No interrupt,Interrupt" textline " " eventfld.byte 0x04 3. " RX_SENSE[1] ,TX PHY RX_SENSE indication for driver 1" "No interrupt,Interrupt" eventfld.byte 0x04 2. " RX_SENSE[0] ,TX PHY RX_SENSE indication for driver 1" "No interrupt,Interrupt" textline " " eventfld.byte 0x04 1. " TX_PHY_LOCK ,TX PHY PLL lock indication" "No interrupt,Interrupt" eventfld.byte 0x04 0. " HDP ,HDMI Hot Plug Detect indication" "No interrupt,Interrupt" line.byte 0x05 "HDMI_IH_I2CM_STAT0,E-DDC I2C Master Interrupt Status Register" eventfld.byte 0x05 1. " I2CMASTERDONE ,I2C Master done indication" "No interrupt,Interrupt" eventfld.byte 0x05 0. " I2CMASTERERROR ,I2C Master error indication" "No interrupt,Interrupt" line.byte 0x06 "HDMI_IH_CEC_STAT0,CEC Interrupt Status Register" eventfld.byte 0x06 6. " WAKEUP ,CEC Wake-up indication" "No interrupt,Interrupt" eventfld.byte 0x06 5. " ERROR_FOLLOW ,CEC Error_follow indication" "No interrupt,Interrupt" textline " " eventfld.byte 0x06 4. " ERROR_INITIATOR ,CEC Error_follow indication" "No interrupt,Interrupt" eventfld.byte 0x06 3. " ARB_LOST ,CEC Arb_Lost indicatio" "No interrupt,Interrupt" textline " " eventfld.byte 0x06 2. " NACK ,CEC Nack indication" "No interrupt,Interrupt" eventfld.byte 0x06 1. " EOM ,CEC End of Message Indication" "No interrupt,Interrupt" textline " " eventfld.byte 0x06 0. " DONE ,CEC Done Indication" "No interrupt,Interrupt" line.byte 0x07 "HDMI_IH_VP_STAT0,Video Packetizer Interrupt Status Register" eventfld.byte 0x07 7. " FIFOFULLREPER ,Video packetizer pixel repeater FIFO full interrupt" "No interrupt,Interrupt" eventfld.byte 0x07 6. " FIFOEMPTYREPET ,Video packetizer pixel repeater FIFO empty interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x07 5. " FIFOFULLPP ,Video packetizer pixel packing FIFO full interrupt" "No interrupt,Interrupt" eventfld.byte 0x07 4. " FIFOEMPTYPP ,Video packetizer pixel packing FIFO empty interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x07 3. " FIFOFULLREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO full interrupt" "No interrupt,Interrupt" eventfld.byte 0x07 2. " FIFOEMPTYREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO empty interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x07 1. " FIFOFULLBYP ,Video packetizer 8-bit bypass fifo full interrupt" "No interrupt,Interrupt" eventfld.byte 0x07 0. " FIFOEMPTYBYP ,Video packetizer 8-bit bypass fifo empty interrupt" "No interrupt,Interrupt" line.byte 0x08 "HDMI_IH_I2CMPHY_STAT0,PHY GEN2 I2C Master Interrupt Status Register" eventfld.byte 0x08 1. " I2CMPHYDONE ,I2C Master PHY done indication" "No interrupt,Interrupt" eventfld.byte 0x08 0. " I2CMPHYERROR ,I2C Master PHY error indication" "No interrupt,Interrupt" line.byte 0x09 "HDMI_IH_AHBDMAAUD_STAT0,AHB Audio DMA Interrupt Status Register" eventfld.byte 0x09 5. " AHBDMAAUD_INTERROR ,AHB audio DMA error interrupt" "No interrupt,Interrupt" eventfld.byte 0x09 4. " AHBDMAAUD_INTLOSTOWNERSHIP ,AHB audio DMA lost ownership interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x09 3. " AHBDMAAUD_INTRETRYSPLIT ,AHB audio DMA RETRY/SPLIT interrupt" "No interrupt,Interrupt" eventfld.byte 0x09 2. " AHBDMAAUD_INTDONE ,AHB audio DMA done interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x09 1. " AHBDMAAUD_INTBUFFFULL ,AHB audio DMA Buffer full interrupt" "No interrupt,Interrupt" eventfld.byte 0x09 0. " AHBDMAAUD_INTBUFFEMPTY ,AHB audio DMA Buffer empty interrupt" "No interrupt,Interrupt" group.byte 0x0180++0x09 line.byte 0x00 "HDMI_IH_MUTE_FC_STAT0,Frame Composer Interrupt Mute Control Register 0" bitfld.byte 0x00 7. " AUDI ,Audio InfoFrame Mute" "No mute,Mute" bitfld.byte 0x00 6. " ACP ,Audio Content Protection Mute" "No mute,Mute" textline " " bitfld.byte 0x00 5. " HBR ,Audio HBR Mute" "No mute,Mute" bitfld.byte 0x00 4. " DST ,Mutes" "No mute,Mute" textline " " bitfld.byte 0x00 3. " OBA ,Mutes" "No mute,Mute" bitfld.byte 0x00 2. " AUDS ,Audio Sample Mute" "No mute,Mute" textline " " bitfld.byte 0x00 1. " ACR ,Mutes" "No mute,Mute" bitfld.byte 0x00 0. " NULL ,Null Mute" "No mute,Mute" line.byte 0x01 "HDMI_IH_MUTE_FC_STAT1,Frame Composer Interrupt Mute Control Register 1" bitfld.byte 0x01 7. " GMD ,Gamut Metadata Mute" "No mute,Mute" bitfld.byte 0x01 6. " ISCR1 ,International Standard Recording Code 1 Mute" "No mute,Mute" textline " " bitfld.byte 0x01 5. " ISCR2 ,International Standard Recording Code 2 Mute" "No mute,Mute" bitfld.byte 0x01 4. " VSD ,Vendor Specific Data infoFrame Mute" "No mute,Mute" textline " " bitfld.byte 0x01 3. " SPD ,Source Product Descriptor infoFrame Mute" "No mute,Mute" bitfld.byte 0x01 2. " MPEG ,Mutes" "No mute,Mute" textline " " bitfld.byte 0x01 1. " AVI ,AVI infoFrame Mute" "No mute,Mute" bitfld.byte 0x01 0. " GCP ,General Control Mute" "No mute,Mute" line.byte 0x02 "HDMI_IH_MUTE_FC_STAT2,Frame Composer Interrupt Mute Control Register 2" bitfld.byte 0x02 1. " LOWPRIORITY_OVERFLOW ,Frame Composer low priority mute" "No mute,Mute" bitfld.byte 0x02 0. " HIGHPRIORITY_OVERFLOW ,Frame Composer high priority mute" "No mute,Mute" line.byte 0x03 "HDMI_IH_MUTE_AS_STAT0,Audio Sampler Interrupt Mute Control Register 0" bitfld.byte 0x03 2. " AUD_FIFO_UNDERFLOW_THR ,TX PHY RX_SENSE indication for driver 3 mute" "No mute,Mute" bitfld.byte 0x03 1. " AUD_FIFO_UNDERFLOW ,TX PHY PLL lock mute" "No mute,Mute" textline " " bitfld.byte 0x03 0. " AUD_FIFO_OVERFLOW ,HDMI Hot Plug Detect mute" "No mute,Mute" line.byte 0x04 "HDMI_IH_MUTE_PHY_STAT0,PHY Interface Interrupt Mute Control Register" bitfld.byte 0x04 5. " RX_SENSE[3] ,Mutes IH_ PHY_STAT0[5]" "No mute,Mute" bitfld.byte 0x04 4. " RX_SENSE[2] ,Mutes IH_ PHY_STAT0[4]" "No mute,Mute" textline " " bitfld.byte 0x04 3. " RX_SENSE[1] ,Mutes IH_ PHY_STAT0[3]" "No mute,Mute" bitfld.byte 0x04 2. " RX_SENSE[0] ,Mutes IH_ PHY_STAT0[2]" "No mute,Mute" textline " " bitfld.byte 0x04 1. " TX_PHY_LOCK ,Mutes IH_ PHY_STAT0[1]" "No mute,Mute" bitfld.byte 0x04 0. " HDP ,Mutes IH_ PHY_STAT0[0]" "No mute,Mute" line.byte 0x05 "HDMI_IH_MUTE_I2CM_STAT0,E-DDC I2C Master Interrupt Mute Control Register" bitfld.byte 0x05 1. " I2CMASTERDONE ,Mutes IH_ I2CM_STAT0[1]" "No mute,Mute" bitfld.byte 0x05 0. " I2CMASTERERROR ,Mutes IH_ I2CM_STAT0[0]" "No mute,Mute" line.byte 0x06 "HDMI_IH_MUTE_CEC_STAT0,CEC Interrupt Mute Control Register" bitfld.byte 0x06 6. " WAKEUP ,Mutes IH_ CEC_STAT0[6]" "No mute,Mute" bitfld.byte 0x06 5. " ERROR_FOLLOW ,Mutes IH_ CEC_STAT0[5]" "No mute,Mute" textline " " bitfld.byte 0x06 4. " ERROR_INITIATOR ,Mutes IH_ CEC_STAT0[4]" "No mute,Mute" bitfld.byte 0x06 3. " ARB_LOST ,Mutes IH_ CEC_STAT0[3]" "No mute,Mute" textline " " bitfld.byte 0x06 2. " NACK ,Mutes IH_ CEC_STAT0[2]" "No mute,Mute" bitfld.byte 0x06 1. " EOM ,Mutes IH_ CEC_STAT0[1]" "No mute,Mute" textline " " bitfld.byte 0x06 0. " DONE ,Mutes IH_ CEC_STAT0[0]" "No mute,Mute" line.byte 0x07 "HDMI_IH_MUTE_VP_STAT0,Video Packetizer Interrupt Mute Control Register" bitfld.byte 0x07 7. " FIFOFULLREPER ,Mutes IH_ VP_STAT0[7]" "No mute,Mute" bitfld.byte 0x07 6. " FIFOEMPTYREPET ,Mutes IH_ VP_STAT0[6]" "No mute,Mute" textline " " bitfld.byte 0x07 5. " FIFOFULLPP ,Mutes IH_ VP_STAT0[5]" "No mute,Mute" bitfld.byte 0x07 4. " FIFOEMPTYPP ,Mutes IH_ VP_STAT0[4]" "No mute,Mute" textline " " bitfld.byte 0x07 3. " FIFOFULLREMAP ,Mutes IH_ VP_STAT0[3]" "No mute,Mute" bitfld.byte 0x07 2. " FIFOEMPTYREMAP ,Mutes IH_ VP_STAT0[2]" "No mute,Mute" textline " " bitfld.byte 0x07 1. " FIFOFULLBYP ,Mutes IH_ VP_STAT0[1]" "No mute,Mute" bitfld.byte 0x07 0. " FIFOEMPTYBYP ,Mutes IH_ VP_STAT0[0]" "No mute,Mute" line.byte 0x08 "HDMI_IH_MUTE_I2CMPHY_STAT0,PHY GEN 2 I2C Master Interrupt Mute Control Register" bitfld.byte 0x08 1. " I2CMPHYDONE ,Mutes IH_ I2CMPHY_STAT0[1]" "No mute,Mute" bitfld.byte 0x08 0. " I2CMPHYERROR ,Mutes IH_ I2CMPHY_STAT0[0]" "No mute,Mute" line.byte 0x09 "HDMI_IH_MUTE_AHBDMAAUD_STAT0,AHB Audio DMA Interrupt Mute Control Register" bitfld.byte 0x09 5. " AHBDMAAUD_INTERROR ,Mutes IH_AHBDMAAUD_STAT0[5]" "No mute,Mute" bitfld.byte 0x09 4. " AHBDMAAUD_INTLOSTOWNERSHIP ,Mutes IH_AHBDMAAUD_STAT0[4]" "No mute,Mute" textline " " bitfld.byte 0x09 3. " AHBDMAAUD_INTRETRYSPLIT ,Mutes IH_AHBDMAAUD_STAT0[3]" "No mute,Mute" bitfld.byte 0x09 2. " AHBDMAAUD_INTDONE ,Mutes IH_AHBDMAAUD_STAT0[2]" "No mute,Mute" textline " " bitfld.byte 0x09 1. " AHBDMAAUD_INTBUFFFULL ,Mutes IH_AHBDMAAUD_STAT0[1]" "No mute,Mute" bitfld.byte 0x09 0. " AHBDMAAUD_INTBUFFEMPTY ,Mutes IH_AHBDMAAUD_STAT0[0]" "No mute,Mute" group.byte 0x01FF++0x08 line.byte 0x00 "HDMI_IH_MUTE,Global Interrupt Mute Control Register" bitfld.byte 0x00 1. " MUTE_WAKEUP_INTERRUPT ,Mutes the wake-up interrupt line" "No mute,Mute" bitfld.byte 0x00 0. " MUTE_ALL_INTERRUPT ,Mutes the main interrupt line" "No mute,Mute" line.byte 0x01 "HDMI_TX_INVID0,Video Input Mapping and Internal Data Enable Configuration Register" bitfld.byte 0x01 7. " INTERNAL_DE_GENERATOR ,Internal data enable generator enable" "Disabled,Enabled" bitfld.byte 0x01 0.--4. " VIDEO_MAPPING ,video_mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "HDMI_TX_INSTUFFING,Video Input Stuffing Enable Register" bitfld.byte 0x02 2. " BCBDATA_STUFFING ,Value in the bcbdata[15:0] output" "Input data,TX_BCBDTA" bitfld.byte 0x02 1. " RCDATA_STUFFING ,Value in the rcrdata[15:0] output" "Input data,TX_RCRDTA" textline " " bitfld.byte 0x02 0. " GYDATA_STUFFING ,Value in the gydata[15:0] output" "Input data,TX_GYDTA" line.byte 0x03 "HDMI_TX_GYDATA0,Video Input GY Data Channel Stuffing Register 0" line.byte 0x04 "HDMI_TX_GYDATA1,Video Input GY Data Channel Stuffing Register 1" line.byte 0x05 "HDMI_TX_RCRDATA0,Video Input RCR Data Channel Stuffing Register 0" line.byte 0x06 "HDMI_TX_RCRDATA1,Video Input RCR Data Channel Stuffing Register 1" line.byte 0x07 "HDMI_TX_BCBDATA0,Video Input RCB Data Channel Stuffing Register 0" line.byte 0x08 "HDMI_TX_BCBDATA1,Video Input RCB Data Channel Stuffing Register 1" rgroup.byte 0x0800++0x00 line.byte 0x00 "HDMI_VP_STATUS,Video Packetizer Packing Phase Status Register" bitfld.byte 0x00 0.--3. " PACKING_PHASE ,Holds the packing phase output by the Video packetizer block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x0801++0x03 line.byte 0x00 "HDMI_VP_PR_CD,Video Packetizer Pixel Repetition and Color Depth Register" bitfld.byte 0x00 4.--7. " COLOR_DEPTH[3:0] ,Color depth configuration (video pixel bits/packing mode bits)" "24/8,,,,24/8,30/10,36/12,48/16,?..." bitfld.byte 0x00 0.--3. " DESIRED_PR_FACTOR[3:0] ,Desired pixel repetition factor configuration" "Once,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,?..." line.byte 0x01 "HDMI_VP_STUFF,Video Packetizer Stuffing and Default Packing Phase Register" bitfld.byte 0x01 5. " IDEFAULT_PHASE ,Controls the default phase packing machine" "/4,/2" bitfld.byte 0x01 2. " YCC422_STUFFING ,CC 422 remap stuffing control" "Direct mode,Stuffing mode" textline " " bitfld.byte 0x01 1. " PP_STUFFING ,Pixel packing stuffing control" "Direct mode,Stuffing mode" bitfld.byte 0x01 0. " PR_STUFFING ,Pixel repeater stuffing control" "Direct mode,Stuffing mode" line.byte 0x02 "HDMI_VP_REMAP,Video Packetizer YCC422 Remapping Register" bitfld.byte 0x02 0.--1. " YCC422_SIZE[1:0] ,YCC 422 remap input video size" "16-bit,20-bit,24-bit,?..." line.byte 0x03 "HDMI_VP_CONF,Video Packetizer Output, Bypass, and Enable Configuration Register" bitfld.byte 0x03 6. " BYPASS_EN ,Bypass enable" "Disabled,Enabled" bitfld.byte 0x03 5. " PP_EN ,Pixel packing enable" "Disabled,Enabled" textline " " bitfld.byte 0x03 4. " PR_EN ,Pixel repeater enable" "Disabled,Enabled" bitfld.byte 0x03 3. " YCC422_EN ,YCC 422 select enable" "Disabled,Enabled" textline " " bitfld.byte 0x03 2. " BYPASS_SELECT ,Bypass selection" "Pixel repeater block,Input of video packetizer block" bitfld.byte 0x03 0.--1. " OUTPUT_SELECTOR[1:0] ,Video packetizer output selection" "Packing block,YCC 422 remap block,8-bit bypass block,8-bit bypass block" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") rgroup.byte 0x0805++0x01 line.byte 0x00 "HDMI_VP_STAT,VP_STAT" bitfld.byte 0x00 7. " OSTFULLREPET ,Video packetizer pixel repeater FIFO full status" "Not full,Full" bitfld.byte 0x00 6. " OSTEMPTYREPET ,Video packetizer pixel repeater FIFO empty status" "Not empty,Empty" textline " " bitfld.byte 0x00 5. " OSTFULLPP ,Video packetizer pixel packing FIFO full status" "Not full,Full" bitfld.byte 0x00 4. " OSTEMPTYPP ,Video packetizer pixel packing FIFO empty status" "Not empty,Empty" textline " " bitfld.byte 0x00 3. " OSTFULLREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO full status" "Not full,Full" bitfld.byte 0x00 2. " OSTEMPTYREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO empty status" "Not empty,Empty" textline " " bitfld.byte 0x00 1. " OSTFULLBYP ,Video packetizer 8-bit bypass FIFO full status" "Not full,Full" bitfld.byte 0x00 0. " OSTEMPTYBYP ,Video packetizer 8-bit bypass FIFO empty status" "Not empty,Empty" line.byte 0x01 "HDMI_VP_INT,VP_INT" bitfld.byte 0x01 7. " OINTFULLREPET ,Video packetizer pixel repeater FIFO full status" "No interrupt,Interrupt" bitfld.byte 0x01 6. " OINTEMPTYREPET ,Video packetizer pixel repeater FIFO empty status" "No interrupt,Interrupt" textline " " bitfld.byte 0x01 5. " OINTFULLPP ,Video packetizer pixel packing FIFO full status" "No interrupt,Interrupt" bitfld.byte 0x01 4. " OINTEMPTYPP ,Video packetizer pixel packing FIFO empty status" "No interrupt,Interrupt" textline " " bitfld.byte 0x01 3. " OINTFULLREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO full status" "No interrupt,Interrupt" bitfld.byte 0x01 2. " OINTEMPTYREMAP ,Video packetizer pixel YCC 422 re-mapper FIFO empty status" "No interrupt,Interrupt" textline " " bitfld.byte 0x01 1. " OINTFULLBYP ,Video packetizer 8-bit bypass FIFO full status" "No interrupt,Interrupt" bitfld.byte 0x01 0. " OINTEMPTYBYP ,Video packetizer 8-bit bypass FIFO empty status" "No interrupt,Interrupt" endif group.byte 0x0807++0x00 line.byte 0x00 "HDMI_VP_MASK,Video Packetizer Interrupt Mask Register" bitfld.byte 0x00 7. " VPMASK[7] ,Repeater FIFO full status Mask" "Masked,Not masked" bitfld.byte 0x00 6. " VPMASK[6] ,Repeater FIFO empty status Mask" "Masked,Not masked" textline " " bitfld.byte 0x00 5. " VPMASK[5] ,Packing FIFO full status Mask" "Masked,Not masked" bitfld.byte 0x00 4. " VPMASK[4] ,Packing FIFO empty status Mask" "Masked,Not masked" textline " " bitfld.byte 0x00 3. " VPMASK[3] ,YCC 422 re-mapper FIFO full status Mask" "Masked,Not masked" bitfld.byte 0x00 2. " VPMASK[2] ,YCC 422 re-mapper FIFO empty status Mask" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " VPMASK[1] ,8-bit bypass FIFO full status Mask" "Masked,Not masked" bitfld.byte 0x00 0. " VPMASK[0] ,8-bit bypass FIFO empty status Mask" "Masked,Not masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.byte 0x0808++0x00 line.byte 0x00 "HDMI_VP_POL,Video Packetizer Interrupt Polarity Register" bitfld.byte 0x00 7. " VPPOL[7] ,Repeater FIFO full status Polarity" "Low,High" bitfld.byte 0x00 6. " VPPOL[6] ,Repeater FIFO empty status Polarity" "Low,High" textline " " bitfld.byte 0x00 5. " VPPOL[5] ,Packing FIFO full status Polarity" "Low,High" bitfld.byte 0x00 4. " VPPOL[4] ,Packing FIFO empty status Polarity" "Low,High" textline " " bitfld.byte 0x00 3. " VPPOL[3] ,YCC 422 re-mapper FIFO full status Polarity" "Low,High" bitfld.byte 0x00 2. " VPPOL[2] ,YCC 422 re-mapper FIFO empty status Polarity" "Low,High" textline " " bitfld.byte 0x00 1. " VPPOL[1] ,8-bit bypass FIFO full status Polarity" "Low,High" bitfld.byte 0x00 0. " VPPOL[0] ,8-bit bypass FIFO empty status Polarity" "Low,High" endif group.byte 0x01000++0x00 line.byte 0x00 "HDMI_FC_INVIDCONF,Frame Composer Input Video Configuration and HDCP Keepout Register" bitfld.byte 0x00 6. " VSYNC_IN_POLARITY ,Vsync input polarity" "Active low,Active high" bitfld.byte 0x00 5. " HSYNC_IN_POLARITY ,Hsync input polarity" "Active low,Active high" textline " " bitfld.byte 0x00 4. " DE_IN_POLARITY ,de_in_polarity" "Active low,Active high" bitfld.byte 0x00 3. " DVI_MODE ,DVI / HDMI mode select" "DVI,HDMI" textline " " bitfld.byte 0x00 1. " R_V_BLANK_IN_OSC ,Used for CEA861-D modes with fractional Vblan" "Active low,Active high" bitfld.byte 0x00 0. " IN_I_P ,Input video mode" "Progressive,Interlaced" group.byte 0x01001++0x29 line.byte 0x00 "HDMI_FC_INHACTIV0,Frame Composer Input Video HActive Pixels Register 0" line.byte 0x01 "HDMI_FC_INHACTIV1,Frame Composer Input Video HActive Pixels Register 1" bitfld.byte 0x01 0.--4. " H_IN_ACTIV[12:8] ,Input video Horizontal active pixel region width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "HDMI_FC_INHBLANK0,Frame Composer Input Video HBlank Pixels Register 0" line.byte 0x03 "HDMI_FC_INHBLANK1,Frame Composer Input Video HBlank Pixels Register 1" bitfld.byte 0x03 0.--4. " H_IN_BLANK[12:8] ,Input video Horizontal blanking pixel region width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x04 "HDMI_FC_INVACTIV0,Frame Composer Input Video VActive Pixels Register 0" line.byte 0x05 "HDMI_FC_INVACTIV1,Frame Composer Input Video VActive Pixels Register 1" bitfld.byte 0x05 0.--4. " V_IN_ACTIV[12:8] ,Input video Vertical active pixel region width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x06 "HDMI_FC_INVBLANK,Frame Composer Input Video VBlank Pixels Register" line.byte 0x07 "HDMI_FC_HSYNCINDELAY0,Frame Composer Input Video HSync Front Porch Register 0" line.byte 0x08 "HDMI_FC_HSYNCINDELAY1,Frame Composer Input Video HSync Front Porch Register 1" bitfld.byte 0x08 0.--4. " H_IN_DELAY[12:8] ,Input video Hsync active edge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x09 "HDMI_FC_HSYNCINWIDTH0,Frame Composer Input Video HSync Width Register 0" line.byte 0x0A "HDMI_FC_HSYNCINWIDTH1,Frame Composer Input Video HSync Width Register 1" bitfld.byte 0x0A 0.--1. " H_IN_WIDTH[9:8] ,Input video Hsync active pulse width" "0,1,2,3" line.byte 0x0B "HDMI_FC_VSYNCINDELAY,Frame Composer Input Video VSync Front Porch Register" line.byte 0x0C "HDMI_FC_VSYNCINWIDTH,Frame Composer Input Video VSync Width Register" bitfld.byte 0x0C 0.--5. " V_IN_WIDTH[5:0] ,Input video Vsync active pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.byte 0x0D "HDMI_FC_INFREQ0,Frame Composer Input Video Refresh Rate Register 0" line.byte 0x0E "HDMI_FC_INFREQ1,Frame Composer Input Video Refresh Rate Register 1" line.byte 0x0F "HDMI_FC_INFREQ2,Frame Composer Input Video Refresh Rate Register 2" bitfld.byte 0x0F 0.--3. " INFREQ[19:16] ,Video refresh rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x10 "HDMI_FC_CTRLDUR,Frame Composer Control Period Duration Register" line.byte 0x11 "HDMI_FC_EXCTRLDUR,Frame Composer Extended Control Period Duration Register" line.byte 0x12 "HDMI_FC_EXCTRLSPAC,Frame Composer Extended Control Period Maximum Spacing Register" line.byte 0x13 "HDMI_FC_CH0PREAM,Frame Composer Channel 0 Non-Preamble Data Register" line.byte 0x14 "HDMI_FC_CH1PREAM,Frame Composer Channel 1 Non-Preamble Data Register" bitfld.byte 0x14 0.--5. " CH1_PREAMBLE_FILTER ,Configures 6-bits that are going to fill the channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.byte 0x15 "HDMI_FC_CH2PREAM,Frame Composer Channel 2 Non-Preamble Data Register" bitfld.byte 0x15 0.--5. " CH2_PREAMBLE_FILTER ,Configures 6-bits that are going to fill the channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.byte 0x16 "HDMI_FC_AVICONF3,Frame Composer AVI Configuration Register 3" bitfld.byte 0x16 2.--3. " YQ1/YQ0/YCC ,Quantization range according to CEA specification" "0,1,2,3" bitfld.byte 0x16 1. " CN1 ,IT content type according to CEA specification" "Low,High" textline " " bitfld.byte 0x16 0. " CN0 ,IT content type according to CEA specification" "Low,High" line.byte 0x17 "HDMI_FC_GCP,Frame Composer GCP Packet Configuration Register" bitfld.byte 0x17 2. " DEFAULT_PHASE ,Value of DEFAULT_PHASE in the GCP packet" "Low,High" bitfld.byte 0x17 1. " SET_AVMUTE ,Value of SET_AVMUTE in the GCP packet" "Low,High" textline " " bitfld.byte 0x17 0. " CLEAR_AVMUTE ,Value of CLEAR_AVAMUTE in the GCP packet" "Low,High" line.byte 0x18 "HDMI_FC_AVICONF0,Frame Composer AVI Packet Configuration Register 0" bitfld.byte 0x18 7. " FC_AVICONF0_MISC ,Frame composer AVI packet configuration bit" "0,1" bitfld.byte 0x18 6. " FC_AVICONF0_ACTIVE_FORMAT ,Active format present" "0,1" textline " " bitfld.byte 0x18 4.--5. " FC_AVICONF0_SCAN ,Scan information" "0,1,2,3" bitfld.byte 0x18 2.--3. " FC_AVICONF0_BAR ,Bar information" "0,1,2,3" textline " " bitfld.byte 0x18 0.--1. " FC_AVICONF0_RGB_YCC ,RGB/YCC indication" "0,1,2,3" line.byte 0x19 "HDMI_FC_AVICONF1,Frame Composer AVI Packet Configuration Register 1" bitfld.byte 0x19 6.--7. " FC_AVICONF1_COLOR ,Colorimetry" "0,1,2,3" bitfld.byte 0x19 4.--5. " FC_AVICONF1_PICTURE_AR ,Picture aspect ratio" "0,1,2,3" textline " " bitfld.byte 0x19 0.--3. " FC_AVICONF1_ACTIVE_AR ,Active aspect ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x1A "HDMI_FC_AVICONF2,Frame Composer AVI Packet Configuration Register 2" bitfld.byte 0x1A 7. " FC_AVICONF2_IT ,IT content" "Low,High" bitfld.byte 0x1A 4.--6. " FC_AVICONF2_EXT_COLOR ,Extended colorimetry" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x1A 0.--1. " FC_AVICONF2_SCALE ,Non-uniform picture scaling" "0,1,2,3" line.byte 0x1B "HDMI_FC_AVIVID,Frame Composer AVI Packet VIC Register" line.byte 0x1C "HDMI_FC_AVIETB0,Frame Composer AVI Packet End of Top Bar Register 0" line.byte 0x1D "HDMI_FC_AVIETB1,Frame Composer AVI Packet End of Top Bar Register 1" line.byte 0x1E "HDMI_FC_AVISBB0,Frame Composer AVI Packet Start of Bottom Bar Register 0" line.byte 0x1F "HDMI_FC_AVISBB1,Frame Composer AVI Packet Start of Bottom Bar Register 1" line.byte 0x20 "HDMI_FC_AVIELB0,Frame Composer AVI Packet End of Left Bar Register 0" line.byte 0x21 "HDMI_FC_AVIELB1,Frame Composer AVI Packet End of Left Bar Register 1" line.byte 0x22 "HDMI_FC_AVISRB0,Frame Composer AVI Packet Start of Right Bar Register 0" line.byte 0x23 "HDMI_FC_AVISRB1,Frame Composer AVI Packet Start of Right Bar Register 1" line.byte 0x24 "HDMI_FC_AUDICONF0,Frame Composer AUD Packet Configuration Register 0" bitfld.byte 0x24 4.--6. " CC[2:0] ,Channel count" "0,1,2,3,4,5,6,7" bitfld.byte 0x24 0.--3. " CT[3:0] ,Coding Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x25 "HDMI_FC_AUDICONF1,Frame Composer AUD Packet Configuration Register 1" bitfld.byte 0x25 4.--5. " SS[1:0] ,Sampling size" "0,1,2,3" bitfld.byte 0x25 0.--2. " SF[2:0] ,Sampling frequency" "0,1,2,3,4,5,6,7" line.byte 0x26 "HDMI_FC_AUDICONF2,Frame Composer AUD Packet Configuration Register 2" line.byte 0x27 "HDMI_FC_AUDICONF3,Frame Composer AUD Packet Configuration Register 3" bitfld.byte 0x27 5.--6. " LFEPBL[1:0] ,LFE playback information" "0,1,2,3" bitfld.byte 0x27 4. " DM_INH ,Down mix enable" "Disabled,Enabled" textline " " bitfld.byte 0x27 0.--3. " LSV[3:0] ,Level shift value (for down mixing)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x28 "HDMI_FC_VSDIEEEID0,Frame Composer VSI Packet Data IEEE Register 0" line.byte 0x29 "HDMI_FC_VSDSIZE,Frame Composer VSI Packet Data Size Register" bitfld.byte 0x29 0.--4. " VSDSIZE ,Packet size as described in HDMI Vendor Specific InfoFrame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x01030++0x1A line.byte 0x00 "HDMI_FC_VSDIEEEID1,Frame Composer VSI Packet Data IEEE Register 1" line.byte 0x01 "HDMI_FC_VSDIEEEID2,Frame Composer VSI Packet Data IEEE Register 2" line.byte 0x2 "HDMI_FC_VSDPAYLOAD0,Frame Composer VSI Packet Data IEEE Register 0" line.byte 0x3 "HDMI_FC_VSDPAYLOAD1,Frame Composer VSI Packet Data IEEE Register 1" line.byte 0x4 "HDMI_FC_VSDPAYLOAD2,Frame Composer VSI Packet Data IEEE Register 2" line.byte 0x5 "HDMI_FC_VSDPAYLOAD3,Frame Composer VSI Packet Data IEEE Register 3" line.byte 0x6 "HDMI_FC_VSDPAYLOAD4,Frame Composer VSI Packet Data IEEE Register 4" line.byte 0x7 "HDMI_FC_VSDPAYLOAD5,Frame Composer VSI Packet Data IEEE Register 5" line.byte 0x8 "HDMI_FC_VSDPAYLOAD6,Frame Composer VSI Packet Data IEEE Register 6" line.byte 0x9 "HDMI_FC_VSDPAYLOAD7,Frame Composer VSI Packet Data IEEE Register 7" line.byte 0xA "HDMI_FC_VSDPAYLOAD8,Frame Composer VSI Packet Data IEEE Register 8" line.byte 0xB "HDMI_FC_VSDPAYLOAD9,Frame Composer VSI Packet Data IEEE Register 9" line.byte 0xC "HDMI_FC_VSDPAYLOAD10,Frame Composer VSI Packet Data IEEE Register 10" line.byte 0xD "HDMI_FC_VSDPAYLOAD11,Frame Composer VSI Packet Data IEEE Register 11" line.byte 0xE "HDMI_FC_VSDPAYLOAD12,Frame Composer VSI Packet Data IEEE Register 12" line.byte 0xF "HDMI_FC_VSDPAYLOAD13,Frame Composer VSI Packet Data IEEE Register 13" line.byte 0x10 "HDMI_FC_VSDPAYLOAD14,Frame Composer VSI Packet Data IEEE Register 14" line.byte 0x11 "HDMI_FC_VSDPAYLOAD15,Frame Composer VSI Packet Data IEEE Register 15" line.byte 0x12 "HDMI_FC_VSDPAYLOAD16,Frame Composer VSI Packet Data IEEE Register 16" line.byte 0x13 "HDMI_FC_VSDPAYLOAD17,Frame Composer VSI Packet Data IEEE Register 17" line.byte 0x14 "HDMI_FC_VSDPAYLOAD18,Frame Composer VSI Packet Data IEEE Register 18" line.byte 0x15 "HDMI_FC_VSDPAYLOAD19,Frame Composer VSI Packet Data IEEE Register 19" line.byte 0x16 "HDMI_FC_VSDPAYLOAD20,Frame Composer VSI Packet Data IEEE Register 20" line.byte 0x17 "HDMI_FC_VSDPAYLOAD21,Frame Composer VSI Packet Data IEEE Register 21" line.byte 0x18 "HDMI_FC_VSDPAYLOAD22,Frame Composer VSI Packet Data IEEE Register 22" line.byte 0x19 "HDMI_FC_VSDPAYLOAD23,Frame Composer VSI Packet Data IEEE Register 23" line.byte 0x1A "HDMI_FC_SPDVENDORNAME0,Frame Composer SPD Packet Data Vendor Name Register 0" group.byte 0x01052++0x00 line.byte 0x00 "HDMI_FC_SPDPRODUCTNAME0,Frame Composer SPD Packet Data Product Name Register 0" group.byte 0x01062++0x02 line.byte 0x00 "HDMI_FC_SPDDEVICEINF,Frame Composer SPD Packet Data Source Product Descriptor Register" line.byte 0x01 "HDMI_FC_AUDSCONF,Frame Composer Audio Sample Flat and Layout Configuration Register" bitfld.byte 0x01 4.--7. " AUD_PACKET_SMAPFIT[3:0] ,Set the audio packet sample flat value to be sent on the packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x01 0. " AUD_PACKET_LAYOUT ,Set the audio packet layout to be sent in the packet" "Layout 0,Layout 1" rgroup.byte 0x1064++0x00 line.byte 0x00 "HDMI_FC_AUDSSTAT,Frame Composer Audio Packet Sample Present Status Register" bitfld.byte 0x00 0.--3. " PACKET_SAMPPRS[3:0] ,Shows the data sample present indication of the last Audio sample packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x01073++0x02 line.byte 0x00 "HDMI_FC_CTRLQHIGH,Frame Composer Number of High Priority Packets Attended Configuration Register" bitfld.byte 0x00 0.--4. " ONHIGHATTENDED[4:0] ,Configures the number of high priority packets or audio sample packets" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "HDMI_FC_CTRLQLOW,Frame Composer Number of Low Priority Packets Attended Configuration Register" bitfld.byte 0x01 0.--4. " ONLOWATTENDED[4:0] ,Configures the number of low priority packets or audio sample packets" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "HDMI_FC_ACP0,Frame Composer ACP Packet Type Configuration Register 0" group.byte 0x01091++0x02 line.byte 0x00 "HDMI_FC_ACP1,Frame Composer ACP Packet Type Configuration Register 1" line.byte 0x01 "HDMI_FC_ISCR1_0,FC_ISCR1_Frame Composer Packet Status, Valid, andContinue Configuration Register" bitfld.byte 0x01 2.--4. " ISRC_STATUS[2:0] ,Status of ISRC1" "0,1,2,3,4,5,6,7" bitfld.byte 0x01 1. " ISRC_VALID ,Valid of ISRC1" "Not valid,Valid" textline " " bitfld.byte 0x01 0. " ISRC_CONT ,Indication of ISRC2" "Low,High" line.byte 0x02 "HDMI_FC_ISCR1_1,Frame Composer ISCR1 Packet Body Register 1" group.byte 0x010A3++0x00 line.byte 0x00 "HDMI_FC_ISCR2_0,Frame Composer ISCR2 Packet Body Register 0" group.byte 0x010B3++0x02 line.byte 0x00 "HDMI_FC_DATAUTO0,Frame Composer Data Island Auto Packet Scheduling Register 0" bitfld.byte 0x00 4. " SPD_AUTO ,Enables SPD automatic packet scheduling" "Disabled,Enabled" bitfld.byte 0x00 3. " VSD_AUTO ,Enables VSD automatic packet scheduling" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " ISCR2_AUTO ,Enables ISRC2 automatic packet scheduling" "Disabled,Enabled" bitfld.byte 0x00 1. " ISRC1_AUTO ,Enables ISRC1 automatic packet scheduling" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " ACP_AUTO ,Enables ACP automatic packet scheduling" "Disabled,Enabled" line.byte 0x01 "HDMI_FC_DATAUTO1,Frame Composer Data Island Auto Packet Scheduling Register 1" bitfld.byte 0x01 0.--3. " AUTOFRAMEINTERPOLATION ,Packet frame interpolation, for automatic packet scheduling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x02 "HDMI_FC_DATAUTO2,Frame Composer Data Island Auto Packet Scheduling Register 2" bitfld.byte 0x02 4.--7. " AUTOFRAMEPACKETS ,Packets per frame, for automatic packet scheduling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x02 0.--3. " AUTOLINESPACING ,Packets line spacing, for automatic packet scheduling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.byte 0x10B6++0x00 line.byte 0x00 "HDMI_FC_DATMAN,Frame Composer Data Island Manual Packet Request Register" bitfld.byte 0x00 5. " NULL_TX ,Null packet" "Not requested,Requested" bitfld.byte 0x00 4. " SPD_TX ,SPD packet" "Not requested,Requested" textline " " bitfld.byte 0x00 3. " VSD_TX ,VSD packet" "Not requested,Requested" bitfld.byte 0x00 2. " ISCR2_TX ,ISRC2 packet" "Not requested,Requested" textline " " bitfld.byte 0x00 1. " ISR1_TX ,ISRC1 packet" "Not requested,Requested" bitfld.byte 0x00 0. " ACP_TX ,ACP packet" "Not requested,Requested" group.byte 0x10B7++0x09 line.byte 0x00 "HDMI_FC_DATAUTO3,Frame Composer Data Island Auto Packet Scheduling Register 3" bitfld.byte 0x00 3. " AVI_AUTO ,Enable AVI packet insertion" "Disabled,Enabled" bitfld.byte 0x00 2. " GCP_AUTO ,Enable GCP packet insertion" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " AUDI_AUTO ,Enable AUDI packet insertion" "Disabled,Enabled" bitfld.byte 0x00 0. " ACR_AUTO ,Enable ACR packet insertion" "Disabled,Enabled" line.byte 0x01 "HDMI_FC_RDRB0,Frame Composer Round Robin ACR Packet Insertion Register 0" bitfld.byte 0x01 0.--3. " ACRFRAMEINTERPOLATION ,ACR frame interpolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x02 "HDMI_FC_RDRB1,Frame Composer Round Robin ACR Packet Insertion Register 1" bitfld.byte 0x02 4.--7. " ACRPACKETSINFRAME ,ACR packets in frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x02 0.--3. " ACRPACKETLINESPACING ,ACR packet line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x03 "HDMI_FC_RDRB2,Frame Composer Round Robin ACR Packet Insertion Register 2" bitfld.byte 0x03 0.--3. " AUDIFRAMEINTERPOLATION ,Audio frame interpolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x04 "HDMI_FC_RDRB3,Frame Composer Round Robin ACR Packet Insertion Register 3" bitfld.byte 0x04 4.--7. " AUDIPACKETSINFRAME ,Audio packets in frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x04 0.--3. " AUDIPACKETLINESPACING ,Audio packet line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x05 "HDMI_FC_RDRB4,Frame Composer Round Robin ACR Packet Insertion Register 4" bitfld.byte 0x05 0.--3. " GPCFRAMEINTERPOLATION ,GCP packets line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x06 "HDMI_FC_RDRB5,Frame Composer Round Robin ACR Packet Insertion Register 5" bitfld.byte 0x06 4.--7. " GPCPACKETSINFRAME ,GCP packets per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x06 0.--3. " GPCPACKETLINESPACING ,GCP packet line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x07 "HDMI_FC_RDRB6,Frame Composer Round Robin ACR Packet Insertion Register 6" bitfld.byte 0x07 0.--3. " AVIFRAMEINTERPOLATION ,GCP packets line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x08 "HDMI_FC_RDRB7,Frame Composer Round Robin ACR Packet Insertion Register 7" bitfld.byte 0x08 4.--7. " AVIPACKETSINFRAME ,AVI packets per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x08 0.--3. " AVIPACKETLINESPACING ,AVI packet line spacing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") rgroup.byte 0x010D0++0x00 line.byte 0x00 "HDMI_FC_STAT0,Frame Composer Packet Status Register 0" bitfld.byte 0x00 7. " AUDI ,Audio InfoFrame packet status bit" "Not occurred,Occurred" bitfld.byte 0x00 6. " ACP ,Audio Content Protection packet status bit" "Not occurred,Occurred" textline " " bitfld.byte 0x00 5. " HBR ,Audio HBR packet status bit" "Not occurred,Occurred" bitfld.byte 0x00 2. " AUDS ,Audio Sample packet status bit" "Not occurred,Occurred" textline " " bitfld.byte 0x00 1. " ACR ,Audio Clock Regeneration packet status bit" "Not occurred,Occurred" bitfld.byte 0x00 0. " NULL ,Null packet status bit" "Not occurred,Occurred" group.byte 0x010D1++0x00 line.byte 0x00 "HDMI_FC_INT0,Frame Composer Packet Interrupt Register 0" bitfld.byte 0x00 7. " AUDI ,Audio InfoFrame packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 6. " ACP ,Audio Content Protection packet interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 5. " HBR ,Audio HBR packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 2. " AUDS ,Audio Sample packet interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " ACR ,Audio Clock Regeneration packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " NULL ,Null packet interrupt" "No interrupt,Interrupt" endif group.byte 0x10D2++0x00 line.byte 0x00 "HDMI_FC_MASK0,Frame Composer Packet Interrupt Mask Register 0" bitfld.byte 0x00 7. " AUDI ,Mask bit for FC_INT0.AUDI interrupt bit" "Masked,Not masked" bitfld.byte 0x00 6. " ACP ,Mask bit for FC_INT0.ACP interrupt bit" "Masked,Not masked" textline " " bitfld.byte 0x00 5. " HBR ,Mask bit for FC_INT0.HBR interrupt bit" "Masked,Not masked" bitfld.byte 0x00 2. " AUDS ,Mask bit for FC_INT0.AUDS interrupt bit" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " ACR ,Mask bit for FC_INT0.ACR interrupt bit" "Masked,Not masked" bitfld.byte 0x00 0. " NULL ,Mask bit for FC_INT0.NULL interrupt bit" "Masked,Not masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.byte 0x10D3++0x02 line.byte 0x00 "HDMI_FC_POL0,Frame Composer Packet Interrupt Polarity Register 0" bitfld.byte 0x00 7. " AUDI ,Polarity bit for FC_INT0.AUDI interrupt bit" "Low,High" bitfld.byte 0x00 6. " ACP ,Polarity bit for FC_INT0.ACP interrupt bit" "Low,High" textline " " bitfld.byte 0x00 5. " HBR ,Polarity bit for FC_INT0.HBR interrupt bit" "Low,High" bitfld.byte 0x00 2. " AUDS ,Polarity bit for FC_INT0.AUDS interrupt bit" "Low,High" textline " " bitfld.byte 0x00 1. " ACR ,Polarity bit for FC_INT0.ACR interrupt bit" "Low,High" bitfld.byte 0x00 0. " NULL ,Polarity bit for FC_INT0.NULL interrupt bit" "Low,High" line.byte 0x01 "HDMI_FC_STAT1,Frame Composer Packet Status Register 1" bitfld.byte 0x01 7. " GMD ,Gamut metadata packet status bit" "Not occurred,Occurred" bitfld.byte 0x01 6. " ISCR1 ,International Standard Recording Code 1 packet status bit" "Not occurred,Occurred" textline " " bitfld.byte 0x01 5. " ISCR2 ,International Standard Recording Code 2 packet status bit" "Not occurred,Occurred" bitfld.byte 0x01 4. " VSD ,Vendor Specific Data infoFrame packet status bit" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " SPD ,Source Product Descriptor infoFrame packet status bit" "Not occurred,Occurred" bitfld.byte 0x01 1. " AVI ,AVI infoFrame packet status bit" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " GCP ,General Control Packet status bit" "Not occurred,Occurred" line.byte 0x02 "HDMI_FC_INT1,Frame Composer Packet Interrupt Register 1" bitfld.byte 0x02 7. " GMD ,Gamut metadata packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x02 6. " ISCR1 ,International Standard Recording Code 1 packet interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 5. " ISCR2 ,International Standard Recording Code 2 packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x02 4. " VSD ,Vendor Specific Data infoFrame packet interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 3. " SPD ,Source Product Descriptor infoFrame packet interrupt" "No interrupt,Interrupt" bitfld.byte 0x02 1. " AVI ,AVI infoFrame packet interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 0. " GCP ,General Control Packet interrupt" "No interrupt,Interrupt" endif group.byte 0x10D6++0x00 line.byte 0x00 "HDMI_FC_MASK1,Frame Composer Packet Interrupt Mask Register 1" bitfld.byte 0x00 7. " GMD ,Mask bit for FC_INT1.GMD interrupt bit" "Masked,Not masked" bitfld.byte 0x00 6. " ISCR1 ,Mask bit for FC_INT1.ISRC1 interrupt bit" "Masked,Not masked" textline " " bitfld.byte 0x00 5. " ISCR2 ,Mask bit for FC_INT1.ISRC2 interrupt bit" "Masked,Not masked" bitfld.byte 0x00 4. " VSD ,Mask bit for FC_INT1.VSD interrupt bit" "Masked,Not masked" textline " " bitfld.byte 0x00 3. " SPD ,Mask bit for FC_INT1.SPD interrupt bit" "Masked,Not masked" bitfld.byte 0x00 1. " AVI ,Mask bit for FC_INT1.AVI interrupt bit" "Masked,Not masked" textline " " bitfld.byte 0x00 0. " GCP ,Mask bit for FC_INT1.GCP interrupt bit" "Masked,Not masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.byte 0x10D7++0x02 line.byte 0x00 "HDMI_FC_POL1,Frame Composer Packet Interrupt Polarity Register 1" bitfld.byte 0x00 7. " GMD ,Polarity bit for FC_INT1.GMD interrupt bit" "Low,High" bitfld.byte 0x00 6. " ISCR1 ,Polarity bit for FC_INT1.ISRC1 interrupt bit" "Low,High" textline " " bitfld.byte 0x00 5. " ISCR2 ,Polarity bit for FC_INT1.ISRC2 interrupt bit" "Low,High" bitfld.byte 0x00 4. " VSD ,Polarity bit for FC_INT1.VSD interrupt bit" "Low,High" textline " " bitfld.byte 0x00 3. " SPD ,Polarity bit for FC_INT1.SPD interrupt bit" "Low,High" bitfld.byte 0x00 1. " AVI ,Polarity bit for FC_INT1.AVI interrupt bit" "Low,High" textline " " bitfld.byte 0x00 0. " GCP ,Polarity bit for FC_INT1.GCP interrupt bit" "Low,High" line.byte 0x01 "HDMI_FC_STAT2,Frame Composer Packet Status Register 2" bitfld.byte 0x01 1. " LOWPRIORITY_OVERFLOW ,Frame Composer low priority packet queue descriptor overflow indication" "Not occurred,Occurred" bitfld.byte 0x01 0. " HIGHPRIORITY_OVERFLOW ,Frame Composer high priority packet queue descriptor overflow indication" "Not occurred,Occurred" line.byte 0x02 "HDMI_FC_INT2,Frame Composer Packet Interrupt Register 2" bitfld.byte 0x02 1. " LOWPRIORITY_OVERFLOW ,Interrupt indication bit" "No interrupt,Interrupt" bitfld.byte 0x02 0. " HIGHPRIORITY_OVERFLOW ,Interrupt indication bit" "No interrupt,Interrupt" group.byte 0x10DA++0x00 line.byte 0x00 "HDMI_FC_MASK2,Frame Composer Packet Interrupt Mask Register 2" bitfld.byte 0x00 1. " LOWPRIORITY_OVERFLOW ,Mask bit for FC_INT1.LOWPRIORITY_OVERFLOW interrupt bit" "Masked,Not masked" bitfld.byte 0x00 0. " HIGHPRIORITY_OVERFLOW ,Mask bit for FC_INT1.HIGHPRIORITY_OVERFLOW interrupt bit" "Masked,Not masked" group.byte 0x10DB++0x00 line.byte 0x00 "HDMI_FC_POL2,Frame Composer Packet Interrupt Polarity Register 2" bitfld.byte 0x00 1. " LOWPRIORITY_OVERFLOW ,Polarity bit for FC_INT1.LOWPRIORITY_OVERFLOW interrupt bit" "Low,High" bitfld.byte 0x00 0. " HIGHPRIORITY_OVERFLOW ,Polarity bit for FC_INT1.HIGHPRIORITY_OVERFLOW interrupt bit" "Low,High" endif group.byte 0x010E0++0x00 line.byte 0x00 "HDMI_FC_PRCONF,Frame Composer Pixel Repetition Configuration Register" bitfld.byte 0x00 4.--7. " INCOMING_PR_FACTOR[3:0] ,Configures the input video pixel repetition" "No action,1,2,3,4,5,6,7,8,9,10,?..." bitfld.byte 0x00 0.--3. " OUTPUT_PR_FACTOR[3:0] ,Configures the video pixel repetition ratio to be sent on the AVI infoFrame" "No action,2,3,4,5,6,7,8,9,10,?..." rgroup.byte 0x01100++0x00 line.byte 0x00 "HDMI_FC_GMD_STAT,Frame Composer GMD Packet Status Register" bitfld.byte 0x00 7. " IGNDNO_CRNT_GBD ,Gamut scheduling: No current gamut data" "Not occurred,Occurred" bitfld.byte 0x00 6. " IGMDDNEXT_FIELD ,Gamut scheduling: Gamut Next field" "Not occurred,Occurred" textline " " bitfld.byte 0x00 4.--5. " IGMDPACKET_SEQ[1:0] ,Gamut scheduling: Gamut packet sequence" "0,1,2,3" bitfld.byte 0x00 0.--3. " IGMDCURRENT_GAMUT_SEQ_NUM[3:0] ,Gamut scheduling: Current Gamut packet sequence number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x01101++0x00 line.byte 0x00 "HDMI_FC_GMD_EN,Frame Composer GMD Packet Enable Register" bitfld.byte 0x00 0. " GMDENABLETX ,Gamut Metadata packet transmission enable" "Disabled,Enabled" wgroup.byte 0x01102++0x00 line.byte 0x00 "HDMI_FC_GMD_UP,Frame Composer GMD Packet Update Register" bitfld.byte 0x00 0. " GMDUPDATEPACKET ,Gamut Metadata packet update" "No effect,Update" group.byte 0x01103++0x1D line.byte 0x00 "HDMI_FC_GMD_CONF,Frame Composer GMD Packet Schedule Configuration Register" bitfld.byte 0x00 4.--7. " GMDPACKETSINFRAME[3:0] ,Number of GMD packets per frame or video field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " GMDPACKETSLINESPACING[3:0] ,Number of line spacing between the transmitted GMD packets" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "HDMI_FC_GMD_HB,Frame Composer GMD Packet Profile and Gamut Sequence Configuration Register" bitfld.byte 0x01 4.--6. " GMDGBD ,GMD profile bits" "0,1,2,3,4,5,6,7" bitfld.byte 0x01 0.--3. " GMDAFFECTED_GAMUT_SEQ_NUM ,Affected gamut sequence number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x2 "HDMI_FC_GMD_PB0,Frame Composer GMD Packet Body Register 0" line.byte 0x3 "HDMI_FC_GMD_PB1,Frame Composer GMD Packet Body Register 1" line.byte 0x4 "HDMI_FC_GMD_PB2,Frame Composer GMD Packet Body Register 2" line.byte 0x5 "HDMI_FC_GMD_PB3,Frame Composer GMD Packet Body Register 3" line.byte 0x6 "HDMI_FC_GMD_PB4,Frame Composer GMD Packet Body Register 4" line.byte 0x7 "HDMI_FC_GMD_PB5,Frame Composer GMD Packet Body Register 5" line.byte 0x8 "HDMI_FC_GMD_PB6,Frame Composer GMD Packet Body Register 6" line.byte 0x9 "HDMI_FC_GMD_PB7,Frame Composer GMD Packet Body Register 7" line.byte 0xA "HDMI_FC_GMD_PB8,Frame Composer GMD Packet Body Register 8" line.byte 0xB "HDMI_FC_GMD_PB9,Frame Composer GMD Packet Body Register 9" line.byte 0xC "HDMI_FC_GMD_PB10,Frame Composer GMD Packet Body Register 10" line.byte 0xD "HDMI_FC_GMD_PB11,Frame Composer GMD Packet Body Register 11" line.byte 0xE "HDMI_FC_GMD_PB12,Frame Composer GMD Packet Body Register 12" line.byte 0xF "HDMI_FC_GMD_PB13,Frame Composer GMD Packet Body Register 13" line.byte 0x10 "HDMI_FC_GMD_PB14,Frame Composer GMD Packet Body Register 14" line.byte 0x11 "HDMI_FC_GMD_PB15,Frame Composer GMD Packet Body Register 15" line.byte 0x12 "HDMI_FC_GMD_PB16,Frame Composer GMD Packet Body Register 16" line.byte 0x13 "HDMI_FC_GMD_PB17,Frame Composer GMD Packet Body Register 17" line.byte 0x14 "HDMI_FC_GMD_PB18,Frame Composer GMD Packet Body Register 18" line.byte 0x15 "HDMI_FC_GMD_PB19,Frame Composer GMD Packet Body Register 19" line.byte 0x16 "HDMI_FC_GMD_PB20,Frame Composer GMD Packet Body Register 20" line.byte 0x17 "HDMI_FC_GMD_PB21,Frame Composer GMD Packet Body Register 21" line.byte 0x18 "HDMI_FC_GMD_PB22,Frame Composer GMD Packet Body Register 22" line.byte 0x19 "HDMI_FC_GMD_PB23,Frame Composer GMD Packet Body Register 23" line.byte 0x1A "HDMI_FC_GMD_PB24,Frame Composer GMD Packet Body Register 24" line.byte 0x1B "HDMI_FC_GMD_PB25,Frame Composer GMD Packet Body Register 25" line.byte 0x1C "HDMI_FC_GMD_PB26,Frame Composer GMD Packet Body Register 26" line.byte 0x1D "HDMI_FC_GMD_PB27,Frame Composer GMD Packet Body Register 27" group.byte 0x01200++0x1B line.byte 0x00 "HDMI_FC_DBGFORCE,Frame Composer Video/Audio Force Enable Register" bitfld.byte 0x00 4. " FORCEAUDIO ,Force fixed audio output with FC_DBGAUDxCHx registers contain" "No effect,Forced" bitfld.byte 0x00 0. " FORCEVIDEO ,Force fixed video output with FC_DBGTMDSx registers contain." "No effect,Forced" line.byte 0x1 "HDMI_FC_DBGAUD0CH0,Frame Composer Audio Channel 0 Register 0" line.byte 0x2 "HDMI_FC_DBGAUD1CH0,Frame Composer Audio Channel 0 Register 1" line.byte 0x3 "HDMI_FC_DBGAUD2CH0,Frame Composer Audio Channel 0 Register 2" line.byte 0x4 "HDMI_FC_DBGAUD0CH1,Frame Composer Audio Channel 1 Register 0" line.byte 0x5 "HDMI_FC_DBGAUD1CH1,Frame Composer Audio Channel 1 Register 1" line.byte 0x6 "HDMI_FC_DBGAUD2CH1,Frame Composer Audio Channel 1 Register 2" line.byte 0x7 "HDMI_FC_DBGAUD0CH2,Frame Composer Audio Channel 2 Register 0" line.byte 0x8 "HDMI_FC_DBGAUD1CH2,Frame Composer Audio Channel 2 Register 1" line.byte 0x9 "HDMI_FC_DBGAUD2CH2,Frame Composer Audio Channel 2 Register 2" line.byte 0xA "HDMI_FC_DBGAUD0CH3,Frame Composer Audio Channel 3 Register 0" line.byte 0xB "HDMI_FC_DBGAUD1CH3,Frame Composer Audio Channel 3 Register 1" line.byte 0xC "HDMI_FC_DBGAUD2CH3,Frame Composer Audio Channel 3 Register 2" line.byte 0xD "HDMI_FC_DBGAUD0CH4,Frame Composer Audio Channel 4 Register 0" line.byte 0xE "HDMI_FC_DBGAUD1CH4,Frame Composer Audio Channel 4 Register 1" line.byte 0xF "HDMI_FC_DBGAUD2CH4,Frame Composer Audio Channel 4 Register 2" line.byte 0x10 "HDMI_FC_DBGAUD0CH5,Frame Composer Audio Channel 5 Register 0" line.byte 0x11 "HDMI_FC_DBGAUD1CH5,Frame Composer Audio Channel 5 Register 1" line.byte 0x12 "HDMI_FC_DBGAUD2CH5,Frame Composer Audio Channel 5 Register 2" line.byte 0x13 "HDMI_FC_DBGAUD0CH6,Frame Composer Audio Channel 6 Register 0" line.byte 0x14 "HDMI_FC_DBGAUD1CH6,Frame Composer Audio Channel 6 Register 1" line.byte 0x15 "HDMI_FC_DBGAUD2CH6,Frame Composer Audio Channel 6 Register 2" line.byte 0x16 "HDMI_FC_DBGAUD0CH7,Frame Composer Audio Channel 7 Register 0" line.byte 0x17 "HDMI_FC_DBGAUD1CH7,Frame Composer Audio Channel 7 Register 1" line.byte 0x18 "HDMI_FC_DBGAUD2CH7,Frame Composer Audio Channel 7 Register 2" line.byte 0x19 "HDMI_FC_DBGTMDS0,Frame Composer TMDS Channel 0 Register" line.byte 0x1A "HDMI_FC_DBGTMDS1,Frame Composer TMDS Channel 1 Register" line.byte 0x1B "HDMI_FC_DBGTMDS2,Frame Composer TMDS Channel 2 Register" group.byte 0x03000++0x02 line.byte 0x00 "HDMI_PHY_CONF0,PHY Configuration Register" bitfld.byte 0x00 7. " PDZ ,Power-down enable" "Disabled,Enabled" bitfld.byte 0x00 6. " ENTMDS ,Enable TMDS drivers, bias, and TMDS digital logic" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " GEN2_PDDQ ,Source PHY control" "No effect,PDDQ" bitfld.byte 0x00 3. " GEN2_TXPWRON ,Source PHY control" "No effect,TXPWRON" textline " " bitfld.byte 0x00 2. " GEN2_ENHPDRXSENSE ,Source PHY control" "No effect,ENHPDRXSENSE" bitfld.byte 0x00 1. " SELDATAENPOL ,Select data enable polarity" "Low,High" textline " " bitfld.byte 0x00 0. " SELDIPIF ,Interface control" "Low,High" line.byte 0x01 "HDMI_PHY_TST0,PHY Test Interface Register 0" bitfld.byte 0x01 5. " TESTCLR ,Enable TMDS drivers, bias and tmds digital logic" "Disabled,Enabled" bitfld.byte 0x01 0. " TESTCLK ,Test clock signal" "Low,High" line.byte 0x02 "HDMI_PHY_TST1,PHY Test Interface Register 1" rgroup.byte 0x03003++0x02 line.byte 0x00 "HDMI_PHY_TST2,PHY Test Interface Register 2" line.byte 0x01 "HDMI_PHY_STAT0,PHY RXSENSE, PLL lock, and HPD Status Register" bitfld.byte 0x01 7. " RX_SENSE[3] ,TX PHY RX_SENSE indication for TMDS CLK driver" "Not occurred,Occurred" bitfld.byte 0x01 6. " RX_SENSE[2] ,TX PHY RX_SENSE indication for TMDS channel 2 driver" "Not occurred,Occurred" textline " " bitfld.byte 0x01 5. " RX_SENSE[1] ,TX PHY RX_SENSE indication for TMDS channel 1 driver" "Not occurred,Occurred" bitfld.byte 0x01 4. " RX_SENSE[0] ,TX PHY RX_SENSE indication for TMDS channel 0 driver" "Not occurred,Occurred" textline " " bitfld.byte 0x01 1. " HPD ,HDMI Hot Plug Detect indication" "Not occurred,Occurred" bitfld.byte 0x01 0. " TX_PHY_LOCK ,TX PHY PLL lock indication" "Not occurred,Occurred" line.byte 0x02 "HDMI_PHY_INT0,PHY RXSENSE, PLL lock, and HPD Interrupt Register" bitfld.byte 0x02 7. " RX_SENSE[3] ,TX PHY RX_SENSE indication interrupt for TMDS CLK driver" "No interrupt,Interrupt" bitfld.byte 0x02 6. " RX_SENSE[2] ,TX PHY RX_SENSE indication interrupt for TMDS channel 2 driver" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 5. " RX_SENSE[1] ,TX PHY RX_SENSE indication interrupt for TMDS channel 1 driver" "No interrupt,Interrupt" bitfld.byte 0x02 4. " RX_SENSE[0] ,TX PHY RX_SENSE indication interrupt for TMDS channel 0 driver" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 1. " HPD ,HDMI Hot Plug Detect indication interrupt" "No interrupt,Interrupt" bitfld.byte 0x02 0. " TX_PHY_LOCK ,TX PHY PLL lock indication interrupt" "No interrupt,Interrupt" group.byte 0x03006++0x01 line.byte 0x00 "HDMI_PHY_MASK0,PHY RXSENSE, PLL lock, and HPD Mask Register" bitfld.byte 0x00 7. " RX_SENSE[3] ,TMDS CLK driver mask" "Masked,Not masked" bitfld.byte 0x00 6. " RX_SENSE[2] ,TMDS channel 2 driver mask" "Masked,Not masked" textline " " bitfld.byte 0x00 5. " RX_SENSE[1] ,TMDS channel 1 driver mask" "Masked,Not masked" bitfld.byte 0x00 4. " RX_SENSE[0] ,TMDS channel 0 driver mask" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " HPD ,HDMI Hot Plug Detect indication interrupt mask" "Masked,Not masked" bitfld.byte 0x00 0. " TX_PHY_LOCK ,TX PHY PLL lock indication interrupt mask" "Masked,Not masked" line.byte 0x01 "HDMI_PHY_POL0,PHY RXSENSE, PLL lock and HPD Polarity Register" bitfld.byte 0x01 7. " RX_SENSE[3] ,TMDS CLK driver polarity" "Low,High" bitfld.byte 0x01 6. " RX_SENSE[2] ,TMDS channel 2 driver polarity" "Low,High" textline " " bitfld.byte 0x01 5. " RX_SENSE[1] ,TMDS channel 1 driver polarity" "Low,High" bitfld.byte 0x01 4. " RX_SENSE[0] ,TMDS channel 0 driver" "Low,High" textline " " bitfld.byte 0x01 1. " HPD ,HDMI Hot Plug Detect indication interrupt polarity" "Low,High" bitfld.byte 0x01 0. " TX_PHY_LOCK ,TX PHY PLL lock indication interrupt polarity" "Low,High" group.byte 0x03020++0x03 line.byte 0x00 "HDMI_PHY_I2CM_SLAVE_ADDR,PHY I2C Slave Address Configuration Register" hexmask.byte 0x00 0.--6. 1. " ADDRESS ,Slave address to be sent during read and write operations" line.byte 0x01 "HDMI_PHY_I2CM_ADDRESS_ADDR,PHY I2C Address Configuration Register" line.byte 0x2 "HDMI_PHY_I2CM_DATAO_1_ADDR,PHY I2C Data Write Register 1" line.byte 0x3 "HDMI_PHY_I2CM_DATAO_0_ADDR,PHY I2C Data Write Register 0" rgroup.byte 0x03024++0x01 line.byte 0x0 "HDMI_PHY_I2CM_DATAI_1_ADDR,PHY I2C Data Read Register 1" line.byte 0x1 "HDMI_PHY_I2CM_DATAI_0_ADDR,PHY I2C Data Read Register 0" wgroup.byte 0x03026++0x00 line.byte 0x00 "HDMI_PHY_I2CM_OPERATION_ADDR,PHY I2C Read/Write Operation" bitfld.byte 0x00 4. " WRITE ,Write operation request" "Not request,Request" bitfld.byte 0x00 0. " READ ,Read operation request" "Not request,Request" group.byte 0x03027++0x0B line.byte 0x00 "HDMI_PHY_I2CM_INT_ADDR,PHY I2C Done Interrupt Register" bitfld.byte 0x00 3. " DONE_POL ,Done interrupt polarity configuration" "Low,High" bitfld.byte 0x00 2. " DONE_MASK ,Done interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " DONE_INTERRUPT ,Operation done interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x00 0. " DONE_STATUS ,Operation done status bit" "Not completed,Completed" line.byte 0x01 "HDMI_PHY_I2CM_CTLINT_ADDR,PHY I2C Done Interrupt Register" bitfld.byte 0x01 7. " NACK_POL ,Not acknowledge error interrupt mask signal" "Low,High" bitfld.byte 0x01 6. " NACK_MASK ,Not acknowledge error interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x01 5. " NACK_INTERRUPT ,Not acknowledge error interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x01 4. " NASK_STATUS ,Error on I2C not acknowledge" "No error,Error" textline " " bitfld.byte 0x01 3. " ARBITRATION_POL ,Arbitration error interrupt polarity configuration" "Low,High" bitfld.byte 0x01 2. " ARBITRATION_MASK ,Arbitration error interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x01 1. " ARBITRATION_INTERRUPT ,Arbitration error interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x01 0. " ARBITRATION_STATUS ,Error on master I2C protocol arbitration" "No error,Error" line.byte 0x02 "HDMI_PHY_I2CM_DIV_ADDR,PHY I2C Speed Control Register" bitfld.byte 0x02 0.--3. " FAST_MODE ,Sets the I2C Master to work in Fast Mode or Standard Mode" "Standard,Standard,Standard,Standard,Standard,Standard,Standard,Standard,Fast,Fast,Fast,Fast,Fast,Fast,Fast,Fast" line.byte 0x03 "HDMI_PHY_I2CM_SOFTRSTZ_ADDR,PHY I2C Software Reset Register" bitfld.byte 0x03 0. " I2C_SOFTRST ,I2C Master PHY Software Reset" "Reset,No effect" line.byte 0x4 "HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR,PHY I2C Slow Speed SCL High Level Control Register 1" line.byte 0x5 "HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR,PHY I2C Slow Speed SCL High Level Control Register 0" line.byte 0x6 "HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR,PHY I2C Slow Speed SCL Low Level Control Register 1" line.byte 0x7 "HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR,PHY I2C Slow Speed SCL Low Level Control Register 0" line.byte 0x8 "HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR,PHY I2C Fast Speed SCL High Level Control Register 1" line.byte 0x9 "HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR,PHY I2C Fast Speed SCL High Level Control Register 0" line.byte 0xA "HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR,PHY I2C Fast Speed SCL Low Level Control Register 1" line.byte 0xB "HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR,PHY I2C Fast Speed SCL Low Level Control Register 0" group.byte 0x03200++0x05 line.byte 0x0 "HDMI_AUD_N1,Audio Clock Regenerator N Value Register 1" line.byte 0x1 "HDMI_AUD_N2,Audio Clock Regenerator N Value Register 2" line.byte 0x02 "HDMI_AUD_N3,Audio Clock Regenerator N Value Register 3" bitfld.byte 0x02 0.--3. " AUDN[19:16] ,HDMI Audio Clock Regenerator N value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x3 "HDMI_AUD_CTS1,AUD_CTS1" line.byte 0x4 "HDMI_AUD_CTS2,AUD_CTS2" line.byte 0x05 "HDMI_AUD_CTS3,AUD_CTS3" bitfld.byte 0x05 0.--3. " AUDCTS[19:16] ,HDMI Audio Clock Regenerator CTS calculated value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x00120000+0x03600)&0x01)==0x01)) group.byte 0x03600++0x0B line.byte 0x00 "HDMI_AHB_DMA_CONF0,Audio DMA Start Register" bitfld.byte 0x00 7. " SW_FIFO_RST ,This is the software reset bit for the audio and FIFOs clear" "No effect,Reset" bitfld.byte 0x00 4. " HBR ,HBR packets enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " ENABLE_HLOCK ,Enable request of locked burst AHB mechanism" "Disabled,Enabled" bitfld.byte 0x00 1.--2. " INCR_TYPE[1:0] ,Forced size burst mode" "INCR4,INCR8,INCR16,INCR16" textline " " bitfld.byte 0x00 0. " BURST_MODE ,Burst mode" "INCR AHB,INCR_TYPE[1:0]" else group.byte 0x03600++0x0B line.byte 0x00 "HDMI_AHB_DMA_CONF0,Audio DMA Start Register" bitfld.byte 0x00 7. " SW_FIFO_RST ,This is the software reset bit for the audio and FIFOs clear" "No effect,Reset" bitfld.byte 0x00 4. " HBR ,HBR packets enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " ENABLE_HLOCK ,Enable request of locked burst AHB mechanism" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " BURST_MODE ,Burst mode" "INCR AHB,INCR_TYPE[1:0]" endif group.byte 0x03601++0x02 line.byte 0x00 "HDMI_AHB_DMA_START,Audio DMA Start Register" bitfld.byte 0x00 0. " DATA_BUFFER_READY ,Data buffer ready" "Not ready,Ready" line.byte 0x01 "HDMI_AHB_DMA_STOP,Audio DMA Stop Register" bitfld.byte 0x01 0. " STOP_DMA_TRANSACTION ,Stop DMA transaction" "No effect,Stopped" line.byte 0x02 "HDMI_AHB_DMA_THRSLD,Audio DMA FIFO Threshold Register" group.byte 0x3604++0x00 line.byte 0x00 "HDMI_AHB_DMA_STRADDR0,Audio DMA Start Address Register 0" group.byte 0x3605++0x00 line.byte 0x00 "HDMI_AHB_DMA_STRADDR1,Audio DMA Start Address Register 1" group.byte 0x3606++0x00 line.byte 0x00 "HDMI_AHB_DMA_STRADDR2,Audio DMA Start Address Register 2" group.byte 0x3607++0x00 line.byte 0x00 "HDMI_AHB_DMA_STRADDR3,Audio DMA Start Address Register 3" group.byte 0x3608++0x00 line.byte 0x00 "HDMI_AHB_DMA_STPADDR0,Audio DMA Stop Address Register 0" group.byte 0x3609++0x00 line.byte 0x00 "HDMI_AHB_DMA_STPADDR1,Audio DMA Stop Address Register 1" group.byte 0x360A++0x00 line.byte 0x00 "HDMI_AHB_DMA_STPADDR2,Audio DMA Stop Address Register 2" group.byte 0x360B++0x00 line.byte 0x00 "HDMI_AHB_DMA_STPADDR3,Audio DMA Stop Address Register 3" rgroup.byte 0x360C++0x00 line.byte 0x00 "HDMI_AHB_DMA_BSTADDR0,Audio DMA Burst Start Address Register 0" rgroup.byte 0x360D++0x00 line.byte 0x00 "HDMI_AHB_DMA_BSTADDR1,Audio DMA Burst Start Address Register 1" rgroup.byte 0x360E++0x00 line.byte 0x00 "HDMI_AHB_DMA_BSTADDR2,Audio DMA Burst Start Address Register 2" rgroup.byte 0x360F++0x00 line.byte 0x00 "HDMI_AHB_DMA_BSTADDR3,Audio DMA Burst Start Address Register 3" rgroup.byte 0x3610++0x03 line.byte 0x00 "HDMI_AHB_DMA_MBLENGTH0,Audio DMA Burst Length Register 0" line.byte 0x01 "HDMI_AHB_DMA_MBLENGTH1,Audio DMA Burst Length Register 1" bitfld.byte 0x01 0.--2. " MBURSTLENGTH[10:8] ,Requested burst length" "0,1,2,3,4,5,6,7" line.byte 0x02 "HDMI_AHB_DMA_STAT,Audio DMA Interrupt Status Register" bitfld.byte 0x02 7. " STATDONE ,Status of DMA end of operation interrupt" "Not occurred,Occurred" bitfld.byte 0x02 6. " STATRETRYSPLIT ,Status of retry/split interrupt" "Not occurred,Occurred" textline " " bitfld.byte 0x02 5. " STATLOSTPWNERSHIP ,Status of master lost ownership when in burst transfer" "Not occurred,Occurred" bitfld.byte 0x02 4. " STATERROR ,Status of error interrupt" "Not occurred,Occurred" textline " " bitfld.byte 0x02 2. " STATTHRFIFOEMPTY ,Status of audio FIFO empty when audio FIFO has less than four samples" "Not occurred,Occurred" bitfld.byte 0x02 1. " STATFIFOFULL ,Status of audio FIFO full interrupt" "Not occurred,Occurred" textline " " bitfld.byte 0x02 0. " STATFIFOEMPTY ,Status of audio FIFO empty interrupt" "Not occurred,Occurred" line.byte 0x03 "HDMI_AHB_DMA_INT,Audio DMA Interrupt Register" bitfld.byte 0x03 7. " INTDONE ,DMA end of operation interrupt" "No interrupt,Interrupt" bitfld.byte 0x03 6. " INTRETRYSPLIT ,Retry/split interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x03 5. " INTLOSTPWNERSHIP ,Master lost ownership interrupt when in burst transfer" "No interrupt,Interrupt" bitfld.byte 0x03 4. " INTERROR ,Error interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x03 2. " INTTHRFIFOEMPTY ,Audio FIFO empty interrupt when audio FIFO has less than four samples" "No interrupt,Interrupt" bitfld.byte 0x03 1. " INTFIFOFULL ,Audio FIFO full interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x03 0. " INTFIFOEMPTY ,Audio FIFO empty interrupt" "No interrupt,Interrupt" group.byte 0x03614++0x02 line.byte 0x00 "HDMI_AHB_DMA_MASK,Audio DMA Mask Interrupt Register" bitfld.byte 0x00 7. " DONE_MASK ,DMA end of operation interrupt mask" "Masked,Not masked" bitfld.byte 0x00 6. " RETRYSPLIT_MASK ,Retry/split interrupt mask" "Masked,Not masked" textline " " bitfld.byte 0x00 5. " LOSTOWNERSHIP_MASK ,Master lost ownership interrupt mask when in burst transfer" "Masked,Not masked" bitfld.byte 0x00 4. " ERROR_MASK ,Error interrupt mask" "Masked,Not masked" textline " " bitfld.byte 0x00 2. " FIFO_THREMPTY_MASK ,Audio FIFO empty interrupt mask when audio FIFO has less than four samples" "Masked,Not masked" bitfld.byte 0x00 1. " FIFO_FULL_MASK ,Audio FIFO full interrupt mask" "Masked,Not masked" textline " " bitfld.byte 0x00 0. " FIFO_EMPTY_MASK ,Audio FIFO empty interrupt mask" "Masked,Not masked" line.byte 0x01 "HDMI_AHB_DMA_POL,Audio DMA Polarity Interrupt Register" bitfld.byte 0x01 7. " DONE_POLARITY ,DMA end of operation interrupt polarity" "Low,High" bitfld.byte 0x01 6. " RETRYSPLIT_POLARITY ,Retry/split interrupt polarity" "Low,High" textline " " bitfld.byte 0x01 5. " LOSTOWNERSHIP_POLARITY ,Master lost ownership interrupt polarity when in burst transfer" "Low,High" bitfld.byte 0x01 4. " ERROR_POLARITY ,Error interrupt polarity" "Low,High" textline " " bitfld.byte 0x01 2. " FIFO_THREMPTY_POLARITY ,Audio FIFO empty interrupt polarity when audio FIFO has less than four samples" "Low,High" bitfld.byte 0x01 1. " FIFO_FULL_POLARITY ,Audio FIFO full interrupt polarity" "Low,High" textline " " bitfld.byte 0x01 0. " FIFO_EMPTY_POLARITY ,Audio FIFO empty interrupt polarity" "Low,High" line.byte 0x02 "HDMI_AHB_DMA_CONF1,Audio DMA Channel Enable Configuration Register 1" bitfld.byte 0x02 7. " CH_IN_EN[7] ,Channel 7 enable bit" "Disabled,Enabled" bitfld.byte 0x02 6. " CH_IN_EN[6] ,Channel 6 enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x02 5. " CH_IN_EN[5] ,Channel 5 enable bit" "Disabled,Enabled" bitfld.byte 0x02 4. " CH_IN_EN[4] ,Channel 4 enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " CH_IN_EN[3] ,Channel 3 enable bit" "Disabled,Enabled" bitfld.byte 0x02 2. " CH_IN_EN[2] ,Channel 2 enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " CH_IN_EN[1] ,Channel 1 enable bit" "Disabled,Enabled" bitfld.byte 0x02 0. " CH_IN_EN[0] ,Channel 0 enable bit" "Disabled,Enabled" rgroup.byte 0x03617++0x01 line.byte 0x00 "HDMI_AHB_DMA_BUFFSTAT,Audio DMA Buffer Interrupt Status Register" bitfld.byte 0x00 1. " BUFF_FULL ,Buffer full flag status" "Not occurred,Occurred" bitfld.byte 0x00 0. " BUFF_EMPTY ,Buffer empty flag status" "Not occurred,Occurred" line.byte 0x01 "HDMI_AHB_DMA_BUFFINT,Audio DMA Buffer Interrupt Register" bitfld.byte 0x01 1. " INT_BUFF_FULL ,Buffer full flag interrupt" "No interrupt,Interrupt" bitfld.byte 0x01 0. " INT_BUF_EMPTY ,Buffer empty flag interrupt" "No interrupt,Interrupt" group.byte 0x03619++0x01 line.byte 0x00 "HDMI_AHB_DMA_BUFFMASK,Audio DMA Buffer Mask Interrupt Register" bitfld.byte 0x00 1. " INT_BUFF_FULL ,Buffer full flag mask" "Masked,Not masked" bitfld.byte 0x00 0. " INT_BUF_EMPTY ,Buffer empty flag mask" "Masked,Not masked" line.byte 0x01 "HDMI_AHB_DMA_BUFFPOL,Audio DMA Buffer Polarity Interrupt Register" bitfld.byte 0x01 1. " INT_BUFF_FULL ,Buffer full flag polarity" "Low,High" bitfld.byte 0x01 0. " INT_BUF_EMPTY ,Buffer empty flag polarity" "Low,High" group.byte 0x04001++0x01 line.byte 0x00 "HDMI_MC_CLKDIS,Main Controller Synchronous Clock Domain Disable Register" bitfld.byte 0x00 5. " CECCLK_DISABLE ,CEC Engine clock synchronous disable signal" "No,Yes" bitfld.byte 0x00 4. " CSCCLK_DISABLE ,Color Space Converter clock synchronous disable signal" "No,Yes" textline " " bitfld.byte 0x00 3. " AUDCLK_DISABLE ,Audio Sampler clock synchronous disable signal" "No,Yes" bitfld.byte 0x00 2. " PREPCLK_DISABLE ,Pixel Repetition clock synchronous disable signal" "No,Yes" textline " " bitfld.byte 0x00 1. " TMDSCLK_DISABLE ,TMDS clock synchronous disable signal" "No,Yes" bitfld.byte 0x00 0. " PIXELCLK_DISABLE ,Pixel clock synchronous disable signal" "No,Yes" line.byte 0x01 "HDMI_MC_SWRSTZREQ,Main Controller Software Reset Register" bitfld.byte 0x01 6. " CECSWRST_REQ ,CEC software reset request" "Reset,No effect" bitfld.byte 0x01 2. " PREPSWRST_REQ ,Pixel Repetition clock synchronous disable signal" "Reset,No effect" textline " " bitfld.byte 0x01 1. " TMDSSWRST_REQ ,TMDS software reset request" "Reset,No effect" bitfld.byte 0x01 0. " PIXELSWRST_REQ ,Pixel software reset request" "Reset,No effect" group.byte 0x04004++0x03 line.byte 0x00 "HDMI_MC_FLOWCTRL,Main Controller Feed Through Control Register" bitfld.byte 0x00 0. " FEED_THROUGH_OFF ,Video path Feed Through enable bit" "Disabled,Enabled" line.byte 0x01 "HDMI_MC_PHYRSTZ,Main Controller PHY Reset Register" bitfld.byte 0x01 0. " PHYRSTZ ,HDMI Source PHY active low reset control" "No effect,Reset" line.byte 0x02 "HDMI_MC_LOCKONCLOCK,Main Controller Clock Present Register" eventfld.byte 0x02 6. " PCLK ,Pixel clock status" "Low,High" eventfld.byte 0x02 5. " TCLKTCLK ,TMDS clock status" "Low,High" textline " " eventfld.byte 0x02 4. " PREPCLK ,Pixel repetition clock status" "Low,High" eventfld.byte 0x02 0. " CECCLK ,CEC clock status" "Low,High" line.byte 0x03 "HDMI_MC_HEACPHY_RST,Main Controller HEAC PHY Reset Register" bitfld.byte 0x03 0. " HEACPHYRST ,HEAC PHY reset" "No effect,Reset" group.byte 0x04100++0x19 line.byte 0x00 "HDMI_CSC_CFG,Color Space Converter Interpolation and Decimation Configuration Register" bitfld.byte 0x00 4.--5. " INTMODE[1:0] ,Chroma interpolation configuration" "Disabled,1,2,Disabled" bitfld.byte 0x00 0.--1. " DECMODE[1:0] ,Chroma decimation configuration" "Disabled,1,2,3" line.byte 0x01 "HDMI_CSC_SCALE,Color Space Converter Scale and Deep Color Configuration Register" bitfld.byte 0x01 4.--7. " CSC_COLORDE_PTH[3:0] ,Color space converter color depth configuration per pixel/per component" "24/8,,,,24/8,30/10,36/12,48/16,?..." bitfld.byte 0x01 0.--1. " cscscale[1:0] ,Defines the cscscale[1:0] scale factor to apply to all coefficients in Color Space Conversion" "0,1,2,?..." line.byte 0x2 "HDMI_CSC_COEF_A1_MSB,Color Space Conversion A1 MSB coefficient" line.byte 0x3 "HDMI_CSC_COEF_A1_LSB,Color Space Conversion A1 LSB coefficient" line.byte 0x4 "HDMI_CSC_COEF_A2_MSB,Color Space Conversion A2 MSB coefficient" line.byte 0x5 "HDMI_CSC_COEF_A2_LSB,Color Space Conversion A2 LSB coefficient" line.byte 0x6 "HDMI_CSC_COEF_A3_MSB,Color Space Conversion A3 MSB coefficient" line.byte 0x7 "HDMI_CSC_COEF_A3_LSB,Color Space Conversion A3 LSB coefficient" line.byte 0x8 "HDMI_CSC_COEF_A4_MSB,Color Space Conversion A4 MSB coefficient" line.byte 0x9 "HDMI_CSC_COEF_A4_LSB,Color Space Conversion A4 LSB coefficient" line.byte 0xA "HDMI_CSC_COEF_B1_MSB,Color Space Conversion B1 MSB coefficient" line.byte 0xB "HDMI_CSC_COEF_B1_LSB,Color Space Conversion B1 LSB coefficient" line.byte 0xC "HDMI_CSC_COEF_B2_MSB,Color Space Conversion B2 MSB coefficient" line.byte 0xD "HDMI_CSC_COEF_B2_LSB,Color Space Conversion B2 LSB coefficient" line.byte 0xE "HDMI_CSC_COEF_B3_MSB,Color Space Conversion B3 MSB coefficient" line.byte 0xF "HDMI_CSC_COEF_B3_LSB,Color Space Conversion B3 LSB coefficient" line.byte 0x10 "HDMI_CSC_COEF_B4_MSB,Color Space Conversion B4 MSB coefficient" line.byte 0x11 "HDMI_CSC_COEF_B4_LSB,Color Space Conversion B4 LSB coefficient" line.byte 0x12 "HDMI_CSC_COEF_C1_MSB,Color Space Conversion C1 MSB coefficient" line.byte 0x13 "HDMI_CSC_COEF_C1_LSB,Color Space Conversion C1 LSB coefficient" line.byte 0x14 "HDMI_CSC_COEF_C2_MSB,Color Space Conversion C2 MSB coefficient" line.byte 0x15 "HDMI_CSC_COEF_C2_LSB,Color Space Conversion C2 LSB coefficient" line.byte 0x16 "HDMI_CSC_COEF_C3_MSB,Color Space Conversion C3 MSB coefficient" line.byte 0x17 "HDMI_CSC_COEF_C3_LSB,Color Space Conversion C3 LSB coefficient" line.byte 0x18 "HDMI_CSC_COEFC4_MSB,Color Space Conversion C4 MSB coefficient" line.byte 0x19 "HDMI_CSC_COEFC4_LSB,Color Space Conversion C4 LSB coefficient" group.byte 0x07D00++0x00 line.byte 0x00 "HDMI_CEC_CTRL,CEC Control Register" bitfld.byte 0x00 4. " STANDBY ,CEC controller responds" "All messages,All ping messages" bitfld.byte 0x00 3. " BC_NACK ,Received broadcast message" "Reset,Set" textline " " bitfld.byte 0x00 1.--2. " FRAME_TYP[1:0] ,Signal Free Time" "3-bit,5-bit,7-bit,?..." bitfld.byte 0x00 0. " SEND ,CEC transmission" "Reset,Set" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") rgroup.byte 0x07D01++0x00 line.byte 0x00 "HDMI_CEC_STAT,CEC Status Register" bitfld.byte 0x00 6. " WAKEUP ,Follower received wake-up command" "No wakeup,Wakeup" bitfld.byte 0x00 5. " ERROR_FOLL ,An error is notified by a follower" "No error,Error" textline " " bitfld.byte 0x00 4. " ERROR_INIT ,An error is detected on cec line" "No error,Error" bitfld.byte 0x00 3. " ARB_LOST ,The initiator losses the CEC line arbitration to a second initiator" "Not occurred,Occurred" textline " " bitfld.byte 0x00 2. " NACK ,A frame is not acknowledged in a directly addressed message" "Not acknowledged,Acknowledged" bitfld.byte 0x00 1. " EOM ,EOM is detected so that the received data is ready" "Not detected,Detected" textline " " bitfld.byte 0x00 0. " DONE ,The current transmission is successful" "No,Yes" endif group.byte 0x07D02++0x00 line.byte 0x00 "HDMI_CEC_MASK,CEC Mask Interrupt Register" bitfld.byte 0x00 6. " WAKEUP_MASK ,Follower wake-up signal mask" "Not masked,Masked" bitfld.byte 0x00 5. " ERROR_FOLL_MASK ,Abnormal logic data bit error mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " ERROR_INIT_MASK ,CEC line error mask" "Not masked,Masked" bitfld.byte 0x00 3. " ARB_LOST_MASK ,Initiator Arbitration lost signal mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " NACK_MASK ,Frame NACK signal mask" "Not masked,Masked" bitfld.byte 0x00 1. " EOM_MASK ,EOM detect signal mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " DONE_MASK ,Current transmission success mask" "Not masked,Masked" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.byte 0x07D03++0x00 line.byte 0x00 "HDMI_CEC_POLARITY,CEC Polarity Register" bitfld.byte 0x00 6. " WAKEUP_POL ,Follower wake-up signal polarity" "Low,High" bitfld.byte 0x00 5. " ERROR_FOLL_POL ,CEC line error polarity" "Low,High" textline " " bitfld.byte 0x00 4. " ERROR_INIT_POL ,CEC line error polarity" "Low,High" bitfld.byte 0x00 3. " ARB_LOST_POL ,Initiator Arbitration lost signal polarity" "Low,High" textline " " bitfld.byte 0x00 2. " NACK_POL ,Frame NACK signal polarity" "Low,High" bitfld.byte 0x00 1. " EOM_POL ,EOM detect signal polarity" "Low,High" textline " " bitfld.byte 0x00 0. " DONE_POL ,Current transmission success or not signal polarity" "Low,High" rgroup.byte 0x07D04++0x00 line.byte 0x00 "HDMI_CEC_INT,CEC Interrupt Register" bitfld.byte 0x00 6. " WAKEUP_INT ,Follower wakeup signal polarity" "No interrupt,Interrupt" bitfld.byte 0x00 5. " ERROR_FOLL_INT ,Follower wakeup interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 4. " ERROR_INIT_INT ,CEC line error interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 3. " ARB_LOST_INT ,CEC line error interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 2. " NACK_INT ,Initiator Arbitration lost interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 1. " EOM_INT ,Frame NACK interrupt" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 0. " DONE_INT ,EOM detect interrupt" "No interrupt,Interrupt" endif group.byte 0x07D05++0x02 line.byte 0x00 "HDMI_CEC_ADDR_L,Logical addresses allocated to CEC device" bitfld.byte 0x00 7. " CEC_ADDR_L[7] ,Logical address 7 Tuner 3" "Not allocated,Allocated" bitfld.byte 0x00 6. " CEC_ADDR_L[6] ,Logical address 6 Tuner 2" "Not allocated,Allocated" textline " " bitfld.byte 0x00 5. " CEC_ADDR_L[5] ,Logical address 5 - Audio System" "Not allocated,Allocated" bitfld.byte 0x00 4. " CEC_ADDR_L[4] ,Logical address 4 - Playback Device 1" "Not allocated,Allocated" textline " " bitfld.byte 0x00 3. " CEC_ADDR_L[3] ,Logical address 3 - Tuner 1" "Not allocated,Allocated" bitfld.byte 0x00 2. " CEC_ADDR_L[2] ,Logical address 2 - Recording Device 2" "Not allocated,Allocated" textline " " bitfld.byte 0x00 1. " CEC_ADDR_L[1] ,Logical address 1 - Recording Device 1" "Not allocated,Allocated" bitfld.byte 0x00 0. " CEC_ADDR_L[0] ,Logical address 0 - Device TV" "Not allocated,Allocated" line.byte 0x01 "HDMI_CEC_ADDR_H,CEC_ADDR_H" bitfld.byte 0x01 7. " CEC_ADDR_H[7] ,Logical address 15 - Unregistered" "Not allocated,Allocated" bitfld.byte 0x01 6. " CEC_ADDR_H[6] ,Logical address 14 - Free use" "Not allocated,Allocated" textline " " bitfld.byte 0x01 3. " CEC_ADDR_H[3] ,Logical address 11 - Playback Device 3" "Not allocated,Allocated" bitfld.byte 0x01 2. " CEC_ADDR_H[2] ,Logical address 10 - Tuner 4" "Not allocated,Allocated" textline " " bitfld.byte 0x01 1. " CEC_ADDR_H[1] ,Logical address 9 - Playback Device 3" "Not allocated,Allocated" bitfld.byte 0x01 0. " CEC_ADDR_H[0] ,Logical address 8 - Playback Device 2" "Not allocated,Allocated" line.byte 0x02 "HDMI_CEC_TX_CNT,CEC Transmitter Counter Register" bitfld.byte 0x02 0.--4. " CEC_TX_CNT[4:0] ,CEC Transmitter Counter register frame size" "No data,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." rgroup.byte 0x07D08++0x00 line.byte 0x00 "HDMI_CEC_RX_CNT,CEC_RX_CNT" bitfld.byte 0x00 0.--4. " CEC_RX_CNT[4:0] ,CEC Receiver Counter register" "No data,1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,?..." rgroup.byte 0x07D10++0xF line.byte 0x0 "HDMI_CEC_TX_DATA0,CEC_TX_DATA0" line.byte 0x1 "HDMI_CEC_TX_DATA1,CEC_TX_DATA1" line.byte 0x2 "HDMI_CEC_TX_DATA2,CEC_TX_DATA2" line.byte 0x3 "HDMI_CEC_TX_DATA3,CEC_TX_DATA3" line.byte 0x4 "HDMI_CEC_TX_DATA4,CEC_TX_DATA4" line.byte 0x5 "HDMI_CEC_TX_DATA5,CEC_TX_DATA5" line.byte 0x6 "HDMI_CEC_TX_DATA6,CEC_TX_DATA6" line.byte 0x7 "HDMI_CEC_TX_DATA7,CEC_TX_DATA7" line.byte 0x8 "HDMI_CEC_TX_DATA8,CEC_TX_DATA8" line.byte 0x9 "HDMI_CEC_TX_DATA9,CEC_TX_DATA9" line.byte 0xA "HDMI_CEC_TX_DATA10,CEC_TX_DATA10" line.byte 0xB "HDMI_CEC_TX_DATA11,CEC_TX_DATA11" line.byte 0xC "HDMI_CEC_TX_DATA12,CEC_TX_DATA12" line.byte 0xD "HDMI_CEC_TX_DATA13,CEC_TX_DATA13" line.byte 0xE "HDMI_CEC_TX_DATA14,CEC_TX_DATA14" line.byte 0xF "HDMI_CEC_TX_DATA15,CEC_TX_DATA15" rgroup.byte 0x07D20++0x0F line.byte 0x0 "HDMI_CEC_RX_DATA0,CEC_RX_DATA0" line.byte 0x1 "HDMI_CEC_RX_DATA1,CEC_RX_DATA1" line.byte 0x2 "HDMI_CEC_RX_DATA2,CEC_RX_DATA2" line.byte 0x3 "HDMI_CEC_RX_DATA3,CEC_RX_DATA3" line.byte 0x4 "HDMI_CEC_RX_DATA4,CEC_RX_DATA4" line.byte 0x5 "HDMI_CEC_RX_DATA5,CEC_RX_DATA5" line.byte 0x6 "HDMI_CEC_RX_DATA6,CEC_RX_DATA6" line.byte 0x7 "HDMI_CEC_RX_DATA7,CEC_RX_DATA7" line.byte 0x8 "HDMI_CEC_RX_DATA8,CEC_RX_DATA8" line.byte 0x9 "HDMI_CEC_RX_DATA9,CEC_RX_DATA9" line.byte 0xA "HDMI_CEC_RX_DATA10,CEC_RX_DATA10" line.byte 0xB "HDMI_CEC_RX_DATA11,CEC_RX_DATA11" line.byte 0xC "HDMI_CEC_RX_DATA12,CEC_RX_DATA12" line.byte 0xD "HDMI_CEC_RX_DATA13,CEC_RX_DATA13" line.byte 0xE "HDMI_CEC_RX_DATA14,CEC_RX_DATA14" line.byte 0xF "HDMI_CEC_RX_DATA15,CEC_RX_DATA15" group.byte 0x07D30++0x01 line.byte 0x00 "HDMI_CEC_LOCK,CEC_LOCK" bitfld.byte 0x00 0. " LOCKED_BUFFER ,Buffer locked" "Not locked,Locked" line.byte 0x01 "HDMI_CEC_WKUPCTRL,CEC Wakeup Control Register" bitfld.byte 0x01 7. " OPCODE0X86EN ,OPCODE 0x86 wake up enable" "Disabled,Enabled" bitfld.byte 0x01 6. " OPCODE0X82EN ,OPCODE 0x82 wake up enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 5. " OPCODE0X70EN ,OPCODE 0x70 wake up enable" "Disabled,Enabled" bitfld.byte 0x01 4. " OPCODE0X44EN ,OPCODE 0x44 wake up enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 3. " OPCODE0X42EN ,OPCODE 0x42 wake up enable" "Disabled,Enabled" bitfld.byte 0x01 2. " OPCODE0X41EN ,OPCODE 0x41 wake up enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " OPCODE0X0DEN ,OPCODE 0x0D wake up enable" "Disabled,Enabled" bitfld.byte 0x01 0. " OPCODE0X04EN ,OPCODE 0x04 wake up enable" "Disabled,Enabled" group.byte 0x07E00++0x02 line.byte 0x00 "HDMI_I2CM_SLAVE,I2C Master Slave Register" hexmask.byte 0x00 0.--6. 1. " SLAVEADDR[6:0] ,Slave address to be sent during read and write normal operations" line.byte 0x01 "HDMI_I2CM_ADDRESS,I2C Master Address Register" line.byte 0x02 "HDMI_I2CM_DATAO,I2C Master Data Register 0" rgroup.byte 0x07E03++0x00 line.byte 0x00 "HDMI_I2CM_DATA1,I2C Master Data Register 1" wgroup.byte 0x07E04++0x00 line.byte 0x00 "HDMI_I2CM_OPERATION,I2C Master Operation Register" bitfld.byte 0x00 4. " WR ,Write operation request" "Not request,Request" bitfld.byte 0x00 1. " RD_EXT ,Extended data read operation request" "Not request,Request" textline " " bitfld.byte 0x00 0. " RD ,Read operation request" "Not request,Request" group.byte 0x07E05++0x0D line.byte 0x00 "HDMI_I2CM_INT,I2C Master Interrupt Done Register" bitfld.byte 0x00 3. " DONE_POL ,Done interrupt polarity configuration" "Low,High" bitfld.byte 0x00 2. " DONE_MASK ,Done interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " DONE_INTERRUPT ,Operation done interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x00 0. " DONE_STATUS ,Operation done status bit" "Not completed,Completed" line.byte 0x01 "HDMI_I2CM_CTLINT,I2C Master Arbitration Error And Not Acknowledge Error Interrupt Register" bitfld.byte 0x01 7. " NACK_POL ,Not acknowledge error interrupt polarity configuration" "Low,High" bitfld.byte 0x01 6. " NACK_MASK ,Not acknowledge error interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x01 5. " NACK_INTERRUPT ,Not acknowledge error interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x01 4. " NACK_STATUS ,Not acknowledge error status bit" "Not completed,Completed" textline " " bitfld.byte 0x01 3. " ARBITRATION_POL ,Arbitration error interrupt polarity configuration" "Low,High" bitfld.byte 0x01 2. " ARBITRATION_MASK ,Arbitration error interrupt mask signal" "Masked,Not masked" textline " " bitfld.byte 0x01 1. " ARBITRATION_INTERRUPT ,Arbitration error interrupt bit" "No interrupt,Interrupt" bitfld.byte 0x01 0. " ARBITRATION_STATUS ,Arbitration error status bit" "Not completed,Completed" line.byte 0x02 "HDMI_I2CM_DIV,I2C Master Division Register" bitfld.byte 0x02 3. " FAST_STD_MODE ,Sets the I2C Master to work in Fast Mode or Standard Mode" "Standard,Fast" line.byte 0x03 "HDMI_I2CM_SEGADDR,I2C Master Segment Address Register" hexmask.byte 0x03 0.--6. 1. " SEGADDR ,E-DDC Extended read segment address" line.byte 0x04 "HDMI_I2CM_SOFTRSTZ,I2C Master Software Reset Register" bitfld.byte 0x04 0. " I2C_SOFTRST ,I2C Master Software Reset" "Reset,No effect" line.byte 0x05 "HDMI_I2CM_SEGPTR,I2C Master Segment Pointer Register" line.byte 0x6 "HDMI_I2CM_SS_SCL_HCNT_1_ADDR,I2C Master Slow Speed SCL High Level Control Register 1" line.byte 0x7 "HDMI_I2CM_SS_SCL_HCNT_0_ADDR,I2C Master Slow Speed SCL High Level Control Register 0" line.byte 0x8 "HDMI_I2CM_SS_SCL_LCNT_1_ADDR,I2C Master Slow Speed SCL Low Level Control Register 1" line.byte 0x9 "HDMI_I2CM_SS_SCL_LCNT_0_ADDR,I2C Master Slow Speed SCL Low Level Control Register 0" line.byte 0xA "HDMI_I2CM_FS_SCL_HCNT_1_ADDR,I2C Master Fast Speed SCL High Level Control Register 1" line.byte 0xB "HDMI_I2CM_FS_SCL_HCNT_0_ADDR,I2C Master Fast Speed SCL High Level Control Register 0" line.byte 0xC "HDMI_I2CM_FS_SCL_LCNT_1_ADDR,I2C Master Fast Speed SCL Low Level Control Register 1" line.byte 0xD "HDMI_I2CM_FS_SCL_LCNT_0_ADDR,I2C Master Fast Speed SCL Low Level Control Register 0" group.byte 0x07F00++0x00 line.byte 0x00 "HDMI_BASE_POINTER_ADDR,Base Pointer Address Register" bitfld.byte 0x00 7. " EN_BASE_POINTER_ADDR ,Enables the base pointer operation mode" "Disabled,Enabled" hexmask.byte 0x00 0.--6. 1. " BASE_POINTER_BASE_ADDR[6:0] ,Defines the base address for base pointer operation mode" width 0x0B tree.end endif tree.open "I2C (Inter IC)" tree "I2C1" base ad:0x021A0000 width 6. group.word 0x00++0x01 line.word 0x00 "IADR,I2C Address Register" hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address" group.word 0x04++0x01 line.word 0x00 "IFDR,I2C Frequency Divider Register" bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048" group.word 0x08++0x01 line.word 0x00 "I2CR,I2C Control Register" bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled" bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master" bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select bit" "Receive,Transmit" bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "ACK,NACK" bitfld.word 0x00 2. " RSTA ,Repeat Start" "No effect,Repeat" group.word 0x0C++0x01 line.word 0x00 "I2SR,I2C Status Register" rbitfld.word 0x00 7. " ICF ,Data transferring bit" "In progress,Completed" rbitfld.word 0x00 6. " IAAS ,I2C addressed as a slave bit" "Not addressed,Addressed" rbitfld.word 0x00 5. " IBB ,I2C bus busy bit" "Idle,Busy" bitfld.word 0x00 4. " IAL ,Arbitration lost" "Not lost,Lost" rbitfld.word 0x00 2. " SRW ,Slave read/write" "Read,Write" bitfld.word 0x00 1. " IIF ,I2C interrupt" "No interrupt,Interrupt" rbitfld.word 0x00 0. " RXAK ,Received acknowledge" "ACK,NACK" group.word 0x10++0x01 line.word 0x00 "I2DR,I2C Data I/O Register" hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data Byte" width 0x0B tree.end tree "I2C2" base ad:0x021A4000 width 6. group.word 0x00++0x01 line.word 0x00 "IADR,I2C Address Register" hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address" group.word 0x04++0x01 line.word 0x00 "IFDR,I2C Frequency Divider Register" bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048" group.word 0x08++0x01 line.word 0x00 "I2CR,I2C Control Register" bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled" bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master" bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select bit" "Receive,Transmit" bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "ACK,NACK" bitfld.word 0x00 2. " RSTA ,Repeat Start" "No effect,Repeat" group.word 0x0C++0x01 line.word 0x00 "I2SR,I2C Status Register" rbitfld.word 0x00 7. " ICF ,Data transferring bit" "In progress,Completed" rbitfld.word 0x00 6. " IAAS ,I2C addressed as a slave bit" "Not addressed,Addressed" rbitfld.word 0x00 5. " IBB ,I2C bus busy bit" "Idle,Busy" bitfld.word 0x00 4. " IAL ,Arbitration lost" "Not lost,Lost" rbitfld.word 0x00 2. " SRW ,Slave read/write" "Read,Write" bitfld.word 0x00 1. " IIF ,I2C interrupt" "No interrupt,Interrupt" rbitfld.word 0x00 0. " RXAK ,Received acknowledge" "ACK,NACK" group.word 0x10++0x01 line.word 0x00 "I2DR,I2C Data I/O Register" hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data Byte" width 0x0B tree.end tree "I2C3" base ad:0x021A8000 width 6. group.word 0x00++0x01 line.word 0x00 "IADR,I2C Address Register" hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address" group.word 0x04++0x01 line.word 0x00 "IFDR,I2C Frequency Divider Register" bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048" group.word 0x08++0x01 line.word 0x00 "I2CR,I2C Control Register" bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled" bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master" bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select bit" "Receive,Transmit" bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "ACK,NACK" bitfld.word 0x00 2. " RSTA ,Repeat Start" "No effect,Repeat" group.word 0x0C++0x01 line.word 0x00 "I2SR,I2C Status Register" rbitfld.word 0x00 7. " ICF ,Data transferring bit" "In progress,Completed" rbitfld.word 0x00 6. " IAAS ,I2C addressed as a slave bit" "Not addressed,Addressed" rbitfld.word 0x00 5. " IBB ,I2C bus busy bit" "Idle,Busy" bitfld.word 0x00 4. " IAL ,Arbitration lost" "Not lost,Lost" rbitfld.word 0x00 2. " SRW ,Slave read/write" "Read,Write" bitfld.word 0x00 1. " IIF ,I2C interrupt" "No interrupt,Interrupt" rbitfld.word 0x00 0. " RXAK ,Received acknowledge" "ACK,NACK" group.word 0x10++0x01 line.word 0x00 "I2DR,I2C Data I/O Register" hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data Byte" width 0x0B tree.end sif (cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6DUALLITE") tree "I2C4" base ad:0x021F8000 width 6. group.word 0x00++0x01 line.word 0x00 "IADR,I2C Address Register" hexmask.word.byte 0x00 1.--7. 0x2 " ADR ,Slave Address" group.word 0x04++0x01 line.word 0x00 "IFDR,I2C Frequency Divider Register" bitfld.word 0x00 0.--5. " IC ,I2C Clock Rate" "30,32,36,42,48,52,60,72,80,88,104,128,144,160,192,240,288,320,384,480,576,640,768,960,1152,1280,1536,1920,2304,2560,3072,3840,22,24,26,28,32,36,40,44,48,56,64,72,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048" group.word 0x08++0x01 line.word 0x00 "I2CR,I2C Control Register" bitfld.word 0x00 7. " IEN ,I2C Enable" "Disabled,Enabled" bitfld.word 0x00 6. " IIEN ,I2C Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 5. " MSTA ,Master/Slave Mode Select" "Slave,Master" bitfld.word 0x00 4. " MTX ,Transmit/Receive Mode Select bit" "Receive,Transmit" bitfld.word 0x00 3. " TXAK ,Transmit Acknowledge Enable" "ACK,NACK" bitfld.word 0x00 2. " RSTA ,Repeat Start" "No effect,Repeat" group.word 0x0C++0x01 line.word 0x00 "I2SR,I2C Status Register" rbitfld.word 0x00 7. " ICF ,Data transferring bit" "In progress,Completed" rbitfld.word 0x00 6. " IAAS ,I2C addressed as a slave bit" "Not addressed,Addressed" rbitfld.word 0x00 5. " IBB ,I2C bus busy bit" "Idle,Busy" bitfld.word 0x00 4. " IAL ,Arbitration lost" "Not lost,Lost" rbitfld.word 0x00 2. " SRW ,Slave read/write" "Read,Write" bitfld.word 0x00 1. " IIF ,I2C interrupt" "No interrupt,Interrupt" rbitfld.word 0x00 0. " RXAK ,Received acknowledge" "ACK,NACK" group.word 0x10++0x01 line.word 0x00 "I2DR,I2C Data I/O Register" hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data Byte" width 0x0B tree.end endif tree.end tree.open "IOMUXC (IOMUX Controller)" base ad:0x020E0000 sif (cpu()=="IMX6SOLOLITE") width 7. tree "General Purpose Registers" group.long 0x00++0x0F line.long 0x00 "GPR0,General Purpose Register 0" bitfld.long 0x00 7. " DMAREQ_MUX_SEL7 ,Sources for SDMA_EVENT[14]" "Spdif.drq0_spdif_b,Iomux.sdma_ext_events[1]" textline " " bitfld.long 0x00 6. " DMAREQ_MUX_SEL6 ,Sources for SDMA_EVENT[23]" "Esai.,I2c3.ipi_int_b" textline " " bitfld.long 0x00 5. " DMAREQ_MUX_SEL5 ,Sources for SDMA_EVENT[9]" "Ecspi4.ipd_req_cspi_rdma_b,Epit2.ipi_int_epit_oc" textline " " bitfld.long 0x00 4. " DMAREQ_MUX_SEL4 ,Sources for SDMA_EVENT[10]" "Ecspi4.ipd_req_cspi_tdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 3. " DMAREQ_MUX_SEL3 ,Sources for SDMA_EVENT[5]" "Ecspi2.ipd_req_cspi_rdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 2. " DMAREQ_MUX_SEL2 ,Sources for SDMA_EVENT[4]" "Ecspi1.ipd_req_cspi_tdma_b,I2c2.ipi_int_b" textline " " bitfld.long 0x00 1. " DMAREQ_MUX_SEL1 ,Sources for SDMA_EVENT[3]" "Ecspi1.ipd_req_cspi_rdma_b,I2c3.ipi_int_b" line.long 0x04 "GPR1,General Purpose Register 1" bitfld.long 0x04 22. " EXC_MON ,Exclusive monitor response select of illegal command" "OKEY,SLVError" bitfld.long 0x04 17.--18. " ENET_CLK_SEL_FROM_ANALOG_LOOPBACK ,Loopback path" "fec_ref_clk,pwm1,sd2_rst,i2c2_sda" bitfld.long 0x04 16. " ADD_DS ,Output driver strong" "~10% stronger,Normal" textline " " bitfld.long 0x04 15. " USB_EXP_MODE ,USB Exposure mode" "Disabled,Enabled" bitfld.long 0x04 14. " ENET_CLK_SEL ,Enet reference clk mode" "Pad,Internal clock" bitfld.long 0x04 12. " GINT ,Global interrupt 0 bit" "Not asserted,Asserted" textline " " bitfld.long 0x04 10.--11. " ADDRS3 ,Address Space 3" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 9. " ACT_CS3 ,Active Chip 3" "Not activated,Activated" bitfld.long 0x04 7.--8. " ADDRS2 ,Address Space 2" "32-MBytes,64-MBytes,128-MBytes,?..." textline " " bitfld.long 0x04 6. " ACT_CS2 ,Active Chip 2" "Not activated,Activated" bitfld.long 0x04 4.--5. " ADDRS1 ,Address Space 1" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 3. " ACT_CS1 ,Active Chip 1" "Not activated,Activated" textline " " bitfld.long 0x04 1.--2. " ADDRS0 ,Address Space 0" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 0. " ACT_CS0 ,Active Chip 0" "Not activated,Activated" line.long 0x08 "GPR2,General Purpose Register 2" bitfld.long 0x08 23. " L2_MEM_LIGHTSLEEP ,Bring memory to light sleep state" "Not set,Set" bitfld.long 0x08 22. " L2_MEM_DEEPSLEEP ,Control how memory enter Deep Sleep mode" "Not forced,Forced" bitfld.long 0x08 21. " L2_MEM_SHUTDOWN ,Bring memory to shutdown state" "Not set,Set" textline " " bitfld.long 0x08 20. " L2_MEM_EN_POWERSAVING ,Enable power saving features on L2 memory" "Disnabled,Enabled" bitfld.long 0x08 19. " DCP_MEM_LIGHTSLEEP ,Bring memory to light sleep state" "Not set,Set" bitfld.long 0x08 18. " DCP_MEM_DEEPSLEEP ,Control how memory enter Deep Sleep mode" "Not forced,Forced" textline " " bitfld.long 0x08 17. " DCP_MEM_SHUTDOWN ,Bring memory to shutdown state" "Not set,Set" bitfld.long 0x08 16. " DCP_MEM_EN_POWERSAVING ,Enable power saving features on DCP memory" "Disnabled,Enabled" bitfld.long 0x08 15. " LCDIF_MEM_LIGHTSLEEP ,Bring memory to light sleep state" "Not set,Set" textline " " bitfld.long 0x08 14. " LCDIF_MEM_DEEPSLEEP ,Control how memory enter Deep Sleep mode" "Not forced,Forced" bitfld.long 0x08 13. " LCDIF_MEM_SHUTDOWN ,Bring memory to shutdown state" "Not set,Set" bitfld.long 0x08 12. " LCDIF_MEM_EN_POWERSAVING ,Enable power saving features on LCDIF memory" "Disnabled,Enabled" textline " " bitfld.long 0x08 11. " PXP_MEM_LIGHTSLEEP ,Bring memory to light sleep state" "Not set,Set" bitfld.long 0x08 10. " PXP_MEM_DEEPSLEEP ,Control how memory enter Deep Sleep mode" "Not forced,Forced" bitfld.long 0x08 9. " PXP_MEM_SHUTDOWN ,Bring memory to shutdown state" "Not set,Set" textline " " bitfld.long 0x08 8. " PXP_MEM_EN_POWERSAVING ,Enable power saving features on PXP memory" "Disnabled,Enabled" bitfld.long 0x08 3. " EPDC_MEM_LIGHTSLEEP ,Bring memory to light sleep state" "Not set,Set" bitfld.long 0x08 2. " EPDC_MEM_DEEPSLEEP ,Control how memory enter Deep Sleep mode" "Not forced,Forced" textline " " bitfld.long 0x08 1. " EPDC_MEM_SHUTDOWN ,Bring memory to shutdown state" "Not set,Set" bitfld.long 0x08 0. " EPDC_MEM_EN_POWERSAVING ,Enable power saving features on epdc memory" "Disnabled,Enabled" line.long 0x0C "GPR3,General Purpose Register 3" bitfld.long 0x0C 26. " USDHCX_WR_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x0C 25. " USDHCX_RD_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI read transactions" "Disabled,Enabled" bitfld.long 0x0C 24. " OCRAM_CTL[24] ,Write address pipeline control bit" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " OCRAM_CTL[23] ,Write data pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 22. " OCRAM_CTL[22] ,Read address pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 21. " OCRAM_CTL[21] ,Read data wait state control bit" "Disabled,Enabled" textline " " rbitfld.long 0x0C 20. " OCRAM_STATUS[20] ,Read data pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 19. " OCRAM_STATUS[19] ,Read address pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 18. " OCRAM_STATUS[18] ,Write data pipeline status" "Configuration valid,Control bit changed" textline " " rbitfld.long 0x0C 17. " OCRAM_STATUS[17] ,Write address pipeline status" "Configuration valid,Control bit changed" bitfld.long 0x0C 13. " CORE_DBG_ACK_EN ,Core debug acknowledge enable to global debug acknowledge" "Not masked,Masked" bitfld.long 0x0C 11. " TZASC1_BOOT_LOCK ,TZASC-1 secure boot lock" "Not locked,Locked" textline " " rbitfld.long 0x0C 7. " OCRAM_L2_STATUS[7] ,Read data pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 6. " OCRAM_L2_STATUS[6] ,Read address pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 5. " OCRAM_L2_STATUS[5] ,Write data pipeline status" "Configuration valid,Control bit changed" textline " " rbitfld.long 0x0C 4. " OCRAM_L2_STATUS[4] ,Write address pipeline status" "Configuration valid,Control bit changed" bitfld.long 0x0C 3. " OCRAM_L2_CTL[3] ,Write address pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 2. " OCRAM_L2_CTL[2] ,Write data pipeline control bit" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " OCRAM_L2_CTL[1] ,Read address pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 0. " OCRAM_L2_CTL[0] ,Read data wait state control bit" "Disabled,Enabled" rgroup.long 0x10++0x07 line.long 0x00 "GPR4,General Purpose Register 4" bitfld.long 0x00 19. " SDMA_STOP_ACK ,SDMA stop acknowledge" "Not asserted,Asserted" bitfld.long 0x00 16. " RNGB_STOP_ACK ,RNGB stop acknowledge" "Not asserted,Asserted" line.long 0x04 "GPR5,General Purpose Register 5" bitfld.long 0x04 8. " L2_CLK_STOP ,L2 cache clock stop indication" "Not stopped,Stopped" bitfld.long 0x04 4. " ARM_WFE ,WFE state of the cores (Wait for Event) mode" "Not in WFE,WFE" bitfld.long 0x04 0. " ARM_WFI ,WFI state of the cores (Wait for Interrupt) mode" "Not in WFI,WFI" rgroup.long 0x24++0x03 line.long 0x00 "GPR9,General Purpose Register 9" bitfld.long 0x00 0. " TZASC1_BYP ,TZASC-1 BYPASS MUX control" "Not byppased/checked,Byppased/not checked" group.long 0x28++0x0F line.long 0x00 "GPR10,General Purpose Register 10" bitfld.long 0x00 31. " LOCK_OCRAM_TZ_ADDR[4] ,OCRAM_TZ_ADDR[4] field lock" "Not locked,Locked" bitfld.long 0x00 30. " LOCK_OCRAM_TZ_ADDR[3] ,OCRAM_TZ_ADDR[3] field lock" "Not locked,Locked" bitfld.long 0x00 29. " LOCK_OCRAM_TZ_ADDR[2] ,OCRAM_TZ_ADDR[2] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 28. " LOCK_OCRAM_TZ_ADDR[1] ,OCRAM_TZ_ADDR[1] field lock" "Not locked,Locked" bitfld.long 0x00 27. " LOCK_OCRAM_TZ_ADDR[0] ,OCRAM_TZ_ADDR[0] field lock" "Not locked,Locked" bitfld.long 0x00 26. " LOCK_OCRAM_TZ_EN ,OCRAM_TZ_EN field lock" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCK_OCRAM_L2_TZ_ADDR[5] ,OCRAM_L2_TZ_ADDR[5] field lock" "Not locked,Locked" bitfld.long 0x00 24. " LOCK_OCRAM_L2_TZ_ADDR[4] ,OCRAM_L2_TZ_ADDR[4] field lock" "Not locked,Locked" bitfld.long 0x00 23. " LOCK_OCRAM_L2_TZ_ADDR[3] ,OCRAM_L2_TZ_ADDR[3] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 22. " LOCK_OCRAM_L2_TZ_ADDR[2] ,OCRAM_L2_TZ_ADDR[2] field lock" "Not locked,Locked" bitfld.long 0x00 21. " LOCK_OCRAM_L2_TZ_ADDR[1] ,OCRAM_L2_TZ_ADDR[1] field lock" "Not locked,Locked" bitfld.long 0x00 20. " LOCK_OCRAM_L2_TZ_ADDR[0] ,OCRAM_L2_TZ_ADDR[0] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCK_OCRAM_L2_TZ_EN ,OCRAM_L2_TZ_EN field lock" "Not locked,Locked" bitfld.long 0x00 18. " LOCK_SEC_ERR_RESP ,SEC_ERR_RESP field lock" "Not locked,Locked" bitfld.long 0x00 17. " LOCK_DBG_CLK_EN ,DBG_CLK_EN field lock" "Not locked,Locked" textline " " bitfld.long 0x00 16. " LOCK_DBG_EN ,DBG_EN field lock" "Not locked,Locked" hexmask.long.byte 0x00 11.--15. 0x8 " OCRAM_TZ_ADDR ,OCRAM TrustZone (TZ) start address" bitfld.long 0x00 10. " OCRAM_TZ_EN ,OCRAM TrustZone enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 4.--9. 0x10 " OCRAM_L2_TZ_ADDR ,OCRAM L2 TrustZone (TZ) start address" bitfld.long 0x00 3. " OCRAM_L2_TZ_EN ,OCRAM L2 TrustZone enable" "Disabled,Enabled" bitfld.long 0x00 2. " SEC_ERR_RESP ,Security error response" "OKEY,SLVError" textline " " bitfld.long 0x00 1. " DBG_CLK_EN ,ARM Debug clock enable" "Disabled,Enabled" bitfld.long 0x00 0. " DBG_EN ,ARM non secure debug enable" "Disabled,Enabled" line.long 0x04 "GPR11,General Purpose Register 11" bitfld.long 0x04 17. " LOCK_OCRAM_L2_EN ,Lock ocram_l2 enable bit" "Disabled,Enabled" bitfld.long 0x04 1. " OCRAM_L2_EN ,Use L2 cache as ocram" "Not set,Set" line.long 0x08 "GPR12,General Purpose Register 12" bitfld.long 0x08 31. " DCP_KEY_SEL ,Selects 128bit dcp key from 256bit's key from snvs/ocotp" "[127:0],[255:128]" bitfld.long 0x08 27. " ARMP_IPG_CLK_EN ,ARM platform IPG clock enable" "Disabled,Enabled" bitfld.long 0x08 26. " ARMP_AHB_CLK_EN ,ARM platform AHB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " ARMP_ATB_CLK_EN ,ARM platform ATB clock enable" "Disabled,Enabled" bitfld.long 0x08 24. " ARMP_APB_CLK_EN ,ARM platform APB clock enable" "Disabled,Enabled" bitfld.long 0x08 20.--23. " GPU_ARQOS2 ,QOS control for read channel of gpu port m_g_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 16.--19. " GPU_AWQOS2 ,QOS control for write channel of gpu port m_g_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. " GPU_ARQOS1 ,QOS control for read channel of gpu port m_g_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " GPU_AWQOS1 ,QOS control for write channel of gpu port m_g_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " GPU_ARQOS0 ,QOS control for read channel of gpu port m_g_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " GPU_AWQOS0 ,QOS control for write channel of gpu port m_g_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPR13,General Purpose Register 13" bitfld.long 0x0C 30. " SDMA_STOP_REQ ,SDMA stop request" "Not requested,Requested" bitfld.long 0x0C 18. " LCDIF_RD_CACHE_SEL ,Selects the cacheable attribute of LCDIF AXI read transcations" "LCDIF core,LCDIF_RD_CACHE_VAL" bitfld.long 0x0C 16. " LCDIF_RD_CACHE_VAL ,LCDIF block cacheable attribute value of AXI read transactions" "Off,On" textline " " bitfld.long 0x0C 15. " EPDC_WR_CACHE_SEL ,Selects the cacheable attribute of EPDC AXI write transcations" "EPDC core,EPDC_WR_CACHE_VAL" bitfld.long 0x0C 14. " EPDC_RD_CACHE_SEL ,Selects the cacheable attribute of EPDC AXI read transcations" "EPDC,EPDC_RD_CACHE_VAL" bitfld.long 0x0C 13. " EPDC_WR_CACHE_VAL ,EPDC block cacheable attribute value of AXI write transactions" "Off,On" textline " " bitfld.long 0x0C 12. " EPDC_RD_CACHE_VAL ,EPDC block cacheable attribute value of AXI read transactions" "Off,On" bitfld.long 0x0C 11. " PXP_WR_CACHE_SEL ,Selects the cacheable attribute of PXP AXI write transcations" "PXP core,PXP_WR_CACHE_VAL" bitfld.long 0x0C 10. " PXP_RD_CACHE_SEL ,Selects the cacheable attribute of PXP AXI read transcations" "PXP core,PXP_RD_CACHE_VAL" textline " " bitfld.long 0x0C 9. " PXP_WR_CACHE_VA ,PXP block cacheable attribute value of AXI write transactions" "Off,On" bitfld.long 0x0C 8. " PXP_RD_CACHE_VAL ,PXP block cacheable attribute value of AXI read transactions" "Off,On" tree.end tree "SW_MUX_CTL_PAD Registers" width 32. group.long 0x4C++0x257 line.long 0x00 "SW_MUX_CTL_PAD_AUD_MCLK,SW_MUX_CTL_PAD_AUD_MCLK Register" bitfld.long 0x00 4. " SION ,Force input path of pad AUD_MCLK" "Not forced,Forced" bitfld.long 0x00 0.--2. " MUX_MODE ,AUD_MCLK MUX Mode" "AUDIO_CLK_OUT,PWM4_OUT,ECSPI3_RDY,FEC_MDC,WDOG2_RESET_B_DEB,GPIO1_IO06,SPDIF_EXT_CLK,?..." line.long 0x04 "SW_MUX_CTL_PAD_AUD_RXC,SW_MUX_CTL_PAD_AUD_RXC Register" bitfld.long 0x04 4. " SION ,Force input path of pad AUD_RXC" "Not forced,Forced" bitfld.long 0x04 0.--2. " MUX_MODE ,AUD_RXC MUX Mode" "AUD3_RXC,I2C1_SDA,UART3_TX_DATA,FEC_TX_CLK,I2C3_SDA,GPIO1_IO01,ECSPI3_SS1,?..." line.long 0x08 "SW_MUX_CTL_PAD_AUD_RXD,SW_MUX_CTL_PAD_AUD_RXD Register" bitfld.long 0x08 4. " SION ,Force input path of pad AUD_RXD" "Not forced,Forced" bitfld.long 0x08 0.--2. " MUX_MODE ,AUD_RXD MUX Mode" "AUD3_RXD,ECSPI3_MOSI,UART4_RX_DATA,FEC_RX_ER,SD1_LCTL,GPIO1_IO02,?..." line.long 0x0C "SW_MUX_CTL_PAD_AUD_RXFS,SW_MUX_CTL_PAD_AUD_RXFS Register" bitfld.long 0x0C 4. " SION ,Force input path of pad AUD_RXFS" "Not forced,Forced" bitfld.long 0x0C 0.--2. " MUX_MODE ,AUD_RXFS MUX Mode" "AUD3_RXFS,I2C1_SCL,UART3_RX_DATA,FEC_MDIO,I2C3_SCL,GPIO1_IO00,ECSPI3_SS0,?..." line.long 0x10 "SW_MUX_CTL_PAD_AUD_TXC,SW_MUX_CTL_PAD_AUD_TXC Register" bitfld.long 0x10 4. " SION ,Force input path of pad AUD_TXC" "Not forced,Forced" bitfld.long 0x10 0.--2. " MUX_MODE ,AUD_TXC MUX Mode" "AUD3_TXC,ECSPI3_MISO,UART4_TX_DATA,FEC_RX_DV,SD2_LCTL,GPIO1_IO03,?..." line.long 0x14 "SW_MUX_CTL_PAD_AUD_TXD,SW_MUX_CTL_PAD_AUD_TXD Register" bitfld.long 0x14 4. " SION ,Force input path of pad AUD_TXD" "Not forced,Forced" bitfld.long 0x14 0.--2. " MUX_MODE ,AUD_TXD MUX Mode" "AUD3_TXD,ECSPI3_SCLK,UART4_CTS_B,FEC_TX_DATA0,SD4_LCTL,GPIO1_IO05,?..." line.long 0x18 "SW_MUX_CTL_PAD_AUD_TXFS,SW_MUX_CTL_PAD_AUD_TXFS Register" bitfld.long 0x18 4. " SION ,Force input path of pad AUD_TXFS" "Not forced,Forced" bitfld.long 0x18 0.--2. " MUX_MODE ,AUD_TXFS MUX Mode" "AUD3_TXFS,PWM3_OUT,UART4_RTS_B,FEC_RX_DATA1,SD3_LCTL,GPIO1_IO04,?..." line.long 0x1C "SW_MUX_CTL_PAD_ECSPI1_MISO,SW_MUX_CTL_PAD_ECSPI1_MISO Register" bitfld.long 0x1C 4. " SION ,Force input path of pad ECSPI1_MISO" "Not forced,Forced" bitfld.long 0x1C 0.--2. " MUX_MODE ,ECSPI1_MISO MUX Mode" "ECSPI1_MISO,AUD4_TXFS,UART5_RTS_B,EPDC_BDR0,SD2_WP,GPIO4_IO10,?..." line.long 0x20 "SW_MUX_CTL_PAD_ECSPI1_MOSI,SW_MUX_CTL_PAD_ECSPI1_MOSI Register" bitfld.long 0x20 4. " SION ,Force input path of pad ECSPI1_MOSI" "Not forced,Forced" bitfld.long 0x20 0.--2. " MUX_MODE ,ECSPI1_MOSI MUX Mode" "ECSPI1_MISO,AUD4_TXC,UART5_TX_DATA,EPDC_VCOM1,SD2_VSELECT,GPIO4_IO09,?..." line.long 0x24 "SW_MUX_CTL_PAD_ECSPI1_SCLK,SW_MUX_CTL_PAD_ECSPI1_SCLK Register" bitfld.long 0x24 4. " SION ,Force input path of pad ECSPI1_SCLK" "Not forced,Forced" bitfld.long 0x24 0.--2. " MUX_MODE ,ECSPI1_SCLK MUX Mode" "ECSPI1_SCLK,AUD4_TXD,UART5_RX_DATA,EPDC_VCOM0,SD2_RESET,GPIO4_IO08,USB_OTG2_OC,?..." line.long 0x28 "SW_MUX_CTL_PAD_ECSPI1_SS0,SW_MUX_CTL_PAD_ECSPI1_SS0 Register" bitfld.long 0x28 4. " SION ,Force input path of pad ECSPI1_SS0" "Not forced,Forced" bitfld.long 0x28 0.--2. " MUX_MODE ,ECSPI1_SS0 MUX Mode" "ECSPI1_SS0,AUD4_RXD,UART5_CTS_B,EPDC_BDR1,SD2_CD_B,GPIO4_IO11,USB_OTG2_PWR,?..." line.long 0x2C "SW_MUX_CTL_PAD_ECSPI2_MISO,SW_MUX_CTL_PAD_ECSPI2_MISO Register" bitfld.long 0x2C 4. " SION ,Force input path of pad ECSPI2_MISO" "Not forced,Forced" bitfld.long 0x2C 0.--2. " MUX_MODE ,ECSPI2_MISO MUX Mode" "ECSPI2_MISO,SDMA_EXT_EVENT0,UART3_RTS_B,CSI_MCLK,SD1_WP,GPIO4_IO14,USB_OTG1_OC,?..." line.long 0x30 "SW_MUX_CTL_PAD_ECSPI2_MOSI,SW_MUX_CTL_PAD_ECSPI2_MOSI Register" bitfld.long 0x30 4. " SION ,Force input path of pad ECSPI2_MOSI" "Not forced,Forced" bitfld.long 0x30 0.--2. " MUX_MODE ,ECSPI2_MOSI MUX Mode" "ECSPI2_MOSI,SDMA_EXT_EVENT1,UART3_TX_DATA,CSI_HSYNC,SD1_VSELECT,GPIO4_IO13,?..." line.long 0x34 "SW_MUX_CTL_PAD_ECSPI2_SCLK,SW_MUX_CTL_PAD_ECSPI2_SCLK Register" bitfld.long 0x34 4. " SION ,Force input path of pad ECSPI2_SCLK" "Not forced,Forced" bitfld.long 0x34 0.--2. " MUX_MODE ,ECSPI2_SCLK MUX Mode" "ECSPI2_SCLK,SPDIF_EXT_CLK,UART3_RX_DATA,CSI_PIXCLK,SD1_RESET,GPIO4_IO12,USB_OTG2_OC,?..." line.long 0x38 "SW_MUX_CTL_PAD_ECSPI2_SS0,SW_MUX_CTL_PAD_ECSPI2_SS0 Register" bitfld.long 0x38 4. " SION ,Force input path of pad ECSPI2_SS0" "Not forced,Forced" bitfld.long 0x38 0.--2. " MUX_MODE ,ECSPI2_SS0 MUX Mode" "ECSPI2_SS0,ECSPI1_SS3,UART3_CTS_B,CSI_VSYNC,SD1_CD_B,GPIO4_IO15,USB_OTG1_PWR,?..." line.long 0x3C "SW_MUX_CTL_PAD_EPDC_BDR0,SW_MUX_CTL_PAD_EPDC_BDR0 Register" bitfld.long 0x3C 4. " SION ,Force input path of pad EPDC_BDR0" "Not forced,Forced" bitfld.long 0x3C 0.--2. " MUX_MODE ,EPDC_BDR0 MUX Mode" "EPDC_BDR0,SD4_CLK,UART3_RTS_B,EIM_ADDR26,,GPIO2_IO05,EPDC_SDCE7,?..." line.long 0x40 "SW_MUX_CTL_PAD_EPDC_BDR1,SW_MUX_CTL_PAD_EPDC_BDR1 Register" bitfld.long 0x40 4. " SION ,Force input path of pad EPDC_BDR1" "Not forced,Forced" bitfld.long 0x40 0.--2. " MUX_MODE ,EPDC_BDR1 MUX Mode" "EPDC_BDR1,SD4_CMD,UART3_CTS_B,EIM_CRE,,GPIO2_IO06,EPDC_SDCE8,?..." line.long 0x44 "SW_MUX_CTL_PAD_EPDC_DATA00,SW_MUX_CTL_PAD_EPDC_DATA00 Register" bitfld.long 0x44 4. " SION ,Force input path of pad EPDC_DATA00" "Not forced,Forced" bitfld.long 0x44 0.--2. " MUX_MODE ,EPDC_DATA00 MUX Mode" "EPDC_DATA00,ECSPI4_MOSI,LCD_DATA24,CSI_DATA00,,GPIO1_IO07,?..." line.long 0x48 "SW_MUX_CTL_PAD_EPDC_DATA01,SW_MUX_CTL_PAD_EPDC_DATA01 Register" bitfld.long 0x48 4. " SION ,Force input path of pad EPDC_DATA01" "Not forced,Forced" bitfld.long 0x48 0.--2. " MUX_MODE ,EPDC_DATA01 MUX Mode" "EPDC_DATA01,ECSPI4_MISO,LCD_DATA25,CSI_DATA01,,GPIO1_IO08,?..." line.long 0x4C "SW_MUX_CTL_PAD_EPDC_DATA10,SW_MUX_CTL_PAD_EPDC_DATA10 Register" bitfld.long 0x4C 4. " SION ,Force input path of pad EPDC_DATA10" "Not forced,Forced" bitfld.long 0x4C 0.--2. " MUX_MODE ,EPDC_DATA10 MUX Mode" "EPDC_DATA10,ECSPI3_SS0,EPDC_PWR_CTRL2,EIM_ADDR18,,GPIO1_IO17,SD4_WP,?..." line.long 0x50 "SW_MUX_CTL_PAD_EPDC_DATA11,SW_MUX_CTL_PAD_EPDC_DATA11 Register" bitfld.long 0x50 4. " SION ,Force input path of pad EPDC_DATA11" "Not forced,Forced" bitfld.long 0x50 0.--2. " MUX_MODE ,EPDC_DATA11 MUX Mode" "EPDC_DATA11,ECSPI3_SCLK,EPDC_PWR_CTRL3,EIM_ADDR19,,GPIO1_IO18,SD4_CD_B,?..." line.long 0x54 "SW_MUX_CTL_PAD_EPDC_DATA12,SW_MUX_CTL_PAD_EPDC_DATA12 Register" bitfld.long 0x54 4. " SION ,Force input path of pad EPDC_DATA12" "Not forced,Forced" bitfld.long 0x54 0.--2. " MUX_MODE ,EPDC_DATA12 MUX Mode" "EPDC_DATA12,UART2_RX_DATA,EPDC_PWR_COM,EIM_ADDR20,,GPIO1_IO19,ECSPI3_SS1,?..." line.long 0x58 "SW_MUX_CTL_PAD_EPDC_DATA13,SW_MUX_CTL_PAD_EPDC_DATA13 Register" bitfld.long 0x58 4. " SION ,Force input path of pad EPDC_DATA13" "Not forced,Forced" bitfld.long 0x58 0.--2. " MUX_MODE ,EPDC_DATA13 MUX Mode" "EPDC_DATA13,UART2_TX_DATA,EPDC_PWR_IRQ,EIM_ADDR21,,GPIO1_IO20,ECSPI3_SS2,?..." line.long 0x5C "SW_MUX_CTL_PAD_EPDC_DATA14,SW_MUX_CTL_PAD_EPDC_DATA14 Register" bitfld.long 0x5C 4. " SION ,Force input path of pad EPDC_DATA14" "Not forced,Forced" bitfld.long 0x5C 0.--2. " MUX_MODE ,EPDC_DATA14 MUX Mode" "EPDC_DATA14,UART2_RTS_B,EPDC_PWR_STAT,EIM_ADDR22,,GPIO1_IO21,ECSPI3_SS3,?..." line.long 0x60 "SW_MUX_CTL_PAD_EPDC_DATA15,SW_MUX_CTL_PAD_EPDC_DATA15 Register" bitfld.long 0x60 4. " SION ,Force input path of pad EPDC_DATA15" "Not forced,Forced" bitfld.long 0x60 0.--2. " MUX_MODE ,EPDC_DATA15 MUX Mode" "EPDC_DATA15,UART2_CTS_B,EPDC_PWR_WAKE,EIM_ADDR23,,GPIO1_IO22,ECSPI3_RDY,?..." line.long 0x64 "SW_MUX_CTL_PAD_EPDC_DATA02,SW_MUX_CTL_PAD_EPDC_DATA02 Register" bitfld.long 0x64 4. " SION ,Force input path of pad EPDC_DATA02" "Not forced,Forced" bitfld.long 0x64 0.--2. " MUX_MODE ,EPDC_DATA02 MUX Mode" "EPDC_DATA02,ECSPI4_SS0,LCD_DATA26,CSI_DATA02,,GPIO1_IO09,?..." line.long 0x68 "SW_MUX_CTL_PAD_EPDC_DATA03,SW_MUX_CTL_PAD_EPDC_DATA03 Register" bitfld.long 0x68 4. " SION ,Force input path of pad EPDC_DATA03" "Not forced,Forced" bitfld.long 0x68 0.--2. " MUX_MODE ,EPDC_DATA03 MUX Mode" "EPDC_DATA03,ECSPI4_SCK,LCD_DATA27,CSI_DATA03,,GPIO1_IO10,?..." line.long 0x6C "SW_MUX_CTL_PAD_EPDC_DATA04,SW_MUX_CTL_PAD_EPDC_DATA04 Register" bitfld.long 0x6C 4. " SION ,Force input path of pad EPDC_DATA04" "Not forced,Forced" bitfld.long 0x6C 0.--2. " MUX_MODE ,EPDC_DATA04 MUX Mode" "EPDC_DATA04,ECSPI4_SS1,LCD_DATA28,CSI_DATA04,,GPIO1_IO11,?..." line.long 0x70 "SW_MUX_CTL_PAD_EPDC_DATA05,SW_MUX_CTL_PAD_EPDC_DATA05 Register" bitfld.long 0x70 4. " SION ,Force input path of pad EPDC_DATA05" "Not forced,Forced" bitfld.long 0x70 0.--2. " MUX_MODE ,EPDC_DATA05 MUX Mode" "EPDC_DATA05,ECSPI4_SS2,LCD_DATA29,CSI_DATA05,,GPIO1_IO12,?..." line.long 0x74 "SW_MUX_CTL_PAD_EPDC_DATA06,SW_MUX_CTL_PAD_EPDC_DATA06 Register" bitfld.long 0x74 4. " SION ,Force input path of pad EPDC_DATA06" "Not forced,Forced" bitfld.long 0x74 0.--2. " MUX_MODE ,EPDC_DATA06 MUX Mode" "EPDC_DATA06,ECSPI4_SS3,LCD_DATA30,CSI_DATA06,,GPIO1_IO13,?..." line.long 0x78 "SW_MUX_CTL_PAD_EPDC_DATA07,SW_MUX_CTL_PAD_EPDC_DATA07 Register" bitfld.long 0x78 4. " SION ,Force input path of pad EPDC_DATA07" "Not forced,Forced" bitfld.long 0x78 0.--2. " MUX_MODE ,EPDC_DATA07 MUX Mode" "EPDC_DATA07,ECSPI4_RDY,LCD_DATA31,CSI_DATA07,,GPIO1_IO14,?..." line.long 0x7C "SW_MUX_CTL_PAD_EPDC_DATA08,SW_MUX_CTL_PAD_EPDC_DATA08 Register" bitfld.long 0x7C 4. " SION ,Force input path of pad EPDC_DATA08" "Not forced,Forced" bitfld.long 0x7C 0.--2. " MUX_MODE ,EPDC_DATA08 MUX Mode" "EPDC_DATA08,ECSPI3_MOSI,EPDC_PWR_CTRL0,EIM_ADDR16,GPIO1_IO15,SD4_RESET,?..." line.long 0x80 "SW_MUX_CTL_PAD_EPDC_DATA09,SW_MUX_CTL_PAD_EPDC_DATA09 Register" bitfld.long 0x80 4. " SION ,Force input path of pad EPDC_DATA09" "Not forced,Forced" bitfld.long 0x80 0.--2. " MUX_MODE ,EPDC_DATA09 MUX Mode" "EPDC_DATA09,ECSPI3_MISO,EPDC_PWR_CTRL1,EIM_ADDR17,GPIO1_IO16,SD4_VSELECT,?..." line.long 0x84 "SW_MUX_CTL_PAD_EPDC_GDCLK,SW_MUX_CTL_PAD_EPDC_GDCLK Register" bitfld.long 0x84 4. " SION ,Force input path of pad EPDC_GDCLK" "Not forced,Forced" bitfld.long 0x84 0.--2. " MUX_MODE ,EPDC_GDCLK MUX Mode" "EPDC_GDCLK,ECSPI2_SS2,,CSI_PIXCLK,,GPIO1_IO31,SD2_RESET,?..." line.long 0x88 "SW_MUX_CTL_PAD_EPDC_GDOE,SW_MUX_CTL_PAD_EPDC_GDOE Register" bitfld.long 0x88 4. " SION ,Force input path of pad EPDC_GDOE" "Not forced,Forced" bitfld.long 0x88 0.--2. " MUX_MODE ,EPDC_GDOE MUX Mode" "EPDC_GDOE,ECSPI2_SS3,,CSI_HSYNC,,GPIO2_IO00,SD2_VSELECT,?..." line.long 0x8C "SW_MUX_CTL_PAD_EPDC_GDRL,SW_MUX_CTL_PAD_EPDC_GDRL Register" bitfld.long 0x8C 4. " SION ,Force input path of pad EPDC_GDRL" "Not forced,Forced" bitfld.long 0x8C 0.--2. " MUX_MODE ,EPDC_GDRL MUX Mode" "EPDC_GDRL,ECSPI2_RDY,,CSI_MCLK,,GPIO2_IO01,SD2_WP,?..." line.long 0x90 "SW_MUX_CTL_PAD_EPDC_GDSP,SW_MUX_CTL_PAD_EPDC_GDSP Register" bitfld.long 0x90 4. " SION ,Force input path of pad EPDC_GDSP" "Not forced,Forced" bitfld.long 0x90 0.--2. " MUX_MODE ,EPDC_GDSP MUX Mode" "EPDC_GDSP,PWM4_OUT,,CSI_VSYNC,,GPIO2_IO02,SD2_CD_B,?..." line.long 0x94 "SW_MUX_CTL_PAD_EPDC_PWR_COM,SW_MUX_CTL_PAD_EPDC_PWR_COM Register" bitfld.long 0x94 4. " SION ,Force input path of pad PWR_COM" "Not forced,Forced" bitfld.long 0x94 0.--2. " MUX_MODE ,PWR_COM MUX Mode" "EPDC_PWR_COM,SD4_DATA0,LCD_DATA20,EIM_BCLK,USB_OTG1_ID,GPIO2_IO11,SD3_RESET,?..." line.long 0x98 "SW_MUX_CTL_PAD_EPDC_PWR_CTRL0,SW_MUX_CTL_PAD_EPDC_PWR_CTRL0 Register" bitfld.long 0x98 4. " SION ,Force input path of pad PWR_CTRL0" "Not forced,Forced" bitfld.long 0x98 0.--2. " MUX_MODE ,PWR_CTRL0 MUX Mode" "EPDC_PWR_CTRL0,AUD5_RXC,LCD_DATA16,EIM_RW,,GPIO2_IO07,SD4_RESET,?..." line.long 0x9C "SW_MUX_CTL_PAD_EPDC_PWR_CTRL1,SW_MUX_CTL_PAD_EPDC_PWR_CTRL1 Register" bitfld.long 0x9C 4. " SION ,Force input path of pad PWR_CTRL1" "Not forced,Forced" bitfld.long 0x9C 0.--2. " MUX_MODE ,PWR_CTRL1 MUX Mode" "EPDC_PWR_CTRL1,AUD5_TXFS,LCD_DATA17,EIM_OE_B,,GPIO2_IO08,SD4_VSELECT,?..." line.long 0xA0 "SW_MUX_CTL_PAD_EPDC_PWR_CTRL2,SW_MUX_CTL_PAD_EPDC_PWR_CTRL2 Register" bitfld.long 0xA0 4. " SION ,Force input path of pad PWR_CTRL2" "Not forced,Forced" bitfld.long 0xA0 0.--2. " MUX_MODE ,PWR_CTRL2 MUX Mode" "EPDC_PWR_CTRL2,AUD5_TXD,LCD_DATA18,EIM_CS0_B,,GPIO2_IO09,SD4_WP,?..." line.long 0xA4 "SW_MUX_CTL_PAD_EPDC_PWR_CTRL3,SW_MUX_CTL_PAD_EPDC_PWR_CTRL3 Register" bitfld.long 0xA4 4. " SION ,Force input path of pad PWR_CTRL3" "Not forced,Forced" bitfld.long 0xA4 0.--2. " MUX_MODE ,PWR_CTRL3 MUX Mode" "EPDC_PWR_CTRL3,AUD5_TXC,LCD_DATA19,EIM_CS1_B,,GPIO2_IO10,SD4_CD_B,?..." line.long 0xA8 "SW_MUX_CTL_PAD_EPDC_PWR_IRQ,SW_MUX_CTL_PAD_EPDC_PWR_IRQ Register" bitfld.long 0xA8 4. " SION ,Force input path of pad PWR_IRQ" "Not forced,Forced" bitfld.long 0xA8 0.--2. " MUX_MODE ,PWR_IRQ MUX Mode" "EPDC_PWR_IRQ,SD4_DATA1,LCD_DATA21,EIM_ACLK_FREERUN,USB_OTG2_ID,GPIO2_IO12,SD3_VSELECT,?..." line.long 0xAC "SW_MUX_CTL_PAD_EPDC_PWR_STAT,SW_MUX_CTL_PAD_EPDC_PWR_STAT Register" bitfld.long 0xAC 4. " SION ,Force input path of pad PWR_STAT" "Not forced,Forced" bitfld.long 0xAC 0.--2. " MUX_MODE ,PWR_STAT MUX Mode" "EPDC_PWR_STAT,SD4_DATA2,LCD_DATA22,EIM_WAIT_B,ARM_EVENTI,GPIO2_IO13,SD3_WP,?..." line.long 0xB0 "SW_MUX_CTL_PAD_EPDC_PWR_WAKE,SW_MUX_CTL_PAD_EPDC_PWR_WAKE Register" bitfld.long 0xB0 4. " SION ,Force input path of pad PWR_WAKE" "Not forced,Forced" bitfld.long 0xB0 0.--2. " MUX_MODE ,PWR_WAKE MUX Mode" "EPDC_PWR_WAKE,SD4_DATA3,LCD_DATA23,EIM_DTACK_B,ARM_EVENTO,GPIO2_IO14,SD3_CD_B,?..." line.long 0xB4 "SW_MUX_CTL_PAD_EPDC_SDCE0,SW_MUX_CTL_PAD_EPDC_SDCE0 Register" bitfld.long 0xB4 4. " SION ,Force input path of pad EPDC_SDCE0" "Not forced,Forced" bitfld.long 0xB4 0.--2. " MUX_MODE ,EPDC_SDCE0 MUX Mode" "EPDC_SDCE0,ECSPI2_SS1,PWM3_OUT,EIM_CS2_B,,GPIO1_IO27,?..." line.long 0xB8 "SW_MUX_CTL_PAD_EPDC_SDCE1,SW_MUX_CTL_PAD_EPDC_SDCE1 Register" bitfld.long 0xB8 4. " SION ,Force input path of pad EPDC_SDCE1" "Not forced,Forced" bitfld.long 0xB8 0.--2. " MUX_MODE ,EPDC_SDCE1 MUX Mode" "EPDC_SDCE1,WDOG2_B,PWM4_OUT,EIM_LBA_B,,GPIO1_IO28,?..." line.long 0xBC "SW_MUX_CTL_PAD_EPDC_SDCE2,SW_MUX_CTL_PAD_EPDC_SDCE2 Register" bitfld.long 0xBC 4. " SION ,Force input path of pad EPDC_SDCE2" "Not forced,Forced" bitfld.long 0xBC 0.--2. " MUX_MODE ,EPDC_SDCE2 MUX Mode" "EPDC_SDCE2,I2C3_SCL,PWM1_OUT,EIM_EB0_B,,GPIO1_IO29,?..." line.long 0xC0 "SW_MUX_CTL_PAD_EPDC_SDCE3,SW_MUX_CTL_PAD_EPDC_SDCE3 Register" bitfld.long 0xC0 4. " SION ,Force input path of pad EPDC_SDCE3" "Not forced,Forced" bitfld.long 0xC0 0.--2. " MUX_MODE ,EPDC_SDCE3 MUX Mode" "EPDC_SDCE3,I2C3_SDA,PWM2_OUT,EIM_EB1_B,,GPIO1_IO30,?..." line.long 0xC4 "SW_MUX_CTL_PAD_EPDC_SDCLK,SW_MUX_CTL_PAD_EPDC_SDCLK Register" bitfld.long 0xC4 4. " SION ,Force input path of pad EPDC_SDCLK" "Not forced,Forced" bitfld.long 0xC4 0.--2. " MUX_MODE ,EPDC_SDCLK MUX Mode" "EPDC_SDCLK_P,ECSPI2_MOSI,I2C2_SCL,CSI_DATA08,,GPIO1_IO23,?..." line.long 0xC8 "SW_MUX_CTL_PAD_EPDC_SDLE,SW_MUX_CTL_PAD_EPDC_SDLE Register" bitfld.long 0xC8 4. " SION ,Force input path of pad EPDC_SDLE" "Not forced,Forced" bitfld.long 0xC8 0.--2. " MUX_MODE ,EPDC_SDLE MUX Mode" "EPDC_SDLE,ECSPI2_MISO,I2C2_SDA,CSI_DATA09,,GPIO1_IO24,?..." line.long 0xCC "SW_MUX_CTL_PAD_EPDC_SDOE,SW_MUX_CTL_PAD_EPDC_SDOE Register" bitfld.long 0xCC 4. " SION ,Force input path of pad EPDC_SDOE" "Not forced,Forced" bitfld.long 0xCC 0.--2. " MUX_MODE ,EPDC_SDOE MUX Mode" "EPDC_SDOE,ECSPI2_SS0,,CSI_DATA10,,GPIO1_IO25,?..." line.long 0xD0 "SW_MUX_CTL_PAD_EPDC_SDSHR,SW_MUX_CTL_PAD_EPDC_SDSHR Register" bitfld.long 0xD0 4. " SION ,Force input path of pad EPDC_SDSHR" "Not forced,Forced" bitfld.long 0xD0 0.--2. " MUX_MODE ,EPDC_SDSHR MUX Mode" "EPDC_SDSHR,ECSPI2_SCLK,EPDC_SDCE4,CSI_DATA11,,GPIO1_IO26,?..." line.long 0xD4 "SW_MUX_CTL_PAD_EPDC_VCOM0,SW_MUX_CTL_PAD_EPDC_VCOM0 Register" bitfld.long 0xD4 4. " SION ,Force input path of pad EPDC_VCOM0" "Not forced,Forced" bitfld.long 0xD4 0.--2. " MUX_MODE ,EPDC_VCOM0 MUX Mode" "EPDC_VCOM0,AUD5_RXFS,UART3_RX_DATA,EIM_ADDR24,,GPIO2_IO03,EPDC_SDCE5,?..." line.long 0xD8 "SW_MUX_CTL_PAD_EPDC_VCOM1,SW_MUX_CTL_PAD_EPDC_VCOM1 Register" bitfld.long 0xD8 4. " SION ,Force input path of pad EPDC_VCOM1" "Not forced,Forced" bitfld.long 0xD8 0.--2. " MUX_MODE ,EPDC_VCOM1 MUX Mode" "EPDC_VCOM1,AUD5_RXD,UART3_TX_DATA,EIM_ADDR25,,GPIO2_IO04,EPDC_SDCE6,?..." line.long 0xDC "SW_MUX_CTL_PAD_FEC_CRS_DV,SW_MUX_CTL_PAD_FEC_CRS_DV Register" bitfld.long 0xDC 4. " SION ,Force input path of pad FEC_CRS_DV" "Not forced,Forced" bitfld.long 0xDC 0.--2. " MUX_MODE ,FEC_CRS_DV MUX Mode" "FEC_RX_DV,SD4_DATA1,AUD6_TXC,ECSPI4_MISO,GPT_COMPARE2,GPIO4_IO25,ARM_TRACE31,?..." line.long 0xE0 "SW_MUX_CTL_PAD_FEC_MDC,SW_MUX_CTL_PAD_FEC_MDC Register" bitfld.long 0xE0 4. " SION ,Force input path of pad FEC_MDC" "Not forced,Forced" bitfld.long 0xE0 0.--2. " MUX_MODE ,FEC_MDC MUX Mode" "FEC_MDC,SD4_DATA4,AUDIO_CLK_OUT,SD1_RESET,SD3_RESET,GPIO4_IO23,ARM_TRACE29,?..." line.long 0xE4 "SW_MUX_CTL_PAD_FEC_MDIO,SW_MUX_CTL_PAD_FEC_MDIO Register" bitfld.long 0xE4 4. " SION ,Force input path of pad FEC_MDIO" "Not forced,Forced" bitfld.long 0xE4 0.--2. " MUX_MODE ,FEC_MDIO MUX Mode" "FEC_MDIO,SD4_CLK,AUD6_RXFS,ECSPI4_SS0,GPT_CAPTURE1,GPIO4_IO20,ARM_TRACE26,?..." line.long 0xE8 "SW_MUX_CTL_PAD_FEC_REF_CLK,SW_MUX_CTL_PAD_FEC_REF_CLK Register" bitfld.long 0xE8 4. " SION ,Force input path of pad FEC_REF_CLK" "Not forced,Forced" bitfld.long 0xE8 0.--2. " MUX_MODE ,FEC_REF_CLK MUX Mode" "FEC_REF_OUT,SD4_RESET,WDOG1_B,PWM4_OUT,CCM_PMIC_READY,GPIO4_IO26,SPDIF_EXT_CLK,?..." line.long 0xEC "SW_MUX_CTL_PAD_FEC_RX_ER,SW_MUX_CTL_PAD_FEC_RX_ER Register" bitfld.long 0xEC 4. " SION ,Force input path of pad FEC_RX_ER" "Not forced,Forced" bitfld.long 0xEC 0.--2. " MUX_MODE ,FEC_RX_ER MUX Mode" "FEC_RX_ER,SD4_DATA0,AUD6_RXD,ECSPI4_MOSI,GPT_COMPARE1,GPIO4_IO19,ARM_TRACE25,?..." line.long 0xF0 "SW_MUX_CTL_PAD_FEC_RX_DATA0,SW_MUX_CTL_PAD_FEC_RX_DATA0 Register" bitfld.long 0xF0 4. " SION ,Force input path of pad FEC_RX_DATA0" "Not forced,Forced" bitfld.long 0xF0 0.--2. " MUX_MODE ,FEC_RX_DATA0 MUX Mode" "FEC_RX_DATA0,SD4_DATA5,USB_OTG1_ID,SD1_VSELECT,SD3_VSELECT,GPIO4_IO17,ARM_TRACE24,?..." line.long 0xF4 "SW_MUX_CTL_PAD_FEC_RX_DATA1,SW_MUX_CTL_PAD_FEC_RX_DATA1 Register" bitfld.long 0xF4 4. " SION ,Force input path of pad FEC_RX_DATA1" "Not forced,Forced" bitfld.long 0xF4 0.--2. " MUX_MODE ,FEC_RX_DATA1 MUX Mode" "FEC_RX_DATA1,SD4_DATA2,AUD6_TXFS,ECSPI4_SS1,GPT_COMPARE3,GPIO4_IO18,FEC_COL,?..." line.long 0xF8 "SW_MUX_CTL_PAD_FEC_TX_CLK,SW_MUX_CTL_PAD_FEC_TX_CLK Register" bitfld.long 0xF8 4. " SION ,Force input path of pad FEC_TX_CLK" "Not forced,Forced" bitfld.long 0xF8 0.--2. " MUX_MODE ,FEC_TX_CLK MUX Mode" "FEC_TX_CLK,SD4_CMD,AUD6_RXC,ECSPI4_SCLK,GPT_CAPTURE2,GPIO4_IO21,ARM_TRACE27,?..." line.long 0xFC "SW_MUX_CTL_PAD_FEC_TX_EN,SW_MUX_CTL_PAD_FEC_TX_EN Register" bitfld.long 0xFC 4. " SION ,Force input path of pad FEC_TX_EN" "Not forced,Forced" bitfld.long 0xFC 0.--2. " MUX_MODE ,FEC_TX_EN MUX Mode" "FEC_TX_EN,SD4_DATA6,SPDIF_IN,SD1_WP,SD3_WP,GPIO4_IO22,ARM_TRACE28,?..." line.long 0x100 "SW_MUX_CTL_PAD_FEC_TX_DATA0,SW_MUX_CTL_PAD_FEC_TX_DATA0 Register" bitfld.long 0x100 4. " SION ,Force input path of pad FEC_TX_DATA0" "Not forced,Forced" bitfld.long 0x100 0.--2. " MUX_MODE ,FEC_TX_DATA0 MUX Mode" "FEC_TX_DATA0,SD4_DATA3,AUD6_TXD,ECSPI4_SS2,GPT_CLKIN,GPIO4_IO24,ARM_TRACE30,?..." line.long 0x104 "SW_MUX_CTL_PAD_FEC_TX_DATA1,SW_MUX_CTL_PAD__FEC_TX_DATA1 Register" bitfld.long 0x104 4. " SION ,Force input path of pad _FEC_TX_DATA1" "Not forced,Forced" bitfld.long 0x104 0.--2. " MUX_MODE ,_FEC_TX_DATA1 MUX Mode" "FEC_TX_DATA1,SD4_DATA7,SPDIF_OUT,SD1_CD_B,SD3_CD_B,GPIO4_IO16,FEC_RX_CLK,?..." line.long 0x108 "SW_MUX_CTL_PAD_USB_H_DATA,SW_MUX_CTL_PAD_USB_H_DATA Register" bitfld.long 0x108 4. " SION ,Force input path of pad USB_H_DATA" "Not forced,Forced" bitfld.long 0x108 0.--2. " MUX_MODE ,USB_H_DATA MUX Mode" "USB_H_DATA,I2C1_SCL,PWM1_OUT,XTALOSC_REF_CLK_24M,,GPIO3_IO19,?..." line.long 0x10C "SW_MUX_CTL_PAD_USB_H_STROBE,SW_MUX_CTL_PAD_USB_H_STROBE Register" bitfld.long 0x10C 4. " SION ,Force input path of pad USB_H_STROBE" "Not forced,Forced" bitfld.long 0x10C 0.--2. " MUX_MODE ,USB_H_STROBE MUX Mode" "USB_H_STROBE,I2C1_SDA,PWM2_OUT,XTALOSC_REF_CLK_32K,,GPIO3_IO20,?..." line.long 0x110 "SW_MUX_CTL_PAD_I2C1_SCL,SW_MUX_CTL_PAD_I2C1_SCL Register" bitfld.long 0x110 4. " SION ,Force input path of pad I2C1_SCL" "Not forced,Forced" bitfld.long 0x110 0.--2. " MUX_MODE ,I2C1_SCL MUX Mode" "I2C1_SCL,UART1_RTS_B,ECSPI3_SS2,FEC_RX_DATA0,SD3_RESET,GPIO3_IO12,ECSPI1_SS1,?..." line.long 0x114 "SW_MUX_CTL_PAD_I2C1_SDA,SW_MUX_CTL_PAD_I2C1_SDA Register" bitfld.long 0x114 4. " SION ,Force input path of pad I2C1_SDA" "Not forced,Forced" bitfld.long 0x114 0.--2. " MUX_MODE ,I2C1_SDA MUX Mode" "I2C1_SDA,UART1_CTS_B,ECSPI3_SS3,FEC_TX_EN,SD3_VSELECT,GPIO3_IO13,ECSPI1_SS2,?..." line.long 0x118 "SW_MUX_CTL_PAD_I2C2_SCL,SW_MUX_CTL_PAD_I2C2_SCL Register" bitfld.long 0x118 4. " SION ,Force input path of pad I2C2_SCL" "Not forced,Forced" bitfld.long 0x118 0.--2. " MUX_MODE ,I2C2_SCL MUX Mode" "I2C2_SCL,AUD4_RXFS,SPDIF_IN,FEC_TX_DATA1,SD3_WP,GPIO3_IO14,ECSPI1_RDY,?..." line.long 0x11C "SW_MUX_CTL_PAD_I2C2_SDA,SW_MUX_CTL_PAD_I2C2_SDA Register" bitfld.long 0x11C 4. " SION ,Force input path of pad I2C2_SDA" "Not forced,Forced" bitfld.long 0x11C 0.--2. " MUX_MODE ,I2C2_SDA MUX Mode" "I2C2_SDA,AUD4_RXC,SPDIF_OUT,FEC_REF_OUT,SD3_CD_B,GPIO3_IO15,?..." line.long 0x120 "SW_MUX_CTL_PAD_KEY_COL0,SW_MUX_CTL_PAD_KEY_COL0 Register" bitfld.long 0x120 4. " SION ,Force input path of pad KEY_COL0" "Not forced,Forced" bitfld.long 0x120 0.--2. " MUX_MODE ,KEY_COL0 MUX Mode" "KEY_COL0,I2C2_SCL,LCD_DATA00,EIM_AD00,SD1_CD_B,GPIO3_IO24,MSHC_SCLK,?..." line.long 0x124 "SW_MUX_CTL_PAD_KEY_COL1,SW_MUX_CTL_PAD_KEY_COL1 Register" bitfld.long 0x124 4. " SION ,Force input path of pad KEY_COL1" "Not forced,Forced" bitfld.long 0x124 0.--2. " MUX_MODE ,KEY_COL1 MUX Mode" "KEY_COL1,ECSPI4_MOSI,LCD_DATA02,EIM_AD02,SD3_DATA4,GPIO3_IO26,MSHC_DATA0,?..." line.long 0x128 "SW_MUX_CTL_PAD_KEY_COL2,SW_MUX_CTL_PAD_KEY_COL2 Register" bitfld.long 0x128 4. " SION ,Force input path of pad KEY_COL2" "Not forced,Forced" bitfld.long 0x128 0.--2. " MUX_MODE ,KEY_COL2 MUX Mode" "KEY_COL2,ECSPI4_SS0,LCD_DATA04,EIM_AD04,SD3_DATA6,GPIO3_IO28,MSHC_DATA2,?..." line.long 0x12C "SW_MUX_CTL_PAD_KEY_COL3,SW_MUX_CTL_PAD_KEY_COL3 Register" bitfld.long 0x12C 4. " SION ,Force input path of pad KEY_COL3" "Not forced,Forced" bitfld.long 0x12C 0.--2. " MUX_MODE ,KEY_COL3 MUX Mode" "KEY_COL3,AUD6_RXFS,LCD_DATA06,EIM_AD06,SD4_DATA6,GPIO3_IO30,SD1_RESET,?..." line.long 0x130 "SW_MUX_CTL_PAD_KEY_COL4,SW_MUX_CTL_PAD_KEY_COL4 Register" bitfld.long 0x130 4. " SION ,Force input path of pad KEY_COL4" "Not forced,Forced" bitfld.long 0x130 0.--2. " MUX_MODE ,KEY_COL4 MUX Mode" "KEY_COL4,AUD6_RXD,LCD_DATA08,EIM_AD08,SD4_CLK,GPIO4_IO00,USB_OTG1_PWR,?..." line.long 0x134 "SW_MUX_CTL_PAD_KEY_COL5,SW_MUX_CTL_PAD_KEY_COL5 Register" bitfld.long 0x134 4. " SION ,Force input path of pad KEY_COL5" "Not forced,Forced" bitfld.long 0x134 0.--2. " MUX_MODE ,KEY_COL5 MUX Mode" "KEY_COL5,AUD6_TXFS,LCD_DATA10,EIM_AD10,SD4_DATA0,GPIO4_IO02,USB_OTG2_PWR,?..." line.long 0x138 "SW_MUX_CTL_PAD_KEY_COL6,SW_MUX_CTL_PAD_KEY_COL6 Register" bitfld.long 0x138 4. " SION ,Force input path of pad KEY_COL6" "Not forced,Forced" bitfld.long 0x138 0.--2. " MUX_MODE ,KEY_COL6 MUX Mode" "KEY_COL6,UART4_RX_DATA,LCD_DATA12,EIM_AD12,SD4_DATA2,GPIO4_IO04,SD3_RESET,?..." line.long 0x13C "SW_MUX_CTL_PAD_KEY_COL7,SW_MUX_CTL_PAD_KEY_COL7 Register" bitfld.long 0x13C 4. " SION ,Force input path of pad KEY_COL7" "Not forced,Forced" bitfld.long 0x13C 0.--2. " MUX_MODE ,KEY_COL7 MUX Mode" "KEY_COL7,UART4_RTS_B,LCD_DATA14,EIM_AD14,SD4_DATA4,GPIO4_IO06,SD1_WP,?..." line.long 0x140 "SW_MUX_CTL_PAD_KEY_ROW0,SW_MUX_CTL_PAD_KEY_ROW0 Register" bitfld.long 0x140 4. " SION ,Force input path of pad KEY_ROW0" "Not forced,Forced" bitfld.long 0x140 0.--2. " MUX_MODE ,KEY_ROW0 MUX Mode" "KEY_ROW0,I2C2_SDA,LCD_DATA01,EIM_AD01,SD1_WP,GPIO3_IO25,MSHC_BS,?..." line.long 0x144 "SW_MUX_CTL_PAD_KEY_ROW1,SW_MUX_CTL_PAD_KEY_ROW1 Register" bitfld.long 0x144 4. " SION ,Force input path of pad KEY_ROW1" "Not forced,Forced" bitfld.long 0x144 0.--2. " MUX_MODE ,KEY_ROW1 MUX Mode" "KEY_ROW1,ECSPI4_MISO,LCD_DATA03,EIM_AD03,SD3_DATA5,GPIO3_IO27,MSHC_DATA1,?..." line.long 0x148 "SW_MUX_CTL_PAD_KEY_ROW2,SW_MUX_CTL_PAD_KEY_ROW2 Register" bitfld.long 0x148 4. " SION ,Force input path of pad KEY_ROW2" "Not forced,Forced" bitfld.long 0x148 0.--2. " MUX_MODE ,KEY_ROW2 MUX Mode" "KEY_ROW2,ECSPI4_SCLK,LCD_DATA05,EIM_AD05,SD3_DATA7,GPIO3_IO29,MSHC_DATA3,?..." line.long 0x14C "SW_MUX_CTL_PAD_KEY_ROW3,SW_MUX_CTL_PAD_KEY_ROW3 Register" bitfld.long 0x14C 4. " SION ,Force input path of pad KEY_ROW3" "Not forced,Forced" bitfld.long 0x14C 0.--2. " MUX_MODE ,KEY_ROW3 MUX Mode" "KEY_ROW3,AUD6_RXC,LCD_DATA07,EIM_AD07,SD4_DATA7,GPIO3_IO31,SD1_VSELECT,?..." line.long 0x150 "SW_MUX_CTL_PAD_KEY_ROW4,SW_MUX_CTL_PAD_KEY_ROW4 Register" bitfld.long 0x150 4. " SION ,Force input path of pad KEY_ROW4" "Not forced,Forced" bitfld.long 0x150 0.--2. " MUX_MODE ,KEY_ROW4 MUX Mode" "KEY_ROW4,AUD6_TXC,LCD_DATA09,EIM_AD09,SD4_CMD,GPIO4_IO01,USB_OTG1_OC,?..." line.long 0x154 "SW_MUX_CTL_PAD_KEY_ROW5,SW_MUX_CTL_PAD_KEY_ROW5 Register" bitfld.long 0x154 4. " SION ,Force input path of pad KEY_ROW5" "Not forced,Forced" bitfld.long 0x154 0.--2. " MUX_MODE ,KEY_ROW5 MUX Mode" "KEY_ROW5,AUD6_TXD,LCD_DATA11,EIM_AD11,SD4_DATA1,GPIO4_IO03,USB_OTG2_OC,?..." line.long 0x158 "SW_MUX_CTL_PAD_KEY_ROW6,SW_MUX_CTL_PAD_KEY_ROW6 Register" bitfld.long 0x158 4. " SION ,Force input path of pad KEY_ROW6" "Not forced,Forced" bitfld.long 0x158 0.--2. " MUX_MODE ,KEY_ROW6 MUX Mode" "KEY_ROW6,UART4_TX_DATA,LCD_DATA13,EIM_AD13,SD4_DATA3,GPIO4_IO05,SD3_VSELECT,?..." line.long 0x15C "SW_MUX_CTL_PAD_KEY_ROW7,SW_MUX_CTL_PAD_KEY_ROW7 Register" bitfld.long 0x15C 4. " SION ,Force input path of pad KEY_ROW7" "Not forced,Forced" bitfld.long 0x15C 0.--2. " MUX_MODE ,KEY_ROW7 MUX Mode" "KEY_ROW7,UART4_CTS_B,LCD_DATA15,EIM_AD15,SD4_DATA5,GPIO4_IO07,SD1_CD_B,?..." line.long 0x160 "SW_MUX_CTL_PAD_LCD_CLK,SW_MUX_CTL_PAD_LCD_CLK Register" bitfld.long 0x160 4. " SION ,Force input path of pad LCD_CLK" "Not forced,Forced" bitfld.long 0x160 0.--2. " MUX_MODE ,LCD_CLK MUX Mode" "LCD_CLK,SD4_DATA4,LCD_WR_RWN,EIM_RW,PWM4_OUT,GPIO2_IO15,?..." line.long 0x164 "SW_MUX_CTL_PAD_LCD_DATA00,SW_MUX_CTL_PAD_LCD_DATA00 Register" bitfld.long 0x164 4. " SION ,Force input path of pad LCD_DATA00" "Not forced,Forced" bitfld.long 0x164 0.--2. " MUX_MODE ,LCD_DATA00 MUX Mode" "LCD_DATA00,ECSPI1_MOSI,USB_OTG2_ID,PWM1_OUT,UART5_DTR_B,GPIO2_IO20,ARM_TRACE00,SRC_BOOT_CFG00" line.long 0x168 "SW_MUX_CTL_PAD_LCD_DATA01,SW_MUX_CTL_PAD_LCD_DATA01 Register" bitfld.long 0x168 4. " SION ,Force input path of pad LCD_DATA01" "Not forced,Forced" bitfld.long 0x168 0.--2. " MUX_MODE ,LCD_DATA01 MUX Mode" "LCD_DATA01,ECSPI1_MOSO,USB_OTG1_ID,PWM2_OUT,AUD4_RXFS,GPIO2_IO21,ARM_TRACE01,SRC_BOOT_CFG01" line.long 0x16C "SW_MUX_CTL_PAD_LCD_DATA10,SW_MUX_CTL_PAD_LCD_DATA10 Register" bitfld.long 0x16C 4. " SION ,Force input path of pad LCD_DATA10" "Not forced,Forced" bitfld.long 0x16C 0.--2. " MUX_MODE ,LCD_DATA10 MUX Mode" "LCD_DATA10,KEY_COL1,CSI_DATA07,EIM_DATA04,ECSPI2_MISO,GPIO2_IO30,ARM_TRACE10,SRC_BOOT_CFG10" line.long 0x170 "SW_MUX_CTL_PAD_LCD_DATA11,SW_MUX_CTL_PAD_LCD_DATA11 Register" bitfld.long 0x170 4. " SION ,Force input path of pad LCD_DATA11" "Not forced,Forced" bitfld.long 0x170 0.--2. " MUX_MODE ,LCD_DATA11 MUX Mode" "LCD_DATA11,KEY_ROW1,CSI_DATA06,EIM_DATA05,ECSPI2_SS1,GPIO2_IO31,ARM_TRACE11,SRC_BOOT_CFG11" line.long 0x174 "SW_MUX_CTL_PAD_LCD_DATA12,SW_MUX_CTL_PAD_LCD_DATA12 Register" bitfld.long 0x174 4. " SION ,Force input path of pad LCD_DATA12" "Not forced,Forced" bitfld.long 0x174 0.--2. " MUX_MODE ,LCD_DATA12 MUX Mode" "LCD_DATA12,KEY_COL2,CSI_DATA05,EIM_DATA06,UART5_RTS_B,GPIO3_IO00,ARM_TRACE12,SRC_BOOT_CFG12" line.long 0x178 "SW_MUX_CTL_PAD_LCD_DATA13,SW_MUX_CTL_PAD_LCD_DATA13 Register" bitfld.long 0x178 4. " SION ,Force input path of pad LCD_DATA13" "Not forced,Forced" bitfld.long 0x178 0.--2. " MUX_MODE ,LCD_DATA13 MUX Mode" "LCD_DATA13,KEY_ROW2,CSI_DATA04,EIM_DATA07,UART5_CTS_B,GPIO3_IO01,ARM_TRACE13,SRC_BOOT_CFG13" line.long 0x17C "SW_MUX_CTL_PAD_LCD_DATA14,SW_MUX_CTL_PAD_LCD_DATA14 Register" bitfld.long 0x17C 4. " SION ,Force input path of pad LCD_DATA14" "Not forced,Forced" bitfld.long 0x17C 0.--2. " MUX_MODE ,LCD_DATA14 MUX Mode" "LCD_DATA14,KEY_COL3,CSI_DATA03,EIM_DATA08,UART5_RX_DATA,GPIO3_IO02,ARM_TRACE14,SRC_BOOT_CFG14" line.long 0x180 "SW_MUX_CTL_PAD_LCD_DATA15,SW_MUX_CTL_PAD_LCD_DATA15 Register" bitfld.long 0x180 4. " SION ,Force input path of pad LCD_DATA15" "Not forced,Forced" bitfld.long 0x180 0.--2. " MUX_MODE ,LCD_DATA15 MUX Mode" "LCD_DATA15,KEY_ROW3,CSI_DATA02,EIM_DATA09,UART5_TX_DATA,GPIO3_IO03,ARM_TRACE15,SRC_BOOT_CFG15" line.long 0x184 "SW_MUX_CTL_PAD_LCD_DATA16,SW_MUX_CTL_PAD_LCD_DATA16 Register" bitfld.long 0x184 4. " SION ,Force input path of pad LCD_DATA16" "Not forced,Forced" bitfld.long 0x184 0.--2. " MUX_MODE ,LCD_DATA16 MUX Mode" "LCD_DATA16,KEY_COL4,CSI_DATA01,EIM_DATA10,I2C2_SCL,GPIO3_IO04,ARM_TRACE16,SRC_BOOT_CFG24" line.long 0x188 "SW_MUX_CTL_PAD_LCD_DATA17,SW_MUX_CTL_PAD_LCD_DATA17 Register" bitfld.long 0x188 4. " SION ,Force input path of pad LCD_DATA17" "Not forced,Forced" bitfld.long 0x188 0.--2. " MUX_MODE ,LCD_DATA17 MUX Mode" "LCD_DATA17,KEY_ROW4,CSI_DATA00,EIM_DATA11,I2C2_SDA,GPIO3_IO05,ARM_TRACE17,SRC_BOOT_CFG25" line.long 0x18C "SW_MUX_CTL_PAD_LCD_DATA18,SW_MUX_CTL_PAD_LCD_DATA18 Register" bitfld.long 0x18C 4. " SION ,Force input path of pad LCD_DATA18" "Not forced,Forced" bitfld.long 0x18C 0.--2. " MUX_MODE ,LCD_DATA18 MUX Mode" "LCD_DATA18,KEY_COL5,CSI_DATA15,EIM_DATA12,GPT_CAPTURE1,GPIO3_IO06,ARM_TRACE18,SRC_BOOT_CFG26" line.long 0x190 "SW_MUX_CTL_PAD_LCD_DATA19,SW_MUX_CTL_PAD_LCD_DATA19 Register" bitfld.long 0x190 4. " SION ,Force input path of pad LCD_DATA19" "Not forced,Forced" bitfld.long 0x190 0.--2. " MUX_MODE ,LCD_DATA19 MUX Mode" "LCD_DATA19,KEY_ROW5,CSI_DATA14,EIM_DATA13,GPT_CAPTURE2,GPIO3_IO07,ARM_TRACE19,SRC_BOOT_CFG27" line.long 0x194 "SW_MUX_CTL_PAD_LCD_DATA02,SW_MUX_CTL_PAD_LCD_DATA02 Register" bitfld.long 0x194 4. " SION ,Force input path of pad LCD_DATA02" "Not forced,Forced" bitfld.long 0x194 0.--2. " MUX_MODE ,LCD_DATA02 MUX Mode" "LCD_DATA02,ECSPI1_SS0,EPIT2_OUT,PWM3_OUT,AUD4_RXC,GPIO2_IO22,ARM_TRACE02,SRC_BOOT_CFG02" line.long 0x198 "SW_MUX_CTL_PAD_LCD_DATA20,SW_MUX_CTL_PAD_LCD_DATA20 Register" bitfld.long 0x198 4. " SION ,Force input path of pad LCD_DATA20" "Not forced,Forced" bitfld.long 0x198 0.--2. " MUX_MODE ,LCD_DATA20 MUX Mode" "LCD_DATA20,KEY_COL6,CSI_DATA13,EIM_DATA14,GPT_COMPARE1,GPIO3_IO08,ARM_TRACE20,SRC_BOOT_CFG28" line.long 0x19C "SW_MUX_CTL_PAD_LCD_DATA21,SW_MUX_CTL_PAD_LCD_DATA21 Register" bitfld.long 0x19C 4. " SION ,Force input path of pad LCD_DATA21" "Not forced,Forced" bitfld.long 0x19C 0.--2. " MUX_MODE ,LCD_DATA21 MUX Mode" "LCD_DATA21,KEY_ROW6,CSI_DATA12,EIM_DATA15,GPT_COMPARE2,GPIO3_IO09,ARM_TRACE21,SRC_BOOT_CFG29" line.long 0x1A0 "SW_MUX_CTL_PAD_LCD_DATA22,SW_MUX_CTL_PAD_LCD_DATA22 Register" bitfld.long 0x1A0 4. " SION ,Force input path of pad LCD_DATA22" "Not forced,Forced" bitfld.long 0x1A0 0.--2. " MUX_MODE ,LCD_DATA22 MUX Mode" "LCD_DATA12,KEY_COL7,CSI_DATA11,EIM_EB3_B,GPT_COMPARE3,GPIO3_IO10,ARM_TRACE22,SRC_BOOT_CFG30" line.long 0x1A4 "SW_MUX_CTL_PAD_LCD_DATA23,SW_MUX_CTL_PAD_LCD_DATA23 Register" bitfld.long 0x1A4 4. " SION ,Force input path of pad LCD_DATA23" "Not forced,Forced" bitfld.long 0x1A4 0.--2. " MUX_MODE ,LCD_DATA23 MUX Mode" "LCD_DATA23,KEY_ROW7,CSI_DATA10,EIM_EB2_B,GPT_CLKIN,GPIO3_IO11,ARM_TRACE23,SRC_BOOT_CFG31" line.long 0x1A8 "SW_MUX_CTL_PAD_LCD_DATA03,SW_MUX_CTL_PAD_LCD_DATA03 Register" bitfld.long 0x1A8 4. " SION ,Force input path of pad LCD_DATA03" "Not forced,Forced" bitfld.long 0x1A8 0.--2. " MUX_MODE ,LCD_DATA03 MUX Mode" "LCD_DATA03,ECSPI1_SCLK,UART5_DSR_B,PWM4_OUT,AUD4_RXD,GPIO2_IO23,ARM_TRACE03,SRC_BOOT_CFG03" line.long 0x1AC "SW_MUX_CTL_PAD_LCD_DATA04,SW_MUX_CTL_PAD_LCD_DATA04 Register" bitfld.long 0x1AC 4. " SION ,Force input path of pad LCD_DATA04" "Not forced,Forced" bitfld.long 0x1AC 0.--2. " MUX_MODE ,LCD_DATA04 MUX Mode" "LCD_DATA04,ECSPI1_SS1,CSI_VSYNC,WDOG2_RESET_B_DEB,AUD4_TXC,GPIO2_IO24,ARM_TRACE04,SRC_BOOT_CFG04" line.long 0x1B0 "SW_MUX_CTL_PAD_LCD_DATA05,SW_MUX_CTL_PAD_LCD_DATA05 Register" bitfld.long 0x1B0 4. " SION ,Force input path of pad LCD_DATA05" "Not forced,Forced" bitfld.long 0x1B0 0.--2. " MUX_MODE ,LCD_DATA05 MUX Mode" "LCD_DATA05,ECSPI1_SS2,CSI_HSYNC,EIM_CS3_B,AUD4_TXFS,GPIO2_IO25,ARM_TRACE05,SRC_BOOT_CFG05" line.long 0x1B4 "SW_MUX_CTL_PAD_LCD_DATA06,SW_MUX_CTL_PAD_LCD_DATA06 Register" bitfld.long 0x1B4 4. " SION ,Force input path of pad LCD_DATA06" "Not forced,Forced" bitfld.long 0x1B4 0.--2. " MUX_MODE ,LCD_DATA06 MUX Mode" "LCD_DATA06,ECSPI1_SS3,CSI_PIXCLK,EIM_DATA00,AUD4_TXD,GPIO2_IO26,ARM_TRACE06,SRC_BOOT_CFG06" line.long 0x1B8 "SW_MUX_CTL_PAD_LCD_DATA07,SW_MUX_CTL_PAD_LCD_DATA07 Register" bitfld.long 0x1B8 4. " SION ,Force input path of pad LCD_DATA07" "Not forced,Forced" bitfld.long 0x1B8 0.--2. " MUX_MODE ,LCD_DATA07 MUX Mode" "LCD_DATA07,ECSPI1_RDY,CSI_MCLK,EIM_DATA01,AUDIO_CLK_OUT,GPIO2_IO27,ARM_TRACE07,SRC_BOOT_CFG07" line.long 0x1BC "SW_MUX_CTL_PAD_LCD_DATA08,SW_MUX_CTL_PAD_LCD_DATA08 Register" bitfld.long 0x1BC 4. " SION ,Force input path of pad LCD_DATA08" "Not forced,Forced" bitfld.long 0x1BC 0.--2. " MUX_MODE ,LCD_DATA08 MUX Mode" "LCD_DATA08,KEY_COL0,CSI_DATA09,EIM_DATA02,ECSPI2_SCLK,GPIO2_IO28,ARM_TRACE08,SRC_BOOT_CFG08" line.long 0x1C0 "SW_MUX_CTL_PAD_LCD_DATA09,SW_MUX_CTL_PAD_LCD_DATA09 Register" bitfld.long 0x1C0 4. " SION ,Force input path of pad LCD_DATA09" "Not forced,Forced" bitfld.long 0x1C0 0.--2. " MUX_MODE ,LCD_DATA09 MUX Mode" "LCD_DATA09,KEY_ROW0,CSI_DATA08,EIM_DATA03,ECSPI2_MOSI,GPIO2_IO29,ARM_TRACE09,SRC_BOOT_CFG09" line.long 0x1C4 "SW_MUX_CTL_PAD_LCD_ENABLE,SW_MUX_CTL_PAD_LCD_ENABLE Register" bitfld.long 0x1C4 4. " SION ,Force input path of pad LCD_ENABLE" "Not forced,Forced" bitfld.long 0x1C4 0.--2. " MUX_MODE ,LCD_ENABLE MUX Mode" "LCD_ENABLE,SD4_DATA5,LCD_RD_E,EIM_OE_B,UART2_RX_DATA,GPIO2_IO16,?..." line.long 0x1C8 "SW_MUX_CTL_PAD_LCD_HSYNC,SW_MUX_CTL_PAD_LCD_HSYNC Register" bitfld.long 0x1C8 4. " SION ,Force input path of pad LCD_HSYNC" "Not forced,Forced" bitfld.long 0x1C8 0.--2. " MUX_MODE ,LCD_HSYNC MUX Mode" "LCD_HSYNC,SD4_DATA6,LCD_CS,EIM_CS0_B,UART2_TX_DATA,GPIO2_IO17,ARM_TRACE_CLK,?..." line.long 0x1CC "SW_MUX_CTL_PAD_LCD_RESET,SW_MUX_CTL_LCD_RESET Register" bitfld.long 0x1CC 4. " SION ,Force input path of pad LCD_RESET" "Not forced,Forced" bitfld.long 0x1CC 0.--2. " MUX_MODE ,LCD_RESET MUX Mode" "LCD_RESET,EIM_DTACK_B,LCD_BUSY,EIM_WAIT_B,UART2_CTS_B,GPIO2_IO19,CCM_PMIC_READY,?..." line.long 0x1D0 "SW_MUX_CTL_PAD_LCD_VSYNC,SW_MUX_CTL_PAD_LCD_VSYNC Register" bitfld.long 0x1D0 4. " SION ,Force input path of pad LCD_VSYNC" "Not forced,Forced" bitfld.long 0x1D0 0.--2. " MUX_MODE ,LCD_VSYNC MUX Mode" "LCD_VSYNC,SD4_DATA7,LCD_RS,EIM_CS1_B,UART2_RTS_B,GPIO2_IO18,ARM_TRACE_CTL,?..." line.long 0x1D4 "SW_MUX_CTL_PAD_PWM1,SW_MUX_CTL_PAD_PWM1 Register" bitfld.long 0x1D4 4. " SION ,Force input path of pad PWM1" "Not forced,Forced" bitfld.long 0x1D4 0.--2. " MUX_MODE ,PWM1 MUX Mode" "PWM1_OUT,CCM_CLKO,AUDIO_CLK_OUT,FEC_REF_OUT,CSI_MCLK,GPIO3_IO23,EPIT1_OUT,?..." line.long 0x1D8 "SW_MUX_CTL_PAD_REF_CLK_24M,SW_MUX_CTL_PAD_REF_CLK_24M Register" bitfld.long 0x1D8 4. " SION ,Force input path of pad REF_CLK_24M" "Not forced,Forced" bitfld.long 0x1D8 0.--2. " MUX_MODE ,REF_CLK_24M MUX Mode" "XTALOSC_REF_CLK_24M,I2C3_SCL,PWM3_OUT,USB_OTG2_ID,CCM_PMIC_READY,GPIO3_IO21,SD3_WP,?..." line.long 0x1DC "SW_MUX_CTL_PAD_REF_CLK_32K,SW_MUX_CTL_PAD_REF_CLK_32K Register" bitfld.long 0x1DC 4. " SION ,Force input path of pad REF_CLK_32K" "Not forced,Forced" bitfld.long 0x1DC 0.--2. " MUX_MODE ,REF_CLK_32K MUX Mode" "XTALOSC_REF_CLK_32K,I2C3_SDA,PWM4_OUT,USB_OTG1_ID,SD1_LCTL,GPIO3_IO22,SD3_CD_B,?..." line.long 0x1E0 "SW_MUX_CTL_PAD_SD1_CLK,SW_MUX_CTL_PAD_SD1_CLK Register" bitfld.long 0x1E0 4. " SION ,Force input path of pad SD1_CLK" "Not forced,Forced" bitfld.long 0x1E0 0.--2. " MUX_MODE ,SD1_CLK MUX Mode" "SD1_CLK,FEC_MDIO,KEY_COL0,EPDC_SDCE4,MSHC_SCLK,GPIO5_IO15,?..." line.long 0x1E4 "SW_MUX_CTL_PAD_SD1_CMD,SW_MUX_CTL_PAD_SD1_CMD Register" bitfld.long 0x1E4 4. " SION ,Force input path of pad SD1_CMD" "Not forced,Forced" bitfld.long 0x1E4 0.--2. " MUX_MODE ,SD1_CMD MUX Mode" "SD1_CMD,FEC_TX_CLK,KEY_ROW0,EPDC_SDCE5,MSHC_BS,GPIO5_IO14,?..." line.long 0x1E8 "SW_MUX_CTL_PAD_SD1_DATA0,SW_MUX_CTL_PAD_SD1_DATA0 Register" bitfld.long 0x1E8 4. " SION ,Force input path of pad SD1_DATA0" "Not forced,Forced" bitfld.long 0x1E8 0.--2. " MUX_MODE ,SD1_DATA0 MUX Mode" "SD1_DATA0,FEC_RX_ER,KEY_COL1,EPDC_SDCE6,MSHC_DATA0,GPIO5_IO11,?..." line.long 0x1EC "SW_MUX_CTL_PAD_SD1_DATA1,SW_MUX_CTL_PAD_SD1_DATA1 Register" bitfld.long 0x1EC 4. " SION ,Force input path of pad SD1_DATA1" "Not forced,Forced" bitfld.long 0x1EC 0.--2. " MUX_MODE ,SD1_DATA1 MUX Mode" "SD1_DATA1,FEC_RX_DV,KEY_ROW1,EPDC_SDCE7,MSHC_DATA1,GPIO5_IO08,?..." line.long 0x1F0 "SW_MUX_CTL_PAD_SD1_DATA2,SW_MUX_CTL_PAD_SD1_DATA2 Register" bitfld.long 0x1F0 4. " SION ,Force input path of pad SD1_DATA2" "Not forced,Forced" bitfld.long 0x1F0 0.--2. " MUX_MODE ,SD1_DATA2 MUX Mode" "SD1_DATA2,FEC_RX_DATA1,KEY_COL2,EPDC_SDCE8,MSHC_DATA2,GPIO5_IO13,?..." line.long 0x1F4 "SW_MUX_CTL_PAD_SD1_DATA3,SW_MUX_CTL_PAD_SD1_DATA3 Register" bitfld.long 0x1F4 4. " SION ,Force input path of pad SD1_DATA3" "Not forced,Forced" bitfld.long 0x1F4 0.--2. " MUX_MODE ,SD1_DATA3 MUX Mode" "SD1_DATA3,FEC_TX_DATA0,KEY_ROW2,EPDC_SDCE9,MSHC_DATA3,GPIO5_IO06,?..." line.long 0x1F8 "SW_MUX_CTL_PAD_SD1_DATA4,SW_MUX_CTL_PAD_SD1_DATA4 Register" bitfld.long 0x1F8 4. " SION ,Force input path of pad SD1_DATA4" "Not forced,Forced" bitfld.long 0x1F8 0.--2. " MUX_MODE ,SD1_DATA4 MUX Mode" "SD1_DATA4,FEC_MDC,KEY_COL3,EPDC_SDCLK_N,UART4_RX_DATA,GPIO5_IO12,?..." line.long 0x1FC "SW_MUX_CTL_PAD_SD1_DATA5,SW_MUX_CTL_PAD_SD1_DATA5 Register" bitfld.long 0x1FC 4. " SION ,Force input path of pad SD1_DATA5" "Not forced,Forced" bitfld.long 0x1FC 0.--2. " MUX_MODE ,SD1_DATA5 MUX Mode" "SD1_DATA5,FEC_RX_DATA0,KEY_ROW3,EPDC_SDOED,UART4_TX_DATA,GPIO5_IO09,?..." line.long 0x200 "SW_MUX_CTL_PAD_SD1_DATA6,SW_MUX_CTL_PAD_SD1_DATA6 Register" bitfld.long 0x200 4. " SION ,Force input path of pad SD1_DATA6" "Not forced,Forced" bitfld.long 0x200 0.--2. " MUX_MODE ,SD1_DATA6 MUX Mode" "SD1_DATA6,FEC_TX_EN,KEY_COL4,EPDC_SDOEZ,UART4_RTS_B,GPIO5_IO07,?..." line.long 0x204 "SW_MUX_CTL_PAD_SD1_DATA7,SW_MUX_CTL_PAD_SD1_DATA7 Register" bitfld.long 0x204 4. " SION ,Force input path of pad SD1_DATA7" "Not forced,Forced" bitfld.long 0x204 0.--2. " MUX_MODE ,SD1_DATA7 MUX Mode" "SD1_DATA7,FEC_TX_DATA1,KEY_ROW4,CCM_PMIC_READY,UART4_CTS_B,GPIO5_IO10,?..." line.long 0x208 "SW_MUX_CTL_PAD_SD2_CLK,SW_MUX_CTL_PAD_SD2_CLK Register" bitfld.long 0x208 4. " SION ,Force input path of pad SD2_CLK" "Not forced,Forced" bitfld.long 0x208 0.--2. " MUX_MODE ,SD2_CLK MUX Mode" "SD2_CLK,AUD4_RXFS,ECSPI3_SCLK,CSI_DAT00,,GPIO5_IO05,?..." line.long 0x20C "SW_MUX_CTL_PAD_SD2_CMD,SW_MUX_CTL_PAD_SD2_CMD Register" bitfld.long 0x20C 4. " SION ,Force input path of pad SD2_CMD" "Not forced,Forced" bitfld.long 0x20C 0.--2. " MUX_MODE ,SD2_CMD MUX Mode" "SD2_CMD,AUD4_RXC,ECSPI3_SS0,CSI_DATA01,EPIT1_OUT,GPIO5_IO04,?..." line.long 0x210 "SW_MUX_CTL_PAD_SD2_DATA0,SW_MUX_CTL_PAD_SD2_DATA0 Register" bitfld.long 0x210 4. " SION ,Force input path of pad SD2_DATA0" "Not forced,Forced" bitfld.long 0x210 0.--2. " MUX_MODE ,SD2_DATA0 MUX Mode" "SD2_DATA0,AUD4_RXD,ECSPI3_MOSI,CSI_DATA02,UART5_RTS_B,GPIO5_IO01,?..." line.long 0x214 "SW_MUX_CTL_PAD_SD2_DATA1,SW_MUX_CTL_PAD_SD2_DATA1 Register" bitfld.long 0x214 4. " SION ,Force input path of pad SD2_DATA1" "Not forced,Forced" bitfld.long 0x214 0.--2. " MUX_MODE ,SD2_DATA1 MUX Mode" "SD2_DATA1,AUD4_TXC,ECSPI3_MISO,CSI_DATA03,UART5_CTS_B,GPIO4_IO30,?..." line.long 0x218 "SW_MUX_CTL_PAD_SD2_DATA2,SW_MUX_CTL_PAD_SD2_DATA2 Register" bitfld.long 0x218 4. " SION ,Force input path of pad SD2_DATA2" "Not forced,Forced" bitfld.long 0x218 0.--2. " MUX_MODE ,SD2_DATA2 MUX Mode" "SD2_DATA2,AUD4_TXFS,FEC_COL,CSI_DATA04,UART5_RX_DATA,GPIO5_IO03,?..." line.long 0x21C "SW_MUX_CTL_PAD_SD2_DATA3,SW_MUX_CTL_PAD_SD2_DATA3 Register" bitfld.long 0x21C 4. " SION ,Force input path of pad SD2_DATA3" "Not forced,Forced" bitfld.long 0x21C 0.--2. " MUX_MODE ,SD2_DATA3 MUX Mode" "SD2_DATA3,AUD4_TXD,FEC_RX_CLK,CSI_DATA05,UART5_TX_DATA,GPIO4_IO28,?..." line.long 0x220 "SW_MUX_CTL_PAD_SD2_DATA4,SW_MUX_CTL_PAD_SD2_DATA4 Register" bitfld.long 0x220 4. " SION ,Force input path of pad SD2_DATA4" "Not forced,Forced" bitfld.long 0x220 0.--2. " MUX_MODE ,SD2_DATA4 MUX Mode" "SD2_DATA4,SD3_DATA4,UART2_RX_DATA,CSI_DATA06,SPDIF_OUT,GPIO5_IO02,?..." line.long 0x224 "SW_MUX_CTL_PAD_SD2_DATA5,SW_MUX_CTL_PAD_SD2_DATA5 Register" bitfld.long 0x224 4. " SION ,Force input path of pad SD2_DATA5" "Not forced,Forced" bitfld.long 0x224 0.--2. " MUX_MODE ,SD2_DATA5 MUX Mode" "SD2_DATA5,SD3_DATA5,UART2_TX_DATA,CSI_DATA07,SPDIF_IN,GPIO4_IO31,?..." line.long 0x228 "SW_MUX_CTL_PAD_SD2_DATA6,SW_MUX_CTL_PAD_SD2_DATA6 Register" bitfld.long 0x228 4. " SION ,Force input path of pad SD2_DATA6" "Not forced,Forced" bitfld.long 0x228 0.--2. " MUX_MODE ,SD2_DATA6 MUX Mode" "SD2_DATA6,SD3_DATA6,UART2_RTS_B,CSI_DATA08,SD2_WP,GPIO4_IO29,?..." line.long 0x22C "SW_MUX_CTL_PAD_SD2_DATA7,SW_MUX_CTL_PAD_SD2_DATA7 Register" bitfld.long 0x22C 4. " SION ,Force input path of pad SD2_DATA7" "Not forced,Forced" bitfld.long 0x22C 0.--2. " MUX_MODE ,SD2_DATA7 MUX Mode" "SD2_DATA7,SD3_DATA7,UART2_CTS_B,CSI_DATA09,SD2_CD_B,GPIO5_IO00,?..." line.long 0x230 "SW_MUX_CTL_PAD_SD2_RESET,SW_MUX_CTL_PAD_SD2_RESET Register" bitfld.long 0x230 4. " SION ,Force input path of pad SD2_RESET" "Not forced,Forced" bitfld.long 0x230 0.--2. " MUX_MODE ,SSD2_RESET MUX Mode" "SD2_RESET,FEC_REF_OUT,WDOG2_B,SPDIF_OUT,CSI_MCLK,GPIO4_IO27,?..." line.long 0x234 "SW_MUX_CTL_PAD_SD3_CLK,SW_MUX_CTL_PAD_SD3_CLK Register" bitfld.long 0x234 4. " SION ,Force input path of pad SD3_CLK" "Not forced,Forced" bitfld.long 0x234 0.--2. " MUX_MODE ,SD3_CLK MUX Mode" "SD3_CLK,AUD5_RXFS,KEY_COL5,CSI_DATA10,WDOG1_RESET_B_DEB,GPIO5_IO18,USB_OTG1_PWR,?..." line.long 0x238 "SW_MUX_CTL_PAD_SD3_CMD,SW_MUX_CTL_PAD_SD3_CMD Register" bitfld.long 0x238 4. " SION ,Force input path of pad SD3_CMD" "Not forced,Forced" bitfld.long 0x238 0.--2. " MUX_MODE ,SD3_CMD MUX Mode" "SD3_CMD,AUD5_RXC,KEY_ROW5,CSI_DATA11,USB_OTG2_ID,GPIO5_IO21,USB_OTG2_PWR,?..." line.long 0x23C "SW_MUX_CTL_PAD_SD3_DATA0,SW_MUX_CTL_PAD_SD3_DATA0 Register" bitfld.long 0x23C 4. " SION ,Force input path of pad SD3_DATA0" "Not forced,Forced" bitfld.long 0x23C 0.--2. " MUX_MODE ,SD3_DATA0 MUX Mode" "SD3_DATA0,AUD5_RXD,KEY_COL6,CSI_DATA12,USB_OTG1_ID,GPIO5_IO19,?..." line.long 0x240 "SW_MUX_CTL_PAD_SD3_DATA1,SW_MUX_CTL_PAD_SD3_DATA1 Register" bitfld.long 0x240 4. " SION ,Force input path of pad SD3_DATA1" "Not forced,Forced" bitfld.long 0x240 0.--2. " MUX_MODE ,SD3_DATA1 MUX Mode" "SD3_DATA1,AUD5_TXC,KEY_ROW6,CSI_DATA13,SD1_VSELECT,GPIO5_IO20,JTAG_DE_B,?..." line.long 0x244 "SW_MUX_CTL_PAD_SD3_DATA2,SW_MUX_CTL_PAD_SD3_DATA2 Register" bitfld.long 0x244 4. " SION ,Force input path of pad SD3_DATA2" "Not forced,Forced" bitfld.long 0x244 0.--2. " MUX_MODE ,SD3_DATA2 MUX Mode" "SD3_DATA2,AUD5_TXFS,KEY_COL7,CSI_DATA14,EPIT1_OUT,GPIO5_IO16,USB_OTG2_OC,?..." line.long 0x248 "SW_MUX_CTL_PAD_SD3_DATA3,SW_MUX_CTL_PAD_SD3_DATA3 Register" bitfld.long 0x248 4. " SION ,Force input path of pad SD3_DATA3" "Not forced,Forced" bitfld.long 0x248 0.--2. " MUX_MODE ,SD3_DATA3 MUX Mode" "SD3_DATA3,AUD5_TXD,KEY_ROW7,CSI_DATA15,EPIT2_OUT,GPIO5_IO17,USB_OTG1_OC,?..." line.long 0x24C "SW_MUX_CTL_PAD_UART1_RXD,SW_MUX_CTL_PAD_UART1_RXD Register" bitfld.long 0x24C 4. " SION ,Force input path of pad UART1_RXD" "Not forced,Forced" bitfld.long 0x24C 0.--2. " MUX_MODE ,UART1_RXD MUX Mode" "UART1_RX_DATA,PWM1_OUT,UART4_RX_DATA,FEC_COL,UART5_RX_DATA,GPIO3_IO16,?..." line.long 0x250 "SW_MUX_CTL_PAD_UART1_TXD,SW_MUX_CTL_PAD_UART1_TXD Register" bitfld.long 0x250 4. " SION ,Force input path of pad UART1_TXD" "Not forced,Forced" bitfld.long 0x250 0.--2. " MUX_MODE ,UART1_TXD MUX Mode" "UART1_TX_DATA,PWM2_OUT,UART4_TX_DATA,FEC_RX_CLK,UART5_TX_DATA,GPIO3_IO17,,UART5_DCD_B" line.long 0x254 "SW_MUX_CTL_PAD_WDOG_B,SW_MUX_CTL_PAD_WDOG_B Register" bitfld.long 0x254 4. " SION ,Force input path of pad WDOG_B" "Not forced,Forced" bitfld.long 0x254 0.--2. " MUX_MODE ,WDOG_B MUX Mode" "WDOG1_B,WDOG1_RESET_B_DEB,UART5_RI_B,,,GPIO3_IO18,?..." tree.end tree "SW_PAD_CTL_PAD Registers" width 30. group.long 0x2A4++0x1B line.long 0x0 "SW_PAD_CTL_PAD_AUD_MCLK,SW_PAD_CTL_PAD_AUD_MCLK Register" bitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_AUD_RXC,SW_PAD_CTL_PAD_AUD_RXC Register" bitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_AUD_RXD,SW_PAD_CTL_PAD_AUD_RXD Register" bitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_AUD_RXFS,SW_PAD_CTL_PAD_AUD_RXFS Register" bitfld.long 0xC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_AUD_TXC,SW_PAD_CTL_PAD_AUD_TXC Register" bitfld.long 0x10 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_AUD_TXD,SW_PAD_CTL_PAD_AUD_TXD Register" bitfld.long 0x14 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_AUD_TXFS,SW_PAD_CTL_PAD_AUD_TXFS Register" bitfld.long 0x18 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" textline "" group.long 0x2C0++0x3F line.long 0x0 "SW_PAD_CTL_PAD_DRAM_ADDR00,SW_PAD_CTL_PAD_DRAM_ADDR00 Register" rbitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x0 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x4 "SW_PAD_CTL_PAD_DRAM_ADDR01,SW_PAD_CTL_PAD_DRAM_ADDR01 Register" rbitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x4 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x8 "SW_PAD_CTL_PAD_DRAM_ADDR10,SW_PAD_CTL_PAD_DRAM_ADDR10 Register" rbitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x8 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0xC "SW_PAD_CTL_PAD_DRAM_ADDR11,SW_PAD_CTL_PAD_DRAM_ADDR11 Register" rbitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0xC 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_DRAM_ADDR12,SW_PAD_CTL_PAD_DRAM_ADDR12 Register" rbitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_DRAM_ADDR13,SW_PAD_CTL_PAD_DRAM_ADDR13 Register" rbitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x18 "SW_PAD_CTL_PAD_DRAM_ADDR14,SW_PAD_CTL_PAD_DRAM_ADDR14 Register" rbitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_PAD_DRAM_ADDR15,SW_PAD_CTL_PAD_DRAM_ADDR15 Register" rbitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_PAD_DRAM_ADDR02,SW_PAD_CTL_PAD_DRAM_ADDR02 Register" rbitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x20 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x24 "SW_PAD_CTL_PAD_DRAM_ADDR03,SW_PAD_CTL_PAD_DRAM_ADDR03 Register" rbitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x24 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x28 "SW_PAD_CTL_PAD_DRAM_ADDR04,SW_PAD_CTL_PAD_DRAM_ADDR04 Register" rbitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x28 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_PAD_DRAM_ADDR05,SW_PAD_CTL_PAD_DRAM_ADDR05 Register" rbitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x30 "SW_PAD_CTL_PAD_DRAM_ADDR06,SW_PAD_CTL_PAD_DRAM_ADDR06 Register" rbitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x30 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x34 "SW_PAD_CTL_PAD_DRAM_ADDR07,SW_PAD_CTL_PAD_DRAM_ADDR07 Register" rbitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x34 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x38 "SW_PAD_CTL_PAD_DRAM_ADDR08,SW_PAD_CTL_PAD_DRAM_ADDR08 Register" rbitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x38 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x3C "SW_PAD_CTL_PAD_DRAM_ADDR09,SW_PAD_CTL_PAD_DRAM_ADDR09 Register" rbitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" group.long 0x300++0x57 line.long 0x00 "SW_PAD_CTL_PAD_DRAM_CAS_B,SW_PAD_CTL_PAD_DRAM_CAS_B Register" rbitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_PAD_DRAM_CS0_B,SW_PAD_CTL_PAD_DRAM_CS0_B Register" rbitfld.long 0x04 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x04 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x08 "SW_PAD_CTL_PAD_DRAM_CS1_B,SW_PAD_CTL_PAD_DRAM_CS1_B Register" rbitfld.long 0x08 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x08 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x0C "SW_PAD_CTL_PAD_DRAM_DQM0,SW_PAD_CTL_PAD_DRAM_DQM0 Register" rbitfld.long 0x0C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x0C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x0C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_DRAM_DQM1,SW_PAD_CTL_PAD_DRAM_DQM1 Register" rbitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_DRAM_DQM2,SW_PAD_CTL_PAD_DRAM_DQM2 Register" rbitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x18 "SW_PAD_CTL_PAD_DRAM_DQM3,SW_PAD_CTL_PAD_DRAM_DQM3 Register" rbitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_PAD_DRAM_RAS_B,SW_PAD_CTL_PAD_DRAM_RAS_B Register" rbitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_PAD_DRAM_RESET,SW_PAD_CTL_PAD_DRAM_RESET Register" bitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "DDR3_LPDDR2,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x24 "SW_PAD_CTL_PAD_DRAM_SDBA0,SW_PAD_CTL_PAD_DRAM_SDBA0 Register" rbitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x24 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x28 "SW_PAD_CTL_PAD_DRAM_SDBA1,SW_PAD_CTL_PAD_DRAM_SDBA1 Register" rbitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x28 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_PAD_DRAM_SDBA2,SW_PAD_CTL_PAD_DRAM_SDBA2 Register" rbitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x30 "SW_PAD_CTL_PAD_DRAM_SDCKE0,SW_PAD_CTL_PAD_DRAM_SDCKE0 Register" rbitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x30 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x34 "SW_PAAD_CTL_PAD_DRAM_SDCKE1,SW_PAD_CTL_PAD_DRAM_SDCKE1 Register" rbitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x34 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x38 "SW_PAD_CTL_PAD_DRAM_SDCLK0_P,SW_PAD_CTL_PAD_DRAM_SDCLK0_P Register" rbitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x3C "SW_PAD_CTL_PAD_DRAM_ODT0,SW_PAD_CTL_PAD_DRAM_ODT0 Register" rbitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x40 "SW_PAD_CTL_PAD_DRAM_ODT1,SW_PAD_CTL_PAD_DRAM_ODT1 Register" rbitfld.long 0x40 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x40 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" textline "" line.long 0x44 "SW_PD_CTL_PAD_DRAM_SDQS0_P,SW_PAD_CTL_PAD_DRAM_SDQS0_P Register" rbitfld.long 0x44 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" rbitfld.long 0x44 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" rbitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x44 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x48 "SW_PAD_CTL_PAD_DRAM_SDQS1_P,SW_PAD_CTL_PAD_DRAM_SDQS1_P Register" rbitfld.long 0x48 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" rbitfld.long 0x48 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" rbitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x48 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x4C "SW_PAD_CTL_PAD_DRAM_SDQS2_P,SW_PAD_CTL_PAD_DRAM_SDQS2_P Register" rbitfld.long 0x4C 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" rbitfld.long 0x4C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" rbitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x4C 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x50 "SW_PAD_CTL_PAD_DRAM_SDQS3_P,SW_PAD_CTL_PAD_DRAM_SDQS3_P Register" rbitfld.long 0x50 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" rbitfld.long 0x50 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" rbitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x50 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x54 "SW_PAD_CTL_PAD_DRAM_SDWE_B,SW_PAD_CTL_PAD_DRAM_SDWE_B Register" rbitfld.long 0x54 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" bitfld.long 0x54 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " rbitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" group.long 0x358++0x1F line.long 0x0 "SW_PAD_CTL_PAD_ECSPI1_MISO,SW_PAD_CTL_PAD_ECSPI1_MISO Register" bitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_ECSPI1_MOSI,SW_PAD_CTL_PAD_ECSPI1_MOSI Register" bitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_ECSPI1_SCLK,SW_PAD_CTL_PAD_ECSPI1_SCLK Register" bitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_ECSPI1_SS0,SW_PAD_CTL_PAD_ECSPI1_SS0 Register" bitfld.long 0xC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_ECSPI2_MISO,SW_PAD_CTL_PAD_ECSPI2_MISO Register" bitfld.long 0x10 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_ECSPI2_MOSI,SW_PAD_CTL_PAD_ECSPI2_MOSI Register" bitfld.long 0x14 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_ECSPI2_SCLK,SW_PAD_CTL_PAD_ECSPI2_SCLK Register" bitfld.long 0x18 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_ECSPI2_SS0,SW_PAD_CTL_PAD_ECSPI2_SS0 Register" bitfld.long 0x1C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x378++0xCB line.long 0x0 "SW_PAD_CTL_PAD_EPDC_BDR0,SW_PAD_CTL_PAD_EPDC_BDR0 Register" bitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_EPDC_BDR1,SW_PAD_CTL_PAD_EPDC_BDR1 Register" bitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_EPDC_DATA00,SW_PAD_CTL_PAD_EPDC_DATA00 Register" bitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_EPDC_DATA01,SW_PAD_CTL_PAD_EPDC_DATA01 Register" bitfld.long 0xC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_EPDC_DATA10,SW_PAD_CTL_PAD_EPDC_DATA10 Register" bitfld.long 0x10 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_EPDC_DATA11,SW_PAD_CTL_PAD_EPDC_DATA11 Register" bitfld.long 0x14 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_EPDC_DATA12,SW_PAD_CTL_PAD_EPDC_DATA12 Register" bitfld.long 0x18 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_EPDC_DATA13,SW_PAD_CTL_PAD_EPDC_DATA13 Register" bitfld.long 0x1C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_EPDC_DATA14,SW_PAD_CTL_PAD_EPDC_DATA14 Register" bitfld.long 0x20 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_EPDC_DATA15,SW_PAD_CTL_PAD_EPDC_DATA15 Register" bitfld.long 0x24 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_EPDC_DATA02,SW_PAD_CTL_PAD_EPDC_DATA02 Register" bitfld.long 0x28 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_EPDC_DATA03,SW_PAD_CTL_PAD_EPDC_DATA03 Register" bitfld.long 0x2C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_EPDC_DATA04,SW_PAD_CTL_PAD_EPDC_DATA04 Register" bitfld.long 0x30 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_EPDC_DATA05,SW_PAD_CTL_PAD_EPDC_DATA05 Register" bitfld.long 0x34 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_EPDC_DATA06,SW_PAD_CTL_PAD_EPDC_DATA06 Register" bitfld.long 0x38 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_EPDC_DATA07,SW_PAD_CTL_PAD_EPDC_DATA07 Register" bitfld.long 0x3C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_EPDC_DATA08,SW_PAD_CTL_PAD_EPDC_DATA08 Register" bitfld.long 0x40 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_EPDC_DATA09,SW_PAD_CTL_PAD_EPDC_DATA09 Register" bitfld.long 0x44 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_EPDC_GDCLK,SW_PAD_CTL_PAD_EPDC_GDCLK Register" bitfld.long 0x48 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_EPDC_GDOE,SW_PAD_CTL_PAD_EPDC_GDOE Register" bitfld.long 0x4C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_EPDC_GDRL,SW_PAD_CTL_PAD_EPDC_GDRL Register" bitfld.long 0x50 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_EPDC_GDSP,SW_PAD_CTL_PAD_EPDC_GDSP Register" bitfld.long 0x54 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_EPDC_PWR_COM,SW_PAD_CTL_PAD_EPDC_PWR_COM Register" bitfld.long 0x58 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_EPDC_PWR_CTRL0,SW_PAD_CTL_PAD_EPDC_PWR_CTRL0 Register" bitfld.long 0x5C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_EPDC_PWR_CTRL1,SW_PAD_CTL_PAD_EPDC_PWR_CTRL1 Register" bitfld.long 0x60 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_EPDC_PWR_CTRL2,SW_PAD_CTL_PAD_EPDC_PWR_CTRL2 Register" bitfld.long 0x64 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_EPDC_PWR_CTRL3,SW_PAD_CTL_PAD_EPDC_PWR_CTRL3 Register" bitfld.long 0x68 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_EPDC_PWR_IRQ,SW_PAD_CTL_PAD_EPDC_PWR_IRQ Register" bitfld.long 0x6C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_EPDC_PWR_STAT,SW_PAD_CTL_PAD_EPDC_PWR_STAT Register" bitfld.long 0x70 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_EPDC_PWR_WAKE,SW_PAD_CTL_PAD_EPDC_PWR_WAKE Register" bitfld.long 0x74 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_EPDC_SDCE0,SW_PAD_CTL_PAD_EPDC_SDCE0 Register" bitfld.long 0x78 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_EPDC_SDCE1,SW_PAD_CTL_PAD_EPDC_SDCE1 Register" bitfld.long 0x7C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_EPDC_SDCE2,SW_PAD_CTL_PAD_EPDC_SDCE2 Register" bitfld.long 0x80 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_EPDC_SDCE3,SW_PAD_CTL_PAD_EPDC_SDCE3 Register" bitfld.long 0x84 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x88 "SW_PAD_CTL_PAD_EPDC_SDCLK,SW_PAD_CTL_PAD_EPDC_SDCLK Register" bitfld.long 0x88 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x88 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x88 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x88 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x88 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x88 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x88 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x88 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x88 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8C "SW_PAD_CTL_PAD_EPDC_SDLE,SW_PAD_CTL_PAD_EPDC_SDLE Register" bitfld.long 0x8C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x90 "SW_PAD_CTL_PAD_EPDC_SDOE,SW_PAD_CTL_PAD_EPDC_SDOE Register" bitfld.long 0x90 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x90 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x90 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x90 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x90 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x90 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x90 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x90 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x90 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x94 "SW_PAD_CTL_PAD_EPDC_SDSHR,SW_PAD_CTL_PAD_EPDC_SDSHR Register" bitfld.long 0x94 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x94 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x94 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x94 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x94 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x94 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x94 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x94 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x94 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x98 "SW_PAD_CTL_PAD_EPDC_VCOM0,SW_PAD_CTL_PAD_EPDC_VCOM0 Register" bitfld.long 0x98 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x98 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x98 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x98 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x98 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x98 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x98 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x98 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x98 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x9C "SW_PAD_CTL_PAD_EPDC_VCOM1,SW_PAD_CTL_PAD_EPDC_VCOM1 Register" bitfld.long 0x9C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x9C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x9C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x9C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x9C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x9C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x9C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x9C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x9C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA0 "SW_PAD_CTL_PAD_FEC_CRS_DV,SW_PAD_CTL_PAD_FEC_CRS_DV Register" bitfld.long 0xA0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA4 "SW_PAD_CTL_PAD_FEC_MDC,SW_PAD_CTL_PAD_FEC_MDC Register" bitfld.long 0xA4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA8 "SW_PAD_CTL_PAD_FEC_MDIO,SW_PAD_CTL_PAD_FEC_MDIO Register" bitfld.long 0xA8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xAC "SW_PAD_CTL_PAD_FEC_REF_CLK,SW_PAD_CTL_PAD_FEC_REF_CLK Register" bitfld.long 0xAC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xAC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xAC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xAC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xAC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xAC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xAC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xAC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xAC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB0 "SW_PAD_CTL_PAD_FEC_RX_ER,SW_PAD_CTL_PAD_FEC_RX_ER Register" bitfld.long 0xB0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB4 "SW_PAD_CTL_PAD_FEC_RX_DATA0,SW_PAD_CTL_PAD_FEC_RX_DATA0 Register" bitfld.long 0xB4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB8 "SW_PAD_CTL_PAD_FEC_RX_DATA1,SW_PAD_CTL_PAD_FEC_RX_DATA1 Register" bitfld.long 0xB8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xBC "SW_PAD_CTL_PAD_FEC_TX_CLK,SW_PAD_CTL_PAD_FEC_TX_CLK Register" bitfld.long 0xBC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xBC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xBC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xBC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xBC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xBC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xBC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xBC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xBC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC0 "SW_PAD_CTL_PAD_FEC_TX_EN,SW_PAD_CTL_PAD_FEC_TX_EN Register" bitfld.long 0xC0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC4 "SW_PAD_CTL_PAD_FEC_TX_DATA0,SW_PAD_CTL_PAD_FEC_TX_DATA0 Register" bitfld.long 0xC4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC8 "SW_PAD_CTL_PAD_FEC_TX_DATA1,SW_PAD_CTL_PAD_FEC_TX_DATA1 Register" bitfld.long 0xC8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC8 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x444++0x07 line.long 0x00 "SW_PAD_CTL_PAD_USB_H_DATA,SW_PAD_CTL_PAD_USB_H_DATA Register" bitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" ",,1P2V_IO,1P5V_IO" bitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_PAD_USB_H_STROBE,SW_PAD_CTL_PAD_USB_H_STROBE Register" bitfld.long 0x04 18.--19. " DDR_SEL ,DDR Select" ",,1P2V_IO,1P5V_IO" bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" textline " " bitfld.long 0x04 13. " PUE ,Pull/keep Select" "Keep,Pull" bitfld.long 0x04 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x04 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" group.long 0x44C++0x0F line.long 0x0 "SW_PAD_CTL_PAD_I2C1_SCL,SW_PAD_CTL_PAD_I2C1_SCL Register" bitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_I2C1_SDA,SW_PAD_CTL_PAD_I2C1_SDA Register" bitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_I2C2_SCL,SW_PAD_CTL_PAD_I2C2_SCL Register" bitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_I2C2_SDA,SW_PAD_CTL_PAD_I2C2_SDA Register" bitfld.long 0xC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x45C++0x0B line.long 0x0 "SW_PAD_CTL_PAD_JTAG_MOD,SW_PAD_CTL_PAD_JTAG_MOD Register" rbitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" rbitfld.long 0x0 13. " PUE ,Pull/keep Select" ",Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,," rbitfld.long 0x0 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." textline " " rbitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x4 "SW_PAD_CTL_PAD_JTAG_TCK,SW_PAD_CTL_PAD_JTAG_TCK Register" rbitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" rbitfld.long 0x4 13. " PUE ,Pull/keep Select" ",Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,," rbitfld.long 0x4 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." textline " " rbitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x8 "SW_PAD_CTL_PAD_JTAG_TDI,SW_PAD_CTL_PAD_JTAG_TDI Register" rbitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" rbitfld.long 0x8 13. " PUE ,Pull/keep Select" ",Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,," rbitfld.long 0x8 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." textline " " rbitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,?..." group.long 0x468++0x0B line.long 0x00 "SW_PAD_CTL_PAD_JTAG_TDO,SW_PAD_CTL_PAD_JTAG_TDO Register" rbitfld.long 0x00 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" ",,100K Ohm Pull Up,?..." rbitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keep,?..." textline " " bitfld.long 0x00 12. "PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x00 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x00 6.--7. " SPEED ,Speed select" ",,100 MHz,?..." rbitfld.long 0x00 3.--5. " DSE ,Drive Strength" ",,,,,,40 Ohm,?..." textline " " rbitfld.long 0x00 0. "SRE ,Slew Rate" ",Fast" line.long 0x04 "SW_PAD_CTL_PAD_JTAG_TMS,SW_PAD_CTL_PAD_JTAG_TMS Register" rbitfld.long 0x04 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" rbitfld.long 0x04 13. " PUE ,Pull/keep Select" ",Pull" textline " " bitfld.long 0x04 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x04 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x04 6.--7. " SPEED ,Speed select" ",50MHz,," rbitfld.long 0x04 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." textline " " rbitfld.long 0x04 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x08 "SW_PAD_CTL_PAD_JTAG_TRSTB,SW_PAD_CTL_PAD_JTAG_TRSTB Register" rbitfld.long 0x08 22. " LVE ,Low Voltage Enable Field" "Disabled,?..." bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x08 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" rbitfld.long 0x08 13. " PUE ,Pull/keep Select" ",Pull" textline " " bitfld.long 0x08 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" rbitfld.long 0x08 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x08 6.--7. " SPEED ,Speed select" ",50MHz,," rbitfld.long 0x08 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." textline " " rbitfld.long 0x08 0. " SRE ,Slew Rate" "Slow,?..." group.long 0x474++0x137 line.long 0x0 "SW_PAD_CTL_PAD_KEY_COL0,SW_PAD_CTL_PAD_KEY_COL0 Register" bitfld.long 0x0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_KEY_COL1,SW_PAD_CTL_PAD_KEY_COL1 Register" bitfld.long 0x4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_KEY_COL2,SW_PAD_CTL_PAD_KEY_COL2 Register" bitfld.long 0x8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_KEY_COL3,SW_PAD_CTL_PAD_KEY_COL3 Register" bitfld.long 0xC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_KEY_COL4,SW_PAD_CTL_PAD_KEY_COL4 Register" bitfld.long 0x10 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_KEY_COL5,SW_PAD_CTL_PAD_KEY_COL5 Register" bitfld.long 0x14 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_KEY_COL6,SW_PAD_CTL_PAD_KEY_COL6 Register" bitfld.long 0x18 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_KEY_COL7,SW_PAD_CTL_PAD_KEY_COL7 Register" bitfld.long 0x1C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_KEY_ROW0,SW_PAD_CTL_PAD_KEY_ROW0 Register" bitfld.long 0x20 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_KEY_ROW1,SW_PAD_CTL_PAD_KEY_ROW1 Register" bitfld.long 0x24 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_KEY_ROW2,SW_PAD_CTL_PAD_KEY_ROW2 Register" bitfld.long 0x28 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_KEY_ROW3,SW_PAD_CTL_PAD_KEY_ROW3 Register" bitfld.long 0x2C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_KEY_ROW4,SW_PAD_CTL_PAD_KEY_ROW4 Register" bitfld.long 0x30 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_KEY_ROW5,SW_PAD_CTL_PAD_KEY_ROW5 Register" bitfld.long 0x34 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_KEY_ROW6,SW_PAD_CTL_PAD_KEY_ROW6 Register" bitfld.long 0x38 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_KEY_ROW7,SW_PAD_CTL_PAD_KEY_ROW7 Register" bitfld.long 0x3C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_LCD_CLK,SW_PAD_CTL_PAD_LCD_CLK Register" bitfld.long 0x40 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_LCD_DATA00,SW_PAD_CTL_PAD_LCD_DATA00 Register" bitfld.long 0x44 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_LCD_DATA01,SW_PAD_CTL_PAD_LCD_DATA01 Register" bitfld.long 0x48 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_LCD_DATA10,SW_PAD_CTL_PAD_LCD_DATA10 Register" bitfld.long 0x4C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_LCD_DATA11,SW_PAD_CTL_PAD_LCD_DATA11 Register" bitfld.long 0x50 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_LCD_DATA12,SW_PAD_CTL_PAD_LCD_DATA12 Register" bitfld.long 0x54 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_LCD_DATA13,SW_PAD_CTL_PAD_LCD_DATA13 Register" bitfld.long 0x58 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_LCD_DATA14,SW_PAD_CTL_PAD_LCD_DATA14 Register" bitfld.long 0x5C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_LCD_DATA15,SW_PAD_CTL_PAD_LCD_DATA15 Register" bitfld.long 0x60 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_LCD_DATA16,SW_PAD_CTL_PAD_LCD_DATA16 Register" bitfld.long 0x64 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_LCD_DATA17,SW_PAD_CTL_PAD_LCD_DATA17 Register" bitfld.long 0x68 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_LCD_DATA18,SW_PAD_CTL_PAD_LCD_DATA18 Register" bitfld.long 0x6C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_LCD_DATA19,SW_PAD_CTL_PAD_LCD_DATA19 Register" bitfld.long 0x70 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_LCD_DATA02,SW_PAD_CTL_PAD_LCD_DATA02 Register" bitfld.long 0x74 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_LCD_DATA20,SW_PAD_CTL_PAD_LCD_DATA20 Register" bitfld.long 0x78 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_LCD_DATA21,SW_PAD_CTL_PAD_LCD_DATA21 Register" bitfld.long 0x7C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_LCD_DATA22,SW_PAD_CTL_PAD_LCD_DATA22 Register" bitfld.long 0x80 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_LCD_DATA23,SW_PAD_CTL_PAD_LCD_DATA23 Register" bitfld.long 0x84 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x88 "SW_PAD_CTL_PAD_LCD_DATA03,SW_PAD_CTL_PAD_LCD_DATA03 Register" bitfld.long 0x88 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x88 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x88 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x88 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x88 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x88 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x88 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x88 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x88 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8C "SW_PAD_CTL_PAD_LCD_DATA04,SW_PAD_CTL_PAD_LCD_DATA04 Register" bitfld.long 0x8C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x8C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x8C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x8C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x8C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x90 "SW_PAD_CTL_PAD_LCD_DATA05,SW_PAD_CTL_PAD_LCD_DATA05 Register" bitfld.long 0x90 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x90 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x90 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x90 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x90 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x90 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x90 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x90 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x90 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x94 "SW_PAD_CTL_PAD_LCD_DATA06,SW_PAD_CTL_PAD_LCD_DATA06 Register" bitfld.long 0x94 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x94 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x94 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x94 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x94 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x94 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x94 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x94 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x94 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x98 "SW_PAD_CTL_PAD_LCD_DATA07,SW_PAD_CTL_PAD_LCD_DATA07 Register" bitfld.long 0x98 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x98 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x98 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x98 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x98 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x98 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x98 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x98 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x98 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x9C "SW_PAD_CTL_PAD_LCD_DATA08,SW_PAD_CTL_PAD_LCD_DATA08 Register" bitfld.long 0x9C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x9C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x9C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x9C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x9C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x9C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x9C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x9C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x9C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA0 "SW_PAD_CTL_PAD_LCD_DATA09,SW_PAD_CTL_PAD_LCD_DATA09 Register" bitfld.long 0xA0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA4 "SW_PAD_CTL_PAD_LCD_ENABLE,SW_PAD_CTL_PAD_LCD_ENABLE Register" bitfld.long 0xA4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA8 "SW_PAD_CTL_PAD_LCD_HSYNC,SW_PAD_CTL_PAD_LCD_HSYNC Register" bitfld.long 0xA8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xA8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xA8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xA8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xA8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xA8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xAC "SW_PAD_CTL_PAD_LCD_RESET,SW_PAD_CTL_PAD_LCD_RESET Register" bitfld.long 0xAC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xAC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xAC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xAC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xAC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xAC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xAC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xAC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xAC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB0 "SW_PAD_CTL_PAD_LCD_VSYNC,SW_PAD_CTL_PAD_LCD_VSYNC Register" bitfld.long 0xB0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB4 "SW_PAD_CTL_PAD_PWM1,SW_PAD_CTL_PAD_PWM1 Register" bitfld.long 0xB4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB8 "SW_PAD_CTL_PAD_REF_CLK_24M,SW_PAD_CTL_PAD_REF_CLK_24M Register" bitfld.long 0xB8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xB8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xB8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xB8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xB8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xB8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xBC "SW_PAD_CTL_PAD_REF_CLK_32K,SW_PAD_CTL_PAD_REF_CLK_32K Register" bitfld.long 0xBC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xBC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xBC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xBC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xBC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xBC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xBC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xBC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xBC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC0 "SW_PAD_CTL_PAD_SD1_CLK,SW_PAD_CTL_PAD_SD1_CLK Register" bitfld.long 0xC0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC4 "SW_PAD_CTL_PAD_SD1_CMD,SW_PAD_CTL_PAD_SD1_CMD Register" bitfld.long 0xC4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC8 "SW_PAD_CTL_PAD_SD1_DATA0,SW_PAD_CTL_PAD_SD1_DATA0 Register" bitfld.long 0xC8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xC8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xC8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xC8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xC8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xCC "SW_PAD_CTL_PAD_SD1_DATA1,SW_PAD_CTL_PAD_SD1_DATA1 Register" bitfld.long 0xCC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xCC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xCC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xCC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xCC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xCC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xCC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xCC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xCC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD0 "SW_PAD_CTL_PAD_SD1_DATA2,SW_PAD_CTL_PAD_SD1_DATA2 Register" bitfld.long 0xD0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xD0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xD0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xD0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xD0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xD0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD4 "SW_PAD_CTL_PAD_SD1_DATA3,SW_PAD_CTL_PAD_SD1_DATA3 Register" bitfld.long 0xD4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xD4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xD4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xD4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xD4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xD4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD8 "SW_PAD_CTL_PAD_SD1_DATA4,SW_PAD_CTL_PAD_SD1_DATA4 Register" bitfld.long 0xD8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xD8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xD8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xD8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xD8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xD8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xDC "SW_PAD_CTL_PAD_SD1_DATA5,SW_PAD_CTL_PAD_SD1_DATA5 Register" bitfld.long 0xDC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xDC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xDC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xDC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xDC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xDC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xDC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xDC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xDC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE0 "SW_PAD_CTL_PAD_SD1_DATA6,SW_PAD_CTL_PAD_SD1_DATA6 Register" bitfld.long 0xE0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xE0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xE0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xE0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xE0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xE0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xE0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE4 "SW_PAD_CTL_PAD_SD1_DATA7,SW_PAD_CTL_PAD_SD1_DATA7 Register" bitfld.long 0xE4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xE4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xE4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xE4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xE4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xE4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xE4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE8 "SW_PAD_CTL_PAD_SD2_CLK,SW_PAD_CTL_PAD_SD2_CLK Register" bitfld.long 0xE8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xE8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xE8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xE8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xE8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xE8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xE8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xEC "SW_PAD_CTL_PAD_SD2_CMD,SW_PAD_CTL_PAD_SD2_CMD Register" bitfld.long 0xEC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xEC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xEC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xEC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xEC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xEC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xEC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xEC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xEC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF0 "SW_PAD_CTL_PAD_SD2_DATA0,SW_PAD_CTL_PAD_SD2_DATA0 Register" bitfld.long 0xF0 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xF0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF0 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xF0 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xF0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xF0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xF0 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xF0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF4 "SW_PAD_CTL_PAD_SD2_DATA1,SW_PAD_CTL_PAD_SD2_DATA1 Register" bitfld.long 0xF4 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xF4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF4 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xF4 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xF4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xF4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xF4 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xF4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF8 "SW_PAD_CTL_PAD_SD2_DATA2,SW_PAD_CTL_PAD_SD2_DATA2 Register" bitfld.long 0xF8 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xF8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF8 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xF8 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xF8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xF8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xF8 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xF8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xFC "SW_PAD_CTL_PAD_SD2_DATA3,SW_PAD_CTL_PAD_SD2_DATA3 Register" bitfld.long 0xFC 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0xFC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xFC 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0xFC 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0xFC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xFC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xFC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xFC 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0xFC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x100 "SW_PAD_CTL_PAD_SD2_DATA4,SW_PAD_CTL_PAD_SD2_DATA4 Register" bitfld.long 0x100 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x100 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x100 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x100 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x100 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x100 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x100 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x100 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x100 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x104 "SW_PAD_CTL_PAD_SD2_DATA5,SW_PAD_CTL_PAD_SD2_DATA5 Register" bitfld.long 0x104 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x104 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x104 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x104 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x104 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x104 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x104 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x104 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x104 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x108 "SW_PAD_CTL_PAD_SD2_DATA6,SW_PAD_CTL_PAD_SD2_DATA6 Register" bitfld.long 0x108 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x108 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x108 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x108 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x108 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x108 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x108 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x108 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x108 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10C "SW_PAD_CTL_PAD_SD2_DATA7,SW_PAD_CTL_PAD_SD2_DATA7 Register" bitfld.long 0x10C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x10C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x10C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x10C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x10C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x110 "SW_PAD_CTL_PAD_SD2_RESET,SW_PAD_CTL_PAD_SD2_RESET Register" bitfld.long 0x110 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x110 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x110 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x110 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x110 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x110 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x110 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x110 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x110 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x114 "SW_PAD_CTL_PAD_SD3_CLK,SW_PAD_CTL_PAD_SD3_CLK Register" bitfld.long 0x114 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x114 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x114 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x114 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x114 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x114 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x114 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x114 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x114 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x118 "SW_PAD_CTL_PAD_SD3_CMD,SW_PAD_CTL_PAD_SD3_CMD Register" bitfld.long 0x118 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x118 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x118 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x118 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x118 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x118 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x118 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x118 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x118 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x11C "SW_PAD_CTL_PAD_SD3_DATA0,SW_PAD_CTL_PAD_SD3_DATA0 Register" bitfld.long 0x11C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x11C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x11C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x11C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x11C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x11C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x11C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x11C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x11C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x120 "SW_PAD_CTL_PAD_SD3_DATA1,SW_PAD_CTL_PAD_SD3_DATA1 Register" bitfld.long 0x120 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x120 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x120 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x120 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x120 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x120 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x120 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x120 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x120 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x124 "SW_PAD_CTL_PAD_SD3_DATA2,SW_PAD_CTL_PAD_SD3_DATA2 Register" bitfld.long 0x124 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x124 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x124 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x124 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x124 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x124 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x124 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x124 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x124 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x128 "SW_PAD_CTL_PAD_SD3_DATA3,SW_PAD_CTL_PAD_SD3_DATA3 Register" bitfld.long 0x128 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x128 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x128 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x128 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x128 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x128 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x128 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x128 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x128 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x12C "SW_PAD_CTL_PAD_UART1_RXD,SW_PAD_CTL_PAD_UART1_RXD Register" bitfld.long 0x12C 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x12C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x12C 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x12C 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x12C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x12C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x12C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x12C 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x12C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x130 "SW_PAD_CTL_PAD_UART1_TXD,SW_PAD_CTL_PAD_UART1_TXD Register" bitfld.long 0x130 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x130 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x130 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x130 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x130 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x130 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x130 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x130 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x130 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x134 "SW_PAD_CTL_PAD_WDOG_B,SW_PAD_CTL_PAD_WDOG_B Register" bitfld.long 0x134 22. " LVE ,Low Voltage Enable Field" "Disabled,Enabled" bitfld.long 0x134 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x134 14.--15. " PUS ,Pull Up/down select" "100K Ohm Pull Down,47K Ohm Pull Up,100K Ohm Pull Up,22K Ohm Pull Up" bitfld.long 0x134 13. " PUE ,Pull/keep Select" "Keep,Pull" textline " " bitfld.long 0x134 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x134 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x134 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x134 3.--5. " DSE ,Drive Strength" "HIZ,247 Ohm,126 Ohm,84 Ohm,57 Ohm,47 Ohm,40 Ohm,34 Ohm" textline " " bitfld.long 0x134 0. " SRE ,Slew Rate" "Slow,Fast" tree.end tree "SW_PAD_CTL_GRP Registers" width 31. group.long 0x5AC++0x2F line.long 0x00 "SW_PAD_CTL_GRP_ADDDS,SW_PAD_CTL_GRP_ADDDS Register" bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_GRP_DDRMODE_CTL,SW_PAD_CTL_GRP_DDRMODE_CTL Register" bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x08 "SW_PAD_CTL_GRP_DDRPKE,SW_PAD_CTL_GRP_DDRPKE Register" bitfld.long 0x08 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" line.long 0x0C "SW_PAD_CTL_GRP_DDRPK,SW_PAD_CTL_GRP_DDRPK Register" bitfld.long 0x0C 13. " PUE ,Pull / Keep Select" "Keep,Pull" line.long 0x10 "SW_PAD_CTL_GRP_DDRHYS,SW_PAD_CTL_GRP_DDRHYS Register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" line.long 0x14 "SW_PAD_CTL_GRP_DDRMODE,SW_PAD_CTL_GRP_DDRMODE Register" bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x18 "SW_PAD_CTL_GRP_B0DS,SW_PAD_CTL_GRP_B0DS Register" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_GRP_CTLDS,SW_PAD_CTL_GRP_CTLDS Register" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_GRP_B1DS,SW_PAD_CTL_GRP_B1DS Register" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x24 "SW_PAD_CTL_GRP_DDR_TYPE,SW_PAD_CTL_GRP_DDR_TYPE Register" bitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" line.long 0x28 "SW_PAD_CTL_GRP_B2DS,SW_PAD_CTL_GRP_B2DS Register" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_GRP_B3DS,SW_PAD_CTL_GRP_B3DS Register" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "HIZ,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" tree.end tree "SELECT_INPUT Registers" width 35. group.long 0x5DC++0x1FB line.long 0x00 "ANALOG_USB_OTG_ID_SELECT_INPUT,ANALOG_USB_OTG_ID_SELECT_INPUT Register" bitfld.long 0x00 0.--2. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_COM_ALT4,FEC_RX_DATA0_ALT2,LCD_DATA01_ALT2,REF_CLK_32K_ALT3,SD3_DATA0_ALT4,?..." line.long 0x04 "ANALOG_USB_H1_ID_SELECT_INPUT,ANALOG_USB_H1_ID_SELECT_INPUT Register" bitfld.long 0x04 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_IRQ_ALT4,LCD_DATA00_ALT2,REF_CLK_24M_ALT3,SD3_CMD_ALT4" line.long 0x08 "AUD4_INPUT_DA_AMX_SELECT_INPUT,AUD4_INPUT_DA_AMX_SELECT_INPUT Register" bitfld.long 0x08 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SS0_ALT1,LCD_DATA03_ALT4,SD2_DATA0_ALT1,?..." line.long 0x0C "AUD4_INPUT_DB_AMX_SELECT_INPUT,AUD4_INPUT_DB_AMX_SELECT_INPUT Register" bitfld.long 0x0C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SCLK_ALT1,LCD_DATA06_ALT4,SD2_DATA3_ALT1,?..." line.long 0x10 "AUD4_INPUT_RXCLK_AMX_SELECT_INPUT,AUD4_INPUT_RXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x10 0.--1. " DAISY ,Pads Involved in Daisy Chain" "I2C2_SDA_ALT1,LCD_DATA02_ALT4,SD2_CMD_ALT1,?..." line.long 0x14 "AUD4_INPUT_RXFS_AMX_SELECT_INPUT,AUD4_INPUT_RXFS_AMX_SELECT_INPUT Register" bitfld.long 0x14 0.--1. " DAISY ,Pads Involved in Daisy Chain" "I2C2_SCL_ALT1,LCD_DATA01_ALT4,SD2_CLK_ALT1,?..." line.long 0x18 "AUD4_INPUT_TXCLK_AMX_SELECT_INPUT,AUD4_INPUT_TXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x18 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MOSI_ALT1,LCD_DATA04_ALT4,SD2_DATA1_ALT1,?..." line.long 0x1C "AUD4_INPUT_TXFS_AMX_SELECT_INPUT,AUD4_INPUT_TXFS_AMX_SELECT_INPUT Register" bitfld.long 0x1C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MISO_ALT1,LCD_DATA05_ALT4,SD2_DATA2_ALT1,?..." line.long 0x20 "AUD5_INPUT_DA_AMX_SELECT_INPUT,AUD5_INPUT_DA_AMX_SELECT_INPUT Register" bitfld.long 0x20 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_VCOM1_ALT1,SD3_DATA0_ALT1" line.long 0x24 "AUD5_INPUT_DB_AMX_SELECT_INPUT,AUD5_INPUT_DB_AMX_SELECT_INPUT Register" bitfld.long 0x24 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL2_ALT1,SD3_DATA3_ALT1" line.long 0x28 "AUD5_INPUT_RXCLK_AMX_SELECT_INPUT,AUD5_INPUT_RXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x28 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL0_ALT1,SD3_CMD_ALT1" line.long 0x2C "AUD5_INPUT_RXFS_AMX_SELECT_INPUT,AUD5_INPUT_RXFS_AMX_SELECT_INPUT Register" bitfld.long 0x2C 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_VCOM0_ALT1,SD3_CLK_ALT1" line.long 0x30 "AUD5_INPUT_TXCLK_AMX_SELECT_INPUT,AUD5_INPUT_TXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x30 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL3_ALT1,SD3_DATA1_ALT1" line.long 0x34 "AUD5_INPUT_TXFS_AMX_SELECT_INPUT,AUD5_INPUT_TXFS_AMX_SELECT_INPUT Register" bitfld.long 0x34 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL1_ALT1,SD3_DATA2_ALT1" line.long 0x38 "AUD6_INPUT_DA_AMX_SELECT_INPUT,AUD6_INPUT_DA_AMX_SELECT_INPUT Register" bitfld.long 0x38 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_RX_ER_ALT2,KEY_COL4_ALT1" line.long 0x3C "AUD6_INPUT_DB_AMX_SELECT_INPUT,AUD6_INPUT_DB_AMX_SELECT_INPUT Register" bitfld.long 0x3C 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_DATA0_ALT2,KEY_ROW5_ALT1" line.long 0x40 "AUD6_INPUT_RXCLK_AMX_SELECT_INPUT,AUD6_INPUT_RXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x40 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_CLK_ALT2,KEY_ROW3_ALT1" line.long 0x44 "AUD6_INPUT_RXFS_AMX_SELECT_INPUT,AUD6_INPUT_RXFS_AMX_SELECT_INPUT Register" bitfld.long 0x44 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_MDIO_ALT2,KEY_COL3_ALT1" line.long 0x48 "AUD6_INPUT_TXCLK_AMX_SELECT_INPUT,AUD6_INPUT_TXCLK_AMX_SELECT_INPUT Register" bitfld.long 0x48 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_CRS_DV_ALT2,KEY_ROW4_ALT1" line.long 0x4C "AUD6_INPUT_TXFS_AMX_SELECT_INPUT,AUD6_INPUT_TXFS_AMX_SELECT_INPUT Register" bitfld.long 0x4C 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_RX_DATA1_ALT2,KEY_COL5_ALT1" line.long 0x50 "CCM_PMIC_READY_SELECT_INPUT,CCM_PMIC_READY_SELECT_INPUT Register" bitfld.long 0x50 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_REF_CLK_ALT4,LCD_RESET_ALT6,REF_CLK_24M_ALT4,SD1_DATA7_ALT3" line.long 0x54 "CSI_DATA00_SELECT_INPUT,CSI_DATA00_SELECT_INPUT Register" bitfld.long 0x54 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA00_ALT3,LCD_DATA17_ALT2,SD2_CLK_ALT3,?..." line.long 0x58 "CSI_DATA01_SELECT_INPUT,CSI_DATA01_SELECT_INPUT Register" bitfld.long 0x58 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA01_ALT3,LCD_DATA16_ALT2,SD2_CMD_ALT3,?..." line.long 0x5C "CSI_DATA02_SELECT_INPUT,CSI_DATA02_SELECT_INPUT Register" bitfld.long 0x5C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA02_ALT3,LCD_DATA15_ALT2,SD2_DATA0_ALT3,?..." line.long 0x60 "CSI_DATA03_SELECT_INPUT,CSI_DATA03_SELECT_INPUT Register" bitfld.long 0x60 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA03_ALT3,LCD_DATA14_ALT2,SD2_DATA1_ALT3,?..." line.long 0x64 "CSI_DATA04_SELECT_INPUT,CSI_DATA04_SELECT_INPUT Register" bitfld.long 0x64 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA04_ALT3,LCD_DATA13_ALT2,SD2_DATA2_ALT3,?..." line.long 0x68 "CSI_DATA05_SELECT_INPUT,CSI_DATA05_SELECT_INPUT Register" bitfld.long 0x68 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA05_ALT3,LCD_DATA12_ALT2,SD2_DATA3_ALT3,?..." line.long 0x6c "CSI_DATA06_SELECT_INPUT,CSI_DATA06_SELECT_INPUT Register" bitfld.long 0x6c 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA06_ALT3,LCD_DATA11_ALT2,SD2_DATA4_ALT3,?..." line.long 0x70 "CSI_DATA07_SELECT_INPUT,CSI_DATA07_SELECT_INPUT Register" bitfld.long 0x70 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA07_ALT3,LCD_DATA10_ALT2,SD2_DATA5_ALT3,?..." line.long 0x74 "CSI_DATA08_SELECT_INPUT,CSI_DATA08_SELECT_INPUT Register" bitfld.long 0x74 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDCLK_ALT3,LCD_DATA09_ALT2,SD2_DATA6_ALT3,?..." line.long 0x78 "CSI_DATA09_SELECT_INPUT,CSI_DATA09_SELECT_INPUT Register" bitfld.long 0x78 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDLE_ALT3,LCD_DATA08_ALT2,SD2_DATA7_ALT3,?..." line.long 0x7C "CSI_DATA10_SELECT_INPUT,CSI_DATA10_SELECT_INPUT Register" bitfld.long 0x7C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDOE_ALT3,LCD_DATA23_ALT2,SD3_CLK_ALT3,?..." line.long 0x80 "CSI_DATA11_SELECT_INPUT,CSI_DATA11_SELECT_INPUT Register" bitfld.long 0x80 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDSHR_ALT3,LCD_DATA22_ALT2,SD3_CMD_ALT3,?..." line.long 0x84 "CSI_DATA12_SELECT_INPUT,CSI_DATA12_SELECT_INPUT Register" bitfld.long 0x84 0. " DAISY ,Pads Involved in Daisy Chain" "LCD_DATA21_ALT2,SD3_DATA0_ALT3" line.long 0x88 "CSI_DATA13_SELECT_INPUT,CSI_DATA13_SELECT_INPUT Register" bitfld.long 0x88 0. " DAISY ,Pads Involved in Daisy Chain" "LCD_DATA20_ALT2,SD3_DATA1_ALT3" line.long 0x8C "CSI_DATA14_SELECT_INPUT,CSI_DATA14_SELECT_INPUT Register" bitfld.long 0x8C 0. " DAISY ,Pads Involved in Daisy Chain" "LCD_DATA19_ALT2,SD3_DATA2_ALT3" line.long 0x90 "CSI_DATA15_SELECT_INPUT,CSI_DATA15_SELECT_INPUT Register" bitfld.long 0x90 0. " DAISY ,Pads Involved in Daisy Chain" "LCD_DATA18_ALT2,SD3_DATA3_ALT3" line.long 0x94 "CSI_HSYNC_SELECT_INPUT,CSI_HSYNC_SELECT_INPUT Register" bitfld.long 0x94 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MOSI_ALT3,EPDC_GDOE_ALT3,LCD_DATA05_ALT2,?..." line.long 0x98 "CSI_PIXCLK_SELECT_INPUT,CSI_PIXCLK_SELECT_INPUT Register" bitfld.long 0x98 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SCLK_ALT3,EPDC_GDCLK_ALT3,LCD_DATA06_ALT2,?..." line.long 0x9C "CSI_VSYNC_SELECT_INPUT,CSI_VSYNC_SELECT_INPUT Register" bitfld.long 0x9C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SS0_ALT3,EPDC_GDSP_ALT3,LCD_DATA04_ALT2,?..." line.long 0xA0 "ECSPI1_CSPI_CLK_IN_SELECT_INPUT,ECSPI1_CSPI_CLK_IN_SELECT_INPUT Register" bitfld.long 0xA0 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SCLK_ALT0,LCD_DATA03_ALT1" line.long 0xA4 "ECSPI1_DATAREADY_B_SELECT_INPUT,ECSPI1_DATAREADY_B_SELECT_INPUT Register" bitfld.long 0xA4 0. " DAISY ,Pads Involved in Daisy Chain" "I2C2_SCL_ALT6,LCD_DATA07_ALT1" line.long 0xA8 "ECSPI1_MISO_SELECT_INPUT,ECSPI1_MISO_SELECT_INPUT Register" bitfld.long 0xA8 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MISO_ALT0,LCD_DATA01_ALT1" line.long 0xAC "ECSPI1_MOSI_SELECT_INPUT,ECSPI1_MOSI_SELECT_INPUT Register" bitfld.long 0xAC 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MOSI_ALT0,LCD_DATA00_ALT1" line.long 0xB0 "ECSPI1_SS0_SELECT_INPUT,ECSPI1_SS0_SELECT_INPUT Register" bitfld.long 0xB0 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SS0_ALT0,LCD_DATA02_ALT1" line.long 0xB4 "ECSPI1_SS1_SELECT_INPUT,ECSPI1_SS1_SELECT_INPUT Register" bitfld.long 0xB4 0. " DAISY ,Pads Involved in Daisy Chain" "I2C1_SCL_ALT6,LCD_DATA04_ALT1" line.long 0xB8 "ECSPI1_SS2_SELECT_INPUT,ECSPI1_SS2_SELECT_INPUT Register" bitfld.long 0xB8 0. " DAISY ,Pads Involved in Daisy Chain" "I2C1_SDA_ALT6,LCD_DATA05_ALT1" line.long 0xBC "ECSPI1_SS3_SELECT_INPUT,ECSPI1_SS3_SELECT_INPUT Register" bitfld.long 0xBC 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SS0_ALT1,LCD_DATA06_ALT1" line.long 0xC0 "ECSPI2_CSPI_CLK_IN_SELECT_INPUT,ECSPI2_CSPI_CLK_IN_SELECT_INPUT Register" bitfld.long 0xC0 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SCLK_ALT0,EPDC_SDSHR_ALT1,LCD_DATA08_ALT4,?..." line.long 0xC4 "ECSPI2_MISO_SELECT_INPUT,ECSPI2_MISO_SELECT_INPUT Register" bitfld.long 0xC4 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MISO_ALT0,EPDC_SDLE_ALT1,LCD_DATA10_ALT4,?..." line.long 0xC8 "ECSPI2_MOSI_SELECT_INPUT,ECSPI2_MOSI_SELECT_INPUT Register" bitfld.long 0xC8 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MOSI_ALT0,EPDC_SDCLK_ALT1,LCD_DATA09_ALT4,?..." line.long 0xCC "ECSPI2_SS0_SELECT_INPUT,ECSPI2_SS0_SELECT_INPUT Register" bitfld.long 0xCC 0. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SS0_ALT0,EPDC_SDOE_ALT1" line.long 0xD0 "ECSPI2_SS1_SELECT_INPUT,ECSPI2_SS1_SELECT_INPUT Register" bitfld.long 0xD0 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDCE0_ALT1,LCD_DATA11_ALT4" line.long 0xD4 "ECSPI3_CSPI_CLK_IN_SELECT_INPUT,ECSPI3_CSPI_CLK_IN_SELECT_INPUT Register" bitfld.long 0xD4 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_TXD_ALT1,EPDC_DATA11_ALT1,SD2_CLK_ALT2,?..." line.long 0xD8 "ECSPI3_DATAREADY_B_SELECT_INPUT,ECSPI3_DATAREADY_B_SELECT_INPUT Register" bitfld.long 0xD8 0. " DAISY ,Pads Involved in Daisy Chain" "AUD_MCLK_ALT2,EPDC_DATA15_ALT6" line.long 0xDC "ECSPI3_MISO_SELECT_INPUT,ECSPI3_MISO_SELECT_INPUT Register" bitfld.long 0xDC 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_TXC_ALT1,EPDC_DATA09_ALT1,SD2_DATA1_ALT2,?..." line.long 0xE0 "ECSPI3_MOSI_SELECT_INPUT,ECSPI3_MOSI_SELECT_INPUT Register" bitfld.long 0xE0 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXD_ALT1,EPDC_DATA08_ALT1,SD2_DATA0_ALT2,?..." line.long 0xE4 "ECSPI3_SS0_SELECT_INPUT,ECSPI3_SS0_SELECT_INPUT Register" bitfld.long 0xE4 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXFS_ALT6,EPDC_DATA10_ALT1,SD2_CMD_ALT2,?..." line.long 0xE8 "ECSPI3_SS1_SELECT_INPUT,ECSPI3_SS1_SELECT_INPUT Register" bitfld.long 0xE8 0. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXC_ALT6,EPDC_DATA12_ALT6" line.long 0xEC "ECSPI3_SS2_SELECT_INPUT,ECSPI3_SS2_SELECT_INPUT Register" bitfld.long 0xEC 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA13_ALT6,I2C1_SCL_ALT2" line.long 0xF0 "ECSPI3_SS3_SELECT_INPUT,ECSPI3_SS3_SELECT_INPUT Register" bitfld.long 0xF0 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA14_ALT6,I2C1_SDA_ALT2" line.long 0xF4 "ECSPI4_CSPI_CLK_IN_SELECT_INPUT,ECSPI4_CSPI_CLK_IN_SELECT_INPUT Register" bitfld.long 0xF4 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA03_ALT1,FEC_TX_CLK_ALT3,KEY_ROW2_ALT1,?..." line.long 0xF8 "ECSPI4_MISO_SELECT_INPU,ECSPI4_MISO_SELECT_INPU Register" bitfld.long 0xF8 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA01_ALT1,FEC_CRS_DV_ALT3,KEY_ROW1_ALT1,?..." line.long 0xFC "ECSPI4_MOSI_SELECT_INPUT,ECSPI4_MOSI_SELECT_INPUT Register" bitfld.long 0xFC 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA00_ALT1,FEC_RX_ER_ALT3,KEY_COL1_ALT1,?..." line.long 0x100 "ECSPI4_SS0_SELECT_INPUT,ECSPI4_SS0_SELECT_INPUT Register" bitfld.long 0x100 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA02_ALT1,FEC_MDIO_ALT3,KEY_COL2_ALT1,?..." line.long 0x104 "ECSPI4_SS1_SELECT_INPUT,ECSPI4_SS1_SELECT_INPUT Register" bitfld.long 0x104 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA04_ALT1,FEC_RX_DATA1_ALT3" line.long 0x108 "ECSPI4_SS2_SELECT_INPUT,ECSPI4_SS2_SELECT_INPUT Register" bitfld.long 0x108 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA05_ALT1,FEC_TX_DATA0_ALT3" line.long 0x10C "EPDC_PWR_IRQ_SELECT_INPUT,EPDC_PWR_IRQ_SELECT_INPUT Register" bitfld.long 0x10C 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA13_ALT2,EPDC_PWR_IRQ_ALT0" line.long 0x110 "EPDC_PWR_STAT_SELECT_INPUT,EPDC_PWR_STAT_SELECT_INPUT Register" bitfld.long 0x110 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA14_ALT2,EPDC_PWR_STAT_ALT0" line.long 0x114 "FEC_COL_SELECT_INPUT,FEC_COL_SELECT_INPUT Register" bitfld.long 0x114 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_RX_DATA1_ALT6,SD2_DATA2_ALT2,UART1_RXD_ALT3,?..." line.long 0x118 "FEC_MDI_SELECT_INPUT,FEC_MDI_SELECT_INPUT Register" bitfld.long 0x118 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXFS_ALT3,FEC_MDIO_ALT0,SD1_CLK_ALT1,?..." line.long 0x11C "FEC_RX_DATA0_SELECT_INPUT,FEC_RX_DATA0_SELECT_INPUT Register" bitfld.long 0x11C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_RX_DATA0_ALT0,I2C1_SCL_ALT3,SD1_DATA5_ALT1,?..." line.long 0x120 "FEC_RX_DATA1_SELECT_INPUT,FEC_RX_DATA1_SELECT_INPUT Register" bitfld.long 0x120 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_TXFS_ALT3,FEC_RX_DATA1_ALT0,SD1_DATA2_ALT1,?..." line.long 0x124 "FEC_RX_CLK_SELECT_INPUT,FEC_RX_CLK_SELECT_INPUT Register" bitfld.long 0x124 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_DATA1_ALT6,SD2_DATA3_ALT2,UART1_TXD_ALT3,?..." line.long 0x128 "FEC_RX_DV_SELECT_INPUT,FEC_RX_DV_SELECT_INPUT Register" bitfld.long 0x128 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_TXC_ALT3,FEC_CRS_DV_ALT0,SD1_DATA1_ALT1,?..." line.long 0x12C "FEC_RX_ER_SELECT_INPUT,FEC_RX_ER_SELECT_INPUT Register" bitfld.long 0x12C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXD_ALT3,FEC_RX_ER_ALT0,SD1_DATA0_ALT1,?..." line.long 0x130 "FEC_TX_CLK_SELECT_INPUT,FEC_TX_CLK_SELECT_INPUT Register" bitfld.long 0x130 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXC_ALT3,FEC_TX_CLK_ALT0,SD1_CMD_ALT1,?..." line.long 0x134 "GPT_CAPIN1_SELECT_INPUT,GPT_CAPIN1_SELECT_INPUT Register" bitfld.long 0x134 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_MDIO_ALT4,LCD_DATA18_ALT4" line.long 0x138 "GPT_CAPIN2_SELECT_INPUT,GPT_CAPIN2_SELECT_INPUT Register" bitfld.long 0x138 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_CLK_ALT4,LCD_DATA19_ALT4" line.long 0x13C "GPT_CLKIN_SELECT_INPUT,GPT_CLKIN_SELECT_INPUT Register" bitfld.long 0x13C 0. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_DATA0_ALT4,LCD_DATA23_ALT4" line.long 0x140 "I2C1_SCL_IN_SELECT_INPUT,I2C1_SCL_IN_SELECT_INPUT Register" bitfld.long 0x140 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXFS_ALT1,USB_H_DATA_ALT1,I2C1_SCL_ALT0,?..." line.long 0x144 "I2C1_SDA_IN_SELECT_INPUT,I2C1_SDA_IN_SELECT_INPUT Register" bitfld.long 0x144 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXC_ALT1,USB_H_STROBE_ALT1,I2C1_SDA_ALT0,?..." line.long 0x148 "I2C2_SCL_IN_SELECT_INPUT,I2C2_SCL_IN_SELECT_INPUT Register" bitfld.long 0x148 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDCLK_ALT2,I2C2_SCL_ALT0,KEY_COL0_ALT1,LCD_DATA16_ALT4" line.long 0x14C "I2C2_SDA_IN_SELECT_INPUT,I2C2_SDA_IN_SELECT_INPUT Register" bitfld.long 0x14C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_SDLE_ALT2,I2C2_SDA_ALT0,KEY_ROW0_ALT1,LCD_DATA17_ALT4" line.long 0x150 "I2C3_SCL_IN_SELECT_INPUT,I2C3_SCL_IN_SELECT_INPUT Register" bitfld.long 0x150 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXFS_ALT4,EPDC_SDCE2_ALT1,REF_CLK_24M_ALT1,?..." line.long 0x154 "I2C3_SDA_IN_SELECT_INPUT,I2C3_SDA_IN_SELECT_INPUT Register" bitfld.long 0x154 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXC_ALT4,EPDC_SDCE3_ALT1,REF_CLK_32K_ALT1,?..." line.long 0x158 "KEY_COL0_SELECT_INPUT,KEY_COL0_SELECT_INPUT Register" bitfld.long 0x158 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL0_ALT0,LCD_DATA08_ALT1,SD1_CLK_ALT2,?..." line.long 0x15C "KEY_COL1_SELECT_INPUT,KEY_COL1_SELECT_INPUT Register" bitfld.long 0x15C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL1_ALT0,LCD_DATA10_ALT1,SD1_DATA0_ALT2,?..." line.long 0x160 "KEY_COL2_SELECT_INPUT,KEY_COL2_SELECT_INPUT Register" bitfld.long 0x160 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL2_ALT0,LCD_DATA12_ALT1,SD1_DATA2_ALT2,?..." line.long 0x164 "KEY_COL3_SELECT_INPUT,KEY_COL3_SELECT_INPUT Register" bitfld.long 0x164 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL3_ALT0,LCD_DATA14_ALT1,SD1_DATA4_ALT2,?..." line.long 0x168 "KEY_COL4_SELECT_INPUT,KEY_COL4_SELECT_INPUT Register" bitfld.long 0x168 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL4_ALT0,LCD_DATA16_ALT1,SD1_DATA6_ALT2,?..." line.long 0x16C "KEY_COL5_SELECT_INPUT,KEY_COL5_SELECT_INPUT Register" bitfld.long 0x16C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL5_ALT0,LCD_DATA18_ALT1,SD3_CLK_ALT2,?..." line.long 0x170 "KEY_COL6_SELECT_INPUT,KEY_COL6_SELECT_INPUT Register" bitfld.long 0x170 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL6_ALT0,LCD_DATA20_ALT1,SD3_DATA0_ALT2,?..." line.long 0x174 "KEY_COL7_SELECT_INPUT,KEY_COL7_SELECT_INPUT Register" bitfld.long 0x174 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL7_ALT0,LCD_DATA22_ALT1,SD3_DATA2_ALT2,?..." line.long 0x178 "KEY_ROW0_SELECT_INPUT,KEY_ROW0_SELECT_INPUT Register" bitfld.long 0x178 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW0_ALT0,LCD_DATA09_ALT1,SD1_CMD_ALT2,?..." line.long 0x17C "KEY_ROW1_SELECT_INPUT,KEY_ROW1_SELECT_INPUT Register" bitfld.long 0x17C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW1_ALT0,LCD_DATA11_ALT1,SD1_DATA1_ALT2,?..." line.long 0x180 "KEY_ROW2_SELECT_INPUT,KEY_ROW2_SELECT_INPUT Register" bitfld.long 0x180 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW2_ALT0,LCD_DATA13_ALT1,SD1_DATA3_ALT2,?..." line.long 0x184 "KEY_ROW3_SELECT_INPUT,KEY_ROW3_SELECT_INPUT Register" bitfld.long 0x184 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW3_ALT0,LCD_DATA15_ALT1,SD1_DATA5_ALT2,?..." line.long 0x188 "KEY_ROW4_SELECT_INPUT,KEY_ROW4_SELECT_INPUT Register" bitfld.long 0x188 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW4_ALT0,LCD_DATA17_ALT1,SD1_DATA7_ALT2,?..." line.long 0x18C "KEY_ROW5_SELECT_INPUT,KEY_ROW5_SELECT_INPUT Register" bitfld.long 0x18C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW5_ALT0,LCD_DATA19_ALT1,SD3_CMD_ALT2,?..." line.long 0x190 "KEY_ROW6_SELECT_INPUT,KEY_ROW6_SELECT_INPUT Register" bitfld.long 0x190 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW6_ALT0,LCD_DATA21_ALT1,SD3_DATA1_ALT2,?..." line.long 0x194 "KEY_ROW7_SELECT_INPUT,KEY_ROW7_SELECT_INPUT Register" bitfld.long 0x194 0.--1. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW7_ALT0,LCD_DATA23_ALT1,SD3_DATA3_ALT2,?..." line.long 0x198 "LCD_BUSY_SELECT_INPUT,LCD_BUSY_SELECT_INPUT Register" bitfld.long 0x198 0. " DAISY ,Pads Involved in Daisy Chain" "LCD_HSYNC_ALT0,LCD_RESET_ALT2" line.long 0x19C "LCD_DATA00_SELECT_INPUT,LCD_DATA00_SELECT_INPUT Register" bitfld.long 0x19C 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL0_ALT2,LCD_DATA00_ALT0" line.long 0x1A0 "LCD_DATA01_SELECT_INPUT,LCD_DATA01_SELECT_INPUT Register" bitfld.long 0x1A0 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW0_ALT2,LCD_DATA01_ALT0" line.long 0x1A4 "LCD_DATA02_SELECT_INPUT,LCD_DATA02_SELECT_INPUT Register" bitfld.long 0x1A4 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL1_ALT2,LCD_DATA02_ALT0" line.long 0x1A8 "LCD_DATA03_SELECT_INPUT,LCD_DATA03_SELECT_INPUT Register" bitfld.long 0x1A8 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW1_ALT2,LCD_DATA03_ALT0" line.long 0x1AC "LCD_DATA04_SELECT_INPUT,LCD_DATA04_SELECT_INPUT Register" bitfld.long 0x1AC 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL2_ALT2,LCD_DATA04_ALT0" line.long 0x1B0 "LCD_DATA05_SELECT_INPUT,LCD_DATA05_SELECT_INPUT Register" bitfld.long 0x1B0 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW2_ALT2,LCD_DATA05_ALT0" line.long 0x1B4 "LCD_DATA06_SELECT_INPUT,LCD_DATA06_SELECT_INPUT Register" bitfld.long 0x1B4 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL3_ALT2,LCD_DATA06_ALT0" line.long 0x1B8 "LCD_DATA07_SELECT_INPUT,LCD_DATA07_SELECT_INPUT Register" bitfld.long 0x1B8 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW3_ALT2,LCD_DATA07_ALT0" line.long 0x1BC "LCD_DATA08_SELECT_INPUT,LCD_DATA08_SELECT_INPUT Register" bitfld.long 0x1BC 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL4_ALT2,LCD_DATA08_ALT0" line.long 0x1C0 "LCD_DATA09_SELECT_INPUT,LCD_DATA09_SELECT_INPUT Register" bitfld.long 0x1C0 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW4_ALT2,LCD_DATA09_ALT0" line.long 0x1C4 "LCD_DATA10_SELECT_INPUT,LCD_DATA10_SELECT_INPUT Register" bitfld.long 0x1C4 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL5_ALT2,LCD_DATA10_ALT0" line.long 0x1C8 "LCD_DATA11_SELECT_INPUT,LCD_DATA11_SELECT_INPUT Register" bitfld.long 0x1C8 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW5_ALT2,LCD_DATA11_ALT0" line.long 0x1CC "LCD_DATA12_SELECT_INPUT,LCD_DATA12_SELECT_INPUT Register" bitfld.long 0x1CC 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL6_ALT2,LCD_DATA12_ALT0" line.long 0x1D0 "LCD_DATA13_SELECT_INPUT,LCD_DATA13_SELECT_INPUT Register" bitfld.long 0x1D0 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW6_ALT2,LCD_DATA13_ALT0" line.long 0x1D4 "LCD_DATA14_SELECT_INPUT,LCD_DATA14_SELECT_INPUT Register" bitfld.long 0x1D4 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL7_ALT2,LCD_DATA14_ALT0" line.long 0x1D8 "LCD_DATA15_SELECT_INPUT,LCD_DATA15_SELECT_INPUT Register" bitfld.long 0x1D8 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW7_ALT2,LCD_DATA15_ALT0" line.long 0x1DC "LCD_DATA16_SELECT_INPUT,LCD_DATA16_SELECT_INPUT Register" bitfld.long 0x1DC 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL0_ALT2,LCD_DATA16_ALT0" line.long 0x1E0 "LCD_DATA17_SELECT_INPUT,LCD_DATA17_SELECT_INPUT Register" bitfld.long 0x1E0 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL1_ALT2,LCD_DATA17_ALT0" line.long 0x1E4 "LCD_DATA18_SELECT_INPUT,LCD_DATA18_SELECT_INPUT Register" bitfld.long 0x1E4 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL2_ALT2,LCD_DATA18_ALT0" line.long 0x1E8 "LCD_DATA19_SELECT_INPUT,LCD_DATA19_SELECT_INPUT Register" bitfld.long 0x1E8 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_CTRL3_ALT2,LCD_DATA19_ALT0" line.long 0x1EC "LCD_DATA20_SELECT_INPUT,LCD_DATA20_SELECT_INPUT Register" bitfld.long 0x1EC 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_COM_ALT2,LCD_DATA20_ALT0" line.long 0x1F0 "LCD_DATA21_SELECT_INPUT,LCD_DATA21_SELECT_INPUT Register" bitfld.long 0x1F0 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_IRQ_ALT2,LCD_DATA21_ALT0" line.long 0x1F4 "LCD_DATA22_SELECT_INPUT,LCD_DATA22_SELECT_INPUT Register" bitfld.long 0x1F4 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_STAT_ALT2,LCD_DATA22_ALT0" line.long 0x1F8 "DATA23_SELECT_INPUT,DATA23_SELECT_INPUT Register" bitfld.long 0x1F8 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_WAKE_ALT2,LCD_DATA23_ALT0" group.long 0x7F0++0x97 line.long 0x00 "SPDIF_IN1_SELECT_INPUT,SPDIF_IN1_SELECT_INPUT Register" bitfld.long 0x00 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_EN_ALT2,I2C2_SCL_ALT2,SD2_DATA5_ALT4,?..." line.long 0x04 "SPDIF_TX_CLK2_SELECT_INPUT,SPDIF_TX_CLK2_SELECT_INPUT Register" bitfld.long 0x04 0.--1. " DAISY ,Pads Involved in Daisy Chain" "AUD_MCLK_ALT6,ECSPI2_SCLK_ALT1,FEC_REF_CLK_ALT6,?..." line.long 0x08 "UART1_UART_RTS_B_SELECT_INPUT,UART1_UART_RTS_B_SELECT_INPUT Register" bitfld.long 0x08 0. " DAISY ,Pads Involved in Daisy Chain" "I2C1_SCL_ALT1,I2C1_SDA_ALT1" line.long 0x0C "UART1_UART_RX_DATA_SELECT_INPUT,UART1_UART_RX_DATA_SELECT_INPUT Register" bitfld.long 0x0C 0. " DAISY ,Pads Involved in Daisy Chain" "UART1_RXD_ALT0,UART1_TXD_ALT0" line.long 0x10 "UART2_UART_RTS_B_SELECT_INPUT,UART2_UART_RTS_B_SELECT_INPUT Register" bitfld.long 0x10 0.--2. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA14_ALT1,EPDC_DATA15_ALT1,LCD_RESET_ALT4,LCD_VSYNC_ALT4,SD2_DATA6_ALT2,SD2_DATA7_ALT2,?..." line.long 0x14 "UART2_UART_RX_DATA_SELECT_INPUT,UART2_UART_RX_DATA_SELECT_INPUT Register" bitfld.long 0x14 0.--2. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA12_ALT1,EPDC_DATA13_ALT1,LCD_ENABLE_ALT4,LCD_HSYNC_ALT4,SD2_DATA4_ALT2,SD2_DATA5_ALT2,?..." line.long 0x18 "UART3_UART_RTS_B_SELECT_INPUT,UART3_UART_RTS_B_SELECT_INPUT Register" bitfld.long 0x18 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MISO_ALT2,ECSPI2_SS0_ALT2,EPDC_BDR0_ALT2,EPDC_BDR1_ALT2" line.long 0x1C "UART3_UART_RX_DATA_SELECT_INPUT,UART3_UART_RX_DATA_SELECT_INPUT Register" bitfld.long 0x1C 0.--2. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXC_ALT2,AUD_RXFS_ALT2,ECSPI2_MOSI_ALT2,ECSPI2_SCLK_ALT2,EPDC_VCOM0_ALT2,EPDC_VCOM1_ALT2,?..." line.long 0x20 "UART4_UART_RTS_B_SELECT_INPUT,UART4_UART_RTS_B_SELECT_INPUT Register" bitfld.long 0x20 0.--2. " DAISY ,Pads Involved in Daisy Chain" "AUD_TXD_ALT2,AUD_TXFS_ALT2,KEY_COL7_ALT1,KEY_ROW7_ALT1,SD1_DATA6_ALT4,SD1_DATA7_ALT4,?..." line.long 0x24 "UART4_UART_RX_DATA_SELECT_INPUT,UART4_UART_RX_DATA_SELECT_INPUT Register" bitfld.long 0x24 0.--2. " DAISY ,Pads Involved in Daisy Chain" "AUD_RXD_ALT2,AUD_TXC_ALT2,KEY_COL6_ALT1,KEY_ROW6_ALT1,SD1_DATA4_ALT4,SD1_DATA5_ALT4,UART1_RXD_ALT2,UART1_TXD_ALT2" line.long 0x28 "UART5_UART_RTS_B_SELECT_INPUT,UART5_UART_RTS_B_SELECT_INPUT Register" bitfld.long 0x28 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MISO_ALT2,ECSPI1_SS0_ALT2,LCD_DATA12_ALT4,LCD_DATA13_ALT4,SD2_DATA0_ALT4,SD2_DATA1_ALT4,?..." line.long 0x2C "UART5_UART_RX_DATA_SELECT_INPUT,UART5_UART_RX_DATA_SELECT_INPUT Register" bitfld.long 0x2C 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MOSI_ALT2,ECSPI1_SCLK_ALT2,LCD_DATA14_ALT4,LCD_DATA15_ALT4,SD2_DATA2_ALT4,SD2_DATA3_ALT4,UART1_RXD_ALT4,UART1_TXD_ALT4" line.long 0x30 "USB_OTG2_OC_SELECT_INPUT,USB_OTG2_OC_SELECT_INPUT Register" bitfld.long 0x30 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SCLK_ALT6,ECSPI2_SCLK_ALT6,KEY_ROW5_ALT6,SD3_DATA2_ALT6" line.long 0x34 "USB_OTG1_OC_SELECT_INPUT,USB_OTG1_OC_SELECT_INPUT Register" bitfld.long 0x34 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MISO_ALT6,KEY_ROW4_ALT6,SD3_DATA3_ALT6,?..." line.long 0x38 "USDHC1_CARD_DET_SELECT_INPUT,USDHC1_CARD_DET_SELECT_INPUT Register" bitfld.long 0x38 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_SS0_ALT4,FEC_TX_DATA1_ALT3,KEY_COL0_ALT4,KEY_ROW7_ALT6" line.long 0x3C "USDHC1_WP_ON_SELECT_INPUT,USDHC1_WP_ON_SELECT_INPUT Register" bitfld.long 0x3C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI2_MISO_ALT4,FEC_TX_EN_ALT3,KEY_COL7_ALT6,KEY_ROW0_ALT4" line.long 0x40 "USDHC2_CARD_DET_SELECT_INPUT,USDHC2_CARD_DET_SELECT_INPUT Register" bitfld.long 0x40 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_SS0_ALT4,EPDC_GDSP_ALT6,SD2_DATA7_ALT4,?..." line.long 0x44 "USDHC2_WP_ON_SELECT_INPUT,USDHC2_WP_ON_SELECT_INPUT Register" bitfld.long 0x44 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ECSPI1_MISO_ALT4,EPDC_GDRL_ALT6,SD2_DATA6_ALT4,?..." line.long 0x48 "USDHC3_CARD_DET_SELECT_INPUT,USDHC3_CARD_DET_SELECT_INPUT Register" bitfld.long 0x48 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_WAKE_ALT6,FEC_TX_DATA1_ALT4,I2C2_SDA_ALT4,REF_CLK_32K_ALT6" line.long 0x4C "USDHC3_DATA4_IN_SELECT_INPUT,USDHC3_DATA4_IN_SELECT_INPUT Register" bitfld.long 0x4C 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL1_ALT4,SD2_DATA4_ALT1" line.long 0x50 "USDHC3_DATA5_IN_SELECT_INPUT,USDHC3_DATA5_IN_SELECT_INPUT Register" bitfld.long 0x50 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW1_ALT4,SD2_DATA5_ALT1" line.long 0x54 "USDHC3_DATA6_IN_SELECT_INPUT,USDHC3_DATA6_IN_SELECT_INPUT Register" bitfld.long 0x54 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_COL2_ALT4,SD2_DATA6_ALT1" line.long 0x58 "USDHC3_DATA7_IN_SELECT_INPUT,USDHC3_DATA7_IN_SELECT_INPUT Register" bitfld.long 0x58 0. " DAISY ,Pads Involved in Daisy Chain" "KEY_ROW2_ALT4,SD2_DATA7_ALT1" line.long 0x5C "USDHC3_WP_ON_SELECT_INPUT,USDHC3_WP_ON_SELECT_INPUT Register" bitfld.long 0x5C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_STAT_ALT6,FEC_TX_EN_ALT4,I2C2_SCL_ALT4,REF_CLK_24M_ALT6" line.long 0x60 "USDHC4_CARD_CLK_IN_SELECT_INPUT,USDHC4_CARD_CLK_IN_SELECT_INPUT Register" bitfld.long 0x60 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_BDR0_ALT1,FEC_MDIO_ALT1,KEY_COL4_ALT4,?..." line.long 0x64 "USDHC4_CARD_DET_SELECT_INPUT,USDHC4_CARD_DET_SELECT_INPUT Register" bitfld.long 0x64 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA11_ALT6,EPDC_PWR_CTRL3_ALT6" line.long 0x68 "USDHC4_CMD_IN_SELECT_INPUT,USDHC4_CMD_IN_SELECT_INPUT Register" bitfld.long 0x68 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_BDR1_ALT1,FEC_TX_CLK_ALT1,KEY_ROW4_ALT4,?..." line.long 0x6C "USDHC4_DATA0_IN_SELECT_INPUT,USDHC4_DATA0_IN_SELECT_INPUT Register" bitfld.long 0x6C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_COM_ALT1,FEC_RX_ER_ALT1,KEY_COL5_ALT4,?..." line.long 0x70 "USDHC4_DATA1_IN_SELECT_INPUT,USDHC4_DATA1_IN_SELECT_INPUT Register" bitfld.long 0x70 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_IRQ_ALT1,FEC_CRS_DV_ALT1,KEY_ROW5_ALT4,?..." line.long 0x74 "USDHC4_DATA2_IN_SELECT_INPUT,USDHC4_DATA2_IN_SELECT_INPUT Register" bitfld.long 0x74 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_STAT_ALT1,FEC_RX_DATA1_ALT1,KEY_COL6_ALT4,?..." line.long 0x78 "USDHC4_DATA3_IN_SELECT_INPUT,USDHC4_DATA3_IN_SELECT_INPUT Register" bitfld.long 0x78 0.--1. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_WAKE_ALT1,FEC_TX_DATA0_ALT1,KEY_ROW6_ALT4,?..." line.long 0x7C "USDHC4_DATA4_IN_SELECT_INPUT,USDHC4_DATA4_IN_SELECT_INPUT Register" bitfld.long 0x7C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_MDC_ALT1,KEY_COL7_ALT4,LCD_CLK_ALT1,?..." line.long 0x80 "USDHC4_DATA5_IN_SELECT_INPUT,USDHC4_DATA5_IN_SELECT_INPUT Register" bitfld.long 0x80 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_RX_DATA0_ALT1,KEY_ROW7_ALT4,LCD_ENABLE_ALT1,?..." line.long 0x84 "USDHC4_DATA6_IN_SELECT_INPUT,USDHC4_DATA6_IN_SELECT_INPUT Register" bitfld.long 0x84 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_EN_ALT1,KEY_COL3_ALT4,LCD_HSYNC_ALT1,?..." line.long 0x88 "USDHC4_DATA7_IN_SELECT_INPUT,USDHC4_DATA7_IN_SELECT_INPUT Register" bitfld.long 0x88 0.--1. " DAISY ,Pads Involved in Daisy Chain" "FEC_TX_DATA1_ALT1,KEY_ROW3_ALT4,LCD_VSYNC_ALT1,?..." line.long 0x8C "USDHC4_WP_ON_SELECT_INPUT,USDHC4_WP_ON_SELECT_INPUT Register" bitfld.long 0x8C 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_DATA10_ALT6,EPDC_PWR_CTRL2_ALT6" line.long 0x90 "EIM_DTACK_B_SELECT_INPUT,EIM_DTACK_B_SELECT_INPUT Register" bitfld.long 0x90 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_WAKE_ALT3,LCD_RESET_ALT1" line.long 0x94 "EIM_WAIT_B_SELECT_INPUT,EIM_WAIT_B_SELECT_INPUT Register" bitfld.long 0x94 0. " DAISY ,Pads Involved in Daisy Chain" "EPDC_PWR_STAT_ALT3,LCD_RESET_ALT3" tree.end width 0x0B elif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") width 6. tree "General Purpose Registers" group.long 0x00++0x13 line.long 0x00 "GPR0,General Purpose Register 0" bitfld.long 0x00 30.--31. " CLOCK_8_MUX_SEL ,Source of asrck_clock_8 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p7 muxed with ssi3.ssi_srck,Audmux.amx_output_rxclk_p7,Ssi3.ssi_srck,Ssi3.rx_bit_clk" textline " " bitfld.long 0x00 28.--29. " CLOCK_0_MUX_SEL ,Source of asrck_clock_0 in ASRC according to clock muxing scheme" "Esai1.ipp_ind_sckr muxed with esai1.ipp_do_sckr,Esai1.ipp_ind_sckr,Esai1.ipp_do_sckr,?..." textline " " bitfld.long 0x00 26.--27. " CLOCK_B_MUX_SEL ,Source of asrck_clock_b in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p7 muxed with ssi3.ssi_stck,Audmux.amx_output_txclk_p7,Ssi3.ssi_stck,Ssi3.tx_bit_clk" textline " " bitfld.long 0x00 24.--25. " CLOCK_3_MUX_SEL ,Source of asrck_clock_3 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p7 muxed with ssi3.ssi_srck,Audmux.amx_output_rxclk_p7,Ssi3.ssi_srck,Ssi3.rx_bit_clk" textline " " bitfld.long 0x00 22.--23. " CLOCK_A_MUX_SEL ,Source of asrck_clock_a in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p2 muxed with ssi2.ssi_stck,Audmux.amx_output_txclk_p2,Ssi2.ssi_stck,Ssi2.tx_bit_clk" textline " " bitfld.long 0x00 20.--21. " CLOCK_2_MUX_SEL ,Source of asrck_clock_2 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p2 muxed with ssi2.ssi_srck,Audmux.amx_output_rxclk_p2,Ssi2.ssi_srck,Ssi2.rx_bit_clk" textline " " bitfld.long 0x00 18.--19. " CLOCK_9_MUX_SEL ,Source of asrck_clock_9 in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p1 muxed with ssi1.ssi_stck,Audmux.amx_output_txclk_p1,Ssi1.ssi_stck,Ssi1.tx_bit_clk" textline " " bitfld.long 0x00 16.--17. " CLOCK_1_MUX_SEL ,Source of asrck_clock_1 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p1 muxed with ssi1.ssi_srck,Audmux.amx_output_rxclk_p1,Ssi1.ssi_srck,Ssi1.rx_bit_clk" textline " " bitfld.long 0x00 14.--15. " TX_CLK2_MUX_SEL ,Source of tx_clk2 in SPDIF according to ASRC clock muxing scheme" "Same as for asrc.asrck_clock_1,Same as for asrc.asrck_clock_2,Same as for asrc.asrck_clock_3,?..." textline " " bitfld.long 0x00 8.--10. " PCIE_RX0_EQ ,Control pcie phy's rx0_eq bits" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 7. " DMAREQ_MUX_SEL7 ,Sources for SDMA_EVENT[14]" "Spdif.drq0_spdif_b,Iomux.sdma_ext_events[1]" textline " " bitfld.long 0x00 6. " DMAREQ_MUX_SEL6 ,Sources for SDMA_EVENT[23]" "Esai.,I2c3.ipi_int_b" textline " " bitfld.long 0x00 5. " DMAREQ_MUX_SEL5 ,Sources for SDMA_EVENT[9]" "Ecspi4.ipd_req_cspi_rdma_b,Epit2.ipi_int_epit_oc" textline " " bitfld.long 0x00 4. " DMAREQ_MUX_SEL4 ,Sources for SDMA_EVENT[10]" "Ecspi4.ipd_req_cspi_tdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 3. " DMAREQ_MUX_SEL3 ,Sources for SDMA_EVENT[5]" "Ecspi2.ipd_req_cspi_rdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 2. " DMAREQ_MUX_SEL2 ,Sources for SDMA_EVENT[4]" "Ecspi1.ipd_req_cspi_tdma_b,I2c2.ipi_int_b" textline " " bitfld.long 0x00 1. " DMAREQ_MUX_SEL1 ,Sources for SDMA_EVENT[3]" "Ecspi1.ipd_req_cspi_rdma_b,I2c3.ipi_int_b" textline " " bitfld.long 0x00 0. " DMAREQ_MUX_SEL0 ,Sources for SDMA_EVENT[2]" "Ipu1.,Iomux.sdma_events[0]" textline " " line.long 0x04 "GPR1,General Purpose Register 1" bitfld.long 0x04 31. " CFG_L1_CLK_REMOVAL_EN ,Enable the reference clock removal in L1 state" "Disabled,Enabled" bitfld.long 0x04 30. " APP_CLK_REQ_N ,Application logic is ready to have reference clock removed" "Not ready,Ready" bitfld.long 0x04 28. " APP_REQ_EXIT_L1 ,PCIe application request to exit L1" "Not requested,Requested" textline " " bitfld.long 0x04 27. " APP_READY_ENTR_L23 ,PCIe application ready to enter L23" "Not ready,Ready" bitfld.long 0x04 26. " APP_REQ_ENTR_L1 ,PCIe application request to enter L1" "Not requested,Requested" bitfld.long 0x04 25. " MIPI_COLOR_SW ,MIPI color switch control" "Not requested,Requested" textline " " bitfld.long 0x04 24. " MIPI_DPI_OFF ,MIPI DPI shutdown request" "Not requested,Requested" bitfld.long 0x04 22. " EXC_MON ,Exclusive monitor response select of illegal command" "OKEY,SLVError" bitfld.long 0x04 21. " ENET_CLK_SEL ,ENET TX reference clock" "Pad,Internal" textline " " bitfld.long 0x04 18. " PCIE_TEST_PD ,PCIe test power down control" "Not requested,Requested" bitfld.long 0x04 16. " REF_SSP_EN ,Reference Clock Enable for SS function" "Disabled,Enabled" bitfld.long 0x04 15. " USB_EXP_MODE ,USB Exposure mode" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SYS_INT ,PCIe system interrupt request" "Not asserted,Asserted" bitfld.long 0x04 12. " GINT ,Global interrupt 0 bit" "Not asserted,Asserted" bitfld.long 0x04 10.--11. " ADDRS3 ,Address Space 3" "32-MBytes,64-MBytes,128-MBytes,?..." textline " " bitfld.long 0x04 9. " ACT_CS3 ,Active Chip 3" "Not activated,Activated" bitfld.long 0x04 7.--8. " ADDRS2 ,Address Space 2" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 6. " ACT_CS2 ,Active Chip 2" "Not activated,Activated" textline " " bitfld.long 0x04 4.--5. " ADDRS1 ,Address Space 1" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 3. " ACT_CS1 ,Active Chip 1" "Not activated,Activated" bitfld.long 0x04 1.--2. " ADDRS0 ,Address Space 0" "32-MBytes,64-MBytes,128-MBytes,?..." textline " " bitfld.long 0x04 0. " ACT_CS0 ,Active Chip 0" "Not activated,Activated" line.long 0x08 "GPR2,General Purpose Register 2" bitfld.long 0x08 20.--21. " COUNTER_RESET_VAL[1:0] ,Reset value for the LDB counter" "5,3,4,6" bitfld.long 0x08 16.--18. " LVDS_CLK_SHIFT[2:0] ,Shifts the LVDS output clock" "1100011,1110001,1111000,1000111,0001111,0011111,0111100,1100011" bitfld.long 0x08 10. " DI1_VS_POLARITY ,Vsync polarity for IPU's DI1 interface" "High,Low" textline " " bitfld.long 0x08 9. " DI0_VS_POLARITY ,Vsync polarity for IPU's DI0 interface" "High,Low" bitfld.long 0x08 8. " BIT_MAPPING_CH1 ,Data mapping for LVDS channel 1" "SPWG,JEIDA" bitfld.long 0x08 7. " DATA_WIDTH_CH1 ,Data width for LVDS channel 1" "18-bits,24-bits" textline " " bitfld.long 0x08 6. " BIT_MAPPING_CH0 ,Data mapping for LVDS channel 0" "SPWG,JEIDA" bitfld.long 0x08 5. " DATA_WIDTH_CH0 ,Data width for LVDS channel 0" "18-bits,24-bits" bitfld.long 0x08 4. " SPLIT_MODE_EN ,Split mode" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " CH1_MODE[10] ,LVDS channel 1 operation mode" "Disabled,Enabled/DI0,Disabled,Enabled/DI1" bitfld.long 0x08 0.--1. " CH0_MODE[10] ,LVDS channel 0 operation mode" "Disabled,Enabled/DI0,Disabled,Enabled/DI1" line.long 0x0C "GPR3,General Purpose Register 3" bitfld.long 0x0C 29.--30. " GPU_DBG ,GPU debug busses to IOMUX" "GPU3D,GPU2D,OpenVG,?..." bitfld.long 0x0C 28. " BCH_WR_CACHE_CTL ,Control BCH block cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x0C 27. " BCH_RD_CACHE_CTL ,Control BCH block cacheable attribute of AXI read transactions" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " USDHCX_WR_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x0C 25. " USDHCX_RD_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI read transactions" "Disabled,Enabled" bitfld.long 0x0C 24. " OCRAM_CTL[24] ,Write address pipeline control bit" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " OCRAM_CTL[23] ,Write data pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 22. " OCRAM_CTL[22] ,Read address pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 21. " OCRAM_CTL[21] ,Read data wait state control bit" "Disabled,Enabled" textline " " bitfld.long 0x0C 17.--20. " OCRAM_STATUS ,OCRAM status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16. " CORE3_DBG_ACK_EN ,Core 3 debug acknowledge enable to global request" "0,1" bitfld.long 0x0C 15. " CORE2_DBG_ACK_EN ,Core 2 debug acknowledge enable to global request" "0,1" textline " " bitfld.long 0x0C 14. " CORE1_DBG_ACK_EN ,Core 1 debug acknowledge enable to global request" "0,1" bitfld.long 0x0C 13. " CORE0_DBG_ACK_EN ,Core 0 debug acknowledge enable to global request" "0,1" bitfld.long 0x0C 12. " TZASC2_BOOT_LOCK ,TZASC-2 secure boot lock" "Not locked,Locked" textline " " bitfld.long 0x0C 11. " TZASC1_BOOT_LOCK ,TZASC-1 secure boot lock" "Not locked,Locked" bitfld.long 0x0C 10. " MIPI_DBI_MUX_CTL ,MIPI DBI mux control" "MIPI DBI,Itself" bitfld.long 0x0C 8.--9. " LVDS1_MUX_CTL ,LVDS1 MUX control" "IPU1 DI0,IPU1 DI1,LCDIF,?..." textline " " bitfld.long 0x0C 6.--7. " LVDS0_MUX_CTL ,LVDS0 MUX control" "IPU1 DI0,IPU1 DI1,LCDIF,?..." bitfld.long 0x0C 4.--5. " MIPI_MUX_CTL ,MIPI MUX control" "IPU1 DI0,IPU1 DI1,LCDIF,?..." bitfld.long 0x0C 2.--3. " HDMI_MUX_CTL ,HDMI MUX control" "IPU1 DI0,IPU1 DI1,LCDIF,?..." line.long 0x10 "GPR4,General Purpose Register 4" bitfld.long 0x10 31. " VDOA_WR_CACHE_SEL ,Cacheable attribute of VDOA AXI write transcations" "VDOA core,VDOA_WR_CACHE_VAL" bitfld.long 0x10 30. " VDOA_RD_CACHE_SEL ,Cacheable attribute of VDOA AXI read transcations" "VDOA core,VDOA_RD_CACHE_VAL" bitfld.long 0x10 29. " VDOA_WR_CACHE_VAL ,VDOA block cacheable attribute value of AXI write transactions" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " VDOA_RD_CACHE_VAL ,VDOA block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 27. " PCIe_WR_CACHE_SEL ,Cacheable attribute of PCIe AXI write transcations" "PCIe core,PCIe_WR_CACHE_VAL" bitfld.long 0x10 26. " PCIe_RD_CACHE_SEL ,Cacheable attribute of PCIe AXI read transcations" "PCIe core,PCIe_RD_CACHE_VAL" textline " " bitfld.long 0x10 25. " PCIe_WR_CACHE_VAL ,PCIe block cacheable attribute value of AXI write transactions" "Disabled,Enabled" bitfld.long 0x10 24. " PCIe_RD_CACHE_VAL ,PCIe block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 19. " SDMA_STOP_ACK ,SDMA stop acknowledge" "0,1" textline " " bitfld.long 0x10 18. " CAN2_STOP_ACK ,CAN-2 stop acknowledge" "0,1" bitfld.long 0x10 17. " CAN1_STOP_ACK ,CAN-1 stop acknowledge" "0,1" bitfld.long 0x10 16. " ENET_STOP_ACK ,ENET stop acknowledge" "0,1" textline " " hexmask.long.byte 0x10 8.--15. 1. " SOC_VERSION ,SOC version" bitfld.long 0x10 7. " VPU_WR_CACHE_SEL ,Cacheable attribute of VPU AXI write transcations" "VPU core,VPU_SEC_WR_CACHE_VAL" bitfld.long 0x10 6. " VPU_RD_CACHE_SEL ,Cacheable attribute of VPU AXI read transcations" "VPU core,VPU_SEC_RD_CACHE_VAL" textline " " bitfld.long 0x10 5. " VPU_S_WR_CACHE_VAL ,VPU (secondary bus) block cacheable attribute value of AXI write transactions" "Disabled,Enabled" bitfld.long 0x10 4. " VPU_S_RD_CACHE_CTL ,VPU (secondary bus) block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 3. " VPU_P_WR_CACHE_VAL ,VPU (primary bus) block cacheable attribute value of AXI write transactions" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " VPU_P_RD_CACHE_VAL ,VPU (primary bus) block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 1. " IPU_WR_CACHE_CTL ,Control IPU-1 and IPU-2 block cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x10 0. " IPU_RD_CACHE_CTL ,Control IPU-1 and IPU-2 block cacheable attribute of AXI read transactions" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "GPR5,General Purpose Register 5" bitfld.long 0x00 8. " L2_CLK_STOP ,L2 cache clock stop indication" "Not stopped,Stopped" bitfld.long 0x00 5. " ARM_WFE[1] ,Indicates whether Core 1 is in WFE (Wait for Event) mode" "Not in WFE,WFE" bitfld.long 0x00 4. " ARM_WFE[0] ,Indicates whether Core 0 is in WFE (Wait for Event) mode" "Not in WFE,WFE" textline " " bitfld.long 0x00 3. " ARM_WFI[3] ,Indicates whether Core 3 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" bitfld.long 0x00 2. " ARM_WFI[2] ,Indicates whether Core 2 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" bitfld.long 0x00 1. " ARM_WFI[1] ,Indicates whether Core 1 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" textline " " bitfld.long 0x00 0. " ARM_WFI[0] ,Indicates whether Core 0 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" group.long 0x18++0x0B line.long 0x00 "GPR6,General Purpose Register 6" hexmask.long.word 0x00 16.--31. 1. " IPU1_RD_QoS ,IPU-1 RD QoS gasket config" hexmask.long.word 0x00 0.--15. 1. " IPU1_WR_QoS ,IPU-1 WR QoS gasket config" line.long 0x04 "GPR7,General Purpose Register 7" hexmask.long.word 0x04 16.--31. 1. " IPU2_RD_QoS ,IPU-2 RD QoS gasket config" hexmask.long.word 0x04 0.--15. 1. " IPU2_WR_QoS ,IPU-2 WR QoS gasket config" line.long 0x08 "GPR8,General Purpose Register 8" hexmask.long.byte 0x08 25.--31. 1. " PCS_TX_SWING_LOW ,PCIe_TX_SWING_LOW" hexmask.long.byte 0x08 18.--24. 1. " PCS_TX_SWING_FULL ,PCIe_TX_SWING_FULL" bitfld.long 0x08 12.--17. " PCS_TX_DEEMMPH_GEN2_6DB ,PCS_TX_DEEMMPH_GEN2_6DB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 6.--11. " PCS_TX_DEEMPH_GEN2_3P5DB ,PCS_TX_DEEMPH_GEN2_3P5DB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " PCS_TX_DEEMPH_GEN1 ,PCS_TX_DEEMPH_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x24++0x03 line.long 0x00 "GPR9,General Purpose Register 9" bitfld.long 0x00 1. " TZASC2_BYP ,TZASC-2 bypass/transaction check" "Not byppased/checked,Byppased/not checked" bitfld.long 0x00 0. " TZASC2_BYP ,TZASC-1 bypass/transaction check" "Not byppased/checked,Byppased/not checked" group.long 0x28++0x03 line.long 0x00 "GPR10,General Purpose Register 10" bitfld.long 0x00 29. " LOCK_DBG_EN ,DBG_EN field lock" "Not locked,Locked" bitfld.long 0x00 28. " LOCK_DBG_CLK_EN ,DBG_CLK_EN field lock" "Not locked,Locked" bitfld.long 0x00 27. " LOCK_SEC_ERR_RESP ,SEC_ERR_RESP field lock" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCK_OCRAM_TZ_ADDR[4] ,OCRAM_TZ_ADDR[4] field lock" "Not locked,Locked" bitfld.long 0x00 24. " LOCK_OCRAM_TZ_ADDR[3] ,OCRAM_TZ_ADDR[3] field lock" "Not locked,Locked" bitfld.long 0x00 23. " LOCK_OCRAM_TZ_ADDR[2] ,OCRAM_TZ_ADDR[2] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 22. " LOCK_OCRAM_TZ_ADDR[1] ,OCRAM_TZ_ADDR[1] field lock" "Not locked,Locked" bitfld.long 0x00 21. " LOCK_OCRAM_TZ_ADDR[0] ,OCRAM_TZ_ADDR[0] field lock" "Not locked,Locked" bitfld.long 0x00 20. " LOCK_OCRAM_TZ_EN ,OCRAM_TZ_EN field lock" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCK_DCIC2_MUX_CTL[1] ,DCIC2_MUX_CTL[1] field lock" "Not locked,Locked" bitfld.long 0x00 18. " LOCK_DCIC2_MUX_CTL[0] ,DCIC2_MUX_CTL[0] field lock" "Not locked,Locked" bitfld.long 0x00 17. " LOCK_DCIC1_MUX_CTL[1] ,DCIC1_MUX_CTL[1] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 16. " LOCK_DCIC1_MUX_CTL[0] ,DCIC1_MUX_CTL[0] field lock" "Not locked,Locked" bitfld.long 0x00 13. " DBG_EN ,ARM non secure debug enabl" "Disabled,Enabled" bitfld.long 0x00 12. " DBG_CLK_EN ,ARM Debug clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SEC_ERR_RESP ,Security error response enable" "OKEY,SLVError" bitfld.long 0x00 5.--9. " OCRAM_TZ_ADDR ,OCRAM TrustZone start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4. " OCRAM_TZ_EN ,OCRAM TrustZone enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " DCIC2_MUX_CTL ,DCIC-2 MUX control" "IPU0 DI1 port,LVDS0,LVDS1,MIPI DPI" bitfld.long 0x00 0.--1. " DCIC1_MUX_CTL ,DCIC-1 MUX control" "IPU0/1 DI0 port,LVDS0,LVDS1,HDMI" group.long 0x30++0x7 line.long 0x00 "GPR12,General Purpose Register 12" bitfld.long 0x00 27. " ARMP_IPG_CLK_EN ,ARM platform IPG clock enable" "Disabled,Enabled" bitfld.long 0x00 26. " ARMP_AHB_CLK_EN ,ARM platform AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 25. " ARMP_ATB_CLK_EN ,ARM platform ATB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ARMP_APB_CLK_EN ,ARM platform APB clock enable" "Disabled,Enabled" bitfld.long 0x00 21.--23. " PCIe_CTL_7 ,PCIe control of diagnostic bus select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17.--20. " DIA_STATUS_BUS_SELECT ,PCIe control of diag_bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16. " APPS_PM_XMT_TURNOFF ,PCIe control (RC mode only)" "0,1" bitfld.long 0x00 12.--15. " DEVICE_TYPE ,Device/Port Type" "EP Mode,,RC Mode,?..." bitfld.long 0x00 11. " APP_INIT_RST ,Hot Reset to the downstream device" "No reset,Reset" textline " " bitfld.long 0x00 10. " APP_LTSSM_ENABLE ,PCIe control - application signal to enable the LTSSM" "Not ready,Not ready" bitfld.long 0x00 9. " APPS_PM_XMT_PME ,Wake Up" "No wakeup,Wakeup" bitfld.long 0x00 4.--8. " LOS_LEVEL ,Loss-of-Signal Detector Sensitivity Level Control Function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 2.--3. " uSDHC_DBG_MUX ,uSDHC debug mux control" "uSDHC1,uSDHC2,uSDHC3,uSDHC4" line.long 0x04 "GPR13,General Purpose Register 13" bitfld.long 0x04 30. " SDMA_STOP_REQ ,SDMA stop request" "Not requested,Requested" bitfld.long 0x04 29. " CAN2_STOP_REQ ,CAN2 stop request" "Not requested,Requested" bitfld.long 0x04 28. " CAN1_STOP_REQ ,CAN1 stop request" "Not requested,Requested" textline " " bitfld.long 0x04 27. " ENET_STOP_REQ ,ENET stop request" "Not requested,Requested" bitfld.long 0x04 18. " LCDIF_RD_CACHE_SEL ,Selects the cacheable attribute of LCDIF AXI read transcations" "LCDIF core,LCDIF_RD_CACHE_VAL" bitfld.long 0x04 16. " LCDIF_RD_CACHE_VAL ,LCDIF block cacheable attribute value of AXI read transactions" "Off,On" textline " " bitfld.long 0x04 15. " EPDC_WR_CACHE_SEL ,Selects the cacheable attribute of EPDC AXI write transcations" "EPDC core,EPDC_WR_CACHE_VAL" bitfld.long 0x04 14. " EPDC_RD_CACHE_SEL ,Selects the cacheable attribute of EPDC AXI read transcations" "EPDC,EPDC_RD_CACHE_VAL" bitfld.long 0x04 13. " EPDC_WR_CACHE_VAL ,EPDC block cacheable attribute value of AXI write transactions" "Off,On" textline " " bitfld.long 0x04 12. " EPDC_RD_CACHE_VAL ,EPDC block cacheable attribute value of AXI read transactions" "Off,On" bitfld.long 0x04 11. " PXP_WR_CACHE_SEL ,Selects the cacheable attribute of PXP AXI write transcations" "PXP core,PXP_WR_CACHE_VAL" bitfld.long 0x04 10. " PXP_RD_CACHE_SEL ,Selects the cacheable attribute of PXP AXI read transcations" "PXP core,PXP_RD_CACHE_VAL" textline " " bitfld.long 0x04 9. " PXP_WR_CACHE_VA ,PXP block cacheable attribute value of AXI write transactions" "Off,On" bitfld.long 0x04 8. " PXP_RD_CACHE_VAL ,PXP block cacheable attribute value of AXI read transactions" "Off,On" bitfld.long 0x04 3.--5. " IPU_CSI1_MUX ,IPU_CSI1_MUX" "MIPI_CSI0,MIPI_CSI1,MIPI_CSI2,MIPI_CSI3,IPU_CSI1,?..." textline " " bitfld.long 0x04 0.--2. " IPU_CSI0_MUX ,IPU_CSI0_MUX" "MIPI_CSI0,MIPI_CSI1,MIPI_CSI2,MIPI_CSI3,IPU_CSI1,?..." tree.end tree "SW_MUX_CTL_PAD Registers" width 32. group.long 0x4C++0x313 line.long 0x00 "SW_MUX_CTL_PAD_CSI0_DAT10,SW_MUX_CTL_PAD_CSI0_DAT10 register" bitfld.long 0x00 4. " SION ,Force input path of pad CSI0_DAT10" "Not forced,Forced" bitfld.long 0x00 0.--2. " MUX_MODE ,CSI0_DAT10 MUX Mode" "ipu1;CSI0_D[10],audmux;AUD3_RXC,ecspi2;MISO,uart1;TXD_MUX,,gpio5;GPIO[28],,ARM_TRACE07" line.long 0x04 "SW_MUX_CTL_PAD_CSI0_DAT11,SW_MUX_CTL_PAD_CSI0_DAT11 register" bitfld.long 0x04 4. " SION ,Force input path of pad CSI0_DAT11" "Not forced,Forced" bitfld.long 0x04 0.--2. " MUX_MODE ,CSI0_DAT11 MUX Mode" "ipu1;CSI0_D[11],audmux;AUD3_RXFS,ecspi2;SS0,uart1;RXD_MUX,,gpio5;GPIO[29],,ARM_TRACE08" line.long 0x08 "SW_MUX_CTL_PAD_CSI0_DAT12,SW_MUX_CTL_PAD_CSI0_DAT12 register" bitfld.long 0x08 4. " SION ,Force input path of pad CSI0_DAT12" "Not forced,Forced" bitfld.long 0x08 0.--2. " MUX_MODE ,CSI0_DAT12 MUX Mode" "ipu1;CSI0_D[12],eim;EIM_D[8],,uart4;TXD_MUX,,gpio5;GPIO[30],,ARM_TRACE09" line.long 0x0C "SW_MUX_CTL_PAD_CSI0_DAT13,SW_MUX_CTL_PAD_CSI0_DAT13 register" bitfld.long 0x0C 4. " SION ,Force input path of pad CSI0_DAT13" "Not forced,Forced" bitfld.long 0x0C 0.--2. " MUX_MODE ,CSI0_DAT13 MUX Mode" "ipu1;CSI0_D[13],eim;EIM_D[9],,uart4;RXD_MUX,,gpio5;GPIO[31],,ARM_TRACE10" line.long 0x10 "SW_MUX_CTL_PAD_CSI0_DAT14,SW_MUX_CTL_PAD_CSI0_DAT14 register" bitfld.long 0x10 4. " SION ,Force input path of pad CSI0_DAT14" "Not forced,Forced" bitfld.long 0x10 0.--2. " MUX_MODE ,CSI0_DAT14 MUX Mode" "ipu1;CSI0_D[14],eim;EIM_D[10],,uart5;TXD_MUX,,gpio6;GPIO[0],,ARM_TRACE11" line.long 0x14 "SW_MUX_CTL_PAD_CSI0_DAT15,SW_MUX_CTL_PAD_CSI0_DAT15 register" bitfld.long 0x14 4. " SION ,Force input path of pad CSI0_DAT15" "Not forced,Forced" bitfld.long 0x14 0.--2. " MUX_MODE ,CSI0_DAT15 MUX Mode" "ipu1;CSI0_D[15],eim;EIM_D[11],,uart5;RXD_MUX,,gpio6;GPIO[1],,ARM_TRACE12" line.long 0x18 "SW_MUX_CTL_PAD_CSI0_DAT16,SW_MUX_CTL_PAD_CSI0_DAT16 register" bitfld.long 0x18 4. " SION ,Force input path of pad CSI0_DAT16" "Not forced,Forced" bitfld.long 0x18 0.--2. " MUX_MODE ,CSI0_DAT16 MUX Mode" "ipu1;CSI0_D[16],eim;EIM_D[12],,uart4;RTS,,gpio6;GPIO[2],,ARM_TRACE13" line.long 0x1C "SW_MUX_CTL_PAD_CSI0_DAT17,SW_MUX_CTL_PAD_CSI0_DAT17 register" bitfld.long 0x1C 4. " SION ,Force input path of pad CSI0_DAT17" "Not forced,Forced" bitfld.long 0x1C 0.--2. " MUX_MODE ,CSI0_DAT17 MUX Mode" "ipu1;CSI0_D[17],eim;EIM_D[13],,uart4;CTS,,gpio6;GPIO[3],,ARM_TRACE14" line.long 0x20 "SW_MUX_CTL_PAD_CSI0_DAT18,SW_MUX_CTL_PAD_CSI0_DAT18 register" bitfld.long 0x20 4. " SION ,Force input path of pad CSI0_DAT18" "Not forced,Forced" bitfld.long 0x20 0.--2. " MUX_MODE ,CSI0_DAT18 MUX Mode" "ipu1;CSI0_D[18],eim;EIM_D[14],,uart5;RTS,,gpio6;GPIO[4],,ARM_TRACE15" line.long 0x24 "SW_MUX_CTL_PAD_CSI0_DAT19,SW_MUX_CTL_PAD_CSI0_DAT19 register" bitfld.long 0x24 4. " SION ,Force input path of pad CSI0_DAT19" "Not forced,Forced" bitfld.long 0x24 0.--2. " MUX_MODE ,CSI0_DAT19 MUX Mode" "ipu1;CSI0_D[19],eim;EIM_D[15],,uart5;CTS,,gpio6;GPIO[5],?..." line.long 0x28 "SW_MUX_CTL_PAD_CSI0_DAT4,SW_MUX_CTL_PAD_CSI0_DAT4 register" bitfld.long 0x28 4. " SION ,Force input path of pad CSI0_DAT4" "Not forced,Forced" bitfld.long 0x28 0.--2. " MUX_MODE ,CSI0_DAT4 MUX Mode" "ipu1;CSI0_D[4],eim;EIM_D[2],ecspi1;SCLK,kpp;COL[5],audmux;AUD3_TXC,gpio5;GPIO[22],,ARM_TRACE01" line.long 0x2C "SW_MUX_CTL_PAD_CSI0_DAT5,SW_MUX_CTL_PAD_CSI0_DAT5 register" bitfld.long 0x2C 4. " SION ,Force input path of pad CSI0_DAT5" "Not forced,Forced" bitfld.long 0x2C 0.--2. " MUX_MODE ,CSI0_DAT5 MUX Mode" "ipu1;CSI0_D[5],EIM;EIM_D[3],ecspi1;MOSI,kpp;ROW[5],audmux;AUD3_TXD,gpio5;GPIO[23],,ARM_TRACE02" line.long 0x30 "SW_MUX_CTL_PAD_CSI0_DAT6,SW_MUX_CTL_PAD_CSI0_DAT6 register" bitfld.long 0x30 4. " SION ,Force input path of pad CSI0_DAT6" "Not forced,Forced" bitfld.long 0x30 0.--2. " MUX_MODE ,CSI0_DAT6 MUX Mode" "ipu1;CSI0_D[6],EIM;EIM_D[4],ecspi1;MISO,kpp;COL[6],audmux;AUD3_TXFS,gpio5;GPIO[24],,ARM_TRACE03" line.long 0x34 "SW_MUX_CTL_PAD_CSI0_DAT7,SW_MUX_CTL_PAD_CSI0_DAT7 register" bitfld.long 0x34 4. " SION ,Force input path of pad CSI0_DAT7" "Not forced,Forced" bitfld.long 0x34 0.--2. " MUX_MODE ,CSI0_DAT7 MUX Mode" "ipu1;CSI0_D[7],EIM;EIM_D[5],ecspi1;SS0,kpp;ROW[6],audmux;AUD3_RXD,gpio5;GPIO[25],,ARM_TRACE04" line.long 0x38 "SW_MUX_CTL_PAD_CSI0_DAT8,SW_MUX_CTL_PAD_CSI0_DAT8 register" bitfld.long 0x38 4. " SION ,Force input path of pad CSI0_DAT8" "Not forced,Forced" bitfld.long 0x38 0.--2. " MUX_MODE ,CSI0_DAT8 MUX Mode" "ipu1;CSI0_D[8],EIM;EIM_D[6],ecspi2;SCLK,kpp;COL[7],i2c1;SDA,gpio5;GPIO[26],,ARM_TRACE05" line.long 0x3C "SW_MUX_CTL_PAD_CSI0_DAT9,SW_MUX_CTL_PAD_CSI0_DAT9 register" bitfld.long 0x3C 4. " SION ,Force input path of pad CSI0_DAT9" "Not forced,Forced" bitfld.long 0x3C 0.--2. " MUX_MODE ,CSI0_DAT9 MUX Mode" "ipu1;CSI0_D[9],EIM;EIM_D[7],ecspi2;MOSI,kpp;ROW[7],i2c1;SCL,gpio5;GPIO[27],,ARM_TRACE06" line.long 0x40 "SW_MUX_CTL_PAD_CSI0_DATA_EN,SW_MUX_CTL_PAD_CSI0_DATA_EN register" bitfld.long 0x40 4. " SION ,Force input path of pad CSI0_DATA_EN" "Not forced,Forced" bitfld.long 0x40 0.--2. " MUX_MODE ,CSI0_DATA_EN MUX Mode" "ipu1;CSI0_DATA_EN,eim;EIM_D[0],,,,gpio5;GPIO[20],,ARM_TRACE_CLK" line.long 0x44 "SW_MUX_CTL_PAD_CSI0_MCLK,SW_MUX_CTL_PAD_CSI0_MCLK register" bitfld.long 0x44 4. " SION ,Force input path of pad CSI0_MCLK" "Not forced,Forced" bitfld.long 0x44 0.--2. " MUX_MODE ,CSI0_MCLK MUX Mode" "ipu1;CSI0_HSYNC,,,ccm;CLKO,,gpio5;GPIO[19],,ARM_TRACE_CTL" line.long 0x48 "SW_MUX_CTL_PAD_CSI0_PIXCLK,SW_MUX_CTL_PAD_CSI0_PIXCLK register" bitfld.long 0x48 4. " SION ,Force input path of pad CSI0_PIXCLK" "Not forced,Forced" bitfld.long 0x48 0.--2. " MUX_MODE ,CSI0_PIXCLK MUX Mode" "ipu1;CSI0_PIXCLK,,,,,gpio5;GPIO[18],,EVENTO" line.long 0x4C "SW_MUX_CTL_PAD_CSI0_VSYNC,SW_MUX_CTL_PAD_CSI0_VSYNC register" bitfld.long 0x4C 4. " SION ,Force input path of pad CSI0_VSYNC" "Not forced,Forced" bitfld.long 0x4C 0.--2. " MUX_MODE ,CSI0_VSYNC MUX Mode" "ipu1;CSI0_VSYNC,EIM;EIM_D[1],,,,gpio5;GPIO[21],,ARM_TRACE00" line.long 0x50 "SW_MUX_CTL_PAD_DI0_DISP_CLK,SW_MUX_CTL_PAD_DI0_DISP_CLK register" bitfld.long 0x50 4. " SION ,Force input path of pad DI0_DISP_CLK" "Not forced,Forced" bitfld.long 0x50 0.--3. " MUX_MODE ,DI0_DISP_CLK MUX Mode" "ipu1;DI0_DISP_CLK,lcdif;CLK,,,,gpio4;GPIO[16],,,lcdif;WR_RWN,?..." line.long 0x54 "SW_MUX_CTL_PAD_DI0_PIN15,SW_MUX_CTL_PAD_DI0_PIN15 register" bitfld.long 0x54 4. " SION ,Force input path of pad DI0_PIN15" "Not forced,Forced" bitfld.long 0x54 0.--3. " MUX_MODE ,DI0_PIN15 MUX Mode" "ipu1;DI0_PIN15,lcdif;ENABLE,audmux;AUD6_TXC,,,gpio4;GPIO[17],,,lcdif;RD_E,?..." line.long 0x58 "SW_MUX_CTL_PAD_DI0_PIN2,SW_MUX_CTL_PAD_DI0_PIN2 register" bitfld.long 0x58 4. " SION ,Force input path of pad DI0_PIN2" "Not forced,Forced" bitfld.long 0x58 0.--3. " MUX_MODE ,DI0_PIN2 MUX Mode" "ipu1;DI0_PIN2,lcdif;HSYNC;DI0_PIN2,audmux;AUD6_TXD,,,gpio4;GPIO[18],,,lcdif,?..." line.long 0x5C "SW_MUX_CTL_PAD_DI0_PIN3,SW_MUX_CTL_PAD_DI0_PIN3 register" bitfld.long 0x5C 4. " SION ,Force input path of pad DI0_PIN3" "Not forced,Forced" bitfld.long 0x5C 0.--3. " MUX_MODE ,DI0_PIN3 MUX Mode" "ipu1;DI0_PIN3,lcdif;VSYNC,audmux;AUD6_TXFS,,,gpio4;GPIO[19],,,lcdif;CS,?..." line.long 0x60 "SW_MUX_CTL_PAD_DI0_PIN4,SW_MUX_CTL_PAD_DI0_PIN4 register" bitfld.long 0x60 4. " SION ,Force input path of pad DI0_PIN4" "Not forced,Forced" bitfld.long 0x60 0.--3. " MUX_MODE ,DI0_PIN4 MUX Mode" "ipu1;DI0_PIN4,lcdif;BUSY,audmux;AUD6_RXD,usdhc1;WP,,gpio4;GPIO[20],,,lcdif;RESET,?..." line.long 0x64 "SW_MUX_CTL_PAD_DISP0_DAT0,SW_MUX_CTL_PAD_DISP0_DAT0 register" bitfld.long 0x64 4. " SION ,Force input path of pad DISP0_DAT0" "Not forced,Forced" bitfld.long 0x64 0.--2. " MUX_MODE ,DISP0_DAT0 MUX Mode" "ipu1;DISP0_DAT[0],lcdif;DAT[0],ecspi3;SCLK,,,gpio4;GPIO[21],?..." line.long 0x68 "SW_MUX_CTL_PAD_DISP0_DAT1,SW_MUX_CTL_PAD_DISP0_DAT1 register" bitfld.long 0x68 4. " SION ,Force input path of pad DISP0_DAT1" "Not forced,Forced" bitfld.long 0x68 0.--2. " MUX_MODE ,DISP0_DAT1 MUX Mode" "ipu1;DISP0_DAT[1],lcdif;DAT[1],ecspi3;MOSI,,,gpio4;GPIO[22],?..." line.long 0x6C "SW_MUX_CTL_PAD_DISP0_DAT10,SW_MUX_CTL_PAD_DISP0_DAT10 register" bitfld.long 0x6C 4. " SION ,Force input path of pad DISP0_DAT10" "Not forced,Forced" bitfld.long 0x6C 0.--2. " MUX_MODE ,DISP0_DAT10 MUX Mode" "ipu1;DISP0_DAT[10],lcdif;DAT[10],,,,gpio4;GPIO[31],?..." line.long 0x70 "SW_MUX_CTL_PAD_DISP0_DAT11,SW_MUX_CTL_PAD_DISP0_DAT11 register" bitfld.long 0x70 4. " SION ,Force input path of pad DISP0_DAT11" "Not forced,Forced" bitfld.long 0x70 0.--2. " MUX_MODE ,DISP0_DAT11 MUX Mode" "ipu1;DISP0_DAT[11],lcdif;DAT[11],,,,gpio5;GPIO[5],?..." line.long 0x74 "SW_MUX_CTL_PAD_DISP0_DAT12,SW_MUX_CTL_PAD_DISP0_DAT12 register" bitfld.long 0x74 4. " SION ,Force input path of pad DISP0_DAT12" "Not forced,Forced" bitfld.long 0x74 0.--2. " MUX_MODE ,DISP0_DAT12 MUX Mode" "ipu1;DISP0_DAT[12],lcdif;DAT[12],,,,gpio5;GPIO[6],?..." line.long 0x78 "SW_MUX_CTL_PAD_DISP0_DAT13,SW_MUX_CTL_PAD_DISP0_DAT13 register" bitfld.long 0x78 4. " SION ,Force input path of pad DISP0_DAT13" "Not forced,Forced" bitfld.long 0x78 0.--2. " MUX_MODE ,DISP0_DAT13 MUX Mode" "ipu1;DISP0_DAT[13],lcdif;DAT[13],,audmux;AUD5_RXFS,,gpio5;GPIO[7],?..." line.long 0x7C "SW_MUX_CTL_PAD_DISP0_DAT14,SW_MUX_CTL_PAD_DISP0_DAT14 register" bitfld.long 0x7C 4. " SION ,Force input path of pad DISP0_DAT14" "Not forced,Forced" bitfld.long 0x7C 0.--2. " MUX_MODE ,DISP0_DAT14 MUX Mode" "ipu1;DISP0_DAT[14],lcdif;DAT[14],,audmux;AUD5_RXC,,gpio5;GPIO[8],?..." line.long 0x80 "SW_MUX_CTL_PAD_DISP0_DAT15,SW_MUX_CTL_PAD_DISP0_DAT15 register" bitfld.long 0x80 4. " SION ,Force input path of pad DISP0_DAT15" "Not forced,Forced" bitfld.long 0x80 0.--2. " MUX_MODE ,DISP0_DAT15 MUX Mode" "ipu1;DISP0_DAT[15],lcdif;DAT[15],ecspi1;SS1,ecspi2;SS1,,gpio5;GPIO[9],?..." line.long 0x84 "SW_MUX_CTL_PAD_DISP0_DAT16,SW_MUX_CTL_PAD_DISP0_DAT16 register" bitfld.long 0x84 4. " SION ,Force input path of pad DISP0_DAT16" "Not forced,Forced" bitfld.long 0x84 0.--2. " MUX_MODE ,DISP0_DAT16 MUX Mode" "ipu1;DISP0_DAT[16],lcdif;DAT[16],ecspi2;MOSI,audmux;AUD5_TXC,sdma;SDMA_EXT_EVENT[0],gpio5;GPIO[10],?..." line.long 0x88 "SW_MUX_CTL_PAD_DISP0_DAT17,SW_MUX_CTL_PAD_DISP0_DAT17 register" bitfld.long 0x88 4. " SION ,Force input path of pad DISP0_DAT17" "Not forced,Forced" bitfld.long 0x88 0.--2. " MUX_MODE ,DISP0_DAT17 MUX Mode" "ipu1;DISP0_DAT[17],lcdif;DAT[17],ecspi2;MISO,audmux;AUD5_TXD,sdma;SDMA_EXT_EVENT[1],gpio5;GPIO[11],?..." line.long 0x8C "SW_MUX_CTL_PAD_DISP0_DAT18,SW_MUX_CTL_PAD_DISP0_DAT18 register" bitfld.long 0x8C 4. " SION ,Force input path of pad DISP0_DAT18" "Not forced,Forced" bitfld.long 0x8C 0.--2. " MUX_MODE ,DISP0_DAT18 MUX Mode" "ipu1;DISP0_DAT[18],lcdif;DAT[18],ecspi2;SS0,audmux;AUD5_TXFS,audmux;AUD4_RXFS,gpio5;GPIO[12],,EIM;EIM_CS[2]" line.long 0x90 "SW_MUX_CTL_PAD_DISP0_DAT19,SW_MUX_CTL_PAD_DISP0_DAT19 register" bitfld.long 0x90 4. " SION ,Force input path of pad DISP0_DAT19" "Not forced,Forced" bitfld.long 0x90 0.--2. " MUX_MODE ,DISP0_DAT19 MUX Mode" "ipu1;DISP0_DAT[19],lcdif;DAT[19],ecspi2;SCLK,audmux;AUD5_RXD,audmux;AUD4_RXC,gpio5;GPIO[13],,EIM;EIM_CS[3]" line.long 0x94 "SW_MUX_CTL_PAD_DISP0_DAT2,SW_MUX_CTL_PAD_DISP0_DAT2 register" bitfld.long 0x94 4. " SION ,Force input path of pad DISP0_DAT2" "Not forced,Forced" bitfld.long 0x94 0.--2. " MUX_MODE ,DISP0_DAT2 MUX Mode" "ipu1;DISP0_DAT[2],lcdif;DAT[2],ecspi3;MISO,,,gpio4;GPIO[23],?..." line.long 0x98 "SW_MUX_CTL_PAD_DISP0_DAT20,SW_MUX_CTL_PAD_DISP0_DAT20 register" bitfld.long 0x98 4. " SION ,Force input path of pad DISP0_DAT20" "Not forced,Forced" bitfld.long 0x98 0.--2. " MUX_MODE ,DISP0_DAT20 MUX Mode" "ipu1;DISP0_DAT[20],lcdif;DAT[20],ecspi1;SCLK,audmux;AUD4_TXC,,gpio5;GPIO[14],?..." line.long 0x9C "SW_MUX_CTL_PAD_DISP0_DAT21,SW_MUX_CTL_PAD_DISP0_DAT21 register" bitfld.long 0x9C 4. " SION ,Force input path of pad DISP0_DAT21" "Not forced,Forced" bitfld.long 0x9C 0.--2. " MUX_MODE ,DISP0_DAT21 MUX Mode" "ipu1;DISP0_DAT[21],lcdif;DAT[21],ecspi1;MOSI,audmux;AUD4_TXD,,gpio5;GPIO[15],?..." line.long 0xA0 "SW_MUX_CTL_PAD_DISP0_DAT22,SW_MUX_CTL_PAD_DISP0_DAT22 register" bitfld.long 0xA0 4. " SION ,Force input path of pad DISP0_DAT22" "Not forced,Forced" bitfld.long 0xA0 0.--2. " MUX_MODE ,DISP0_DAT22 MUX Mode" "ipu1;DISP0_DAT[22],lcdif;DAT[22],ecspi1;MISO,audmux;AUD4_TXFS,,gpio5;GPIO[16],?..." line.long 0xA4 "SW_MUX_CTL_PAD_DISP0_DAT23,SW_MUX_CTL_PAD_DISP0_DAT23 register" bitfld.long 0xA4 4. " SION ,Force input path of pad DISP0_DAT23" "Not forced,Forced" bitfld.long 0xA4 0.--2. " MUX_MODE ,DISP0_DAT23 MUX Mode" "ipu1;DISP0_DAT[23],lcdif;DAT[23],ecspi1;SS0,audmux;AUD4_RXD,,gpio5;GPIO[17],?..." line.long 0xA8 "SW_MUX_CTL_PAD_DISP0_DAT3,SW_MUX_CTL_PAD_DISP0_DAT3 register" bitfld.long 0xA8 4. " SION ,Force input path of pad DISP0_DAT3" "Not forced,Forced" bitfld.long 0xA8 0.--2. " MUX_MODE ,DISP0_DAT3 MUX Mode" "ipu1;DISP0_DAT[3],lcdif;DAT[3],ecspi3;SS0,,,gpio4;GPIO[24],?..." line.long 0xAC "SW_MUX_CTL_PAD_DISP0_DAT4,SW_MUX_CTL_PAD_DISP0_DAT4 register" bitfld.long 0xAC 4. " SION ,Force input path of pad DISP0_DAT4" "Not forced,Forced" bitfld.long 0xAC 0.--2. " MUX_MODE ,DISP0_DAT4 MUX Mode" "ipu1;DISP0_DAT[4],lcdif;DAT[4],ecspi3;SS1,,,gpio4;GPIO[25],?..." line.long 0xB0 "SW_MUX_CTL_PAD_DISP0_DAT5,SW_MUX_CTL_PAD_DISP0_DAT5 register" bitfld.long 0xB0 4. " SION ,Force input path of pad DISP0_DAT5" "Not forced,Forced" bitfld.long 0xB0 0.--2. " MUX_MODE ,DISP0_DAT5 MUX Mode" "ipu1;DISP0_DAT[5],lcdif;DAT[5],ecspi3;SS2,audmux;AUD6_RXFS,,gpio4;GPIO[26],?..." line.long 0xB4 "SW_MUX_CTL_PAD_DISP0_DAT6,SW_MUX_CTL_PAD_DISP0_DAT6 register" bitfld.long 0xB4 4. " SION ,Force input path of pad DISP0_DAT6" "Not forced,Forced" bitfld.long 0xB4 0.--2. " MUX_MODE ,DISP0_DAT6 MUX Mode" "ipu1;DISP0_DAT[6],lcdif;DAT[6],ecspi3;SS3,audmux;AUD6_RXC,,gpio4;GPIO[27],?..." line.long 0xB8 "SW_MUX_CTL_PAD_DISP0_DAT7,SW_MUX_CTL_PAD_DISP0_DAT7 register" bitfld.long 0xB8 4. " SION ,Force input path of pad DISP0_DAT7" "Not forced,Forced" bitfld.long 0xB8 0.--2. " MUX_MODE ,DISP0_DAT7 MUX Mode" "ipu1;DISP0_DAT[7],lcdif;DAT[7],ecspi3;RDY,,,gpio4;GPIO[28],?..." line.long 0xBC "SW_MUX_CTL_PAD_DISP0_DAT8,SW_MUX_CTL_PAD_DISP0_DAT8 register" bitfld.long 0xBC 4. " SION ,Force input path of pad DISP0_DAT8" "Not forced,Forced" bitfld.long 0xBC 0.--2. " MUX_MODE ,DISP0_DAT8 MUX Mode" "ipu1;DISP0_DAT[8],lcdif;DAT[8],pwm1;PWMO,wdog1;WDOG_B,,gpio4;GPIO[29],?..." line.long 0xC0 "SW_MUX_CTL_PAD_DISP0_DAT9,SW_MUX_CTL_PAD_DISP0_DAT9 register" bitfld.long 0xC0 4. " SION ,Force input path of pad DISP0_DAT9" "Not forced,Forced" bitfld.long 0xC0 0.--2. " MUX_MODE ,DISP0_DAT9 MUX Mode" "ipu1;DISP0_DAT[9],lcdif;DAT[9],pwm2;PWMO,wdog2;WDOG_B,,gpio4;GPIO[30],?..." line.long 0xC4 "SW_MUX_CTL_PAD_EIM_A16,SW_MUX_CTL_PAD_EIM_A16 register" bitfld.long 0xC4 4. " SION ,Force input path of pad EIM_A16" "Not forced,Forced" bitfld.long 0xC4 0.--3. " MUX_MODE ,EIM_A16 MUX Mode" "EIM;EIM_A[16],ipu1;DI1_DISP_CLK,ipu1;CSI1_PIXCLK,,,gpio2;GPIO[22],,src;BT_CFG[16],epdc;SDDO[0],?..." line.long 0xC8 "SW_MUX_CTL_PAD_EIM_A17,SW_MUX_CTL_PAD_EIM_A17 register" bitfld.long 0xC8 4. " SION ,Force input path of pad EIM_A17" "Not forced,Forced" bitfld.long 0xC8 0.--3. " MUX_MODE ,EIM_A17 MUX Mode" "EIM;EIM_A[17],ipu1;DISP1_DAT[12],ipu1;CSI1_D[12],,,gpio2;GPIO[21],,src;BT_CFG[17],epdc;PWRSTAT,?..." line.long 0xCC "SW_MUX_CTL_PAD_EIM_A18,SW_MUX_CTL_PAD_EIM_A18 register" bitfld.long 0xCC 4. " SION ,Force input path of pad EIM_A18" "Not forced,Forced" bitfld.long 0xCC 0.--3. " MUX_MODE ,EIM_A18 MUX Mode" "EIM;EIM_A[18],ipu1;DISP1_DAT[13],ipu1;CSI1_D[13],,,gpio2;GPIO[20],,src;BT_CFG[18],epdc;PWRCTRL[0],?..." line.long 0xD0 "SW_MUX_CTL_PAD_EIM_A19,SW_MUX_CTL_PAD_EIM_A19 register" bitfld.long 0xD0 4. " SION ,Force input path of pad EIM_A19" "Not forced,Forced" bitfld.long 0xD0 0.--3. " MUX_MODE ,EIM_A19 MUX Mode" "EIM;EIM_A[19],ipu1;DISP1_DAT[14],ipu1;CSI1_D[14],,,gpio2;GPIO[19],,src;BT_CFG[19],epdc;PWRCTRL[1],?..." line.long 0xD4 "SW_MUX_CTL_PAD_EIM_A20,SW_MUX_CTL_PAD_EIM_A20 register" bitfld.long 0xD4 4. " SION ,Force input path of pad EIM_A20" "Not forced,Forced" bitfld.long 0xD4 0.--3. " MUX_MODE ,EIM_A20 MUX Mode" "EIM;EIM_A[20],ipu1;DISP1_DAT[15],ipu1;CSI1_D[15],,,gpio2;GPIO[18],,src;BT_CFG[20],epdc;PWRCTRL[2],?..." line.long 0xD8 "SW_MUX_CTL_PAD_EIM_A21,SW_MUX_CTL_PAD_EIM_A21 register" bitfld.long 0xD8 4. " SION ,Force input path of pad EIM_A21" "Not forced,Forced" bitfld.long 0xD8 0.--3. " MUX_MODE ,EIM_A21 MUX Mode" "EIM;EIM_A[21],ipu1;DISP1_DAT[16],ipu1;CSI1_D[16],,,gpio2;GPIO[17],,src;BT_CFG[21],epdc;GDCLK,?..." line.long 0xDC "SW_MUX_CTL_PAD_EIM_A22,SW_MUX_CTL_PAD_EIM_A22 register" bitfld.long 0xDC 4. " SION ,Force input path of pad EIM_A22" "Not forced,Forced" bitfld.long 0xDC 0.--3. " MUX_MODE ,EIM_A22 MUX Mode" "EIM;EIM_A[22],ipu1;DISP1_DAT[17],ipu1;CSI1_D[17],,,gpio2;GPIO[16],,src;BT_CFG[22],epdc;GDSP,?..." line.long 0xE0 "SW_MUX_CTL_PAD_EIM_A23,SW_MUX_CTL_PAD_EIM_A23 register" bitfld.long 0xE0 4. " SION ,Force input path of pad EIM_A23" "Not forced,Forced" bitfld.long 0xE0 0.--3. " MUX_MODE ,EIM_A23 MUX Mode" "EIM;EIM_A[23],ipu1;DISP1_DAT[18],ipu1;CSI1_D[18],,,gpio6;GPIO[6],,src;BT_CFG[23],epdc;GDOE,?..." line.long 0xE4 "SW_MUX_CTL_PAD_EIM_A24,SW_MUX_CTL_PAD_EIM_A24 register" bitfld.long 0xE4 4. " SION ,Force input path of pad EIM_A24" "Not forced,Forced" bitfld.long 0xE4 0.--3. " MUX_MODE ,EIM_A24 MUX Mode" "EIM;EIM_A[24],ipu1;DISP1_DAT[19],ipu1;CSI1_D[19],,,gpio5;GPIO[4],,src;BT_CFG[24],epdc;GDRL,?..." line.long 0xE8 "SW_MUX_CTL_PAD_EIM_A25,SW_MUX_CTL_PAD_EIM_A25 register" bitfld.long 0xE8 4. " SION ,Force input path of pad EIM_A25" "Not forced,Forced" bitfld.long 0xE8 0.--3. " MUX_MODE ,EIM_A25 MUX Mode" "EIM;EIM_A[25],ecspi4;SS1,ecspi2;RDY,ipu1;DI1_PIN12,ipu1;DI0_D1_CS,gpio5;GPIO[2],hdmi_tx;CEC_LINE,,epdc;SDDO[15],eim;ACLK_FREERUN,?..." line.long 0xEC "SW_MUX_CTL_PAD_EIM_BCLK,SW_MUX_CTL_PAD_EIM_BCLK register" bitfld.long 0xEC 4. " SION ,Force input path of pad EIM_BCLK" "Not forced,Forced" bitfld.long 0xEC 0.--3. " MUX_MODE ,EIM_BCLK MUX Mode" "EIM;EIM_BCLK,ipu1;DI1_PIN16,,,,gpio6;GPIO[31],,,epdc;SDCE[9],?..." line.long 0xF0 "SW_MUX_CTL_PAD_EIM_CS0,SW_MUX_CTL_PAD_EIM_CS0 register" bitfld.long 0xF0 4. " SION ,Force input path of pad EIM_CS0" "Not forced,Forced" bitfld.long 0xF0 0.--3. " MUX_MODE ,EIM_CS0 MUX Mode" "EIM;EIM_CS[0],ipu1;DI1_PIN5,ecspi2;SCLK,,,gpio2;GPIO[23],,,epdc;SDDO[6],?..." line.long 0xF4 "SW_MUX_CTL_PAD_EIM_CS1,SW_MUX_CTL_PAD_EIM_CS1 register" bitfld.long 0xF4 4. " SION ,Force input path of pad EIM_CS1" "Not forced,Forced" bitfld.long 0xF4 0.--3. " MUX_MODE ,EIM_CS1 MUX Mode" "EIM;EIM_CS[1],ipu1;DI1_PIN6,ecspi2;MOSI,,,gpio2;GPIO[24],,,epdc;SDDO[8],?..." line.long 0xF8 "SW_MUX_CTL_PAD_EIM_D16,SW_MUX_CTL_PAD_EIM_D16 register" bitfld.long 0xF8 4. " SION ,Force input path of pad EIM_D16" "Not forced,Forced" bitfld.long 0xF8 0.--3. " MUX_MODE ,EIM_EB2 MUX Mode" "EIM;EIM_D[16],ecspi1;SCLK,ipu1;DI0_PIN5,ipu1;CSI1_D[18],hdmi_tx;DDC_SDA,gpio3;GPIO[16],i2c2;SDA,,epdc;SDDO[10],?..." line.long 0xFC "SW_MUX_CTL_PAD_EIM_D17,SW_MUX_CTL_PAD_EIM_D17 register" bitfld.long 0xFC 4. " SION ,Force input path of pad EIM_D17" "Not forced,Forced" bitfld.long 0xFC 0.--3. " MUX_MODE ,EIM_D17 MUX Mode" "EIM;EIM_D[17],ecspi1;MISO,ipu1;DI0_PIN6,ipu1;CSI1_PIXCLK,dcic1;DCIC_OUT,gpio3;GPIO[17],i2c3;SCL,,epdc;VCOM[0],?..." line.long 0x100 "SW_MUX_CTL_PAD_EIM_D18,SW_MUX_CTL_PAD_EIM_D18 register" bitfld.long 0x100 4. " SION ,Force input path of pad EIM_D18" "Not forced,Forced" bitfld.long 0x100 0.--3. " MUX_MODE ,EIM_D18 MUX Mode" "EIM;EIM_D[18],ecspi1;MOSI,ipu1;DI0_PIN7,ipu1;CSI1_D[17],ipu1;DI1_D0_CS,gpio3;GPIO[18],i2c3;SDA,,epdc;VCOM[1],?..." line.long 0x104 "SW_MUX_CTL_PAD_EIM_D19,SW_MUX_CTL_PAD_EIM_D19 register" bitfld.long 0x104 4. " SION ,Force input path of pad EIM_D19" "Not forced,Forced" bitfld.long 0x104 0.--3. " MUX_MODE ,EIM_D19 MUX Mode" "EIM;EIM_D[19],ecspi1;SS1,ipu1;DI0_PIN8,ipu1;CSI1_D[16],uart1;CTS,gpio3;GPIO[19],epit1;EPITO,,epdc;SDDO[12],?..." line.long 0x108 "SW_MUX_CTL_PAD_EIM_D20,SW_MUX_CTL_PAD_EIM_D20 register" bitfld.long 0x108 4. " SION ,Force input path of pad EIM_D20" "Not forced,Forced" bitfld.long 0x108 0.--2. " MUX_MODE ,EIM_D20 MUX Mode" "EIM;EIM_D[20],ecspi4;SS0,ipu1;DI0_PIN16,ipu1;CSI1_D[15],uart1;RTS,gpio3;GPIO[20],epit2;EPITO,?..." line.long 0x10C "SW_MUX_CTL_PAD_EIM_D21,SW_MUX_CTL_PAD_EIM_D21 register" bitfld.long 0x10C 4. " SION ,Force input path of pad EIM_D21" "Not forced,Forced" bitfld.long 0x10C 0.--2. " MUX_MODE ,EIM_D21 MUX Mode" "EIM;EIM_D[21],ecspi4;SCLK,ipu1;DI0_PIN17,ipu1;CSI1_D[11],usboh3;USBOTG_OC,gpio3;GPIO[21],i2c1;SCL,spdif;IN1" line.long 0x110 "SW_MUX_CTL_PAD_EIM_D22,SW_MUX_CTL_PAD_EIM_D22 register" bitfld.long 0x110 4. " SION ,Force input path of pad EIM_D22" "Not forced,Forced" bitfld.long 0x110 0.--3. " MUX_MODE ,EIM_D22 MUX Mode" "EIM;EIM_D[22],ecspi4;MISO,ipu1;DI0_PIN1,ipu1;CSI1_D[10],usboh3;USBOTG_PWR,gpio3;GPIO[22],spdif;OUT1,,epdc;SDCE[6],?..." line.long 0x114 "SW_MUX_CTL_PAD_EIM_D23,SW_MUX_CTL_PAD_EIM_D23 register" bitfld.long 0x114 4. " SION ,Force input path of pad EIM_D23" "Not forced,Forced" bitfld.long 0x114 0.--3. " MUX_MODE ,EIM_D23 MUX Mode" "EIM;EIM_D[23],ipu1;DI0_D0_CS,uart3;CTS,uart1;DCD,ipu1;CSI1_DATA_EN,gpio3;GPIO[23],ipu1;DI1_PIN2,ipu1;DI1_PIN14,epdc;SDDO[11],?..." line.long 0x118 "SW_MUX_CTL_PAD_EIM_D24,SW_MUX_CTL_PAD_EIM_D24 register" bitfld.long 0x118 4. " SION ,Force input path of pad EIM_D24" "Not forced,Forced" bitfld.long 0x118 0.--3. " MUX_MODE ,EIM_D24 MUX Mode" "EIM;EIM_D[24],ecspi4;SS2,uart3;TXD_MUX,ecspi1;SS2,ecspi2;SS2,gpio3;GPIO[24],audmux;AUD5_RXFS,uart1;DTR,epdc;SDCE[7],?..." line.long 0x11C "SW_MUX_CTL_PAD_EIM_D25,SW_MUX_CTL_PAD_EIM_D25 register" bitfld.long 0x11C 4. " SION ,Force input path of pad EIM_D25" "Not forced,Forced" bitfld.long 0x11C 0.--3. " MUX_MODE ,EIM_D25 MUX Mode" "EIM;EIM_D[25],ecspi4;SS3,uart3;RXD_MUX,ecspi1;SS3,ecspi2;SS3,gpio3;GPIO[25],audmux;AUD5_RXC,uart1;DSR,epdc;SDCE[8],?..." line.long 0x120 "SW_MUX_CTL_PAD_EIM_D26,SW_MUX_CTL_PAD_EIM_D26 register" bitfld.long 0x120 4. " SION ,Force input path of pad EIM_D26" "Not forced,Forced" bitfld.long 0x120 0.--3. " MUX_MODE ,EIM_D26 MUX Mode" "EIM;EIM_D[26],ipu1;DI1_PIN11,ipu1;CSI0_D[1],ipu1;CSI1_D[14],uart2;TXD_MUX,gpio3;GPIO[26],,ipu1;DISP1_DAT[22],epdc;SDOED,?..." line.long 0x124 "SW_MUX_CTL_PAD_EIM_D27,SW_MUX_CTL_PAD_EIM_D27 register" bitfld.long 0x124 4. " SION ,Force input path of pad EIM_D27." "Not forced,Forced" bitfld.long 0x124 0.--3. " MUX_MODE ,EIM_D27 MUX Mode" "EIM;EIM_D[27],ipu1;DI1_PIN13,ipu1;CSI0_D[0],ipu1;CSI1_D[13],uart2;RXD_MUX,gpio3;GPIO[27],,ipu1;DISP1_DAT[23],epdc;SDOE,?..." line.long 0x128 "SW_MUX_CTL_PAD_EIM_D28,SW_MUX_CTL_PAD_EIM_D28 register" bitfld.long 0x128 4. " SION ,Force input path of pad EIM_D28." "Not forced,Forced" bitfld.long 0x128 0.--3. " MUX_MODE ,EIM_D28 MUX Mode" "EIM;EIM_D[28],i2c1;SDA,ecspi4;MOSI,ipu1;CSI1_D[12],uart2;CTS,gpio3;GPIO[28],,ipu1;DI0_PIN13,epdc;PWRCTRL,?..." line.long 0x12C "SW_MUX_CTL_PAD_EIM_D29,SW_MUX_CTL_PAD_EIM_D29 register" bitfld.long 0x12C 4. " SION ,Force input path of pad EIM_D29." "Not forced,Forced" bitfld.long 0x12C 0.--3. " MUX_MODE ,EIM_D29 MUX Mode" "EIM;EIM_D[29],ipu1;DI1_PIN15,ecspi4;SS0,,uart2;RTS,gpio3;GPIO[29],ipu2;CSI1_VSYNC,ipu1;DI0_PIN14,epdc;PWRWAKE,?..." line.long 0x130 "SW_MUX_CTL_PAD_EIM_D30,SW_MUX_CTL_PAD_EIM_D30 register" bitfld.long 0x130 4. " SION ,Force input path of pad EIM_D30" "Not forced,Forced" bitfld.long 0x130 0.--3. " MUX_MODE ,EIM_D30 MUX Mode" "EIM;EIM_D[30],ipu1;DISP1_DAT[21],ipu1;DI0_PIN11,ipu1;CSI0_D[3],uart3;CTS,gpio3;GPIO[30],usboh3;USBH1_OC,,epdc;SDOEZ,?..." line.long 0x134 "SW_MUX_CTL_PAD_EIM_D31,SW_MUX_CTL_PAD_EIM_D31 register" bitfld.long 0x134 4. " SION ,Force input path of pad EIM_D31" "Not forced,Forced" bitfld.long 0x134 0.--3. " MUX_MODE ,EIM_D31 MUX Mode" "EIM;EIM_D[31],ipu1;DISP1_DAT[20],ipu1;DI0_PIN12,ipu1;CSI0_D[2],uart3;RTS,gpio3;GPIO[31],usboh3;USBH1_PWR,,epdc;SDCLK,eim;ACLK_FREERUN,?..." line.long 0x138 "SW_MUX_CTL_PAD_EIM_DA0,SW_MUX_CTL_PAD_EIM_DA0 register" bitfld.long 0x138 4. " SION ,Force input path of pad EIM_DA0" "Not forced,Forced" bitfld.long 0x138 0.--3. " MUX_MODE ,EIM_DA0 MUX Mode" "EIM;EIM_DA_A[0],ipu1;DISP1_DAT[9],ipu1;CSI1_D[9],,,gpio3;GPIO[0],,src;BT_CFG[0],epdc;SDCLKEN,?..." line.long 0x13C "SW_MUX_CTL_PAD_EIM_DA1,SW_MUX_CTL_PAD_EIM_DA1 register" bitfld.long 0x13C 4. " SION ,Force input path of pad EIM_DA1" "Not forced,Forced" bitfld.long 0x13C 0.--3. " MUX_MODE ,EIM_DA1 MUX Mode" "EIM;EIM_DA_A[1],ipu1;DISP1_DAT[8],ipu1;CSI1_D[8],,,gpio3;GPIO[1],,src;BT_CFG[1],epdc;SDLE,?..." line.long 0x140 "SW_MUX_CTL_PAD_EIM_DA10,SW_MUX_CTL_PAD_EIM_DA10 register" bitfld.long 0x140 4. " SION ,Force input path of pad EIM_DA10" "Not forced,Forced" bitfld.long 0x140 0.--3. " MUX_MODE ,EIM_DA10 MUX Mode" "EIM;EIM_DA_A[10],ipu1;DI1_PIN15,ipu1;CSI1_DATA_EN,,,gpio3;GPIO[10],,src;BT_CFG[10],epdc;SDDO[1],?..." line.long 0x144 "SW_MUX_CTL_PAD_EIM_DA11,SW_MUX_CTL_PAD_EIM_DA11 register" bitfld.long 0x144 4. " SION ,Force input path of pad EIM_DA11" "Not forced,Forced" bitfld.long 0x144 0.--3. " MUX_MODE ,EIM_DA11 MUX Mode" "EIM;EIM_DA_A[11],ipu1;DI1_PIN2,ipu1;CSI1_HSYNC,,,gpio3;GPIO[11],,src;BT_CFG[11],epdc;SDDO[3],?..." line.long 0x148 "SW_MUX_CTL_PAD_EIM_DA12,SW_MUX_CTL_PAD_EIM_DA12 register" bitfld.long 0x148 4. " SION ,Force input path of pad EIM_DA12" "Not forced,Forced" bitfld.long 0x148 0.--3. " MUX_MODE ,EIM_DA12 MUX Mode" "EIM;EIM_DA_A[12],ipu1;DI1_PIN3,ipu1;CSI1_VSYNC,,,gpio3;GPIO[12],,src;BT_CFG[12],epdc;SDDO[2],?..." line.long 0x14C "SW_MUX_CTL_PAD_EIM_DA13,SW_MUX_CTL_PAD_EIM_DA13 register" bitfld.long 0x14C 4. " SION ,Force input path of pad EIM_DA13" "Not forced,Forced" bitfld.long 0x14C 0.--3. " MUX_MODE ,EIM_DA13 MUX Mode" "EIM;EIM_DA_A[13],ipu1;DI1_D0_CS,ccm;DI1_EXT_CLK,,,gpio3;GPIO[13],,src;BT_CFG[13],epdc;SDDO[13],?..." line.long 0x150 "SW_MUX_CTL_PAD_EIM_DA14,SW_MUX_CTL_PAD_EIM_DA14 register" bitfld.long 0x150 4. " SION ,Force input path of pad EIM_DA14" "Not forced,Forced" bitfld.long 0x150 0.--3. " MUX_MODE ,EIM_DA14 MUX Mode" "EIM;EIM_DA_A[14],ipu1;DI1_D1_CS,ccm;DI0_EXT_CLK,,,gpio3;GPIO[14],,src;BT_CFG[14],epdc;SDDO[14],?..." line.long 0x154 "SW_MUX_CTL_PAD_EIM_DA15,SW_MUX_CTL_PAD_EIM_DA15 register" bitfld.long 0x154 4. " SION ,Force input path of pad EIM_DA15" "Not forced,Forced" bitfld.long 0x154 0.--3. " MUX_MODE ,EIM_DA15 MUX Mode" "EIM;EIM_DA_A[15],ipu1;DI1_PIN1,ipu1;DI1_PIN4,,,gpio3;GPIO[15],,src;BT_CFG[15],epdc;SDDO[9],?..." line.long 0x158 "SW_MUX_CTL_PAD_EIM_DA2,SW_MUX_CTL_PAD_EIM_DA2 register" bitfld.long 0x158 4. " SION ,Force input path of pad EIM_DA2" "Not forced,Forced" bitfld.long 0x158 0.--3. " MUX_MODE ,EIM_DA2 MUX Mode" "EIM;EIM_DA_A[2],ipu1;DISP1_DAT[7],ipu1;CSI1_D[7],,,gpio3;GPIO[2],,src;BT_CFG[2],epdc;BDR[0],?..." line.long 0x15C "SW_MUX_CTL_PAD_EIM_DA3,SW_MUX_CTL_PAD_EIM_DA3 register" bitfld.long 0x15C 4. " SION ,Force input path of pad EIM_DA3" "Not forced,Forced" bitfld.long 0x15C 0.--3. " MUX_MODE ,EIM_DA3 MUX Mode" "EIM;EIM_DA_A[3],ipu1;DISP1_DAT[6],ipu1;CSI1_D[6],,,gpio3;GPIO[3],,src;BT_CFG[3],epdc;BDR[1],?..." line.long 0x160 "SW_MUX_CTL_PAD_EIM_DA4,SW_MUX_CTL_PAD_EIM_DA4 register" bitfld.long 0x160 4. " SION ,Force input path of pad EIM_DA4" "Not forced,Forced" bitfld.long 0x160 0.--3. " MUX_MODE ,EIM_DA4 MUX Mode" "EIM;EIM_DA_A[4],ipu1;DISP1_DAT[5],ipu1;CSI1_D[5],,,gpio3;GPIO[4],,src;BT_CFG[4],epdc;SDCE[0],?..." line.long 0x164 "SW_MUX_CTL_PAD_EIM_DA5,SW_MUX_CTL_PAD_EIM_DA5 register" bitfld.long 0x164 4. " SION ,Force input path of pad EIM_DA5" "Not forced,Forced" bitfld.long 0x164 0.--3. " MUX_MODE ,EIM_DA5 MUX Mode" "EIM;EIM_DA_A[5],ipu1;DISP1_DAT[4],ipu1;CSI1_D[4],,,gpio3;GPIO[5],,src;BT_CFG[5],epdc;SDCE[1],?..." line.long 0x168 "SW_MUX_CTL_PAD_EIM_DA6,SW_MUX_CTL_PAD_EIM_DA6 register" bitfld.long 0x168 4. " SION ,Force input path of pad EIM_DA6" "Not forced,Forced" bitfld.long 0x168 0.--3. " MUX_MODE ,EIM_DA6 MUX Mode" "EIM;EIM_DA_A[6],ipu1;DISP1_DAT[3],ipu1;CSI1_D[3],,,gpio3;GPIO[6],,src;BT_CFG[6],epdc;SDCE[2],?..." line.long 0x16C "SW_MUX_CTL_PAD_EIM_DA7,SW_MUX_CTL_PAD_EIM_DA7 register" bitfld.long 0x16C 4. " SION ,Force input path of pad EIM_DA7" "Not forced,Forced" bitfld.long 0x16C 0.--3. " MUX_MODE ,EIM_DA7 MUX Mode" "EIM;EIM_DA_A[7],ipu1;DISP1_DAT[2],ipu1;CSI1_D[2],,,gpio3;GPIO[7],,src;BT_CFG[7],epdc;SDCE[3],?..." line.long 0x170 "SW_MUX_CTL_PAD_EIM_DA8,SW_MUX_CTL_PAD_EIM_DA8 register" bitfld.long 0x170 4. " SION ,Force input path of pad EIM_DA8" "Not forced,Forced" bitfld.long 0x170 0.--3. " MUX_MODE ,EIM_DA8 MUX Mode" "EIM;EIM_DA_A[8],ipu1;DISP1_DAT[1],ipu1;CSI1_D[1],,,gpio3;GPIO[8],,src;BT_CFG[8],epdc;SDCE[4],?..." line.long 0x174 "SW_MUX_CTL_PAD_EIM_DA9,SW_MUX_CTL_PAD_EIM_DA9 register" bitfld.long 0x174 4. " SION ,Force input path of pad EIM_DA9" "Not forced,Forced" bitfld.long 0x174 0.--3. " MUX_MODE ,EIM_DA9 MUX Mode" "EIM;EIM_DA_A[9],ipu1;DISP1_DAT[0],ipu1;CSI1_D[0],,,gpio3;GPIO[9],,src;BT_CFG[9],epdc;SDCE[5],?..." line.long 0x178 "SW_MUX_CTL_PAD_EIM_EB0,SW_MUX_CTL_PAD_EIM_EB0 register" bitfld.long 0x178 4. " SION ,Force input path of pad EIM_EB0" "Not forced,Forced" bitfld.long 0x178 0.--3. " MUX_MODE ,EIM_EB0 MUX Mode" "EIM;EIM_EB[0],ipu1;DISP1_DAT[11],ipu1;CSI1_D[11],,ccm;PMIC_RDY,gpio2;GPIO[28],,src;BT_CFG[27],epdc;PWRCOM,?..." line.long 0x17C "SW_MUX_CTL_PAD_EIM_EB1,SW_MUX_CTL_PAD_EIM_EB1 register" bitfld.long 0x17C 4. " SION ,Force input path of pad EIM_EB1" "Not forced,Forced" bitfld.long 0x17C 0.--3. " MUX_MODE ,EIM_EB1 MUX Mode" "EIM;EIM_EB[1],ipu1;DISP1_DAT[10],ipu1;CSI1_D[10],,,gpio2;GPIO[29],,src;BT_CFG[28],epdc;SDSHR,?..." line.long 0x180 "SW_MUX_CTL_PAD_EIM_EB2,SW_MUX_CTL_PAD_EIM_EB2 register" bitfld.long 0x180 4. " SION ,Force input path of pad EIM_EB2" "Not forced,Forced" bitfld.long 0x180 0.--3. " MUX_MODE ,EIM_EB2 MUX Mode" "EIM;EIM_EB[2],ecspi1;SS0,ccm;DI1_EXT_CLK,ipu1;CSI1_D[19],hdmi_tx;DDC_SCL,gpio2;GPIO[30],i2c2;SCL,src;BT_CFG[30],epdc;SDDO[5],?..." line.long 0x184 "SW_MUX_CTL_PAD_EIM_EB3,SW_MUX_CTL_PAD_EIM_EB3 register" bitfld.long 0x184 4. " SION ,Force input path of pad EIM_EB3" "Not forced,Forced" bitfld.long 0x184 0.--3. " MUX_MODE ,EIM_EB3 MUX Mode" "EIM;EIM_EB[3],ecspi4;RDY,uart3;RTS,uart1;RI,ipu1;CSI1_HSYNC,gpio2;GPIO[31],ipu1;DI1_PIN3,src;BT_CFG[31],epdc;SDDCE[0],eim;ACLK_FREERUN,?..." line.long 0x188 "SW_MUX_CTL_PAD_EIM_LBA,SW_MUX_CTL_PAD_EIM_LBA register" bitfld.long 0x188 4. " SION ,Force input path of pad EIM_LBA" "Not forced,Forced" bitfld.long 0x188 0.--3. " MUX_MODE ,EIM_LBA MUX Mode" "EIM;EIM_LBA,ipu1;DI1_PIN17,ecspi2;SS1,,,gpio2;GPIO[27],,src;BT_CFG[26],epdc;SDDO[4],?..." line.long 0x18C "SW_MUX_CTL_PAD_EIM_OE,SW_MUX_CTL_PAD_EIM_OE register" bitfld.long 0x18C 4. " SION ,Force input path of pad EIM_OE" "Not forced,Forced" bitfld.long 0x18C 0.--3. " MUX_MODE ,EIM_OE MUX Mode" "EIM;EIM_OE,ipu1;DI1_PIN7,ecspi2;MISO,,,gpio2;GPIO[25],,,epdc;PWRIRQ,?..." line.long 0x190 "SW_MUX_CTL_PAD_EIM_RW,SW_MUX_CTL_PAD_EIM_RW register" bitfld.long 0x190 4. " SION ,Force input path of pad EIM_RW" "Not forced,Forced" bitfld.long 0x190 0.--3. " MUX_MODE ,EIM_RW MUX Mode" "EIM;EIM_RW,ipu1;DI1_PIN8,ecspi2;SS0,,,gpio2;GPIO[26],,src;BT_CFG[29],epdc;SDDO[7],?..." line.long 0x194 "SW_MUX_CTL_PAD_EIM_WAIT,SW_MUX_CTL_PAD_EIM_WAIT register" bitfld.long 0x194 4. " SION ,Force input path of pad EIM_WAIT" "Not forced,Forced" bitfld.long 0x194 0.--2. " MUX_MODE ,EIM_WAIT MUX Mode" "EIM;EIM_WAIT,EIM;EIM_DTACK_B,,,,gpio5;GPIO[0],,src;BT_CFG[25]" line.long 0x198 "SW_MUX_CTL_PAD_ENET_CRS_DV,SW_MUX_CTL_PAD_ENET_CRS_DV register" bitfld.long 0x198 4. " SION ,Force input path of pad ENET_CRS_DV" "Not forced,Forced" bitfld.long 0x198 0.--2. " MUX_MODE ,ENET_CRS_DV MUX Mode" ",enet;RX_EN,esai;SCKT,spdif;SPDIF_EXTCLK,,gpio1;GPIO[25],?..." line.long 0x19C "SW_MUX_CTL_PAD_ENET_MDC,SW_MUX_CTL_PAD_ENET_MDC register" bitfld.long 0x19C 4. " SION ,Force input path of pad ENET_MDC" "Not forced,Forced" bitfld.long 0x19C 0.--2. " MUX_MODE ,ENET_MDC MUX Mode" "mlb;MLBDAT,enet;MDC,esai;TX5_RX0,,enet;1588_EVENT1_IN,gpio1;GPIO[31],?..." line.long 0x1A0 "SW_MUX_CTL_PAD_ENET_MDIO,SW_MUX_CTL_PAD_ENET_MDIO register" bitfld.long 0x1A0 4. " SION ,Force input path of pad ENET_MDIO" "Not forced,Forced" bitfld.long 0x1A0 0.--2. " MUX_MODE ,ENET_MDIO MUX Mode" ",enet;MDIO,esai;SCKR,,enet;1588_EVENT1_OUT,gpio1;GPIO[22],spdif;PLOCK,?..." line.long 0x1A4 "SW_MUX_CTL_PAD_ENET_REF_CLK,SW_MUX_CTL_PAD_ENET_REF_CLK register" bitfld.long 0x1A4 4. " SION ,Force input path of pad ENET_REF_CLK" "Not forced,Forced" bitfld.long 0x1A4 0.--2. " MUX_MODE ,ENET_REF_CLK MUX Mode" ",enet;TX_CLK,esai;FSR,,,gpio1;GPIO[23],spdif;SRCLK,anatop;" line.long 0x1A8 "SW_MUX_CTL_PAD_ENET_RX_ER,SW_MUX_CTL_PAD_ENET_RX_ER register" bitfld.long 0x1A8 4. " SION ,Force input path of pad ENET_RX_ER" "Not forced,Forced" bitfld.long 0x1A8 0.--2. " MUX_MODE ,ENET_RX_ER MUX Mode" ",enet;RX_ER,esai;HCKR,spdif;IN1,enet;1588_EVENT2_OUT,gpio1;GPIO[24],?..." line.long 0x1AC "SW_MUX_CTL_PAD_ENET_RXD0,SW_MUX_CTL_PAD_ENET_RXD0 register" bitfld.long 0x1AC 4. " SION ,Force input path of pad ENET_RXD0" "Not forced,Forced" bitfld.long 0x1AC 0.--2. " MUX_MODE ,ENET_RXD0 MUX Mode" "osc32k;32K_OUT,enet;RDATA[0],esai;HCKT,spdif;OUT1,,gpio1;GPIO[27],?..." line.long 0x1B0 "SW_MUX_CTL_PAD_ENET_RXD1,SW_MUX_CTL_PAD_ENET_RXD1 register" bitfld.long 0x1B0 4. " SION ,Force input path of pad ENET_RXD1" "Not forced,Forced" bitfld.long 0x1B0 0.--2. " MUX_MODE ,ENET_RXD1 MUX Mode" "mlb;MLBSIG,enet;RDATA[1],esai;FST,,enet;1588_EVENT3_OUT,gpio1;GPIO[26],?..." line.long 0x1B4 "SW_MUX_CTL_PAD_ENET_TX_EN,SW_MUX_CTL_PAD_ENET_TX_EN register" bitfld.long 0x1B4 4. " SION ,Force input path of pad ENET_TX_EN" "Not forced,Forced" bitfld.long 0x1B4 0.--3. " MUX_MODE ,ENET_TX_EN MUX Mode" ",enet;TX_EN,esai;TX3_RX2,,,gpio1;GPIO[28],,,,i2c4;SCL,?..." line.long 0x1B8 "SW_MUX_CTL_PAD_ENET_TXD0,SW_MUX_CTL_PAD_ENET_TXD0 register" bitfld.long 0x1B8 4. " SION ,Force input path of pad ENET_TXD0" "Not forced,Forced" bitfld.long 0x1B8 0.--2. " MUX_MODE ,ENET_TXD0 MUX Mode" ",enet;TDATA[0],esai;TX4_RX1,,,gpio1;GPIO[30],?..." line.long 0x1BC "SW_MUX_CTL_PAD_ENET_TXD1,SW_MUX_CTL_PAD_ENET_TXD1 register" bitfld.long 0x1BC 4. " SION ,Force input path of pad ENET_TXD1" "Not forced,Forced" bitfld.long 0x1BC 0.--3. " MUX_MODE ,ENET_TXD1 MUX Mode" "mlb;MLBCLK,enet;TDATA[1],esai;TX2_RX3,,enet;1588_EVENT0_IN,gpio1;GPIO[29],,,,i2c4;SDA,?..." line.long 0x1C0 "SW_MUX_CTL_PAD_GPIO_0,SW_MUX_CTL_PAD_GPIO_0 register" bitfld.long 0x1C0 4. " SION ,Force input path of pad GPIO_0" "Not forced,Forced" bitfld.long 0x1C0 0.--2. " MUX_MODE ,GPIO_0 MUX Mode" "ccm;CLKO,,kpp;COL[5],asrc;ASRC_EXT_CLK,epit1;EPITO,gpio1;GPIO[0],usboh3;USBH1_PWR,nvs_hp_wrapper;SNVS_VIO_5" line.long 0x1C4 "SW_MUX_CTL_PAD_GPIO_1,SW_MUX_CTL_PAD_GPIO_1 register" bitfld.long 0x1C4 4. " SION ,Force input path of pad GPIO_1" "Not forced,Forced" bitfld.long 0x1C4 0.--2. " MUX_MODE ,GPIO_1 MUX Mode" "esai;SCKR,wdog2;WDOG_B,kpp;ROW[5],,pwm2;PWMO,gpio1;GPIO[1],usdhc1;CD,src;TESTER_ACK" line.long 0x1C8 "SW_MUX_CTL_PAD_GPIO_16,SW_MUX_CTL_PAD_GPIO_16 register" bitfld.long 0x1C8 4. " SION ,Force input path of pad GPIO_16" "Not forced,Forced" bitfld.long 0x1C8 0.--2. " MUX_MODE ,GPIO_16 MUX Mode" "esai;TX3_RX2,enet;1588_EVENT2_IN,enet;ANATOP_ETHERNET_REF_OUT,usdhc1;LCTL,spdif;IN1,gpio7;GPIO[11],i2c3;SDA,sjc;DE_B" line.long 0x1CC "SW_MUX_CTL_PAD_GPIO_17,SW_MUX_CTL_PAD_GPIO_17 register" bitfld.long 0x1CC 4. " SION ,Force input path of pad GPIO_17" "Not forced,Forced" bitfld.long 0x1CC 0.--2. " MUX_MODE ,GPIO_17 MUX Mode" "esai;TX0,enet;1588_EVENT3_IN,ccm;PMIC_RDY,sdma;SDMA_EXT_EVENT[0],spdif;OUT1,gpio7;GPIO[12],?..." line.long 0x1D0 "SW_MUX_CTL_PAD_GPIO_18,SW_MUX_CTL_PAD_GPIO_18 register" bitfld.long 0x1D0 4. " SION ,Force input path of pad GPIO_18" "Not forced,Forced" bitfld.long 0x1D0 0.--2. " MUX_MODE ,GPIO_18 MUX Mode" "esai;TX1,enet;RX_CLK,usdhc3;VSELECT,sdma;SDMA_EXT_EVENT[1],asrc;ASRC_EXT_CLK,gpio7;GPIO[13],snvs_hp_wrapper;SNVS_VIO_5_CTL,src;SYSTEM_RST" line.long 0x1D4 "SW_MUX_CTL_PAD_GPIO_19,SW_MUX_CTL_PAD_GPIO_19 register" bitfld.long 0x1D4 4. " SION ,Force input path of pad GPIO_19" "Not forced,Forced" bitfld.long 0x1D4 0.--2. " MUX_MODE ,GPIO_19 MUX Mode" "kpp;COL[5],enet;1588_EVENT0_OUT,spdif;OUT1,ccm;CLKO,ecspi1;RDY,gpio4;GPIO[5],enet;TX_ER,src;INT_BOOT" line.long 0x1D8 "SW_MUX_CTL_PAD_GPIO_2,SW_MUX_CTL_PAD_GPIO_2 register" bitfld.long 0x1D8 4. " SION ,Force input path of pad GPIO_2" "Not forced,Forced" bitfld.long 0x1D8 0.--2. " MUX_MODE ,GPIO_2 MUX Mode" "esai;FST,,kpp;ROW[6],,,gpio1;GPIO[2],usdhc2;WP,mlb;MLBDAT" line.long 0x1DC "SW_MUX_CTL_PAD_GPIO_3,SW_MUX_CTL_PAD_GPIO_3 register" bitfld.long 0x1DC 4. " SION ,Force input path of pad GPIO_3" "Not forced,Forced" bitfld.long 0x1DC 0.--2. " MUX_MODE ,GPIO_3 MUX Mode" "esai;HCKR,,i2c3;SCL,,ccm;CLKO2,gpio1;GPIO[3],usboh3;USBH1_OC,mlb;MLBCLK" line.long 0x1E0 "SW_MUX_CTL_PAD_GPIO_4,SW_MUX_CTL_PAD_GPIO_4 register" bitfld.long 0x1E0 4. " SION ,Force input path of pad GPIO_4" "Not forced,Forced" bitfld.long 0x1E0 0.--2. " MUX_MODE ,GPIO_4 MUX Mode" "esai;HCKT,,kpp;COL[7],,,gpio1;GPIO[4],usdhc2;CD,?..." line.long 0x1E4 "SW_MUX_CTL_PAD_GPIO_5,SW_MUX_CTL_PAD_GPIO_5 register" bitfld.long 0x1E4 4. " SION ,Force input path of pad GPIO_5" "Not forced,Forced" bitfld.long 0x1E4 0.--2. " MUX_MODE ,GPIO_5 MUX Mode" "esai;TX2_RX3,,kpp;ROW[7],ccm;CLKO,,gpio1;GPIO[5],i2c3;SCL,cheetah;EVENTI" line.long 0x1E8 "SW_MUX_CTL_PAD_GPIO_6,SW_MUX_CTL_PAD_GPIO_6 register" bitfld.long 0x1E8 4. " SION ,Force input path of pad GPIO_6" "Not forced,Forced" bitfld.long 0x1E8 0.--2. " MUX_MODE ,GPIO_6 MUX Mode" "esai;SCKT,,i2c3;SDA,,,gpio1;GPIO[6],usdhc2;LCTL,mlb;MLBSIG" line.long 0x1EC "SW_MUX_CTL_PAD_GPIO_7,SW_MUX_CTL_PAD_GPIO_7 register" bitfld.long 0x1EC 4. " SION ,Force input path of pad GPIO_7" "Not forced,Forced" bitfld.long 0x1EC 0.--3. " MUX_MODE ,GPIO_7 MUX Mode" "esai;TX4_RX1,ecspi5;RDY,epit1;EPITO,can1;TXCAN,uart2;TXD_MUX,gpio1;GPIO[7],spdif;PLOCK,usboh3;OTGUSB_HOST_MODE,i2c4;SCL,?..." line.long 0x1F0 "SW_MUX_CTL_PAD_GPIO_8,SW_MUX_CTL_PAD_GPIO_8 register" bitfld.long 0x1F0 4. " SION ,Force input path of pad GPIO_8" "Not forced,Forced" bitfld.long 0x1F0 0.--3. " MUX_MODE ,GPIO_8 MUX Mode" "esai;TX5_RX0,,epit2;EPITO,can1;RXCAN,uart2;RXD_MUX,gpio1;GPIO[8],spdif;SRCLK,usboh3;OTGUSB_PWRCTL_WAKEUP,i2c4;SDA,?..." line.long 0x1F4 "SW_MUX_CTL_PAD_GPIO_9,SW_MUX_CTL_PAD_GPIO_9 register" bitfld.long 0x1F4 4. " SION ,Force input path of pad GPIO_9" "Not forced,Forced" bitfld.long 0x1F4 0.--2. " MUX_MODE ,GPIO_9 MUX Mode" "esai;FSR,wdog1;WDOG_B,kpp;COL[6],ccm;REF_EN_B,pwm1;PWMO,gpio1;GPIO[9],usdhc1;WP,src;EARLY_RST" line.long 0x1F8 "SW_MUX_CTL_PAD_KEY_COL0,SW_MUX_CTL_PAD_KEY_COL0 register" bitfld.long 0x1F8 4. " SION ,Force input path of pad KEY_COL0" "Not forced,Forced" bitfld.long 0x1F8 0.--2. " MUX_MODE ,KEY_COL0 MUX Mode" "ecspi1;SCLK,enet;RDATA[3],audmux;AUD5_TXC,kpp;COL[0],uart4;TXD_MUX,gpio4;GPIO[6],dcic1;DCIC_OUT,?..." line.long 0x1FC "SW_MUX_CTL_PAD_KEY_COL1,SW_MUX_CTL_PAD_KEY_COL1 register" bitfld.long 0x1FC 4. " SION ,Force input path of pad KEY_COL1" "Not forced,Forced" bitfld.long 0x1FC 0.--2. " MUX_MODE ,KEY_COL1 MUX Mode" "ecspi1;MISO,enet;MDIO,audmux;AUD5_TXFS,kpp;COL[1],uart5;TXD_MUX,gpio4;GPIO[8],usdhc1;VSELECT,?..." line.long 0x200 "SW_MUX_CTL_PAD_KEY_COL2,SW_MUX_CTL_PAD_KEY_COL2 register" bitfld.long 0x200 4. " SION ,Force input path of pad KEY_COL2" "Not forced,Forced" bitfld.long 0x200 0.--2. " MUX_MODE ,KEY_COL2 MUX Mode" "ecspi1;SS1,enet;RDATA[2],can1;TXCAN,kpp;COL[2],enet;MDC,gpio4;GPIO[10],usboh3;H1USB_PWRCTL_WAKEUP,?..." line.long 0x204 "SW_MUX_CTL_PAD_KEY_COL3,SW_MUX_CTL_PAD_KEY_COL3 register" bitfld.long 0x204 4. " SION ,Force input path of pad KEY_COL3" "Not forced,Forced" bitfld.long 0x204 0.--2. " MUX_MODE ,KEY_COL3 MUX Mode" "ecspi1;SS3,enet;CRS,hdmi_tx;DDC_SCL,kpp;COL[3],i2c2;SCL,gpio4;GPIO[12],spdif;IN1,?..." line.long 0x208 "SW_MUX_CTL_PAD_KEY_COL4,SW_MUX_CTL_PAD_KEY_COL4 register" bitfld.long 0x208 4. " SION ,Force input path of pad KEY_COL4" "Not forced,Forced" bitfld.long 0x208 0.--2. " MUX_MODE ,KEY_COL4 MUX Mode" "can2;TXCAN,,usboh3;USBOTG_OC,kpp;COL[4],uart5;RTS,gpio4;GPIO[14],?..." line.long 0x20C "SW_MUX_CTL_PAD_KEY_ROW0,SW_MUX_CTL_PAD_KEY_ROW0 register" bitfld.long 0x20C 4. " SION ,Force input path of pad KEY_ROW0" "Not forced,Forced" bitfld.long 0x20C 0.--2. " MUX_MODE ,KEY_ROW0 MUX Mode" "ecspi1;MOSI,enet;TDATA[3],audmux;AUD5_TXD,kpp;ROW[0],uart4;RXD_MUX,gpio4;GPIO[7],dcic2;DCIC_OUT,?..." line.long 0x210 "SW_MUX_CTL_PAD_KEY_ROW1,SW_MUX_CTL_PAD_KEY_ROW1 register" bitfld.long 0x210 4. " SION ,Force input path of pad KEY_ROW1" "Not forced,Forced" bitfld.long 0x210 0.--2. " MUX_MODE ,KEY_ROW1 MUX Mode" "ecspi1;SS0,enet;COL,audmux;AUD5_RXD,kpp;ROW[1],uart5;RXD_MUX,gpio4;GPIO[9],usdhc2;VSELECT,?..." line.long 0x214 "SW_MUX_CTL_PAD_KEY_ROW2,SW_MUX_CTL_PAD_KEY_ROW2 register" bitfld.long 0x214 4. " SION ,Force input path of pad KEY_ROW2" "Not forced,Forced" bitfld.long 0x214 0.--2. " MUX_MODE ,KEY_ROW2 MUX Mode" "ecspi1;SS2,enet;TDATA[2],can1;RXCAN,kpp;ROW[2],usdhc2;VSELECT,gpio4;GPIO[11],hdmi_tx;CEC_LINE,?..." line.long 0x218 "SW_MUX_CTL_PAD_KEY_ROW3,SW_MUX_CTL_PAD_KEY_ROW3 register" bitfld.long 0x218 4. " SION ,Force input path of pad KEY_ROW3" "Not forced,Forced" bitfld.long 0x218 0.--2. " MUX_MODE ,KEY_ROW3 MUX Mode" "osc32k;32K_OUT,asrc;ASRC_EXT_CLK,hdmi_tx;DDC_SDA,kpp;ROW[3],i2c2;SDA,gpio4;GPIO[13],usdhc1;VSELECT,?..." line.long 0x21C "SW_MUX_CTL_PAD_KEY_ROW4,SW_MUX_CTL_PAD_KEY_ROW4 register" bitfld.long 0x21C 4. " SION ,Force input path of pad KEY_ROW4" "Not forced,Forced" bitfld.long 0x21C 0.--2. " MUX_MODE ,KEY_ROW4 MUX Mode" "can2;RXCAN,,usboh3;USBOTG_PWR,kpp;ROW[4],uart5;CTS,gpio4;GPIO[15],?..." line.long 0x220 "SW_MUX_CTL_PAD_NANDF_ALE,SW_MUX_CTL_PAD_NANDF_ALE register" bitfld.long 0x220 4. " SION ,Force input path of pad NANDF_ALE" "Not forced,Forced" bitfld.long 0x220 0.--3. " MUX_MODE ,NANDF_ALE MUX Mode" "rawnand;ALE,usdhc4;RST,,,,gpio6;GPIO[8],,,usdhc3;CLKI,?..." line.long 0x224 "SW_MUX_CTL_PAD_NANDF_CLE,SW_MUX_CTL_PAD_NANDF_CLE register" bitfld.long 0x224 4. " SION ,Force input path of pad NANDF_CLE" "Not forced,Forced" bitfld.long 0x224 0.--3. " MUX_MODE ,NANDF_CLE MUX Mode" "rawnand;CLE,,,,,gpio6;GPIO[7],,,usdhc3;CLKO,?..." line.long 0x228 "SW_MUX_CTL_PAD_NANDF_CS0,SW_MUX_CTL_PAD_NANDF_CS0 register" bitfld.long 0x228 4. " SION ,Force input path of pad NANDF_CS0" "Not forced,Forced" bitfld.long 0x228 0.--3. " MUX_MODE ,NANDF_CS0 MUX Mode" "rawnand;CE0N,,,,,gpio6;GPIO[11],,,usdhc1;CLKO,?..." line.long 0x22C "SW_MUX_CTL_PAD_NANDF_CS1,SW_MUX_CTL_PAD_NANDF_CS1 register" bitfld.long 0x22C 4. " SION ,Force input path of pad NANDF_CS1" "Not forced,Forced" bitfld.long 0x22C 0.--3. " MUX_MODE ,NANDF_CS1 MUX Mode" "rawnand;CE1N,usdhc4;VSELECT,usdhc3;VSELECT,,,gpio6;GPIO[14],,,usdhc1;CLKI,?..." line.long 0x230 "SW_MUX_CTL_PAD_NANDF_CS2,SW_MUX_CTL_PAD_NANDF_CS2 register" bitfld.long 0x230 4. " SION ,Force input path of pad NANDF_CS2" "Not forced,Forced" bitfld.long 0x230 0.--3. " MUX_MODE ,NANDF_CS2 MUX Mode" "rawnand;CE2N,,esai;TX0,EIM;EIM_CRE,ccm;CLKO2,gpio6;GPIO[15],,,usdhc2;CLKO,?..." line.long 0x234 "SW_MUX_CTL_PAD_NANDF_CS3,SW_MUX_CTL_PAD_NANDF_CS3 register" bitfld.long 0x234 4. " SION ,Force input path of pad NANDF_CS3" "Not forced,Forced" bitfld.long 0x234 0.--3. " MUX_MODE ,NANDF_CS3 MUX Mode" "rawnand;CE3N,,esai;TX1,EIM;EIM_A[26],,gpio6;GPIO[16],,,usdhc2;CLKI,i2c4;SDA,?..." line.long 0x238 "SW_MUX_CTL_PAD_NANDF_D0,SW_MUX_CTL_PAD_NANDF_D0 register" bitfld.long 0x238 4. " SION ,Force input path of pad NANDF_D0" "Not forced,Forced" bitfld.long 0x238 0.--2. " MUX_MODE ,NANDF_D0 MUX Mode" "rawnand;D0,usdhc1;DAT4,,,,gpio2;GPIO[0],?..." line.long 0x23C "SW_MUX_CTL_PAD_NANDF_D1,SW_MUX_CTL_PAD_NANDF_D1 register" bitfld.long 0x23C 4. " SION ,Force input path of pad NANDF_D1" "Not forced,Forced" bitfld.long 0x23C 0.--2. " MUX_MODE ,NANDF_D1 MUX Mode" "rawnand;D1,usdhc1;DAT5,,,,gpio2;GPIO[1],?..." line.long 0x240 "SW_MUX_CTL_PAD_NANDF_D2,SW_MUX_CTL_PAD_NANDF_D2 register" bitfld.long 0x240 4. " SION ,Force input path of pad NANDF_D2" "Not forced,Forced" bitfld.long 0x240 0.--2. " MUX_MODE ,NANDF_D2 MUX Mode" "rawnand;D2,usdhc1;DAT6,,,,gpio2;GPIO[2],?..." line.long 0x244 "SW_MUX_CTL_PAD_NANDF_D3,SW_MUX_CTL_PAD_NANDF_D3 register" bitfld.long 0x244 4. " SION ,Force input path of pad NANDF_D3" "Not forced,Forced" bitfld.long 0x244 0.--2. " MUX_MODE ,NANDF_D3 MUX Mode" "rawnand;D3,usdhc1;DAT7,,,,gpio2;GPIO[3],?..." line.long 0x248 "SW_MUX_CTL_PAD_NANDF_D4,SW_MUX_CTL_PAD_NANDF_D4 register" bitfld.long 0x248 4. " SION ,Force input path of pad NANDF_D4" "Not forced,Forced" bitfld.long 0x248 0.--2. " MUX_MODE ,NANDF_D4 MUX Mode" "rawnand;D4,usdhc2;DAT4,,,,gpio2;GPIO[4],?..." line.long 0x24C "SW_MUX_CTL_PAD_NANDF_D5,SW_MUX_CTL_PAD_NANDF_D5 register" bitfld.long 0x24C 4. " SION ,Force input path of pad NANDF_D5" "Not forced,Forced" bitfld.long 0x24C 0.--2. " MUX_MODE ,NANDF_D5 MUX Mode" "rawnand;D5,usdhc2;DAT5,,,,gpio2;GPIO[5],?..." line.long 0x250 "SW_MUX_CTL_PAD_NANDF_D6,SW_MUX_CTL_PAD_NANDF_D6 register" bitfld.long 0x250 4. " SION ,Force input path of pad NANDF_D6" "Not forced,Forced" bitfld.long 0x250 0.--2. " MUX_MODE ,NANDF_D6 MUX Mode" "rawnand;D6,usdhc2;DAT6,,,,gpio2;GPIO[6],?..." line.long 0x254 "SW_MUX_CTL_PAD_NANDF_D7,SW_MUX_CTL_PAD_NANDF_D7 register" bitfld.long 0x254 4. " SION ,Force input path of pad NANDF_D7" "Not forced,Forced" bitfld.long 0x254 0.--2. " MUX_MODE ,NANDF_D7 MUX Mode" "rawnand;D7,usdhc2;DAT7,,,,gpio2;GPIO[7],?..." line.long 0x258 "SW_MUX_CTL_PAD_NANDF_RB0,SW_MUX_CTL_PAD_NANDF_RB0 register" bitfld.long 0x258 4. " SION ,Force input path of pad NANDF_RB0" "Not forced,Forced" bitfld.long 0x258 0.--3. " MUX_MODE ,NANDF_RB0 MUX Mode" "rawnand;READY0,,,,,gpio6;GPIO[10],,,usdhc4;CLKI,?..." line.long 0x25C "SW_MUX_CTL_PAD_NANDF_WP_B,SW_MUX_CTL_PAD_NANDF_WP_B register" bitfld.long 0x25C 4. " SION ,Force input path of pad NANDF_WP_B" "Not forced,Forced" bitfld.long 0x25C 0.--3. " MUX_MODE ,NANDF_WP_B MUX Mode" "rawnand;RESETN,,,,,gpio6;GPIO[9],,,usdhc4;CLKO,i2c4;SCL,?..." line.long 0x260 "SW_MUX_CTL_PAD_RGMII_RD0,SW_MUX_CTL_PAD_RGMII_RD0 register" bitfld.long 0x260 4. " SION ,Force input path of pad RGMII_RD0" "Not forced,Forced" bitfld.long 0x260 0.--2. " MUX_MODE ,RGMII_RD0 MUX Mode" "mipi_hsi_ctrl;RX_READY,enet;RGMII_RD0,,,,gpio6;GPIO[25],?..." line.long 0x264 "SW_MUX_CTL_PAD_RGMII_RD1,SW_MUX_CTL_PAD_RGMII_RD1 register" bitfld.long 0x264 4. " SION ,Force input path of pad RGMII_RD1" "Not forced,Forced" bitfld.long 0x264 0.--2. " MUX_MODE ,RGMII_RD1 MUX Mode" "mipi_hsi_ctrl;TX_FLAG,enet;RGMII_RD1,,,,gpio6;GPIO[27],?..." line.long 0x268 "SW_MUX_CTL_PAD_RGMII_RD2,SW_MUX_CTL_PAD_RGMII_RD2 register" bitfld.long 0x268 4. " SION ,Force input path of pad RGMII_RD2" "Not forced,Forced" bitfld.long 0x268 0.--2. " MUX_MODE ,RGMII_RD2 MUX Mode" "mipi_hsi_ctrl;TX_DATA,enet;RGMII_RD2,,,,gpio6;GPIO[28],?..." line.long 0x26C "SW_MUX_CTL_PAD_RGMII_RD3,SW_MUX_CTL_PAD_RGMII_RD3 register" bitfld.long 0x26C 4. " SION ,Force input path of pad RGMII_RD3" "Not forced,Forced" bitfld.long 0x26C 0.--2. " MUX_MODE ,RGMII_RD2 MUX Mode" "mipi_hsi_ctrl;TX_WAKE,enet;RGMII_RD3,,,,gpio6;GPIO[29],?..." line.long 0x270 "SW_MUX_CTL_PAD_RGMII_RX_CTL,SW_MUX_CTL_PAD_RGMII_RX_CTL register" bitfld.long 0x270 4. " SION ,Force input path of pad RGMII_RX_CTL" "Not forced,Forced" bitfld.long 0x270 0.--2. " MUX_MODE ,RGMII_RX_CTL MUX Mode" "usboh3;H3_DATA,enet;RGMII_RX_CTL,,,,gpio6;GPIO[24],?..." line.long 0x274 "SW_MUX_CTL_PAD_RGMII_RXC,SW_MUX_CTL_PAD_RGMII_RXC register" bitfld.long 0x274 4. " SION ,Force input path of pad RGMII_RXC" "Not forced,Forced" bitfld.long 0x274 0.--2. " MUX_MODE ,RGMII_RXC MUX Mode" "usboh3;H3_STROBE,enet;RGMII_RXC,,,,gpio6;GPIO[30],?..." line.long 0x278 "SW_MUX_CTL_PAD_RGMII_TD0,SW_MUX_CTL_PAD_RGMII_TD0 register" bitfld.long 0x278 4. " SION ,Force input path of pad RGMII_TD0" "Not forced,Forced" bitfld.long 0x278 0.--2. " MUX_MODE ,RGMII_TD0 MUX Mode" "mipi_hsi_ctrl;TX_READY,enet;RGMII_TD0,,,,gpio6;GPIO[20],?..." line.long 0x27C "SW_MUX_CTL_PAD_RGMII_TD1,SW_MUX_CTL_PAD_RGMII_TD1 register" bitfld.long 0x27C 4. " SION ,Force input path of pad RGMII_TD1" "Not forced,Forced" bitfld.long 0x27C 0.--2. " MUX_MODE ,RGMII_TD1 MUX Mode" "mipi_hsi_ctrl;RX_FLAG,enet;RGMII_TD1,,,,gpio6;GPIO[21],?..." line.long 0x280 "SW_MUX_CTL_PAD_RGMII_TD2,SW_MUX_CTL_PAD_RGMII_TD2 register" bitfld.long 0x280 4. " SION ,Force input path of pad RGMII_TD2" "Not forced,Forced" bitfld.long 0x280 0.--2. " MUX_MODE ,RGMII_TD2 MUX Mode" "mipi_hsi_ctrl;RX_DATA,enet;RGMII_TD2,,,,gpio6;GPIO[22],?..." line.long 0x284 "SW_MUX_CTL_PAD_RGMII_TD3,SW_MUX_CTL_PAD_RGMII_TD3 register" bitfld.long 0x284 4. " SION ,Force input path of pad RGMII_TD3" "Not forced,Forced" bitfld.long 0x284 0.--2. " MUX_MODE ,RGMII_TD3 MUX Mode" "mipi_hsi_ctrl;RX_WAKE,enet;RGMII_TD3,,,,gpio6;GPIO[23],?..." line.long 0x288 "SW_MUX_CTL_PAD_RGMII_TX_CTL,SW_MUX_CTL_PAD_RGMII_TX_CTL register" bitfld.long 0x288 4. " SION ,Force input path of pad RGMII_TX_CTL" "Not forced,Forced" bitfld.long 0x288 0.--2. " MUX_MODE ,RGMII_TX_CTL MUX Mode" "usboh3;H2_STROBE,enet;RGMII_TX_CTL,,,,gpio6;GPIO[26],,enet;ANATOP_ETHERNET_REF_OUT" line.long 0x28C "SW_MUX_CTL_PAD_RGMII_TXC,IOMUXC_SW_MUX_CTL_PAD_RGMII_TXC register" bitfld.long 0x28C 4. " SION ,Force input path of pad RGMII_TXC" "Not forced,Forced" bitfld.long 0x28C 0.--2. " MUX_MODE ,RGMII_TXC MUX Mode" "usboh3;H2_DATA,enet;RGMII_TXC,spdif;SPDIF_EXTCLK,,,gpio6;GPIO[19],?..." line.long 0x290 "SW_MUX_CTL_PAD_SD1_CLK,SW_MUX_CTL_PAD_SD1_CLK register" bitfld.long 0x290 4. " SION ,Force input path of pad SD1_CLK" "Not forced,Forced" bitfld.long 0x290 0.--2. " MUX_MODE ,SD1_CLK MUX Mode" "usdhc1;CLK,ecspi5;SCLK,osc32k;32K_OUT,gpt;CLKIN,,gpio1;GPIO[20],?..." line.long 0x294 "SW_MUX_CTL_PAD_SD1_CMD,SW_MUX_CTL_PAD_SD1_CMD register" bitfld.long 0x294 4. " SION ,Force input path of pad SD1_CMD" "Not forced,Forced" bitfld.long 0x294 0.--2. " MUX_MODE ,SD1_CMD MUX Mode" "usdhc1;CMD,ecspi5;MOSI,pwm4;PWMO,gpt;CMPOUT1,,gpio1;GPIO[18],?..." line.long 0x298 "SW_MUX_CTL_PAD_SD1_DAT0,SW_MUX_CTL_PAD_SD1_DAT0 register" bitfld.long 0x298 4. " SION ,Force input path of pad SD1_DAT0" "Not forced,Forced" bitfld.long 0x298 0.--2. " MUX_MODE ,SD1_DAT0 MUX Mode" "usdhc1;DAT0,ecspi5;MISO,,gpt;CAPIN1,,gpio1;GPIO[16],hdmi_tx;OPHYDTB[1],?..." line.long 0x29C "SW_MUX_CTL_PAD_SD1_DAT1,SW_MUX_CTL_PAD_SD1_DAT1 register" bitfld.long 0x29C 4. " SION ,Force input path of pad SD1_DAT1" "Not forced,Forced" bitfld.long 0x29C 0.--2. " MUX_MODE ,SD1_DAT1 MUX Mode" "usdhc1;DAT1,ecspi5;SS0,pwm3;PWMO,gpt;CAPIN2,,gpio1;GPIO[17],hdmi_tx;OPHYDTB[0],?..." line.long 0x2A0 "SW_MUX_CTL_PAD_SD1_DAT2,SW_MUX_CTL_PAD_SD1_DAT2 register" bitfld.long 0x2A0 4. " SION ,Force input path of pad SD1_DAT2" "Not forced,Forced" bitfld.long 0x2A0 0.--2. " MUX_MODE ,SD1_DAT2 MUX Mode" "usdhc1;DAT2,ecspi5;SS1,gpt;CMPOUT2,pwm2;PWMO,wdog1;WDOG_B,gpio1;GPIO[19],wdog1;WDOG_RST_B_DEB,?..." line.long 0x2A4 "SW_MUX_CTL_PAD_SD1_DAT3,SW_MUX_CTL_PAD_SD1_DAT3 register" bitfld.long 0x2A4 4. " SION ,Force input path of pad SD1_DAT3" "Not forced,Forced" bitfld.long 0x2A4 0.--2. " MUX_MODE ,SD1_DAT3 MUX Mode" "usdhc1;DAT3,ecspi5;SS2,gpt;CMPOUT3,pwm1;PWMO,wdog2;WDOG_B,gpio1;GPIO[21],wdog2;WDOG_RST_B_DEB,?..." line.long 0x2A8 "SW_MUX_CTL_PAD_SD2_CLK,SW_MUX_CTL_PAD_SD2_CLK register" bitfld.long 0x2A8 4. " SION ,Force input path of pad SD2_CLK" "Not forced,Forced" bitfld.long 0x2A8 0.--2. " MUX_MODE ,SD2_CLK MUX Mode" "usdhc2;CLK,ecspi5;SCLK,kpp;COL[5],audmux;AUD4_RXFS,,gpio1;GPIO[10],?..." line.long 0x2AC "SW_MUX_CTL_PAD_SD2_CMD,SW_MUX_CTL_PAD_SD2_CMD register" bitfld.long 0x2AC 4. " SION ,Force input path of pad SD2_CMD" "Not forced,Forced" bitfld.long 0x2AC 0.--2. " MUX_MODE ,SD2_CMD MUX Mode" "usdhc2;CMD,ecspi5;MOSI,kpp;ROW[5],audmux;AUD4_RXC,,gpio1;GPIO[11],?..." line.long 0x2B0 "SW_MUX_CTL_PAD_SD2_DAT0,SW_MUX_CTL_PAD_SD2_DAT0 register" bitfld.long 0x2B0 4. " SION ,Force input path of pad SD2_DAT0" "Not forced,Forced" bitfld.long 0x2B0 0.--2. " MUX_MODE ,SD2_DAT0 MUX Mode" "usdhc2;DAT0,ecspi5;MISO,,audmux;AUD4_RXD,kpp;ROW[7],gpio1;GPIO[15],dcic2;DCIC_OUT,?..." line.long 0x2B4 "SW_MUX_CTL_PAD_SD2_DAT1,SW_MUX_CTL_PAD_SD2_DAT1 Register" bitfld.long 0x2B4 4. " SION ,Force input path of pad SD2_DAT1" "Not forced,Forced" bitfld.long 0x2B4 0.--2. " MUX_MODE ,SD2_DAT1 MUX Mode" "usdhc2;DAT1,ecspi5;SS0,EIM;EIM_CS[2],audmux;AUD4_TXFS,kpp;COL[7],gpio1;GPIO[14],?..." line.long 0x2B8 "SW_MUX_CTL_PAD_SD2_DAT2,SW_MUX_CTL_PAD_SD2_DAT2 register" bitfld.long 0x2B8 4. " SION ,Force input path of pad SD2_DAT2" "Not forced,Forced" bitfld.long 0x2B8 0.--2. " MUX_MODE ,SD2_DAT2 MUX Mode" "usdhc2;DAT2,ecspi5;SS1,EIM;EIM_CS[3],audmux;AUD4_TXD,kpp;ROW[6],gpio1;GPIO[13],?..." line.long 0x2BC "SW_MUX_CTL_PAD_SD2_DAT3,SW_MUX_CTL_PAD_SD2_DAT3 register" bitfld.long 0x2BC 4. " SION ,Force input path of pad SD2_DAT3" "Not forced,Forced" bitfld.long 0x2BC 0.--2. " MUX_MODE ,SD2_DAT3 MUX Mode" "usdhc2;DAT3,ecspi5;SS3,kpp;COL[6],audmux;AUD4_TXC,,gpio1;GPIO[12],?..." line.long 0x2C0 "SW_MUX_CTL_PAD_SD3_CLK,SW_MUX_CTL_PAD_SD3_CLK register" bitfld.long 0x2C0 4. " SION ,Force input path of pad SD3_CLK" "Not forced,Forced" bitfld.long 0x2C0 0.--2. " MUX_MODE ,SD3_CLK MUX Mode" "usdhc3;CLK,uart2;RTS,can1;RXCAN,,,gpio7;GPIO[3],?..." line.long 0x2C4 "SW_MUX_CTL_PAD_SD3_CMD,SW_MUX_CTL_PAD_SD3_CMD register" bitfld.long 0x2C4 4. " SION ,Force input path of pad SD3_CMD" "Not forced,Forced" bitfld.long 0x2C4 0.--2. " MUX_MODE ,SD3_CMD MUX Mode" "usdhc3;CMD,uart2;CTS,can1;TXCAN,,,gpio7;GPIO[2],?..." line.long 0x2C8 "SW_MUX_CTL_PAD_SD3_DAT0,SW_MUX_CTL_PAD_SD3_DAT0 register" bitfld.long 0x2C8 4. " SION ,Force input path of pad SD3_DAT0" "Not forced,Forced" bitfld.long 0x2C8 0.--2. " MUX_MODE ,SD3_DAT0 MUX Mode" "usdhc3;DAT0,uart1;CTS,can2;TXCAN,,,gpio7;GPIO[4],?..." line.long 0x2CC "SW_MUX_CTL_PAD_SD3_DAT1,SW_MUX_CTL_PAD_SD3_DAT1 register" bitfld.long 0x2CC 4. " SION ,Force input path of pad SD3_DAT1" "Not forced,Forced" bitfld.long 0x2CC 0.--2. " MUX_MODE ,SD3_DAT1 MUX Mode" "usdhc3;DAT1,uart1;RTS,can2;RXCAN,,,gpio7;GPIO[5],?..." line.long 0x2D0 "SW_MUX_CTL_PAD_SD3_DAT2,SW_MUX_CTL_PAD_SD3_DAT2 register" bitfld.long 0x2D0 4. " SION ,Force input path of pad SD3_DAT2" "Not forced,Forced" bitfld.long 0x2D0 0.--2. " MUX_MODE ,SD3_DAT2 MUX Mode" "usdhc3;DAT2,,,,,gpio7;GPIO[6],?..." line.long 0x2D4 "SW_MUX_CTL_PAD_SD3_DAT3,SW_MUX_CTL_PAD_SD3_DAT3 register" bitfld.long 0x2D4 4. " SION ,Force input path of pad SD3_DAT3" "Not forced,Forced" bitfld.long 0x2D4 0.--2. " MUX_MODE ,SD3_DAT3 MUX Mode" "usdhc3;DAT3,uart3;CTS,,,,gpio7;GPIO[7],?..." line.long 0x2D8 "SW_MUX_CTL_PAD_SD3_DAT4,SW_MUX_CTL_PAD_SD3_DAT4 register" bitfld.long 0x2D8 4. " SION ,Force input path of pad SD3_DAT4" "Not forced,Forced" bitfld.long 0x2D8 0.--2. " MUX_MODE ,SD3_DAT4 MUX Mode" "usdhc3;DAT4,uart2;RXD_MUX,,,,gpio7;GPIO[1],?..." line.long 0x2DC "SW_MUX_CTL_PAD_SD3_DAT5,SW_MUX_CTL_PAD_SD3_DAT5 register" bitfld.long 0x2DC 4. " SION ,Force input path of pad SD3_DAT5" "Not forced,Forced" bitfld.long 0x2DC 0.--2. " MUX_MODE ,SD3_DAT5 MUX Mode" "usdhc3;DAT5,uart2;TXD_MUX,,,,gpio7;GPIO[0],?..." line.long 0x2E0 "SW_MUX_CTL_PAD_SD3_DAT6,SW_MUX_CTL_PAD_SD3_DAT6 register" bitfld.long 0x2E0 4. " SION ,Force input path of pad SD3_DAT6" "Not forced,Forced" bitfld.long 0x2E0 0.--2. " MUX_MODE ,SD3_DAT6 MUX Mode" "usdhc3;DAT6,uart1;RXD_MUX,,,,gpio6;GPIO[18],?..." line.long 0x2E4 "SW_MUX_CTL_PAD_SD3_DAT7,SW_MUX_CTL_PAD_SD3_DAT7 register" bitfld.long 0x2E4 4. " SION ,Force input path of pad SD3_DAT7" "Not forced,Forced" bitfld.long 0x2E4 0.--2. " MUX_MODE ,SD3_DAT7 MUX Mode" "usdhc3;DAT7,uart1;TXD_MUX,,,,gpio6;GPIO[17],?..." line.long 0x2E8 "SW_MUX_CTL_PAD_SD3_RST,SW_MUX_CTL_PAD_SD3_RST register" bitfld.long 0x2E8 4. " SION ,Force input path of pad SD3_RST" "Not forced,Forced" bitfld.long 0x2E8 0.--2. " MUX_MODE ,SD3_RST MUX Mode" "usdhc3;RST,uart3;RTS,,,,gpio7;GPIO[8],?..." line.long 0x2EC "SW_MUX_CTL_PAD_SD4_CLK,SW_MUX_CTL_PAD_SD4_CLK register" bitfld.long 0x2EC 4. " SION ,Force input path of pad SD4_CLK" "Not forced,Forced" bitfld.long 0x2EC 0.--2. " MUX_MODE ,SD4_CLK MUX Mode" "usdhc4;CLK,rawnand;WRN,uart3;RXD_MUX,,,gpio7;GPIO[10],?..." line.long 0x2F0 "SW_MUX_CTL_PAD_SD4_CMD,SW_MUX_CTL_PAD_SD4_CMD register" bitfld.long 0x2F0 4. " SION ,Force input path of pad SD4_CMD" "Not forced,Forced" bitfld.long 0x2F0 0.--2. " MUX_MODE ,SD4_CMD MUX Mode" "usdhc4;CMD,rawnand;RDN,uart3;TXD_MUX,,,gpio7;GPIO[9],?..." line.long 0x2F4 "SW_MUX_CTL_PAD_SD4_DAT0,SW_MUX_CTL_PAD_SD4_DAT0 register" bitfld.long 0x2F4 4. " SION ,Force input path of pad SD4_DAT0" "Not forced,Forced" bitfld.long 0x2F4 0.--2. " MUX_MODE ,SD4_DAT0 MUX Mode" ",usdhc4;DAT0,rawnand;DQS,,,gpio2;GPIO[8],?..." line.long 0x2F8 "SW_MUX_CTL_PAD_SD4_DAT1,SW_MUX_CTL_PAD_SD4_DAT1 register" bitfld.long 0x2F8 4. " SION ,Force input path of pad SD4_DAT1" "Not forced,Forced" bitfld.long 0x2F8 0.--2. " MUX_MODE ,SD4_DAT1 MUX Mode" ",usdhc4;DAT1,pwm3;PWMO,,,gpio2;GPIO[9],?..." line.long 0x2FC "SW_MUX_CTL_PAD_SD4_DAT2,SW_MUX_CTL_PAD_SD4_DAT2 register" bitfld.long 0x2FC 4. " SION ,Force input path of pad SD4_DAT2" "Not forced,Forced" bitfld.long 0x2FC 0.--2. " MUX_MODE ,SD4_DAT2 MUX Mode" ",usdhc4;DAT2,pwm4;PWMO,,,gpio2;GPIO[10],?..." line.long 0x300 "SW_MUX_CTL_PAD_SD4_DAT3,SW_MUX_CTL_PAD_SD4_DAT3 register" bitfld.long 0x300 4. " SION ,Force input path of pad SD4_DAT3" "Not forced,Forced" bitfld.long 0x300 0.--2. " MUX_MODE ,SD4_DAT3 MUX Mode" ",usdhc4;DAT3,,,,gpio2;GPIO[11],?..." line.long 0x304 "SW_MUX_CTL_PAD_SD4_DAT4,SW_MUX_CTL_PAD_SD4_DAT4 register" bitfld.long 0x304 4. " SION ,Force input path of pad SD4_DAT4" "Not forced,Forced" bitfld.long 0x304 0.--2. " MUX_MODE ,SD4_DAT4 MUX Mode" ",usdhc4;DAT4,uart2;RXD_MUX,,,gpio2;GPIO[12],?..." line.long 0x308 "SW_MUX_CTL_PAD_SD4_DAT5,SW_MUX_CTL_PAD_SD4_DAT5 register" bitfld.long 0x308 4. " SION ,Force input path of pad SD4_DAT5" "Not forced,Forced" bitfld.long 0x308 0.--2. " MUX_MODE ,SD4_DAT5 MUX Mode" ",usdhc4;DAT5,uart2;RTS,,,gpio2;GPIO[13],?..." line.long 0x30C "SW_MUX_CTL_PAD_SD4_DAT6,SW_MUX_CTL_PAD_SD4_DAT6 register" bitfld.long 0x30C 4. " SION ,Force input path of pad SD4_DAT6" "Not forced,Forced" bitfld.long 0x30C 0.--2. " MUX_MODE ,SD4_DAT6 MUX Mode" ",usdhc4;DAT6,uart2;CTS,,,gpio2;GPIO[14],?..." line.long 0x310 "SW_MUX_CTL_PAD_SD4_DAT7,SW_MUX_CTL_PAD_SD4_DAT7 register" bitfld.long 0x310 4. " SION ,Force input path of pad SD4_DAT7" "Not forced,Forced" bitfld.long 0x310 0.--2. " MUX_MODE ,SD4_DAT7 MUX Mode" ",usdhc4;DAT7,uart2;TXD_MUX,,,gpio2;GPIO[15],?..." tree.end tree "SW_PAD_CTL_PAD Registers" width 28. group.long 0x360++0x4F line.long 0x0 "SW_PAD_CTL_PAD_CSI0_DAT10,SW_PAD_CTL_PAD_CSI0_DAT10 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_CSI0_DAT11,SW_PAD_CTL_PAD_CSI0_DAT11 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_CSI0_DAT12,SW_PAD_CTL_PAD_CSI0_DAT12 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_CSI0_DAT13,SW_PAD_CTL_PAD_CSI0_DAT13 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_CSI0_DAT14,SW_PAD_CTL_PAD_CSI0_DAT14 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_CSI0_DAT15,SW_PAD_CTL_PAD_CSI0_DAT15 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_CSI0_DAT16,SW_PAD_CTL_PAD_CSI0_DAT16 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_CSI0_DAT17,SW_PAD_CTL_PAD_CSI0_DAT17 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_CSI0_DAT18,SW_PAD_CTL_PAD_CSI0_DAT18 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_CSI0_DAT19,SW_PAD_CTL_PAD_CSI0_DAT19 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_CSI0_DAT4,SW_PAD_CTL_PAD_CSI0_DAT4 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_CSI0_DAT5,SW_PAD_CTL_PAD_CSI0_DAT5 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_CSI0_DAT6,SW_PAD_CTL_PAD_CSI0_DAT6 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_CSI0_DAT7,SW_PAD_CTL_PAD_CSI0_DAT7 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_CSI0_DAT8,SW_PAD_CTL_PAD_CSI0_DAT8 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_CSI0_DAT9,SW_PAD_CTL_PAD_CSI0_DAT9 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_CSI0_DATA_EN,SW_PAD_CTL_PAD_CSI0_DATA_EN register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_CSI0_MCLK,SW_PAD_CTL_PAD_CSI0_MCLK register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_CSI0_PIXCLK,SW_PAD_CTL_PAD_CSI0_PIXCLK register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_CSI0_VSYNC,SW_PAD_CTL_PAD_CSI0_VSYNC register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x3B0++0x73 ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x0 "SW_PAD_CTL_PAD_DISP_CLK,SW_PAD_CTL_PAD_DISP_CLK register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x4 "SW_PAD_CTL_PAD_DI0_PIN15,SW_PAD_CTL_PAD_DI0_PIN15 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x8 "SW_PAD_CTL_PAD_DI0_PIN2,SW_PAD_CTL_PAD_DI0_PIN2 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0xC "SW_PAD_CTL_PAD_DI0_PIN3,SW_PAD_CTL_PAD_DI0_PIN3 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x10 "SW_PAD_CTL_PAD_DI0_PIN4,SW_PAD_CTL_PAD_DI0_PIN4 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x14 "SW_PAD_CTL_PAD_DISP0_DAT0,SW_PAD_CTL_PAD_DISP0_DAT0 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x18 "SW_PAD_CTL_PAD_DISP0_DAT1,SW_PAD_CTL_PAD_DISP0_DAT1 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x1C "SW_PAD_CTL_PAD_DISP0_DAT10,SW_PAD_CTL_PAD_DISP0_DAT10 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x20 "SW_PAD_CTL_PAD_DISP0_DAT11,SW_PAD_CTL_PAD_DISP0_DAT11 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x24 "SW_PAD_CTL_PAD_DISP0_DAT12,SW_PAD_CTL_PAD_DISP0_DAT12 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x28 "SW_PAD_CTL_PAD_DISP0_DAT13,SW_PAD_CTL_PAD_DISP0_DAT13 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x2C "SW_PAD_CTL_PAD_DISP0_DAT14,SW_PAD_CTL_PAD_DISP0_DAT14 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x30 "SW_PAD_CTL_PAD_DISP0_DAT15,SW_PAD_CTL_PAD_DISP0_DAT15 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x34 "SW_PAD_CTL_PAD_DISP0_DAT16,SW_PAD_CTL_PAD_DISP0_DAT16 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x38 "SW_PAD_CTL_PAD_DISP0_DAT17,SW_PAD_CTL_PAD_DISP0_DAT17 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x3C "SW_PAD_CTL_PAD_DISP0_DAT18,SW_PAD_CTL_PAD_DISP0_DAT18 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x40 "SW_PAD_CTL_PAD_DISP0_DAT19,SW_PAD_CTL_PAD_DISP0_DAT19 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x44 "SW_PAD_CTL_PAD_DISP0_DAT2,SW_PAD_CTL_PAD_DISP0_DAT2 register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x48 "SW_PAD_CTL_PAD_DISP0_DAT20,SW_PAD_CTL_PAD_DISP0_DAT20 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x4C "SW_PAD_CTL_PAD_DISP0_DAT21,SW_PAD_CTL_PAD_DISP0_DAT21 register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x50 "SW_PAD_CTL_PAD_DISP0_DAT22,SW_PAD_CTL_PAD_DISP0_DAT22 register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x54 "SW_PAD_CTL_PAD_DISP0_DAT23,SW_PAD_CTL_PAD_DISP0_DAT23 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x58 "SW_PAD_CTL_PAD_DISP0_DAT3,SW_PAD_CTL_PAD_DISP0_DAT3 register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x5C "SW_PAD_CTL_PAD_DISP0_DAT4,SW_PAD_CTL_PAD_DISP0_DAT4 register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x60 "SW_PAD_CTL_PAD_DISP0_DAT5,SW_PAD_CTL_PAD_DISP0_DAT5 register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x64 "SW_PAD_CTL_PAD_DISP0_DAT6,SW_PAD_CTL_PAD_DISP0_DAT6 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x68 "SW_PAD_CTL_PAD_DISP0_DAT7,SW_PAD_CTL_PAD_DISP0_DAT7 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x6C "SW_PAD_CTL_PAD_DISP0_DAT8,SW_PAD_CTL_PAD_DISP0_DAT8 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" ;%for (85)(0x00,0x04)(list:"EIM_A25,EIM_EB2,EIM_D16,EIM_D17,EIM_D18,EIM_D19,EIM_D20,EIM_D21,EIM_D22,EIM_D23,EIM_EB3,EIM_D24,EIM_D25,EIM_D26,EIM_D27,EIM_D28,EIM_D29,EIM_D30,EIM_D31,EIM_A24,EIM_A23,EIM_A22,EIM_A21,EIM_A20,EIM_A19,EIM_A18,EIM_A17,EIM_A16,EIM_CS0,EIM_CS1,EIM_OE,EIM_RW,EIM_LBA,EIM_EB0,EIM_EB1,EIM_DA0,EIM_DA1,EIM_DA2,EIM_DA3,EIM_DA4,EIM_DA5,EIM_DA6,EIM_DA7,EIM_DA8,EIM_DA9,EIM_DA10,EIM_DA11,EIM_DA12,EIM_DA13,EIM_DA14,EIM_DA15,EIM_WAIT,EIM_BCLK,DISP_CLK,DI0_PIN15,DI0_PIN2,DI0_PIN3,DI0_PIN4,DISP0_DAT0,DISP0_DAT1,DISP0_DAT2,DISP0_DAT3,DISP0_DAT4,DISP0_DAT5,DISP0_DAT6,DISP0_DAT7,DISP0_DAT8,DISP0_DAT9,DISP0_DAT10,DISP0_DAT11,DISP0_DAT12,DISP0_DAT13,DISP0_DAT14,DISP0_DAT15,DISP0_DAT16,DISP0_DAT17,DISP0_DAT18,DISP0_DAT19,DISP0_DAT20,DISP0_DAT21,DISP0_DAT22,DISP0_DAT23,ENET_MDIO,ENET_REF_CLK,ENET_RX_ER") line.long 0x70 "SW_PAD_CTL_PAD_DISP0_DAT9,SW_PAD_CTL_PAD_DISP0_DAT9 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x424++0x3F line.long 0x0 "SW_PAD_CTL_PAD_DRAM_A0,SW_PAD_CTL_PAD_DRAM_A0 register" bitfld.long 0x0 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x4 "SW_PAD_CTL_PAD_DRAM_A1,SW_PAD_CTL_PAD_DRAM_A1 register" bitfld.long 0x4 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x8 "SW_PAD_CTL_PAD_DRAM_A10,SW_PAD_CTL_PAD_DRAM_A10 register" bitfld.long 0x8 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x8 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0xC "SW_PAD_CTL_PAD_DRAM_A11,SW_PAD_CTL_PAD_DRAM_A11 register" bitfld.long 0xC 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0xC 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x10 "SW_PAD_CTL_PAD_DRAM_A12,SW_PAD_CTL_PAD_DRAM_A12 register" bitfld.long 0x10 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x14 "SW_PAD_CTL_PAD_DRAM_A13,SW_PAD_CTL_PAD_DRAM_A13 register" bitfld.long 0x14 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x18 "SW_PAD_CTL_PAD_DRAM_A14,SW_PAD_CTL_PAD_DRAM_A14 register" bitfld.long 0x18 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x1C "SW_PAD_CTL_PAD_DRAM_A15,SW_PAD_CTL_PAD_DRAM_A15 register" bitfld.long 0x1C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x20 "SW_PAD_CTL_PAD_DRAM_A2,SW_PAD_CTL_PAD_DRAM_A2 register" bitfld.long 0x20 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x24 "SW_PAD_CTL_PAD_DRAM_A3,SW_PAD_CTL_PAD_DRAM_A3 register" bitfld.long 0x24 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x28 "SW_PAD_CTL_PAD_DRAM_A4,SW_PAD_CTL_PAD_DRAM_A4 register" bitfld.long 0x28 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x2C "SW_PAD_CTL_PAD_DRAM_A5,SW_PAD_CTL_PAD_DRAM_A5 register" bitfld.long 0x2C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x30 "SW_PAD_CTL_PAD_DRAM_A6,SW_PAD_CTL_PAD_DRAM_A6 register" bitfld.long 0x30 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x34 "SW_PAD_CTL_PAD_DRAM_A7,SW_PAD_CTL_PAD_DRAM_A7 register" bitfld.long 0x34 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x38 "SW_PAD_CTL_PAD_DRAM_A8,SW_PAD_CTL_PAD_DRAM_A8 register" bitfld.long 0x38 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x3C "SW_PAD_CTL_PAD_DRAM_A9,SW_PAD_CTL_PAD_DRAM_A9 register" bitfld.long 0x3C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,?..." group.long 0x464++0x7B line.long 0x00 "SW_PAD_CTL_PAD_DRAM_CAS,SW_PAD_CTL_PAD_DRAM_CAS register" bitfld.long 0x00 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_PAD_DRAM_CS0,SW_PAD_CTL_PAD_DRAM_CS0 register" bitfld.long 0x04 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x04 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x04 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x04 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x04 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x08 "SW_PAD_CTL_PAD_DRAM_CS1,SW_PAD_CTL_PAD_DRAM_CS1 register" bitfld.long 0x08 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x08 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x08 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x08 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x08 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x08 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x0C "SW_PAD_CTL_PAD_DRAM_DQM0,SW_PAD_CTL_PAD_DRAM_DQM0 register" bitfld.long 0x0C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x0C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x0C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x0C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x0C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x0C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_DRAM_DQM1,SW_PAD_CTL_PAD_DRAM_DQM1 register" bitfld.long 0x10 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_DRAM_DQM2,SW_PAD_CTL_PAD_DRAM_DQM2 register" bitfld.long 0x14 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x18 "SW_PAD_CTL_PAD_DRAM_DQM3,SW_PAD_CTL_PAD_DRAM_DQM3 register" bitfld.long 0x18 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_PAD_DRAM_DQM4,SW_PAD_CTL_PAD_DRAM_DQM4 register" bitfld.long 0x1C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_PAD_DRAM_DQM5,SW_PAD_CTL_PAD_DRAM_DQM5 register" bitfld.long 0x20 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x24 "SW_PAD_CTL_PAD_DRAM_DQM6,SW_PAD_CTL_PAD_DRAM_DQM6 register" bitfld.long 0x24 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x28 "SW_PAD_CTL_PAD_DRAM_DQM7,SW_PAD_CTL_PAD_DRAM_DQM7 register" bitfld.long 0x28 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_PAD_DRAM_RAS,SW_PAD_CTL_PAD_DRAM_RAS register" bitfld.long 0x2C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x30 "SW_PAD_CTL_PAD_DRAM_RESET,SW_PAD_CTL_PAD_DRAM_RESET register" bitfld.long 0x30 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,DDR2 driver,LPDDR2,?..." bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x34 "SW_PAD_CTL_PAD_DRAM_SDBA0,SW_PAD_CTL_PAD_DRAM_SDBA0 register" bitfld.long 0x34 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x38 "SW_PAD_CTL_PAD_DRAM_SDBA1,SW_PAD_CTL_PAD_DRAM_SDBA1 register" bitfld.long 0x38 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x3C "SW_PAD_CTL_PAD_DRAM_SDBA2,SW_PAD_CTL_PAD_DRAM_SDBA2 register" bitfld.long 0x3C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x40 "SW_PAD_CTL_PAD_DRAM_SDCKE0,SW_PAD_CTL_PAD_DRAM_SDCKE0 register" bitfld.long 0x40 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x40 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x40 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x40 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x44 "SW_PAD_CTL_PAD_DRAM_SDCKE1,SW_PAD_CTL_PAD_DRAM_SDCKE1 register" bitfld.long 0x44 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x44 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x44 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x44 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x48 "SW_PAD_CTL_PAD_DRAM_SDCLK_0,SW_PAD_CTL_PAD_DRAM_SDCLK_0 register" bitfld.long 0x48 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x48 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x48 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x48 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x4C "SW_PAD_CTL_PAD_DRAM_SDCLK_1,SW_PAD_CTL_PAD_DRAM_SDCLK_1 register" bitfld.long 0x4C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x4C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x4C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x50 "SW_PAD_CTL_PAD_DRAM_SDODT0,SW_PAD_CTL_PAD_DRAM_SDODT0 register" bitfld.long 0x50 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x50 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x50 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x50 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x54 "SW_PAD_CTL_PAD_DRAM_SDODT1,SW_PAD_CTL_PAD_DRAM_SDODT1 register" bitfld.long 0x54 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x54 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x54 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x54 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x58 "SW_PAD_CTL_PAD_DRAM_SDQS0,SW_PAD_CTL_PAD_DRAM_SDQS0 register" bitfld.long 0x58 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x58 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x58 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x58 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x5C "SW_PAD_CTL_PAD_DRAM_SDQS1,SW_PAD_CTL_PAD_DRAM_SDQS1 register" bitfld.long 0x5C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x5C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x5C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x5C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x60 "SW_PAD_CTL_PAD_DRAM_SDQS2,SW_PAD_CTL_PAD_DRAM_SDQS2 register" bitfld.long 0x60 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x60 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x60 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x60 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x64 "SW_PAD_CTL_PAD_DRAM_SDQS3,SW_PAD_CTL_PAD_DRAM_SDQS3 register" bitfld.long 0x64 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x64 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x64 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x64 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x68 "SW_PAD_CTL_PAD_DRAM_SDQS4,SW_PAD_CTL_PAD_DRAM_SDQS4 register" bitfld.long 0x68 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x68 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x68 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x68 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x6C "SW_PAD_CTL_PAD_DRAM_SDQS5,SW_PAD_CTL_PAD_DRAM_SDQS5 register" bitfld.long 0x6C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x6C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x6C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x6C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x70 "SW_PAD_CTL_PAD_DRAM_SDQS6,SW_PAD_CTL_PAD_DRAM_SDQS6 register" bitfld.long 0x70 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x70 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x70 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x70 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x74 "SW_PAD_CTL_PAD_DRAM_SDQS7,SW_PAD_CTL_PAD_DRAM_SDQS7 register" bitfld.long 0x74 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x74 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x74 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,?..." textline " " bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x74 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x78 "SW_PAD_CTL_PAD_DRAM_SDWE,SW_PAD_CTL_PAD_DRAM_SDWE register" bitfld.long 0x78 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x78 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x78 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,?..." bitfld.long 0x78 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." textline " " bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,?..." group.long 0x4E0++0xE7 line.long 0x0 "SW_PAD_CTL_PAD_EIM_A16,SW_PAD_CTL_PAD_EIM_A16 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_EIM_A17,SW_PAD_CTL_PAD_EIM_A17 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_EIM_A18,SW_PAD_CTL_PAD_EIM_A18 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_EIM_A19,SW_PAD_CTL_PAD_EIM_A19 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_EIM_A20,SW_PAD_CTL_PAD_EIM_A20 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_EIM_A21,SW_PAD_CTL_PAD_EIM_A21 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_EIM_A22,SW_PAD_CTL_PAD_EIM_A22 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_EIM_A23,SW_PAD_CTL_PAD_EIM_A23 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_EIM_A24,SW_PAD_CTL_PAD_EIM_A24 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_EIM_A25,SW_PAD_CTL_PAD_EIM_A25 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_EIM_BCLK,SW_PAD_CTL_PAD_EIM_BCLK register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_EIM_CS0,SW_PAD_CTL_PAD_EIM_CS0 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_EIM_CS1,SW_PAD_CTL_PAD_EIM_CS1 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_EIM_D16,SW_PAD_CTL_PAD_EIM_D16 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_EIM_D17,SW_PAD_CTL_PAD_EIM_D17 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_EIM_D18,SW_PAD_CTL_PAD_EIM_D18 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_EIM_D19,SW_PAD_CTL_PAD_EIM_D19 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_EIM_D20,SW_PAD_CTL_PAD_EIM_D20 register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_EIM_D21,SW_PAD_CTL_PAD_EIM_D21 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_EIM_D22,SW_PAD_CTL_PAD_EIM_D22 register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_EIM_D23,SW_PAD_CTL_PAD_EIM_D23 register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_EIM_D24,SW_PAD_CTL_PAD_EIM_D24 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_EIM_D25,SW_PAD_CTL_PAD_EIM_D25 register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_EIM_D26,SW_PAD_CTL_PAD_EIM_D26 register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_EIM_D27,SW_PAD_CTL_PAD_EIM_D27 register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_EIM_D28,SW_PAD_CTL_PAD_EIM_D28 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_EIM_D29,SW_PAD_CTL_PAD_EIM_D29 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_EIM_D30,SW_PAD_CTL_PAD_EIM_D30 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_EIM_D31,SW_PAD_CTL_PAD_EIM_D31 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_EIM_DA0,SW_PAD_CTL_PAD_EIM_DA0 register" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_EIM_DA1,SW_PAD_CTL_PAD_EIM_DA1 register" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_EIM_DA10,SW_PAD_CTL_PAD_EIM_DA10 register" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_EIM_DA11,SW_PAD_CTL_PAD_EIM_DA11 register" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_EIM_DA12,SW_PAD_CTL_PAD_EIM_DA12 register" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x88 "SW_PAD_CTL_PAD_EIM_DA13,SW_PAD_CTL_PAD_EIM_DA13 register" bitfld.long 0x88 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x88 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x88 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x88 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x88 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x88 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x88 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x88 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8C "SW_PAD_CTL_PAD_EIM_DA14,SW_PAD_CTL_PAD_EIM_DA14 register" bitfld.long 0x8C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x90 "SW_PAD_CTL_PAD_EIM_DA15,SW_PAD_CTL_PAD_EIM_DA15 register" bitfld.long 0x90 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x90 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x90 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x90 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x90 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x90 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x90 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x90 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x94 "SW_PAD_CTL_PAD_EIM_DA2,SW_PAD_CTL_PAD_EIM_DA2 register" bitfld.long 0x94 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x94 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x94 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x94 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x94 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x94 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x94 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x94 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x98 "SW_PAD_CTL_PAD_EIM_DA3,SW_PAD_CTL_PAD_EIM_DA3 register" bitfld.long 0x98 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x98 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x98 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x98 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x98 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x98 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x98 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x98 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x9C "SW_PAD_CTL_PAD_EIM_DA4,SW_PAD_CTL_PAD_EIM_DA4 register" bitfld.long 0x9C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x9C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x9C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x9C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x9C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x9C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x9C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x9C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA0 "SW_PAD_CTL_PAD_EIM_DA5,SW_PAD_CTL_PAD_EIM_DA5 register" bitfld.long 0xA0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA4 "SW_PAD_CTL_PAD_EIM_DA6,SW_PAD_CTL_PAD_EIM_DA6 register" bitfld.long 0xA4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA8 "SW_PAD_CTL_PAD_EIM_DA7,SW_PAD_CTL_PAD_EIM_DA7 register" bitfld.long 0xA8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xAC "SW_PAD_CTL_PAD_EIM_DA8,SW_PAD_CTL_PAD_EIM_DA8 register" bitfld.long 0xAC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xAC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xAC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xAC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xAC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xAC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xAC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xAC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB0 "SW_PAD_CTL_PAD_EIM_DA9,SW_PAD_CTL_PAD_EIM_DA9 register" bitfld.long 0xB0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xB0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB4 "SW_PAD_CTL_PAD_EIM_EB0,SW_PAD_CTL_PAD_EIM_EB0 register" bitfld.long 0xB4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xB4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB8 "SW_PAD_CTL_PAD_EIM_EB1,SW_PAD_CTL_PAD_EIM_EB1 register" bitfld.long 0xB8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xB8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xBC "SW_PAD_CTL_PAD_EIM_EB2,SW_PAD_CTL_PAD_EIM_EB2 register" bitfld.long 0xBC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xBC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xBC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xBC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xBC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xBC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xBC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xBC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC0 "SW_PAD_CTL_PAD_EIM_EB3,SW_PAD_CTL_PAD_EIM_EB3 register" bitfld.long 0xC0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC4 "SW_PAD_CTL_PAD_EIM_LBA,SW_PAD_CTL_PAD_EIM_LBA register" bitfld.long 0xC4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC8 "SW_PAD_CTL_PAD_EIM_OE,SW_PAD_CTL_PAD_EIM_OE register" bitfld.long 0xC8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xCC "SW_PAD_CTL_PAD_EIM_RW,SW_PAD_CTL_PAD_EIM_RW register" bitfld.long 0xCC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xCC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xCC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xCC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xCC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xCC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xCC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xCC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD0 "SW_PAD_CTL_PAD_EIM_WAIT,SW_PAD_CTL_PAD_EIM_WAIT register" bitfld.long 0xD0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xD0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD4 "SW_PAD_CTL_PAD_ENET_CRS_DV,SW_PAD_CTL_PAD_ENET_CRS_DV register" bitfld.long 0xD4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xD4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD8 "SW_PAD_CTL_PAD_ENET_MDC,SW_PAD_CTL_PAD_ENET_MDC register" bitfld.long 0xD8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xD8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xD8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xDC "SW_PAD_CTL_PAD_ENET_MDIO,SW_PAD_CTL_PAD_ENET_MDIO register" bitfld.long 0xDC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xDC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xDC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xDC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xDC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xDC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xDC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xDC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE0 "SW_PAD_CTL_PAD_ENET_REF_CLK,SW_PAD_CTL_PAD_ENET_REF_CLK register" bitfld.long 0xE0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xE0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xE0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xE0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xE0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xE0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE4 "SW_PAD_CTL_PAD_ENET_RX_ER,SW_PAD_CTL_PAD_ENET_RX_ER register" bitfld.long 0xE4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xE4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xE4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xE4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xE4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xE4 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x5C8++0x07 line.long 0x00 "SW_PAD_CTL_PAD_ENET_RXD0,SW_PAD_CTL_PAD_ENET_RXD0 register" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x00 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x00 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x04 "SW_PAD_CTL_PAD_ENET_RXD1,SW_PAD_CTL_PAD_ENET_RXD1 register" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x04 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x04 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x04 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x04 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x5D0++0x43 line.long 0x0 "SW_PAD_CTL_PAD_ENET_TX_EN,SW_PAD_CTL_PAD_ENET_TX_EN register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_ENET_TXD0,SW_PAD_CTL_PAD_ENET_TXD0 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_ENET_TXD1,SW_PAD_CTL_PAD_ENET_TXD1 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_GPIO_0,SW_PAD_CTL_PAD_GPIO_0 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_GPIO_1,SW_PAD_CTL_PAD_GPIO_1 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_GPIO_16,SW_PAD_CTL_PAD_GPIO_16 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_GPIO_17,SW_PAD_CTL_PAD_GPIO_17 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_GPIO_18,SW_PAD_CTL_PAD_GPIO_18 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_GPIO_19,SW_PAD_CTL_PAD_GPIO_19 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_GPIO_2,SW_PAD_CTL_PAD_GPIO_2 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_GPIO_3,SW_PAD_CTL_PAD_GPIO_3 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_GPIO_4,SW_PAD_CTL_PAD_GPIO_4 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_GPIO_5,SW_PAD_CTL_PAD_GPIO_5 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_GPIO_6,SW_PAD_CTL_PAD_GPIO_6 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_GPIO_7,SW_PAD_CTL_PAD_GPIO_7 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_GPIO_8,SW_PAD_CTL_PAD_GPIO_8 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_GPIO_9,SW_PAD_CTL_PAD_GPIO_9 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x614++0x0B line.long 0x0 "SW_PAD_CTL_PAD_JTAG_MOD,SW_PAD_CTL_PAD_JTAG_MOD register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,?..." bitfld.long 0x0 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x4 "SW_PAD_CTL_PAD_JTAG_TCK,SW_PAD_CTL_PAD_JTAG_TCK register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,?..." bitfld.long 0x4 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x8 "SW_PAD_CTL_PAD_JTAG_TDI,SW_PAD_CTL_PAD_JTAG_TDI register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,?..." bitfld.long 0x8 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,?..." group.long 0x620++0x3 line.long 0x00 "SW_PAD_CTL_PAD_JTAG_TDO,SW_PAD_CTL_PAD_JTAG_TDO register" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x00 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" ",,,,,,40 Ohm,?..." bitfld.long 0x00 0. " SRE ,Slew Rate" ",Fast" group.long 0x624++0x07 line.long 0x0 "SW_PAD_CTL_PAD_JTAG_TMS,SW_PAD_CTL_PAD_JTAG_TMS register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,?..." bitfld.long 0x0 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x4 "SW_PAD_CTL_PAD_JTAG_TRSTB,SW_PAD_CTL_PAD_JTAG_TRSTB register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,?..." bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,?..." bitfld.long 0x4 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,?..." group.long 0x62C++0x13 line.long 0x0 "SW_PAD_CTL_PAD_KEY_COL0,SW_PAD_CTL_PAD_KEY_COL0 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_KEY_COL1,SW_PAD_CTL_PAD_KEY_COL1 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_KEY_COL2,SW_PAD_CTL_PAD_KEY_COL2 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_KEY_COL3,SW_PAD_CTL_PAD_KEY_COL3 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_KEY_COL4,SW_PAD_CTL_PAD_KEY_COL4 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x640++0x13 line.long 0x0 "SW_PAD_CTL_PAD_KEY_ROW0,SW_PAD_CTL_PAD_KEY_ROW0 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_KEY_ROW1,SW_PAD_CTL_PAD_KEY_ROW1 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_KEY_ROW2,SW_PAD_CTL_PAD_KEY_ROW2 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_KEY_ROW3,SW_PAD_CTL_PAD_KEY_ROW3 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_KEY_ROW4,SW_PAD_CTL_PAD_KEY_ROW4 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x654++0xB7 line.long 0x0 "SW_PAD_CTL_PAD_NANDF_ALE,SW_PAD_CTL_PAD_NANDF_ALE register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_NANDF_CLE,SW_PAD_CTL_PAD_NANDF_CLE register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_NANDF_CS0,SW_PAD_CTL_PAD_NANDF_CS0 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_NANDF_CS1,SW_PAD_CTL_PAD_NANDF_CS1 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_NANDF_CS2,SW_PAD_CTL_PAD_NANDF_CS2 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_NANDF_CS3,SW_PAD_CTL_PAD_NANDF_CS3 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_NANDF_D0,SW_PAD_CTL_PAD_NANDF_D0 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_NANDF_D1,SW_PAD_CTL_PAD_NANDF_D1 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_NANDF_D2,SW_PAD_CTL_PAD_NANDF_D2 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_NANDF_D3,SW_PAD_CTL_PAD_NANDF_D3 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_NANDF_D4,SW_PAD_CTL_PAD_NANDF_D4 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_NANDF_D5,SW_PAD_CTL_PAD_NANDF_D5 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_NANDF_D6,SW_PAD_CTL_PAD_NANDF_D6 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_NANDF_D7,SW_PAD_CTL_PAD_NANDF_D7 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_NANDF_RB0,SW_PAD_CTL_PAD_NANDF_RB0 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_NANDF_WP_B,SW_PAD_CTL_PAD_NANDF_WP_B register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x694++0x2F line.long 0x0 "SW_PAD_CTL_PAD_RGMII_RD0,SW_PAD_CTL_PAD_RGMII_RD0 register" bitfld.long 0x0 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x4 "SW_PAD_CTL_PAD_RGMII_RD1,SW_PAD_CTL_PAD_RGMII_RD1 register" bitfld.long 0x4 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x8 "SW_PAD_CTL_PAD_RGMII_RD2,SW_PAD_CTL_PAD_RGMII_RD2 register" bitfld.long 0x8 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x8 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0xC "SW_PAD_CTL_PAD_RGMII_RD3,SW_PAD_CTL_PAD_RGMII_RD3 register" bitfld.long 0xC 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0xC 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_RGMII_RX_CTL,SW_PAD_CTL_PAD_RGMII_RX_CTL register" bitfld.long 0x10 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_RGMII_RXC,SW_PAD_CTL_PAD_RGMII_RXC register" bitfld.long 0x14 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x18 "SW_PAD_CTL_PAD_RGMII_TD0,SW_PAD_CTL_PAD_RGMII_TD0 register" bitfld.long 0x18 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_PAD_RGMII_TD1,SW_PAD_CTL_PAD_RGMII_TD1 register" bitfld.long 0x1C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_PAD_RGMII_TD2,SW_PAD_CTL_PAD_RGMII_TD2 register" bitfld.long 0x20 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x24 "SW_PAD_CTL_PAD_RGMII_TD3,SW_PAD_CTL_PAD_RGMII_TD3 register" bitfld.long 0x24 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x28 "SW_PAD_CTL_PAD_RGMII_TX_CTL,SW_PAD_CTL_PAD_RGMII_TX_CTL register" bitfld.long 0x28 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_PAD_RGMII_TXC,SW_PAD_CTL_PAD_RGMII_TXC register" bitfld.long 0x2C 20.--21. " DO_TRIM ,DO Trim Field" "0,1,2,3" bitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,?..." textline " " bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" group.long 0x6C4++0x83 line.long 0x0 "SW_PAD_CTL_PAD_SD1_CLK,SW_PAD_CTL_PAD_SD1_CLK register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_SD1_CMD,SW_PAD_CTL_PAD_SD1_CMD register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_SD1_DAT0,SW_PAD_CTL_PAD_SD1_DAT0 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_SD1_DAT1,SW_PAD_CTL_PAD_SD1_DAT1 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_SD1_DAT2,SW_PAD_CTL_PAD_SD1_DAT2 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_SD1_DAT3,SW_PAD_CTL_PAD_SD1_DAT3 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_SD2_CLK,SW_PAD_CTL_PAD_SD2_CLK register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_SD2_CMD,SW_PAD_CTL_PAD_SD2_CMD register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_SD2_DAT0,SW_PAD_CTL_PAD_SD2_DAT0 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_SD2_DAT1,SW_PAD_CTL_PAD_SD2_DAT1 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_SD2_DAT2,SW_PAD_CTL_PAD_SD2_DAT2 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_SD2_DAT3,SW_PAD_CTL_PAD_SD2_DAT3 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_SD3_CLK,SW_PAD_CTL_PAD_SD3_CLK register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_SD3_CMD,SW_PAD_CTL_PAD_SD3_CMD register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_SD3_DAT0,SW_PAD_CTL_PAD_SD3_DAT0 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_SD3_DAT1,SW_PAD_CTL_PAD_SD3_DAT1 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_SD3_DAT2,SW_PAD_CTL_PAD_SD3_DAT2 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_SD3_DAT3,SW_PAD_CTL_PAD_SD3_DAT3 register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_SD3_DAT4,SW_PAD_CTL_PAD_SD3_DAT4 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_SD3_DAT5,SW_PAD_CTL_PAD_SD3_DAT5 register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_SD3_DAT6,SW_PAD_CTL_PAD_SD3_DAT6 register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_SD3_DAT7,SW_PAD_CTL_PAD_SD3_DAT7 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_SD3_RST,SW_PAD_CTL_PAD_SD3_RST register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_SD4_CLK,SW_PAD_CTL_PAD_SD4_CLK register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_SD4_CMD,SW_PAD_CTL_PAD_SD4_CMD register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_SD4_DAT0,SW_PAD_CTL_PAD_SD4_DAT0 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_SD4_DAT1,SW_PAD_CTL_PAD_SD4_DAT1 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_SD4_DAT2,SW_PAD_CTL_PAD_SD4_DAT2 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_SD4_DAT3,SW_PAD_CTL_PAD_SD4_DAT3 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_SD4_DAT4,SW_PAD_CTL_PAD_SD4_DAT4 register" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_SD4_DAT5,SW_PAD_CTL_PAD_SD4_DAT5 register" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_SD4_DAT6,SW_PAD_CTL_PAD_SD4_DAT6 register" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_SD4_DAT7,SW_PAD_CTL_PAD_SD4_DAT7 register" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" tree.end tree "SW_PAD_CTL_GRP Registers" width 31. group.long 0x748++0x47 line.long 0x00 "SW_PAD_CTL_GRP_B7DS,SW_PAD_CTL_GRP_B7DS register" bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_GRP_ADDDS,SW_PAD_CTL_GRP_ADDDS register" bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x08 "SW_PAD_CTL_GRP_DDRMODE_CTL,SW_PAD_CTL_GRP_DDRMODE_CTL register" bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x0C "SW_PAD_CTL_GRP_DDRPKE,SW_PAD_CTL_GRP_DDRPKE register" bitfld.long 0x0C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" line.long 0x10 "SW_PAD_CTL_GRP_DDRPK,SW_PAD_CTL_GRP_DDRPK register" bitfld.long 0x10 13. " PUE ,Pull / Keep Select" "Keep,Pull" line.long 0x14 "SW_PAD_CTL_GRP_DDRHYS,SW_PAD_CTL_GRP_DDRHYS register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" line.long 0x18 "SW_PAD_CTL_GRP_DDRMODE,SW_PAD_CTL_GRP_DDRMODE register" bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x1C "SW_PAD_CTL_GRP_B0DS,SW_PAD_CTL_GRP_B0DS register" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_GRP_DDR_TYPE_RGMII,SW_PAD_CTL_GRP_DDR_TYPE_RGMII register" bitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,DDR2 driver,LPDDR2,?..." line.long 0x24 "SW_PAD_CTL_GRP_CTLDS,SW_PAD_CTL_GRP_CTLDS register" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x28 "SW_PAD_CTL_GRP_B1DS,SW_PAD_CTL_GRP_B1DS register" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_GRP_DDR_TYPE,SW_PAD_CTL_GRP_DDR_TYPE register" bitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,DDR2 driver,LPDDR2,?..." line.long 0x30 "SW_PAD_CTL_GRP_B2DS,SW_PAD_CTL_GRP_B2DS register" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x34 "SW_PAD_CTL_GRP_B3DS,SW_PAD_CTL_GRP_B3DS register" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x38 "SW_PAD_CTL_GRP_B4DS,SW_PAD_CTL_GRP_B4DS register" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x3C "SW_PAD_CTL_GRP_B5DS,SW_PAD_CTL_GRP_B5DS register" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x40 "SW_PAD_CTL_GRP_RGMII_TERM,SW_PAD_CTL_GRP_RGMII_TERM register" bitfld.long 0x40 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,,20 Ohm ODT,?..." line.long 0x44 "SW_PAD_CTL_GRP_B6DS,SW_PAD_CTL_GRP_B6DS register" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" tree.end tree "SELECT_INPUT Registers" width 44. group.long 0x790++0x1AB line.long 0x00 "USB_OTG_ID_SELECT_INPUT,USB_OTG_ID_SELECT_INPUT register" bitfld.long 0x00 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_RX_ER,ALT3;GPIO_1" line.long 0x04 "ASRC_ASRCK_CLOCK_6_SELECT_INPUT,ASRC_ASRCK_CLOCK_6_SELECT_INPUT register" bitfld.long 0x04 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;GPIO_0,ALT4;GPIO_18,ALT1;KEY_ROW3,?..." line.long 0x08 "AUDMUX_P4_INPUT_DA_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_DA_AMX_SELECT_INPUT register" bitfld.long 0x08 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT23,ALT3;SD2_DAT0" line.long 0x0C "AUDMUX_P4_INPUT_DB_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_DB_AMX_SELECT_INPUT register" bitfld.long 0x0C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT21,ALT3;SD2_DAT2" line.long 0x10 "AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT register" bitfld.long 0x10 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT19,ALT3;SD2_CMD" line.long 0x14 "AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT register" bitfld.long 0x14 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT18,ALT3;SD2_CLK" line.long 0x18 "AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT register" bitfld.long 0x18 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT20,ALT3;SD2_DAT3" line.long 0x1C "AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT register" bitfld.long 0x1C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT22,ALT3;SD2_DAT1" line.long 0x20 "AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT register" bitfld.long 0x20 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT19,ALT2;KEY_ROW1" line.long 0x24 "AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT register" bitfld.long 0x24 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT17,ALT2;KEY_ROW0" line.long 0x28 "AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT register" bitfld.long 0x28 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT14,ALT6;EIM_D25" line.long 0x2C "AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT register" bitfld.long 0x2C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT13,ALT6;EIM_D24" line.long 0x30 "AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT register" bitfld.long 0x30 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT16,ALT2;KEY_COL0" line.long 0x34 "AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT register" bitfld.long 0x34 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT18,ALT2;KEY_COL1" line.long 0x38 "CAN1_IPP_IND_CANRX_SELECT_INPUT,CAN1_IPP_IND_CANRX_SELECT_INPUT register" bitfld.long 0x38 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;GPIO_8,ALT2;KEY_ROW2,ALT2;SD3_CLK,?..." line.long 0x3C "CAN2_IPP_IND_CANRX_SELECT_INPUT,CAN2_IPP_IND_CANRX_SELECT_INPUT register" bitfld.long 0x3C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;KEY_ROW4,ALT2;SD3_DAT1" line.long 0x40 "CCM_IPP_DI1_CLK_SELECT_INPUT,CCM_IPP_DI1_CLK_SELECT_INPUT register" bitfld.long 0x40 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_DA13,ALT2;EIM_EB2" line.long 0x44 "CCM_PMIC_VFUNCIONAL_READY_SELECT_INPUT,CCM_PMIC_VFUNCIONAL_READY_SELECT_INPUT register" bitfld.long 0x44 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_EB0,ALT2;GPIO_17" line.long 0x48 "ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT,ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT register" bitfld.long 0x48 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT4,ALT2;DISP0_DAT20,ALT1;EIM_D16,ALT0;KEY_COL0" line.long 0x4C "ECSPI1_IPP_IND_MISO_SELECT_INPUT,ECSPI1_IPP_IND_MISO_SELECT_INPUT register" bitfld.long 0x4C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT6,ALT2;DISP0_DAT22,ALT1;EIM_D17,ALT0;KEY_COL1" line.long 0x50 "ECSPI1_IPP_IND_MOSI_SELECT_INPUT,ECSPI1_IPP_IND_MOSI_SELECT_INPUT register" bitfld.long 0x50 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT5,ALT2;DISP0_DAT21,ALT1;EIM_D18,ALT0;KEY_ROW0" line.long 0x54 "ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x54 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT7,ALT2;DISP0_DAT23,ALT1;EIM_EB2,ALT0;KEY_ROW1" line.long 0x58 "ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT register" bitfld.long 0x58 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;DISP0_DAT15,ALT1;EIM_D19,ALT0;KEY_COL2,?..." line.long 0x5C "ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT register" bitfld.long 0x5C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D24,ALT0;KEY_ROW2" line.long 0x60 "ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT register" bitfld.long 0x60 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D25,ALT0;KEY_COL3" line.long 0x64 "ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT,ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT register" bitfld.long 0x64 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT8,ALT2;DISP0_DAT19,ALT2;EIM_CS0,?..." line.long 0x68 "ECSPI2_IPP_IND_MISO_SELECT_INPUT,ECSPI2_IPP_IND_MISO_SELECT_INPUT register" bitfld.long 0x68 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT10,ALT2;DISP0_DAT17,ALT2;EIM_OE,?..." line.long 0x6c "ECSPI2_IPP_IND_MOSI_SELECT_INPUT,ECSPI2_IPP_IND_MOSI_SELECT_INPUT register" bitfld.long 0x6c 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT9,ALT2;DISP0_DAT16,ALT2;EIM_CS1,?..." line.long 0x70 "ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x70 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;CSI0_DAT11,ALT2;DISP0_DAT18,ALT2;EIM_RW,?..." line.long 0x74 "ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT,ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT register" bitfld.long 0x74 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT15,ALT2;EIM_LBA" line.long 0x78 "ECSPI4_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI4_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x78 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D20,ALT2;EIM_D29" line.long 0x7C "ENET_IPG_CLK_RMII_SELECT_INPUT,ENET_IPG_CLK_RMII_SELECT_INPUT register" bitfld.long 0x7C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;GPIO_16,ALT7;RGMII_TX_CTL" line.long 0x80 "ENET_IPP_IND_MAC0_MDIO_SELECT_INPUT,ENET_IPP_IND_MAC0_MDIO_SELECT_INPUT register" bitfld.long 0x80 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;ENET_MDIO,ALT1;KEY_COL1" line.long 0x84 "ENET_IPP_IND_MAC0_RXCLK_SELECT_INPUT,ENET_IPP_IND_MAC0_RXCLK_SELECT_INPUT register" bitfld.long 0x84 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;GPIO_18,ALT1;RGMII_RXC" line.long 0x88 "ENET_IPP_IND_MAC0_RXDATA_0_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_0_SELECT_INPUT register" bitfld.long 0x88 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;ENET_RXD0,ALT1;RGMII_RD0" line.long 0x8C "ENET_IPP_IND_MAC0_RXDATA_1_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_1_SELECT_INPUT register" bitfld.long 0x8C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;ENET_RXD1,ALT1;RGMII_RD1" line.long 0x90 "ENET_IPP_IND_MAC0_RXDATA_2_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_2_SELECT_INPUT register" bitfld.long 0x90 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;KEY_COL2,ALT1;RGMII_RD2" line.long 0x94 "ENET_IPP_IND_MAC0_RXDATA_3_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_3_SELECT_INPUT register" bitfld.long 0x94 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;KEY_COL0,ALT1;RGMII_RD3" line.long 0x98 "ENET_IPP_IND_MAC0_RXEN_SELECT_INPUT,ENET_IPP_IND_MAC0_RXEN_SELECT_INPUT register" bitfld.long 0x98 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;ENET_CRS_DV,ALT1;RGMII_RX_CTL" line.long 0x9C "ESAI1_IPP_IND_FSR_SELECT_INPUT,ESAI1_IPP_IND_FSR_SELECT_INPUT register" bitfld.long 0x9C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_REF_CLK,ALT0;GPIO_9" line.long 0xA0 "ESAI1_IPP_IND_FST_SELECT_INPUT,ESAI1_IPP_IND_FST_SELECT_INPUT register" bitfld.long 0xA0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RXD1,ALT0;GPIO_2" line.long 0xA4 "ESAI1_IPP_IND_HCKR_SELECT_INPUT,ESAI1_IPP_IND_HCKR_SELECT_INPUT register" bitfld.long 0xA4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RX_ER,ALT0;GPIO_3" line.long 0xA8 "ESAI1_IPP_IND_HCKT_SELECT_INPUT,ESAI1_IPP_IND_HCKT_SELECT_INPUT register" bitfld.long 0xA8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RXD0,ALT0;GPIO_4" line.long 0xAC "ESAI1_IPP_IND_SCKR_SELECT_INPUT,ESAI1_IPP_IND_SCKR_SELECT_INPUT register" bitfld.long 0xAC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_MDIO,ALT0;GPIO_1" line.long 0xB0 "ESAI1_IPP_IND_SCKT_SELECT_INPUT,ESAI1_IPP_IND_SCKT_SELECT_INPUT register" bitfld.long 0xB0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_CRS_DV,ALT0;GPIO_6" line.long 0xB4 "ESAI1_IPP_IND_SDO0_SELECT_INPUT,ESAI1_IPP_IND_SDO0_SELECT_INPUT register" bitfld.long 0xB4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;GPIO_17,ALT2;NANDF_CS2" line.long 0xB8 "ESAI1_IPP_IND_SDO1_SELECT_INPUT,ESAI1_IPP_IND_SDO1_SELECT_INPUT register" bitfld.long 0xB8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;GPIO_18,ALT2;NANDF_CS3" line.long 0xBC "ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT,ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT register" bitfld.long 0xBC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TXD1,ALT0;GPIO_5" line.long 0xC0 "ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT,ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT register" bitfld.long 0xC0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TX_EN,ALT0;GPIO_16" line.long 0xC4 "ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT,ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT register" bitfld.long 0xC4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TXD0,ALT0;GPIO_7" line.long 0xC8 "ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT,ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT register" bitfld.long 0xC8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_MDC,ALT0;GPIO_8" line.long 0xCC "HDMI_TX_ICECIN_SELECT_INPUT,HDMI_TX_ICECIN_SELECT_INPUT register" bitfld.long 0xCC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_A25,ALT6;KEY_ROW2" line.long 0xD0 "HDMI_TX_II2C_MSTH13TDDC_SCLIN_SELECT_INPUT,HDMI_TX_II2C_MSTH13TDDC_SCLIN_SELECT_INPUT register" bitfld.long 0xD0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_EB2,ALT2;KEY_COL3" line.long 0xD4 "HDMI_TX_II2C_MSTH13TDDC_SDAIN_SELECT_INPUT,HDMI_TX_II2C_MSTH13TDDC_SDAIN_SELECT_INPUT register" bitfld.long 0xD4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D16,ALT2;KEY_ROW3" line.long 0xD8 "I2C1_IPP_SCL_IN_SELECT_INPUT,I2C1_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xD8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;CSI0_DAT9,ALT6;EIM_D21" line.long 0xDC "I2C1_IPP_SDA_IN_SELECT_INPUT,I2C1_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xDC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;CSI0_DAT8,ALT1;EIM_D28" line.long 0xE0 "I2C2_IPP_SCL_IN_SELECT_INPUT,I2C2_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xE0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_EB2,ALT4;KEY_COL3" line.long 0xE4 "I2C2_IPP_SDA_IN_SELECT_INPUT,I2C2_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xE4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D16,ALT4;KEY_ROW3" line.long 0xE8 "I2C3_IPP_SCL_IN_SELECT_INPUT,I2C3_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xE8 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D17,ALT2;GPIO_3,ALT6;GPIO_5,?..." line.long 0xEC "I2C3_IPP_SDA_IN_SELECT_INPUT,I2C3_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xEC 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D18,ALT6;GPIO_16,ALT2;GPIO_6,?..." line.long 0xF0 "I2C4_IPP_SCL_IN_SELECT_INPUT,I2C4_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xF0 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT9;ENET_TX_EN,ALT8;GPIO_7,ALT9;NANDF_WP_B,?..." line.long 0xF4 "I2C4_IPP_SDA_IN_SELECT_INPUT,I2C4_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xF4 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT9;ENET_TXD1,ALT8;GPIO_8,ALT9;NANDF_CS3,?..." line.long 0xF8 "IPU1_IPP_IND_SENS1_DATA_10_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_10_SELECT_INPUT register" bitfld.long 0xF8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D22,ALT2;EIM_EB1" line.long 0xFC "IPU1_IPP_IND_SENS1_DATA_11_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_11_SELECT_INPUT register" bitfld.long 0xFC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D21,ALT2;EIM_EB0" line.long 0x100 "IPU1_IPP_IND_SENS1_DATA_12_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_12_SELECT_INPUT register" bitfld.long 0x100 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A17,ALT3;EIM_D28" line.long 0x104 "IPU1_IPP_IND_SENS1_DATA_13_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_13_SELECT_INPUT register" bitfld.long 0x104 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A18,ALT3;EIM_D27" line.long 0x108 "IPU1_IPP_IND_SENS1_DATA_14_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_14_SELECT_INPUT register" bitfld.long 0x108 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A19,ALT3;EIM_D26" line.long 0x10C "IPU1_IPP_IND_SENS1_DATA_15_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_15_SELECT_INPUT register" bitfld.long 0x10C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A20,ALT3;EIM_D20" line.long 0x110 "IPU1_IPP_IND_SENS1_DATA_16_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_16_SELECT_INPUT register" bitfld.long 0x110 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A21,ALT3;EIM_D19" line.long 0x114 "IPU1_IPP_IND_SENS1_DATA_17_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_17_SELECT_INPUT register" bitfld.long 0x114 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A22,ALT3;EIM_D18" line.long 0x118 "IPU1_IPP_IND_SENS1_DATA_18_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_18_SELECT_INPUT register" bitfld.long 0x118 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A23,ALT3;EIM_D16" line.long 0x11C "IPU1_IPP_IND_SENS1_DATA_19_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_19_SELECT_INPUT register" bitfld.long 0x11C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A24,ALT3;EIM_EB2" line.long 0x120 "IPU1_IPP_IND_SENS1_DATA_EN_SELECT_INPUT,IPU1_IPP_IND_SENS1_DATA_EN_SELECT_INPUT register" bitfld.long 0x120 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D23,ALT2;EIM_DA10" line.long 0x124 "IPU1_IPP_IND_SENS1_HSYNC_SELECT_INPUT,IPU1_IPP_IND_SENS1_HSYNC_SELECT_INPUT register" bitfld.long 0x124 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_DA11,ALT4;EIM_EB3" line.long 0x128 "IPU1_IPP_IND_SENS1_PIX_CLK_SELECT_INPUT,IPU1_IPP_IND_SENS1_PIX_CLK_SELECT_INPUT register" bitfld.long 0x128 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_A16,ALT3;EIM_D17" line.long 0x12C "IPU1_IPP_IND_SENS1_VSYNC_SELECT_INPUT,IPU1_IPP_IND_SENS1_VSYNC_SELECT_INPUT register" bitfld.long 0x12C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D29,ALT2;EIM_DA12" line.long 0x130 "KPP_IPP_IND_COL_5_SELECT_INPUT,KPP_IPP_IND_COL_5_SELECT_INPUT register" bitfld.long 0x130 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT4,ALT2;GPIO_0,ALT0;GPIO_19,ALT2;SD2_CLK" line.long 0x134 "KPP_IPP_IND_COL_6_SELECT_INPUT,KPP_IPP_IND_COL_6_SELECT_INPUT register" bitfld.long 0x134 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT6,ALT2;GPIO_9,ALT2;SD2_DAT3,?..." line.long 0x138 "KPP_IPP_IND_COL_7_SELECT_INPUT,KPP_IPP_IND_COL_7_SELECT_INPUT register" bitfld.long 0x138 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT8,ALT2;GPIO_4,ALT4;SD2_DAT1,?..." line.long 0x13C "KPP_IPP_IND_ROW_5_SELECT_INPUT,KPP_IPP_IND_ROW_5_SELECT_INPUT register" bitfld.long 0x13C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT5,ALT2;GPIO_1,ALT2;SD2_CMD,?..." line.long 0x140 "KPP_IPP_IND_ROW_6_SELECT_INPUT,KPP_IPP_IND_ROW_6_SELECT_INPUT register" bitfld.long 0x140 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT7,ALT2;GPIO_2,ALT4;SD2_DAT2,?..." line.long 0x144 "KPP_IPP_IND_ROW_7_SELECT_INPUT,KPP_IPP_IND_ROW_7_SELECT_INPUT register" bitfld.long 0x144 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT9,ALT2;GPIO_5,ALT4;SD2_DAT0,?..." line.long 0x148 "LCDIF_LCDIF_BUSY_SELECT_INPUT,LCDIF_LCDIF_BUSY_SELECT_INPUT register" bitfld.long 0x148 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;DI0_PIN2,ALT1;DI0_PIN4" line.long 0x14C "MLB_MLB_CLK_IN_SELECT_INPUT,MLB_MLB_CLK_IN_SELECT_INPUT register" bitfld.long 0x14C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_TXD1,ALT7;GPIO_3" line.long 0x150 "MLB_MLB_DATA_IN_SELECT_INPUT,MLB_MLB_DATA_IN_SELECT_INPUT register" bitfld.long 0x150 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_MDC,ALT7;GPIO_2" line.long 0x154 "MLB_MLB_SIG_IN_SELECT_INPUT,MLB_MLB_SIG_IN_SELECT_INPUT register" bitfld.long 0x154 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_RXD1,ALT7;GPIO_6" line.long 0x158 "SDMA_EVENTS_14_SELECT_INPUT,SDMA_EVENTS_14_SELECT_INPUT register" bitfld.long 0x158 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT16,ALT3;GPIO_17" line.long 0x15C "SDMA_EVENTS_15_SELECT_INPUT,SDMA_EVENTS_15_SELECT_INPUT register" bitfld.long 0x15C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT17,ALT3;GPIO_18" line.long 0x160 "SPDIF_SPDIF_IN1_SELECT_INPUT,SPDIF_SPDIF_IN1_SELECT_INPUT register" bitfld.long 0x160 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT7;EIM_D21,ALT3;ENET_RX_ER,ALT4;GPIO_16,ALT6;KEY_COL3" line.long 0x164 "SPDIF_TX_CLK2_SELECT_INPUT,SPDIF_TX_CLK2_SELECT_INPUT register" bitfld.long 0x164 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;ENET_CRS_DV,ALT2;RGMII_TXC" line.long 0x168 "UART1_IPP_UART_RTS_B_SELECT_INPUT,UART1_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x168 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D19,ALT4;EIM_D20,ALT1;SD3_DAT0,ALT1;SD3_DAT1" line.long 0x16C "UART1_IPP_UART_RXD_MUX_SELECT_INPUT,UART1_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x16C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT10,ALT3;CSI0_DAT11,ALT1;SD3_DAT6,ALT1;SD3_DAT7" line.long 0x170 "UART2_IPP_UART_RTS_B_SELECT_INPUT,UART2_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x170 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D28,ALT4;EIM_D29,ALT1;SD3_CLK,ALT1;SD3_CMD,ALT2;SD4_DAT5,ALT2;SD4_DAT6,?..." line.long 0x174 "UART2_IPP_UART_RXD_MUX_SELECT_INPUT,UART2_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x174 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D26,ALT4;EIM_D27,ALT4;GPIO_7,ALT4;GPIO_8,ALT1;SD3_DAT4,ALT1;SD3_DAT5,ALT2;SD4_DAT4,ALT2;SD4_DAT7" line.long 0x178 "UART3_IPP_UART_RTS_B_SELECT_INPUT,UART3_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x178 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_D23,ALT4;EIM_D30,ALT4;EIM_D31,ALT2;EIM_EB3,ALT1;SD3_DAT3,ALT1;SD3_RST,?..." line.long 0x17C "UART3_IPP_UART_RXD_MUX_SELECT_INPUT,UART3_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x17C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_D24,ALT2;EIM_D25,ALT2;SD4_CLK,ALT2;SD4_CMD" line.long 0x180 "UART4_IPP_UART_RTS_B_SELECT_INPUT,UART4_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x180 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT16,ALT3;CSI0_DAT17" line.long 0x184 "UART4_IPP_UART_RXD_MUX_SELECT_INPUT,UART4_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x184 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT12,ALT3;CSI0_DAT13,ALT4;KEY_COL0,ALT4;KEY_ROW0" line.long 0x188 "UART5_IPP_UART_RTS_B_SELECT_INPUT,UART5_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x188 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT18,ALT3;CSI0_DAT19,ALT4;KEY_COL4,ALT4;KEY_ROW4" line.long 0x18C "UART5_IPP_UART_RXD_MUX_SELECT_INPUT,UART5_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x18C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT14,ALT3;CSI0_DAT15,ALT4;KEY_COL1,ALT4;KEY_ROW1" line.long 0x190 "USB_IPP_IND_OTG_OC_SELECT_INPUT,USB_IPP_IND_OTG_OC_SELECT_INPUT register" bitfld.long 0x190 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D21,ALT2;KEY_COL4" line.long 0x194 "USB_IPP_IND_H1_OC_SELECT_INPUT,USB_IPP_IND_UH1_OC_SELECT_INPUT register" bitfld.long 0x194 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D30,ALT6;GPIO_3" line.long 0x198 "USDHC1_IPP_CARD_CLK_IN_SELECT_INPUT,USDHC1_IPP_CARD_CLK_IN_SELECT_INPUT register" bitfld.long 0x198 0. " DAISY ,Pads Involved in Daisy Chain" "ALT8;NANDF_CS1,ALT0;SD1_CLK" line.long 0x19C "USDHC1_IPP_WP_ON_SELECT_INPUT,USDHC1_IPP_WP_ON_SELECT_INPUT register" bitfld.long 0x19C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DI0_PIN4,ALT6;GPIO_9" line.long 0x1A0 "USDHC2_IPP_CARD_CLK_IN_SELECT_INPUT,USDHC2_IPP_CARD_CLK_IN_SELECT_INPUT register" bitfld.long 0x1A0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;NANDF_CS3,ALT6;SD2_CLK" line.long 0x1A4 "USDHC3_IPP_CARD_CLK_IN_SELECT_INPUT,USDHC3_IPP_CARD_CLK_IN_SELECT_INPUT register" bitfld.long 0x1A4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT8;NANDF_ALE,ALT0;SD3_CLK" line.long 0x1A8 "USDHC4_IPP_CARD_CLK_IN_SELECT_INPUT,USDHC4_IPP_CARD_CLK_IN_SELECT_INPUT register" bitfld.long 0x1A8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT8;NANDF_RB0,ALT0;SD4_CLK" tree.end width 0x0B else width 6. tree "General Purpose Registers" group.long 0x00++0x13 line.long 0x00 "GPR0,General Purpose Register 0" bitfld.long 0x00 30.--31. " CLOCK_8_MUX_SEL ,Source of asrck_clock_8 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p7 muxed with ssi3.ssi_srck,Audmux.amx_output_rxclk_p7,Ssi3.ssi_srck,Ssi3.rx_bit_clk" textline " " bitfld.long 0x00 28.--29. " CLOCK_0_MUX_SEL ,Source of asrck_clock_0 in ASRC according to clock muxing scheme" "Esai1.ipp_ind_sckr muxed with esai1.ipp_do_sckr,Esai1.ipp_ind_sckr,Esai1.ipp_do_sckr,?..." textline " " bitfld.long 0x00 26.--27. " CLOCK_B_MUX_SEL ,Source of asrck_clock_b in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p7 muxed with ssi3.ssi_stck,Audmux.amx_output_txclk_p7,Ssi3.ssi_stck,Ssi3.tx_bit_clk" textline " " bitfld.long 0x00 24.--25. " CLOCK_3_MUX_SEL ,Source of asrck_clock_3 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p7 muxed with ssi3.ssi_srck,Audmux.amx_output_rxclk_p7,Ssi3.ssi_srck,Ssi3.rx_bit_clk" textline " " bitfld.long 0x00 22.--23. " CLOCK_A_MUX_SEL ,Source of asrck_clock_a in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p2 muxed with ssi2.ssi_stck,Audmux.amx_output_txclk_p2,Ssi2.ssi_stck,Ssi2.tx_bit_clk" textline " " bitfld.long 0x00 20.--21. " CLOCK_2_MUX_SEL ,Source of asrck_clock_2 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p2 muxed with ssi2.ssi_srck,Audmux.amx_output_rxclk_p2,Ssi2.ssi_srck,Ssi2.rx_bit_clk" textline " " bitfld.long 0x00 18.--19. " CLOCK_9_MUX_SEL ,Source of asrck_clock_9 in ASRC according to clock muxing scheme" "Audmux.amx_output_txclk_p1 muxed with ssi1.ssi_stck,Audmux.amx_output_txclk_p1,Ssi1.ssi_stck,Ssi1.tx_bit_clk" textline " " bitfld.long 0x00 16.--17. " CLOCK_1_MUX_SEL ,Source of asrck_clock_1 in ASRC according to clock muxing scheme" "Audmux.amx_output_rxclk_p1 muxed with ssi1.ssi_srck,Audmux.amx_output_rxclk_p1,Ssi1.ssi_srck,Ssi1.rx_bit_clk" textline " " bitfld.long 0x00 14.--15. " TX_CLK2_MUX_SEL ,Source of tx_clk2 in SPDIF according to ASRC clock muxing scheme" "Same as for asrc.asrck_clock_1,Same as for asrc.asrck_clock_2,Same as for asrc.asrck_clock_3,?..." textline " " bitfld.long 0x00 8.--13. " AUDIO_VIDEO_MUXING ,Audio Video muxing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 7. " DMAREQ_MUX_SEL7 ,Sources for SDMA_EVENT[14]" "Spdif.drq0_spdif_b,Iomux.sdma_ext_events[1]" textline " " bitfld.long 0x00 6. " DMAREQ_MUX_SEL6 ,Sources for SDMA_EVENT[23]" "Esai.,I2c3.ipi_int_b" textline " " bitfld.long 0x00 5. " DMAREQ_MUX_SEL5 ,Sources for SDMA_EVENT[9]" "Ecspi4.ipd_req_cspi_rdma_b,Epit2.ipi_int_epit_oc" textline " " bitfld.long 0x00 4. " DMAREQ_MUX_SEL4 ,Sources for SDMA_EVENT[10]" "Ecspi4.ipd_req_cspi_tdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 3. " DMAREQ_MUX_SEL3 ,Sources for SDMA_EVENT[5]" "Ecspi2.ipd_req_cspi_rdma_b,I2c1.ipi_int_b" textline " " bitfld.long 0x00 2. " DMAREQ_MUX_SEL2 ,Sources for SDMA_EVENT[4]" "Ecspi1.ipd_req_cspi_tdma_b,I2c2.ipi_int_b" textline " " bitfld.long 0x00 1. " DMAREQ_MUX_SEL1 ,Sources for SDMA_EVENT[3]" "Ecspi1.ipd_req_cspi_rdma_b,I2c3.ipi_int_b" textline " " bitfld.long 0x00 0. " DMAREQ_MUX_SEL0 ,Sources for SDMA_EVENT[2]" "Ipu1.,Iomux.sdma_events[0]" textline " " line.long 0x04 "GPR1,General Purpose Register 1" bitfld.long 0x04 31. " CFG_L1_CLK_REMOVAL_EN ,Enable the reference clock removal in L1 state" "Disabled,Enabled" bitfld.long 0x04 30. " APP_CLK_REQ_N ,Application logic is ready to have reference clock removed" "Not ready,Ready" bitfld.long 0x04 28. " APP_REQ_EXIT_L1 ,PCIe application request to exit L1" "Not requested,Requested" textline " " bitfld.long 0x04 27. " APP_READY_ENTR_L23 ,PCIe application ready to enter L23" "Not ready,Ready" bitfld.long 0x04 26. " APP_REQ_ENTR_L1 ,PCIe application request to enter L1" "Not requested,Requested" bitfld.long 0x04 25. " MIPI_COLOR_SW ,MIPI color switch control" "Not requested,Requested" textline " " bitfld.long 0x04 24. " MIPI_DPI_OFF ,MIPI DPI shutdown request" "Not requested,Requested" bitfld.long 0x04 22. " EXC_MON ,Exclusive monitor response select of illegal command" "OKEY,SLVError" bitfld.long 0x04 21. " ENET_CLK_SEL ,ENET TX reference clock" "Pad,Internal" textline " " bitfld.long 0x04 20. " MIPI_IPU2_MUX ,MIPI sensor to IPU-2 mux control" "Gasket,IOMUX" bitfld.long 0x04 19. " MIPI_IPU1_MUX ,MIPI sensor to IPU-1 mux control" "Gasket,IOMUX" bitfld.long 0x04 18. " PCIE_TEST_PD ,PCIe test power down control" "Not requested,Requested" textline " " bitfld.long 0x04 17. " IPU_VPU_MUX ,PU-1/IPU-2 to VPU signals control" "IPU-1,IPU-2" bitfld.long 0x04 16. " PCIE_REF_CLK_EN ,PCIe PHY reference clock enable" "Disabled,Enabled" bitfld.long 0x04 15. " USB_EXP_MODE ,USB Exposure mode" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SYS_INT ,PCIe system interrupt request" "Not asserted,Asserted" bitfld.long 0x04 13. " USB_OTG_ID_SEL ,USB_OTG_ID pin iomux select control" "ENET_RX_ER,GPIO_1" bitfld.long 0x04 12. " GINT ,Global interrupt 0 bit" "Not asserted,Asserted" textline " " bitfld.long 0x04 10.--11. " ADDRS3 ,Address Space 3" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 9. " ACT_CS3 ,Active Chip 3" "Not activated,Activated" bitfld.long 0x04 7.--8. " ADDRS2 ,Address Space 2" "32-MBytes,64-MBytes,128-MBytes,?..." textline " " bitfld.long 0x04 6. " ACT_CS2 ,Active Chip 2" "Not activated,Activated" bitfld.long 0x04 4.--5. " ADDRS1 ,Address Space 1" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 3. " ACT_CS1 ,Active Chip 1" "Not activated,Activated" textline " " bitfld.long 0x04 1.--2. " ADDRS0 ,Address Space 0" "32-MBytes,64-MBytes,128-MBytes,?..." bitfld.long 0x04 0. " ACT_CS0 ,Active Chip 0" "Not activated,Activated" line.long 0x08 "GPR2,General Purpose Register 2" bitfld.long 0x08 20.--21. " COUNTER_RESET_VAL[1:0] ,Reset value for the LDB counter" "5,3,4,6" bitfld.long 0x08 16.--18. " LVDS_CLK_SHIFT[2:0] ,Shifts the LVDS output clock" "1100011,1110001,1111000,1000111,0001111,0011111,0111100,1100011" bitfld.long 0x08 10. " DI1_VS_POLARITY ,Vsync polarity for IPU's DI1 interface" "High,Low" textline " " bitfld.long 0x08 9. " DI0_VS_POLARITY ,Vsync polarity for IPU's DI0 interface" "High,Low" bitfld.long 0x08 8. " BIT_MAPPING_CH1 ,Data mapping for LVDS channel 1" "SPWG,JEIDA" bitfld.long 0x08 7. " DATA_WIDTH_CH1 ,Data width for LVDS channel 1" "18-bits,24-bits" textline " " bitfld.long 0x08 6. " BIT_MAPPING_CH0 ,Data mapping for LVDS channel 0" "SPWG,JEIDA" bitfld.long 0x08 5. " DATA_WIDTH_CH0 ,Data width for LVDS channel 0" "18-bits,24-bits" bitfld.long 0x08 4. " SPLIT_MODE_EN ,Split mode" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " CH1_MODE[10] ,LVDS channel 1 operation mode" "Disabled,Enabled/DI0,Disabled,Enabled/DI1" bitfld.long 0x08 0.--1. " CH0_MODE[10] ,LVDS channel 0 operation mode" "Disabled,Enabled/DI0,Disabled,Enabled/DI1" line.long 0x0C "GPR3,General Purpose Register 3" bitfld.long 0x0C 29.--30. " GPU_DBG ,GPU debug busses to IOMUX" "GPU3D,GPU2D,OpenVG,?..." bitfld.long 0x0C 28. " BCH_WR_CACHE_CTL ,Control BCH block cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x0C 27. " BCH_RD_CACHE_CTL ,Control BCH block cacheable attribute of AXI read transactions" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " USDHCX_WR_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI write transactions" "Disabled,Enabled" bitfld.long 0x0C 25. " USDHCX_RD_CACHE_CTL ,Control uSDHCx [1-4] blocks cacheable attribute of AXI read transactions" "Disabled,Enabled" bitfld.long 0x0C 24. " OCRAM_CTL[24] ,Write address pipeline control bit" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " OCRAM_CTL[23] ,Write data pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 22. " OCRAM_CTL[22] ,Read address pipeline control bit" "Disabled,Enabled" bitfld.long 0x0C 21. " OCRAM_CTL[21] ,Read data wait state control bit" "Disabled,Enabled" textline " " rbitfld.long 0x0C 20. " OCRAM_STATUS[20] ,Shows the read data pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 19. " OCRAM_STATUS[19] ,Shows the read address pipeline status" "Configuration valid,Control bit changed" rbitfld.long 0x0C 18. " OCRAM_STATUS[18] ,Shows the write data pipeline status" "Configuration valid,Control bit changed" textline " " rbitfld.long 0x0C 17. " OCRAM_STATUS[17] ,Shows the write address pipeline status" "Configuration valid,Control bit changed" bitfld.long 0x0C 16. " CORE3_DBG_ACK_EN ,Mask control of Core 3 debug acknowledge to global debug acknowledge" "Not masked,Masked" bitfld.long 0x0C 15. " CORE2_DBG_ACK_EN ,Mask control of Core 2 debug acknowledge to global debug acknowledge" "Not masked,Masked" textline " " bitfld.long 0x0C 14. " CORE1_DBG_ACK_EN ,Mask control of Core 1 debug acknowledge to global debug acknowledge" "Not masked,Masked" bitfld.long 0x0C 13. " CORE0_DBG_ACK_EN ,Mask control of Core 0 debug acknowledge to global debug acknowledge" "Not masked,Masked" bitfld.long 0x0C 12. " TZASC2_BOOT_LOCK ,TZASC-2 secure boot lock" "Not locked,Locked" textline " " bitfld.long 0x0C 11. " TZASC1_BOOT_LOCK ,TZASC-1 secure boot lock" "Not locked,Locked" bitfld.long 0x0C 10. " IPU_DIAG ,IPU diagnostic debug bus mux" "IPU1,IPU2" bitfld.long 0x0C 8.--9. " LVDS1_MUX_CTL ,LVDS1 MUX control" "IPU1 DI0,IPU1 DI1,IPU2 DI0,IPU2 DI1" textline " " bitfld.long 0x0C 6.--7. " LVDS0_MUX_CTL ,LVDS0 MUX control" "IPU1 DI0,IPU1 DI1,IPU2 DI0,IPU2 DI1" bitfld.long 0x0C 4.--5. " MIPI_MUX_CTL ,MIPI MUX control" "IPU1 DI0,IPU1 DI1,IPU2 DI0,IPU2 DI1" bitfld.long 0x0C 2.--3. " HDMI_MUX_CTL ,HDMI MUX control" "IPU1 DI0,IPU1 DI1,IPU2 DI0,IPU2 DI1" line.long 0x10 "GPR4,General Purpose Register 4" bitfld.long 0x10 31. " VDOA_WR_CACHE_SEL ,Cacheable attribute of VDOA AXI write transcations" "VDOA core,VDOA_WR_CACHE_VAL" bitfld.long 0x10 30. " VDOA_RD_CACHE_SEL ,Cacheable attribute of VDOA AXI read transcations" "VDOA core,VDOA_RD_CACHE_VAL" bitfld.long 0x10 29. " VDOA_WR_CACHE_VAL ,VDOA block cacheable attribute value of AXI write transactions" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " VDOA_RD_CACHE_VAL ,VDOA block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 27. " PCIe_WR_CACHE_SEL ,Cacheable attribute of PCIe AXI write transcations" "PCIe core,PCIe_WR_CACHE_VAL" bitfld.long 0x10 26. " PCIe_RD_CACHE_SEL ,Cacheable attribute of PCIe AXI read transcations" "PCIe core,PCIe_RD_CACHE_VAL" textline " " bitfld.long 0x10 25. " PCIe_WR_CACHE_VAL ,PCIe block cacheable attribute value of AXI write transactions" "Disabled,Enabled" bitfld.long 0x10 24. " PCIe_RD_CACHE_VAL ,PCIe block cacheable attribute value of AXI read transactions" "Disabled,Enabled" rbitfld.long 0x10 19. " SDMA_STOP_ACK ,SDMA stop acknowledge" "Not asserted,Asserted" textline " " rbitfld.long 0x10 18. " CAN2_STOP_ACK ,CAN-2 stop acknowledge" "Not asserted,Asserted" rbitfld.long 0x10 17. " CAN1_STOP_ACK ,CAN-1 stop acknowledge" "Not asserted,Asserted" rbitfld.long 0x10 16. " ENET_STOP_ACK ,ENET stop acknowledge" "Not asserted,Asserted" textline " " hexmask.long.byte 0x10 8.--15. 1. " SOC_VERSION ,SOC version" bitfld.long 0x10 7. " VPU_WR_CACHE_SEL ,Cacheable attribute of VPU AXI write transcations" "VPU core,VPU_SEC_WR_CACHE_VAL" bitfld.long 0x10 6. " VPU_RD_CACHE_SEL ,Cacheable attribute of VPU AXI read transcations" "VPU core,VPU_SEC_RD_CACHE_VAL" textline " " bitfld.long 0x10 3. " VPU_P_WR_CACHE_VAL ,VPU (primary bus) block cacheable attribute value of AXI write transactions" "Disabled,Enabled" bitfld.long 0x10 2. " VPU_P_RD_CACHE_VAL ,VPU (primary bus) block cacheable attribute value of AXI read transactions" "Disabled,Enabled" bitfld.long 0x10 1. " IPU_WR_CACHE_CTL ,Control IPU-1 and IPU-2 block cacheable attribute of AXI write transactions" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " IPU_RD_CACHE_CTL ,Control IPU-1 and IPU-2 block cacheable attribute of AXI read transactions" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "GPR5,General Purpose Register 5" bitfld.long 0x00 8. " L2_CLK_STOP ,L2 cache clock stop indication" "Not stopped,Stopped" bitfld.long 0x00 7. " ARM_WFE[3] ,Indicates whether Core 3 is in WFE (Wait for Event) mode" "Not in WFE,WFE" bitfld.long 0x00 6. " ARM_WFE[2] ,Indicates whether Core 2 is in WFE (Wait for Event) mode" "Not in WFE,WFE" textline " " bitfld.long 0x00 5. " ARM_WFE[1] ,Indicates whether Core 1 is in WFE (Wait for Event) mode" "Not in WFE,WFE" bitfld.long 0x00 4. " ARM_WFE[0] ,Indicates whether Core 0 is in WFE (Wait for Event) mode" "Not in WFE,WFE" bitfld.long 0x00 3. " ARM_WFI[3] ,Indicates whether Core 3 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" textline " " bitfld.long 0x00 2. " ARM_WFI[2] ,Indicates whether Core 2 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" bitfld.long 0x00 1. " ARM_WFI[1] ,Indicates whether Core 1 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" bitfld.long 0x00 0. " ARM_WFI[0] ,Indicates whether Core 0 is in WFI (Wait for Interrupt) mode" "Not in WFI,WFI" group.long 0x18++0x0B line.long 0x00 "GPR6,General Purpose Register 6" hexmask.long.word 0x00 16.--31. 1. " IPU1_RD_QoS ,IPU-1 RD QoS gasket config" hexmask.long.word 0x00 0.--15. 1. " IPU1_WR_QoS ,IPU-1 WR QoS gasket config" line.long 0x04 "GPR7,General Purpose Register 7" hexmask.long.word 0x04 16.--31. 1. " IPU2_RD_QoS ,IPU-2 RD QoS gasket config" hexmask.long.word 0x04 0.--15. 1. " IPU2_WR_QoS ,IPU-2 WR QoS gasket config" line.long 0x08 "GPR8,General Purpose Register 8" hexmask.long.byte 0x08 25.--31. 1. " PCS_TX_SWING_LOW ,PCIe_TX_SWING_LOW" hexmask.long.byte 0x08 18.--24. 1. " PCS_TX_SWING_FULL ,PCIe_TX_SWING_FULL" bitfld.long 0x08 12.--17. " PCS_TX_DEEMMPH_GEN2_6DB ,PCS_TX_DEEMMPH_GEN2_6DB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 6.--11. " PCS_TX_DEEMPH_GEN2_3P5DB ,PCS_TX_DEEMPH_GEN2_3P5DB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " PCS_TX_DEEMPH_GEN1 ,PCS_TX_DEEMPH_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x24++0x03 line.long 0x00 "GPR9,General Purpose Register 9" bitfld.long 0x00 1. " TZASC2_BYP ,TZASC-2 bypass/transaction check" "Byppased/not checked,Not byppased/checked" bitfld.long 0x00 0. " TZASC2_BYP ,TZASC-1 bypass/transaction check" "Byppased/not checked,Not byppased/checked" group.long 0x28++0x03 line.long 0x00 "GPR10,General Purpose Register 10" bitfld.long 0x00 29. " LOCK_DBG_EN ,DBG_EN field lock" "Not locked,Locked" bitfld.long 0x00 28. " LOCK_DBG_CLK_EN ,DBG_CLK_EN field lock" "Not locked,Locked" bitfld.long 0x00 27. " LOCK_SEC_ERR_RESP ,SEC_ERR_RESP field lock" "Not locked,Locked" textline " " bitfld.long 0x00 26. " LOCK_OCRAM_TZ_ADDR[5] ,OCRAM_TZ_ADDR[5] field lock" "Not locked,Locked" bitfld.long 0x00 25. " LOCK_OCRAM_TZ_ADDR[4] ,OCRAM_TZ_ADDR[4] field lock" "Not locked,Locked" bitfld.long 0x00 24. " LOCK_OCRAM_TZ_ADDR[3] ,OCRAM_TZ_ADDR[3] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCK_OCRAM_TZ_ADDR[2] ,OCRAM_TZ_ADDR[2] field lock" "Not locked,Locked" bitfld.long 0x00 22. " LOCK_OCRAM_TZ_ADDR[1] ,OCRAM_TZ_ADDR[1] field lock" "Not locked,Locked" bitfld.long 0x00 21. " LOCK_OCRAM_TZ_ADDR[0] ,OCRAM_TZ_ADDR[0] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 20. " LOCK_OCRAM_TZ_EN ,OCRAM_TZ_EN field lock" "Not locked,Locked" bitfld.long 0x00 19. " LOCK_DCIC2_MUX_CTL[1] ,DCIC2_MUX_CTL[1] field lock" "Not locked,Locked" bitfld.long 0x00 18. " LOCK_DCIC2_MUX_CTL[0] ,DCIC2_MUX_CTL[0] field lock" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCK_DCIC1_MUX_CTL[1] ,DCIC1_MUX_CTL[1] field lock" "Not locked,Locked" bitfld.long 0x00 16. " LOCK_DCIC1_MUX_CTL[0] ,DCIC1_MUX_CTL[0] field lock" "Not locked,Locked" bitfld.long 0x00 13. " DBG_EN ,ARM non secure debug enabl" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DBG_CLK_EN ,ARM Debug clock enable" "Disabled,Enabled" bitfld.long 0x00 11. " SEC_ERR_RESP ,Security error response enable" "OKEY,SLVError" bitfld.long 0x00 5.--10. " OCRAM_TZ_ADDR ,OCRAM TrustZone start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 4. " OCRAM_TZ_EN ,OCRAM TrustZone enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " DCIC2_MUX_CTL ,DCIC-2 MUX control" "IPU0 DI1 port,LVDS0,LVDS1,MIPI DPI" bitfld.long 0x00 0.--1. " DCIC1_MUX_CTL ,DCIC-1 MUX control" "IPU0/1 DI0 port,LVDS0,LVDS1,HDMI" group.long 0x30++0x7 line.long 0x00 "GPR12,General Purpose Register 12" bitfld.long 0x00 27. " ARMP_IPG_CLK_EN ,ARM platform IPG clock enable" "Disabled,Enabled" bitfld.long 0x00 26. " ARMP_AHB_CLK_EN ,ARM platform AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 25. " ARMP_ATB_CLK_EN ,ARM platform ATB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ARMP_APB_CLK_EN ,ARM platform APB clock enable" "Disabled,Enabled" bitfld.long 0x00 21.--23. " PCIE_CTL_7 ,PCIe control of diagnostic bus select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17.--20. " DIA_STATUS_BUS_SELECT ,PCIe control of diag_bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16. " APPS_PM_ XMT_TURNOFF ,PCIe control (RC mode only)" "0,1" bitfld.long 0x00 12.--15. " DEVICE_TYPE ,Device/Port Type" "EP Mode,,RC Mode,?..." bitfld.long 0x00 11. " APP_INIT_RST ,Hot Reset to the downstream device" "No reset,Reset" textline " " bitfld.long 0x00 10. " APP_LTSSM_ENABLE ,PCIe control - application signal to enable the LTSSM" "Not ready,Ready" bitfld.long 0x00 9. " APPS_PM_XMT_PME ,Wake Up" "No wakeup,Wakeup" bitfld.long 0x00 4.--8. " LOS_LEVEL ,Loss-of-Signal Detector Sensitivity Level Control Function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 2.--3. " uSDHC_DBG_MUX ,uSDHC debug mux control" "uSDHC1,uSDHC2,uSDHC3,uSDHC4" line.long 0x04 "GPR13,General Purpose Register 13" bitfld.long 0x04 30. " SDMA_STOP_REQ ,SDMA stop request" "Not requested,Requested" bitfld.long 0x04 29. " CAN2_STOP_REQ ,CAN2 stop request" "Not requested,Requested" bitfld.long 0x04 28. " CAN1_STOP_REQ ,CAN1 stop request" "Not requested,Requested" textline " " bitfld.long 0x04 27. " ENET_STOP_REQ ,ENET stop request" "Not requested,Requested" bitfld.long 0x04 24.--26. " SATA_PHY_8 ,Receiver Equalization control" "0.5 dB,1.0 dB,1.5 dB,2.0 dB,2.5 dB,3.0 dB,3.5 dB,4.0 dB" bitfld.long 0x04 19.--23. " SATA_PHY_7 ,Loss of signal detector level" ",,,,,,,,,,,,,,,,SATA1i/SATA1m,,SATA2i/SATA2m,,,,,,,,SATA1x/SATA2x,?..." textline " " bitfld.long 0x04 16.--18. " SATA_PHY_6 ,PHUG/FRUG/fast_startup/Freq. tolerance(ppm)" "1/1/none/780,2/2/none/780,1/4/none/6.250,2/4/none/6.250,?..." bitfld.long 0x04 15. " SATA_SPEED ,SATA PHY speed mode" "1.5 GHz,3.0 GHz" bitfld.long 0x04 14. " SATA_PHY_5 ,Spread Spectrum Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11.--13. " SATA_PHY_4 ,Transmit Attenuation control" "16/16,14/16,12/16,10/16,9/16,8/16,?..." bitfld.long 0x04 7.--10. " SATA_PHY_3 ,Transmit Boost Control" "0 dB,0.37 dB,0.74 dB,1.11 dB,1.48 dB,1.85 dB,2.22 dB,2.59 dB,2.96 dB,3.33 dB,3.70 dB,4.07 dB,4.44 dB,4.81 dB,5.28 dB,5.75 dB" bitfld.long 0x04 2.--6. " SATA_PHY_2 ,Transmit level settings" "0.937 V,0.947 V,0.957 V,0.966 V,0.976 V,0.986 V,0.996 V,1.005 V,1.015 V,1.025 V,1.035 V,1.045 V,1.054 V,1.064 V,1.074 V,1.084 V,1.094 V,1.104 V,1.113 V,1.123 V,1.133 V,1.143 V,1.152 V,1.162 V,1.172 V,1.182 V,1.191 V,1.201 V,1.211 V,1.221 V,1.230 V,1.240 V" textline " " bitfld.long 0x04 1. " SATA_PHY_1 ,Internal PLL Reference Clock Enable" "Disabled,Enabled" bitfld.long 0x04 0. " SATA_PHY_0 ,Tx Edge rate control" "Fast edge rate,Medium edge rate" tree.end tree "SW_MUX_CTL_PAD Registers" width 32. group.long 0x4C++0x313 line.long 0x00 "SW_MUX_CTL_PAD_SD2_DAT1,SW_MUX_CTL_PAD_SD2_DAT1 Register" bitfld.long 0x00 4. " SION ,Force input path of pad SD2_DAT1" "Not forced,Forced" bitfld.long 0x00 0.--2. " MUX_MODE ,SD2_DAT1 MUX Mode" "usdhc2;DAT1,ecspi5;SS0,EIM;EIM_CS[2],audmux;AUD4_TXFS,kpp;COL[7],gpio1;GPIO[14],?..." line.long 0x04 "SW_MUX_CTL_PAD_SD2_DAT2,SW_MUX_CTL_PAD_SD2_DAT2 register" bitfld.long 0x04 4. " SION ,Force input path of pad SD2_DAT2" "Not forced,Forced" bitfld.long 0x04 0.--2. " MUX_MODE ,SD2_DAT2 MUX Mode" "usdhc2;DAT2,ecspi5;SS1,EIM;EIM_CS[3],audmux;AUD4_TXD,kpp;ROW[6],gpio1;GPIO[13],?..." line.long 0x08 "SW_MUX_CTL_PAD_SD2_DAT0,SW_MUX_CTL_PAD_SD2_DAT0 register" bitfld.long 0x08 4. " SION ,Force input path of pad SD2_DAT0" "Not forced,Forced" bitfld.long 0x08 0.--2. " MUX_MODE ,SD2_DAT0 MUX Mode" "usdhc2;DAT0,ecspi5;MISO,,audmux;AUD4_RXD,kpp;ROW[7],gpio1;GPIO[15],dcic2;DCIC_OUT,?..." line.long 0x0C "SW_MUX_CTL_PAD_RGMII_TXC,IOMUXC_SW_MUX_CTL_PAD_RGMII_TXC register" bitfld.long 0x0C 4. " SION ,Force input path of pad RGMII_TXC" "Not forced,Forced" bitfld.long 0x0C 0.--2. " MUX_MODE ,RGMII_TXC MUX Mode" "usboh3;H2_DATA,enet;RGMII_TXC,spdif;SPDIF_EXTCLK,,,gpio6;GPIO[19],,XTALOSC_REF_CLK_24M" line.long 0x10 "SW_MUX_CTL_PAD_RGMII_TD0,SW_MUX_CTL_PAD_RGMII_TD0 register" bitfld.long 0x10 4. " SION ,Force input path of pad RGMII_TD0" "Not forced,Forced" bitfld.long 0x10 0.--2. " MUX_MODE ,RGMII_TD0 MUX Mode" "mipi_hsi_ctrl;TX_READY,enet;RGMII_TD0,,,,gpio6;GPIO[20],?..." line.long 0x14 "SW_MUX_CTL_PAD_RGMII_TD1,SW_MUX_CTL_PAD_RGMII_TD1 register" bitfld.long 0x14 4. " SION ,Force input path of pad RGMII_TD1" "Not forced,Forced" bitfld.long 0x14 0.--2. " MUX_MODE ,RGMII_TD1 MUX Mode" "mipi_hsi_ctrl;RX_FLAG,enet;RGMII_TD1,,,,gpio6;GPIO[21],?..." line.long 0x18 "SW_MUX_CTL_PAD_RGMII_TD2,SW_MUX_CTL_PAD_RGMII_TD2 register" bitfld.long 0x18 4. " SION ,Force input path of pad RGMII_TD2" "Not forced,Forced" bitfld.long 0x18 0.--2. " MUX_MODE ,RGMII_TD2 MUX Mode" "mipi_hsi_ctrl;RX_DATA,enet;RGMII_TD2,,,,gpio6;GPIO[22],?..." line.long 0x1C "SW_MUX_CTL_PAD_RGMII_TD3,SW_MUX_CTL_PAD_RGMII_TD3 register" bitfld.long 0x1C 4. " SION ,Force input path of pad RGMII_TD3" "Not forced,Forced" bitfld.long 0x1C 0.--2. " MUX_MODE ,RGMII_TD3 MUX Mode" "mipi_hsi_ctrl;RX_WAKE,enet;RGMII_TD3,,,,gpio6;GPIO[23],?..." line.long 0x20 "SW_MUX_CTL_PAD_RGMII_RX_CTL,SW_MUX_CTL_PAD_RGMII_RX_CTL register" bitfld.long 0x20 4. " SION ,Force input path of pad RGMII_RX_CTL" "Not forced,Forced" bitfld.long 0x20 0.--2. " MUX_MODE ,RGMII_RX_CTL MUX Mode" "usboh3;H3_DATA,enet;RGMII_RX_CTL,,,,gpio6;GPIO[24],?..." line.long 0x24 "SW_MUX_CTL_PAD_RGMII_RD0,SW_MUX_CTL_PAD_RGMII_RD0 register" bitfld.long 0x24 4. " SION ,Force input path of pad RGMII_RD0" "Not forced,Forced" bitfld.long 0x24 0.--2. " MUX_MODE ,RGMII_RD0 MUX Mode" "mipi_hsi_ctrl;RX_READY,enet;RGMII_RD0,,,,gpio6;GPIO[25],?..." line.long 0x28 "SW_MUX_CTL_PAD_RGMII_TX_CTL,SW_MUX_CTL_PAD_RGMII_TX_CTL register" bitfld.long 0x28 4. " SION ,Force input path of pad RGMII_TX_CTL" "Not forced,Forced" bitfld.long 0x28 0.--2. " MUX_MODE ,RGMII_TX_CTL MUX Mode" "usboh3;H2_STROBE,enet;RGMII_TX_CTL,,,,gpio6;GPIO[26],,enet;ANATOP_ETHERNET_REF_OUT" line.long 0x2C "SW_MUX_CTL_PAD_RGMII_RD1,SW_MUX_CTL_PAD_RGMII_RD1 register" bitfld.long 0x2C 4. " SION ,Force input path of pad RGMII_RD1" "Not forced,Forced" bitfld.long 0x2C 0.--2. " MUX_MODE ,RGMII_RD1 MUX Mode" "mipi_hsi_ctrl;TX_FLAG,enet;RGMII_RD1,,,,gpio6;GPIO[27],?..." line.long 0x30 "SW_MUX_CTL_PAD_RGMII_RD2,SW_MUX_CTL_PAD_RGMII_RD2 register" bitfld.long 0x30 4. " SION ,Force input path of pad RGMII_RD2" "Not forced,Forced" bitfld.long 0x30 0.--2. " MUX_MODE ,RGMII_RD2 MUX Mode" "mipi_hsi_ctrl;TX_DATA,enet;RGMII_RD2,,,,gpio6;GPIO[28],?..." line.long 0x34 "SW_MUX_CTL_PAD_RGMII_RD3,SW_MUX_CTL_PAD_RGMII_RD3 register" bitfld.long 0x34 4. " SION ,Force input path of pad RGMII_RD3" "Not forced,Forced" bitfld.long 0x34 0.--2. " MUX_MODE ,RGMII_RD2 MUX Mode" "mipi_hsi_ctrl;TX_WAKE,enet;RGMII_RD3,,,,gpio6;GPIO[29],?..." line.long 0x38 "SW_MUX_CTL_PAD_RGMII_RXC,SW_MUX_CTL_PAD_RGMII_RXC register" bitfld.long 0x38 4. " SION ,Force input path of pad RGMII_RXC" "Not forced,Forced" bitfld.long 0x38 0.--2. " MUX_MODE ,RGMII_RXC MUX Mode" "usboh3;H3_STROBE,enet;RGMII_RXC,,,,gpio6;GPIO[30],?..." line.long 0x3C "SW_MUX_CTL_PAD_EIM_A25,SW_MUX_CTL_PAD_EIM_A25 register" bitfld.long 0x3C 4. " SION ,Force input path of pad EIM_A25" "Not forced,Forced" bitfld.long 0x3C 0.--2. " MUX_MODE ,EIM_A25 MUX Mode" "EIM;EIM_A[25],ecspi4;SS1,ecspi2;RDY,ipu1;DI1_PIN12,ipu1;DI0_D1_CS,gpio5;GPIO[2],hdmi_tx;CEC_LINE,?..." line.long 0x40 "SW_MUX_CTL_PAD_EIM_EB2,SW_MUX_CTL_PAD_EIM_EB2 register" bitfld.long 0x40 4. " SION ,Force input path of pad EIM_EB2" "Not forced,Forced" bitfld.long 0x40 0.--2. " MUX_MODE ,EIM_EB2 MUX Mode" "EIM;EIM_EB[2],ecspi1;SS0,ccm;DI1_EXT_CLK,ipu2;CSI1_D[19],hdmi_tx;DDC_SCL,gpio2;GPIO[30],i2c2;SCL,src;BT_CFG[30]" line.long 0x44 "SW_MUX_CTL_PAD_EIM_D16,SW_MUX_CTL_PAD_EIM_D16 register" bitfld.long 0x44 4. " SION ,Force input path of pad EIM_D16" "Not forced,Forced" bitfld.long 0x44 0.--2. " MUX_MODE ,EIM_EB2 MUX Mode" "EIM;EIM_D[16],ecspi1;SCLK,ipu1;DI0_PIN5,ipu2;CSI1_D[18],hdmi_tx;DDC_SDA,gpio3;GPIO[16],i2c2;SDA,?..." line.long 0x48 "SW_MUX_CTL_PAD_EIM_D17,SW_MUX_CTL_PAD_EIM_D17 register" bitfld.long 0x48 4. " SION ,Force input path of pad EIM_D17" "Not forced,Forced" bitfld.long 0x48 0.--2. " MUX_MODE ,EIM_D17 MUX Mode" "EIM;EIM_D[17],ecspi1;MISO,ipu1;DI0_PIN6,ipu2;CSI1_PIXCLK,dcic1;DCIC_OUT,gpio3;GPIO[17],i2c3;SCL,?..." line.long 0x4C "SW_MUX_CTL_PAD_EIM_D18,SW_MUX_CTL_PAD_EIM_D18 register" bitfld.long 0x4C 4. " SION ,Force input path of pad EIM_D18" "Not forced,Forced" bitfld.long 0x4C 0.--2. " MUX_MODE ,EIM_D18 MUX Mode" "EIM;EIM_D[18],ecspi1;MOSI,ipu1;DI0_PIN7,ipu2;CSI1_D[17],ipu1;DI1_D0_CS,gpio3;GPIO[18],i2c3;SDA,?..." line.long 0x50 "SW_MUX_CTL_PAD_EIM_D19,SW_MUX_CTL_PAD_EIM_D19 register" bitfld.long 0x50 4. " SION ,Force input path of pad EIM_D19" "Not forced,Forced" bitfld.long 0x50 0.--2. " MUX_MODE ,EIM_D19 MUX Mode" "EIM;EIM_D[19],ecspi1;SS1,ipu1;DI0_PIN8,ipu2;CSI1_D[16],uart1;CTS,gpio3;GPIO[19],epit1;EPITO,?..." line.long 0x54 "SW_MUX_CTL_PAD_EIM_D20,SW_MUX_CTL_PAD_EIM_D20 register" bitfld.long 0x54 4. " SION ,Force input path of pad EIM_D20" "Not forced,Forced" bitfld.long 0x54 0.--2. " MUX_MODE ,EIM_D20 MUX Mode" "EIM;EIM_D[20],ecspi4;SS0,ipu1;DI0_PIN16,ipu2;CSI1_D[15],uart1;RTS,gpio3;GPIO[20],epit2;EPITO,?..." line.long 0x58 "SW_MUX_CTL_PAD_EIM_D21,SW_MUX_CTL_PAD_EIM_D21 register" bitfld.long 0x58 4. " SION ,Force input path of pad EIM_D21" "Not forced,Forced" bitfld.long 0x58 0.--2. " MUX_MODE ,EIM_D21 MUX Mode" "EIM;EIM_D[21],ecspi4;SCLK,ipu1;DI0_PIN17,ipu2;CSI1_D[11],usboh3;USBOTG_OC,gpio3;GPIO[21],i2c1;SCL,spdif;IN1" line.long 0x5C "SW_MUX_CTL_PAD_EIM_D22,SW_MUX_CTL_PAD_EIM_D22 register" bitfld.long 0x5C 4. " SION ,Force input path of pad EIM_D22" "Not forced,Forced" bitfld.long 0x5C 0.--2. " MUX_MODE ,EIM_D22 MUX Mode" "EIM;EIM_D[22],ecspi4;MISO,ipu1;DI0_PIN1,ipu2;CSI1_D[10],usboh3;USBOTG_PWR,gpio3;GPIO[22],spdif;OUT1,?..." line.long 0x60 "SW_MUX_CTL_PAD_EIM_D23,SW_MUX_CTL_PAD_EIM_D23 register" bitfld.long 0x60 4. " SION ,Force input path of pad EIM_D23" "Not forced,Forced" bitfld.long 0x60 0.--2. " MUX_MODE ,EIM_D23 MUX Mode" "EIM;EIM_D[23],ipu1;DI0_D0_CS,uart3;CTS,uart1;DCD,ipu2;CSI1_DATA_EN,gpio3;GPIO[23],ipu1;DI1_PIN2,ipu1;DI1_PIN14" line.long 0x64 "SW_MUX_CTL_PAD_EIM_EB3,SW_MUX_CTL_PAD_EIM_EB3 register" bitfld.long 0x64 4. " SION ,Force input path of pad EIM_EB3" "Not forced,Forced" bitfld.long 0x64 0.--2. " MUX_MODE ,EIM_EB3 MUX Mode" "EIM;EIM_EB[3],ecspi4;RDY,uart3;RTS,uart1;RI,ipu2;CSI1_HSYNC,gpio2;GPIO[31],ipu1;DI1_PIN3,src;BT_CFG[31]" line.long 0x68 "SW_MUX_CTL_PAD_EIM_D24,SW_MUX_CTL_PAD_EIM_D24 register" bitfld.long 0x68 4. " SION ,Force input path of pad EIM_D24" "Not forced,Forced" bitfld.long 0x68 0.--2. " MUX_MODE ,EIM_D24 MUX Mode" "EIM;EIM_D[24],ecspi4;SS2,uart3;TXD_MUX,ecspi1;SS2,ecspi2;SS2,gpio3;GPIO[24],audmux;AUD5_RXFS,uart1;DTR" line.long 0x6C "SW_MUX_CTL_PAD_EIM_D25,SW_MUX_CTL_PAD_EIM_D25 register" bitfld.long 0x6C 4. " SION ,Force input path of pad EIM_D25" "Not forced,Forced" bitfld.long 0x6C 0.--2. " MUX_MODE ,EIM_D25 MUX Mode" "EIM;EIM_D[25],ecspi4;SS3,uart3;RXD_MUX,ecspi1;SS3,ecspi2;SS3,gpio3;GPIO[25],audmux;AUD5_RXC,uart1;DSR" line.long 0x70 "SW_MUX_CTL_PAD_EIM_D26,SW_MUX_CTL_PAD_EIM_D26 register" bitfld.long 0x70 4. " SION ,Force input path of pad EIM_D26" "Not forced,Forced" bitfld.long 0x70 0.--2. " MUX_MODE ,EIM_D26 MUX Mode" "EIM;EIM_D[26],ipu1;DI1_PIN11,ipu1;CSI0_D[1],ipu2;CSI1_D[14],uart2;TXD_MUX,gpio3;GPIO[26],IPU1_SISG2,ipu1;DISP1_DAT[22]" line.long 0x74 "SW_MUX_CTL_PAD_EIM_D27,SW_MUX_CTL_PAD_EIM_D27 register" bitfld.long 0x74 4. " SION ,Force input path of pad EIM_D27." "Not forced,Forced" bitfld.long 0x74 0.--2. " MUX_MODE ,EIM_D27 MUX Mode" "EIM;EIM_D[27],ipu1;DI1_PIN13,ipu1;CSI0_D[0],ipu2;CSI1_D[13],uart2;RXD_MUX,gpio3;GPIO[27],IPU1_SISG3,ipu1;DISP1_DAT[23]" line.long 0x78 "SW_MUX_CTL_PAD_EIM_D28,SW_MUX_CTL_PAD_EIM_D28 register" bitfld.long 0x78 4. " SION ,Force input path of pad EIM_D28." "Not forced,Forced" bitfld.long 0x78 0.--2. " MUX_MODE ,EIM_D28 MUX Mode" "EIM;EIM_D[28],i2c1;SDA,ecspi4;MOSI,ipu2;CSI1_D[12],uart2;CTS,gpio3;GPIO[28],IPU1_EXT_TRIG,ipu1;DI0_PIN13" line.long 0x7C "SW_MUX_CTL_PAD_EIM_D29,SW_MUX_CTL_PAD_EIM_D29 register" bitfld.long 0x7C 4. " SION ,Force input path of pad EIM_D29." "Not forced,Forced" bitfld.long 0x7C 0.--2. " MUX_MODE ,EIM_D29 MUX Mode" "EIM;EIM_D[29],ipu1;DI1_PIN15,ecspi4;SS0,,uart2;RTS,gpio3;GPIO[29],ipu2;CSI1_VSYNC,ipu1;DI0_PIN14" line.long 0x80 "SW_MUX_CTL_PAD_EIM_D30,SW_MUX_CTL_PAD_EIM_D30 register" bitfld.long 0x80 4. " SION ,Force input path of pad EIM_D30" "Not forced,Forced" bitfld.long 0x80 0.--2. " MUX_MODE ,EIM_D30 MUX Mode" "EIM;EIM_D[30],ipu1;DISP1_DAT[21],ipu1;DI0_PIN11,ipu1;CSI0_D[3],uart3;CTS,gpio3;GPIO[30],usboh3;USBH1_OC,?..." line.long 0x84 "SW_MUX_CTL_PAD_EIM_D31,SW_MUX_CTL_PAD_EIM_D31 register" bitfld.long 0x84 4. " SION ,Force input path of pad EIM_D31" "Not forced,Forced" bitfld.long 0x84 0.--2. " MUX_MODE ,EIM_D31 MUX Mode" "EIM;EIM_D[31],ipu1;DISP1_DAT[20],ipu1;DI0_PIN12,ipu1;CSI0_D[2],uart3;RTS,gpio3;GPIO[31],usboh3;USBH1_PWR,?..." line.long 0x88 "SW_MUX_CTL_PAD_EIM_A24,SW_MUX_CTL_PAD_EIM_A24 register" bitfld.long 0x88 4. " SION ,Force input path of pad EIM_A24" "Not forced,Forced" bitfld.long 0x88 0.--2. " MUX_MODE ,EIM_A24 MUX Mode" "EIM;EIM_A[24],ipu1;DISP1_DAT[19],ipu2;CSI1_D[19],IPU2_SISG2,IPU1_SISG2,gpio5;GPIO[4],,src;BT_CFG[24]" line.long 0x8C "SW_MUX_CTL_PAD_EIM_A23,SW_MUX_CTL_PAD_EIM_A23 register" bitfld.long 0x8C 4. " SION ,Force input path of pad EIM_A23" "Not forced,Forced" bitfld.long 0x8C 0.--2. " MUX_MODE ,EIM_A23 MUX Mode" "EIM;EIM_A[23],ipu1;DISP1_DAT[18],ipu2;CSI1_D[18],IPU2_SISG3,IPU1_SISG3,gpio6;GPIO[6],,src;BT_CFG[23]" line.long 0x90 "SW_MUX_CTL_PAD_EIM_A22,SW_MUX_CTL_PAD_EIM_A22 register" bitfld.long 0x90 4. " SION ,Force input path of pad EIM_A22" "Not forced,Forced" bitfld.long 0x90 0.--2. " MUX_MODE ,EIM_A22 MUX Mode" "EIM;EIM_A[22],ipu1;DISP1_DAT[17],ipu2;CSI1_D[17],,,gpio2;GPIO[16],,src;BT_CFG[22]" line.long 0x94 "SW_MUX_CTL_PAD_EIM_A21,SW_MUX_CTL_PAD_EIM_A21 register" bitfld.long 0x94 4. " SION ,Force input path of pad EIM_A21" "Not forced,Forced" bitfld.long 0x94 0.--2. " MUX_MODE ,EIM_A21 MUX Mode" "EIM;EIM_A[21],ipu1;DISP1_DAT[16],ipu2;CSI1_D[16],,,gpio2;GPIO[17],,src;BT_CFG[21]" line.long 0x98 "SW_MUX_CTL_PAD_EIM_A20,SW_MUX_CTL_PAD_EIM_A20 register" bitfld.long 0x98 4. " SION ,Force input path of pad EIM_A20" "Not forced,Forced" bitfld.long 0x98 0.--2. " MUX_MODE ,EIM_A20 MUX Mode" "EIM;EIM_A[20],ipu1;DISP1_DAT[15],ipu2;CSI1_D[15],,,gpio2;GPIO[18],,src;BT_CFG[20]" line.long 0x9C "SW_MUX_CTL_PAD_EIM_A19,SW_MUX_CTL_PAD_EIM_A19 register" bitfld.long 0x9C 4. " SION ,Force input path of pad EIM_A19" "Not forced,Forced" bitfld.long 0x9C 0.--2. " MUX_MODE ,EIM_A19 MUX Mode" "EIM;EIM_A[19],ipu1;DISP1_DAT[14],ipu2;CSI1_D[14],,,gpio2;GPIO[19],,src;BT_CFG[19]" line.long 0xA0 "SW_MUX_CTL_PAD_EIM_A18,SW_MUX_CTL_PAD_EIM_A18 register" bitfld.long 0xA0 4. " SION ,Force input path of pad EIM_A18" "Not forced,Forced" bitfld.long 0xA0 0.--2. " MUX_MODE ,EIM_A18 MUX Mode" "EIM;EIM_A[18],ipu1;DISP1_DAT[13],ipu2;CSI1_D[13],,,gpio2;GPIO[20],,src;BT_CFG[18]" line.long 0xA4 "SW_MUX_CTL_PAD_EIM_A17,SW_MUX_CTL_PAD_EIM_A17 register" bitfld.long 0xA4 4. " SION ,Force input path of pad EIM_A17" "Not forced,Forced" bitfld.long 0xA4 0.--2. " MUX_MODE ,EIM_A17 MUX Mode" "EIM;EIM_A[17],ipu1;DISP1_DAT[12],ipu2;CSI1_D[12],,,gpio2;GPIO[21],,src;BT_CFG[17]" line.long 0xA8 "SW_MUX_CTL_PAD_EIM_A16,SW_MUX_CTL_PAD_EIM_A16 register" bitfld.long 0xA8 4. " SION ,Force input path of pad EIM_A16" "Not forced,Forced" bitfld.long 0xA8 0.--2. " MUX_MODE ,EIM_A16 MUX Mode" "EIM;EIM_A[16],ipu1;DI1_DISP_CLK,ipu2;CSI1_PIXCLK,,,gpio2;GPIO[22],,src;BT_CFG[16]" line.long 0xAC "SW_MUX_CTL_PAD_EIM_CS0,SW_MUX_CTL_PAD_EIM_CS0 register" bitfld.long 0xAC 4. " SION ,Force input path of pad EIM_CS0" "Not forced,Forced" bitfld.long 0xAC 0.--2. " MUX_MODE ,EIM_CS0 MUX Mode" "EIM;EIM_CS[0],ipu1;DI1_PIN5,ecspi2;SCLK,,,gpio2;GPIO[23],?..." line.long 0xB0 "SW_MUX_CTL_PAD_EIM_CS1,SW_MUX_CTL_PAD_EIM_CS1 register" bitfld.long 0xB0 4. " SION ,Force input path of pad EIM_CS1" "Not forced,Forced" bitfld.long 0xB0 0.--2. " MUX_MODE ,EIM_CS1 MUX Mode" "EIM;EIM_CS[1],ipu1;DI1_PIN6,ecspi2;MOSI,,,gpio2;GPIO[24],?..." line.long 0xB4 "SW_MUX_CTL_PAD_EIM_OE,SW_MUX_CTL_PAD_EIM_OE register" bitfld.long 0xB4 4. " SION ,Force input path of pad EIM_OE" "Not forced,Forced" bitfld.long 0xB4 0.--2. " MUX_MODE ,EIM_OE MUX Mode" "EIM;EIM_OE,ipu1;DI1_PIN7,ecspi2;MISO,,,gpio2;GPIO[25],?..." line.long 0xB8 "SW_MUX_CTL_PAD_EIM_RW,SW_MUX_CTL_PAD_EIM_RW register" bitfld.long 0xB8 4. " SION ,Force input path of pad EIM_RW" "Not forced,Forced" bitfld.long 0xB8 0.--2. " MUX_MODE ,EIM_RW MUX Mode" "EIM;EIM_RW,ipu1;DI1_PIN8,ecspi2;SS0,,,gpio2;GPIO[26],,src;BT_CFG[29]" line.long 0xBC "SW_MUX_CTL_PAD_EIM_LBA,SW_MUX_CTL_PAD_EIM_LBA register" bitfld.long 0xBC 4. " SION ,Force input path of pad EIM_LBA" "Not forced,Forced" bitfld.long 0xBC 0.--2. " MUX_MODE ,EIM_LBA MUX Mode" "EIM;EIM_LBA,ipu1;DI1_PIN17,ecspi2;SS1,,,gpio2;GPIO[27],,src;BT_CFG[26]" line.long 0xC0 "SW_MUX_CTL_PAD_EIM_EB0,SW_MUX_CTL_PAD_EIM_EB0 register" bitfld.long 0xC0 4. " SION ,Force input path of pad EIM_EB0" "Not forced,Forced" bitfld.long 0xC0 0.--2. " MUX_MODE ,EIM_EB0 MUX Mode" "EIM;EIM_EB[0],ipu1;DISP1_DAT[11],ipu2;CSI1_D[11],,ccm;PMIC_RDY,gpio2;GPIO[28],,src;BT_CFG[27]" line.long 0xC4 "SW_MUX_CTL_PAD_EIM_EB1,SW_MUX_CTL_PAD_EIM_EB1 register" bitfld.long 0xC4 4. " SION ,Force input path of pad EIM_EB1" "Not forced,Forced" bitfld.long 0xC4 0.--2. " MUX_MODE ,EIM_EB1 MUX Mode" "EIM;EIM_EB[1],ipu1;DISP1_DAT[10],ipu2;CSI1_D[10],,,gpio2;GPIO[29],,src;BT_CFG[28]" line.long 0xC8 "SW_MUX_CTL_PAD_EIM_DA0,SW_MUX_CTL_PAD_EIM_DA0 register" bitfld.long 0xC8 4. " SION ,Force input path of pad EIM_DA0" "Not forced,Forced" bitfld.long 0xC8 0.--2. " MUX_MODE ,EIM_DA0 MUX Mode" "EIM;EIM_DA_A[0],ipu1;DISP1_DAT[9],ipu2;CSI1_D[9],,,gpio3;GPIO[0],,src;BT_CFG[0]" line.long 0xCC "SW_MUX_CTL_PAD_EIM_DA1,SW_MUX_CTL_PAD_EIM_DA1 register" bitfld.long 0xCC 4. " SION ,Force input path of pad EIM_DA1" "Not forced,Forced" bitfld.long 0xCC 0.--2. " MUX_MODE ,EIM_DA1 MUX Mode" "EIM;EIM_DA_A[1],ipu1;DISP1_DAT[8],ipu2;CSI1_D[8],,,gpio3;GPIO[1],,src;BT_CFG[1]" line.long 0xD0 "SW_MUX_CTL_PAD_EIM_DA2,SW_MUX_CTL_PAD_EIM_DA2 register" bitfld.long 0xD0 4. " SION ,Force input path of pad EIM_DA2" "Not forced,Forced" bitfld.long 0xD0 0.--2. " MUX_MODE ,EIM_DA2 MUX Mode" "EIM;EIM_DA_A[2],ipu1;DISP1_DAT[7],ipu2;CSI1_D[7],,,gpio3;GPIO[2],,src;BT_CFG[2]" line.long 0xD4 "SW_MUX_CTL_PAD_EIM_DA3,SW_MUX_CTL_PAD_EIM_DA3 register" bitfld.long 0xD4 4. " SION ,Force input path of pad EIM_DA3" "Not forced,Forced" bitfld.long 0xD4 0.--2. " MUX_MODE ,EIM_DA3 MUX Mode" "EIM;EIM_DA_A[3],ipu1;DISP1_DAT[6],ipu2;CSI1_D[6],,,gpio3;GPIO[3],,src;BT_CFG[3]" line.long 0xD8 "SW_MUX_CTL_PAD_EIM_DA4,SW_MUX_CTL_PAD_EIM_DA4 register" bitfld.long 0xD8 4. " SION ,Force input path of pad EIM_DA4" "Not forced,Forced" bitfld.long 0xD8 0.--2. " MUX_MODE ,EIM_DA4 MUX Mode" "EIM;EIM_DA_A[4],ipu1;DISP1_DAT[5],ipu2;CSI1_D[5],,,gpio3;GPIO[4],,src;BT_CFG[4]" line.long 0xDC "SW_MUX_CTL_PAD_EIM_DA5,SW_MUX_CTL_PAD_EIM_DA5 register" bitfld.long 0xDC 4. " SION ,Force input path of pad EIM_DA5" "Not forced,Forced" bitfld.long 0xDC 0.--2. " MUX_MODE ,EIM_DA5 MUX Mode" "EIM;EIM_DA_A[5],ipu1;DISP1_DAT[4],ipu2;CSI1_D[4],,,gpio3;GPIO[5],,src;BT_CFG[5]" line.long 0xE0 "SW_MUX_CTL_PAD_EIM_DA6,SW_MUX_CTL_PAD_EIM_DA6 register" bitfld.long 0xE0 4. " SION ,Force input path of pad EIM_DA6" "Not forced,Forced" bitfld.long 0xE0 0.--2. " MUX_MODE ,EIM_DA6 MUX Mode" "EIM;EIM_DA_A[6],ipu1;DISP1_DAT[3],ipu2;CSI1_D[3],,,gpio3;GPIO[6],,src;BT_CFG[6]" line.long 0xE4 "SW_MUX_CTL_PAD_EIM_DA7,SW_MUX_CTL_PAD_EIM_DA7 register" bitfld.long 0xE4 4. " SION ,Force input path of pad EIM_DA7" "Not forced,Forced" bitfld.long 0xE4 0.--2. " MUX_MODE ,EIM_DA7 MUX Mode" "EIM;EIM_DA_A[7],ipu1;DISP1_DAT[2],ipu2;CSI1_D[2],,,gpio3;GPIO[7],,src;BT_CFG[7]" line.long 0xE8 "SW_MUX_CTL_PAD_EIM_DA8,SW_MUX_CTL_PAD_EIM_DA8 register" bitfld.long 0xE8 4. " SION ,Force input path of pad EIM_DA8" "Not forced,Forced" bitfld.long 0xE8 0.--2. " MUX_MODE ,EIM_DA8 MUX Mode" "EIM;EIM_DA_A[8],ipu1;DISP1_DAT[1],ipu2;CSI1_D[1],,,gpio3;GPIO[8],,src;BT_CFG[8]" line.long 0xEC "SW_MUX_CTL_PAD_EIM_DA9,SW_MUX_CTL_PAD_EIM_DA9 register" bitfld.long 0xEC 4. " SION ,Force input path of pad EIM_DA9" "Not forced,Forced" bitfld.long 0xEC 0.--2. " MUX_MODE ,EIM_DA9 MUX Mode" "EIM;EIM_DA_A[9],ipu1;DISP1_DAT[0],ipu2;CSI1_D[0],,,gpio3;GPIO[9],,src;BT_CFG[9]" line.long 0xF0 "SW_MUX_CTL_PAD_EIM_DA10,SW_MUX_CTL_PAD_EIM_DA10 register" bitfld.long 0xF0 4. " SION ,Force input path of pad EIM_DA10" "Not forced,Forced" bitfld.long 0xF0 0.--2. " MUX_MODE ,EIM_DA10 MUX Mode" "EIM;EIM_DA_A[10],ipu1;DI1_PIN15,ipu2;CSI1_DATA_EN,,,gpio3;GPIO[10],,src;BT_CFG[10]" line.long 0xF4 "SW_MUX_CTL_PAD_EIM_DA11,SW_MUX_CTL_PAD_EIM_DA11 register" bitfld.long 0xF4 4. " SION ,Force input path of pad EIM_DA11" "Not forced,Forced" bitfld.long 0xF4 0.--2. " MUX_MODE ,EIM_DA11 MUX Mode" "EIM;EIM_DA_A[11],ipu1;DI1_PIN2,ipu2;CSI1_HSYNC,,,gpio3;GPIO[11],,src;BT_CFG[11]" line.long 0xF8 "SW_MUX_CTL_PAD_EIM_DA12,SW_MUX_CTL_PAD_EIM_DA12 register" bitfld.long 0xF8 4. " SION ,Force input path of pad EIM_DA12" "Not forced,Forced" bitfld.long 0xF8 0.--2. " MUX_MODE ,EIM_DA12 MUX Mode" "EIM;EIM_DA_A[12],ipu1;DI1_PIN3,ipu2;CSI1_VSYNC,,,gpio3;GPIO[12],,src;BT_CFG[12]" line.long 0xFC "SW_MUX_CTL_PAD_EIM_DA13,SW_MUX_CTL_PAD_EIM_DA13 register" bitfld.long 0xFC 4. " SION ,Force input path of pad EIM_DA13" "Not forced,Forced" bitfld.long 0xFC 0.--2. " MUX_MODE ,EIM_DA13 MUX Mode" "EIM;EIM_DA_A[13],ipu1;DI1_D0_CS,,,,gpio3;GPIO[13],,src;BT_CFG[13]" line.long 0x100 "SW_MUX_CTL_PAD_EIM_DA14,SW_MUX_CTL_PAD_EIM_DA14 register" bitfld.long 0x100 4. " SION ,Force input path of pad EIM_DA14" "Not forced,Forced" bitfld.long 0x100 0.--2. " MUX_MODE ,EIM_DA14 MUX Mode" "EIM;EIM_DA_A[14],ipu1;DI1_D1_CS,,,,gpio3;GPIO[14],,src;BT_CFG[14]" line.long 0x104 "SW_MUX_CTL_PAD_EIM_DA15,SW_MUX_CTL_PAD_EIM_DA15 register" bitfld.long 0x104 4. " SION ,Force input path of pad EIM_DA15" "Not forced,Forced" bitfld.long 0x104 0.--2. " MUX_MODE ,EIM_DA15 MUX Mode" "EIM;EIM_DA_A[15],ipu1;DI1_PIN1,ipu1;DI1_PIN4,,,gpio3;GPIO[15],,src;BT_CFG[15]" line.long 0x108 "SW_MUX_CTL_PAD_EIM_WAIT,SW_MUX_CTL_PAD_EIM_WAIT register" bitfld.long 0x108 4. " SION ,Force input path of pad EIM_WAIT" "Not forced,Forced" bitfld.long 0x108 0.--2. " MUX_MODE ,EIM_WAIT MUX Mode" "EIM;EIM_WAIT,EIM;EIM_DTACK_B,,,,gpio5;GPIO[0],,src;BT_CFG[25]" line.long 0x10C "SW_MUX_CTL_PAD_EIM_BCLK,SW_MUX_CTL_PAD_EIM_BCLK register" bitfld.long 0x10C 4. " SION ,Force input path of pad EIM_BCLK" "Not forced,Forced" bitfld.long 0x10C 0.--2. " MUX_MODE ,EIM_BCLK MUX Mode" "EIM;EIM_BCLK,ipu1;DI1_PIN16,,,,gpio6;GPIO[31],?..." line.long 0x110 "SW_MUX_CTL_PAD_DI0_DISP_CLK,SW_MUX_CTL_PAD_DI0_DISP_CLK register" bitfld.long 0x110 4. " SION ,Force input path of pad DI0_DISP_CLK" "Not forced,Forced" bitfld.long 0x110 0.--2. " MUX_MODE ,DI0_DISP_CLK MUX Mode" "ipu1;DI0_DISP_CLK,ipu2;DI0_DISP_CLK,,,,gpio4;GPIO[16],?..." line.long 0x114 "SW_MUX_CTL_PAD_DI0_PIN15,SW_MUX_CTL_PAD_DI0_PIN15 register" bitfld.long 0x114 4. " SION ,Force input path of pad DI0_PIN15" "Not forced,Forced" bitfld.long 0x114 0.--2. " MUX_MODE ,DI0_PIN15 MUX Mode" "ipu1;DI0_PIN15,ipu2;DI0_PIN15,audmux;AUD6_TXC,,,gpio4;GPIO[17],?..." line.long 0x118 "SW_MUX_CTL_PAD_DI0_PIN2,SW_MUX_CTL_PAD_DI0_PIN2 register" bitfld.long 0x118 4. " SION ,Force input path of pad DI0_PIN2" "Not forced,Forced" bitfld.long 0x118 0.--2. " MUX_MODE ,DI0_PIN2 MUX Mode" "ipu1;DI0_PIN2,ipu2;DI0_PIN2,audmux;AUD6_TXD,,,gpio4;GPIO[18],?..." line.long 0x11C "SW_MUX_CTL_PAD_DI0_PIN3,SW_MUX_CTL_PAD_DI0_PIN3 register" bitfld.long 0x11C 4. " SION ,Force input path of pad DI0_PIN3" "Not forced,Forced" bitfld.long 0x11C 0.--2. " MUX_MODE ,DI0_PIN3 MUX Mode" "ipu1;DI0_PIN3,ipu2;DI0_PIN3,audmux;AUD6_TXFS,,,gpio4;GPIO[19],?..." line.long 0x120 "SW_MUX_CTL_PAD_DI0_PIN4,SW_MUX_CTL_PAD_DI0_PIN4 register" bitfld.long 0x120 4. " SION ,Force input path of pad DI0_PIN4" "Not forced,Forced" bitfld.long 0x120 0.--2. " MUX_MODE ,DI0_PIN4 MUX Mode" "ipu1;DI0_PIN4,ipu2;DI0_PIN4,audmux;AUD6_RXD,usdhc1;WP,,gpio4;GPIO[20],?..." line.long 0x124 "SW_MUX_CTL_PAD_DISP0_DAT0,SW_MUX_CTL_PAD_DISP0_DAT0 register" bitfld.long 0x124 4. " SION ,Force input path of pad DISP0_DAT0" "Not forced,Forced" bitfld.long 0x124 0.--2. " MUX_MODE ,DISP0_DAT0 MUX Mode" "ipu1;DISP0_DAT[0],ipu2;DISP0_DAT[0],ecspi3;SCLK,,,gpio4;GPIO[21],?..." line.long 0x128 "SW_MUX_CTL_PAD_DISP0_DAT1,SW_MUX_CTL_PAD_DISP0_DAT1 register" bitfld.long 0x128 4. " SION ,Force input path of pad DISP0_DAT1" "Not forced,Forced" bitfld.long 0x128 0.--2. " MUX_MODE ,DISP0_DAT1 MUX Mode" "ipu1;DISP0_DAT[1],ipu2;DISP0_DAT[1],ecspi3;MOSI,,,gpio4;GPIO[22],?..." line.long 0x12C "SW_MUX_CTL_PAD_DISP0_DAT2,SW_MUX_CTL_PAD_DISP0_DAT2 register" bitfld.long 0x12C 4. " SION ,Force input path of pad DISP0_DAT2" "Not forced,Forced" bitfld.long 0x12C 0.--2. " MUX_MODE ,DISP0_DAT2 MUX Mode" "ipu1;DISP0_DAT[2],ipu2;DISP0_DAT[2],ecspi3;MISO,,,gpio4;GPIO[23],?..." line.long 0x130 "SW_MUX_CTL_PAD_DISP0_DAT3,SW_MUX_CTL_PAD_DISP0_DAT3 register" bitfld.long 0x130 4. " SION ,Force input path of pad DISP0_DAT3" "Not forced,Forced" bitfld.long 0x130 0.--2. " MUX_MODE ,DISP0_DAT3 MUX Mode" "ipu1;DISP0_DAT[3],ipu2;DISP0_DAT[3],ecspi3;SS0,,,gpio4;GPIO[24],?..." line.long 0x134 "SW_MUX_CTL_PAD_DISP0_DAT4,SW_MUX_CTL_PAD_DISP0_DAT4 register" bitfld.long 0x134 4. " SION ,Force input path of pad DISP0_DAT4" "Not forced,Forced" bitfld.long 0x134 0.--2. " MUX_MODE ,DISP0_DAT4 MUX Mode" "ipu1;DISP0_DAT[4],ipu2;DISP0_DAT[4],ecspi3;SS1,,,gpio4;GPIO[25],?..." line.long 0x138 "SW_MUX_CTL_PAD_DISP0_DAT5,SW_MUX_CTL_PAD_DISP0_DAT5 register" bitfld.long 0x138 4. " SION ,Force input path of pad DISP0_DAT5" "Not forced,Forced" bitfld.long 0x138 0.--2. " MUX_MODE ,DISP0_DAT5 MUX Mode" "ipu1;DISP0_DAT[5],ipu2;DISP0_DAT[5],ecspi3;SS2,audmux;AUD6_RXFS,,gpio4;GPIO[26],?..." line.long 0x13C "SW_MUX_CTL_PAD_DISP0_DAT6,SW_MUX_CTL_PAD_DISP0_DAT6 register" bitfld.long 0x13C 4. " SION ,Force input path of pad DISP0_DAT6" "Not forced,Forced" bitfld.long 0x13C 0.--2. " MUX_MODE ,DISP0_DAT6 MUX Mode" "ipu1;DISP0_DAT[6],ipu2;DISP0_DAT[6],ecspi3;SS3,audmux;AUD6_RXC,,gpio4;GPIO[27],?..." line.long 0x140 "SW_MUX_CTL_PAD_DISP0_DAT7,SW_MUX_CTL_PAD_DISP0_DAT7 register" bitfld.long 0x140 4. " SION ,Force input path of pad DISP0_DAT7" "Not forced,Forced" bitfld.long 0x140 0.--2. " MUX_MODE ,DISP0_DAT7 MUX Mode" "ipu1;DISP0_DAT[7],ipu2;DISP0_DAT[7],ecspi3;RDY,,,gpio4;GPIO[28],?..." line.long 0x144 "SW_MUX_CTL_PAD_DISP0_DAT8,SW_MUX_CTL_PAD_DISP0_DAT8 register" bitfld.long 0x144 4. " SION ,Force input path of pad DISP0_DAT8" "Not forced,Forced" bitfld.long 0x144 0.--2. " MUX_MODE ,DISP0_DAT8 MUX Mode" "ipu1;DISP0_DAT[8],ipu2;DISP0_DAT[8],pwm1;PWMO,wdog1;WDOG_B,,gpio4;GPIO[29],?..." line.long 0x148 "SW_MUX_CTL_PAD_DISP0_DAT9,SW_MUX_CTL_PAD_DISP0_DAT9 register" bitfld.long 0x148 4. " SION ,Force input path of pad DISP0_DAT9" "Not forced,Forced" bitfld.long 0x148 0.--2. " MUX_MODE ,DISP0_DAT9 MUX Mode" "ipu1;DISP0_DAT[9],ipu2;DISP0_DAT[9],pwm2;PWMO,wdog2;WDOG_B,,gpio4;GPIO[30],?..." line.long 0x14C "SW_MUX_CTL_PAD_DISP0_DAT10,SW_MUX_CTL_PAD_DISP0_DAT10 register" bitfld.long 0x14C 4. " SION ,Force input path of pad DISP0_DAT10" "Not forced,Forced" bitfld.long 0x14C 0.--2. " MUX_MODE ,DISP0_DAT10 MUX Mode" "ipu1;DISP0_DAT[10],ipu2;DISP0_DAT[10],,,,gpio4;GPIO[31],?..." line.long 0x150 "SW_MUX_CTL_PAD_DISP0_DAT11,SW_MUX_CTL_PAD_DISP0_DAT11 register" bitfld.long 0x150 4. " SION ,Force input path of pad DISP0_DAT11" "Not forced,Forced" bitfld.long 0x150 0.--2. " MUX_MODE ,DISP0_DAT11 MUX Mode" "ipu1;DISP0_DAT[11],ipu2;DISP0_DAT[11],,,,gpio5;GPIO[5],?..." line.long 0x154 "SW_MUX_CTL_PAD_DISP0_DAT12,SW_MUX_CTL_PAD_DISP0_DAT12 register" bitfld.long 0x154 4. " SION ,Force input path of pad DISP0_DAT12" "Not forced,Forced" bitfld.long 0x154 0.--2. " MUX_MODE ,DISP0_DAT12 MUX Mode" "ipu1;DISP0_DAT[12],ipu2;DISP0_DAT[12],,,,gpio5;GPIO[6],?..." line.long 0x158 "SW_MUX_CTL_PAD_DISP0_DAT13,SW_MUX_CTL_PAD_DISP0_DAT13 register" bitfld.long 0x158 4. " SION ,Force input path of pad DISP0_DAT13" "Not forced,Forced" bitfld.long 0x158 0.--2. " MUX_MODE ,DISP0_DAT13 MUX Mode" "ipu1;DISP0_DAT[13],ipu2;DISP0_DAT[13],,audmux;AUD5_RXFS,,gpio5;GPIO[7],?..." line.long 0x15C "SW_MUX_CTL_PAD_DISP0_DAT14,SW_MUX_CTL_PAD_DISP0_DAT14 register" bitfld.long 0x15C 4. " SION ,Force input path of pad DISP0_DAT14" "Not forced,Forced" bitfld.long 0x15C 0.--2. " MUX_MODE ,DISP0_DAT14 MUX Mode" "ipu1;DISP0_DAT[14],ipu2;DISP0_DAT[14],,audmux;AUD5_RXC,,gpio5;GPIO[8],?..." line.long 0x160 "SW_MUX_CTL_PAD_DISP0_DAT15,SW_MUX_CTL_PAD_DISP0_DAT15 register" bitfld.long 0x160 4. " SION ,Force input path of pad DISP0_DAT15" "Not forced,Forced" bitfld.long 0x160 0.--2. " MUX_MODE ,DISP0_DAT15 MUX Mode" "ipu1;DISP0_DAT[15],ipu2;DISP0_DAT[15],ecspi1;SS1,ecspi2;SS1,,gpio5;GPIO[9],?..." line.long 0x164 "SW_MUX_CTL_PAD_DISP0_DAT16,SW_MUX_CTL_PAD_DISP0_DAT16 register" bitfld.long 0x164 4. " SION ,Force input path of pad DISP0_DAT16" "Not forced,Forced" bitfld.long 0x164 0.--2. " MUX_MODE ,DISP0_DAT16 MUX Mode" "ipu1;DISP0_DAT[16],ipu2;DISP0_DAT[16],ecspi2;MOSI,audmux;AUD5_TXC,sdma;SDMA_EXT_EVENT[0],gpio5;GPIO[10],?..." line.long 0x168 "SW_MUX_CTL_PAD_DISP0_DAT17,SW_MUX_CTL_PAD_DISP0_DAT17 register" bitfld.long 0x168 4. " SION ,Force input path of pad DISP0_DAT17" "Not forced,Forced" bitfld.long 0x168 0.--2. " MUX_MODE ,DISP0_DAT17 MUX Mode" "ipu1;DISP0_DAT[17],ipu2;DISP0_DAT[17],ecspi2;MISO,audmux;AUD5_TXD,sdma;SDMA_EXT_EVENT[1],gpio5;GPIO[11],?..." line.long 0x16C "SW_MUX_CTL_PAD_DISP0_DAT18,SW_MUX_CTL_PAD_DISP0_DAT18 register" bitfld.long 0x16C 4. " SION ,Force input path of pad DISP0_DAT18" "Not forced,Forced" bitfld.long 0x16C 0.--2. " MUX_MODE ,DISP0_DAT18 MUX Mode" "ipu1;DISP0_DAT[18],ipu2;DISP0_DAT[18],ecspi2;SS0,audmux;AUD5_TXFS,audmux;AUD4_RXFS,gpio5;GPIO[12],,EIM;EIM_CS[2]" line.long 0x170 "SW_MUX_CTL_PAD_DISP0_DAT19,SW_MUX_CTL_PAD_DISP0_DAT19 register" bitfld.long 0x170 4. " SION ,Force input path of pad DISP0_DAT19" "Not forced,Forced" bitfld.long 0x170 0.--2. " MUX_MODE ,DISP0_DAT19 MUX Mode" "ipu1;DISP0_DAT[19],ipu2;DISP0_DAT[19],ecspi2;SCLK,audmux;AUD5_RXD,audmux;AUD4_RXC,gpio5;GPIO[13],,EIM;EIM_CS[3]" line.long 0x174 "SW_MUX_CTL_PAD_DISP0_DAT20,SW_MUX_CTL_PAD_DISP0_DAT20 register" bitfld.long 0x174 4. " SION ,Force input path of pad DISP0_DAT20" "Not forced,Forced" bitfld.long 0x174 0.--2. " MUX_MODE ,DISP0_DAT20 MUX Mode" "ipu1;DISP0_DAT[20],ipu2;DISP0_DAT[20],ecspi1;SCLK,audmux;AUD4_TXC,,gpio5;GPIO[14],?..." line.long 0x178 "SW_MUX_CTL_PAD_DISP0_DAT21,SW_MUX_CTL_PAD_DISP0_DAT21 register" bitfld.long 0x178 4. " SION ,Force input path of pad DISP0_DAT21" "Not forced,Forced" bitfld.long 0x178 0.--2. " MUX_MODE ,DISP0_DAT21 MUX Mode" "ipu1;DISP0_DAT[21],ipu2;DISP0_DAT[21],ecspi1;MOSI,audmux;AUD4_TXD,,gpio5;GPIO[15],?..." line.long 0x17C "SW_MUX_CTL_PAD_DISP0_DAT22,SW_MUX_CTL_PAD_DISP0_DAT22 register" bitfld.long 0x17C 4. " SION ,Force input path of pad DISP0_DAT22" "Not forced,Forced" bitfld.long 0x17C 0.--2. " MUX_MODE ,DISP0_DAT22 MUX Mode" "ipu1;DISP0_DAT[22],ipu2;DISP0_DAT[22],ecspi1;MISO,audmux;AUD4_TXFS,,gpio5;GPIO[16],?..." line.long 0x180 "SW_MUX_CTL_PAD_DISP0_DAT23,SW_MUX_CTL_PAD_DISP0_DAT23 register" bitfld.long 0x180 4. " SION ,Force input path of pad DISP0_DAT23" "Not forced,Forced" bitfld.long 0x180 0.--2. " MUX_MODE ,DISP0_DAT23 MUX Mode" "ipu1;DISP0_DAT[23],ipu2;DISP0_DAT[23],ecspi1;SS0,audmux;AUD4_RXD,,gpio5;GPIO[17],?..." line.long 0x184 "SW_MUX_CTL_PAD_ENET_MDIO,SW_MUX_CTL_PAD_ENET_MDIO register" bitfld.long 0x184 4. " SION ,Force input path of pad ENET_MDIO" "Not forced,Forced" bitfld.long 0x184 0.--2. " MUX_MODE ,ENET_MDIO MUX Mode" ",enet;MDIO,esai1;SCKR,,enet;1588_EVENT1_OUT,gpio1;GPIO[22],spdif;PLOCK,?..." line.long 0x188 "SW_MUX_CTL_PAD_ENET_REF_CLK,SW_MUX_CTL_PAD_ENET_REF_CLK register" bitfld.long 0x188 4. " SION ,Force input path of pad ENET_REF_CLK" "Not forced,Forced" bitfld.long 0x188 0.--2. " MUX_MODE ,ENET_REF_CLK MUX Mode" ",enet;TX_CLK,esai1;FSR,,,gpio1;GPIO[23],spdif;SRCLK,?..." line.long 0x18C "SW_MUX_CTL_PAD_ENET_RX_ER,SW_MUX_CTL_PAD_ENET_RX_ER register" bitfld.long 0x18C 4. " SION ,Force input path of pad ENET_RX_ER" "Not forced,Forced" bitfld.long 0x18C 0.--2. " MUX_MODE ,ENET_RX_ER MUX Mode" "USB_OTG_ID,enet;RX_ER,esai1;HCKR,spdif;IN1,enet;1588_EVENT2_OUT,gpio1;GPIO[24],?..." line.long 0x190 "SW_MUX_CTL_PAD_ENET_CRS_DV,SW_MUX_CTL_PAD_ENET_CRS_DV register" bitfld.long 0x190 4. " SION ,Force input path of pad ENET_CRS_DV" "Not forced,Forced" bitfld.long 0x190 0.--2. " MUX_MODE ,ENET_CRS_DV MUX Mode" ",enet;RX_EN,esai1;SCKT,spdif;SPDIF_EXTCLK,,gpio1;GPIO[25],?..." line.long 0x194 "SW_MUX_CTL_PAD_ENET_RXD1,SW_MUX_CTL_PAD_ENET_RXD1 register" bitfld.long 0x194 4. " SION ,Force input path of pad ENET_RXD1" "Not forced,Forced" bitfld.long 0x194 0.--2. " MUX_MODE ,ENET_RXD1 MUX Mode" "mlb;MLBSIG,enet;RDATA[1],esai1;FST,,enet;1588_EVENT3_OUT,gpio1;GPIO[26],?..." line.long 0x198 "SW_MUX_CTL_PAD_ENET_RXD0,SW_MUX_CTL_PAD_ENET_RXD0 register" bitfld.long 0x198 4. " SION ,Force input path of pad ENET_RXD0" "Not forced,Forced" bitfld.long 0x198 0.--2. " MUX_MODE ,ENET_RXD0 MUX Mode" "osc32k;32K_OUT,enet;RDATA[0],esai1;HCKT,spdif;OUT1,,gpio1;GPIO[27],?..." line.long 0x19C "SW_MUX_CTL_PAD_ENET_TX_EN,SW_MUX_CTL_PAD_ENET_TX_EN register" bitfld.long 0x19C 4. " SION ,Force input path of pad ENET_TX_EN" "Not forced,Forced" bitfld.long 0x19C 0.--2. " MUX_MODE ,ENET_TX_EN MUX Mode" ",enet;TX_EN,esai1;TX3_RX2,,,gpio1;GPIO[28],?..." line.long 0x1A0 "SW_MUX_CTL_PAD_ENET_TXD1,SW_MUX_CTL_PAD_ENET_TXD1 register" bitfld.long 0x1A0 4. " SION ,Force input path of pad ENET_TXD1" "Not forced,Forced" bitfld.long 0x1A0 0.--2. " MUX_MODE ,ENET_TXD1 MUX Mode" "mlb;MLBCLK,enet;TDATA[1],esai1;TX2_RX3,,enet;1588_EVENT0_IN,gpio1;GPIO[29],?..." line.long 0x1A4 "SW_MUX_CTL_PAD_ENET_TXD0,SW_MUX_CTL_PAD_ENET_TXD0 register" bitfld.long 0x1A4 4. " SION ,Force input path of pad ENET_TXD0" "Not forced,Forced" bitfld.long 0x1A4 0.--2. " MUX_MODE ,ENET_TXD0 MUX Mode" ",enet;TDATA[0],esai1;TX4_RX1,,,gpio1;GPIO[30],?..." line.long 0x1A8 "SW_MUX_CTL_PAD_ENET_MDC,SW_MUX_CTL_PAD_ENET_MDC register" bitfld.long 0x1A8 4. " SION ,Force input path of pad ENET_MDC" "Not forced,Forced" bitfld.long 0x1A8 0.--2. " MUX_MODE ,ENET_MDC MUX Mode" "mlb;MLBDAT,enet;MDC,esai1;TX5_RX0,,enet;1588_EVENT1_IN,gpio1;GPIO[31],?..." line.long 0x1AC "SW_MUX_CTL_PAD_KEY_COL0,SW_MUX_CTL_PAD_KEY_COL0 register" bitfld.long 0x1AC 4. " SION ,Force input path of pad KEY_COL0" "Not forced,Forced" bitfld.long 0x1AC 0.--2. " MUX_MODE ,KEY_COL0 MUX Mode" "ecspi1;SCLK,enet;RDATA[3],audmux;AUD5_TXC,kpp;COL[0],uart4;TXD_MUX,gpio4;GPIO[6],dcic1;DCIC_OUT,?..." line.long 0x1B0 "SW_MUX_CTL_PAD_KEY_ROW0,SW_MUX_CTL_PAD_KEY_ROW0 register" bitfld.long 0x1B0 4. " SION ,Force input path of pad KEY_ROW0" "Not forced,Forced" bitfld.long 0x1B0 0.--2. " MUX_MODE ,KEY_ROW0 MUX Mode" "ecspi1;MOSI,enet;TDATA[3],audmux;AUD5_TXD,kpp;ROW[0],uart4;RXD_MUX,gpio4;GPIO[7],dcic2;DCIC_OUT,?..." line.long 0x1B4 "SW_MUX_CTL_PAD_KEY_COL1,SW_MUX_CTL_PAD_KEY_COL1 register" bitfld.long 0x1B4 4. " SION ,Force input path of pad KEY_COL1" "Not forced,Forced" bitfld.long 0x1B4 0.--2. " MUX_MODE ,KEY_COL1 MUX Mode" "ecspi1;MISO,enet;MDIO,audmux;AUD5_TXFS,kpp;COL[1],uart5;TXD_MUX,gpio4;GPIO[8],usdhc1;VSELECT,?..." line.long 0x1B8 "SW_MUX_CTL_PAD_KEY_ROW1,SW_MUX_CTL_PAD_KEY_ROW1 register" bitfld.long 0x1B8 4. " SION ,Force input path of pad KEY_ROW1" "Not forced,Forced" bitfld.long 0x1B8 0.--2. " MUX_MODE ,KEY_ROW1 MUX Mode" "ecspi1;SS0,enet;COL,audmux;AUD5_RXD,kpp;ROW[1],uart5;RXD_MUX,gpio4;GPIO[9],usdhc2;VSELECT,?..." line.long 0x1BC "SW_MUX_CTL_PAD_KEY_COL2,SW_MUX_CTL_PAD_KEY_COL2 register" bitfld.long 0x1BC 4. " SION ,Force input path of pad KEY_COL2" "Not forced,Forced" bitfld.long 0x1BC 0.--2. " MUX_MODE ,KEY_COL2 MUX Mode" "ecspi1;SS1,enet;RDATA[2],can1;TXCAN,kpp;COL[2],enet;MDC,gpio4;GPIO[10],usboh3;H1USB_PWRCTL_WAKEUP,?..." line.long 0x1C0 "SW_MUX_CTL_PAD_KEY_ROW2,SW_MUX_CTL_PAD_KEY_ROW2 register" bitfld.long 0x1C0 4. " SION ,Force input path of pad KEY_ROW2" "Not forced,Forced" bitfld.long 0x1C0 0.--2. " MUX_MODE ,KEY_ROW2 MUX Mode" "ecspi1;SS2,enet;TDATA[2],can1;RXCAN,kpp;ROW[2],usdhc2;VSELECT,gpio4;GPIO[11],hdmi_tx;CEC_LINE,?..." line.long 0x1C4 "SW_MUX_CTL_PAD_KEY_COL3,SW_MUX_CTL_PAD_KEY_COL3 register" bitfld.long 0x1C4 4. " SION ,Force input path of pad KEY_COL3" "Not forced,Forced" bitfld.long 0x1C4 0.--2. " MUX_MODE ,KEY_COL3 MUX Mode" "ecspi1;SS3,enet;CRS,hdmi_tx;DDC_SCL,kpp;COL[3],i2c2;SCL,gpio4;GPIO[12],spdif;IN1,?..." line.long 0x1C8 "SW_MUX_CTL_PAD_KEY_ROW3,SW_MUX_CTL_PAD_KEY_ROW3 register" bitfld.long 0x1C8 4. " SION ,Force input path of pad KEY_ROW3" "Not forced,Forced" bitfld.long 0x1C8 0.--2. " MUX_MODE ,KEY_ROW3 MUX Mode" "osc32k;32K_OUT,asrc;ASRC_EXT_CLK,hdmi_tx;DDC_SDA,kpp;ROW[3],i2c2;SDA,gpio4;GPIO[13],usdhc1;VSELECT,?..." line.long 0x1CC "SW_MUX_CTL_PAD_KEY_COL4,SW_MUX_CTL_PAD_KEY_COL4 register" bitfld.long 0x1CC 4. " SION ,Force input path of pad KEY_COL4" "Not forced,Forced" bitfld.long 0x1CC 0.--2. " MUX_MODE ,KEY_COL4 MUX Mode" "can2;TXCAN,IPU1_SISG4,usboh3;USBOTG_OC,kpp;COL[4],uart5;RTS,gpio4;GPIO[14],?..." line.long 0x1D0 "SW_MUX_CTL_PAD_KEY_ROW4,SW_MUX_CTL_PAD_KEY_ROW4 register" bitfld.long 0x1D0 4. " SION ,Force input path of pad KEY_ROW4" "Not forced,Forced" bitfld.long 0x1D0 0.--2. " MUX_MODE ,KEY_ROW4 MUX Mode" "can2;RXCAN,IPU1_SISG5,usboh3;USBOTG_PWR,kpp;ROW[4],uart5;CTS,gpio4;GPIO[15],?..." line.long 0x1D4 "SW_MUX_CTL_PAD_GPIO_0,SW_MUX_CTL_PAD_GPIO_0 register" bitfld.long 0x1D4 4. " SION ,Force input path of pad GPIO_0" "Not forced,Forced" bitfld.long 0x1D4 0.--2. " MUX_MODE ,GPIO_0 MUX Mode" "ccm;CLKO,,kpp;COL[5],asrc;ASRC_EXT_CLK,epit1;EPITO,gpio1;GPIO[0],usboh3;USBH1_PWR,nvs_hp_wrapper;SNVS_VIO_5" line.long 0x1D8 "SW_MUX_CTL_PAD_GPIO_1,SW_MUX_CTL_PAD_GPIO_1 register" bitfld.long 0x1D8 4. " SION ,Force input path of pad GPIO_1" "Not forced,Forced" bitfld.long 0x1D8 0.--2. " MUX_MODE ,GPIO_1 MUX Mode" "esai1;SCKR,wdog2;WDOG_B,kpp;ROW[5],USB_OTG_ID,pwm2;PWMO,gpio1;GPIO[1],usdhc1;CD,src;TESTER_ACK" line.long 0x1DC "SW_MUX_CTL_PAD_GPIO_9,SW_MUX_CTL_PAD_GPIO_9 register" bitfld.long 0x1DC 4. " SION ,Force input path of pad GPIO_9" "Not forced,Forced" bitfld.long 0x1DC 0.--2. " MUX_MODE ,GPIO_9 MUX Mode" "esai1;FSR,wdog1;WDOG_B,kpp;COL[6],ccm;REF_EN_B,pwm1;PWMO,gpio1;GPIO[9],usdhc1;WP,src;EARLY_RST" line.long 0x1E0 "SW_MUX_CTL_PAD_GPIO_3,SW_MUX_CTL_PAD_GPIO_3 register" bitfld.long 0x1E0 4. " SION ,Force input path of pad GPIO_3" "Not forced,Forced" bitfld.long 0x1E0 0.--2. " MUX_MODE ,GPIO_3 MUX Mode" "esai1;HCKR,,i2c3;SCL,XTALOSC_REF_CLK_24M,ccm;CLKO2,gpio1;GPIO[3],usboh3;USBH1_OC,mlb;MLBCLK" line.long 0x1E4 "SW_MUX_CTL_PAD_GPIO_6,SW_MUX_CTL_PAD_GPIO_6 register" bitfld.long 0x1E4 4. " SION ,Force input path of pad GPIO_6" "Not forced,Forced" bitfld.long 0x1E4 0.--2. " MUX_MODE ,GPIO_6 MUX Mode" "esai1;SCKT,,i2c3;SDA,,,gpio1;GPIO[6],usdhc2;LCTL,mlb;MLBSIG" line.long 0x1E8 "SW_MUX_CTL_PAD_GPIO_2,SW_MUX_CTL_PAD_GPIO_2 register" bitfld.long 0x1E8 4. " SION ,Force input path of pad GPIO_2" "Not forced,Forced" bitfld.long 0x1E8 0.--2. " MUX_MODE ,GPIO_2 MUX Mode" "esai1;FST,,kpp;ROW[6],,,gpio1;GPIO[2],usdhc2;WP,mlb;MLBDAT" line.long 0x1EC "SW_MUX_CTL_PAD_GPIO_4,SW_MUX_CTL_PAD_GPIO_4 register" bitfld.long 0x1EC 4. " SION ,Force input path of pad GPIO_4" "Not forced,Forced" bitfld.long 0x1EC 0.--2. " MUX_MODE ,GPIO_4 MUX Mode" "esai1;HCKT,,kpp;COL[7],,,gpio1;GPIO[4],usdhc2;CD,?..." line.long 0x1F0 "SW_MUX_CTL_PAD_GPIO_5,SW_MUX_CTL_PAD_GPIO_5 register" bitfld.long 0x1F0 4. " SION ,Force input path of pad GPIO_5" "Not forced,Forced" bitfld.long 0x1F0 0.--2. " MUX_MODE ,GPIO_5 MUX Mode" "esai1;TX2_RX3,,kpp;ROW[7],ccm;CLKO,,gpio1;GPIO[5],i2c3;SCL,cheetah;EVENTI" line.long 0x1F4 "SW_MUX_CTL_PAD_GPIO_7,SW_MUX_CTL_PAD_GPIO_7 register" bitfld.long 0x1F4 4. " SION ,Force input path of pad GPIO_7" "Not forced,Forced" bitfld.long 0x1F4 0.--2. " MUX_MODE ,GPIO_7 MUX Mode" "esai1;TX4_RX1,ecspi5;RDY,epit1;EPITO,can1;TXCAN,uart2;TXD_MUX,gpio1;GPIO[7],spdif;PLOCK,usboh3;OTGUSB_HOST_MODE" line.long 0x1F8 "SW_MUX_CTL_PAD_GPIO_8,SW_MUX_CTL_PAD_GPIO_8 register" bitfld.long 0x1F8 4. " SION ,Force input path of pad GPIO_8" "Not forced,Forced" bitfld.long 0x1F8 0.--2. " MUX_MODE ,GPIO_8 MUX Mode" "esai1;TX5_RX0,XTALOSC_REF_CLK_32K,epit2;EPITO,can1;RXCAN,uart2;RXD_MUX,gpio1;GPIO[8],spdif;SRCLK,usboh3;OTGUSB_PWRCTL_WAKEUP" line.long 0x1FC "SW_MUX_CTL_PAD_GPIO_16,SW_MUX_CTL_PAD_GPIO_16 register" bitfld.long 0x1FC 4. " SION ,Force input path of pad GPIO_16" "Not forced,Forced" bitfld.long 0x1FC 0.--2. " MUX_MODE ,GPIO_16 MUX Mode" "esai1;TX3_RX2,enet;1588_EVENT2_IN,enet;ANATOP_ETHERNET_REF_OUT,usdhc1;LCTL,spdif;IN1,gpio7;GPIO[11],i2c3;SDA,sjc;DE_B" line.long 0x200 "SW_MUX_CTL_PAD_GPIO_17,SW_MUX_CTL_PAD_GPIO_17 register" bitfld.long 0x200 4. " SION ,Force input path of pad GPIO_17" "Not forced,Forced" bitfld.long 0x200 0.--2. " MUX_MODE ,GPIO_17 MUX Mode" "esai1;TX0,enet;1588_EVENT3_IN,ccm;PMIC_RDY,sdma;SDMA_EXT_EVENT[0],spdif;OUT1,gpio7;GPIO[12],?..." line.long 0x204 "SW_MUX_CTL_PAD_GPIO_18,SW_MUX_CTL_PAD_GPIO_18 register" bitfld.long 0x204 4. " SION ,Force input path of pad GPIO_18" "Not forced,Forced" bitfld.long 0x204 0.--2. " MUX_MODE ,GPIO_18 MUX Mode" "esai1;TX1,enet;RX_CLK,usdhc3;VSELECT,sdma;SDMA_EXT_EVENT[1],asrc;ASRC_EXT_CLK,gpio7;GPIO[13],snvs_hp_wrapper;SNVS_VIO_5_CTL,?..." line.long 0x208 "SW_MUX_CTL_PAD_GPIO_19,SW_MUX_CTL_PAD_GPIO_19 register" bitfld.long 0x208 4. " SION ,Force input path of pad GPIO_19" "Not forced,Forced" bitfld.long 0x208 0.--2. " MUX_MODE ,GPIO_19 MUX Mode" "kpp;COL[5],enet;1588_EVENT0_OUT,spdif;OUT1,ccm;CLKO,ecspi1;RDY,gpio4;GPIO[5],enet;TX_ER,src;?..." line.long 0x20C "SW_MUX_CTL_PAD_CSI0_PIXCLK,SW_MUX_CTL_PAD_CSI0_PIXCLK register" bitfld.long 0x20C 4. " SION ,Force input path of pad CSI0_PIXCLK" "Not forced,Forced" bitfld.long 0x20C 0.--2. " MUX_MODE ,CSI0_PIXCLK MUX Mode" "ipu1;CSI0_PIXCLK,,,,,gpio5;GPIO[18],,cheetah;EVENTO" line.long 0x210 "SW_MUX_CTL_PAD_CSI0_HSYNC,SW_MUX_CTL_PAD_CSI0_HSYNC Register" bitfld.long 0x210 4. " SION ,Force input path of pad CSI0_MCLK" "Not forced,Forced" bitfld.long 0x210 0.--2. " MUX_MODE ,CSI0_MCLK MUX Mode" "ipu1;CSI0_HSYNC,,,ccm;CLKO,,gpio5;GPIO[19],,ARM_TRACE_CTL" line.long 0x214 "SW_MUX_CTL_PAD_CSI0_DATA_EN,SW_MUX_CTL_PAD_CSI0_DATA_EN register" bitfld.long 0x214 4. " SION ,Force input path of pad CSI0_DATA_EN" "Not forced,Forced" bitfld.long 0x214 0.--2. " MUX_MODE ,CSI0_DATA_EN MUX Mode" "ipu1;CSI0_DATA_EN,eim;EIM_D[0],,,,gpio5;GPIO[20],,ARM_TRACE_CTL" line.long 0x218 "SW_MUX_CTL_PAD_CSI0_VSYNC,SW_MUX_CTL_PAD_CSI0_VSYNC register" bitfld.long 0x218 4. " SION ,Force input path of pad CSI0_VSYNC" "Not forced,Forced" bitfld.long 0x218 0.--2. " MUX_MODE ,CSI0_VSYNC MUX Mode" "ipu1;CSI0_VSYNC,EIM;EIM_D[1],,,,gpio5;GPIO[21],,ARM_TRACE00" line.long 0x21C "SW_MUX_CTL_PAD_CSI0_DAT4,SW_MUX_CTL_PAD_CSI0_DAT4 register" bitfld.long 0x21C 4. " SION ,Force input path of pad CSI0_DAT4" "Not forced,Forced" bitfld.long 0x21C 0.--2. " MUX_MODE ,CSI0_DAT4 MUX Mode" "ipu1;CSI0_D[4],eim;EIM_D[2],ecspi1;SCLK,kpp;COL[5],audmux;AUD3_TXC,gpio5;GPIO[22],,ARM_TRACE01" line.long 0x220 "SW_MUX_CTL_PAD_CSI0_DAT5,SW_MUX_CTL_PAD_CSI0_DAT5 register" bitfld.long 0x220 4. " SION ,Force input path of pad CSI0_DAT5" "Not forced,Forced" bitfld.long 0x220 0.--2. " MUX_MODE ,CSI0_DAT5 MUX Mode" "ipu1;CSI0_D[5],EIM;EIM_D[3],ecspi1;MOSI,kpp;ROW[5],audmux;AUD3_TXD,gpio5;GPIO[23],,ARM_TRACE02" line.long 0x224 "SW_MUX_CTL_PAD_CSI0_DAT6,SW_MUX_CTL_PAD_CSI0_DAT6 register" bitfld.long 0x224 4. " SION ,Force input path of pad CSI0_DAT6" "Not forced,Forced" bitfld.long 0x224 0.--2. " MUX_MODE ,CSI0_DAT6 MUX Mode" "ipu1;CSI0_D[6],EIM;EIM_D[4],ecspi1;MISO,kpp;COL[6],audmux;AUD3_TXFS,gpio5;GPIO[24],,ARM_TRACE03" line.long 0x228 "SW_MUX_CTL_PAD_CSI0_DAT7,SW_MUX_CTL_PAD_CSI0_DAT7 register" bitfld.long 0x228 4. " SION ,Force input path of pad CSI0_DAT7" "Not forced,Forced" bitfld.long 0x228 0.--2. " MUX_MODE ,CSI0_DAT7 MUX Mode" "ipu1;CSI0_D[7],EIM;EIM_D[5],ecspi1;SS0,kpp;ROW[6],audmux;AUD3_RXD,gpio5;GPIO[25],,ARM_TRACE04" line.long 0x22C "SW_MUX_CTL_PAD_CSI0_DAT8,SW_MUX_CTL_PAD_CSI0_DAT8 register" bitfld.long 0x22C 4. " SION ,Force input path of pad CSI0_DAT8" "Not forced,Forced" bitfld.long 0x22C 0.--2. " MUX_MODE ,CSI0_DAT8 MUX Mode" "ipu1;CSI0_D[8],EIM;EIM_D[6],ecspi2;SCLK,kpp;COL[7],i2c1;SDA,gpio5;GPIO[26],,ARM_TRACE05" line.long 0x230 "SW_MUX_CTL_PAD_CSI0_DAT9,SW_MUX_CTL_PAD_CSI0_DAT9 register" bitfld.long 0x230 4. " SION ,Force input path of pad CSI0_DAT9" "Not forced,Forced" bitfld.long 0x230 0.--2. " MUX_MODE ,CSI0_DAT9 MUX Mode" "ipu1;CSI0_D[9],EIM;EIM_D[7],ecspi2;MOSI,kpp;ROW[7],i2c1;SCL,gpio5;GPIO[27],,ARM_TRACE06" line.long 0x234 "SW_MUX_CTL_PAD_CSI0_DAT10,SW_MUX_CTL_PAD_CSI0_DAT10 register" bitfld.long 0x234 4. " SION ,Force input path of pad CSI0_DAT10" "Not forced,Forced" bitfld.long 0x234 0.--2. " MUX_MODE ,CSI0_DAT10 MUX Mode" "ipu1;CSI0_D[10],audmux;AUD3_RXC,ecspi2;MISO,uart1;TXD_MUX,,gpio5;GPIO[28],,ARM_TRACE07" line.long 0x238 "SW_MUX_CTL_PAD_CSI0_DAT11,SW_MUX_CTL_PAD_CSI0_DAT11 register" bitfld.long 0x238 4. " SION ,Force input path of pad CSI0_DAT11" "Not forced,Forced" bitfld.long 0x238 0.--2. " MUX_MODE ,CSI0_DAT11 MUX Mode" "ipu1;CSI0_D[11],audmux;AUD3_RXFS,ecspi2;SS0,uart1;RXD_MUX,,gpio5;GPIO[29],,ARM_TRACE08" line.long 0x23C "SW_MUX_CTL_PAD_CSI0_DAT12,SW_MUX_CTL_PAD_CSI0_DAT12 register" bitfld.long 0x23C 4. " SION ,Force input path of pad CSI0_DAT12" "Not forced,Forced" bitfld.long 0x23C 0.--2. " MUX_MODE ,CSI0_DAT12 MUX Mode" "ipu1;CSI0_D[12],eim;EIM_D[8],,uart4;TXD_MUX,,gpio5;GPIO[30],,ARM_TRACE09" line.long 0x240 "SW_MUX_CTL_PAD_CSI0_DAT13,SW_MUX_CTL_PAD_CSI0_DAT13 register" bitfld.long 0x240 4. " SION ,Force input path of pad CSI0_DAT13" "Not forced,Forced" bitfld.long 0x240 0.--2. " MUX_MODE ,CSI0_DAT13 MUX Mode" "ipu1;CSI0_D[13],eim;EIM_D[9],,uart4;RXD_MUX,,gpio5;GPIO[31],,ARM_TRACE10" line.long 0x244 "SW_MUX_CTL_PAD_CSI0_DAT14,SW_MUX_CTL_PAD_CSI0_DAT14 register" bitfld.long 0x244 4. " SION ,Force input path of pad CSI0_DAT14" "Not forced,Forced" bitfld.long 0x244 0.--2. " MUX_MODE ,CSI0_DAT14 MUX Mode" "ipu1;CSI0_D[14],eim;EIM_D[10],,uart5;TXD_MUX,,gpio6;GPIO[0],,ARM_TRACE11" line.long 0x248 "SW_MUX_CTL_PAD_CSI0_DAT15,SW_MUX_CTL_PAD_CSI0_DAT15 register" bitfld.long 0x248 4. " SION ,Force input path of pad CSI0_DAT15" "Not forced,Forced" bitfld.long 0x248 0.--2. " MUX_MODE ,CSI0_DAT15 MUX Mode" "ipu1;CSI0_D[15],eim;EIM_D[11],,uart5;RXD_MUX,,gpio6;GPIO[1],,ARM_TRACE12" line.long 0x24C "SW_MUX_CTL_PAD_CSI0_DAT16,SW_MUX_CTL_PAD_CSI0_DAT16 register" bitfld.long 0x24C 4. " SION ,Force input path of pad CSI0_DAT16" "Not forced,Forced" bitfld.long 0x24C 0.--2. " MUX_MODE ,CSI0_DAT16 MUX Mode" "ipu1;CSI0_D[16],eim;EIM_D[12],,uart4;RTS,,gpio6;GPIO[2],,ARM_TRACE13" line.long 0x250 "SW_MUX_CTL_PAD_CSI0_DAT17,SW_MUX_CTL_PAD_CSI0_DAT17 register" bitfld.long 0x250 4. " SION ,Force input path of pad CSI0_DAT17" "Not forced,Forced" bitfld.long 0x250 0.--2. " MUX_MODE ,CSI0_DAT17 MUX Mode" "ipu1;CSI0_D[17],eim;EIM_D[13],,uart4;CTS,,gpio6;GPIO[3],,ARM_TRACE14" line.long 0x254 "SW_MUX_CTL_PAD_CSI0_DAT18,SW_MUX_CTL_PAD_CSI0_DAT18 register" bitfld.long 0x254 4. " SION ,Force input path of pad CSI0_DAT18" "Not forced,Forced" bitfld.long 0x254 0.--2. " MUX_MODE ,CSI0_DAT18 MUX Mode" "ipu1;CSI0_D[18],eim;EIM_D[14],,uart5;RTS,,gpio6;GPIO[4],,ARM_TRACE15" line.long 0x258 "SW_MUX_CTL_PAD_CSI0_DAT19,SW_MUX_CTL_PAD_CSI0_DAT19 register" bitfld.long 0x258 4. " SION ,Force input path of pad CSI0_DAT19" "Not forced,Forced" bitfld.long 0x258 0.--2. " MUX_MODE ,CSI0_DAT19 MUX Mode" "ipu1;CSI0_D[19],eim;EIM_D[15],,uart5;CTS,,gpio6;GPIO[5],?..." line.long 0x25C "SW_MUX_CTL_PAD_SD3_DAT7,SW_MUX_CTL_PAD_SD3_DAT7 register" bitfld.long 0x25C 4. " SION ,Force input path of pad SD3_DAT7" "Not forced,Forced" bitfld.long 0x25C 0.--2. " MUX_MODE ,SD3_DAT7 MUX Mode" "usdhc3;DAT7,uart1;TXD_MUX,,,,gpio6;GPIO[17],?..." line.long 0x260 "SW_MUX_CTL_PAD_SD3_DAT6,SW_MUX_CTL_PAD_SD3_DAT6 register" bitfld.long 0x260 4. " SION ,Force input path of pad SD3_DAT6" "Not forced,Forced" bitfld.long 0x260 0.--2. " MUX_MODE ,SD3_DAT6 MUX Mode" "usdhc3;DAT6,uart1;RXD_MUX,,,,gpio6;GPIO[18],?..." line.long 0x264 "SW_MUX_CTL_PAD_SD3_DAT5,SW_MUX_CTL_PAD_SD3_DAT5 register" bitfld.long 0x264 4. " SION ,Force input path of pad SD3_DAT5" "Not forced,Forced" bitfld.long 0x264 0.--2. " MUX_MODE ,SD3_DAT5 MUX Mode" "usdhc3;DAT5,uart2;TXD_MUX,,,,gpio7;GPIO[0],?..." line.long 0x268 "SW_MUX_CTL_PAD_SD3_DAT4,SW_MUX_CTL_PAD_SD3_DAT4 register" bitfld.long 0x268 4. " SION ,Force input path of pad SD3_DAT4" "Not forced,Forced" bitfld.long 0x268 0.--2. " MUX_MODE ,SD3_DAT4 MUX Mode" "usdhc3;DAT4,uart2;RXD_MUX,,,,gpio7;GPIO[1],?..." line.long 0x26C "SW_MUX_CTL_PAD_SD3_CMD,SW_MUX_CTL_PAD_SD3_CMD register" bitfld.long 0x26C 4. " SION ,Force input path of pad SD3_CMD" "Not forced,Forced" bitfld.long 0x26C 0.--2. " MUX_MODE ,SD3_CMD MUX Mode" "usdhc3;CMD,uart2;CTS,can1;TXCAN,,,gpio7;GPIO[2],?..." line.long 0x270 "SW_MUX_CTL_PAD_SD3_CLK,SW_MUX_CTL_PAD_SD3_CLK register" bitfld.long 0x270 4. " SION ,Force input path of pad SD3_CLK" "Not forced,Forced" bitfld.long 0x270 0.--2. " MUX_MODE ,SD3_CLK MUX Mode" "usdhc3;CLK,uart2;RTS,can1;RXCAN,,,gpio7;GPIO[3],?..." line.long 0x274 "SW_MUX_CTL_PAD_SD3_DAT0,SW_MUX_CTL_PAD_SD3_DAT0 register" bitfld.long 0x274 4. " SION ,Force input path of pad SD3_DAT0" "Not forced,Forced" bitfld.long 0x274 0.--2. " MUX_MODE ,SD3_DAT0 MUX Mode" "usdhc3;DAT0,uart1;CTS,can2;TXCAN,,,gpio7;GPIO[4],?..." line.long 0x278 "SW_MUX_CTL_PAD_SD3_DAT1,SW_MUX_CTL_PAD_SD3_DAT1 register" bitfld.long 0x278 4. " SION ,Force input path of pad SD3_DAT1" "Not forced,Forced" bitfld.long 0x278 0.--2. " MUX_MODE ,SD3_DAT1 MUX Mode" "usdhc3;DAT1,uart1;RTS,can2;RXCAN,,,gpio7;GPIO[5],?..." line.long 0x27C "SW_MUX_CTL_PAD_SD3_DAT2,SW_MUX_CTL_PAD_SD3_DAT2 register" bitfld.long 0x27C 4. " SION ,Force input path of pad SD3_DAT2" "Not forced,Forced" bitfld.long 0x27C 0.--2. " MUX_MODE ,SD3_DAT2 MUX Mode" "usdhc3;DAT2,,,,,gpio7;GPIO[6],?..." line.long 0x280 "SW_MUX_CTL_PAD_SD3_DAT3,SW_MUX_CTL_PAD_SD3_DAT3 register" bitfld.long 0x280 4. " SION ,Force input path of pad SD3_DAT3" "Not forced,Forced" bitfld.long 0x280 0.--2. " MUX_MODE ,SD3_DAT3 MUX Mode" "usdhc3;DAT3,uart3;CTS,,,,gpio7;GPIO[7],?..." line.long 0x284 "SW_MUX_CTL_PAD_SD3_RST,SW_MUX_CTL_PAD_SD3_RST register" bitfld.long 0x284 4. " SION ,Force input path of pad SD3_RST" "Not forced,Forced" bitfld.long 0x284 0.--2. " MUX_MODE ,SD3_RST MUX Mode" "usdhc3;RST,uart3;RTS,,,,gpio7;GPIO[8],?..." line.long 0x288 "SW_MUX_CTL_PAD_NANDF_CLE,SW_MUX_CTL_PAD_NANDF_CLE register" bitfld.long 0x288 4. " SION ,Force input path of pad NANDF_CLE" "Not forced,Forced" bitfld.long 0x288 0.--2. " MUX_MODE ,NANDF_CLE MUX Mode" "rawnand;CLE,IPU2_SISG4,,,,gpio6;GPIO[7],?..." line.long 0x28C "SW_MUX_CTL_PAD_NANDF_ALE,SW_MUX_CTL_PAD_NANDF_ALE register" bitfld.long 0x28C 4. " SION ,Force input path of pad NANDF_ALE" "Not forced,Forced" bitfld.long 0x28C 0.--2. " MUX_MODE ,NANDF_ALE MUX Mode" "rawnand;ALE,usdhc4;RST,,,,gpio6;GPIO[8],?..." line.long 0x290 "SW_MUX_CTL_PAD_NANDF_WP_B,SW_MUX_CTL_PAD_NANDF_WP_B register" bitfld.long 0x290 4. " SION ,Force input path of pad NANDF_WP_B" "Not forced,Forced" bitfld.long 0x290 0.--2. " MUX_MODE ,NANDF_WP_B MUX Mode" "rawnand;RESETN,IPU2_SISG5,,,,gpio6;GPIO[9],?..." line.long 0x294 "SW_MUX_CTL_PAD_NANDF_RB0,SW_MUX_CTL_PAD_NANDF_RB0 register" bitfld.long 0x294 4. " SION ,Force input path of pad NANDF_RB0" "Not forced,Forced" bitfld.long 0x294 0.--2. " MUX_MODE ,NANDF_RB0 MUX Mode" "rawnand;READY0,ipu2;DI0_PIN1,,,,gpio6;GPIO[10],?..." line.long 0x298 "SW_MUX_CTL_PAD_NANDF_CS0,SW_MUX_CTL_PAD_NANDF_CS0 register" bitfld.long 0x298 4. " SION ,Force input path of pad NANDF_CS0" "Not forced,Forced" bitfld.long 0x298 0.--2. " MUX_MODE ,NANDF_CS0 MUX Mode" "rawnand;CE0N,,,,,gpio6;GPIO[11],?..." line.long 0x29C "SW_MUX_CTL_PAD_NANDF_CS1,SW_MUX_CTL_PAD_NANDF_CS1 register" bitfld.long 0x29C 4. " SION ,Force input path of pad NANDF_CS1" "Not forced,Forced" bitfld.long 0x29C 0.--2. " MUX_MODE ,NANDF_CS1 MUX Mode" "rawnand;CE1N,usdhc4;VSELECT,usdhc3;VSELECT,,,gpio6;GPIO[14],?..." line.long 0x2A0 "SW_MUX_CTL_PAD_NANDF_CS2,SW_MUX_CTL_PAD_NANDF_CS2 register" bitfld.long 0x2A0 4. " SION ,Force input path of pad NANDF_CS2" "Not forced,Forced" bitfld.long 0x2A0 0.--2. " MUX_MODE ,NANDF_CS2 MUX Mode" "NAND_CE2_B,IPU1_SISG0,esai1;TX0,EIM;EIM_CRE,ccm;CLKO2,gpio6;GPIO[15],IPU2_SISG0,?..." line.long 0x2A4 "SW_MUX_CTL_PAD_NANDF_CS3,SW_MUX_CTL_PAD_NANDF_CS3 register" bitfld.long 0x2A4 4. " SION ,Force input path of pad NANDF_CS3" "Not forced,Forced" bitfld.long 0x2A4 0.--2. " MUX_MODE ,NANDF_CS3 MUX Mode" "NAND_CE3_B,IPU1_SISG1,esai1;TX1,EIM;EIM_A[26],,gpio6;GPIO[16],IPU2_SISG1,?..." line.long 0x2A8 "SW_MUX_CTL_PAD_SD4_CMD,SW_MUX_CTL_PAD_SD4_CMD register" bitfld.long 0x2A8 4. " SION ,Force input path of pad SD4_CMD" "Not forced,Forced" bitfld.long 0x2A8 0.--2. " MUX_MODE ,SD4_CMD MUX Mode" "usdhc4;CMD,rawnand;RDN,uart3;TXD_MUX,,,gpio7;GPIO[9],?..." line.long 0x2AC "SW_MUX_CTL_PAD_SD4_CLK,SW_MUX_CTL_PAD_SD4_CLK register" bitfld.long 0x2AC 4. " SION ,Force input path of pad SD4_CLK" "Not forced,Forced" bitfld.long 0x2AC 0.--2. " MUX_MODE ,SD4_CLK MUX Mode" "usdhc4;CLK,rawnand;WRN,uart3;RXD_MUX,,,gpio7;GPIO[10],?..." line.long 0x2B0 "SW_MUX_CTL_PAD_NANDF_D0,SW_MUX_CTL_PAD_NANDF_D0 register" bitfld.long 0x2B0 4. " SION ,Force input path of pad NANDF_D0" "Not forced,Forced" bitfld.long 0x2B0 0.--2. " MUX_MODE ,NANDF_D0 MUX Mode" "rawnand;D0,usdhc1;DAT4,,,,gpio2;GPIO[0],?..." line.long 0x2B4 "SW_MUX_CTL_PAD_NANDF_D1,SW_MUX_CTL_PAD_NANDF_D1 register" bitfld.long 0x2B4 4. " SION ,Force input path of pad NANDF_D1" "Not forced,Forced" bitfld.long 0x2B4 0.--2. " MUX_MODE ,NANDF_D1 MUX Mode" "rawnand;D1,usdhc1;DAT5,,,,gpio2;GPIO[1],?..." line.long 0x2B8 "SW_MUX_CTL_PAD_NANDF_D2,SW_MUX_CTL_PAD_NANDF_D2 register" bitfld.long 0x2B8 4. " SION ,Force input path of pad NANDF_D2" "Not forced,Forced" bitfld.long 0x2B8 0.--2. " MUX_MODE ,NANDF_D2 MUX Mode" "rawnand;D2,usdhc1;DAT6,,,,gpio2;GPIO[2],?..." line.long 0x2BC "SW_MUX_CTL_PAD_NANDF_D3,SW_MUX_CTL_PAD_NANDF_D3 register" bitfld.long 0x2BC 4. " SION ,Force input path of pad NANDF_D3" "Not forced,Forced" bitfld.long 0x2BC 0.--2. " MUX_MODE ,NANDF_D3 MUX Mode" "rawnand;D3,usdhc1;DAT7,,,,gpio2;GPIO[3],?..." line.long 0x2C0 "SW_MUX_CTL_PAD_NANDF_D4,SW_MUX_CTL_PAD_NANDF_D4 register" bitfld.long 0x2C0 4. " SION ,Force input path of pad NANDF_D4" "Not forced,Forced" bitfld.long 0x2C0 0.--2. " MUX_MODE ,NANDF_D4 MUX Mode" "rawnand;D4,usdhc2;DAT4,,,,gpio2;GPIO[4],?..." line.long 0x2C4 "SW_MUX_CTL_PAD_NANDF_D5,SW_MUX_CTL_PAD_NANDF_D5 register" bitfld.long 0x2C4 4. " SION ,Force input path of pad NANDF_D5" "Not forced,Forced" bitfld.long 0x2C4 0.--2. " MUX_MODE ,NANDF_D5 MUX Mode" "rawnand;D5,usdhc2;DAT5,,,,gpio2;GPIO[5],?..." line.long 0x2C8 "SW_MUX_CTL_PAD_NANDF_D6,SW_MUX_CTL_PAD_NANDF_D6 register" bitfld.long 0x2C8 4. " SION ,Force input path of pad NANDF_D6" "Not forced,Forced" bitfld.long 0x2C8 0.--2. " MUX_MODE ,NANDF_D6 MUX Mode" "rawnand;D6,usdhc2;DAT6,,,,gpio2;GPIO[6],?..." line.long 0x2CC "SW_MUX_CTL_PAD_NANDF_D7,SW_MUX_CTL_PAD_NANDF_D7 register" bitfld.long 0x2CC 4. " SION ,Force input path of pad NANDF_D7" "Not forced,Forced" bitfld.long 0x2CC 0.--2. " MUX_MODE ,NANDF_D7 MUX Mode" "rawnand;D7,usdhc2;DAT7,,,,gpio2;GPIO[7],?..." line.long 0x2D0 "SW_MUX_CTL_PAD_SD4_DAT0,SW_MUX_CTL_PAD_SD4_DAT0 register" bitfld.long 0x2D0 4. " SION ,Force input path of pad SD4_DAT0" "Not forced,Forced" bitfld.long 0x2D0 0.--2. " MUX_MODE ,SD4_DAT0 MUX Mode" ",usdhc4;DAT0,rawnand;DQS,,,gpio2;GPIO[8],?..." line.long 0x2D4 "SW_MUX_CTL_PAD_SD4_DAT1,SW_MUX_CTL_PAD_SD4_DAT1 register" bitfld.long 0x2D4 4. " SION ,Force input path of pad SD4_DAT1" "Not forced,Forced" bitfld.long 0x2D4 0.--2. " MUX_MODE ,SD4_DAT1 MUX Mode" ",usdhc4;DAT1,pwm3;PWMO,,,gpio2;GPIO[9],?..." line.long 0x2D8 "SW_MUX_CTL_PAD_SD4_DAT2,SW_MUX_CTL_PAD_SD4_DAT2 register" bitfld.long 0x2D8 4. " SION ,Force input path of pad SD4_DAT2" "Not forced,Forced" bitfld.long 0x2D8 0.--2. " MUX_MODE ,SD4_DAT2 MUX Mode" ",usdhc4;DAT2,pwm4;PWMO,,,gpio2;GPIO[10],?..." line.long 0x2DC "SW_MUX_CTL_PAD_SD4_DAT3,SW_MUX_CTL_PAD_SD4_DAT3 register" bitfld.long 0x2DC 4. " SION ,Force input path of pad SD4_DAT3" "Not forced,Forced" bitfld.long 0x2DC 0.--2. " MUX_MODE ,SD4_DAT3 MUX Mode" ",usdhc4;DAT3,,,,gpio2;GPIO[11],?..." line.long 0x2E0 "SW_MUX_CTL_PAD_SD4_DAT4,SW_MUX_CTL_PAD_SD4_DAT4 register" bitfld.long 0x2E0 4. " SION ,Force input path of pad SD4_DAT4" "Not forced,Forced" bitfld.long 0x2E0 0.--2. " MUX_MODE ,SD4_DAT4 MUX Mode" ",usdhc4;DAT4,uart2;RXD_MUX,,,gpio2;GPIO[12],?..." line.long 0x2E4 "SW_MUX_CTL_PAD_SD4_DAT5,SW_MUX_CTL_PAD_SD4_DAT5 register" bitfld.long 0x2E4 4. " SION ,Force input path of pad SD4_DAT5" "Not forced,Forced" bitfld.long 0x2E4 0.--2. " MUX_MODE ,SD4_DAT5 MUX Mode" ",usdhc4;DAT5,uart2;RTS,,,gpio2;GPIO[13],?..." line.long 0x2E8 "SW_MUX_CTL_PAD_SD4_DAT6,SW_MUX_CTL_PAD_SD4_DAT6 register" bitfld.long 0x2E8 4. " SION ,Force input path of pad SD4_DAT6" "Not forced,Forced" bitfld.long 0x2E8 0.--2. " MUX_MODE ,SD4_DAT6 MUX Mode" ",usdhc4;DAT6,uart2;CTS,,,gpio2;GPIO[14],?..." line.long 0x2EC "SW_MUX_CTL_PAD_SD4_DAT7,SW_MUX_CTL_PAD_SD4_DAT7 register" bitfld.long 0x2EC 4. " SION ,Force input path of pad SD4_DAT7" "Not forced,Forced" bitfld.long 0x2EC 0.--2. " MUX_MODE ,SD4_DAT7 MUX Mode" ",usdhc4;DAT7,uart2;TXD_MUX,,,gpio2;GPIO[15],?..." line.long 0x2F0 "SW_MUX_CTL_PAD_SD1_DAT1,SW_MUX_CTL_PAD_SD1_DAT1 register" bitfld.long 0x2F0 4. " SION ,Force input path of pad SD1_DAT1" "Not forced,Forced" bitfld.long 0x2F0 0.--2. " MUX_MODE ,SD1_DAT1 MUX Mode" "usdhc1;DAT1,ecspi5;SS0,pwm3;PWMO,gpt;CAPIN2,,gpio1;GPIO[17],?..." line.long 0x2F4 "SW_MUX_CTL_PAD_SD1_DAT0,SW_MUX_CTL_PAD_SD1_DAT0 register" bitfld.long 0x2F4 4. " SION ,Force input path of pad SD1_DAT0" "Not forced,Forced" bitfld.long 0x2F4 0.--2. " MUX_MODE ,SD1_DAT0 MUX Mode" "usdhc1;DAT0,ecspi5;MISO,,gpt;CAPIN1,,gpio1;GPIO[16],?..." line.long 0x2F8 "SW_MUX_CTL_PAD_SD1_DAT3,SW_MUX_CTL_PAD_SD1_DAT3 register" bitfld.long 0x2F8 4. " SION ,Force input path of pad SD1_DAT3" "Not forced,Forced" bitfld.long 0x2F8 0.--2. " MUX_MODE ,SD1_DAT3 MUX Mode" "usdhc1;DAT3,ecspi5;SS2,gpt;CMPOUT3,pwm1;PWMO,wdog2;WDOG_B,gpio1;GPIO[21],wdog2;WDOG_RST_B_DEB,?..." line.long 0x2FC "SW_MUX_CTL_PAD_SD1_CMD,SW_MUX_CTL_PAD_SD1_CMD register" bitfld.long 0x2FC 4. " SION ,Force input path of pad SD1_CMD" "Not forced,Forced" bitfld.long 0x2FC 0.--2. " MUX_MODE ,SD1_CMD MUX Mode" "usdhc1;CMD,ecspi5;MOSI,pwm4;PWMO,gpt;CMPOUT1,,gpio1;GPIO[18],?..." line.long 0x300 "SW_MUX_CTL_PAD_SD1_DAT2,SW_MUX_CTL_PAD_SD1_DAT2 register" bitfld.long 0x300 4. " SION ,Force input path of pad SD1_DAT2" "Not forced,Forced" bitfld.long 0x300 0.--2. " MUX_MODE ,SD1_DAT2 MUX Mode" "usdhc1;DAT2,ecspi5;SS1,gpt;CMPOUT2,pwm2;PWMO,wdog1;WDOG_B,gpio1;GPIO[19],wdog1;WDOG_RST_B_DEB,?..." line.long 0x304 "SW_MUX_CTL_PAD_SD1_CLK,SW_MUX_CTL_PAD_SD1_CLK register" bitfld.long 0x304 4. " SION ,Force input path of pad SD1_CLK" "Not forced,Forced" bitfld.long 0x304 0.--2. " MUX_MODE ,SD1_CLK MUX Mode" "usdhc1;CLK,ecspi5;SCLK,osc32k;32K_OUT,gpt;CLKIN,,gpio1;GPIO[20],?..." line.long 0x308 "SW_MUX_CTL_PAD_SD2_CLK,SW_MUX_CTL_PAD_SD2_CLK register" bitfld.long 0x308 4. " SION ,Force input path of pad SD2_CLK" "Not forced,Forced" bitfld.long 0x308 0.--2. " MUX_MODE ,SD2_CLK MUX Mode" "usdhc2;CLK,ecspi5;SCLK,kpp;COL[5],audmux;AUD4_RXFS,,gpio1;GPIO[10],?..." line.long 0x30C "SW_MUX_CTL_PAD_SD2_CMD,SW_MUX_CTL_PAD_SD2_CMD register" bitfld.long 0x30C 4. " SION ,Force input path of pad SD2_CMD" "Not forced,Forced" bitfld.long 0x30C 0.--2. " MUX_MODE ,SD2_CMD MUX Mode" "usdhc2;CMD,ecspi5;MOSI,kpp;ROW[5],audmux;AUD4_RXC,,gpio1;GPIO[11],?..." line.long 0x310 "SW_MUX_CTL_PAD_SD2_DAT3,SW_MUX_CTL_PAD_SD2_DAT3 register" bitfld.long 0x310 4. " SION ,Force input path of pad SD2_DAT3" "Not forced,Forced" bitfld.long 0x310 0.--2. " MUX_MODE ,SD2_DAT3 MUX Mode" "usdhc2;DAT3,ecspi5;SS3,kpp;COL[6],audmux;AUD4_TXC,,gpio1;GPIO[12],?..." tree.end tree "SW_PAD_CTL_PAD Registers" width 28. group.long 0x360++0xB line.long 0x0 "SW_PAD_CTL_PAD_SD2_DAT1,SW_PAD_CTL_PAD_SD2_DAT1 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" "50 MHz,100MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_SD2_DAT2,SW_PAD_CTL_PAD_SD2_DAT2 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" "50 MHz,100MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_SD2_DAT0,SW_PAD_CTL_PAD_SD2_DAT0 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" "50 MHz,100MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x36C++0x3 line.long 0x00 "SW_PAD_CTL_PAD_RGMII_TXC,SW_PAD_CTL_PAD_RGMII_TXC register" bitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." textline " " ; bitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" group.long 0x370++0x17 line.long 0x0 "SW_PAD_CTL_PAD_RGMII_TD0,SW_PAD_CTL_PAD_RGMII_TD0 register" bitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x4 "SW_PAD_CTL_PAD_RGMII_TD1,SW_PAD_CTL_PAD_RGMII_TD1 register" bitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x8 "SW_PAD_CTL_PAD_RGMII_TD2,SW_PAD_CTL_PAD_RGMII_TD2 register" bitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0xC "SW_PAD_CTL_PAD_RGMII_TD3,SW_PAD_CTL_PAD_RGMII_TD3 register" bitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_RGMII_RX_CTL,SW_PAD_CTL_PAD_RGMII_RX_CTL register" bitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_RGMII_RD0,SW_PAD_CTL_PAD_RGMII_RD0 register" bitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" group.long 0x388++0x3 line.long 0x00 "SW_PAD_CTL_PAD_RGMII_TX_CTL,SW_PAD_CTL_PAD_RGMII_TX_CTL register" bitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" group.long 0x38C++0xF line.long 0x0 "SW_PAD_CTL_PAD_RGMII_RD1,SW_PAD_CTL_PAD_RGMII_RD1 register" bitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x4 "SW_PAD_CTL_PAD_RGMII_RD2,SW_PAD_CTL_PAD_RGMII_RD2 register" bitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0x8 "SW_PAD_CTL_PAD_RGMII_RD3,SW_PAD_CTL_PAD_RGMII_RD3 register" bitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" line.long 0xC "SW_PAD_CTL_PAD_RGMII_RXC,SW_PAD_CTL_PAD_RGMII_RXC register" bitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" textline " " bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,?..." bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,287 Ohm,121 Ohm,76 Ohm,57 Ohm,45 Ohm,37 Ohm,31 Ohm" group.long 0x39C++0x157 line.long 0x0 "SW_PAD_CTL_PAD_EIM_A25,SW_PAD_CTL_PAD_EIM_A25 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_EIM_EB2,SW_PAD_CTL_PAD_EIM_EB2 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_EIM_D16,SW_PAD_CTL_PAD_EIM_D16 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_EIM_D17,SW_PAD_CTL_PAD_EIM_D17 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_EIM_D18,SW_PAD_CTL_PAD_EIM_D18 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_EIM_D19,SW_PAD_CTL_PAD_EIM_D19 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_EIM_D20,SW_PAD_CTL_PAD_EIM_D20 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_EIM_D21,SW_PAD_CTL_PAD_EIM_D21 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_EIM_D22,SW_PAD_CTL_PAD_EIM_D22 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_EIM_D23,SW_PAD_CTL_PAD_EIM_D23 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_EIM_EB3,SW_PAD_CTL_PAD_EIM_EB3 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_EIM_D24,SW_PAD_CTL_PAD_EIM_D24 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_EIM_D25,SW_PAD_CTL_PAD_EIM_D25 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_EIM_D26,SW_PAD_CTL_PAD_EIM_D26 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_EIM_D27,SW_PAD_CTL_PAD_EIM_D27 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_EIM_D28,SW_PAD_CTL_PAD_EIM_D28 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_EIM_D29,SW_PAD_CTL_PAD_EIM_D29 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_EIM_D30,SW_PAD_CTL_PAD_EIM_D30 register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_EIM_D31,SW_PAD_CTL_PAD_EIM_D31 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_EIM_A24,SW_PAD_CTL_PAD_EIM_A24 register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_EIM_A23,SW_PAD_CTL_PAD_EIM_A23 register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_EIM_A22,SW_PAD_CTL_PAD_EIM_A22 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_EIM_A21,SW_PAD_CTL_PAD_EIM_A21 register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_EIM_A20,SW_PAD_CTL_PAD_EIM_A20 register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_EIM_A19,SW_PAD_CTL_PAD_EIM_A19 register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_EIM_A18,SW_PAD_CTL_PAD_EIM_A18 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_EIM_A17,SW_PAD_CTL_PAD_EIM_A17 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_EIM_A16,SW_PAD_CTL_PAD_EIM_A16 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_EIM_CS0,SW_PAD_CTL_PAD_EIM_CS0 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_EIM_CS1,SW_PAD_CTL_PAD_EIM_CS1 register" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_EIM_OE,SW_PAD_CTL_PAD_EIM_OE register" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_EIM_RW,SW_PAD_CTL_PAD_EIM_RW register" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_EIM_LBA,SW_PAD_CTL_PAD_EIM_LBA register" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_EIM_EB0,SW_PAD_CTL_PAD_EIM_EB0 register" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x88 "SW_PAD_CTL_PAD_EIM_EB1,SW_PAD_CTL_PAD_EIM_EB1 register" bitfld.long 0x88 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x88 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x88 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x88 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x88 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x88 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x88 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x88 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8C "SW_PAD_CTL_PAD_EIM_DA0,SW_PAD_CTL_PAD_EIM_DA0 register" bitfld.long 0x8C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x8C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x90 "SW_PAD_CTL_PAD_EIM_DA1,SW_PAD_CTL_PAD_EIM_DA1 register" bitfld.long 0x90 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x90 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x90 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x90 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x90 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x90 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x90 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x90 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x94 "SW_PAD_CTL_PAD_EIM_DA2,SW_PAD_CTL_PAD_EIM_DA2 register" bitfld.long 0x94 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x94 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x94 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x94 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x94 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x94 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x94 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x94 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x98 "SW_PAD_CTL_PAD_EIM_DA3,SW_PAD_CTL_PAD_EIM_DA3 register" bitfld.long 0x98 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x98 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x98 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x98 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x98 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x98 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x98 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x98 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x9C "SW_PAD_CTL_PAD_EIM_DA4,SW_PAD_CTL_PAD_EIM_DA4 register" bitfld.long 0x9C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x9C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x9C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x9C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x9C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x9C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x9C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x9C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA0 "SW_PAD_CTL_PAD_EIM_DA5,SW_PAD_CTL_PAD_EIM_DA5 register" bitfld.long 0xA0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xA0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xA0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA4 "SW_PAD_CTL_PAD_EIM_DA6,SW_PAD_CTL_PAD_EIM_DA6 register" bitfld.long 0xA4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xA4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xA4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA8 "SW_PAD_CTL_PAD_EIM_DA7,SW_PAD_CTL_PAD_EIM_DA7 register" bitfld.long 0xA8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xA8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xA8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xAC "SW_PAD_CTL_PAD_EIM_DA8,SW_PAD_CTL_PAD_EIM_DA8 register" bitfld.long 0xAC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xAC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xAC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xAC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xAC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xAC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xAC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xAC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB0 "SW_PAD_CTL_PAD_EIM_DA9,SW_PAD_CTL_PAD_EIM_DA9 register" bitfld.long 0xB0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xB0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xB0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB4 "SW_PAD_CTL_PAD_EIM_DA10,SW_PAD_CTL_PAD_EIM_DA10 register" bitfld.long 0xB4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xB4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xB4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB8 "SW_PAD_CTL_PAD_EIM_DA11,SW_PAD_CTL_PAD_EIM_DA11 register" bitfld.long 0xB8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xB8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xB8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xBC "SW_PAD_CTL_PAD_EIM_DA12,SW_PAD_CTL_PAD_EIM_DA12 register" bitfld.long 0xBC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xBC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xBC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xBC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xBC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xBC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xBC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xBC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC0 "SW_PAD_CTL_PAD_EIM_DA13,SW_PAD_CTL_PAD_EIM_DA13 register" bitfld.long 0xC0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC4 "SW_PAD_CTL_PAD_EIM_DA14,SW_PAD_CTL_PAD_EIM_DA14 register" bitfld.long 0xC4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC8 "SW_PAD_CTL_PAD_EIM_DA15,SW_PAD_CTL_PAD_EIM_DA15 register" bitfld.long 0xC8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xCC "SW_PAD_CTL_PAD_EIM_WAIT,SW_PAD_CTL_PAD_EIM_WAIT register" bitfld.long 0xCC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xCC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xCC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xCC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xCC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xCC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xCC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xCC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD0 "SW_PAD_CTL_PAD_EIM_BCLK,SW_PAD_CTL_PAD_EIM_BCLK register" bitfld.long 0xD0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xD0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xD0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD4 "SW_PAD_CTL_PAD_DISP_CLK,SW_PAD_CTL_PAD_DISP_CLK register" bitfld.long 0xD4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xD4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xD4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xD8 "SW_PAD_CTL_PAD_DI0_PIN15,SW_PAD_CTL_PAD_DI0_PIN15 register" bitfld.long 0xD8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xD8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xD8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xD8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xD8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xD8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xD8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xD8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xDC "SW_PAD_CTL_PAD_DI0_PIN2,SW_PAD_CTL_PAD_DI0_PIN2 register" bitfld.long 0xDC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xDC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xDC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xDC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xDC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xDC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xDC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xDC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE0 "SW_PAD_CTL_PAD_DI0_PIN3,SW_PAD_CTL_PAD_DI0_PIN3 register" bitfld.long 0xE0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xE0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xE0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xE0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xE0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xE0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE4 "SW_PAD_CTL_PAD_DI0_PIN4,SW_PAD_CTL_PAD_DI0_PIN4 register" bitfld.long 0xE4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xE4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xE4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xE4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xE4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xE4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xE8 "SW_PAD_CTL_PAD_DISP0_DAT0,SW_PAD_CTL_PAD_DISP0_DAT0 register" bitfld.long 0xE8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xE8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xE8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xE8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xE8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xE8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xE8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xE8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xEC "SW_PAD_CTL_PAD_DISP0_DAT1,SW_PAD_CTL_PAD_DISP0_DAT1 register" bitfld.long 0xEC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xEC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xEC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xEC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xEC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xEC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xEC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xEC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF0 "SW_PAD_CTL_PAD_DISP0_DAT2,SW_PAD_CTL_PAD_DISP0_DAT2 register" bitfld.long 0xF0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xF0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xF0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xF0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xF0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xF0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF4 "SW_PAD_CTL_PAD_DISP0_DAT3,SW_PAD_CTL_PAD_DISP0_DAT3 register" bitfld.long 0xF4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xF4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xF4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xF4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xF4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xF4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xF8 "SW_PAD_CTL_PAD_DISP0_DAT4,SW_PAD_CTL_PAD_DISP0_DAT4 register" bitfld.long 0xF8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xF8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xF8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xF8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xF8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xF8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xF8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xF8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xFC "SW_PAD_CTL_PAD_DISP0_DAT5,SW_PAD_CTL_PAD_DISP0_DAT5 register" bitfld.long 0xFC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xFC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xFC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xFC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xFC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xFC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xFC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xFC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x100 "SW_PAD_CTL_PAD_DISP0_DAT6,SW_PAD_CTL_PAD_DISP0_DAT6 register" bitfld.long 0x100 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x100 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x100 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x100 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x100 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x100 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x100 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x100 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x104 "SW_PAD_CTL_PAD_DISP0_DAT7,SW_PAD_CTL_PAD_DISP0_DAT7 register" bitfld.long 0x104 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x104 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x104 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x104 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x104 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x104 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x104 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x104 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x108 "SW_PAD_CTL_PAD_DISP0_DAT8,SW_PAD_CTL_PAD_DISP0_DAT8 register" bitfld.long 0x108 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x108 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x108 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x108 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x108 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x108 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x108 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x108 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10C "SW_PAD_CTL_PAD_DISP0_DAT9,SW_PAD_CTL_PAD_DISP0_DAT9 register" bitfld.long 0x10C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x10C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x10C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x110 "SW_PAD_CTL_PAD_DISP0_DAT10,SW_PAD_CTL_PAD_DISP0_DAT10 register" bitfld.long 0x110 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x110 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x110 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x110 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x110 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x110 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x110 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x110 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x114 "SW_PAD_CTL_PAD_DISP0_DAT11,SW_PAD_CTL_PAD_DISP0_DAT11 register" bitfld.long 0x114 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x114 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x114 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x114 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x114 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x114 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x114 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x114 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x118 "SW_PAD_CTL_PAD_DISP0_DAT12,SW_PAD_CTL_PAD_DISP0_DAT12 register" bitfld.long 0x118 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x118 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x118 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x118 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x118 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x118 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x118 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x118 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x11C "SW_PAD_CTL_PAD_DISP0_DAT13,SW_PAD_CTL_PAD_DISP0_DAT13 register" bitfld.long 0x11C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x11C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x11C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x11C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x11C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x11C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x11C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x11C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x120 "SW_PAD_CTL_PAD_DISP0_DAT14,SW_PAD_CTL_PAD_DISP0_DAT14 register" bitfld.long 0x120 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x120 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x120 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x120 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x120 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x120 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x120 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x120 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x124 "SW_PAD_CTL_PAD_DISP0_DAT15,SW_PAD_CTL_PAD_DISP0_DAT15 register" bitfld.long 0x124 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x124 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x124 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x124 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x124 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x124 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x124 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x124 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x128 "SW_PAD_CTL_PAD_DISP0_DAT16,SW_PAD_CTL_PAD_DISP0_DAT16 register" bitfld.long 0x128 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x128 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x128 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x128 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x128 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x128 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x128 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x128 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x12C "SW_PAD_CTL_PAD_DISP0_DAT17,SW_PAD_CTL_PAD_DISP0_DAT17 register" bitfld.long 0x12C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x12C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x12C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x12C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x12C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x12C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x12C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x12C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x130 "SW_PAD_CTL_PAD_DISP0_DAT18,SW_PAD_CTL_PAD_DISP0_DAT18 register" bitfld.long 0x130 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x130 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x130 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x130 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x130 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x130 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x130 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x130 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x134 "SW_PAD_CTL_PAD_DISP0_DAT19,SW_PAD_CTL_PAD_DISP0_DAT19 register" bitfld.long 0x134 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x134 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x134 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x134 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x134 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x134 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x134 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x134 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x138 "SW_PAD_CTL_PAD_DISP0_DAT20,SW_PAD_CTL_PAD_DISP0_DAT20 register" bitfld.long 0x138 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x138 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x138 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x138 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x138 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x138 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x138 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x138 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x13C "SW_PAD_CTL_PAD_DISP0_DAT21,SW_PAD_CTL_PAD_DISP0_DAT21 register" bitfld.long 0x13C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x13C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x13C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x13C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x13C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x13C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x13C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x13C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x140 "SW_PAD_CTL_PAD_DISP0_DAT22,SW_PAD_CTL_PAD_DISP0_DAT22 register" bitfld.long 0x140 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x140 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x140 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x140 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x140 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x140 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x140 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x140 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x144 "SW_PAD_CTL_PAD_DISP0_DAT23,SW_PAD_CTL_PAD_DISP0_DAT23 register" bitfld.long 0x144 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x144 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x144 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x144 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x144 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x144 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x144 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x144 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x148 "SW_PAD_CTL_PAD_ENET_MDIO,SW_PAD_CTL_PAD_ENET_MDIO register" bitfld.long 0x148 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x148 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x148 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x148 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x148 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x148 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x148 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x148 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14C "SW_PAD_CTL_PAD_ENET_REF_CLK,SW_PAD_CTL_PAD_ENET_REF_CLK register" bitfld.long 0x14C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x14C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x14C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x150 "SW_PAD_CTL_PAD_ENET_RX_ER,SW_PAD_CTL_PAD_ENET_RX_ER register" bitfld.long 0x150 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x150 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x150 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x150 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x150 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x150 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x150 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x150 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x4F0++0xB line.long 0x00 "SW_PAD_CTL_PAD_ENET_CRS_DV,SW_PAD_CTL_PAD_ENET_CRS_DV register" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ODE ,Open Drain Enable" "Disabled,Enabled" rbitfld.long 0x00 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x00 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x04 "SW_PAD_CTL_PAD_ENET_RXD1,SW_PAD_CTL_PAD_ENET_RXD1 register" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x04 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x04 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x04 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x04 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x08 "SW_PAD_CTL_PAD_ENET_RXD0,SW_PAD_CTL_PAD_ENET_RXD0 register" bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x08 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x08 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x08 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " ODE ,Open Drain Enable" "Disabled,Enabled" rbitfld.long 0x08 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x08 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x08 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x4FC++0xF line.long 0x0 "SW_PAD_CTL_PAD_ENET_TX_EN,SW_PAD_CTL_PAD_ENET_TX_EN register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_ENET_TXD1,SW_PAD_CTL_PAD_ENET_TXD1 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_ENET_TXD0,SW_PAD_CTL_PAD_ENET_TXD0 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_ENET_MDC,SW_PAD_CTL_PAD_ENET_MDC register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x50C++0x1F line.long 0x00 "SW_PAD_CTL_PAD_DRAM_SDQS5,SW_PAD_CTL_PAD_DRAM_SDQS5 register" rbitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_PAD_DRAM_DQM5,SW_PAD_CTL_PAD_DRAM_DQM5 register" rbitfld.long 0x04 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x08 "SW_PAD_CTL_PAD_DRAM_DQM4,SW_PAD_CTL_PAD_DRAM_DQM4 register" rbitfld.long 0x08 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x08 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x0C "SW_PAD_CTL_PAD_DRAM_SDQS4,SW_PAD_CTL_PAD_DRAM_SDQS4 register" rbitfld.long 0x0C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x0C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x0C 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x0C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x0C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x0C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x0C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_DRAM_SDQS3,SW_PAD_CTL_PAD_DRAM_SDQS3 register" rbitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_DRAM_DQM3,SW_PAD_CTL_PAD_DRAM_DQM3 register" rbitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x18 "SW_PAD_CTL_PAD_DRAM_SDQS2,SW_PAD_CTL_PAD_DRAM_SDQS2 register" rbitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x1C "SW_PAD_CTL_PAD_DRAM_DQM2,SW_PAD_CTL_PAD_DRAM_DQM2 register" rbitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" group.long 0x52C++0x3F line.long 0x0 "SW_PAD_CTL_PAD_DRAM_A0,SW_PAD_CTL_PAD_DRAM_A0 register" rbitfld.long 0x0 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x4 "SW_PAD_CTL_PAD_DRAM_A1,SW_PAD_CTL_PAD_DRAM_A1 register" rbitfld.long 0x4 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x4 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x8 "SW_PAD_CTL_PAD_DRAM_A2,SW_PAD_CTL_PAD_DRAM_A2 register" rbitfld.long 0x8 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x8 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0xC "SW_PAD_CTL_PAD_DRAM_A3,SW_PAD_CTL_PAD_DRAM_A3 register" rbitfld.long 0xC 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0xC 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x10 "SW_PAD_CTL_PAD_DRAM_A4,SW_PAD_CTL_PAD_DRAM_A4 register" rbitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x14 "SW_PAD_CTL_PAD_DRAM_A5,SW_PAD_CTL_PAD_DRAM_A5 register" rbitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x18 "SW_PAD_CTL_PAD_DRAM_A6,SW_PAD_CTL_PAD_DRAM_A6 register" rbitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x1C "SW_PAD_CTL_PAD_DRAM_A7,SW_PAD_CTL_PAD_DRAM_A7 register" rbitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x20 "SW_PAD_CTL_PAD_DRAM_A8,SW_PAD_CTL_PAD_DRAM_A8 register" rbitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x24 "SW_PAD_CTL_PAD_DRAM_A9,SW_PAD_CTL_PAD_DRAM_A9 register" rbitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x28 "SW_PAD_CTL_PAD_DRAM_A10,SW_PAD_CTL_PAD_DRAM_A10 register" rbitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x2C "SW_PAD_CTL_PAD_DRAM_A11,SW_PAD_CTL_PAD_DRAM_A11 register" rbitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x30 "SW_PAD_CTL_PAD_DRAM_A12,SW_PAD_CTL_PAD_DRAM_A12 register" rbitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x34 "SW_PAD_CTL_PAD_DRAM_A13,SW_PAD_CTL_PAD_DRAM_A13 register" rbitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x38 "SW_PAD_CTL_PAD_DRAM_A14,SW_PAD_CTL_PAD_DRAM_A14 register" rbitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x3C "SW_PAD_CTL_PAD_DRAM_A15,SW_PAD_CTL_PAD_DRAM_A15 register" rbitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,?..." group.long 0x56C++0x5B line.long 0x00 "SW_PAD_CTL_PAD_DRAM_CAS,SW_PAD_CTL_PAD_DRAM_CAS register" rbitfld.long 0x00 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x00 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_PAD_DRAM_CS0,SW_PAD_CTL_PAD_DRAM_CS0 register" rbitfld.long 0x04 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x04 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x04 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x04 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x08 "SW_PAD_CTL_PAD_DRAM_CS1,SW_PAD_CTL_PAD_DRAM_CS1 register" rbitfld.long 0x08 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x08 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x08 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x0C "SW_PAD_CTL_PAD_DRAM_RAS,SW_PAD_CTL_PAD_DRAM_RAS register" rbitfld.long 0x0C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x0C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x0C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x0C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x10 "SW_PAD_CTL_PAD_DRAM_RESET,SW_PAD_CTL_PAD_DRAM_RESET register" bitfld.long 0x10 18.--19. " DDR_SEL ,DDR Select" "DDR3 and LPDDR2,?..." bitfld.long 0x10 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x14 "SW_PAD_CTL_PAD_DRAM_SDBA0,SW_PAD_CTL_PAD_DRAM_SDBA0 register" rbitfld.long 0x14 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x14 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x18 "SW_PAD_CTL_PAD_DRAM_SDBA1,SW_PAD_CTL_PAD_DRAM_SDBA1 register" rbitfld.long 0x18 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x18 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x1C "SW_PAD_CTL_PAD_DRAM_SDCLK_0,SW_PAD_CTL_PAD_DRAM_SDCLK_0 register" rbitfld.long 0x1C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x1C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x20 "SW_PAD_CTL_PAD_DRAM_SDBA2,SW_PAD_CTL_PAD_DRAM_SDBA2 register" rbitfld.long 0x20 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x20 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x24 "SW_PAD_CTL_PAD_DRAM_SDCKE0,SW_PAD_CTL_PAD_DRAM_SDCKE0 register" rbitfld.long 0x24 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x24 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x28 "SW_PAD_CTL_PAD_DRAM_SDCLK_1,SW_PAD_CTL_PAD_DRAM_SDCLK_1 register" rbitfld.long 0x28 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x28 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x2C "SW_PAD_CTL_PAD_DRAM_SDCKE1,SW_PAD_CTL_PAD_DRAM_SDCKE1 register" rbitfld.long 0x2C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x30 "SW_PAD_CTL_PAD_DRAM_SDODT0,SW_PAD_CTL_PAD_DRAM_SDODT0 register" rbitfld.long 0x30 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x30 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x34 "SW_PAD_CTL_PAD_DRAM_SDODT1,SW_PAD_CTL_PAD_DRAM_SDODT1 register" rbitfld.long 0x34 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x34 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x38 "SW_PAD_CTL_PAD_DRAM_SDWE,SW_PAD_CTL_PAD_DRAM_SDWE register" rbitfld.long 0x38 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x38 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " rbitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,?..." line.long 0x3C "SW_PAD_CTL_PAD_DRAM_SDQS0,SW_PAD_CTL_PAD_DRAM_SDQS0 register" rbitfld.long 0x3C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x3C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x3C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x40 "SW_PAD_CTL_PAD_DRAM_DQM0,SW_PAD_CTL_PAD_DRAM_DQM0 register" rbitfld.long 0x40 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x40 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x44 "SW_PAD_CTL_PAD_DRAM_SDQS1,SW_PAD_CTL_PAD_DRAM_SDQS1 register" rbitfld.long 0x44 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x44 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x44 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x48 "SW_PAD_CTL_PAD_DRAM_DQM1,SW_PAD_CTL_PAD_DRAM_DQM1 register" rbitfld.long 0x48 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x48 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x4C "SW_PAD_CTL_PAD_DRAM_SDQS6,SW_PAD_CTL_PAD_DRAM_SDQS6 register" rbitfld.long 0x4C 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x4C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x4C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x50 "SW_PAD_CTL_PAD_DRAM_DQM6,SW_PAD_CTL_PAD_DRAM_DQM6 register" rbitfld.long 0x50 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x50 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x54 "SW_PAD_CTL_PAD_DRAM_SDQS7,SW_PAD_CTL_PAD_DRAM_SDQS7 register" rbitfld.long 0x54 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." rbitfld.long 0x54 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,?..." rbitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,?..." bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" textline " " bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" bitfld.long 0x54 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x58 "SW_PAD_CTL_PAD_DRAM_DQM7,SW_PAD_CTL_PAD_DRAM_DQM7 register" rbitfld.long 0x58 18.--19. " DDR_SEL ,DDR Select" "LPDDR1/DDR3/DDR2 ODT,?..." bitfld.long 0x58 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" textline " " bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" group.long 0x5c8++0x27 line.long 0x0 "SW_PAD_CTL_PAD_KEY_COL0,SW_PAD_CTL_PAD_KEY_COL0 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long (0x0+0x04) "SW_PAD_CTL_PAD_KEY_ROW0,SW_PAD_CTL_PAD_KEY_ROW0 register" bitfld.long (0x0+0x04) 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long (0x0+0x04) 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long (0x0+0x04) 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long (0x0+0x04) 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long (0x0+0x04) 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long (0x0+0x04) 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long (0x0+0x04) 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long (0x0+0x04) 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_KEY_COL1,SW_PAD_CTL_PAD_KEY_COL1 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long (0x8+0x04) "SW_PAD_CTL_PAD_KEY_ROW1,SW_PAD_CTL_PAD_KEY_ROW1 register" bitfld.long (0x8+0x04) 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long (0x8+0x04) 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long (0x8+0x04) 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long (0x8+0x04) 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long (0x8+0x04) 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long (0x8+0x04) 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long (0x8+0x04) 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long (0x8+0x04) 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_KEY_COL2,SW_PAD_CTL_PAD_KEY_COL2 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long (0x10+0x04) "SW_PAD_CTL_PAD_KEY_ROW2,SW_PAD_CTL_PAD_KEY_ROW2 register" bitfld.long (0x10+0x04) 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long (0x10+0x04) 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long (0x10+0x04) 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long (0x10+0x04) 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long (0x10+0x04) 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long (0x10+0x04) 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long (0x10+0x04) 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long (0x10+0x04) 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_KEY_COL3,SW_PAD_CTL_PAD_KEY_COL3 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long (0x18+0x04) "SW_PAD_CTL_PAD_KEY_ROW3,SW_PAD_CTL_PAD_KEY_ROW3 register" bitfld.long (0x18+0x04) 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long (0x18+0x04) 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long (0x18+0x04) 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long (0x18+0x04) 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long (0x18+0x04) 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long (0x18+0x04) 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long (0x18+0x04) 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long (0x18+0x04) 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_KEY_COL4,SW_PAD_CTL_PAD_KEY_COL4 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long (0x20+0x04) "SW_PAD_CTL_PAD_KEY_ROW4,SW_PAD_CTL_PAD_KEY_ROW4 register" bitfld.long (0x20+0x04) 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long (0x20+0x04) 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long (0x20+0x04) 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long (0x20+0x04) 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long (0x20+0x04) 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long (0x20+0x04) 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long (0x20+0x04) 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long (0x20+0x04) 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x5F0++0x87 line.long 0x0 "SW_PAD_CTL_PAD_GPIO_0,SW_PAD_CTL_PAD_GPIO_0 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" rbitfld.long 0x0 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_GPIO_1,SW_PAD_CTL_PAD_GPIO_1 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_GPIO_9,SW_PAD_CTL_PAD_GPIO_9 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_GPIO_3,SW_PAD_CTL_PAD_GPIO_3 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_GPIO_6,SW_PAD_CTL_PAD_GPIO_6 register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_GPIO_2,SW_PAD_CTL_PAD_GPIO_2 register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_GPIO_4,SW_PAD_CTL_PAD_GPIO_4 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_GPIO_5,SW_PAD_CTL_PAD_GPIO_5 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_GPIO_7,SW_PAD_CTL_PAD_GPIO_7 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_GPIO_8,SW_PAD_CTL_PAD_GPIO_8 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_GPIO_16,SW_PAD_CTL_PAD_GPIO_16 register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_GPIO_17,SW_PAD_CTL_PAD_GPIO_17 register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" rbitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",,100MHz,?..." bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_GPIO_18,SW_PAD_CTL_PAD_GPIO_18 register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_GPIO_19,SW_PAD_CTL_PAD_GPIO_19 register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_CSI0_PIXCLK,SW_PAD_CTL_PAD_CSI0_PIXCLK register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_CSI0_MCLK,SW_PAD_CTL_PAD_CSI0_MCLK register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_CSI0_DATA_EN,SW_PAD_CTL_PAD_CSI0_DATA_EN register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_CSI0_VSYNC,SW_PAD_CTL_PAD_CSI0_VSYNC register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_CSI0_DAT4,SW_PAD_CTL_PAD_CSI0_DAT4 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_CSI0_DAT5,SW_PAD_CTL_PAD_CSI0_DAT5 register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_CSI0_DAT6,SW_PAD_CTL_PAD_CSI0_DAT6 register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_CSI0_DAT7,SW_PAD_CTL_PAD_CSI0_DAT7 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_CSI0_DAT8,SW_PAD_CTL_PAD_CSI0_DAT8 register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_CSI0_DAT9,SW_PAD_CTL_PAD_CSI0_DAT9 register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_CSI0_DAT10,SW_PAD_CTL_PAD_CSI0_DAT10 register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_CSI0_DAT11,SW_PAD_CTL_PAD_CSI0_DAT11 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_CSI0_DAT12,SW_PAD_CTL_PAD_CSI0_DAT12 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_CSI0_DAT13,SW_PAD_CTL_PAD_CSI0_DAT13 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_CSI0_DAT14,SW_PAD_CTL_PAD_CSI0_DAT14 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_CSI0_DAT15,SW_PAD_CTL_PAD_CSI0_DAT15 register" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_CSI0_DAT16,SW_PAD_CTL_PAD_CSI0_DAT16 register" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_CSI0_DAT17,SW_PAD_CTL_PAD_CSI0_DAT17 register" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_CSI0_DAT18,SW_PAD_CTL_PAD_CSI0_DAT18 register" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_CSI0_DAT19,SW_PAD_CTL_PAD_CSI0_DAT19 register" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" "50MHz,100MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "Disabled,260 Ohm,130 Ohm,90 Ohm,60 Ohm,50 Ohm,40 Ohm,33 Ohm" bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" group.long 0x678++0x13 line.long 0x0 "SW_PAD_CTL_PAD_JTAG_TMS,SW_PAD_CTL_PAD_JTAG_TMS register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" rbitfld.long 0x0 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,?..." rbitfld.long 0x0 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." rbitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x4 "SW_PAD_CTL_PAD_JTAG_MOD,SW_PAD_CTL_PAD_JTAG_MOD register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" rbitfld.long 0x4 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,?..." rbitfld.long 0x4 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." rbitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x8 "SW_PAD_CTL_PAD_JTAG_TRSTB,SW_PAD_CTL_PAD_JTAG_TRSTB register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" rbitfld.long 0x8 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,?..." rbitfld.long 0x8 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." rbitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,?..." line.long 0xC "SW_PAD_CTL_PAD_JTAG_TDI,SW_PAD_CTL_PAD_JTAG_TDI register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" rbitfld.long 0xC 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,?..." rbitfld.long 0xC 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." rbitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,?..." line.long 0x10 "SW_PAD_CTL_PAD_JTAG_TCK,SW_PAD_CTL_PAD_JTAG_TCK register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" rbitfld.long 0x10 13. " PUE ,Pull/keep Select" ",Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,?..." rbitfld.long 0x10 3.--5. " DSE ,Drive Strength" ",,,,60 Ohm,?..." rbitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,?..." group.long 0x68C++0x3 line.long 0x00 "SW_PAD_CTL_PAD_JTAG_TDO,SW_PAD_CTL_PAD_JTAG_TDO register" rbitfld.long 0x00 16. " HYS ,Hysteresis Enable" "Disabled,?..." rbitfld.long 0x00 14.--15. " PUS ,Pull Up/down select" ",,100KOhm Pull Up,?..." rbitfld.long 0x00 13. " PUE ,Pull/keep Select" "Keeper,?..." bitfld.long 0x00 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " ODE ,Open Drain Enable" "Disabled,?..." rbitfld.long 0x00 6.--7. " SPEED ,Speed select" ",,100MHz,?..." rbitfld.long 0x00 3.--5. " DSE ,Drive Strength" ",,,,,,40 Ohm,?..." rbitfld.long 0x00 0. " SRE ,Slew Rate" ",Fast" group.long 0x690++0xB7 line.long 0x0 "SW_PAD_CTL_PAD_SD3_DAT7,SW_PAD_CTL_PAD_SD3_DAT7 register" bitfld.long 0x0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4 "SW_PAD_CTL_PAD_SD3_DAT6,SW_PAD_CTL_PAD_SD3_DAT6 register" bitfld.long 0x4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8 "SW_PAD_CTL_PAD_SD3_DAT5,SW_PAD_CTL_PAD_SD3_DAT5 register" bitfld.long 0x8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xC "SW_PAD_CTL_PAD_SD3_DAT4,SW_PAD_CTL_PAD_SD3_DAT4 register" bitfld.long 0xC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x10 "SW_PAD_CTL_PAD_SD3_CMD,SW_PAD_CTL_PAD_SD3_CMD register" bitfld.long 0x10 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x10 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x10 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x10 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x10 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x10 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x14 "SW_PAD_CTL_PAD_SD3_CLK,SW_PAD_CTL_PAD_SD3_CLK register" bitfld.long 0x14 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x14 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x14 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x14 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x14 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x14 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x14 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x18 "SW_PAD_CTL_PAD_SD3_DAT0,SW_PAD_CTL_PAD_SD3_DAT0 register" bitfld.long 0x18 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x18 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x18 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x18 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x18 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x18 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x18 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x1C "SW_PAD_CTL_PAD_SD3_DAT1,SW_PAD_CTL_PAD_SD3_DAT1 register" bitfld.long 0x1C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x1C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x1C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x1C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x1C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x1C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x1C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x20 "SW_PAD_CTL_PAD_SD3_DAT2,SW_PAD_CTL_PAD_SD3_DAT2 register" bitfld.long 0x20 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x20 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x20 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x20 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x20 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x20 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x24 "SW_PAD_CTL_PAD_SD3_DAT3,SW_PAD_CTL_PAD_SD3_DAT3 register" bitfld.long 0x24 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x24 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x24 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x24 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x24 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x28 "SW_PAD_CTL_PAD_SD3_RST,SW_PAD_CTL_PAD_SD3_RST register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x28 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x28 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x28 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x28 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x28 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x2C "SW_PAD_CTL_PAD_NANDF_CLE,SW_PAD_CTL_PAD_NANDF_CLE register" bitfld.long 0x2C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x2C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x2C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x2C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x2C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x2C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x2C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x30 "SW_PAD_CTL_PAD_NANDF_ALE,SW_PAD_CTL_PAD_NANDF_ALE register" bitfld.long 0x30 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x30 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x30 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x30 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x30 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x30 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x30 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x34 "SW_PAD_CTL_PAD_NANDF_WP_B,SW_PAD_CTL_PAD_NANDF_WP_B register" bitfld.long 0x34 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x34 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x34 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x34 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x34 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x34 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x34 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x34 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x38 "SW_PAD_CTL_PAD_NANDF_RB0,SW_PAD_CTL_PAD_NANDF_RB0 register" bitfld.long 0x38 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x38 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x38 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x38 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x38 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x38 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x38 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x3C "SW_PAD_CTL_PAD_NANDF_CS0,SW_PAD_CTL_PAD_NANDF_CS0 register" bitfld.long 0x3C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x3C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x3C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x3C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x3C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x3C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x40 "SW_PAD_CTL_PAD_NANDF_CS1,SW_PAD_CTL_PAD_NANDF_CS1 register" bitfld.long 0x40 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x40 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x40 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x40 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x40 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x40 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x40 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x44 "SW_PAD_CTL_PAD_NANDF_CS2,SW_PAD_CTL_PAD_NANDF_CS2 register" bitfld.long 0x44 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x44 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x44 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x44 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x44 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x44 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x44 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x48 "SW_PAD_CTL_PAD_NANDF_CS3,SW_PAD_CTL_PAD_NANDF_CS3 register" bitfld.long 0x48 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x48 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x48 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x48 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x48 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x48 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x48 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x48 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x4C "SW_PAD_CTL_PAD_SD4_CMD,SW_PAD_CTL_PAD_SD4_CMD register" bitfld.long 0x4C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x4C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x4C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x4C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x4C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x4C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x50 "SW_PAD_CTL_PAD_SD4_CLK,SW_PAD_CTL_PAD_SD4_CLK register" bitfld.long 0x50 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x50 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x50 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x50 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x50 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x50 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x50 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x50 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x54 "SW_PAD_CTL_PAD_NANDF_D0,SW_PAD_CTL_PAD_NANDF_D0 register" bitfld.long 0x54 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x54 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x54 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x54 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x54 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x54 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x54 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x58 "SW_PAD_CTL_PAD_NANDF_D1,SW_PAD_CTL_PAD_NANDF_D1 register" bitfld.long 0x58 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x58 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x58 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x58 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x58 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x58 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x58 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x5C "SW_PAD_CTL_PAD_NANDF_D2,SW_PAD_CTL_PAD_NANDF_D2 register" bitfld.long 0x5C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x5C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x5C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x5C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x5C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x5C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x60 "SW_PAD_CTL_PAD_NANDF_D3,SW_PAD_CTL_PAD_NANDF_D3 register" bitfld.long 0x60 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x60 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x60 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x60 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x60 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x60 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x64 "SW_PAD_CTL_PAD_NANDF_D4,SW_PAD_CTL_PAD_NANDF_D4 register" bitfld.long 0x64 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x64 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x64 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x64 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x64 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x64 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x64 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x64 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x68 "SW_PAD_CTL_PAD_NANDF_D5,SW_PAD_CTL_PAD_NANDF_D5 register" bitfld.long 0x68 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x68 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x68 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x68 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x68 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x68 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x68 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x68 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x6C "SW_PAD_CTL_PAD_NANDF_D6,SW_PAD_CTL_PAD_NANDF_D6 register" bitfld.long 0x6C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x6C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x6C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x6C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x6C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x6C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x6C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x70 "SW_PAD_CTL_PAD_NANDF_D7,SW_PAD_CTL_PAD_NANDF_D7 register" bitfld.long 0x70 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x70 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x70 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x70 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x70 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x70 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x70 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x70 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x74 "SW_PAD_CTL_PAD_SD4_DAT0,SW_PAD_CTL_PAD_SD4_DAT0 register" bitfld.long 0x74 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x74 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x74 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x74 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x74 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x74 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x74 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x74 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x78 "SW_PAD_CTL_PAD_SD4_DAT1,SW_PAD_CTL_PAD_SD4_DAT1 register" bitfld.long 0x78 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x78 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x78 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x78 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x78 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x78 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x78 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x78 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x7C "SW_PAD_CTL_PAD_SD4_DAT2,SW_PAD_CTL_PAD_SD4_DAT2 register" bitfld.long 0x7C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x7C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x7C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x7C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x7C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x7C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x7C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x80 "SW_PAD_CTL_PAD_SD4_DAT3,SW_PAD_CTL_PAD_SD4_DAT3 register" bitfld.long 0x80 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x80 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x80 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x80 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x80 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x80 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x80 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x80 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x84 "SW_PAD_CTL_PAD_SD4_DAT4,SW_PAD_CTL_PAD_SD4_DAT4 register" bitfld.long 0x84 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x84 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x84 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x84 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x84 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x84 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x84 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x84 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x88 "SW_PAD_CTL_PAD_SD4_DAT5,SW_PAD_CTL_PAD_SD4_DAT5 register" bitfld.long 0x88 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x88 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x88 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x88 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x88 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x88 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x88 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x88 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x8C "SW_PAD_CTL_PAD_SD4_DAT6,SW_PAD_CTL_PAD_SD4_DAT6 register" bitfld.long 0x8C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x8C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x8C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x8C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x8C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x8C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x8C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x8C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x90 "SW_PAD_CTL_PAD_SD4_DAT7,SW_PAD_CTL_PAD_SD4_DAT7 register" bitfld.long 0x90 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x90 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x90 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x90 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x90 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x90 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x90 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x90 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x94 "SW_PAD_CTL_PAD_SD1_DAT1,SW_PAD_CTL_PAD_SD1_DAT1 register" bitfld.long 0x94 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x94 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x94 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x94 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x94 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x94 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x94 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x94 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x98 "SW_PAD_CTL_PAD_SD1_DAT0,SW_PAD_CTL_PAD_SD1_DAT0 register" bitfld.long 0x98 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x98 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x98 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x98 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x98 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x98 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x98 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x98 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0x9C "SW_PAD_CTL_PAD_SD1_DAT3,SW_PAD_CTL_PAD_SD1_DAT3 register" bitfld.long 0x9C 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0x9C 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0x9C 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0x9C 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0x9C 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0x9C 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0x9C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0x9C 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA0 "SW_PAD_CTL_PAD_SD1_CMD,SW_PAD_CTL_PAD_SD1_CMD register" bitfld.long 0xA0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA4 "SW_PAD_CTL_PAD_SD1_DAT2,SW_PAD_CTL_PAD_SD1_DAT2 register" bitfld.long 0xA4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA4 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xA8 "SW_PAD_CTL_PAD_SD1_CLK,SW_PAD_CTL_PAD_SD1_CLK register" bitfld.long 0xA8 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xA8 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xA8 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xA8 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xA8 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xA8 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xA8 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xA8 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xAC "SW_PAD_CTL_PAD_SD2_CLK,SW_PAD_CTL_PAD_SD2_CLK register" bitfld.long 0xAC 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xAC 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xAC 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xAC 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xAC 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xAC 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xAC 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xAC 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB0 "SW_PAD_CTL_PAD_SD2_CMD,SW_PAD_CTL_PAD_SD2_CMD register" bitfld.long 0xB0 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB0 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB0 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB0 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB0 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB0 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB0 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xB0 0. " SRE ,Slew Rate" "Slow,Fast" line.long 0xB4 "SW_PAD_CTL_PAD_SD2_DAT3,SW_PAD_CTL_PAD_SD2_DAT3 register" bitfld.long 0xB4 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" bitfld.long 0xB4 14.--15. " PUS ,Pull Up/down select" "100KOhm Pull Down,47KOhm Pull Up,100KOhm Pull Up,22KOhm Pull Up" bitfld.long 0xB4 13. " PUE ,Pull/keep Select" "Keeper,Pull" bitfld.long 0xB4 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" textline " " bitfld.long 0xB4 11. " ODE ,Open Drain Enable" "Disabled,Enabled" bitfld.long 0xB4 6.--7. " SPEED ,Speed select" ",50MHz,100MHz,200MHz" bitfld.long 0xB4 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" bitfld.long 0xB4 0. " SRE ,Slew Rate" "Slow,Fast" tree.end tree "SW_PAD_CTL_GRP Registers" width 31. group.long 0x748++0x67 line.long 0x00 "SW_PAD_CTL_GRP_B7DS,SW_PAD_CTL_GRP_B7DS register" bitfld.long 0x00 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x04 "SW_PAD_CTL_GRP_ADDDS,SW_PAD_CTL_GRP_ADDDS register" bitfld.long 0x04 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x08 "SW_PAD_CTL_GRP_DDRMODE_CTL,SW_PAD_CTL_GRP_DDRMODE_CTL register" bitfld.long 0x08 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x0C "SW_PAD_CTL_GRP_TERM_CTL0,SW_PAD_CTL_GRP_TERM_CTL0 register" bitfld.long 0x0C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x10 "SW_PAD_CTL_GRP_DDRPKE,SW_PAD_CTL_GRP_DDRPKE register" bitfld.long 0x10 12. " PKE ,Pull/keep Enable" "Disabled,Enabled" line.long 0x14 "SW_PAD_CTL_GRP_TERM_CTL1,SW_PAD_CTL_GRP_TERM_CTL1 register" bitfld.long 0x14 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x18 "SW_PAD_CTL_GRP_TERM_CTL2,SW_PAD_CTL_GRP_TERM_CTL2 register" bitfld.long 0x18 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x1C "SW_PAD_CTL_GRP_TERM_CTL3,SW_PAD_CTL_GRP_TERM_CTL3 register" bitfld.long 0x1C 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x20 "SW_PAD_CTL_GRP_DDRPK,SW_PAD_CTL_GRP_DDRPK register" bitfld.long 0x20 13. " PUE ,Pull/keep Select" "Keeper,Pull" line.long 0x24 "SW_PAD_CTL_GRP_TERM_CTL4,SW_PAD_CTL_GRP_TERM_CTL4 register" bitfld.long 0x24 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x28 "SW_PAD_CTL_GRP_DDRHYS,SW_PAD_CTL_GRP_DDRHYS register" bitfld.long 0x28 16. " HYS ,Hysteresis Enable" "Disabled,Enabled" line.long 0x2C "SW_PAD_CTL_GRP_DDRMODE,SW_PAD_CTL_GRP_DDRMODE register" bitfld.long 0x2C 17. " DDR_INPUT ,DDR/CMOS Input Mode" "CMOS,Differential" line.long 0x30 "SW_PAD_CTL_GRP_TERM_CTL5,SW_PAD_CTL_GRP_TERM_CTL5 register" bitfld.long 0x30 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x34 "SW_PAD_CTL_GRP_TERM_CTL6,SW_PAD_CTL_GRP_TERM_CTL6 register" bitfld.long 0x34 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x38 "SW_PAD_CTL_GRP_TERM_CTL7,SW_PAD_CTL_GRP_TERM_CTL7 register" bitfld.long 0x38 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" line.long 0x3C "SW_PAD_CTL_GRP_B0DS,SW_PAD_CTL_GRP_B0DS register" bitfld.long 0x3C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x40 "SW_PAD_CTL_GRP_B1DS,SW_PAD_CTL_GRP_B1DS register" bitfld.long 0x40 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x44 "SW_PAD_CTL_GRP_CTLDS,SW_PAD_CTL_GRP_CTLDS register" bitfld.long 0x44 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x48 "SW_PAD_CTL_GRP_DDR_TYPE_RGMII,SW_PAD_CTL_GRP_DDR_TYPE_RGMII register" bitfld.long 0x48 18.--19. " DDR_SEL ,DDR Select" ",,1P2V_IO,1P5V_IO" line.long 0x4C "SW_PAD_CTL_GRP_B2DS,SW_PAD_CTL_GRP_B2DS register" bitfld.long 0x4C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x50 "SW_PAD_CTL_GRP_DDR_TYPE,SW_PAD_CTL_GRP_DDR_TYPE register" bitfld.long 0x50 18.--19. " DDR_SEL ,DDR Select" ",,LPDDR2,DDR3" line.long 0x54 "SW_PAD_CTL_GRP_B3DS,SW_PAD_CTL_GRP_B3DS register" bitfld.long 0x54 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x58 "SW_PAD_CTL_GRP_B4DS,SW_PAD_CTL_GRP_B4DS register" bitfld.long 0x58 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x5C "SW_PAD_CTL_GRP_B5DS,SW_PAD_CTL_GRP_B5DS register" bitfld.long 0x5C 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x60 "SW_PAD_CTL_GRP_B6DS,SW_PAD_CTL_GRP_B6DS register" bitfld.long 0x60 3.--5. " DSE ,Drive Strength" "Disabled,240 Ohm,120 Ohm,80 Ohm,60 Ohm,48 Ohm,40 Ohm,34 Ohm" line.long 0x64 "SW_PAD_CTL_GRP_RGMII_TERM,SW_PAD_CTL_GRP_RGMII_TERM register" bitfld.long 0x64 8.--10. " ODT ,On Die Termination" "Disabled,120 Ohm ODT,60 Ohm ODT,40 Ohm ODT,30 Ohm ODT,24 Ohm ODT,20 Ohm ODT,17 Ohm ODT" tree.end tree "SELECT_INPUT Registers" width 44. group.long 0x7B0++0x3B line.long 0x00 "ASRC_ASRCK_CLOCK_6_SELECT_INPUT,ASRC_ASRCK_CLOCK_6_SELECT_INPUT register" bitfld.long 0x00 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;KEY_ROW3,ALT3;GPIO_0,ALT4;GPIO_18,?..." line.long 0x04 "AUDMUX_P4_INPUT_DA_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_DA_AMX_SELECT_INPUT register" bitfld.long 0x04 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;SD2_DAT0,ALT3;DISP0_DAT23" line.long 0x08 "AUDMUX_P4_INPUT_DB_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_DB_AMX_SELECT_INPUT register" bitfld.long 0x08 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;SD2_DAT2,ALT3;DISP0_DAT21" line.long 0x0C "AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT register" bitfld.long 0x0C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT19,ALT3;SD2_CMD" line.long 0x10 "AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT register" bitfld.long 0x10 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT18,ALT3;SD2_CLK" line.long 0x14 "AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT register" bitfld.long 0x14 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT20,ALT3;SD2_DAT3" line.long 0x18 "AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT,AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT register" bitfld.long 0x18 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;SD2_DAT1,ALT3;DISP0_DAT22" line.long 0x1C "AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT register" bitfld.long 0x1C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT19,ALT2;KEY_ROW1" line.long 0x20 "AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT register" bitfld.long 0x20 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT17,ALT2;KEY_ROW0" line.long 0x24 "AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT register" bitfld.long 0x24 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D25,ALT3;DISP0_DAT14" line.long 0x28 "AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT register" bitfld.long 0x28 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D24,ALT3;DISP0_DAT13" line.long 0x2C "AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT register" bitfld.long 0x2C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT16,ALT2;KEY_COL0" line.long 0x30 "AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT,AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT register" bitfld.long 0x30 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DISP0_DAT18,ALT2;KEY_COL1" line.long 0x34 "CAN1_IPP_IND_CANRX_SELECT_INPUT,CAN1_IPP_IND_CANRX_SELECT_INPUT register" bitfld.long 0x34 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;KEY_ROW2,ALT3;GPIO_8,ALT2;SD3_CLK,?..." line.long 0x38 "CAN2_IPP_IND_CANRX_SELECT_INPUT,CAN2_IPP_IND_CANRX_SELECT_INPUT register" bitfld.long 0x38 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;KEY_ROW4,ALT2;SD3_DAT1" group.long 0x7F0++0x15F line.long 0x00 "CCM_PMIC_VFUNCIONAL_READY_SELECT_INPUT,CCM_PMIC_VFUNCIONAL_READY_SELECT_INPUT register" bitfld.long 0x00 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_EB0,ALT2;GPIO_17" line.long 0x04 "ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT,ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT register" bitfld.long 0x04 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D16,ALT2;DISP0_DAT20,ALT0;KEY_COL0,ALT2;CSI0_DAT4" line.long 0x08 "ECSPI1_IPP_IND_MISO_SELECT_INPUT,ECSPI1_IPP_IND_MISO_SELECT_INPUT register" bitfld.long 0x08 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D17,ALT2;DISP0_DAT22,ALT0;KEY_COL1,ALT2;CSI0_DAT6" line.long 0x0C "ECSPI1_IPP_IND_MOSI_SELECT_INPUT,ECSPI1_IPP_IND_MOSI_SELECT_INPUT register" bitfld.long 0x0C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D18,ALT2;DISP0_DAT21,ALT0;KEY_ROW0,ALT2;CSI0_DAT5" line.long 0x10 "ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x10 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_EB2,ALT2;DISP0_DAT23,ALT0;KEY_ROW1,ALT2;CSI0_DAT7" line.long 0x14 "ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT register" bitfld.long 0x14 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D19,ALT2;DISP0_DAT15,ALT0;KEY_COL2,?..." line.long 0x18 "ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT register" bitfld.long 0x18 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D24,ALT0;KEY_ROW2" line.long 0x1C "ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT,ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT register" bitfld.long 0x1C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D25,ALT0;KEY_COL3" line.long 0x20 "ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT,ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT register" bitfld.long 0x20 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_CS0,ALT2;DISP0_DAT19,ALT2;CSI0_DAT8,?..." line.long 0x24 "ECSPI2_IPP_IND_MISO_SELECT_INPUT,ECSPI2_IPP_IND_MISO_SELECT_INPUT register" bitfld.long 0x24 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_OE,ALT2;DISP0_DAT17,ALT2;CSI0_DAT10,?..." line.long 0x28 "ECSPI2_IPP_IND_MOSI_SELECT_INPUT,ECSPI2_IPP_IND_MOSI_SELECT_INPUT register" bitfld.long 0x28 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_CS1,ALT2;DISP0_DAT16,ALT2;CSI0_DAT9,?..." line.long 0x2C "ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x2C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_RW,ALT2;DISP0_DAT18,ALT2;CSI0_DAT11,?..." line.long 0x30 "ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT,ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT register" bitfld.long 0x30 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_LBA,ALT3;DISP0_DAT15" line.long 0x34 "ECSPI4_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI4_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x34 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D20,ALT2;EIM_D29" line.long 0x38 "ECSPI5_IPP_CSPI_CLK_IN_SELECT_INPUT,ECSPI5_IPP_CSPI_CLK_IN_SELECT_INPUT register" bitfld.long 0x38 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;SD1_CLK,ALT1;SD2_CLK" line.long 0x3C "ECSPI5_IPP_IND_MISO_SELECT_INPUT,ECSPI5_IPP_IND_MISO_SELECT_INPUT register" bitfld.long 0x3C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;SD2_DAT0,ALT1;SD1_DAT0" line.long 0x40 "ECSPI5_IPP_IND_MOSI_SELECT_INPUT,ECSPI5_IPP_IND_MOSI_SELECT_INPUT register" bitfld.long 0x40 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;SD1_CMD,ALT1;SD2_CMD" line.long 0x44 "ECSPI5_IPP_IND_SS_B_0_SELECT_INPUT,ECSPI5_IPP_IND_SS_B_0_SELECT_INPUT register" bitfld.long 0x44 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;SD2_DAT1,ALT1;SD1_DAT1" line.long 0x48 "ECSPI5_IPP_IND_SS_B_1_SELECT_INPUT,ECSPI5_IPP_IND_SS_B_1_SELECT_INPUT register" bitfld.long 0x48 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;SD2_DAT2,ALT1;SD1_DAT2" line.long 0x4C "ENET_IPG_CLK_RMII_SELECT_INPUT,ENET_IPG_CLK_RMII_SELECT_INPUT register" bitfld.long 0x4C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT7;RGMII_TX_CTL,ALT2;GPIO_16" line.long 0x50 "ENET_IPP_IND_MAC0_MDIO_SELECT_INPUT,ENET_IPP_IND_MAC0_MDIO_SELECT_INPUT register" bitfld.long 0x50 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;ENET_MDIO,ALT1;KEY_COL1" line.long 0x54 "ENET_IPP_IND_MAC0_RXCLK_SELECT_INPUT,ENET_IPP_IND_MAC0_RXCLK_SELECT_INPUT register" bitfld.long 0x54 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RXC,ALT1;GPIO_18" line.long 0x58 "ENET_IPP_IND_MAC0_RXDATA_0_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_0_SELECT_INPUT register" bitfld.long 0x58 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RD0,ALT1;ENET_RXD0" line.long 0x5C "ENET_IPP_IND_MAC0_RXDATA_1_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_1_SELECT_INPUT register" bitfld.long 0x5C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RD1,ALT1;ENET_RXD1" line.long 0x60 "ENET_IPP_IND_MAC0_RXDATA_2_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_2_SELECT_INPUT register" bitfld.long 0x60 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RD2,ALT1;KEY_COL2" line.long 0x64 "ENET_IPP_IND_MAC0_RXDATA_3_SELECT_INPUT,ENET_IPP_IND_MAC0_RXDATA_3_SELECT_INPUT register" bitfld.long 0x64 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RD3,ALT1;KEY_COL0" line.long 0x68 "ENET_IPP_IND_MAC0_RXEN_SELECT_INPUT,ENET_IPP_IND_MAC0_RXEN_SELECT_INPUT register" bitfld.long 0x68 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;RGMII_RX_CTL,ALT1;ENET_CRS_DV" line.long 0x6C "ESAI1_IPP_IND_FSR_SELECT_INPUT,ESAI1_IPP_IND_FSR_SELECT_INPUT register" bitfld.long 0x6C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_REF_CLK,ALT0;GPIO_9" line.long 0x70 "ESAI1_IPP_IND_FST_SELECT_INPUT,ESAI1_IPP_IND_FST_SELECT_INPUT register" bitfld.long 0x70 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RXD1,ALT0;GPIO_2" line.long 0x74 "ESAI1_IPP_IND_HCKR_SELECT_INPUT,ESAI1_IPP_IND_HCKR_SELECT_INPUT register" bitfld.long 0x74 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RX_ER,ALT0;GPIO_3" line.long 0x78 "ESAI1_IPP_IND_HCKT_SELECT_INPUT,ESAI1_IPP_IND_HCKT_SELECT_INPUT register" bitfld.long 0x78 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_RXD0,ALT0;GPIO_4" line.long 0x7C "ESAI1_IPP_IND_SCKR_SELECT_INPUT,ESAI1_IPP_IND_SCKR_SELECT_INPUT register" bitfld.long 0x7C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_MDIO,ALT0;GPIO_1" line.long 0x80 "ESAI1_IPP_IND_SCKT_SELECT_INPUT,ESAI1_IPP_IND_SCKT_SELECT_INPUT register" bitfld.long 0x80 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_CRS_DV,ALT0;GPIO_6" line.long 0x84 "ESAI1_IPP_IND_SDO0_SELECT_INPUT,ESAI1_IPP_IND_SDO0_SELECT_INPUT register" bitfld.long 0x84 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;GPIO_17,ALT2;NANDF_CS2" line.long 0x88 "ESAI1_IPP_IND_SDO1_SELECT_INPUT,ESAI1_IPP_IND_SDO1_SELECT_INPUT register" bitfld.long 0x88 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;GPIO_18,ALT2;NANDF_CS3" line.long 0x8C "ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT,ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT register" bitfld.long 0x8C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TXD1,ALT0;GPIO_5" line.long 0x90 "ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT,ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT register" bitfld.long 0x90 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TX_EN,ALT0;GPIO_16" line.long 0x94 "ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT,ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT register" bitfld.long 0x94 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_TXD0,ALT0;GPIO_7" line.long 0x98 "ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT,ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT register" bitfld.long 0x98 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;ENET_MDC,ALT0;GPIO_8" line.long 0x9C "HDMI_TX_ICECIN_SELECT_INPUT,HDMI_TX_ICECIN_SELECT_INPUT register" bitfld.long 0x9C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_A25,ALT6;KEY_ROW2" line.long 0xA0 "HDMI_TX_II2C_MSTH13TDDC_SCLIN_SELECT_INPUT,HDMI_TX_II2C_MSTH13TDDC_SCLIN_SELECT_INPUT register" bitfld.long 0xA0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_EB2,ALT2;KEY_COL3" line.long 0xA4 "HDMI_TX_II2C_MSTH13TDDC_SDAIN_SELECT_INPUT,HDMI_TX_II2C_MSTH13TDDC_SDAIN_SELECT_INPUT register" bitfld.long 0xA4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D16,ALT2;KEY_ROW3" line.long 0xA8 "I2C1_IPP_SCL_IN_SELECT_INPUT,I2C1_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xA8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D21,ALT4;CSI0_DAT9" line.long 0xAC "I2C1_IPP_SDA_IN_SELECT_INPUT,I2C1_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xAC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT1;EIM_D28,ALT4;CSI0_DAT8" line.long 0xB0 "I2C2_IPP_SCL_IN_SELECT_INPUT,I2C2_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xB0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_EB2,ALT4;KEY_COL3" line.long 0xB4 "I2C2_IPP_SDA_IN_SELECT_INPUT,I2C2_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xB4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D16,ALT4;KEY_ROW3" line.long 0xB8 "I2C3_IPP_SCL_IN_SELECT_INPUT,I2C3_IPP_SCL_IN_SELECT_INPUT register" bitfld.long 0xB8 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D17,ALT2;GPIO_3,ALT6;GPIO_5,?..." line.long 0xBC "I2C3_IPP_SDA_IN_SELECT_INPUT,I2C3_IPP_SDA_IN_SELECT_INPUT register" bitfld.long 0xBC 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D18,ALT2;GPIO_6,ALT6;GPIO_16,?..." line.long 0xC0 "IPU2_IPP_IND_SENS1_DATA_10_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_10_SELECT_INPUT register" bitfld.long 0xC0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D22,ALT2;EIM_EB1" line.long 0xC4 "IPU2_IPP_IND_SENS1_DATA_11_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_11_SELECT_INPUT register" bitfld.long 0xC4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D21,ALT2;EIM_EB0" line.long 0xC8 "IPU2_IPP_IND_SENS1_DATA_12_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_12_SELECT_INPUT register" bitfld.long 0xC8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D28,ALT2;EIM_A17" line.long 0xCC "IPU2_IPP_IND_SENS1_DATA_13_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_13_SELECT_INPUT register" bitfld.long 0xCC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D27,ALT2;EIM_A18" line.long 0xD0 "IPU2_IPP_IND_SENS1_DATA_14_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_14_SELECT_INPUT register" bitfld.long 0xD0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D26,ALT2;EIM_A19" line.long 0xD4 "IPU2_IPP_IND_SENS1_DATA_15_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_15_SELECT_INPUT register" bitfld.long 0xD4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D20,ALT2;EIM_A20" line.long 0xD8 "IPU2_IPP_IND_SENS1_DATA_16_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_16_SELECT_INPUT register" bitfld.long 0xD8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D19,ALT2;EIM_A21" line.long 0xDC "IPU2_IPP_IND_SENS1_DATA_17_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_17_SELECT_INPUT register" bitfld.long 0xDC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D18,ALT2;EIM_A22" line.long 0xE0 "IPU2_IPP_IND_SENS1_DATA_18_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_18_SELECT_INPUT register" bitfld.long 0xE0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D16,ALT2;EIM_A23" line.long 0xE4 "IPU2_IPP_IND_SENS1_DATA_19_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_19_SELECT_INPUT register" bitfld.long 0xE4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_EB2,ALT2;EIM_A24" line.long 0xE8 "IPU2_IPP_IND_SENS1_DATA_EN_SELECT_INPUT,IPU2_IPP_IND_SENS1_DATA_EN_SELECT_INPUT register" bitfld.long 0xE8 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D23,ALT2;EIM_DA10" line.long 0xEC "IPU2_IPP_IND_SENS1_HSYNC_SELECT_INPUT,IPU2_IPP_IND_SENS1_HSYNC_SELECT_INPUT register" bitfld.long 0xEC 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_EB3,ALT2;EIM_DA11" line.long 0xF0 "IPU2_IPP_IND_SENS1_PIX_CLK_SELECT_INPUT,IPU2_IPP_IND_SENS1_PIX_CLK_SELECT_INPUT register" bitfld.long 0xF0 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;EIM_D17,ALT2;EIM_A16" line.long 0xF4 "IPU2_IPP_IND_SENS1_VSYNC_SELECT_INPUT,IPU2_IPP_IND_SENS1_VSYNC_SELECT_INPUT register" bitfld.long 0xF4 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D29,ALT2;EIM_DA12" line.long 0xF8 "KPP_IPP_IND_COL_5_SELECT_INPUT,KPP_IPP_IND_COL_5_SELECT_INPUT register" bitfld.long 0xF8 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;GPIO_0,ALT0;GPIO_19,ALT3;CSI0_DAT4,ALT2;SD2_CLK" line.long 0xFC "KPP_IPP_IND_COL_6_SELECT_INPUT,KPP_IPP_IND_COL_6_SELECT_INPUT register" bitfld.long 0xFC 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;GPIO_9,ALT3;CSI0_DAT6,ALT2;SD2_DAT3,?..." line.long 0x100 "KPP_IPP_IND_COL_7_SELECT_INPUT,KPP_IPP_IND_COL_7_SELECT_INPUT register" bitfld.long 0x100 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;SD2_DAT1,ALT2;GPIO_4,ALT3;CSI0_DAT8,?..." line.long 0x104 "KPP_IPP_IND_ROW_5_SELECT_INPUT,KPP_IPP_IND_ROW_5_SELECT_INPUT register" bitfld.long 0x104 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;GPIO_1,ALT3;CSI0_DAT5,ALT2;SD2_CMD,?..." line.long 0x108 "KPP_IPP_IND_ROW_6_SELECT_INPUT,KPP_IPP_IND_ROW_6_SELECT_INPUT register" bitfld.long 0x108 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;SD2_DAT2,ALT2;GPIO_2,ALT3;CSI0_DAT7,?..." line.long 0x10C "KPP_IPP_IND_ROW_7_SELECT_INPUT,KPP_IPP_IND_ROW_7_SELECT_INPUT register" bitfld.long 0x10C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;SD2_DAT0,ALT2;GPIO_5,ALT3;CSI0_DAT9,?..." line.long 0x110 "MLB_MLB_CLK_IN_SELECT_INPUT,MLB_MLB_CLK_IN_SELECT_INPUT register" bitfld.long 0x110 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_TXD1,ALT7;GPIO_3" line.long 0x114 "MLB_MLB_DATA_IN_SELECT_INPUT,MLB_MLB_DATA_IN_SELECT_INPUT register" bitfld.long 0x114 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_MDC,ALT7;GPIO_2" line.long 0x118 "MLB_MLB_SIG_IN_SELECT_INPUT,MLB_MLB_SIG_IN_SELECT_INPUT register" bitfld.long 0x118 0. " DAISY ,Pads Involved in Daisy Chain" "ALT0;ENET_RXD1,ALT7;GPIO_6" line.long 0x11C "SDMA_EVENTS_14_SELECT_INPUT,SDMA_EVENTS_14_SELECT_INPUT register" bitfld.long 0x11C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT16,ALT3;GPIO_17" line.long 0x120 "SDMA_EVENTS_15_SELECT_INPUT,SDMA_EVENTS_15_SELECT_INPUT register" bitfld.long 0x120 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;DISP0_DAT17,ALT3;GPIO_18" line.long 0x124 "SPDIF_SPDIF_IN1_SELECT_INPUT,SPDIF_SPDIF_IN1_SELECT_INPUT register" bitfld.long 0x124 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT7;EIM_D21,ALT3;ENET_RX,ALT6;KEY_COL3,ALT4;GPIO_16" line.long 0x128 "SPDIF_TX_CLK2_SELECT_INPUT,SPDIF_TX_CLK2_SELECT_INPUT register" bitfld.long 0x128 0. " DAISY ,Pads Involved in Daisy Chain" "ALT2;RGMII_TXC,ALT3;ENET_CRS_DV" line.long 0x12C "UART1_IPP_UART_RTS_B_SELECT_INPUT,UART1_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x12C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D19,ALT4;EIM_D20,ALT1;SD3_DAT0,ALT1;SD3_DAT1" line.long 0x130 "UART1_IPP_UART_RXD_MUX_SELECT_INPUT,UART1_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x130 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT10,ALT3;CSI0_DAT11,ALT1;SD3_DAT7,ALT1;SD3_DAT6" line.long 0x134 "UART2_IPP_UART_RTS_B_SELECT_INPUT,UART2_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x134 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D28,ALT4;EIM_D29,ALT1;SD3_CMD,ALT1;SD3_CLK,ALT2;SD4_DAT5,ALT2;SD4_DAT6,?..." line.long 0x138 "UART2_IPP_UART_RXD_MUX_SELECT_INPUT,UART2_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x138 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D26,ALT4;EIM_D27,ALT4;GPIO_7,ALT4;GPIO_8,ALT1;SD3_DAT5,ALT1;SD3_DAT4,ALT2;SD4_DAT4,ALT2;SD4_DAT7" line.long 0x13C "UART3_IPP_UART_RTS_B_SELECT_INPUT,UART3_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x13C 0.--2. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_D23,ALT2;EIM_EB3,ALT4;EIM_D30,ALT4;EIM_D31,ALT1;SD3_DAT3,ALT1;SD3_RST,?..." line.long 0x140 "UART3_IPP_UART_RXD_MUX_SELECT_INPUT,UART3_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x140 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT2;EIM_D24,ALT2;EIM_D25,ALT2;SD4_CMD,ALT2;SD4_CLK" line.long 0x144 "UART4_IPP_UART_RTS_B_SELECT_INPUT,UART4_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x144 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;CSI0_DAT16,ALT3;CSI0_DAT17" line.long 0x148 "UART4_IPP_UART_RXD_MUX_SELECT_INPUT,UART4_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x148 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;KEY_COL0,ALT4;KEY_ROW0,ALT3;CSI0_DAT12,ALT3;CSI0_DAT13" line.long 0x14C "UART5_IPP_UART_RTS_B_SELECT_INPUT,UART5_IPP_UART_RTS_B_SELECT_INPUT register" bitfld.long 0x14C 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;KEY_COL4,ALT4;KEY_ROW4,ALT3;CSI0_DAT18,ALT3;CSI0_DAT19" line.long 0x150 "UART5_IPP_UART_RXD_MUX_SELECT_INPUT,UART5_IPP_UART_RXD_MUX_SELECT_INPUT register" bitfld.long 0x150 0.--1. " DAISY ,Pads Involved in Daisy Chain" "ALT4;KEY_COL1,ALT4;KEY_ROW1,ALT3;CSI0_DAT14,ALT3;CSI0_DAT15" line.long 0x154 "USB_IPP_IND_OTG_OC_SELECT_INPUT,USB_IPP_IND_OTG_OC_SELECT_INPUT register" bitfld.long 0x154 0. " DAISY ,Pads Involved in Daisy Chain" "ALT4;EIM_D21,ALT2;KEY_COL4" line.long 0x158 "USB_IPP_IND_H1_OC_SELECT_INPUT,USB_IPP_IND_UH1_OC_SELECT_INPUT register" bitfld.long 0x158 0. " DAISY ,Pads Involved in Daisy Chain" "ALT6;EIM_D30,ALT6;GPIO_3" line.long 0x15C "USDHC1_IPP_WP_ON_SELECT_INPUT,USDHC1_IPP_WP_ON_SELECT_INPUT register" bitfld.long 0x15C 0. " DAISY ,Pads Involved in Daisy Chain" "ALT3;DI0_PIN4,ALT6;GPIO_9" tree.end width 0x0B endif tree.end sif (cpu()!="IMX6SOLOLITE") tree.open "IPU (Image Processing Unit)" tree "IPU 1" tree "Common registers" base ad:0x02600000 width 11. group.long 0x00++0x3b line.long 0x00 "IPU_CONF,Configuration Register" bitfld.long 0x00 31. " CSI_SEL ,CSI select bit" "CSI0,CSI1" bitfld.long 0x00 30. " IC_INPUT ,IC Input select bit" "CSI0/1,VDI" bitfld.long 0x00 29. " CSI1_DATA_SOURCE ,CSI1 data source" "Parallel,MCT" textline " " bitfld.long 0x00 28. " CSI0_DATA_SOURCE ,CSI0 data source" "Parallel,MCT" bitfld.long 0x00 27. " VDI_DMFC_SYNC ,VDIC -> IC_VF -> DMFC Sync flow" "Disabled,Enabled" bitfld.long 0x00 26. " IC_DMFC_SYNC ,IC to DMFC Sync flow" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 25. " IC_DMFC_SEL ,IC to DMFC select" "IDMAC,DMFC" bitfld.long 0x00 22. " IDMAC_DISABLE ,Image DMA controller (IDMAC) disable bit" "No,Yes" bitfld.long 0x00 21. " IPU_DIAGBUS_ON ,Diagnostics bus on" "Off,On" textline " " bitfld.long 0x00 12. " VDI_EN ,VDIC enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " SISG_EN ,Still Image Synchronization Generator (SISG) Enable bit" "Disabled,Enabled" bitfld.long 0x00 10. " DMFC_EN ,Display's Multi FIFO Controller Module (DMFC) Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DC_EN ,Display Controller Module (DC) Enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " SMFC_EN ,Sensor's Multi FIFO Controller Module (SMFC) Enable bit" "Disabled,Enabled" bitfld.long 0x00 7. " DI1_EN ,Display Interface Module 1 Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DI0_EN ,Display interface Module 0 Enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " DP_EN ,Display processor Module Enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " IRT_EN ,Image Rotation Module Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IC_EN ,Image Conversion Module Enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " CSI1_EN ,Camera Sensor Interface 1 Enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " CSI0_EN ,Camera Sensor Interface 0 Enable bit" "Disabled,Enabled" line.long 0x04 "SISG_CTRL0,SISG Control 0 Register" bitfld.long 0x04 30. " EXT_ACTV ,External Active" "Not active,Active" hexmask.long 0x04 4.--28. 1. " VAL_STOP_SISG_COUNTER ,SISG Stop Counters value" bitfld.long 0x04 1.--3. " NO_VSYNC_2_STRT_CNT ,VSYCs to Start Counter" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0. " VSYNC_RST_CNT ,VSYNC Resets counters" "VAL_STOP_SISG_COUNTER,VSYNC" line.long 0x08 "SISG_CTRL1,SISG Control 1 Register" bitfld.long 0x08 13. " SISG_OUT_POL[5] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 12. " SISG_OUT_POL[4] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 11. " SISG_OUT_POL[3] ,Polarity of the SISG output signals" "Active low,Active high" textline " " bitfld.long 0x08 10. " SISG_OUT_POL[2] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 9. " SISG_OUT_POL[1] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 8. " SISG_OUT_POL[0] ,Polarity of the SISG output signals" "Active low,Active high" textline " " bitfld.long 0x08 0.--4. " SISG_STROBE_CNT ,SISG Strobe Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC "SISG_SET_1,SISG set 1 Register" hexmask.long 0xC 0.--24. 1. " SISG_SET_1 ,Define the set value of the SISG counter #1" line.long 0x10 "SISG_SET_2,SISG set 2 Register" hexmask.long 0x10 0.--24. 1. " SISG_SET_2 ,Define the set value of the SISG counter #2" line.long 0x14 "SISG_SET_3,SISG set 3 Register" hexmask.long 0x14 0.--24. 1. " SISG_SET_3 ,Define the set value of the SISG counter #3" line.long 0x18 "SISG_SET_4,SISG set 4 Register" hexmask.long 0x18 0.--24. 1. " SISG_SET_4 ,Define the set value of the SISG counter #4" line.long 0x1C "SISG_SET_5,SISG set 5 Register" hexmask.long 0x1C 0.--24. 1. " SISG_SET_5 ,Define the set value of the SISG counter #5" line.long 0x20 "SISG_SET_6,SISG set 6 Register" hexmask.long 0x20 0.--24. 1. " SISG_SET_6 ,Define the set value of the SISG counter #6" line.long 0x24 "SISG_CLR_1,SISG clear 1 Register" hexmask.long 0x24 0.--24. 1. " SISG_CLEAR_1 ,Define the clear value of the SISG counter #1" line.long 0x28 "SISG_CLR_2,SISG clear 2 Register" hexmask.long 0x28 0.--24. 1. " SISG_CLEAR_2 ,Define the clear value of the SISG counter #2" line.long 0x2C "SISG_CLR_3,SISG clear 3 Register" hexmask.long 0x2C 0.--24. 1. " SISG_CLEAR_3 ,Define the clear value of the SISG counter #3" line.long 0x30 "SISG_CLR_4,SISG clear 4 Register" hexmask.long 0x30 0.--24. 1. " SISG_CLEAR_4 ,Define the clear value of the SISG counter #4" line.long 0x34 "SISG_CLR_5,SISG clear 5 Register" hexmask.long 0x34 0.--24. 1. " SISG_CLEAR_5 ,Define the clear value of the SISG counter #5" line.long 0x38 "SISG_CLR_6,SISG clear 6 Register" hexmask.long 0x38 0.--24. 1. " SISG_CLEAR_6 ,Define the clear value of the SISG counter #6" textline " " width 25. group.long 0x3c++0x23 line.long 0x00 "IPU_INT_CTRL_1,Interrupt Control Register 1" bitfld.long 0x00 31. " IDMAC_EOF_EN_31 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 29. " IDMAC_EOF_EN_29 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " IDMAC_EOF_EN_28 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " IDMAC_EOF_EN_27 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " IDMAC_EOF_EN_26 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 25. " IDMAC_EOF_EN_25 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " IDMAC_EOF_EN_24 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 23. " IDMAC_EOF_EN_23 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " IDMAC_EOF_EN_22 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " IDMAC_EOF_EN_21 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " IDMAC_EOF_EN_20 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 19. " IDMAC_EOF_EN_19 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " IDMAC_EOF_EN_18 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 17. " IDMAC_EOF_EN_17 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 15. " IDMAC_EOF_EN_15 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " IDMAC_EOF_EN_14 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " IDMAC_EOF_EN_13 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " IDMAC_EOF_EN_12 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " IDMAC_EOF_EN_11 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " IDMAC_EOF_EN_10 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " IDMAC_EOF_EN_9 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDMAC_EOF_EN_8 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " IDMAC_EOF_EN_5 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 3. " IDMAC_EOF_EN_3 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IDMAC_EOF_EN_2 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IDMAC_EOF_EN_1 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IDMAC_EOF_EN_0 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" line.long 0x04 "IPU_INT_CTRL_2,Interrupt Control Register 2" bitfld.long 0x04 20. " IDMAC_EOF_EN_52 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 19. " IDMAC_EOF_EN_51 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " IDMAC_EOF_EN_50 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " IDMAC_EOF_EN_49 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " IDMAC_EOF_EN_48 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 15. " IDMAC_EOF_EN_47 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " IDMAC_EOF_EN_46 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 13. " IDMAC_EOF_EN_45 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " IDMAC_EOF_EN_44 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " IDMAC_EOF_EN_43 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " IDMAC_EOF_EN_42 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 9. " IDMAC_EOF_EN_41 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " IDMAC_EOF_EN_40 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " IDMAC_EOF_EN_33 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" line.long 0x08 "IPU_INT_CTRL_3,Interrupt Control Register 3" bitfld.long 0x08 31. " IDMAC_NFACK_EN_31 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " IDMAC_NFACK_EN_29 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 28. " IDMAC_NFACK_EN_28 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " IDMAC_NFACK_EN_27 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 26. " IDMAC_NFACK_EN_26 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 25. " IDMAC_NFACK_EN_25 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " IDMAC_NFACK_EN_24 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 23. " IDMAC_NFACK_EN_23 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 22. " IDMAC_NFACK_EN_22 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " IDMAC_NFACK_EN_21 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 20. " IDMAC_NFACK_EN_20 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " IDMAC_NFACK_EN_19 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 18. " IDMAC_NFACK_EN_18 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 17. " IDMAC_NFACK_EN_17 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 15. " IDMAC_NFACK_EN_15 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " IDMAC_NFACK_EN_14 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 13. " IDMAC_NFACK_EN_13 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 12. " IDMAC_NFACK_EN_12 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " IDMAC_NFACK_EN_11 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 10. " IDMAC_NFACK_EN_10 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 9. " IDMAC_NFACK_EN_9 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " IDMAC_NFACK_EN_8 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 5. " IDMAC_NFACK_EN_5 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 3. " IDMAC_NFACK_EN_3 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " IDMAC_NFACK_EN_2 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 1. " IDMAC_NFACK_EN_1 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 0. " IDMAC_NFACK_EN_0 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" line.long 0x0c "IPU_INT_CTRL_4,Interrupt Control Register 4" bitfld.long 0x0c 20. " IDMAC_NFACK_EN_52 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 19. " IDMAC_NFACK_EN_51 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 18. " IDMAC_NFACK_EN_50 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 17. " IDMAC_NFACK_EN_49 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 16. " IDMAC_NFACK_EN_48 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 15. " IDMAC_NFACK_EN_47 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 14. " IDMAC_NFACK_EN_46 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 13. " IDMAC_NFACK_EN_45 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 12. " IDMAC_NFACK_EN_44 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 11. " IDMAC_NFACK_EN_43 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 10. " IDMAC_NFACK_EN_42 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 9. " IDMAC_NFACK_EN_41 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 8. " IDMAC_NFACK_EN_40 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 1. " IDMAC_NFACK_EN_33 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" line.long 0x10 "IPU_INT_CTRL_5,Interrupt Control Register 5" bitfld.long 0x10 31. " IDMAC_NFB4EOF_EN_31 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 29. " IDMAC_NFB4EOF_EN_29 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 28. " IDMAC_NFB4EOF_EN_28 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " IDMAC_NFB4EOF_EN_27 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 26. " IDMAC_NFB4EOF_EN_26 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_NFB4EOF_EN_25 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " IDMAC_NFB4EOF_EN_24 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 23. " IDMAC_NFB4EOF_EN_23 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 22. " IDMAC_NFB4EOF_EN_22 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " IDMAC_NFB4EOF_EN_21 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 20. " IDMAC_NFB4EOF_EN_20 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 19. " IDMAC_NFB4EOF_EN_19 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " IDMAC_NFB4EOF_EN_18 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 17. " IDMAC_NFB4EOF_EN_17 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 15. " IDMAC_NFB4EOF_EN_15 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IDMAC_NFB4EOF_EN_14 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_NFB4EOF_EN_13 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_NFB4EOF_EN_12 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_NFB4EOF_EN_11 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_NFB4EOF_EN_10 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 9. " IDMAC_NFB4EOF_EN_9 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " IDMAC_NFB4EOF_EN_8 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 5. " IDMAC_NFB4EOF_EN_5 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 3. " IDMAC_NFB4EOF_EN_3 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " IDMAC_NFB4EOF_EN_2 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_NFB4EOF_EN_1 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 0. " IDMAC_NFB4EOF_EN_0 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" line.long 0x14 "IPU_INT_CTRL_6,Interrupt Control Register 6" bitfld.long 0x14 20. " IDMAC_NFB4EOF_EN_52 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 19. " IDMAC_NFB4EOF_EN_51 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 18. " IDMAC_NFB4EOF_EN_50 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " IDMAC_NFB4EOF_EN_49 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 16. " IDMAC_NFB4EOF_EN_48 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 15. " IDMAC_NFB4EOF_EN_47 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " IDMAC_NFB4EOF_EN_46 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 13. " IDMAC_NFB4EOF_EN_45 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 12. " IDMAC_NFB4EOF_EN_44 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " IDMAC_NFB4EOF_EN_43 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 10. " IDMAC_NFB4EOF_EN_42 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 9. " IDMAC_NFB4EOF_EN_41 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " IDMAC_NFB4EOF_EN_40 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " IDMAC_NFB4EOF_EN_33 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" line.long 0x18 "IPU_INT_CTRL_7,Interrupt Control Register 7" bitfld.long 0x18 31. " IDMAC_EOS_EN_31 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 29. " IDMAC_EOS_EN_29 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 28. " IDMAC_EOS_EN_28 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " IDMAC_EOS_EN_27 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 26. " IDMAC_EOS_EN_26 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 25. " IDMAC_EOS_EN_25 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " IDMAC_EOS_EN_24 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 23. " IDMAC_EOS_EN_23 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 19. " IDMAC_EOS_EN_19 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" line.long 0x1c "IPU_INT_CTRL_8,Interrupt Control Register 8" bitfld.long 0x1c 20. " IDMAC_EOS_EN_52 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 19. " IDMAC_EOS_EN_51 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 12. " IDMAC_EOS_EN_44 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x1c 11. " IDMAC_EOS_EN_43 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 10. " IDMAC_EOS_EN_42 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 9. " IDMAC_EOS_EN_41 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " IDMAC_EOS_EN_33 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" line.long 0x20 "IPU_INT_CTRL_9,Interrupt Control Register 9" bitfld.long 0x20 31. " CSI1_PUPE_EN ,CSI1 parameters update error interrupt enable" "Disabled,Enabled" bitfld.long 0x20 30. " CSI0_PUPE_EN ,CSI0 parameters update error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 28. " IC_VF_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" bitfld.long 0x20 27. " IC_ENC_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" bitfld.long 0x20 26. " IC_BAYER_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" textline " " bitfld.long 0x20 0. " VDI_FIFO1_OVF_EN ,FIFO1 overflow Interrupt1 Enable" "Disabled,Enabled" group.long 0x60++0x3f line.long 0x0 "IPU_INT_CTRL_10,Interrupt Control Register 10" bitfld.long 0x0 30. " AXIR_ERR_EN ,AXI read access interrupt enable" "Disabled,Enabled" bitfld.long 0x0 29. " AXIW_ERR_EN ,AXI write access interrupt enable" "Disabled,Enabled" bitfld.long 0x0 28. " NON_PRIVILEGED_ACC_ERR_EN ,Non Privileged Access Error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 26. " IC_BAYER_FRM_LOST_ERR_EN ,IC's Bayer frame lost interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " IC_ENC_FRM_LOST_ERR_EN ,IC's encoding frame lost interrupt enable" "Disabled,Enabled" bitfld.long 0x0 24. " IC_VF_FRM_LOST_ERR_EN ,IC's view finder frame lost interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 22. " DI1_TIME_OUT_ERR_EN ,DI1 time out error interrupt enable" "Disabled,Enabled" bitfld.long 0x0 21. " DI0_TIME_OUT_ERR_EN ,DI0 time out error interrupt enable" "Disabled,Enabled" bitfld.long 0x0 20. " DI1_SYNC_DISP_ERR_EN ,DI1 Synchronous display error enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " DI0_SYNC_DISP_ERR_EN ,DI0 Synchronous display error enable" "Disabled,Enabled" bitfld.long 0x0 18. " DC_TEARING_ERR_6_EN ,Tearing Error #6 enable" "Disabled,Enabled" bitfld.long 0x0 17. " DC_TEARING_ERR_2_EN ,Tearing Error #2 enable" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " DC_TEARING_ERR_1_EN ,Tearing Error #1 enable" "Disabled,Enabled" bitfld.long 0x0 3. " SMFC3_FRM_LOST_EN ,Frame Lost of SMFC channel 3 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x0 2. " SMFC2_FRM_LOST_EN ,Frame Lost of SMFC channel 2 interrupt enable bit" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " SMFC1_FRM_LOST_EN ,Frame Lost of SMFC channel 1 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x0 0. " SMFC0_FRM_LOST_EN ,Frame Lost of SMFC channel 0 interrupt enable bit" "Disabled,Enabled" line.long 0x4 "IPU_INT_CTRL_11,IPU Interrupt Control Register 11" bitfld.long 0x4 26. " IDMAC_EOBND_EN_26 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 25. " IDMAC_EOBND_EN_25 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 22. " IDMAC_EOBND_EN_22 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 21. " IDMAC_EOBND_EN_21 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 20. " IDMAC_EOBND_EN_20 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 12. " IDMAC_EOBND_EN_12 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " IDMAC_EOBND_EN_11 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 5. " IDMAC_EOBND_EN_5 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 3. " IDMAC_EOBND_EN_3 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " IDMAC_EOBND_EN_2 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 1. " IDMAC_EOBND_EN_1 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 0. " DMAC_EOBND_EN_0 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" line.long 0x8 "IPU_INT_CTRL_12,Interrupt Control Register 12" bitfld.long 0x8 18. " IDMAC_EOBND_EN_50 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 17. " IDMAC_EOBND_EN_49 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 16. " IDMAC_EOBND_EN_48 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x8 15. " IDMAC_EOBND_EN_47 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 14. " IDMAC_EOBND_EN_46 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 13. " IDMAC_EOBND_EN_45 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" line.long 0xc "IPU_INT_CTRL_13,Interrupt Control Register 13" bitfld.long 0xc 31. " IDMAC_TH_EN_31 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 29. " IDMAC_TH_EN_29 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 28. " IDMAC_TH_EN_28 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 27. " IDMAC_TH_EN_27 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 26. " IDMAC_TH_EN_26 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 25. " IDMAC_TH_EN_25 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 24. " IDMAC_TH_EN_24 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 23. " IDMAC_TH_EN_23 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 22. " IDMAC_TH_EN_22 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 21. " IDMAC_TH_EN_21 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 20. " IDMAC_TH_EN_20 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 19. " IDMAC_TH_EN_19 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 18. " IDMAC_TH_EN_18 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 17. " IDMAC_TH_EN_17 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 15. " IDMAC_TH_EN_15 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 14. " IDMAC_TH_EN_14 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 13. " IDMAC_TH_EN_13 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 12. " IDMAC_TH_EN_12 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 11. " IDMAC_TH_EN_11 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 10. " IDMAC_TH_EN_10 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 9. " IDMAC_TH_EN_9 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 8. " IDMAC_TH_EN_8 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 5. " IDMAC_TH_EN_5 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 3. " IDMAC_TH_EN_3 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 2. " IDMAC_TH_EN_2 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 1. " IDMAC_TH_EN_1 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 0. " IDMAC_TH_EN_0 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" line.long 0x10 "IPU_INT_CTRL_14,Interrupt Control Register 14" bitfld.long 0x10 20. " IDMAC_TH_EN_52 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 19. " IDMAC_TH_EN_51 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 18. " IDMAC_TH_EN_50 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " IDMAC_TH_EN_49 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 16. " IDMAC_TH_EN_48 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 15. " IDMAC_TH_EN_47 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IDMAC_TH_EN_46 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_TH_EN_45 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_TH_EN_44 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_TH_EN_43 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_TH_EN_42 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 9. " IDMAC_TH_EN_41 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " IDMAC_TH_EN_40 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_TH_EN_33 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" line.long 0x14 "IPU_INT_CTRL_15,Interrupt Control Register 15" bitfld.long 0x14 31. " DI1_CNT_EN_PRE_8_EN ,Trigger generated by counter #8 of DI1 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 30. " DI1_CNT_EN_PRE_3_EN ,Trigger generated by counter #3 of DI1 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 29. " DI1_DISP_CLK_EN_PRE_EN , DI1_DISP_CLK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " DI0_CNT_EN_PRE_10_EN ,Trigger generated by counter #10 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 27. " DI0_CNT_EN_PRE_9_EN ,Trigger generated by counter #9 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 26. " DI0_CNT_EN_PRE_8_EN ,Trigger generated by counter #8 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " DI0_CNT_EN_PRE_7_EN ,Trigger generated by counter #7 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 24. " DI0_CNT_EN_PRE_6_EN ,Trigger generated by counter #6 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 23. " DI0_CNT_EN_PRE_5_EN ,Trigger generated by counter #5 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " DI0_CNT_EN_PRE_4_EN ,Trigger generated by counter #4 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 21. " DI0_CNT_EN_PRE_3_EN ,Trigger generated by counter #3 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 20. " DI0_CNT_EN_PRE_2_EN ,Trigger generated by counter #2 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " DI0_CNT_EN_PRE_1_EN ,Trigger generated by counter #1 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 18. " DI0_CNT_EN_PRE_0_EN ,Trigger generated by counter #0 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 17. " DC_ASYNC_STOP_EN ,DP stops an async flow and moves to a sync flow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " DC_DP_START_EN ,DP start a new sync or async flow or when an async flow interrupt enable" "Disabled,Enabled" bitfld.long 0x14 15. " DI_VSYNC_PRE_1_EN ,Enables the DI1 interrupt indicating of a VSYNC signal" "Disabled,Enabled" bitfld.long 0x14 14. " DI_VSYNC_PRE_0_EN ,Enables the DI0 interrupt indicating of a VSYNC signal" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " DC_FC_6_EN ,Enables the DC Frame Complete on channel #6 interrupt" "Disabled,Enabled" bitfld.long 0x14 12. " DC_FC_4_EN ,Enables the DC Frame Complete on channel #4 interrupt" "Disabled,Enabled" bitfld.long 0x14 11. " DC_FC_3_EN ,Enables the DC Frame Complete on channel #3 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " DC_FC_2_EN ,Enables the DC Frame Complete on channel #2 interrupt" "Disabled,Enabled" bitfld.long 0x14 9. " DC_FC_1_EN ,Enables the DC Frame Complete on channel #1 interrupt" "Disabled,Enabled" bitfld.long 0x14 8. " DC_FC_0_EN ,Enables the DC Frame Complete on channel #0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " DP_ASF_BRAKE_EN ,DP Async Flow Brake enable bit" "Disabled,Enabled" bitfld.long 0x14 6. " DP_SF_BRAKE_EN ,DP Sync Flow Brake enable bit" "Disabled,Enabled" bitfld.long 0x14 5. " DP_ASF_END_EN ,DP Async Flow End enable bit" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " DP_ASF_START_EN ,DP Async Flow Start enable bit" "Disabled,Enabled" bitfld.long 0x14 3. " DP_SF_END_EN ,DP Sync Flow End enable bit" "Disabled,Enabled" bitfld.long 0x14 2. " DP_SF_START_EN ,DP Sync Flow Start enable bit" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " IPU_SNOOPING2_INT_EN ,IPU snooping 2 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x14 0. " IPU_SNOOPING1_INT_EN ,IPU snooping 1 interrupt enable bit" "Disabled,Enabled" line.long 0x18 "IPU_SDMA_EVENT_1,SDMA Event Control Register 1" bitfld.long 0x18 31. " IDMAC_EOF_SDMA_EN_31 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 29. " IDMAC_EOF_SDMA_EN_29 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 28. " IDMAC_EOF_SDMA_EN_28 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " IDMAC_EOF_SDMA_EN_27 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 26. " IDMAC_EOF_SDMA_EN_26 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 25. " IDMAC_EOF_SDMA_EN_25 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " IDMAC_EOF_SDMA_EN_24 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 23. " IDMAC_EOF_SDMA_EN_23 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 22. " IDMAC_EOF_SDMA_EN_22 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " IDMAC_EOF_SDMA_EN_21 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 20. " IDMAC_EOF_SDMA_EN_20 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 19. " IDMAC_EOF_SDMA_EN_19 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 18. " IDMAC_EOF_SDMA_EN_18 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 17. " IDMAC_EOF_SDMA_EN_17 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 15. " IDMAC_EOF_SDMA_EN_15 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 14. " IDMAC_EOF_SDMA_EN_14 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 13. " IDMAC_EOF_SDMA_EN_13 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 12. " IDMAC_EOF_SDMA_EN_12 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " IDMAC_EOF_SDMA_EN_11 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 10. " IDMAC_EOF_SDMA_EN_10 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 9. " IDMAC_EOF_SDMA_EN_9 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " IDMAC_EOF_SDMA_EN_8 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 5. " IDMAC_EOF_SDMA_EN_5 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 3. " IDMAC_EOF_SDMA_EN_3 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " IDMAC_EOF_SDMA_EN_2 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 1. " IDMAC_EOF_SDMA_EN_1 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 0. " IDMAC_EOF_SDMA_EN_0 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" line.long 0x1c "IPU_SDMA_EVENT_2,SDMA Event Control Register 2" bitfld.long 0x1c 20. " IDMAC_EOF_SDMA_EN_52 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 19. " IDMAC_EOF_SDMA_EN_51 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 18. " IDMAC_EOF_SDMA_EN_50 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 17. " IDMAC_EOF_SDMA_EN_49 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 16. " IDMAC_EOF_SDMA_EN_48 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 15. " IDMAC_EOF_SDMA_EN_47 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 14. " IDMAC_EOF_SDMA_EN_46 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 13. " IDMAC_EOF_SDMA_EN_45 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 12. " IDMAC_EOF_SDMA_EN_44 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 11. " IDMAC_EOF_SDMA_EN_43 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 10. " IDMAC_EOF_SDMA_EN_42 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 9. " IDMAC_EOF_SDMA_EN_41 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 8. " IDMAC_EOF_SDMA_EN_40 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 1. " IDMAC_EOF_SDMA_EN_33 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" line.long 0x20 "IPU_SDMA_EVENT_3,SDMA Event Control Register 3" bitfld.long 0x20 31. " IDMAC_NFACK_SDMA_EN_31 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 29. " IDMAC_NFACK_SDMA_EN_29 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 28. " IDMAC_NFACK_SDMA_EN_28 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 27. " IDMAC_NFACK_SDMA_EN_27 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 26. " IDMAC_NFACK_SDMA_EN_26 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 25. " IDMAC_NFACK_SDMA_EN_25 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 24. " IDMAC_NFACK_SDMA_EN_24 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 23. " IDMAC_NFACK_SDMA_EN_23 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 22. " IDMAC_NFACK_SDMA_EN_22 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 21. " IDMAC_NFACK_SDMA_EN_21 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 20. " IDMAC_NFACK_SDMA_EN_20 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 19. " IDMAC_NFACK_SDMA_EN_19 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " IDMAC_NFACK_SDMA_EN_18 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 17. " IDMAC_NFACK_SDMA_EN_17 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 15. " IDMAC_NFACK_SDMA_EN_15 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 14. " IDMAC_NFACK_SDMA_EN_14 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 13. " IDMAC_NFACK_SDMA_EN_13 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 12. " IDMAC_NFACK_SDMA_EN_12 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " IDMAC_NFACK_SDMA_EN_11 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 10. " IDMAC_NFACK_SDMA_EN_10 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 9. " IDMAC_NFACK_SDMA_EN_9 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 8. " IDMAC_NFACK_SDMA_EN_8 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 5. " IDMAC_NFACK_SDMA_EN_5 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 3. " IDMAC_NFACK_SDMA_EN_3 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " IDMAC_NFACK_SDMA_EN_2 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 1. " IDMAC_NFACK_SDMA_EN_1 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 0. " IDMAC_EOF_SDMA_EN_0 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" line.long 0x24 "IPU_SDMA_EVENT_4,SDMA Event Control Register 4" bitfld.long 0x24 20. " IDMAC_NFACK_SDMA_EN_52 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 19. " IDMAC_NFACK_SDMA_EN_51 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 18. " IDMAC_NFACK_SDMA_EN_50 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 17. " IDMAC_NFACK_SDMA_EN_49 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 16. " IDMAC_NFACK_SDMA_EN_48 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 15. " IDMAC_NFACK_SDMA_EN_47 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 14. " IDMAC_NFACK_SDMA_EN_46 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 13. " IDMAC_NFACK_SDMA_EN_45 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 12. " IDMAC_NFACK_SDMA_EN_44 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " IDMAC_NFACK_SDMA_EN_43 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 10. " IDMAC_NFACK_SDMA_EN_42 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 9. " IDMAC_NFACK_SDMA_EN_41 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " IDMAC_NFACK_SDMA_EN_40 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 1. " IDMAC_NFACK_SDMA_EN_33 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" line.long 0x28 "IPU_SDMA_EVENT_7,SDMA Event Control Register 7" bitfld.long 0x28 31. " IDMAC_EOS_SDMA_EN_31 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 29. " IDMAC_EOS_SDMA_EN_29 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 28. " IDMAC_EOS_SDMA_EN_28 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x28 27. " IDMAC_EOS_SDMA_EN_27 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 26. " IDMAC_EOS_SDMA_EN_26 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 25. " IDMAC_EOS_SDMA_EN_25 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x28 24. " IDMAC_EOS_SDMA_EN_24 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 23. " IDMAC_EOS_SDMA_EN_23 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 19. " IDMAC_EOS_SDMA_EN_19 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" line.long 0x2c "IPU_SDMA_EVENT_8,SDMA Event Control Register 8" bitfld.long 0x2c 20. " IDMAC_EOS_SDMA_EN_52 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 19. " IDMAC_EOS_SDMA_EN_51 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 12. " IDMAC_EOS_SDMA_EN_44 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x2c 11. " IDMAC_EOS_SDMA_EN_43 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 10. " IDMAC_EOS_SDMA_EN_42 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 9. " IDMAC_EOS_SDMA_EN_41 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x2c 1. " IDMAC_EOS_SDMA_EN_33 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" line.long 0x30 "IPU_SDMA_EVENT_11,SDMA Event Control Register 11" bitfld.long 0x30 26. " IDMAC_EOBND_SDMA_EN_26 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 25. " DMAC_EOBND_SDMA_EN_25 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 22. " IDMAC_EOBND_SDMA_EN_22 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 21. " DMAC_EOBND_SDMA_EN_21 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 20. " IDMAC_EOBND_SDMA_EN_20 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 12. " IDMAC_EOBND_SDMA_EN_12 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " IDMAC_EOBND_SDMA_EN_11 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 5. " IDMAC_EOBND_SDMA_EN_5 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 3. " IDMAC_EOBND_SDMA_EN_3 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 2. " IDMAC_EOBND_SDMA_EN_2 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 1. " IDMAC_EOBND_SDMA_EN_1 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 0. " IDMAC_EOBND_SDMA_EN_0 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" line.long 0x34 "IPU_SDMA_EVENT_12,SDMA Event Control Register 12" bitfld.long 0x34 18. " IDMAC_EOBND_SDMA_EN_50 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 17. " IDMAC_EOBND_SDMA_EN_49 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 16. " IDMAC_EOBND_SDMA_EN_48 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x34 15. " IDMAC_EOBND_SDMA_EN_47 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 14. " IDMAC_EOBND_SDMA_EN_46 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 13. " IDMAC_EOBND_SDMA_EN_45 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" line.long 0x38 "IPU_SDMA_EVENT_13,SDMA Event Control Register 13" bitfld.long 0x38 31. " IDMAC_TH_SDMA_EN_31 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 29. " IDMAC_TH_SDMA_EN_29 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 28. " IDMAC_TH_SDMA_EN_28 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 27. " IDMAC_TH_SDMA_EN_27 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 26. " IDMAC_TH_SDMA_EN_26 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 25. " IDMAC_TH_SDMA_EN_25 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 24. " IDMAC_TH_SDMA_EN_24 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 23. " IDMAC_TH_SDMA_EN_23 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 22. " IDMAC_TH_SDMA_EN_22 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 21. " IDMAC_TH_SDMA_EN_21 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 20. " IDMAC_TH_SDMA_EN_20 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 19. " IDMAC_TH_SDMA_EN_19 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 18. " IDMAC_TH_SDMA_EN_18 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 17. " IDMAC_TH_SDMA_EN_17 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 15. " IDMAC_TH_SDMA_EN_15 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 14. " IDMAC_TH_SDMA_EN_14 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 13. " IDMAC_TH_SDMA_EN_13 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 12. " IDMAC_TH_SDMA_EN_12 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " IDMAC_TH_SDMA_EN_11 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 10. " IDMAC_TH_SDMA_EN_10 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 9. " IDMAC_TH_SDMA_EN_9 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 8. " IDMAC_TH_SDMA_EN_8 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 5. " IDMAC_TH_SDMA_EN_5 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 3. " IDMAC_TH_SDMA_EN_3 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 2. " IDMAC_TH_SDMA_EN_2 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 1. " IDMAC_TH_SDMA_EN_1 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 0. " IDMAC_TH_SDMA_EN_0 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" line.long 0x3c "IPU_SDMA_EVENT_14,SDMA Event Control Register 14" bitfld.long 0x3c 20. " IDMAC_TH_SDMA_EN_52 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 19. " IDMAC_TH_SDMA_EN_51 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 18. " IDMAC_TH_SDMA_EN_50 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 17. " IDMAC_TH_SDMA_EN_49 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 16. " IDMAC_TH_SDMA_EN_48 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 15. " IDMAC_TH_SDMA_EN_47 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 14. " IDMAC_TH_SDMA_EN_46 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 13. " IDMAC_TH_SDMA_EN_45 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 12. " IDMAC_TH_SDMA_EN_44 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 11. " IDMAC_TH_SDMA_EN_43 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 10. " IDMAC_TH_SDMA_EN_42 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 9. " IDMAC_TH_SDMA_EN_41 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 8. " IDMAC_TH_SDMA_EN_40 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 1. " IDMAC_TH_SDMA_EN_33 ,Threshold of Channel SDMA event" "Disabled,Enabled" group.long 0xa0++0x13 line.long 0x00 "IPU_SRM_PRI1,Shadow Registers Memory Priority 1 Register" bitfld.long 0x00 11.--12. " CSI0_SRM_MODE ,CSI0 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x00 8.--10. " CSI0_SRM_PRI ,CSI0 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3.--4. " CSI1_SRM_MODE ,CSI1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x00 0.--2. " CSI1_SRM_PRI ,CSI1 SRM priority" "0,1,2,3,4,5,6,7" line.long 0x04 "IPU_SRM_PRI2,Shadow Registers Memory Priority 2 Register" bitfld.long 0x04 27.--28. " DI1_SRM_MODE ,DCI1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 24.--26. " DI1_SRM_PRI ,DI1 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 19.--20. " DI0_SRM_MCU_USE ,DI0 SRM is used by ARM platform" "Not updated,Updated,," textline " " bitfld.long 0x04 16.--18. " DI0_SRM_PRI ,DI0 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 14.--15. " DC_6_SRM_MODE ,DC Group #6 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 12.--13. " DC_2_SRM_MODE ,DC Group #2 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x04 9.--11. " DC_SRM_PRI ,DC SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7.--8. " DP_A1_SRM_MODE ,DP Async flow #1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 5.--6. " DP_A0_SRM_MODE ,DP Async flow #0 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x04 3.--4. " DP_S_SRM_MODE ,DP sync flow SRM Mode" "Disabled,Next frame,,Update now" bitfld.long 0x04 0.--2. " DP_SRM_PRI ,DC SRM priority" "0,1,2,3,4,5,6,7" line.long 0x08 "IPU_FS_PROC_FLOW1,FSU Processing Flow 1 Register" bitfld.long 0x08 31. " VF_IN_VALID ,View-finder input valid" "Skipped,Used" bitfld.long 0x08 30. " ENC_IN_VALID ,Encoding input valid" "Skipped,Used" bitfld.long 0x08 28.--29. " VDI_SRC_SEL ,Source select for the VDI" "MCU,CSI direct (cb7),?..." textline " " bitfld.long 0x08 24.--27. " PRP_SRC_SEL ,Source select for the Pre Processing Task" "MCU,Capture0 (smfc0),,Capture2 (smfco2),,IC direct (cb7),IRT Encoding,IRT viewfinder,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 22.--23. " VDI3_SRC_SEL ,Source select for the VDIC plane #3" "MCU,Viewfinder,Playback,Post-processing" bitfld.long 0x08 20.--21. " VDI1_SRC_SEL ,Source select for the VDIC plane #1" "MCU,Viewfinder,Playback,Post-processing" textline " " bitfld.long 0x08 16.--19. " PP_ROT_SRC_SEL ,Source select for the pre processing task of the IRT" "MCU,Capture0 (smfc0),,Capture2 (smfc2),,Post-processing,,,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 12.--15. " PP_SRC_SEL ,Source select for the pre processing task of the IC" "MCU,Capture0 (smfc0),,Capture2 (smfc2),,,Rotation,,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 8.--11. " PRPVF_ROT_SRC_SEL ,Source select for the view finder task of the IRT" "MCU,Capture0 (smfc0),Capture1 (smfc1),Capture2 (smfc2),Capture3 (smfc3),IC direct (cb7),,,View-finder,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" textline " " bitfld.long 0x08 0.--3. " PRPENC_ROT_SRC_SEL ,Source select for the encoding task of the IRT" "MCU,Capture0 (smfc0),Capture1 (smfc1),Capture2 (smfc2),Capture3 (smfc3),IC direct (cb7),,Encoding,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" line.long 0x0c "IPU_FS_PROC_FLOW2,FSU Processing Flow 2 Register" bitfld.long 0x0c 24.--27. " PRP_DEST_SEL ,Pre processing destination select" "MCU,IC input buffer (ch12),PP (ch11),PP_ROT (ch47),DC1 (ch28),DC2 (ch41),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),DP_SYNC1 (ch27),DP_SYNC0 (ch23),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29),?..." bitfld.long 0x0c 20.--23. " PRPENC_ROT_DEST_SEL ,Destination select for Rotation task coming from the Encoding input" "MCU,,,,,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 16.--19. " PP_ROT_DEST_SEL ,Destination select for Rotation task coming from the Post Processing input" "MCU,,,,IC Playback,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x0c 12.--15. " PP_DEST_SEL ,Destination select for post processing task" "MCU,,,IRT playback,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 8.--11. " PRPVF_ROT_DEST_SEL ,Destination select for Rotation task coming from the View finder input" "MCU,,,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 4.--7. " PRPVF_DEST_SEL ,Destination select for View finder task" "MCU,IRT viewfinder,,,,,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x0c 0.--3. " PRP_ENC_DEST_SEL ,Destination select for Encoding task" "MCU,IRT Encoding,,,,,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" line.long 0x10 "IPU_FS_PROC_FLOW3,FSU Processing Flow 3 Register" bitfld.long 0x10 24.--25. " VPU_DEST_SEL ,Selects the corresponding IDMAC channel's EOL indication" "Disabled,capture0 (smfc0),capture2 (smfc2),IC viewfinder (ch21)" bitfld.long 0x10 22.--23. " EXT_SRC2_DEST_SEL ,Destination select for External Source 2" "Disabled,DP_SYNC0 (ch23),DP_SYNC1 (ch27),DC1 (ch28)" bitfld.long 0x10 20.--21. " EXT_SRC1_DEST_SEL ,Destination select for External Source 1" "Disabled,DP_SYNC0 (ch23),DP_SYNC1 (ch27),DC1 (ch28)" textline " " bitfld.long 0x10 16.--17. " VDOA_DEST_SEL ,Destination select for VDOA" "Disabled,IC Playback,VDI,?..." bitfld.long 0x10 11.--13. " SMFC3_DEST_SEL ,Destination select for SMFC3" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,?..." bitfld.long 0x10 7.--10. " SMFC2_DEST_SEL ,Destination select for SMFC2" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x10 4.--6. " SMFC1_DEST_SEL ,Destination select for SMFC1" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,?..." bitfld.long 0x10 0.--3. " SMFC0_DEST_SEL ,Destination select for SMFC0" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" group.long 0xb4++0xb line.long 0x00 "IPU_FS_DISP_FLOW1,FSU Displaying Flow 1 Register" bitfld.long 0x00 20.--23. " DC1_SRC_SEL ,Source select for DS1/DS2 - MG (graphics) plane (ch28)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,External source 1,Snoop1,External source 2" bitfld.long 0x00 16.--19. " DC2_SRC_SEL ,Source select for DS3 (ch41)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x00 12.--15. " DP_ASYNC1_SRC_SEL ,Source select for DS1/DS2 - Vx (video) plane (ch24)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" textline " " bitfld.long 0x00 8.--11. " DP_ASYNC0_SRC_SEL ,Source select for DS2 - MG (graphics) plane (ch29)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x00 4.--7. " DP_SYNC1_SRC_SEL ,Source select for DS1/DS2 - Vx (video) plane (ch27)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,,,,Snoop1,Snoop2" bitfld.long 0x00 0.--3. " DP_SYNC0_SRC_SEL ,Source select for DS2 - MG (graphics) plane (ch23))" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,,,,Snoop1,Snoop2" line.long 0x04 "IPU_FS_DISP_FLOW2,FSU Displaying Flow 2 Register" bitfld.long 0x04 16.--19. " DC2_ALT_SRC_SEL ,Source select for Alternate DS3 (ch41)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x04 4.--7. " DP_ASYNC1_ALT_SRC_SEL ,Source select for alternate DS1/DS2 - Vx (video) plane (ch24)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x04 0.--3. " DP_ASYNC0_ALT_SRC_SEL ,Source select for alternate DS2 - MG (graphics) plane (ch29)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" line.long 0x08 "IPU_SKIP,IPU SKIP Register" hexmask.long.word 0x08 20.--31. 1. " VDI_SKIP ,VDI Skip" bitfld.long 0x08 16.--19. " VDI_MAX_RATIO_SKIP ,Maximum Ratio Skip for VDIC" "Disabled,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x08 11.--15. " CSI_SKIP_IC_VF ,Skipping pattern of the frames send to the IC for view finder" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 8.--10. " CSI_MAX_RATIO_SKIP_IC_VF ,CSI Maximum Ratio Skip for IC (view finder task)" "Disabled,1,2,3,4,?..." bitfld.long 0x08 3.--7. " CSI_SKIP_IC_ENC ,Skipping pattern of the frames send to the IC for encoding" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--2. " CSI_MAX_RATIO_SKIP_IC_ENC ,CSI Maximum Ratio Skip for IC (encoding task)" "Disabled,1,2,3,4,?..." textline " " group.long 0xc4++0x13 line.long 0x00 "IPU_DISP_GEN,Display General control Register" bitfld.long 0x00 25. " DI1_COUNTER_RELEASE ,DI1 Counter release" "Cleared and stopped,Released and running" bitfld.long 0x00 24. " DI0_COUNTER_RELEASE ,DI0 Counter release" "Cleared and stopped,Released and running" bitfld.long 0x00 23. " CSI_VSYNC_DEST ,Destination of the VSYNC coming from the CSI's" "CSI0_VSYNC to DI0 & CSI1_VSYNC to DI1,CSI1_VSYNC to DI0 & CSI0_VSYNC to DI1" textline " " bitfld.long 0x00 22. " MCU_MAX_BURST_STOP ,MCU Maximal burst" "Unlimited,8-beat" bitfld.long 0x00 18.--21. " MCU_T ,MCU address space MSB-T" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,?..." bitfld.long 0x00 17. " MCU_DI_ID_9 ,Defines the DI that the MCU DC's access via channel #9" "Via DI0,Via DI1" textline " " bitfld.long 0x00 16. " MCU_DI_ID_8 ,Defines the DI that the MCU DC's access via channel #8" "Via DI0,Via DI1" bitfld.long 0x00 6. " DP_PIPE_CLR ,DP Pipe Clear" "Idle,Cleared" bitfld.long 0x00 5. " DP_FG_EN_ASYNC1 ,FG_EN - partial plane Enable for async flow 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DP_FG_EN_ASYNC0 ,FG_EN - partial plane Enable for async flow 0" "Disabled,Enabled" bitfld.long 0x00 3. " DP_ASYNC_DOUBLE_FLOW ,DP Async Double Flow" "Single,Double" bitfld.long 0x00 2. " DC2_DOUBLE_FLOW ,DC2 Double Flow" "Single,Double" textline " " bitfld.long 0x00 1. " DI1_DUAL_MODE ,DI1 dual mode control" "Not dual,Dual" bitfld.long 0x00 0. " DI0_DUAL_MODE ,DI0 dual mode control" "Not dual,Dual" textline " " line.long 0x04 "IPU_DISP_ALT1,Display Alternate flow control Register 1" bitfld.long 0x04 28.--31. " SEL_ALT_0 ,Select alternative parameters instead of DI Sync Wave Gen counter?..." "Disabled,1,2,3,4,5,6,7,8,?..." hexmask.long.word 0x04 16.--27. 1. " STEP_REPEAT_ALT_0 ,Defines the amount of repetitions that will be performed by the counter" bitfld.long 0x04 15. " CNT_AUTO_RELOAD_ALT_0 ,Counter auto reload mode" "Not automatically,Automatically" textline " " bitfld.long 0x04 12.--14. " CNT_CLR_SEL_ALT_0 ,Counter Clear select" "Disabled,Triggered,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x04 0.--11. 1. " RUN_VALUE_M1_ALT_0 ,Counter pre defined value" line.long 0x08 "IPU_DISP_ALT2,Display Alternate flow control Register 2" bitfld.long 0x08 16.--18. " RUN_RESOLUTION_ALT_0 ,Counter Run Resolution" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " OFFSET_RESOLUTION_ALT0 ,Counter offset Resolution" "0,1,2,3,4,5,6,7" hexmask.long.word 0x08 0.--11. 1. " OFFSET_VALUE_ALT_0 ,Counter offset value" line.long 0x0c "IPU_DISP_ALT3,Display Alternate flow control Register 3" bitfld.long 0x0c 28.--31. " SEL_ALT_1 ,Select alternative parameters instead of DI Sync Wave Gen counter?..." "Disabled,1,2,3,4,5,6,7,8,?..." hexmask.long.word 0x0c 16.--27. 1. " STEP_REPEAT_ALT_1 ,Defines the amount of repetitions that will be performed by the counter" bitfld.long 0x0c 15. " CNT_AUTO_RELOAD_ALT_1 ,Counter auto reload mode" "Not automatically,Automatically" textline " " bitfld.long 0x0c 12.--14. " CNT_CLR_SEL_ALT_1 ,Counter Clear select" "Disabled,Same as display clock,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0c 0.--11. 1. " RUN_VALUE_M1_ALT_1 ,Counter pre defined value" line.long 0x10 "IPU_DISP_ALT4,Display Alternate flow control Register 4" bitfld.long 0x10 16.--18. " RUN_RESOLUTION_ALT_1 ,Counter Run Resolution" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. " OFFSET_RESOLUTION_ALT1 ,Counter offset Resolution" "0,1,2,3,4,5,6,7" hexmask.long.word 0x10 0.--11. 1. " OFFSET_VALUE_ALT_1 ,Counter offset value" ; line.long 0x14 "IPU_SNOOP,Autorefresh and Snooping Control Register" ; bitfld.long 0x14 16. " SNOOP2_SYNC_BYP ,Bypass of the synchronizer on emi_snooping2 signal" "Normal,Bypassed" ; hexmask.long.word 0x14 0.--9. 1. " AUTOREF_PER ,Autorefresh period minus 1" group.long 0xdc++0x0B line.long 0x00 "IPU_MEM_RST,Memory Reset Control Register" bitfld.long 0x00 31. " RST_MEM_START ,Memory Reset Start" "No reset,Reset" bitfld.long 0x00 22. " RST_MEM_EN[22] ,Reset Memory Enable (dmfc_wr)" "Disabled,Enabled" bitfld.long 0x00 21. " RST_MEM_EN[21] ,Reset Memory Enable (dmfc_rd)" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " RST_MEM_EN[20] ,Reset Memory Enable (dc_template)" "Disabled,Enabled" bitfld.long 0x00 15. " RST_MEM_EN[15] ,Reset Memory Enable (vdi_fifo1)" "Disabled,Enabled" bitfld.long 0x00 14. " RST_MEM_EN[14] ,Reset Memory Enable (icb)" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RST_MEM_EN[13] ,Reset Memory Enable (vdi_fifo3)" "Disabled,Enabled" bitfld.long 0x00 12. " RST_MEM_EN[12] ,Reset Memory Enable (vdi_fifo2)" "Disabled,Enabled" bitfld.long 0x00 11. " RST_MEM_EN[11] ,Reset Memory Enable (ram_smfc)" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RST_MEM_EN[10] ,Reset Memory Enable (lut1)" "Disabled,Enabled" bitfld.long 0x00 9. " RST_MEM_EN[9] ,Reset Memory Enable (lut0)" "Disabled,Enabled" bitfld.long 0x00 8. " RST_MEM_EN[8] ,Reset Memory Enable (dsom)" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RST_MEM_EN[7] ,Reset Memory Enable (dstm)" "Disabled,Enabled" bitfld.long 0x00 6. " RST_MEM_EN[6] ,Reset Memory Enable (rm)" "Disabled,Enabled" bitfld.long 0x00 5. " RST_MEM_EN[5] ,Reset Memory Enable (bm)" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RST_MEM_EN[4] ,Reset Memory Enable (mpm)" "Disabled,Enabled" bitfld.long 0x00 3. " RST_MEM_EN[3] ,Reset Memory Enable (tpm)" "Disabled,Enabled" bitfld.long 0x00 2. " RST_MEM_EN[2] ,Reset Memory Enable (cpmem)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RST_MEM_EN[1] ,Reset Memory Enable (alpha)" "Disabled,Enabled" bitfld.long 0x00 0. " RST_MEM_EN[0] ,Reset Memory Enable (srm)" "Disabled,Enabled" line.long 0x04 "IPU_PM,Power modes Control Register" bitfld.long 0x04 31. " LPSR_MODE ,LPSR Mode enable" "Disabled,Enabled" bitfld.long 0x04 30. " DI1_SRM_CLOCK_CHANGE_MODE ,SRM clock change mode" "Disabled,Enabled" hexmask.long.byte 0x04 23.--29. 1. " DI1_CLK_PERIOD_1 ,DI1_CLK period option 1" textline " " hexmask.long.byte 0x04 16.--22. 1. " DI1_CLK_PERIOD_0 ,DI1_CLK period option 0" rbitfld.long 0x04 15. " CLCOK_MODE_STAT ,Clock mode status" "0,1" bitfld.long 0x04 14. " DI0_SRM_CLOCK_CHANGE_MODE ,SRM clock change mode" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 7.--13. 1. " DI0_CLK_PERIOD_1 ,DI0_CLK period option 1" hexmask.long.byte 0x04 0.--6. 1. " DI0_CLK_PERIOD_0 ,DI0_CLK period option 0" line.long 0x08 "IPU_GPR,General Purpose Register" eventfld.long 0x08 31. " IPU_CH_BUF1_RDY1_CLR ,Defines the IPU_CH_BUF1_RDY1 properties" "W1s,W1c" eventfld.long 0x08 30. " IPU_CH_BUF1_RDY0_CLR ,Defines the IPU_CH_BUF1_RDY0 properties" "W1s,W1c" eventfld.long 0x08 29. " IPU_CH_BUF0_RDY1_CLR ,Defines the IPU_CH_BUF0_RDY1 properties" "W1s,W1c" textline " " eventfld.long 0x08 28. " IPU_CH_BUF0_RDY0_CLR ,Defines the IPU_CH_BUF0_RDY0 properties" "W1s,W1c" eventfld.long 0x08 27. " IPU_ALT_CH_BUF1_RDY1_CLR ,Defines the IPU_ALT_CH_BUF1_RDY1 properties" "W1s,W1c" eventfld.long 0x08 26. " IPU_ALT_CH_BUF1_RDY0_CLR ,Defines the IPU_ALT_CH_BUF1_RDY0 properties" "W1s,W1c" textline " " eventfld.long 0x08 25. " IPU_ALT_CH_BUF0_RDY1_CLR ,Defines the IPU_ALT_CH_BUF0_RDY1 properties" "W1s,W1c" eventfld.long 0x08 24. " IPU_ALT_CH_BUF0_RDY0_CLR ,Defines the IPU_ALT_CH_BUF0_RDY0 properties" "W1s,W1c" bitfld.long 0x08 23. " IPU_DI1_CLK_CHANGE_ACK_DIS ,Disable DI1's clock change mechanism" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x08 22. " IPU_DI0_CLK_CHANGE_ACK_DIS ,Disable DI0's clock change mechanism" "Not acknowledged,Acknowledged" eventfld.long 0x08 21. " IPU_CH_BUF2_RDY1_CLR ,Defines the IPU_CH_BUF2_RDY1 properties" "W1s,W1c" eventfld.long 0x08 20. " IPU_CH_BUF2_RDY0_CLR ,Defines the IPU_CH_BUF2_RDY0 properties" "W1s,W1c" textline " " hexmask.long.tbyte 0x08 0.--19. 1. " IPU_GP ,General Purpose bit" group.long 0x150++0x07 line.long 0x00 "IPU_CH_DB_MODE_SEL0,Channel Double Buffer Mode Select 0 Register" bitfld.long 0x00 31. " DMA_CH_DB_MODE_SEL_31 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 29. " DMA_CH_DB_MODE_SEL_29 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 28. " DMA_CH_DB_MODE_SEL_28 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 27. " DMA_CH_DB_MODE_SEL_27 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 26. " DMA_CH_DB_MODE_SEL_26 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 25. " DMA_CH_DB_MODE_SEL_25 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 24. " DMA_CH_DB_MODE_SEL_24 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 23. " DMA_CH_DB_MODE_SEL_23 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 22. " DMA_CH_DB_MODE_SEL_22 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 21. " DMA_CH_DB_MODE_SEL_21 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 20. " DMA_CH_DB_MODE_SEL_20 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 19. " DMA_CH_DB_MODE_SEL_19 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 18. " DMA_CH_DB_MODE_SEL_18 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 17. " DMA_CH_DB_MODE_SEL_17 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 15. " DMA_CH_DB_MODE_SEL_15 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 14. " DMA_CH_DB_MODE_SEL_14 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 13. " DMA_CH_DB_MODE_SEL_13 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 12. " DMA_CH_DB_MODE_SEL_12 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 11. " DMA_CH_DB_MODE_SEL_11 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 10. " DMA_CH_DB_MODE_SEL_10 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 9. " DMA_CH_DB_MODE_SEL_9 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 8. " DMA_CH_DB_MODE_SEL_8 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 5. " DMA_CH_DB_MODE_SEL_5 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 3. " DMA_CH_DB_MODE_SEL_3 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 2. " DMA_CH_DB_MODE_SEL_2 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 1. " DMA_CH_DB_MODE_SEL_1 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 0. " DMA_CH_DB_MODE_SEL_0 ,Double buffer mode select" "Not used,Used" line.long 0x04 "IPU_CH_DB_MODE_SEL1,Channel Double Buffer Mode Select 1 Register" bitfld.long 0x04 20. " DMA_CH_DB_MODE_SEL_52 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 19. " DMA_CH_DB_MODE_SEL_51 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 18. " DMA_CH_DB_MODE_SEL_50 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 17. " DMA_CH_DB_MODE_SEL_49 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 16. " DMA_CH_DB_MODE_SEL_48 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 15. " DMA_CH_DB_MODE_SEL_47 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 14. " DMA_CH_DB_MODE_SEL_46 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 13. " DMA_CH_DB_MODE_SEL_45 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 12. " DMA_CH_DB_MODE_SEL_44 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 11. " DMA_CH_DB_MODE_SEL_43 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 10. " DMA_CH_DB_MODE_SEL_42 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 9. " DMA_CH_DB_MODE_SEL_41 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 8. " DMA_CH_DB_MODE_SEL_40 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 1. " DMA_CH_DB_MODE_SEL_33 ,Double buffer mode select" "Not used,Used" group.long 0x168++0x07 line.long 0x00 "IPU_ALT_CH_DB_MODE_SEL0,Alternate Channel Double Buffer Mode Select 0 Register" bitfld.long 0x00 29. " DMA_CH_ALT_DB_MODE_SEL_29 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 24. " DMA_CH_ALT_DB_MODE_SEL_24 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 7. " DMA_CH_ALT_DB_MODE_SEL_7 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 6. " DMA_CH_ALT_DB_MODE_SEL_6 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 5. " DMA_CH_ALT_DB_MODE_SEL_5 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 4. " DMA_CH_ALT_DB_MODE_SEL_4 ,Double buffer mode select" "Not used,Used" line.long 0x04 "IPU_ALT_CH_DB_MODE_SEL1,Alternate Channel Double Buffer Mode Select 1 Register" bitfld.long 0x04 20. " DMA_CH_ALT_DB_MODE_SEL_52 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 9. " DMA_CH_ALT_DB_MODE_SEL_41 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 1. " DMA_CH_ALT_DB_MODE_SEL_33 ,Double buffer mode select" "Not used,Used" group.long 0x178++0x07 line.long 0x00 "IPU_CH_TRB_MODE_SEL0,IPU Channel Triple Buffer Mode Select 0 Register" bitfld.long 0x00 28. " DMA_CH_TRB_MODE_SEL_28 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 27. " DMA_CH_TRB_MODE_SEL_27 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 23. " DMA_CH_TRB_MODE_SEL_23 ,Triple buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 21. " DMA_CH_TRB_MODE_SEL_21 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 13. " DMA_CH_TRB_MODE_SEL_13 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 10. " DMA_CH_TRB_MODE_SEL_10 ,Triple buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 9. " DMA_CH_TRB_MODE_SEL_9 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 8. " DMA_CH_TRB_MODE_SEL_8 ,Triple buffer mode select" "Not used,Used" tree "IPU Status registers" width 22. group.long 0x200++0xF line.long 0x00 "IPU_INT_STAT_1,Interrupt Status Register 1" eventfld.long 0x00 31. " IDMAC_EOF_31 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 29. " IDMAC_EOF_29 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 28. " IDMAC_EOF_28 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 27. " IDMAC_EOF_27 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 26. " IDMAC_EOF_26 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 25. " IDMAC_EOF_25 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 24. " IDMAC_EOF_24 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 23. " IDMAC_EOF_23 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 22. " IDMAC_EOF_22 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 21. " IDMAC_EOF_21 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 20. " IDMAC_EOF_20 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 19. " IDMAC_EOF_19 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 18. " IDMAC_EOF_18 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 17. " IDMAC_EOF_17 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 15. " IDMAC_EOF_15 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 14. " IDMAC_EOF_14 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 13. " IDMAC_EOF_13 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 12. " IDMAC_EOF_12 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 11. " IDMAC_EOF_11 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 10. " IDMAC_EOF_10 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 9. " IDMAC_EOF_9 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 8. " IDMAC_EOF_8 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 5. " IDMAC_EOF_5 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 3. " IDMAC_EOF_3 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 2. " IDMAC_EOF_2 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 1. " IDMAC_EOF_1 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 0. " IDMAC_EOF_0 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" line.long 0x04 "IPU_INT_STAT_2,Interrupt Status Register 2" eventfld.long 0x04 20. " IDMAC_EOF_52 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 19. " IDMAC_EOF_51 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 18. " IDMAC_EOF_50 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 17. " IDMAC_EOF_49 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 16. " IDMAC_EOF_48 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 15. " IDMAC_EOF_47 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 14. " IDMAC_EOF_46 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 13. " IDMAC_EOF_45 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 12. " IDMAC_EOF_44 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 11. " IDMAC_EOF_43 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 10. " IDMAC_EOF_42 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 9. " IDMAC_EOF_41 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 8. " IDMAC_EOF_40 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 1. " IDMAC_EOF_33 ,End of Frame of Channel interrupt" "Cleared,Requested" line.long 0x08 "IPU_INT_STAT_3,Interrupt Status Register 3" eventfld.long 0x08 31. " IDMAC_NFACK_31 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 29. " IDMAC_NFACK_29 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 28. " IDMAC_NFACK_28 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 27. " IDMAC_NFACK_27 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 26. " IDMAC_NFACK_26 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 25. " IDMAC_NFACK_25 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 24. " IDMAC_NFACK_24 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 23. " IDMAC_NFACK_23 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 22. " IDMAC_NFACK_22 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 21. " IDMAC_NFACK_21 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 20. " IDMAC_NFACK_20 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 19. " IDMAC_NFACK_19 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 18. " IDMAC_NFACK_18 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 17. " IDMAC_NFACK_17 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 15. " IDMAC_NFACK_15 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 14. " IDMAC_NFACK_14 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 13. " IDMAC_NFACK_13 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 12. " IDMAC_NFACK_12 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 11. " IDMAC_NFACK_11 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 10. " IDMAC_NFACK_10 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 9. " IDMAC_NFACK_9 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 8. " IDMAC_NFACK_8 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 5. " IDMAC_NFACK_5 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 3. " IDMAC_NFACK_3 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 2. " IDMAC_NFACK_2 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 1. " IDMAC_NFACK_1 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 0. " IDMAC_NFACK_0 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" line.long 0x0C "IPU_INT_STAT_4,Interrupt Status Register 4" eventfld.long 0x0C 20. " IDMAC_NFACK_52 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 19. " IDMAC_NFACK_51 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 18. " IDMAC_NFACK_50 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 17. " IDMAC_NFACK_49 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 16. " IDMAC_NFACK_48 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 15. " IDMAC_NFACK_47 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 14. " IDMAC_NFACK_46 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 13. " IDMAC_NFACK_45 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 12. " IDMAC_NFACK_44 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 11. " IDMAC_NFACK_43 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 10. " IDMAC_NFACK_42 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 9. " IDMAC_NFACK_41 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 8. " IDMAC_NFACK_40 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 1. " IDMAC_NFACK_33 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" group.long 0x210++0x2b line.long 0x00 "IPU_INT_STAT_5,Interrupt Status Register 5" eventfld.long 0x00 31. " IDMAC_NFB4EOF_ERR_31 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 29. " IDMAC_NFB4EOF_ERR_29 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 28. " IDMAC_NFB4EOF_ERR_28 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 27. " IDMAC_NFB4EOF_ERR_27 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 26. " IDMAC_NFB4EOF_ERR_26 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 25. " IDMAC_NFB4EOF_ERR_25 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 24. " IDMAC_NFB4EOF_ERR_24 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 23. " IDMAC_NFB4EOF_ERR_23 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 22. " IDMAC_NFB4EOF_ERR_22 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 21. " IDMAC_NFB4EOF_ERR_21 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 20. " IDMAC_NFB4EOF_ERR_20 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 19. " IDMAC_NFB4EOF_ERR_19 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 18. " IDMAC_NFB4EOF_ERR_18 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 17. " IDMAC_NFB4EOF_ERR_17 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 15. " IDMAC_NFB4EOF_ERR_15 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 14. " IDMAC_NFB4EOF_ERR_14 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 13. " IDMAC_NFB4EOF_ERR_13 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 12. " IDMAC_NFB4EOF_ERR_12 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 11. " IDMAC_NFB4EOF_ERR_11 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 10. " IDMAC_NFB4EOF_ERR_10 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 9. " IDMAC_NFB4EOF_ERR_9 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 8. " IDMAC_NFB4EOF_ERR_8 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 5. " IDMAC_NFB4EOF_ERR_5 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 3. " IDMAC_NFB4EOF_ERR_3 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 2. " IDMAC_NFB4EOF_ERR_2 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 1. " IDMAC_NFB4EOF_ERR_1 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 0. " IDMAC_NFB4EOF_ERR_0 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" line.long 0x04 "IPU_INT_STAT_6,Interrupt Status Register 6" eventfld.long 0x04 20. " IDMAC_NFB4EOF_ERR_52 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 19. " IDMAC_NFB4EOF_ERR_51 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 18. " IDMAC_NFB4EOF_ERR_50 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 17. " IDMAC_NFB4EOF_ERR_49 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 16. " IDMAC_NFB4EOF_ERR_48 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 15. " IDMAC_NFB4EOF_ERR_47 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 14. " IDMAC_NFB4EOF_ERR_46 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 13. " IDMAC_NFB4EOF_ERR_45 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 12. " IDMAC_NFB4EOF_ERR_44 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 11. " IDMAC_NFB4EOF_ERR_43 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 10. " IDMAC_NFB4EOF_ERR_42 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 9. " IDMAC_NFB4EOF_ERR_41 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 8. " IDMAC_NFB4EOF_ERR_40 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 1. " IDMAC_NFB4EOF_ERR_33 ,New Frame Ack of Channel interrupt" "Cleared,Requested" line.long 0x08 "IPU_INT_STAT_7,Interrupt Status Register 7" eventfld.long 0x08 31. " EOS_31 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 29. " EOS_29 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 28. " EOS_28 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 27. " EOS_27 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 26. " EOS_26 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 25. " EOS_25 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 24. " EOS_24 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 23. " EOS_23 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 19. " EOS_19 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" line.long 0x0c "IPU_INT_STAT_8,Interrupt Status Register 8" eventfld.long 0x0c 20. " EOS_52 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 19. " EOS_51 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 12. " EOS_44 ,End of Scroll of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0c 11. " EOS_43 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 10. " EOS_42 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 9. " EOS_41 ,End of Scroll of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0c 1. " EOS_33 ,End of Scroll of Channel interrupt" "Cleared,Requested" line.long 0x10 "IPU_INT_STAT_9,Interrupt Status Register 9" eventfld.long 0x10 31. " CSI1_PUPE ,CSI1 parameters update error interrupt" "Cleared,Requested" eventfld.long 0x10 30. " CSI0_PUPE ,CSI0 parameters update error interrupt" "Cleared,Requested" eventfld.long 0x10 28. " IC_VF_BUF_OVF ,IC Buffer overflow for view finder interrupt" "Cleared,Requested" textline " " eventfld.long 0x10 27. " IC_ENC_BUF_OVF ,IC Buffer overflow for encoding interrupt" "Cleared,Requested" eventfld.long 0x10 26. " IC_BAYER_BUF_OVF ,IC Buffer overflow for Bayer coming interrupt" "Cleared,Requested" eventfld.long 0x10 0. " VDI_FIFO1_OVF ,FIFO1 overflow Interrupt1" "Cleared,Requested" line.long 0x14 "IPU_INT_STAT_10,IPU Interrupt Status Register 10" eventfld.long 0x14 30. " AXIR_ERR ,AXI read access interrupt status" "Cleared,Requested" eventfld.long 0x14 29. " AXIW_ERR ,AXI write access interrupt status" "Cleared,Requested" eventfld.long 0x14 28. " NON_PRIVILEGED_ACC_ERR ,Non Privileged Access Error interrupt status" "Cleared,Requested" textline " " eventfld.long 0x14 26. " IC_BAYER_FRM_LOST_ERR ,IC's Bayer frame lost interrupt status" "Disabled,Enabled" eventfld.long 0x14 25. " IC_ENC_FRM_LOST_ERR ,IC's encoding frame lost interrupt status" "Disabled,Enabled" eventfld.long 0x14 24. " IC_VF_FRM_LOST_ERR ,IC's view finder frame lost interrupt status" "Disabled,Enabled" textline " " eventfld.long 0x14 22. " DI1_TIME_OUT_ERR ,DI1 time out error interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 21. " DI0_TIME_OUT_ERR ,DI0 time outwore interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 20. " DI1_SYNC_DISP_ERR ,DI1 Synchronous display error status" "No interrupt,Interrupt" textline " " eventfld.long 0x14 19. " DI0_SYNC_DISP_ERR ,DI0 Synchronous display error status" "No interrupt,Interrupt" eventfld.long 0x14 18. " DC_TEARING_ERR_6 ,Tearing Error #6 status" "No interrupt,Interrupt" eventfld.long 0x14 17. " DC_TEARING_ERR_2 ,Tearing Error #2 status" "No interrupt,Interrupt" textline " " eventfld.long 0x14 16. " DC_TEARING_ERR_1 ,Tearing Error #1 status" "No interrupt,Interrupt" eventfld.long 0x14 3. " SMFC3_FRM_LOST ,Frame Lost of SMFC channel 3 interrupt" "Cleared,Requested" eventfld.long 0x14 2. " SMFC2_FRM_LOST ,Frame Lost of SMFC channel 2 interrupt" "Cleared,Requested" textline " " eventfld.long 0x14 1. " SMFC1_FRM_LOST ,Frame Lost of SMFC channel 1 interrupt" "Cleared,Requested" eventfld.long 0x14 0. " SMFC0_FRM_LOST ,Frame Lost of SMFC channel 0 interrupt" "Cleared,Requested" line.long 0x18 "IPU_INT_STAT_11,Interrupt Status Register 11" eventfld.long 0x18 26. " EOBND_26 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 25. " EOBND_25 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 22. " EOBND_22 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 21. " EOBND_21 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 20. " EOBND_20 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 12. " EOBND_12 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 11. " EOBND_11 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 5. " EOBND_5 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 3. " EOBND_3 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 2. " EOBND_2 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 1. " EOBND_1 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 0. " EOBND_0 ,End-of-band indication of Channel interrupt" "Cleared,Requested" line.long 0x1c "IPU_INT_STAT_12,Interrupt Status Register 12" eventfld.long 0x1c 18. " EOBND_50 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 17. " EOBND_49 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 16. " EOBND_48 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x1c 15. " EOBND_47 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 14. " EOBND_46 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 13. " EOBND_45 ,End-of-band indication of Channel interrupt" "Cleared,Requested" line.long 0x20 "IPU_INT_STAT_13,Interrupt Status Register 13" eventfld.long 0x20 31. " IDMAC_TH_31 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 29. " IDMAC_TH_29 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 28. " IDMAC_TH_28 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 27. " IDMAC_TH_27 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 26. " IDMAC_TH_26 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 25. " IDMAC_TH_25 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 24. " IDMAC_TH_24 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 23. " IDMAC_TH_23 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 22. " IDMAC_TH_22 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 21. " IDMAC_TH_21 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 20. " IDMAC_TH_20 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 19. " IDMAC_TH_19 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 18. " IDMAC_TH_18 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 17. " IDMAC_TH_17 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 15. " IDMAC_TH_15 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 14. " IDMAC_TH_14 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 13. " IDMAC_TH_13 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 12. " IDMAC_TH_12 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 11. " IDMAC_TH_11 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 10. " IDMAC_TH_10 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 9. " IDMAC_TH_9 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" textline " " eventfld.long 0x20 8. " IDMAC_TH_8 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 5. " IDMAC_TH_5 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 3. " IDMAC_TH_3 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" textline " " eventfld.long 0x20 2. " IDMAC_TH_2 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 1. " IDMAC_TH_1 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 0. " IDMAC_TH_0 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" line.long 0x24 "IPU_INT_STAT_14,Interrupt Status Register 14" eventfld.long 0x24 20. " IDMAC_TH_52 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 19. " IDMAC_TH_51 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 18. " IDMAC_TH_50 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 17. " IDMAC_TH_49 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 16. " IDMAC_TH_48 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 15. " IDMAC_TH_47 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 14. " IDMAC_TH_46 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 13. " IDMAC_TH_45 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 12. " IDMAC_TH_44 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 11. " IDMAC_TH_43 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 10. " IDMAC_TH_42 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 9. " IDMAC_TH_41 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 8. " IDMAC_TH_40 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 1. " IDMAC_TH_33 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" line.long 0x28 "IPU_INT_STAT_15,IPU Interrupt Status Register 15" eventfld.long 0x28 31. " DI1_CNT_PRE_8 ,Trigger generated by counter #8 of DI1 interrupt status" "Cleared,Requested" eventfld.long 0x28 30. " DI1_CNT_PRE_3 ,Trigger generated by counter #3 of DI1 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 29. " DI1_DISP_CLK_PRE , DI1_DISP_CLK interrupt status" "Cleared,Requested" eventfld.long 0x28 28. " DI0_CNT_PRE_10 ,Trigger generated by counter #10 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 27. " DI0_CNT_PRE_9 ,Trigger generated by counter #9 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 26. " DI0_CNT_PRE_8 ,Trigger generated by counter #8 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 25. " DI0_CNT_PRE_7 ,Trigger generated by counter #7 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 24. " DI0_CNT_PRE_6 ,Trigger generated by counter #6 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 23. " DI0_CNT_PRE_5 ,Trigger generated by counter #5 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 22. " DI0_CNT_PRE_4 ,Trigger generated by counter #4 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 21. " DI0_CNT_PRE_3 ,Trigger generated by counter #3 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 20. " DI0_CNT_PRE_2 ,Trigger generated by counter #2 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 19. " DI0_CNT_PRE_1 ,Trigger generated by counter #1 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 18. " DI0_CNT_PRE_0 ,Trigger generated by counter #0 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 17. " DC_ASYNC_STOP ,DP stops an async flow and moves to a sync flow interrupt status" "Cleared,Requested" eventfld.long 0x28 16. " DC_DP_START ,DP start a new sync or async flow or when an async flow interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 15. " DI_VSYNC_PRE_1 ,Status the DI1 interrupt indicating of a VSYNC signal" "Cleared,Requested" eventfld.long 0x28 14. " DI_VSYNC_PRE_0 ,Status the DI0 interrupt indicating of a VSYNC signal" "Cleared,Requested" textline " " eventfld.long 0x28 13. " DC_FC_6 ,Status the DC Frame Complete on channel #6 interrupt" "Cleared,Requested" eventfld.long 0x28 12. " DC_FC_4 ,Status the DC Frame Complete on channel #4 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 11. " DC_FC_3 ,Status the DC Frame Complete on channel #3 interrupt" "Cleared,Requested" eventfld.long 0x28 10. " DC_FC_2 ,Status the DC Frame Complete on channel #2 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 9. " DC_FC_1 ,Status the DC Frame Complete on channel #1 interrupt" "Cleared,Requested" eventfld.long 0x28 8. " DC_FC_0 ,Status the DC Frame Complete on channel #0 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 7. " DP_ASF_BRAKE ,DP Async Flow Brake status bit" "Cleared,Requested" eventfld.long 0x28 6. " DP_SF_BRAKE ,DP Sync Flow Brake status bit" "Cleared,Requested" textline " " eventfld.long 0x28 5. " DP_ASF_END ,DP Async Flow End status bit" "Cleared,Requested" eventfld.long 0x28 4. " DP_ASF_START ,DP Async Flow Start status bit" "Cleared,Requested" textline " " eventfld.long 0x28 3. " DP_SF_END ,DP Sync Flow End status bit" "Cleared,Requested" eventfld.long 0x28 2. " DP_SF_START ,DP Sync Flow Start status bit" "Cleared,Requested" textline " " eventfld.long 0x28 1. " IPU_SNOOPING2_INT ,Snooping 2 interrupt status bit" "Cleared,Requested" eventfld.long 0x28 0. " IPU_SNOOPING1_INT ,Snooping 1 interrupt status bit" "Cleared,Requested" rgroup.long 0x23c++0x17 line.long 0x00 "IPU_CUR_BUF_0,Current Buffer Register 0" bitfld.long 0x00 31. " DMA_CH_CUR_BUF_31 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 29. " DMA_CH_CUR_BUF_29 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 28. " DMA_CH_CUR_BUF_28 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 27. " DMA_CH_CUR_BUF_27 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 26. " DMA_CH_CUR_BUF_26 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 25. " DMA_CH_CUR_BUF_25 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 24. " DMA_CH_CUR_BUF_24 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 23. " DMA_CH_CUR_BUF_23 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 22. " DMA_CH_CUR_BUF_22 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 21. " DMA_CH_CUR_BUF_21 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 20. " DMA_CH_CUR_BUF_20 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 19. " DMA_CH_CUR_BUF_19 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 18. " DMA_CH_CUR_BUF_18 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 17. " DMA_CH_CUR_BUF_17 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 15. " DMA_CH_CUR_BUF_15 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 14. " DMA_CH_CUR_BUF_14 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 13. " DMA_CH_CUR_BUF_13 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 12. " DMA_CH_CUR_BUF_12 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 11. " DMA_CH_CUR_BUF_11 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 10. " DMA_CH_CUR_BUF_10 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 9. " DMA_CH_CUR_BUF_9 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 8. " DMA_CH_CUR_BUF_8 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 5. " DMA_CH_CUR_BUF_5 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 3. " DMA_CH_CUR_BUF_3 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 2. " DMA_CH_CUR_BUF_2 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 1. " DMA_CH_CUR_BUF_1 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 0. " DMA_CH_CUR_BUF_0 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x04 "IPU_CUR_BUF_1,IPU Current Buffer Register 1" bitfld.long 0x04 20. " DMA_CH_CUR_BUF_52 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 19. " DMA_CH_CUR_BUF_51 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 18. " DMA_CH_CUR_BUF_50 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 17. " DMA_CH_CUR_BUF_49 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 16. " DMA_CH_CUR_BUF_48 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 15. " DMA_CH_CUR_BUF_47 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 14. " DMA_CH_CUR_BUF_46 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 13. " DMA_CH_CUR_BUF_45 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 12. " DMA_CH_CUR_BUF_44 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 11. " DMA_CH_CUR_BUF_43 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 10. " DMA_CH_CUR_BUF_42 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 9. " DMA_CH_CUR_BUF_41 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 8. " DMA_CH_CUR_BUF_40 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 1. " DMA_CH_CUR_BUF_33 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x08 "IPU_ALT_CUR_BUF_0,Alternate Current Buffer Register 0" bitfld.long 0x08 29. " DMA_CH_ALT_CUR_BUF_29 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x08 24. " DMA_CH_ALT_CUR_BUF_24 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x0c "IPU_ALT_CUR_BUF_1,Alternate Current Buffer Register 1" bitfld.long 0x0c 20. " DMA_CH_ALT_CUR_BUF_52 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x0c 9. " DMA_CH_ALT_CUR_BUF_41 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x0c 1. " DMA_CH_ALT_CUR_BUF_33 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x10 "IPU_SRM_STAT,IPU Shadow Registers Memory Status Register" bitfld.long 0x10 9. " DI1_SRM_STAT ,Indicates that the SRM is currently updating the DI1" "Not updated,Updated" bitfld.long 0x10 8. " DI0_SRM_STAT ,Indicates that the SRM is currently updating the DI0" "Not updated,Updated" bitfld.long 0x10 7. " CSI1_SRM_STAT ,Indicates that the SRM is currently updating the CSI1" "Not updated,Updated" textline " " bitfld.long 0x10 6. " CSI0_SRM_STAT ,Indicates that the SRM is currently updating the CSI0" "Not updated,Updated" bitfld.long 0x10 5. " DC_6_SRM_STAT ,Indicates that the SRM is currently updating the DC group #6" "Not updated,Updated" bitfld.long 0x10 4. " DC_2_SRM_STAT ,Indicates that the SRM is currently updating the DC group #2" "Not updated,Updated" textline " " bitfld.long 0x10 2. " DP_A1_SRM_STAT ,Indicates that the SRM is currently updating the DP async flow 1" "Not updated,Updated" bitfld.long 0x10 1. " DP_A0_SRM_STAT ,Indicates that the SRM is currently updating the DP async flow 0" "Not updated,Updated" bitfld.long 0x10 0. " DP_S_SRM_STAT ,Indicates that the SRM is currently updating the DP sync flow" "Not updated,Updated" line.long 0x14 "IPU_PROC_TASKS_STAT,Processing Tasks Status Register" bitfld.long 0x14 12.--14. " MEM2PRP_TSTAT ,Status of the pre processing tasks(viewfinder and encoding)" "IDLE,BOTH_ACTIVE,ENC_ACTIVE,VF_ACTIVE,BOTH_PAUSE,?..." bitfld.long 0x14 10.--11. " PP_ROT_TSTAT ,Status of the rotation for post processing task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 8.--9. " VF_ROT_TSTAT ,Status of the rotation for viewfinder task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x14 6.--7. " ENC_ROT_TSTAT ,Status of the rotation for encoding task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 4.--5. " PP_TSTAT ,Status of the post processing task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x14 2.--3. " VF_TSTAT ,Status of the viewfinder task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 0.--1. " ENC_TSTAT ,Status of the encoding task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." rgroup.long 0x254++0x03 line.long 0x00 "IPU_DISP_TASKS_STAT,IPU Display Tasks Status Register" bitfld.long 0x00 11. " DC_ASYNC2_CUR_FLOW ,Current asynchronous #2 flow via the DC" "Main,Alternate" bitfld.long 0x00 8.--10. " DC_ASYNCH2_STAT ,Status of the Asynchronous flow #2 through the DC" "IDLE,PRIM_ACTIVE,ALT_ACTIVE,UPDATE_PARAM,PAUSE,?..." textline " " bitfld.long 0x00 4.--5. " DC_ASYNC1_STAT ,Status of the Asynchronous flow #1 through the DC" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x00 3. " DP_ASYNC_CUR_FLOW ,Current asynchronous flow via the DP" "Main,Alternate" textline " " bitfld.long 0x00 0.--2. " DP_ASYNCH_TSTAT ,Status of the Asynchronous flow through the DP" "IDLE,PRIM_ACTIVE,ALT_ACTIVE,UPDATE_PARAM,PAUSE,?..." rgroup.long 0x258++0x07 line.long 0x00 "IPU_TRIPLE_CUR_BUF_0,Triple Current Buffer Register 0" bitfld.long 0x00 26.--27. " DMA_CH_TRIPLE_CUR_BUF_13 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x00 20.--21. " DMA_CH_TRIPLE_CUR_BUF_10 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." textline " " bitfld.long 0x00 18.--19. " DMA_CH_TRIPLE_CUR_BUF_9 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x00 16.--17. " DMA_CH_TRIPLE_CUR_BUF_8 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." line.long 0x04 "IPU_TRIPLE_CUR_BUF_1,Triple Current Buffer Register 1" bitfld.long 0x04 24.--25. " DMA_CH_TRIPLE_CUR_BUF_28 ,Current buffer for triple buffer mode 28" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x04 22.--23. " DMA_CH_TRIPLE_CUR_BUF_27 ,Current buffer for triple buffer mode 27" "Buffer 0,Buffer 1,Buffer 2,?..." textline " " bitfld.long 0x04 14.--15. " DMA_CH_TRIPLE_CUR_BUF_23 ,Current buffer for triple buffer mode 23" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x04 10.--11. " DMA_CH_TRIPLE_CUR_BUF_21 ,Current buffer for triple buffer mode 21" "Buffer 0,Buffer 1,Buffer 2,?..." group.long 0x268++0x27 line.long 0x00 "IPU_CH_BUF0_RDY0,IPU Channels Buffer 0 Ready 0 Register" bitfld.long 0x00 31. " DMA_CH_BUF0_RDY_31 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 29. " DMA_CH_BUF0_RDY_29 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 28. " DMA_CH_BUF0_RDY_28 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 27. " DMA_CH_BUF0_RDY_27 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 24. " DMA_CH_BUF0_RDY_24 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 23. " DMA_CH_BUF0_RDY_23 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 22. " DMA_CH_BUF0_RDY_22 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 21. " DMA_CH_BUF0_RDY_21 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 20. " DMA_CH_BUF0_RDY_20 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 18. " DMA_CH_BUF0_RDY_18 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 17. " DMA_CH_BUF0_RDY_17 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 15. " DMA_CH_BUF0_RDY_15 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 14. " DMA_CH_BUF0_RDY_14 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 13. " DMA_CH_BUF0_RDY_13 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 12. " DMA_CH_BUF0_RDY_12 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 11. " DMA_CH_BUF0_RDY_11 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 10. " DMA_CH_BUF0_RDY_10 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 9. " DMA_CH_BUF0_RDY_9 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " DMA_CH_BUF0_RDY_8 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 7. " DMA_CH_BUF0_RDY_7 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 6. " DMA_CH_BUF0_RDY_6 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 5. " DMA_CH_BUF0_RDY_5 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 4. " DMA_CH_BUF0_RDY_4 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 3. " DMA_CH_BUF0_RDY_3 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 2. " DMA_CH_BUF0_RDY_2 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 1. " DMA_CH_BUF0_RDY_1 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 0. " DMA_CH_BUF0_RDY_0 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x04 "IPU_CH_BUF0_RDY1,IPU Channels Buffer 0 Ready 1 Register" bitfld.long 0x04 20. " DMA_CH_BUF0_RDY_52 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 19. " DMA_CH_BUF0_RDY_51 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 18. " DMA_CH_BUF0_RDY_50 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 17. " DMA_CH_BUF0_RDY_49 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 16. " DMA_CH_BUF0_RDY_48 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 15. " DMA_CH_BUF0_RDY_47 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 14. " DMA_CH_BUF0_RDY_46 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 13. " DMA_CH_BUF0_RDY_45 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 12. " DMA_CH_BUF0_RDY_44 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 11. " DMA_CH_BUF0_RDY_43 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 10. " DMA_CH_BUF0_RDY_42 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 9. " DMA_CH_BUF0_RDY_41 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 8. " DMA_CH_BUF0_RDY_40 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 1. " DMA_CH_BUF0_RDY_33 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x08 "IPU_CH_BUF1_RDY0,Channels Buffer 1 Ready 0 Register" bitfld.long 0x08 31. " DMA_CH_BUF1_RDY_31 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 29. " DMA_CH_BUF1_RDY_29 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 28. " DMA_CH_BUF1_RDY_28 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 27. " DMA_CH_BUF1_RDY_27 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 26. " DMA_CH_BUF1_RDY_26 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 25. " DMA_CH_BUF1_RDY_25 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 24. " DMA_CH_BUF1_RDY_24 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 23. " DMA_CH_BUF1_RDY_23 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 22. " DMA_CH_BUF1_RDY_22 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 21. " DMA_CH_BUF1_RDY_21 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 20. " DMA_CH_BUF1_RDY_20 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 19. " DMA_CH_BUF1_RDY_19 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 18. " DMA_CH_BUF1_RDY_18 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 17. " DMA_CH_BUF1_RDY_17 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 15. " DMA_CH_BUF1_RDY_15 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 14. " DMA_CH_BUF1_RDY_14 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 13. " DMA_CH_BUF1_RDY_13 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 12. " DMA_CH_BUF1_RDY_12 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 11. " DMA_CH_BUF1_RDY_11 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 10. " DMA_CH_BUF1_RDY_10 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 9. " DMA_CH_BUF1_RDY_9 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 8. " DMA_CH_BUF1_RDY_8 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 5. " DMA_CH_BUF1_RDY_5 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 3. " DMA_CH_BUF1_RDY_3 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 2. " DMA_CH_BUF1_RDY_2 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 1. " DMA_CH_BUF1_RDY_1 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 0. " DMA_CH_BUF1_RDY_0 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x0c "IPU_CH_BUF1_RDY1,Channels Buffer 1 Ready 1 Register" bitfld.long 0x0c 20. " DMA_CH_BUF1_RDY_52 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 19. " DMA_CH_BUF1_RDY_51 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 18. " DMA_CH_BUF1_RDY_50 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 17. " DMA_CH_BUF1_RDY_49 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 16. " DMA_CH_BUF1_RDY_48 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 15. " DMA_CH_BUF1_RDY_47 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 14. " DMA_CH_BUF1_RDY_46 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 13. " DMA_CH_BUF1_RDY_45 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 12. " DMA_CH_BUF1_RDY_44 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 11. " DMA_CH_BUF1_RDY_43 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 10. " DMA_CH_BUF1_RDY_42 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 9. " DMA_CH_BUF1_RDY_41 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 8. " DMA_CH_BUF1_RDY_40 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 1. " DMA_CH_BUF1_RDY_33 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x10 "IPU_ALT_CH_BUF0_RDY0,IPU Alternate Channels Buffer 0 Ready 0 Register" bitfld.long 0x10 29. " DMA_CH_ALT_BUF0_RDY_29 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x10 24. " DMA_CH_ALT_BUF0_RDY_24 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x14 "IPU_ALT_CH_BUF0_RDY1,IPU Alternate Channels Buffer 0 Ready 1 Register" bitfld.long 0x14 20. " DMA_CH_ALT_BUF0_RDY_52 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x14 9. " DMA_CH_ALT_BUF0_RDY_41 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x14 1. " DMA_CH_ALT_BUF0_RDY_33 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x18 "IPU_ALT_CH_BUF1_RDY0,Alternate Channels Buffer 1 Ready 0 Register" bitfld.long 0x18 29. " DMA_CH_ALT_BUF1_RDY_29 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x18 24. " DMA_CH_ALT_BUF1_RDY_24 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x1c "IPU_ALT_CH_BUF1_RDY1,Alternate Channels Buffer 1 Ready 1 Register" bitfld.long 0x1c 20. " DMA_CH_ALT_BUF1_RDY_52 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x1c 9. " DMA_CH_ALT_BUF1_RDY_41 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x1c 1. " DMA_CH_ALT_BUF1_RDY_33 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x20 "IPU_CH_BUF2_RDY0,Channels Buffer 2 Ready 0 Register" bitfld.long 0x20 28. " DMA_CH_BUF2_RDY_28 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 27. " DMA_CH_BUF2_RDY_27 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 23. " DMA_CH_BUF2_RDY_23 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 21. " DMA_CH_BUF2_RDY_21 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 13. " DMA_CH_BUF2_RDY_13 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 10. " DMA_CH_BUF2_RDY_10 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 9. " DMA_CH_BUF2_RDY_9 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 8. " DMA_CH_BUF2_RDY_8 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 2. " DMA_CH_BUF2_RDY_2 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 0. " DMA_CH_BUF2_RDY_0 ,Buffer 2 is ready" "Not ready,Ready" line.long 0x24 "IPU_CH_BUF2_RDY1,Channels Buffer 2 Ready 1 Register" bitfld.long 0x24 31. " DMA_CH_BUF2_RDY_31 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 30. " DMA_CH_BUF2_RDY_30 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 29. " DMA_CH_BUF2_RDY_29 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 28. " DMA_CH_BUF2_RDY_28 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 27. " DMA_CH_BUF2_RDY_27 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 26. " DMA_CH_BUF2_RDY_26 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 25. " DMA_CH_BUF2_RDY_25 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 24. " DMA_CH_BUF2_RDY_24 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 23. " DMA_CH_BUF2_RDY_23 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 22. " DMA_CH_BUF2_RDY_22 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 21. " DMA_CH_BUF2_RDY_21 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 20. " DMA_CH_BUF2_RDY_20 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 19. " DMA_CH_BUF2_RDY_19 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 18. " DMA_CH_BUF2_RDY_18 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 17. " DMA_CH_BUF2_RDY_17 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 16. " DMA_CH_BUF2_RDY_16 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 15. " DMA_CH_BUF2_RDY_15 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 14. " DMA_CH_BUF2_RDY_14 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 13. " DMA_CH_BUF2_RDY_13 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 12. " DMA_CH_BUF2_RDY_12 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 11. " DMA_CH_BUF2_RDY_11 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 10. " DMA_CH_BUF2_RDY_10 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 9. " DMA_CH_BUF2_RDY_9 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 8. " DMA_CH_BUF2_RDY_8 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 7. " DMA_CH_BUF2_RDY_7 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 6. " DMA_CH_BUF2_RDY_6 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 5. " DMA_CH_BUF2_RDY_5 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 4. " DMA_CH_BUF2_RDY_4 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 3. " DMA_CH_BUF2_RDY_3 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 2. " DMA_CH_BUF2_RDY_2 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 1. " DMA_CH_BUF2_RDY_1 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 0. " DMA_CH_BUF2_RDY_0 ,Buffer 2 is ready" "Not ready,Ready" tree.end width 0x0B tree.end tree "IDMAC registers" base ad:0x02608000 width 21. group.long 0x00++0x0B line.long 0x00 "IDMAC_CONF,IDMAC Configuration Register" bitfld.long 0x00 25. " USED_BUFS_EN_R ,Limit on the number of pending non real time read requests" "Disabled,Enabled" bitfld.long 0x00 21.--24. " USED_BUFS_MAX_R ,Limit the number of pending non real time read requests" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 20. " USED_BUFS_EN_W ,Limit on the number of pending non real time write requests" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--19. " USED_BUFS_MAX_W ,Limit the number of pending non real time write requests" "0,1,2,3,4,5,6,?..." bitfld.long 0x00 16. " P_ENDIAN ,Pixel Endianness" "Little,Big" bitfld.long 0x00 5. " RDI ,Read Data Interleaving" "Not supported,Supported" textline " " bitfld.long 0x00 3.--4. " WIDPT ,Write Interleaving Depth" "1,2,3,4" bitfld.long 0x00 0.--2. " MAX_REQ_READ ,Maximum Read Requests" "0,1,2,3,4,5,6,7" line.long 0x04 "IDMAC_CH_EN_1,IDMAC Channel Enable 1 Register" bitfld.long 0x04 31. " IDMAC_CH_EN_31 ,IDMAC Channel enable bit 31" "Disabled,Enabled" bitfld.long 0x04 29. " IDMAC_CH_EN_29 ,IDMAC Channel enable bit 29" "Disabled,Enabled" bitfld.long 0x04 28. " IDMAC_CH_EN_28 ,IDMAC Channel enable bit 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " IDMAC_CH_EN_27 ,IDMAC Channel enable bit 27" "Disabled,Enabled" bitfld.long 0x04 26. " IDMAC_CH_EN_26 ,IDMAC Channel enable bit 24" "Disabled,Enabled" bitfld.long 0x04 25. " IDMAC_CH_EN_25 ,IDMAC Channel enable bit 24" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " IDMAC_CH_EN_24 ,IDMAC Channel enable bit 24" "Disabled,Enabled" bitfld.long 0x04 23. " IDMAC_CH_EN_23 ,IDMAC Channel enable bit 23" "Disabled,Enabled" bitfld.long 0x04 22. " IDMAC_CH_EN_22 ,IDMAC Channel enable bit 22" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " IDMAC_CH_EN_21 ,IDMAC Channel enable bit 21" "Disabled,Enabled" bitfld.long 0x04 20. " IDMAC_CH_EN_20 ,IDMAC Channel enable bit 20" "Disabled,Enabled" bitfld.long 0x04 19. " IDMAC_CH_EN_19 ,IDMAC Channel enable bit 18" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " IDMAC_CH_EN_18 ,IDMAC Channel enable bit 18" "Disabled,Enabled" bitfld.long 0x04 17. " IDMAC_CH_EN_17 ,IDMAC Channel enable bit 17" "Disabled,Enabled" bitfld.long 0x04 15. " IDMAC_CH_EN_15 ,IDMAC Channel enable bit 15" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " IDMAC_CH_EN_14 ,IDMAC Channel enable bit 14" "Disabled,Enabled" bitfld.long 0x04 13. " IDMAC_CH_EN_13 ,IDMAC Channel enable bit 13" "Disabled,Enabled" bitfld.long 0x04 12. " IDMAC_CH_EN_12 ,IDMAC Channel enable bit 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " IDMAC_CH_EN_11 ,IDMAC Channel enable bit 11" "Disabled,Enabled" bitfld.long 0x04 10. " IDMAC_CH_EN_10 ,IDMAC Channel enable bit 10" "Disabled,Enabled" bitfld.long 0x04 9. " IDMAC_CH_EN_9 ,IDMAC Channel enable bit 9" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " IDMAC_CH_EN_8 ,IDMAC Channel enable bit 8" "Disabled,Enabled" bitfld.long 0x04 5. " IDMAC_CH_EN_5 ,IDMAC Channel enable bit 5" "Disabled,Enabled" bitfld.long 0x04 3. " IDMAC_CH_EN_3 ,IDMAC Channel enable bit 3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " IDMAC_CH_EN_2 ,IDMAC Channel enable bit 2" "Disabled,Enabled" bitfld.long 0x04 1. " IDMAC_CH_EN_1 ,IDMAC Channel enable bit 1" "Disabled,Enabled" bitfld.long 0x04 0. " IDMAC_CH_EN_0 ,IDMAC Channel enable bit 0" "Disabled,Enabled" line.long 0x08 "IDMAC_CH_EN_2,IDMAC Channel Enable 2 Register" bitfld.long 0x08 20. " IDMAC_CH_EN_52 ,IDMAC Channel enable bit 52" "Disabled,Enabled" bitfld.long 0x08 19. " IDMAC_CH_EN_51 ,IDMAC Channel enable bit 51" "Disabled,Enabled" bitfld.long 0x08 18. " IDMAC_CH_EN_50 ,IDMAC Channel enable bit 50" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " IDMAC_CH_EN_49 ,IDMAC Channel enable bit 49" "Disabled,Enabled" bitfld.long 0x08 16. " IDMAC_CH_EN_48 ,IDMAC Channel enable bit 48" "Disabled,Enabled" bitfld.long 0x08 15. " IDMAC_CH_EN_47 ,IDMAC Channel enable bit 47" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " IDMAC_CH_EN_46 ,IDMAC Channel enable bit 46" "Disabled,Enabled" bitfld.long 0x08 13. " IDMAC_CH_EN_45 ,IDMAC Channel enable bit 45" "Disabled,Enabled" bitfld.long 0x08 12. " IDMAC_CH_EN_44 ,IDMAC Channel enable bit 44" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " IDMAC_CH_EN_43 ,IDMAC Channel enable bit 43" "Disabled,Enabled" bitfld.long 0x08 10. " IDMAC_CH_EN_42 ,IDMAC Channel enable bit 42" "Disabled,Enabled" bitfld.long 0x08 9. " IDMAC_CH_EN_41 ,IDMAC Channel enable bit 41" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " IDMAC_CH_EN_40 ,IDMAC Channel enable bit 40" "Disabled,Enabled" bitfld.long 0x08 1. " IDMAC_CH_EN_33 ,IDMAC Channel enable bit 33" "Disabled,Enabled" group.long 0x0C++0x1F line.long 0x00 "IDMAC_SEP_ALPHA,IDMAC Separate Alpha Indication Register" bitfld.long 0x00 29. " IDMAC_SEP_AL_29 ,IDMAC Separate alpha indication bit 29" "Not read,Read" bitfld.long 0x00 27. " IDMAC_SEP_AL_27 ,IDMAC Separate alpha indication bit 27" "Not read,Read" bitfld.long 0x00 25. " IDMAC_SEP_AL_25 ,IDMAC Separate alpha indication bit 24" "Not read,Read" textline " " bitfld.long 0x00 24. " IDMAC_SEP_AL_24 ,IDMAC Separate alpha indication bit 24" "Not read,Read" bitfld.long 0x00 23. " IDMAC_SEP_AL_23 ,IDMAC Separate alpha indication bit 23" "Not read,Read" bitfld.long 0x00 15. " IDMAC_SEP_AL_15 ,IDMAC Separate alpha indication bit 15" "Not read,Read" textline " " bitfld.long 0x00 14. " IDMAC_SEP_AL_14 ,IDMAC Separate alpha indication bit 14" "Not read,Read" line.long 0x04 "IDMAC_ALT_SEP_ALPHA,IDMAC Alternate Separate Alpha Indication Register" bitfld.long 0x04 29. " IDMAC_ALT_SEP_AL_29 ,IDMAC Separate alpha indication bit 29" "Not read,Read" bitfld.long 0x04 24. " IDMAC_ALT_SEP_AL_24 ,IDMAC Separate alpha indication bit 24" "Not read,Read" bitfld.long 0x04 23. " IDMAC_ALT_SEP_AL_23 ,IDMAC Separate alpha indication bit 23" "Not read,Read" line.long 0x08 "IDMAC_CH_PRI_1,IDMAC Channel Priority 1 Register" bitfld.long 0x08 29. " IDMAC_CH_PRI_29 ,IDMAC Channel priority bit 29" "Low,High" bitfld.long 0x08 28. " IDMAC_CH_PRI_28 ,IDMAC Channel priority bit 28" "Low,High" bitfld.long 0x08 27. " IDMAC_CH_PRI_27 ,IDMAC Channel priority bit 27" "Low,High" textline " " bitfld.long 0x08 26. " IDMAC_CH_PRI_26 ,IDMAC Channel priority bit 26" "Low,High" bitfld.long 0x08 25. " IDMAC_CH_PRI_25 ,IDMAC Channel priority bit 25" "Low,High" bitfld.long 0x08 24. " IDMAC_CH_PRI_24 ,IDMAC Channel priority bit 24" "Low,High" textline " " bitfld.long 0x08 23. " IDMAC_CH_PRI_23 ,IDMAC Channel priority bit 23" "Low,High" bitfld.long 0x08 22. " IDMAC_CH_PRI_22 ,IDMAC Channel priority bit 22" "Low,High" bitfld.long 0x08 21. " IDMAC_CH_PRI_21 ,IDMAC Channel priority bit 21" "Low,High" textline " " bitfld.long 0x08 20. " IDMAC_CH_PRI_20 ,IDMAC Channel priority bit 20" "Low,High" bitfld.long 0x08 15. " IDMAC_CH_PRI_15 ,IDMAC Channel priority bit 15" "Low,High" bitfld.long 0x08 14. " IDMAC_CH_PRI_14 ,IDMAC Channel priority bit 14" "Low,High" textline " " bitfld.long 0x08 13. " IDMAC_CH_PRI_13 ,IDMAC Channel priority bit 13" "Low,High" bitfld.long 0x08 12. " IDMAC_CH_PRI_12 ,IDMAC Channel priority bit 12" "Low,High" bitfld.long 0x08 11. " IDMAC_CH_PRI_11 ,IDMAC Channel priority bit 11" "Low,High" textline " " bitfld.long 0x08 10. " IDMAC_CH_PRI_10 ,IDMAC Channel priority bit 10" "Low,High" bitfld.long 0x08 9. " IDMAC_CH_PRI_9 ,IDMAC Channel priority bit 9" "Low,High" bitfld.long 0x08 8. " IDMAC_CH_PRI_8 ,IDMAC Channel priority bit 8" "Low,High" textline " " bitfld.long 0x08 5. " IDMAC_CH_PRI_5 ,IDMAC Channel priority bit 5" "Low,High" bitfld.long 0x08 3. " IDMAC_CH_PRI_3 ,IDMAC Channel priority bit 3" "Low,High" bitfld.long 0x08 2. " IDMAC_CH_PRI_2 ,IDMAC Channel priority bit 2" "Low,High" textline " " bitfld.long 0x08 1. " IDMAC_CH_PRI_1 ,IDMAC Channel priority bit 1" "Low,High" bitfld.long 0x08 0. " IDMAC_CH_PRI_0 ,IDMAC Channel priority bit 0" "Low,High" line.long 0x0C "IDMAC_CH_PRI_2,IDMAC Channel Priority 2 Register" bitfld.long 0x0C 18. " IDMAC_CH_PRI_18 ,IDMAC Channel priority bit 18" "Low,High" bitfld.long 0x0C 17. " IDMAC_CH_PRI_17 ,IDMAC Channel priority bit 17" "Low,High" bitfld.long 0x0C 16. " IDMAC_CH_PRI_16 ,IDMAC Channel priority bit 16" "Low,High" textline " " bitfld.long 0x0C 15. " IDMAC_CH_PRI_15 ,IDMAC Channel priority bit 15" "Low,High" bitfld.long 0x0C 14. " IDMAC_CH_PRI_14 ,IDMAC Channel priority bit 14" "Low,High" bitfld.long 0x0C 13. " IDMAC_CH_PRI_13 ,IDMAC Channel priority bit 13" "Low,High" textline " " bitfld.long 0x0C 12. " IDMAC_CH_PRI_12 ,IDMAC Channel priority bit 12" "Low,High" bitfld.long 0x0C 11. " IDMAC_CH_PRI_11 ,IDMAC Channel priority bit 11" "Low,High" bitfld.long 0x0C 10. " IDMAC_CH_PRI_10 ,IDMAC Channel priority bit 10" "Low,High" textline " " bitfld.long 0x0C 9. " IDMAC_CH_PRI_9 ,IDMAC Channel priority bit 9" "Low,High" bitfld.long 0x0C 8. " IDMAC_CH_PRI_8 ,IDMAC Channel priority bit 8" "Low,High" line.long 0x10 "IDMAC_WM_EN_1,IDMAC Channel Watermark Enable 1 Register" bitfld.long 0x10 29. " IDMAC_WM_EN_29 ,IDMAC Watermark enable bit 29" "Disabled,Enabled" bitfld.long 0x10 28. " IDMAC_WM_EN_28 ,IDMAC Watermark enable bit 28" "Disabled,Enabled" bitfld.long 0x10 27. " IDMAC_WM_EN_27 ,IDMAC Watermark enable bit 27" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " IDMAC_WM_EN_26 ,IDMAC Watermark enable bit 26" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_WM_EN_25 ,IDMAC Watermark enable bit 25" "Disabled,Enabled" bitfld.long 0x10 24. " IDMAC_WM_EN_24 ,IDMAC Watermark enable bit 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " IDMAC_WM_EN_23 ,IDMAC Watermark enable bit 23" "Disabled,Enabled" bitfld.long 0x10 14. " IDMAC_WM_EN_14 ,IDMAC Watermark enable bit 14" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_WM_EN_13 ,IDMAC Watermark enable bit 13" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " IDMAC_WM_EN_12 ,IDMAC Watermark enable bit 12" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_WM_EN_10 ,IDMAC Watermark enable bit 10" "Disabled,Enabled" bitfld.long 0x10 8. " IDMAC_WM_EN_8 ,IDMAC Watermark enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " IDMAC_WM_EN_3 ,IDMAC Watermark enable bit 3" "Disabled,Enabled" bitfld.long 0x10 2. " IDMAC_WM_EN_2 ,IDMAC Watermark enable bit 2" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_WM_EN_1 ,IDMAC Watermark enable bit 1" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " IDMAC_WM_EN_0 ,IDMAC Watermark enable bit 0" "Disabled,Enabled" line.long 0x14 "IDMAC_WM_EN_2,IDMAC Channel Watermark Enable 2 Register" bitfld.long 0x14 12. " IDMAC_WM_EN_44 ,IDMAC Watermark enable bit 44" "Disabled,Enabled" bitfld.long 0x14 11. " IDMAC_WM_EN_43 ,IDMAC Watermark enable bit 43" "Disabled,Enabled" bitfld.long 0x14 10. " IDMAC_WM_EN_42 ,IDMAC Watermark enable bit 42" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " IDMAC_WM_EN_41 ,IDMAC Watermark enable bit 41" "Disabled,Enabled" bitfld.long 0x14 8. " IDMAC_WM_EN_40 ,IDMAC Watermark enable bit 40" "Disabled,Enabled" line.long 0x18 "IDMAC_LOCK_EN_1,IDMAC Channel Lock Enable 1 Register" bitfld.long 0x18 20.--21. " IDMAC_LOCK_EN_28 ,IDMAC lock bits for channel 28" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 18.--19. " IDMAC_LOCK_EN_27 ,IDMAC lock bits for channel 27" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 16.--17. " IDMAC_LOCK_EN_23 ,IDMAC lock bits for channel 23" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 14.--15. " IDMAC_LOCK_EN_22 ,IDMAC lock bits for channel 22" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 12.--13. " IDMAC_LOCK_EN_21 ,IDMAC lock bits for channel 21" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 10.--11. " IDMAC_LOCK_EN_20 ,IDMAC lock bits for channel 20" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 8.--9. " IDMAC_LOCK_EN_15 ,IDMAC lock bits for channel 15" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 6.--7. " IDMAC_LOCK_EN_14 ,IDMAC lock bits for channel 14" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 4.--5. " IDMAC_LOCK_EN_12 ,IDMAC lock bits for channel 12" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 2.--3. " IDMAC_LOCK_EN_11 ,IDMAC lock bits for channel 11" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 0.--1. " IDMAC_LOCK_EN_5 ,IDMAC lock bits for channel 5" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" line.long 0x1C "IDMAC_LOCK_EN_2,IDMAC Channel Lock Enable 2 Register" bitfld.long 0x1C 10.--11. " IDMAC_LOCK_EN_50 ,IDMAC lock bits for channel 50" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 8.--9. " IDMAC_LOCK_EN_49 ,IDMAC lock bits for channel 49" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 6.--7. " IDMAC_LOCK_EN_48 ,IDMAC lock bits for channel 48" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x1C 4.--5. " IDMAC_LOCK_EN_47 ,IDMAC lock bits for channel 47" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 2.--3. " IDMAC_LOCK_EN_46 ,IDMAC lock bits for channel 46" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 0.--1. " IDMAC_LOCK_EN_45 ,IDMAC lock bits for channel 45" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" group.long 0x2C++0x03 line.long 0x00 "IDMAC_SUB_ADDR_0,IDMAC Channel Alternate address 0 Register" group.long 0x30++0x1f line.long 0x00 "IDMAC_SUB_ADDR_1,IDMAC Channel Alternate address 1 Register" hexmask.long.byte 0x00 24.--30. 1. " IDMAC_SUB_ADDR_33 ,The CPMEM alternative entry 33" hexmask.long.byte 0x00 16.--22. 1. " IDMAC_SUB_ADDR_29 ,The CPMEM alternative entry 29" hexmask.long.byte 0x00 8.--14. 1. " IDMAC_SUB_ADDR_24 ,The CPMEM alternative entry 24" textline " " hexmask.long.byte 0x00 0.--6. 1. " IDMAC_SUB_ADDR_23 ,The CPMEM alternative entry 23" line.long 0x04 "IDMAC_SUB_ADDR_2,IDMAC Channel Alternate address 2 Register" hexmask.long.byte 0x04 16.--22. 1. " IDMAC_SUB_ADDR_52 ,The CPMEM alternative entry 52" hexmask.long.byte 0x04 8.--14. 1. " IDMAC_SUB_ADDR_51 ,The CPMEM alternative entry 51" hexmask.long.byte 0x04 0.--6. 1. " IDMAC_SUB_ADDR_41 ,The CPMEM alternative entry 41" line.long 0x08 "IDMAC_SUB_ADDR_3,IDMAC Channel Alternate address 3 Register" hexmask.long.byte 0x08 24.--30. 1. " IDMAC_SUB_ADDR_27 ,The CPMEM alternative entry 27" hexmask.long.byte 0x08 16.--22. 1. " IDMAC_SUB_ADDR_13 ,The CPMEM alternative entry 13" hexmask.long.byte 0x08 8.--14. 1. " IDMAC_SUB_ADDR_10 ,The CPMEM alternative entry 10" textline " " hexmask.long.byte 0x08 0.--6. 1. " IDMAC_SUB_ADDR_9 ,The CPMEM alternative entry 9" line.long 0x0c "IDMAC_SUB_ADDR_4,IDMAC Channel Alternate address 4 Register" hexmask.long.byte 0x0c 16.--22. 1. " IDMAC_SUB_ADDR_21 ,The CPMEM alternative entry 21" hexmask.long.byte 0x0c 8.--14. 1. " IDMAC_SUB_ADDR_8 ,The CPMEM alternative entry 8" hexmask.long.byte 0x0c 0.--6. 1. " IDMAC_SUB_ADDR_28 ,The CPMEM alternative entry 28" line.long 0x10 "IDMAC_BNDM_EN_1,IDMAC Band Mode Enable 1 Register" bitfld.long 0x10 26. " IDMAC_BNDM_EN_26 ,IDMAC Band Mode Enable bit 26" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_BNDM_EN_25 ,IDMAC Band Mode Enable bit 25" "Disabled,Enabled" bitfld.long 0x10 22. " IDMAC_BNDM_EN_22 ,IDMAC Band Mode Enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " IDMAC_BNDM_EN_21 ,IDMAC Band Mode Enable bit 21" "Disabled,Enabled" bitfld.long 0x10 20. " IDMAC_BNDM_EN_20 ,IDMAC Band Mode Enable bit 20" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_BNDM_EN_12 ,IDMAC Band Mode Enable bit 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_BNDM_EN_11 ,IDMAC Band Mode Enable bit 11" "Disabled,Enabled" bitfld.long 0x10 5. " IDMAC_BNDM_EN_5 ,IDMAC Band Mode Enable bit 5" "Disabled,Enabled" bitfld.long 0x10 3. " IDMAC_BNDM_EN_3 ,IDMAC Band Mode Enable bit 3" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " IDMAC_BNDM_EN_2 ,IDMAC Band Mode Enable bit 2" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_BNDM_EN_1 ,IDMAC Band Mode Enable bit 1" "Disabled,Enabled" bitfld.long 0x10 0. " IDMAC_BNDM_EN_0 ,IDMAC Band Mode Enable bit 0" "Disabled,Enabled" line.long 0x14 "IDMAC_BNDM_EN_2,IDMAC Band Mode Enable 2 Register" bitfld.long 0x14 18. " IDMAC_BNDM_EN_50 ,IDMAC Band Mode Enable bit 50" "Disabled,Enabled" bitfld.long 0x14 17. " IDMAC_BNDM_EN_49 ,IDMAC Band Mode Enable bit 49" "Disabled,Enabled" bitfld.long 0x14 16. " IDMAC_BNDM_EN_48 ,IDMAC Band Mode Enable bit 48" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " IDMAC_BNDM_EN_47 ,IDMAC Band Mode Enable bit 47" "Disabled,Enabled" bitfld.long 0x14 14. " IDMAC_BNDM_EN_46 ,IDMAC Band Mode Enable bit 46" "Disabled,Enabled" bitfld.long 0x14 13. " IDMAC_BNDM_EN_45 ,IDMAC Band Mode Enable bit 45" "Disabled,Enabled" line.long 0x18 "IDMAC_SC_CORD0,IDMAC Scroll Coordinations Register" hexmask.long.word 0x18 16.--27. 1. " SX0 ,Scroll X coordination" hexmask.long.word 0x18 0.--10. 1. " SY0 ,Scroll Y coordination" line.long 0x1c "IDMAC_SC_CORD1,IDMAC Scroll Coordinations Register" hexmask.long.word 0x1c 16.--27. 1. " SX1 ,Scroll X coordination" hexmask.long.word 0x1c 0.--10. 1. " SY1 ,Scroll Y coordination" rgroup.long 0x100++0x07 line.long 0x00 "IDMAC_CH_BUSY_1,IDMAC Channel Busy 1 Register" bitfld.long 0x00 31. " IDMAC_CH_BUSY_31 ,IDMAC Channel busy bit 31" "Not busy,Busy" bitfld.long 0x00 29. " IDMAC_CH_BUSY_29 ,IDMAC Channel busy bit 29" "Not busy,Busy" bitfld.long 0x00 28. " IDMAC_CH_BUSY_28 ,IDMAC Channel busy bit 28" "Not busy,Busy" textline " " bitfld.long 0x00 27. " IDMAC_CH_BUSY_27 ,IDMAC Channel busy bit 27" "Not busy,Busy" bitfld.long 0x00 26. " IDMAC_CH_BUSY_26 ,IDMAC Channel busy bit 26" "Not busy,Busy" bitfld.long 0x00 25. " IDMAC_CH_BUSY_25 ,IDMAC Channel busy bit 25" "Not busy,Busy" textline " " bitfld.long 0x00 24. " IDMAC_CH_BUSY_24 ,IDMAC Channel busy bit 24" "Not busy,Busy" bitfld.long 0x00 23. " IDMAC_CH_BUSY_23 ,IDMAC Channel busy bit 23" "Not busy,Busy" bitfld.long 0x00 22. " IDMAC_CH_BUSY_22 ,IDMAC Channel busy bit 22" "Not busy,Busy" textline " " bitfld.long 0x00 21. " IDMAC_CH_BUSY_21 ,IDMAC Channel busy bit 21" "Not busy,Busy" bitfld.long 0x00 20. " IDMAC_CH_BUSY_20 ,IDMAC Channel busy bit 20" "Not busy,Busy" bitfld.long 0x00 18. " IDMAC_CH_BUSY_18 ,IDMAC Channel busy bit 18" "Not busy,Busy" textline " " bitfld.long 0x00 17. " IDMAC_CH_BUSY_17 ,IDMAC Channel busy bit 17" "Not busy,Busy" bitfld.long 0x00 15. " IDMAC_CH_BUSY_15 ,IDMAC Channel busy bit 15" "Not busy,Busy" bitfld.long 0x00 14. " IDMAC_CH_BUSY_14 ,IDMAC Channel busy bit 14" "Not busy,Busy" textline " " bitfld.long 0x00 13. " IDMAC_CH_BUSY_13 ,IDMAC Channel busy bit 13" "Not busy,Busy" bitfld.long 0x00 12. " IDMAC_CH_BUSY_12 ,IDMAC Channel busy bit 12" "Not busy,Busy" bitfld.long 0x00 11. " IDMAC_CH_BUSY_11 ,IDMAC Channel busy bit 11" "Not busy,Busy" textline " " bitfld.long 0x00 10. " IDMAC_CH_BUSY_10 ,IDMAC Channel busy bit 10" "Not busy,Busy" bitfld.long 0x00 9. " IDMAC_CH_BUSY_9 ,IDMAC Channel busy bit 9" "Not busy,Busy" bitfld.long 0x00 8. " IDMAC_CH_BUSY_8 ,IDMAC Channel busy bit 8" "Not busy,Busy" textline " " bitfld.long 0x00 5. " IDMAC_CH_BUSY_5 ,IDMAC Channel busy bit 5" "Not busy,Busy" bitfld.long 0x00 3. " IDMAC_CH_BUSY_3 ,IDMAC Channel busy bit 3" "Not busy,Busy" bitfld.long 0x00 2. " IDMAC_CH_BUSY_2 ,IDMAC Channel busy bit 2" "Not busy,Busy" textline " " bitfld.long 0x00 1. " IDMAC_CH_BUSY_1 ,IDMAC Channel busy bit 1" "Not busy,Busy" bitfld.long 0x00 0. " IDMAC_CH_BUSY_0 ,IDMAC Channel busy bit 0" "Not busy,Busy" line.long 0x04 "IDMAC_CH_BUSY_2,IDMAC Channel Busy 2 Register" bitfld.long 0x04 20. " IDMAC_CH_BUSY_52 ,IDMAC Channel busy bit 52" "Not busy,Busy" bitfld.long 0x04 19. " IDMAC_CH_BUSY_51 ,IDMAC Channel busy bit 51" "Not busy,Busy" bitfld.long 0x04 18. " IDMAC_CH_BUSY_50 ,IDMAC Channel busy bit 50" "Not busy,Busy" textline " " bitfld.long 0x04 17. " IDMAC_CH_BUSY_49 ,IDMAC Channel busy bit 49" "Not busy,Busy" bitfld.long 0x04 16. " IDMAC_CH_BUSY_48 ,IDMAC Channel busy bit 48" "Not busy,Busy" bitfld.long 0x04 15. " IDMAC_CH_BUSY_47 ,IDMAC Channel busy bit 47" "Not busy,Busy" textline " " bitfld.long 0x04 14. " IDMAC_CH_BUSY_46 ,IDMAC Channel busy bit 46" "Not busy,Busy" bitfld.long 0x04 13. " IDMAC_CH_BUSY_45 ,IDMAC Channel busy bit 45" "Not busy,Busy" bitfld.long 0x04 12. " IDMAC_CH_BUSY_44 ,IDMAC Channel busy bit 44" "Not busy,Busy" textline " " bitfld.long 0x04 11. " IDMAC_CH_BUSY_43 ,IDMAC Channel busy bit 43" "Not busy,Busy" bitfld.long 0x04 10. " IDMAC_CH_BUSY_42 ,IDMAC Channel busy bit 42" "Not busy,Busy" bitfld.long 0x04 9. " IDMAC_CH_BUSY_41 ,IDMAC Channel busy bit 41" "Not busy,Busy" textline " " bitfld.long 0x04 8. " IDMAC_CH_BUSY_40 ,IDMAC Channel busy bit 40" "Not busy,Busy" bitfld.long 0x04 1. " IDMAC_CH_BUSY_33 ,IDMAC Channel busy bit 33" "Not busy,Busy" width 0x0B tree.end tree "DP registers" base ad:0x02618000 width 27. group.long 0x00++0x117 line.long 0x00 "DP_COM_CONF_SYNC,DP Common Configuration Sync Flow Register" bitfld.long 0x00 13. " DP_GAMMA_YUV_EN_SYNC ,GAMMA's YUV mode enable for sync flow" "Disabled,Enabled" bitfld.long 0x00 12. " DP_GAMMA_EN_SYNC ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DP_CSC_YUV_SAT_MODE_SYNC ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0x00 10. " DP_CSC_GAMUT_SAT_EN_SYNC ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " DP_CSC_DEF_SYNC ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0x00 4.--6. " DP_COC_SYNC ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0x00 3. " DP_GWCKE_SYNC ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DP_GWAM_SYNC ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0x00 1. " DP_GWSEL_SYNC ,Graphic Window Select" "Full,Partial" bitfld.long 0x00 0. " DP_FG_EN_SYNC ,Partial plane Enable" "Disabled,Enabled" line.long 0x04 "DP_GRAPH_WIND_CTRL_SYNC,Graphic Window Alpha Value" hexmask.long.byte 0x04 24.--31. 1. " DP_GWAV_SYNC ,Graphic Window Alpha Value" hexmask.long.byte 0x04 16.--23. 1. " DP_GWCKR_SYNC ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0x04 8.--15. 1. " DP_GWCKG_SYNC ,Graphic Window Color Keying Green Component" hexmask.long.byte 0x04 0.--7. 1. " DP_GWCKB_SYNC ,Graphic Window Color Keying Blue Component" line.long 0x08 "DP_FG_POS_SYNC,DP partial plane Window Position Sync Flow Register" hexmask.long.word 0x08 16.--26. 1. " DP_FGXP_SYNC ,FGXP partial plane Window X Position" hexmask.long.word 0x08 0.--10. 1. " DP_FGYP_SYNC ,FGYP partial plane Window Y Position" line.long 0x0c "DP_CUR_POS_SYNC,DP Cursor Position and Size Sync Flow Register" hexmask.long.byte 0x0c 27.--31. 1. " DP_CYP_SYNC ,Cursor Y Position" hexmask.long.word 0x0c 16.--26. 1. " DP_CYH_SYNC ,Cursor Height" textline " " hexmask.long.byte 0x0c 11.--15. 1. " DP_CXP_SYNC ,Cursor X Position" hexmask.long.word 0x0c 0.--10. 1. " DP_CXW_SYNC ,Cursor Width" line.long 0x10 "DP_CUR_MAP_SYNC,DP Color Cursor Mapping Sync Flow Register" hexmask.long.byte 0x10 16.--23. 1. " DP_CUR_COL_B_SYNC ,Blue component of the cursor color in color mode" hexmask.long.byte 0x10 8.--15. 1. " DP_CUR_COL_G_SYNC ,Green component of the cursor color in color mode" textline " " hexmask.long.byte 0x10 0.--7. 1. " DP_CUR_COL_R_SYNC ,Red component of the cursor color in color mode" line.long 0x14 "DP_GAMMA_C_SYNC_0,DP Gamma Constants Sync Flow Register 0" hexmask.long.word 0x14 16.--24. 1. " DP_GAMMA_C_SYNC_1 ,CONSTANT 1 parameter of Gamma Correction" hexmask.long.word 0x14 0.--8. 1. " DP_GAMMA_C_SYNC_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0x18 "DP_GAMMA_C_SYNC_1,DP Gamma Constants Sync Flow Register 1" hexmask.long.word 0x18 16.--24. 1. " DP_GAMMA_C_SYNC_3 ,CONSTANT 3 parameter of Gamma Correction" hexmask.long.word 0x18 0.--8. 1. " DP_GAMMA_C_SYNC_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0x1C "DP_GAMMA_C_SYNC_2,DP Gamma Constants Sync Flow Register 2" hexmask.long.word 0x1C 16.--24. 1. " DP_GAMMA_C_SYNC_5 ,CONSTANT 5 parameter of Gamma Correction" hexmask.long.word 0x1C 0.--8. 1. " DP_GAMMA_C_SYNC_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0x20 "DP_GAMMA_C_SYNC_3,DP Gamma Constants Sync Flow Register 3" hexmask.long.word 0x20 16.--24. 1. " DP_GAMMA_C_SYNC_7 ,CONSTANT 7 parameter of Gamma Correction" hexmask.long.word 0x20 0.--8. 1. " DP_GAMMA_C_SYNC_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0x24 "DP_GAMMA_C_SYNC_4,DP Gamma Constants Sync Flow Register 4" hexmask.long.word 0x24 16.--24. 1. " DP_GAMMA_C_SYNC_9 ,CONSTANT 9 parameter of Gamma Correction" hexmask.long.word 0x24 0.--8. 1. " DP_GAMMA_C_SYNC_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0x28 "DP_GAMMA_C_SYNC_5,DP Gamma Constants Sync Flow Register 5" hexmask.long.word 0x28 16.--24. 1. " DP_GAMMA_C_SYNC_11 ,CONSTANT 11 parameter of Gamma Correction" hexmask.long.word 0x28 0.--8. 1. " DP_GAMMA_C_SYNC_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0x2C "DP_GAMMA_C_SYNC_6,DP Gamma Constants Sync Flow Register 6" hexmask.long.word 0x2C 16.--24. 1. " DP_GAMMA_C_SYNC_13 ,CONSTANT 13 parameter of Gamma Correction" hexmask.long.word 0x2C 0.--8. 1. " DP_GAMMA_C_SYNC_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0x30 "DP_GAMMA_C_SYNC_7,DP Gamma Constants Sync Flow Register 7" hexmask.long.word 0x30 16.--24. 1. " DP_GAMMA_C_SYNC_15 ,CONSTANT 15 parameter of Gamma Correction" hexmask.long.word 0x30 0.--8. 1. " DP_GAMMA_C_SYNC_14 ,CONSTANT 14 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x34 "DP_GAMMA_C_SYNC_0,DP Gamma Constants Sync Flow Register 0" else line.long 0x34 "DP_GAMMA_S_SYNC_0,DP Gamma Correction Slope Sync Flow Register 0" endif hexmask.long.byte 0x34 24.--31. 1. " DP_GAMMA_S_SYNC_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0x34 16.--23. 1. " DP_GAMMA_S_SYNC_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0x34 8.--15. 1. " DP_GAMMA_S_SYNC_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0x34 0.--7. 1. " DP_GAMMA_S_SYNC_0 ,SLOPE 0 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x38 "DP_GAMMA_C_SYNC_1,DP Gamma Constants Sync Flow Register 1" else line.long 0x38 "DP_GAMMA_S_SYNC_1,DP Gamma Correction Slope Sync Flow Register 1" endif hexmask.long.byte 0x38 24.--31. 1. " DP_GAMMA_S_SYNC_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0x38 16.--23. 1. " DP_GAMMA_S_SYNC_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0x38 8.--15. 1. " DP_GAMMA_S_SYNC_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0x38 0.--7. 1. " DP_GAMMA_S_SYNC_4 ,SLOPE 4 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x3C "DP_GAMMA_C_SYNC_2,DP Gamma Constants Sync Flow Register 2" else line.long 0x3C "DP_GAMMA_S_SYNC_2,DP Gamma Correction Slope Sync Flow Register 2" endif hexmask.long.byte 0x3C 24.--31. 1. " DP_GAMMA_S_SYNC_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0x3C 16.--23. 1. " DP_GAMMA_S_SYNC_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0x3C 8.--15. 1. " DP_GAMMA_S_SYNC_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0x3C 0.--7. 1. " DP_GAMMA_S_SYNC_8 ,SLOPE 8 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x40 "DP_GAMMA_C_SYNC_3,DP Gamma Constants Sync Flow Register 3" else line.long 0x40 "DP_GAMMA_S_SYNC_3,DP Gamma Correction Slope Sync Flow Register 3" endif hexmask.long.byte 0x40 24.--31. 1. " DP_GAMMA_S_SYNC_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0x40 16.--23. 1. " DP_GAMMA_S_SYNC_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0x40 8.--15. 1. " DP_GAMMA_S_SYNC_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0x40 0.--7. 1. " DP_GAMMA_S_SYNC_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0x44 "DP_CSCA_SYNC_0,DP Color Space Conversion Control Sync Flow register 0" hexmask.long.word 0x44 16.--25. 1. " DP_CSC_A_SYNC_1 ,A 1 parameter of color conversion" hexmask.long.word 0x44 0.--9. 1. " DP_CSC_A_SYNC_0 ,A 0 parameter of color conversion" line.long 0x48 "DP_CSCA_SYNC_1,DP Color Space Conversion Control Sync Flow register 1" hexmask.long.word 0x48 16.--25. 1. " DP_CSC_A_SYNC_3 ,A 3 parameter of color conversion" hexmask.long.word 0x48 0.--9. 1. " DP_CSC_A_SYNC_2 ,A 2 parameter of color conversion" line.long 0x4C "DP_CSCA_SYNC_2,DP Color Space Conversion Control Sync Flow register 2" hexmask.long.word 0x4C 16.--25. 1. " DP_CSC_A_SYNC_5 ,A 5 parameter of color conversion" hexmask.long.word 0x4C 0.--9. 1. " DP_CSC_A_SYNC_4 ,A 4 parameter of color conversion" line.long 0x50 "DP_CSCA_SYNC_3,DP Color Space Conversion Control Sync Flow register 3" hexmask.long.word 0x50 16.--25. 1. " DP_CSC_A_SYNC_7 ,A 7 parameter of color conversion" hexmask.long.word 0x50 0.--9. 1. " DP_CSC_A_SYNC_6 ,A 6 parameter of color conversion" line.long 0x54 "DP_CSC_SYNC_0,DP Color Conversion Control Sync Flow register 0" bitfld.long 0x54 30.--31. " DP_CSC_S0_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x54 16.--29. 1. " DP_CSC_B0_SYNC ,B0 parameter of color conversion" textline " " hexmask.long.word 0x54 0.--9. 1. " DP_CSC_A8_SYNC ,A parameter of color conversion" line.long 0x58 "DP_CSC_SYNC_1,DP Color Conversion Control Sync Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x58 30.--31. " DP_CSC_S2_SYNC ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 16.--29. 1. " DP_CSC_B2_SYNC ,B2 parameter of color conversion" textline " " bitfld.long 0x58 14.--15. " DP_CSC_S1_SYNC ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 0.--13. 1. " DP_CSC_B1_SYNC ,B1 parameter of color conversion" else bitfld.long 0x58 30.--31. " DP_CSC_S2_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 16.--29. 1. " DP_CSC_B2_SYNC ,B0 parameter of color conversion" textline " " bitfld.long 0x58 14.--15. " DP_CSC_S1_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 0.--13. 1. " DP_CSC_B1_SYNC ,B0 parameter of color conversion" endif line.long 0x5c "DP_CUR_POS_ALT,DP Cursor Position and Size Alternate Register" hexmask.long.byte 0x5c 27.--31. 1. " DP_CYP_SYNC_ALT ,Cursor Y Position" hexmask.long.word 0x5c 16.--26. 1. " DP_CYH_SYNC_ALT ,Cursor Height" textline " " hexmask.long.byte 0x5c 11.--15. 1. " DP_CXP_SYNC_ALT ,Cursor X Position" hexmask.long.word 0x5c 0.--10. 1. " DP_CXW_SYNC_ALT ,Cursor Width" line.long 0x60 "DP_COM_CONF_ASYNC0,DP Common Configuration async0 Flow Register" bitfld.long 0x60 13. " DP_GAMMA_YUV_EN_ASYNC0 ,GAMMA's YUV mode enable for async flow 0" "Disabled,Enabled" bitfld.long 0x60 12. " DP_GAMMA_EN_ASYNC0 ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " DP_CSC_YUV_SAT_MODE_ASYNC0 ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0x60 10. " DP_CSC_GAMUT_SAT_EN_ASYNC0 ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0x60 8.--9. " DP_CSC_DEF_ASYNC0 ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0x60 4.--6. " DP_COC_ASYNC0 ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0x60 3. " DP_GWCKE_ASYNC0 ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0x60 2. " DP_GWAM_ASYNC0 ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0x60 1. " DP_GWSEL_ASYNC0 ,Graphic Window Select" "Full,Partial" line.long 0x64 "DP_GRAPH_WIND_CTRL_ASYNC0,DP Graphic Window Control async0 Flow Register" hexmask.long.byte 0x64 24.--31. 1. " DP_GWAV_ASYNC0 ,Graphic Window Alpha Value" hexmask.long.byte 0x64 16.--23. 1. " DP_GWCKR_ASYNC0 ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0x64 8.--15. 1. " DP_GWCKG_ASYNC0 ,Graphic Window Color Keying Green Component" hexmask.long.byte 0x64 0.--7. 1. " DP_GWCKB_ASYNC0 ,Graphic Window Color Keying Blue Component" line.long 0x68 "DP_FG_POS_ASYNC0,DP partial plane Window Position async0 Flow Register" hexmask.long.word 0x68 16.--26. 1. " DP_FGXP_ASYNC0 ,FGXP partial plane Window X Position" hexmask.long.word 0x68 0.--10. 1. " DP_FGYP_ASYNC0 ,FGYP partial plane Window Y Position" line.long 0x6c "DP_CUR_POS_ASYNC0,DP Cursor Position and Size async0 Flow Register" hexmask.long.byte 0x6c 27.--31. 1. " DP_CYP_ASYNC0 ,Cursor Y Position" hexmask.long.word 0x6c 16.--26. 1. " DP_CYH_ASYNC0 ,Cursor Height" textline " " hexmask.long.byte 0x6c 11.--15. 1. " DP_CXP_ASYNC0 ,Cursor X Position" hexmask.long.word 0x6c 0.--10. 1. " DP_CXW_ASYNC0 ,Cursor Width" line.long 0x70 "DP_CUR_MAP_ASYNC0,DP Color Cursor Mapping async0 Flow Register" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.byte 0x70 16.--23. 1. " CUR_COL_R_ASYNC0 ,Red component of the cursor color in color mode" else hexmask.long.byte 0x70 16.--23. 1. " CUR_COL_B_ASYNC0 ,Blue component of the cursor color in color mode" endif hexmask.long.byte 0x70 8.--15. 1. " CUR_COL_G_ASYNC0 ,Green component of the cursor color in color mode" textline " " sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.byte 0x70 0.--7. 1. " CUR_COL_B_ASYNC0 ,Blue component of the cursor color in color mode" else hexmask.long.byte 0x70 0.--7. 1. " CUR_COL_R_ASYNC0 ,Red component of the cursor color in color mode" endif line.long 0x74 "DP_GAMMA_C_ASYNC0_0,DP Gamma Constants ASYNC0 Flow Register 0" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x74 16.--24. 1. " DP_GAMMA_C_ASYNC0_1 ,CONSTANT 1 parameter of Gamma Correction" else hexmask.long.word 0x74 16.--27. 1. " DP_GAMMA_C_ASYNC0_1 ,CONSTANT 1 parameter of Gamma Correction" endif hexmask.long.word 0x74 0.--8. 1. " DP_GAMMA_C_ASYNC0_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0x78 "DP_GAMMA_C_ASYNC0_1,DP Gamma Constants ASYNC0 Flow Register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x78 16.--24. 1. " DP_GAMMA_C_ASYNC0_3 ,CONSTANT 3 parameter of Gamma Correction" else hexmask.long.word 0x78 16.--27. 1. " DP_GAMMA_C_ASYNC0_3 ,CONSTANT 3 parameter of Gamma Correction" endif hexmask.long.word 0x78 0.--8. 1. " DP_GAMMA_C_ASYNC0_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0x7C "DP_GAMMA_C_ASYNC0_2,DP Gamma Constants ASYNC0 Flow Register 2" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x7C 16.--24. 1. " DP_GAMMA_C_ASYNC0_5 ,CONSTANT 5 parameter of Gamma Correction" else hexmask.long.word 0x7C 16.--27. 1. " DP_GAMMA_C_ASYNC0_5 ,CONSTANT 5 parameter of Gamma Correction" endif hexmask.long.word 0x7C 0.--8. 1. " DP_GAMMA_C_ASYNC0_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0x80 "DP_GAMMA_C_ASYNC0_3,DP Gamma Constants ASYNC0 Flow Register 3" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x80 16.--24. 1. " DP_GAMMA_C_ASYNC0_7 ,CONSTANT 7 parameter of Gamma Correction" else hexmask.long.word 0x80 16.--27. 1. " DP_GAMMA_C_ASYNC0_7 ,CONSTANT 7 parameter of Gamma Correction" endif hexmask.long.word 0x80 0.--8. 1. " DP_GAMMA_C_ASYNC0_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0x84 "DP_GAMMA_C_ASYNC0_4,DP Gamma Constants ASYNC0 Flow Register 4" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x84 16.--24. 1. " DP_GAMMA_C_ASYNC0_9 ,CONSTANT 9 parameter of Gamma Correction" else hexmask.long.word 0x84 16.--27. 1. " DP_GAMMA_C_ASYNC0_9 ,CONSTANT 9 parameter of Gamma Correction" endif hexmask.long.word 0x84 0.--8. 1. " DP_GAMMA_C_ASYNC0_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0x88 "DP_GAMMA_C_ASYNC0_5,DP Gamma Constants ASYNC0 Flow Register 5" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x88 16.--24. 1. " DP_GAMMA_C_ASYNC0_11 ,CONSTANT 11 parameter of Gamma Correction" else hexmask.long.word 0x88 16.--27. 1. " DP_GAMMA_C_ASYNC0_11 ,CONSTANT 11 parameter of Gamma Correction" endif hexmask.long.word 0x88 0.--8. 1. " DP_GAMMA_C_ASYNC0_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0x8C "DP_GAMMA_C_ASYNC0_6,DP Gamma Constants ASYNC0 Flow Register 6" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x8C 16.--24. 1. " DP_GAMMA_C_ASYNC0_13 ,CONSTANT 13 parameter of Gamma Correction" else hexmask.long.word 0x8C 16.--27. 1. " DP_GAMMA_C_ASYNC0_13 ,CONSTANT 13 parameter of Gamma Correction" endif hexmask.long.word 0x8C 0.--8. 1. " DP_GAMMA_C_ASYNC0_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0x90 "DP_GAMMA_C_ASYNC0_7,DP Gamma Constants ASYNC0 Flow Register 7" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x90 16.--24. 1. " DP_GAMMA_C_ASYNC0_15 ,CONSTANT 15 parameter of Gamma Correction" else hexmask.long.word 0x90 16.--27. 1. " DP_GAMMA_C_ASYNC0_15 ,CONSTANT 15 parameter of Gamma Correction" endif hexmask.long.word 0x90 0.--8. 1. " DP_GAMMA_C_ASYNC0_14 ,CONSTANT 14 parameter of Gamma Correction" line.long 0x94 "DP_GAMMA_S_ASYNC0_0,DP Gamma Correction Slope async0 Flow Register 0" hexmask.long.byte 0x94 24.--31. 1. " DP_GAMMA_S_ASYNC0_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0x94 16.--23. 1. " DP_GAMMA_S_ASYNC0_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0x94 8.--15. 1. " DP_GAMMA_S_ASYNC0_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0x94 0.--7. 1. " DP_GAMMA_S_ASYNC0_0 ,SLOPE 0 parameter of Gamma Correction" line.long 0x98 "DP_GAMMA_S_ASYNC0_1,DP Gamma Correction Slope async0 Flow Register 1" hexmask.long.byte 0x98 24.--31. 1. " DP_GAMMA_S_ASYNC0_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0x98 16.--23. 1. " DP_GAMMA_S_ASYNC0_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0x98 8.--15. 1. " DP_GAMMA_S_ASYNC0_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0x98 0.--7. 1. " DP_GAMMA_S_ASYNC0_4 ,SLOPE 4 parameter of Gamma Correction" line.long 0x9C "DP_GAMMA_S_ASYNC0_2,DP Gamma Correction Slope async0 Flow Register 2" hexmask.long.byte 0x9C 24.--31. 1. " DP_GAMMA_S_ASYNC0_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0x9C 16.--23. 1. " DP_GAMMA_S_ASYNC0_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0x9C 8.--15. 1. " DP_GAMMA_S_ASYNC0_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0x9C 0.--7. 1. " DP_GAMMA_S_ASYNC0_8 ,SLOPE 8 parameter of Gamma Correction" line.long 0xA0 "DP_GAMMA_S_ASYNC0_3,DP Gamma Correction Slope async0 Flow Register 3" hexmask.long.byte 0xA0 24.--31. 1. " DP_GAMMA_S_ASYNC0_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0xA0 16.--23. 1. " DP_GAMMA_S_ASYNC0_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0xA0 8.--15. 1. " DP_GAMMA_S_ASYNC0_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0xA0 0.--7. 1. " DP_GAMMA_S_ASYNC0_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0xA4 "DP_CSCA_ASYNC0_0,DP Color Space Conversion Control ASYNC0 Flow register 0" hexmask.long.word 0xA4 16.--25. 1. " DP_CSC_A_ASYNC0_1 ,A 1 parameter of color conversion" hexmask.long.word 0xA4 0.--9. 1. " DP_CSC_A_ASYNC0_0 ,A 0 parameter of color conversion" line.long 0xA8 "DP_CSCA_ASYNC0_1,DP Color Space Conversion Control ASYNC0 Flow register 1" hexmask.long.word 0xA8 16.--25. 1. " DP_CSC_A_ASYNC0_3 ,A 3 parameter of color conversion" hexmask.long.word 0xA8 0.--9. 1. " DP_CSC_A_ASYNC0_2 ,A 2 parameter of color conversion" line.long 0xAC "DP_CSCA_ASYNC0_2,DP Color Space Conversion Control ASYNC0 Flow register 2" hexmask.long.word 0xAC 16.--25. 1. " DP_CSC_A_ASYNC0_5 ,A 5 parameter of color conversion" hexmask.long.word 0xAC 0.--9. 1. " DP_CSC_A_ASYNC0_4 ,A 4 parameter of color conversion" line.long 0xB0 "DP_CSCA_ASYNC0_3,DP Color Space Conversion Control ASYNC0 Flow register 3" hexmask.long.word 0xB0 16.--25. 1. " DP_CSC_A_ASYNC0_7 ,A 7 parameter of color conversion" hexmask.long.word 0xB0 0.--9. 1. " DP_CSC_A_ASYNC0_6 ,A 6 parameter of color conversion" line.long 0xb4 "DP_CSC_ASYNC0_0,DP Color Conversion Control ASYNC0 Flow register 0" bitfld.long 0xb4 30.--31. " DP_CSC_S0_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb4 16.--29. 1. " DP_CSC_B0_ASYNC0 ,B0 parameter of color conversion" textline " " hexmask.long.word 0xb4 0.--9. 1. " DP_CSC_A8_ASYNC0 ,A parameter of color conversion" line.long 0xb8 "DP_CSC_ASYNC0_1,DP Color Conversion Control ASYNC0 Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0xb8 30.--31. " DP_CSC_S2_ASYNC0 ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 16.--29. 1. " DP_CSC_B2_ASYNC0 ,B2 parameter of color conversion" textline " " bitfld.long 0xb8 14.--15. " DP_CSC_S1_ASYNC0 ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 0.--13. 1. " DP_CSC_B1_ASYNC0 ,B1 parameter of color conversion" else bitfld.long 0xb8 30.--31. " DP_CSC_S2_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 16.--29. 1. " DP_CSC_B2_ASYNC0 ,B0 parameter of color conversion" textline " " bitfld.long 0xb8 14.--15. " DP_CSC_S1_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 0.--13. 1. " DP_CSC_B1_ASYNC0 ,B0 parameter of color conversion" endif line.long 0xbc "DP_COM_CONF_ASYNC1,DP Common Configuration ASYNC1 Flow Register" bitfld.long 0xbc 13. " DP_GAMMA_YUV_EN_ASYNC1 ,GAMMA's YUV mode enable for async flow 1" "Disabled,Enabled" bitfld.long 0xbc 12. " DP_GAMMA_EN_ASYNC1 ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0xbc 11. " DP_CSC_YUV_SAT_MODE_ASYNC1 ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0xbc 10. " DP_CSC_GAMUT_SAT_EN_ASYNC1 ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0xbc 8.--9. " DP_CSC_DEF_ASYNC1 ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0xbc 4.--6. " DP_COC_ASYNC1 ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0xbc 3. " DP_GWCKE_ASYNC1 ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0xbc 2. " DP_GWAM_ASYNC1 ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0xbc 1. " DP_GWSEL_ASYNC1 ,Graphic Window Select" "Full,Partial" line.long 0xc0 "DP_GRAPH_WIND_CTRL_ASYNC1,DP Graphic Window Control ASYNC1 Flow Register" hexmask.long.byte 0xc0 24.--31. 1. " DP_GWAV_ASYNC1 ,Graphic Window Alpha Value" hexmask.long.byte 0xc0 16.--23. 1. " DP_GWCKR_ASYNC1 ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0xc0 8.--15. 1. " DP_GWCKG_ASYNC1 ,Graphic Window Color Keying Green Component" hexmask.long.byte 0xc0 0.--7. 1. " DP_GWCKB_ASYNC1 ,Graphic Window Color Keying Blue Component" line.long 0xc4 "DP_FG_POS_ASYNC1,DP partial plane Window Position ASYNC1 Flow Register" hexmask.long.word 0xc4 16.--26. 1. " DP_FGXP_ASYNC1 ,FGXP partial plane Window X Position" hexmask.long.word 0xc4 0.--10. 1. " DP_FGYP_ASYNC1 ,FGYP partial plane Window Y Position" line.long 0xc8 "DP_CUR_POS_ASYNC1,DP Cursor Position and Size ASYNC1 Flow Register" hexmask.long.byte 0xc8 27.--31. 1. " DP_CYP_ASYNC1 ,Cursor Y Position" hexmask.long.word 0xc8 16.--26. 1. " DP_CYH_ASYNC1 ,Cursor Height" textline " " hexmask.long.byte 0xc8 11.--15. 1. " DP_CXP_ASYNC1 ,Cursor X Position" hexmask.long.word 0xc8 0.--10. 1. " DP_CXW_ASYNC1 ,Cursor Width" line.long 0xcc "DP_CUR_MAP_ASYNC1,DP Color Cursor Mapping ASYNC1 Flow Register" hexmask.long.byte 0xcc 16.--23. 1. " DP_CUR_COL_B_ASYNC1 ,Blue component of the cursor color in color mode" hexmask.long.byte 0xcc 8.--15. 1. " CUR_COL_G_ASYNC1 ,Green component of the cursor color in color mode" textline " " hexmask.long.byte 0xcc 0.--7. 1. " CUR_COL_R_ASYNC1 ,Red component of the cursor color in color mode" line.long 0xD0 "DP_GAMMA_C_ASYNC1_0,DP Gamma Constants ASYNC1 Flow Register 0" hexmask.long.word 0xD0 16.--24. 1. " DP_GAMMA_C_ASYNC1_1 ,CONSTANT 1 parameter of Gamma Correction" hexmask.long.word 0xD0 0.--8. 1. " DP_GAMMA_C_ASYNC1_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0xD4 "DP_GAMMA_C_ASYNC1_1,DP Gamma Constants ASYNC1 Flow Register 1" hexmask.long.word 0xD4 16.--24. 1. " DP_GAMMA_C_ASYNC1_3 ,CONSTANT 3 parameter of Gamma Correction" hexmask.long.word 0xD4 0.--8. 1. " DP_GAMMA_C_ASYNC1_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0xD8 "DP_GAMMA_C_ASYNC1_2,DP Gamma Constants ASYNC1 Flow Register 2" hexmask.long.word 0xD8 16.--24. 1. " DP_GAMMA_C_ASYNC1_5 ,CONSTANT 5 parameter of Gamma Correction" hexmask.long.word 0xD8 0.--8. 1. " DP_GAMMA_C_ASYNC1_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0xDC "DP_GAMMA_C_ASYNC1_3,DP Gamma Constants ASYNC1 Flow Register 3" hexmask.long.word 0xDC 16.--24. 1. " DP_GAMMA_C_ASYNC1_7 ,CONSTANT 7 parameter of Gamma Correction" hexmask.long.word 0xDC 0.--8. 1. " DP_GAMMA_C_ASYNC1_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0xE0 "DP_GAMMA_C_ASYNC1_4,DP Gamma Constants ASYNC1 Flow Register 4" hexmask.long.word 0xE0 16.--24. 1. " DP_GAMMA_C_ASYNC1_9 ,CONSTANT 9 parameter of Gamma Correction" hexmask.long.word 0xE0 0.--8. 1. " DP_GAMMA_C_ASYNC1_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0xE4 "DP_GAMMA_C_ASYNC1_5,DP Gamma Constants ASYNC1 Flow Register 5" hexmask.long.word 0xE4 16.--24. 1. " DP_GAMMA_C_ASYNC1_11 ,CONSTANT 11 parameter of Gamma Correction" hexmask.long.word 0xE4 0.--8. 1. " DP_GAMMA_C_ASYNC1_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0xE8 "DP_GAMMA_C_ASYNC1_6,DP Gamma Constants ASYNC1 Flow Register 6" hexmask.long.word 0xE8 16.--24. 1. " DP_GAMMA_C_ASYNC1_13 ,CONSTANT 13 parameter of Gamma Correction" hexmask.long.word 0xE8 0.--8. 1. " DP_GAMMA_C_ASYNC1_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0xEC "DP_GAMMA_C_ASYNC1_7,DP Gamma Constants ASYNC1 Flow Register 7" hexmask.long.word 0xEC 16.--24. 1. " DP_GAMMA_C_ASYNC1_15 ,CONSTANT 15 parameter of Gamma Correction" hexmask.long.word 0xEC 0.--8. 1. " DP_GAMMA_C_ASYNC1_14 ,CONSTANT 14 parameter of Gamma Correction" line.long 0xF0 "DP_GAMMA_S_ASYNC1_0,DP Gamma Correction Slope async1 Flow Register0" hexmask.long.byte 0xF0 24.--31. 1. " DP_GAMMA_S_ASYNC1_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0xF0 16.--23. 1. " DP_GAMMA_S_ASYNC1_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF0 8.--15. 1. " DP_GAMMA_S_ASYNC1_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0xF0 0.--7. 1. " DP_GAMMA_S_ASYNC1_0 ,SLOPE 0 parameter of Gamma Correction" line.long 0xF4 "DP_GAMMA_S_ASYNC1_1,DP Gamma Correction Slope async1 Flow Register1" hexmask.long.byte 0xF4 24.--31. 1. " DP_GAMMA_S_ASYNC1_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0xF4 16.--23. 1. " DP_GAMMA_S_ASYNC1_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF4 8.--15. 1. " DP_GAMMA_S_ASYNC1_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0xF4 0.--7. 1. " DP_GAMMA_S_ASYNC1_4 ,SLOPE 4 parameter of Gamma Correction" line.long 0xF8 "DP_GAMMA_S_ASYNC1_2,DP Gamma Correction Slope async1 Flow Register2" hexmask.long.byte 0xF8 24.--31. 1. " DP_GAMMA_S_ASYNC1_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0xF8 16.--23. 1. " DP_GAMMA_S_ASYNC1_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF8 8.--15. 1. " DP_GAMMA_S_ASYNC1_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0xF8 0.--7. 1. " DP_GAMMA_S_ASYNC1_8 ,SLOPE 8 parameter of Gamma Correction" line.long 0xFC "DP_GAMMA_S_ASYNC1_3,DP Gamma Correction Slope async1 Flow Register3" hexmask.long.byte 0xFC 24.--31. 1. " DP_GAMMA_S_ASYNC1_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0xFC 16.--23. 1. " DP_GAMMA_S_ASYNC1_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0xFC 8.--15. 1. " DP_GAMMA_S_ASYNC1_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0xFC 0.--7. 1. " DP_GAMMA_S_ASYNC1_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0x100 "DP_CSCA_ASYNC1_0,DP Color Space Conversion Control ASYNC1 Flow register 0" hexmask.long.word 0x100 16.--25. 1. " DP_CSC_A_ASYNC1_1 ,A 1 parameter of color conversion" hexmask.long.word 0x100 0.--9. 1. " DP_CSC_A_ASYNC1_0 ,A 0 parameter of color conversion" line.long 0x104 "DP_CSCA_ASYNC1_1,DP Color Space Conversion Control ASYNC1 Flow register 1" hexmask.long.word 0x104 16.--25. 1. " DP_CSC_A_ASYNC1_3 ,A 3 parameter of color conversion" hexmask.long.word 0x104 0.--9. 1. " DP_CSC_A_ASYNC1_2 ,A 2 parameter of color conversion" line.long 0x108 "DP_CSCA_ASYNC1_2,DP Color Space Conversion Control ASYNC1 Flow register 2" hexmask.long.word 0x108 16.--25. 1. " DP_CSC_A_ASYNC1_5 ,A 5 parameter of color conversion" hexmask.long.word 0x108 0.--9. 1. " DP_CSC_A_ASYNC1_4 ,A 4 parameter of color conversion" line.long 0x10C "DP_CSCA_ASYNC1_3,DP Color Space Conversion Control ASYNC1 Flow register 3" hexmask.long.word 0x10C 16.--25. 1. " DP_CSC_A_ASYNC1_7 ,A 7 parameter of color conversion" hexmask.long.word 0x10C 0.--9. 1. " DP_CSC_A_ASYNC1_6 ,A 6 parameter of color conversion" line.long 0x110 "DP_CSC_ASYNC1_0,DP Color Conversion Control ASYNC1 Flow register 0" bitfld.long 0x110 30.--31. " DP_CSC_S0_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x110 16.--29. 1. " DP_CSC_B0_ASYNC1 ,B0 parameter of color conversion" textline " " hexmask.long.word 0x110 0.--9. 1. " DP_CSC_A8_ASYNC1 ,A parameter of color conversion" line.long 0x114 "DP_CSC_ASYNC1_1,DP Color Conversion Control ASYNC1 Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x114 30.--31. " DP_CSC_S2_ASYNC1 ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 16.--29. 1. " DP_CSC_B2_ASYNC1 ,B2 parameter of color conversion" textline " " bitfld.long 0x114 14.--15. " DP_CSC_S1_ASYNC1 ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 0.--13. 1. " DP_CSC_B1_ASYNC1 ,B1 parameter of color conversion" else bitfld.long 0x114 30.--31. " DP_CSC_S2_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 16.--29. 1. " DP_CSC_B2_ASYNC1 ,B0 parameter of color conversion" textline " " bitfld.long 0x114 14.--15. " DP_CSC_S1_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 0.--13. 1. " DP_CSC_B1_ASYNC1 ,B0 parameter of color conversion" endif base ad:0x026180BC group.long 0x00++0x03 line.long 0x00 "DP_DEBUG_CNT,DP Debug Control register" bitfld.long 0x00 5.--7. " BRAKE_CNT_1 ,Counts the breaking events for unit #1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. " BRAKE_STATUS_EN_1 ,Enables the break/status unit #1" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " BRAKE_CNT_0 ,Counts the breaking events for unit #0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " BRAKE_STATUS_EN_0 ,Enables the break/status unit #0" "Disabled,Enabled" rgroup.long 0x04++0x3 line.long 0x00 "DP_DEBUG_STAT,DP Debug Status register" bitfld.long 0x00 29. " CYP_EN_OLD_1 ,Async flow has been broken in the middle of a cursor" "Not occurred,Occurred" bitfld.long 0x00 28. " COMBYP_EN_OLD_1 ,Async flow has been broken in the middle of combining" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " FG_ACTIVE_1 ,Displaying the partial frame has been started" "Not occurred,Occurred" hexmask.long.word 0x00 16.--26. 1. " V_CNT_OLD_1 ,The exact row where the async flow has been broken" textline " " bitfld.long 0x00 13. " CYP_EN_OLD_0 ,Async flow has been broken in the middle of a cursor" "Not occurred,Occurred" bitfld.long 0x00 12. " COMBYP_EN_OLD_0 ,Async flow has been broken in the middle of combining" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " FG_ACTIVE_0 ,Displaying the partial frame has been started for async flow" "Not occurred,Occurred" hexmask.long.word 0x00 0.--10. 1. " V_CNT_OLD_0 ,The exact row where the async flow has been broken" width 0x0B tree.end tree "IC registers" base ad:0x02620000 width 16. group.long 0x00++0x27 line.long 0x00 "IC_CONF,IC Configuration Register" bitfld.long 0x00 31. " CSI_MEM_WR_EN ,CSI direct memory write enable" "Disabled,Enabled" bitfld.long 0x00 30. " RWS_EN ,Raw sensor enable" "Disabled,Enabled" bitfld.long 0x00 29. " IC_KEY_COLOR_EN ,Key color enable" "Disabled,Enabled" bitfld.long 0x00 28. " IC_GLB_LOC_A ,Global alpha" "Local,Global" textline " " bitfld.long 0x00 20. " PP_ROT_EN ,Postprocessing rotation task enable" "Disabled,Enabled" bitfld.long 0x00 19. " PP_CMB ,Postprocessing task combining enable" "Disabled,Enabled" bitfld.long 0x00 18. " PP_CSC2 ,Postprocessing task color conversion RGB-->YUV enable" "Disabled,Enabled" bitfld.long 0x00 17. " PP_CSC1 ,Postprocessing task color conversion YUV-->RGB enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PP_EN ,Postprocessing task enable" "Disabled,Enabled" bitfld.long 0x00 12. " PRPVF_ROT_EN ,Preprocessing rotation task for viewfinder enable" "Disabled,Enabled" bitfld.long 0x00 11. " PRPVF_CMB ,Preprocessing task for view-finder combining enable" "Disabled,Enabled" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") textline " " bitfld.long 0x00 10. " PRPVF_CSC2 ,Preprocessing task for view-finder second color conversion enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 9. " PRPVF_CSC1 ,Preprocessing task for view-finder first color conversion enable" "Disabled,Enabled" bitfld.long 0x00 8. " PRPVF_EN ,Preprocessing task for view-finder enable" "Disabled,Enabled" bitfld.long 0x00 2. " PRPENC_ROT_EN ,Preprocessing rotation task for encoding enable" "Disabled,Enabled" bitfld.long 0x00 1. " PRPENC_CSC1 ,Preprocessing task for encoding color conversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PRPENC_EN ,Preprocessing task for encoding enable" "Disabled,Enabled" line.long 0x04 "IC_PRP_ENC_RSC,IC Preprocessing Encoder Resizing Coefficients Register" bitfld.long 0x04 30.--31. " PRPENC_DS_R_V ,Preprocessing task for encoding downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. " PRPENC_RS_R_V ,Preprocessing task for encoding resizing vertical ratio" bitfld.long 0x04 14.--15. " PRPENC_DS_R_H ,Preprocessing task for encoding downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x04 0.--13. 1. " PRPENC_RS_R_H ,Preprocessing task for encoding resizing horizontal ratio" line.long 0x08 "IC_PRP_VF_RSC,IC Preprocessing View-Finder Resizing Coefficients Register" bitfld.long 0x08 30.--31. " PRPVF_DS_R_V ,Preprocessing task for encoding downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x08 16.--29. 1. " PRPVF_RS_R_V ,Preprocessing task for encoding resizing vertical ratio" bitfld.long 0x08 14.--15. " PRPVF_DS_R_H ,Preprocessing task for encoding downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x08 0.--13. 1. " PRPVF_RS_R_H ,Preprocessing task for view-finding resizing horizontal ratio" line.long 0x0c "IC_PP_RSC,IC Postprocessing Resizing Coefficients Register" bitfld.long 0x0c 30.--31. " PP_DS_R_V ,Postprocessing task downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x0c 16.--29. 1. " PP_RS_R_V ,Postprocessing task resizing vertical ratio" bitfld.long 0x0c 14.--15. " PP_DS_R_H ,Postprocessing task downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x0c 0.--13. 1. " PP_RS_R_H ,Postprocessing task resizing horizontal ratio" line.long 0x10 "IC_CMBP_1,IC Combining Parameters Register 1" hexmask.long.byte 0x10 8.--15. 1. " IC_PP_ALPHA_V ,Postprocessing task global alpha" hexmask.long.byte 0x10 0.--7. 1. " IC_PRPVF_ALPHA_V ,Preprocessing task for encoding global alpha" line.long 0x14 "IC_CMBP_2,IC Combining Parameters Register 2" hexmask.long.byte 0x14 16.--23. 1. " IC_KEY_COLOR_R ,Key color red" hexmask.long.byte 0x14 8.--15. 1. " IC_KEY_COLOR_G ,Key color green" hexmask.long.byte 0x14 0.--7. 1. " IC_KEY_COLOR_B ,Key color blue" line.long 0x18 "IC_IDMAC_1,IC IDMAC Parameters 1 Register" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x18 25. " ALT_CB7_BURST_16 ,Number of pixels within a burst coming from the IDMAC for IC's CB7" "8,16" bitfld.long 0x18 24. " ALT_CB6_BURST_16 ,Number of active cycles within a burst coming coming from the IDMAC for IC's CB6" "8,16" textline " " endif bitfld.long 0x18 22. " T3_FLIP_RS ,LEFT/RIGHT flip for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 21. " T2_FLIP_RS ,LEFT/RIGHT flip for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 20. " T1_FLIP_RS ,LEFT/RIGHT flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 19. " T3_FLIP_UD ,UP/DOWN flip for Post Processing (PP) task" "Disabled,Enabled" textline " " bitfld.long 0x18 18. " T3_FLIP_LR ,LEFT/RIGHT flip for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 17. " T3_ROT ,Rotation for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 16. " T2_FLIP_UD ,UP/DOWN flip for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 15. " T2_FLIP_LR ,LEFT/RIGHT flip for View Finder (VF) task" "Disabled,Enabled" textline " " bitfld.long 0x18 14. " T2_ROT ,Rotation for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 13. " T1_FLIP_UD ,UP/DOWN flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 12. " T1_FLIP_LR ,LEFT/RIGHT flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 11. " T1_ROT ,Rotation for Encoding (ENC) task" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " CB7_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB7" "8,16" bitfld.long 0x18 6. " CB6_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB6" "8,16" bitfld.long 0x18 5. " CB5_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB5" "8,16" bitfld.long 0x18 4. " CB4_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB4" "8,16" textline " " bitfld.long 0x18 3. " CB3_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB3" "8,16" bitfld.long 0x18 2. " CB2_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB2" "8,16" bitfld.long 0x18 1. " CB1_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB1" "8,16" bitfld.long 0x18 0. " CB0_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB0" "8,16" line.long 0x1c "IC_IDMAC_2,IC IDMAC Parameters 2 Register" hexmask.long.word 0x1C 20.--29. 1. " T3_FR_HEIGHT ,Frame Height for Post Processing (PP) task" hexmask.long.word 0x1C 10.--19. 1. " T2_FR_HEIGHT ,Frame Height for View Finder (VF) task" hexmask.long.word 0x1C 0.--9. 1. " T1_FR_HEIGHT ,Frame Height for Encoding (ENC) task" line.long 0x20 "IC_IDMAC_3,IC IDMAC Parameters 3 Register" hexmask.long.word 0x20 20.--29. 1. " T3_FR_WIDTH ,Frame Width for Post Processing (PP) task" hexmask.long.word 0x20 10.--19. 1. " T2_FR_WIDTH ,Frame Width for View Finder (VF) task" hexmask.long.word 0x20 0.--9. 1. " T1_FR_WIDTH ,Frame Width for Encoding (ENC) task" line.long 0x24 "IC_IDMAC_4,IC IDMAC Parameters 4 Register" bitfld.long 0x24 12.--15. " RM_BRDG_MAX_RQ ,RM memory Bridge Max Requests" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 8.--11. " IBM_BRDG_MAX_RQ ,IBM memory Bridge Max Requests" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 4.--7. " MPM_DMFC_BRDG_MAX_RQ ,MPM memory Bridge Max Requests for the IC DMFC interface" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. " MPM_RW_BRDG_MAX_RQ ,MPM memory Bridge Max Requests between MPM's read and writes" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "CSI0 registers" base ad:0x02630000 width 20. group.long 0x00++0x1b line.long 0x00 "CSI0_SENS_CONF,CSI0 Sensor Configuration Register" bitfld.long 0x00 31. " CSI0_DATA_EN_POL ,Invert IPP_IND_SENSB_DATA_EN input" "Not inverted,Inverted" bitfld.long 0x00 29. " CSI0_FORCE_EOF ,Force End of frame" "No effect,Forced" bitfld.long 0x00 28. " CSI0_JPEG_MODE ,JPEG Mode" "Not valid,Valid" textline " " bitfld.long 0x00 27. " CSI0_JPEG8_EN ,JPEG8 enable bit" "Disabled,Enabled" bitfld.long 0x00 24.--26. " CSI0_DATA_DEST ,Destination of the data coming from the CSI" ",IC,IDMAC via SMFC,?..." hexmask.long.byte 0x00 16.--23. 1. " CSI0_DIV_RATIO ,Clock division ratio minus 1" textline " " bitfld.long 0x00 15. " CSI0_EXT_VSYNC ,External VSYNC enable" "Internal,External" bitfld.long 0x00 11.--14. " CSI0_DATA_WIDTH ,Number of bits per color" "4,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--10. " CSI0_SENS_DATA_FORMAT ,Data format from the sensor" "Full RGB or YUV444,YUV422 (YUYV...),YUV422 (UYVY...),Bayer or Generic,RGB565,RGB555,RGB444,JPEG" textline " " bitfld.long 0x00 7. " CSI0_PACK_TIGHT ,CSI0 Pack Tight" "Not tight,Tight" bitfld.long 0x00 4.--6. " CSI0_SENS_PRTCL ,Sensor protocol" "Gated clock mode,Non-gated clock mode,CCIR progressive mode (BT.656),CCIR interlaced mode (BT.656),CCIR progressive (BT.1120 DDR),CCIR progressive (BT.1120 SDR),CCIR interlaced mode (BT.1120 DDR),CCIR interlaced mode (BT.1120 SDR)" bitfld.long 0x00 3. " CSI0_SENS_PIX_CLK_POL ,Invert pixel clock input" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " CSI0_DATA_POL ,Invert data input" "Not inverted,Inverted" bitfld.long 0x00 1. " CSI0_HSYNC_POL ,Invert IPP_IND_SENSB_HSYNC input" "Not inverted,Inverted" bitfld.long 0x00 0. " CSI0_VSYNC_POL ,Invert IPP_IND_SENSB_VSYNC input" "Not inverted,Inverted" line.long 0x04 "CSI0_SENS_FRM_SIZE,CSI0 Sense Frame Size Register" hexmask.long.word 0x04 16.--27. 1. " CSI0_SENS_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x04 0.--12. 1. " CSI0_SENS_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x08 "CSI0_ACT_FRM_SIZE,CSI0 Actual Frame Size Register" hexmask.long.word 0x08 16.--27. 1. " CSI0_ACT_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x08 0.--12. 1. " CSI0_ACT_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x0c "CSI0_OUT_FRM_CTRL,CSI0 Output Control Register" bitfld.long 0x0c 31. " CSI0_HORZ_DWNS ,Enable horizontal downsizing" "Disabled,Enabled" bitfld.long 0x0c 30. " CSI0_VERT_DWNS ,Enable vertical downsizing" "Disabled,Enabled" hexmask.long.word 0x0c 16.--28. 1. " CSI0_HSC ,Number of columns to skip" textline " " hexmask.long.word 0x0c 0.--11. 1. " CSI0_VSC ,Number of rows to skip" line.long 0x10 "CSI0_TST_CTRL,CSI0 Test Control Register" bitfld.long 0x10 24. " CSI0_TEST_GEN_MODE ,Test generator mode" "Inactive,Active" hexmask.long.byte 0x10 16.--23. 1. " CSI0_PG_B_VALUE ,Pattern generator B value" hexmask.long.byte 0x10 8.--15. 1. " CSI0_PG_G_VALUE ,Pattern generator G value" textline " " hexmask.long.byte 0x10 0.--7. 1. " CSI0_PG_R_VALUE ,Pattern generator R value" line.long 0x14 "CSI0_CCIR_CODE_1,CSI0 Output Control Register 1" bitfld.long 0x14 24. " CSI0_CCIR_ERR_DET_EN ,Enable error detection and correction for CCIR interlaced mode with protection bit" "Disabled,Enabled" bitfld.long 0x14 19.--21. " CSI0_STRT_FLD0_ACTV ,Start of field 0 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " CSI0_END_FLD0_ACTV ,End of field 0 active line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 9.--11. " CSI0_STRT_FLD0_BLNK_2ND ,Start of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " CSI0_END_FLD0_BLNK_2ND ,End of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 3.--5. " CSI0_STRT_FLD0_BLNK_1ST ,Start of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 0.--2. " CSI0_END_FLD0_BLNK_1ST ,End of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" line.long 0x18 "CSI0_CCIR_CODE_2,CSI0 CCIR Code Register 2" bitfld.long 0x18 19.--21. " CSI0_STRT_FLD1_ACTV ,Start of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " CSI0_END_FLD1_ACTV ,End of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9.--11. " CSI0_STRT_FLD1_BLNK_2ND ,Start of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 6.--8. " CSI0_END_FLD1_BLNK_2ND ,End of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 3.--5. " CSI0_STRT_FLD1_BLNK_1ST ,Start of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CSI0_END_FLD1_BLNK_1ST ,End of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " if (((per.l(ad:0x02630000))&0x70)==0x20)||(((per.l(ad:0x02630000))&0x70)==0x30) group.long 0x1c++0x3 line.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " CSI0_CCIR_PRECOM ,CCIR pre command (3X8bit)" elif (((per.l(ad:0x02630000))&0x70)==0x40)||(((per.l(ad:0x02630000))&0x70)==0x50)||(((per.l(ad:0x02630000))&0x70)==0x60)||(((per.l(ad:0x02630000))&0x70)==0x70) group.long 0x1c++0x3 line.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" hexmask.long 0x00 0.--29. 1. " CSI0_CCIR_PRECOM ,CCIR pre command (3X10bit)" else hgroup.long 0x1c++0x3 hide.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" endif sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") group.long 0x20++0xd3 line.long 0x00 "CSI0_DI,CSI0 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI0_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI0_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI0_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI0_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" line.long 0x04 "CSI0_SKIP,CSI0 SKIP Register" bitfld.long 0x04 19.--23. " CSI0_SKIP_ISP ,Skipping pattern of the frames send to the ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--18. " CSI0_MAX_RATIO_SKIP_ISP ,CSI0 Maximum Ratio Skip for ISP" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3.--7. " CSI0_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--2. " CSI0_MAX_RATIO_SKIP_SMFC ,CSI0 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" line.long 0x08 "CSI0_CPD_CTRL,CSI0 Compander Control Register" bitfld.long 0x08 2.--4. " CSI0_CPD ,Enable the compander in the path to different destination" "ISP,IC,IDMAC via SMFC,?..." bitfld.long 0x08 1. " CSI0_RED_ROW_BEGIN ,Color of first row in the frame" "GBGB,GRGR" bitfld.long 0x08 0. " CSI0_GREEN_P_BEGIN ,Color of first component in the frame" "Blue or red,Green" line.long 0xC "CSI0_CPD_RC_0,CSI0 Red component Compander Constants Register 0" hexmask.long.word 0xC 16.--25. 1. " CSI0_CPD_RC_1 ,CONSTANT 1 Parameter of Compander (Red component)" hexmask.long.word 0xC 0.--9. 1. " CSI0_CPD_RC_0 ,CONSTANT 0 Parameter of Compander (Red component)" line.long 0x10 "CSI0_CPD_RC_1,CSI0 Red component Compander Constants Register 1" hexmask.long.word 0x10 16.--25. 1. " CSI0_CPD_RC_3 ,CONSTANT 3 Parameter of Compander (Red component)" hexmask.long.word 0x10 0.--9. 1. " CSI0_CPD_RC_2 ,CONSTANT 2 Parameter of Compander (Red component)" line.long 0x14 "CSI0_CPD_RC_2,CSI0 Red component Compander Constants Register 2" hexmask.long.word 0x14 16.--25. 1. " CSI0_CPD_RC_5 ,CONSTANT 5 Parameter of Compander (Red component)" hexmask.long.word 0x14 0.--9. 1. " CSI0_CPD_RC_4 ,CONSTANT 4 Parameter of Compander (Red component)" line.long 0x18 "CSI0_CPD_RC_3,CSI0 Red component Compander Constants Register 3" hexmask.long.word 0x18 16.--25. 1. " CSI0_CPD_RC_7 ,CONSTANT 7 Parameter of Compander (Red component)" hexmask.long.word 0x18 0.--9. 1. " CSI0_CPD_RC_6 ,CONSTANT 6 Parameter of Compander (Red component)" line.long 0x1C "CSI0_CPD_RC_4,CSI0 Red component Compander Constants Register 4" hexmask.long.word 0x1C 16.--25. 1. " CSI0_CPD_RC_9 ,CONSTANT 9 Parameter of Compander (Red component)" hexmask.long.word 0x1C 0.--9. 1. " CSI0_CPD_RC_8 ,CONSTANT 8 Parameter of Compander (Red component)" line.long 0x20 "CSI0_CPD_RC_5,CSI0 Red component Compander Constants Register 5" hexmask.long.word 0x20 16.--25. 1. " CSI0_CPD_RC_11 ,CONSTANT 11 Parameter of Compander (Red component)" hexmask.long.word 0x20 0.--9. 1. " CSI0_CPD_RC_10 ,CONSTANT 10 Parameter of Compander (Red component)" line.long 0x24 "CSI0_CPD_RC_6,CSI0 Red component Compander Constants Register 6" hexmask.long.word 0x24 16.--25. 1. " CSI0_CPD_RC_13 ,CONSTANT 13 Parameter of Compander (Red component)" hexmask.long.word 0x24 0.--9. 1. " CSI0_CPD_RC_12 ,CONSTANT 12 Parameter of Compander (Red component)" line.long 0x28 "CSI0_CPD_RC_7,CSI0 Red component Compander Constants Register 7" hexmask.long.word 0x28 16.--25. 1. " CSI0_CPD_RC_15 ,CONSTANT 15 Parameter of Compander (Red component)" hexmask.long.word 0x28 0.--9. 1. " CSI0_CPD_RC_14 ,CONSTANT 14 Parameter of Compander (Red component)" line.long 0x2C "CSI0_CPD_RS_0,CSI0 Red component Compander SLOPE Register 0" hexmask.long.byte 0x2C 24.--31. 1. " CSI0_CPD_RS_3 ,SLOPE 3 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 16.--23. 1. " CSI0_CPD_RS_2 ,SLOPE 2 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 8.--15. 1. " CSI0_CPD_RS_1 ,SLOPE 1 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 0.--7. 1. " CSI0_CPD_RS_0 ,SLOPE 0 Parameter of Compander (Red component)" line.long 0x30 "CSI0_CPD_RS_1,CSI0 Red component Compander SLOPE Register 1" hexmask.long.byte 0x30 24.--31. 1. " CSI0_CPD_RS_7 ,SLOPE 7 Parameter of Compander (Red component)" hexmask.long.byte 0x30 16.--23. 1. " CSI0_CPD_RS_6 ,SLOPE 6 Parameter of Compander (Red component)" hexmask.long.byte 0x30 8.--15. 1. " CSI0_CPD_RS_5 ,SLOPE 5 Parameter of Compander (Red component)" hexmask.long.byte 0x30 0.--7. 1. " CSI0_CPD_RS_4 ,SLOPE 4 Parameter of Compander (Red component)" line.long 0x34 "CSI0_CPD_RS_2,CSI0 Red component Compander SLOPE Register 2" hexmask.long.byte 0x34 24.--31. 1. " CSI0_CPD_RS_11 ,SLOPE 11 Parameter of Compander (Red component)" hexmask.long.byte 0x34 16.--23. 1. " CSI0_CPD_RS_10 ,SLOPE 10 Parameter of Compander (Red component)" hexmask.long.byte 0x34 8.--15. 1. " CSI0_CPD_RS_9 ,SLOPE 9 Parameter of Compander (Red component)" hexmask.long.byte 0x34 0.--7. 1. " CSI0_CPD_RS_8 ,SLOPE 8 Parameter of Compander (Red component)" line.long 0x38 "CSI0_CPD_RS_3,CSI0 Red component Compander SLOPE Register 3" hexmask.long.byte 0x38 24.--31. 1. " CSI0_CPD_RS_15 ,SLOPE 15 Parameter of Compander (Red component)" hexmask.long.byte 0x38 16.--23. 1. " CSI0_CPD_RS_14 ,SLOPE 14 Parameter of Compander (Red component)" hexmask.long.byte 0x38 8.--15. 1. " CSI0_CPD_RS_13 ,SLOPE 13 Parameter of Compander (Red component)" hexmask.long.byte 0x38 0.--7. 1. " CSI0_CPD_RS_12 ,SLOPE 12 Parameter of Compander (Red component)" line.long 0x3C "CSI0_CPD_GRC_0,CSI0 GR component Compander Constants Register 0" hexmask.long.word 0x3C 16.--24. 1. " CSI0_CPD_GRC_1 ,CONSTANT 1 Parameter of Compander (GR component)" hexmask.long.word 0x3C 0.--8. 1. " CSI0_CPD_GRC_0 ,CONSTANT 0 Parameter of Compander (GR component)" line.long 0x40 "CSI0_CPD_GRC_1,CSI0 GR component Compander Constants Register 1" hexmask.long.word 0x40 16.--24. 1. " CSI0_CPD_GRC_3 ,CONSTANT 3 Parameter of Compander (GR component)" hexmask.long.word 0x40 0.--8. 1. " CSI0_CPD_GRC_2 ,CONSTANT 2 Parameter of Compander (GR component)" line.long 0x44 "CSI0_CPD_GRC_2,CSI0 GR component Compander Constants Register 2" hexmask.long.word 0x44 16.--24. 1. " CSI0_CPD_GRC_5 ,CONSTANT 5 Parameter of Compander (GR component)" hexmask.long.word 0x44 0.--8. 1. " CSI0_CPD_GRC_4 ,CONSTANT 4 Parameter of Compander (GR component)" line.long 0x48 "CSI0_CPD_GRC_3,CSI0 GR component Compander Constants Register 3" hexmask.long.word 0x48 16.--24. 1. " CSI0_CPD_GRC_7 ,CONSTANT 7 Parameter of Compander (GR component)" hexmask.long.word 0x48 0.--8. 1. " CSI0_CPD_GRC_6 ,CONSTANT 6 Parameter of Compander (GR component)" line.long 0x4C "CSI0_CPD_GRC_4,CSI0 GR component Compander Constants Register 4" hexmask.long.word 0x4C 16.--24. 1. " CSI0_CPD_GRC_9 ,CONSTANT 9 Parameter of Compander (GR component)" hexmask.long.word 0x4C 0.--8. 1. " CSI0_CPD_GRC_8 ,CONSTANT 8 Parameter of Compander (GR component)" line.long 0x50 "CSI0_CPD_GRC_5,CSI0 GR component Compander Constants Register 5" hexmask.long.word 0x50 16.--24. 1. " CSI0_CPD_GRC_11 ,CONSTANT 11 Parameter of Compander (GR component)" hexmask.long.word 0x50 0.--8. 1. " CSI0_CPD_GRC_10 ,CONSTANT 10 Parameter of Compander (GR component)" line.long 0x54 "CSI0_CPD_GRC_6,CSI0 GR component Compander Constants Register 6" hexmask.long.word 0x54 16.--24. 1. " CSI0_CPD_GRC_13 ,CONSTANT 13 Parameter of Compander (GR component)" hexmask.long.word 0x54 0.--8. 1. " CSI0_CPD_GRC_12 ,CONSTANT 12 Parameter of Compander (GR component)" line.long 0x58 "CSI0_CPD_GRC_7,CSI0 GR component Compander Constants Register 7" hexmask.long.word 0x58 16.--24. 1. " CSI0_CPD_GRC_15 ,CONSTANT 15 Parameter of Compander (GR component)" hexmask.long.word 0x58 0.--8. 1. " CSI0_CPD_GRC_14 ,CONSTANT 14 Parameter of Compander (GR component)" line.long 0x5C "CSI0_CPD_GRS_0,CSI0 GR component Compander SLOPE Register 0" hexmask.long.byte 0x5C 24.--31. 1. " CSI0_CPD_GRS_3 ,SLOPE 3 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 16.--23. 1. " CSI0_CPD_GRS_2 ,SLOPE 2 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 8.--15. 1. " CSI0_CPD_GRS_1 ,SLOPE 1 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 0.--7. 1. " CSI0_CPD_GRS_0 ,SLOPE 0 Parameter of Compander (GR component)" line.long 0x60 "CSI0_CPD_GRS_1,CSI0 GR component Compander SLOPE Register 1" hexmask.long.byte 0x60 24.--31. 1. " CSI0_CPD_GRS_7 ,SLOPE 7 Parameter of Compander (GR component)" hexmask.long.byte 0x60 16.--23. 1. " CSI0_CPD_GRS_6 ,SLOPE 6 Parameter of Compander (GR component)" hexmask.long.byte 0x60 8.--15. 1. " CSI0_CPD_GRS_5 ,SLOPE 5 Parameter of Compander (GR component)" hexmask.long.byte 0x60 0.--7. 1. " CSI0_CPD_GRS_4 ,SLOPE 4 Parameter of Compander (GR component)" line.long 0x64 "CSI0_CPD_GRS_2,CSI0 GR component Compander SLOPE Register 2" hexmask.long.byte 0x64 24.--31. 1. " CSI0_CPD_GRS_11 ,SLOPE 11 Parameter of Compander (GR component)" hexmask.long.byte 0x64 16.--23. 1. " CSI0_CPD_GRS_10 ,SLOPE 10 Parameter of Compander (GR component)" hexmask.long.byte 0x64 8.--15. 1. " CSI0_CPD_GRS_9 ,SLOPE 9 Parameter of Compander (GR component)" hexmask.long.byte 0x64 0.--7. 1. " CSI0_CPD_GRS_8 ,SLOPE 8 Parameter of Compander (GR component)" line.long 0x68 "CSI0_CPD_GRS_3,CSI0 GR component Compander SLOPE Register 3" hexmask.long.byte 0x68 24.--31. 1. " CSI0_CPD_GRS_15 ,SLOPE 15 Parameter of Compander (GR component)" hexmask.long.byte 0x68 16.--23. 1. " CSI0_CPD_GRS_14 ,SLOPE 14 Parameter of Compander (GR component)" hexmask.long.byte 0x68 8.--15. 1. " CSI0_CPD_GRS_13 ,SLOPE 13 Parameter of Compander (GR component)" hexmask.long.byte 0x68 0.--7. 1. " CSI0_CPD_GRS_12 ,SLOPE 12 Parameter of Compander (GR component)" line.long 0x6C "CSI0_CPD_GBC_0,CSI0 GB component Compander Constants Register 0" hexmask.long.word 0x6C 16.--24. 1. " CSI0_CPD_GBC_1 ,CONSTANT 1 Parameter of Compander (GB component)" hexmask.long.word 0x6C 0.--8. 1. " CSI0_CPD_GBC_0 ,CONSTANT 0 Parameter of Compander (GB component)" line.long 0x70 "CSI0_CPD_GBC_1,CSI0 GB component Compander Constants Register 1" hexmask.long.word 0x70 16.--24. 1. " CSI0_CPD_GBC_3 ,CONSTANT 3 Parameter of Compander (GB component)" hexmask.long.word 0x70 0.--8. 1. " CSI0_CPD_GBC_2 ,CONSTANT 2 Parameter of Compander (GB component)" line.long 0x74 "CSI0_CPD_GBC_2,CSI0 GB component Compander Constants Register 2" hexmask.long.word 0x74 16.--24. 1. " CSI0_CPD_GBC_5 ,CONSTANT 5 Parameter of Compander (GB component)" hexmask.long.word 0x74 0.--8. 1. " CSI0_CPD_GBC_4 ,CONSTANT 4 Parameter of Compander (GB component)" line.long 0x78 "CSI0_CPD_GBC_3,CSI0 GB component Compander Constants Register 3" hexmask.long.word 0x78 16.--24. 1. " CSI0_CPD_GBC_7 ,CONSTANT 7 Parameter of Compander (GB component)" hexmask.long.word 0x78 0.--8. 1. " CSI0_CPD_GBC_6 ,CONSTANT 6 Parameter of Compander (GB component)" line.long 0x7C "CSI0_CPD_GBC_4,CSI0 GB component Compander Constants Register 4" hexmask.long.word 0x7C 16.--24. 1. " CSI0_CPD_GBC_9 ,CONSTANT 9 Parameter of Compander (GB component)" hexmask.long.word 0x7C 0.--8. 1. " CSI0_CPD_GBC_8 ,CONSTANT 8 Parameter of Compander (GB component)" line.long 0x80 "CSI0_CPD_GBC_5,CSI0 GB component Compander Constants Register 5" hexmask.long.word 0x80 16.--24. 1. " CSI0_CPD_GBC_11 ,CONSTANT 11 Parameter of Compander (GB component)" hexmask.long.word 0x80 0.--8. 1. " CSI0_CPD_GBC_10 ,CONSTANT 10 Parameter of Compander (GB component)" line.long 0x84 "CSI0_CPD_GBC_6,CSI0 GB component Compander Constants Register 6" hexmask.long.word 0x84 16.--24. 1. " CSI0_CPD_GBC_13 ,CONSTANT 13 Parameter of Compander (GB component)" hexmask.long.word 0x84 0.--8. 1. " CSI0_CPD_GBC_12 ,CONSTANT 12 Parameter of Compander (GB component)" line.long 0x88 "CSI0_CPD_GBC_7,CSI0 GB component Compander Constants Register 7" hexmask.long.word 0x88 16.--24. 1. " CSI0_CPD_GBC_15 ,CONSTANT 15 Parameter of Compander (GB component)" hexmask.long.word 0x88 0.--8. 1. " CSI0_CPD_GBC_14 ,CONSTANT 14 Parameter of Compander (GB component)" line.long 0x8C "CSI0_CPD_GBS_0,CSI0 GB component Compander SLOPE Register 0" hexmask.long.byte 0x8C 24.--31. 1. " CSI0_CPD_GBS_3 ,SLOPE 3 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 16.--23. 1. " CSI0_CPD_GBS_2 ,SLOPE 2 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 8.--15. 1. " CSI0_CPD_GBS_1 ,SLOPE 1 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 0.--7. 1. " CSI0_CPD_GBS_0 ,SLOPE 0 Parameter of Compander (GB component)" line.long 0x90 "CSI0_CPD_GBS_1,CSI0 GB component Compander SLOPE Register 1" hexmask.long.byte 0x90 24.--31. 1. " CSI0_CPD_GBS_7 ,SLOPE 7 Parameter of Compander (GB component)" hexmask.long.byte 0x90 16.--23. 1. " CSI0_CPD_GBS_6 ,SLOPE 6 Parameter of Compander (GB component)" hexmask.long.byte 0x90 8.--15. 1. " CSI0_CPD_GBS_5 ,SLOPE 5 Parameter of Compander (GB component)" hexmask.long.byte 0x90 0.--7. 1. " CSI0_CPD_GBS_4 ,SLOPE 4 Parameter of Compander (GB component)" line.long 0x94 "CSI0_CPD_GBS_2,CSI0 GB component Compander SLOPE Register 2" hexmask.long.byte 0x94 24.--31. 1. " CSI0_CPD_GBS_11 ,SLOPE 11 Parameter of Compander (GB component)" hexmask.long.byte 0x94 16.--23. 1. " CSI0_CPD_GBS_10 ,SLOPE 10 Parameter of Compander (GB component)" hexmask.long.byte 0x94 8.--15. 1. " CSI0_CPD_GBS_9 ,SLOPE 9 Parameter of Compander (GB component)" hexmask.long.byte 0x94 0.--7. 1. " CSI0_CPD_GBS_8 ,SLOPE 8 Parameter of Compander (GB component)" line.long 0x98 "CSI0_CPD_GBS_3,CSI0 GB component Compander SLOPE Register 3" hexmask.long.byte 0x98 24.--31. 1. " CSI0_CPD_GBS_15 ,SLOPE 15 Parameter of Compander (GB component)" hexmask.long.byte 0x98 16.--23. 1. " CSI0_CPD_GBS_14 ,SLOPE 14 Parameter of Compander (GB component)" hexmask.long.byte 0x98 8.--15. 1. " CSI0_CPD_GBS_13 ,SLOPE 13 Parameter of Compander (GB component)" hexmask.long.byte 0x98 0.--7. 1. " CSI0_CPD_GBS_12 ,SLOPE 12 Parameter of Compander (GB component)" line.long 0x9C "CSI0_CPD_BC_0,CSI0 Blue component Compander Constants Register 0" hexmask.long.word 0x9C 16.--24. 1. " CSI0_CPD_BC_1 ,CONSTANT 1 Parameter of Compander (Blue component)" hexmask.long.word 0x9C 0.--8. 1. " CSI0_CPD_BC_0 ,CONSTANT 0 Parameter of Compander (Blue component)" line.long 0xA0 "CSI0_CPD_BC_1,CSI0 Blue component Compander Constants Register 1" hexmask.long.word 0xA0 16.--24. 1. " CSI0_CPD_BC_3 ,CONSTANT 3 Parameter of Compander (Blue component)" hexmask.long.word 0xA0 0.--8. 1. " CSI0_CPD_BC_2 ,CONSTANT 2 Parameter of Compander (Blue component)" line.long 0xA4 "CSI0_CPD_BC_2,CSI0 Blue component Compander Constants Register 2" hexmask.long.word 0xA4 16.--24. 1. " CSI0_CPD_BC_5 ,CONSTANT 5 Parameter of Compander (Blue component)" hexmask.long.word 0xA4 0.--8. 1. " CSI0_CPD_BC_4 ,CONSTANT 4 Parameter of Compander (Blue component)" line.long 0xA8 "CSI0_CPD_BC_3,CSI0 Blue component Compander Constants Register 3" hexmask.long.word 0xA8 16.--24. 1. " CSI0_CPD_BC_7 ,CONSTANT 7 Parameter of Compander (Blue component)" hexmask.long.word 0xA8 0.--8. 1. " CSI0_CPD_BC_6 ,CONSTANT 6 Parameter of Compander (Blue component)" line.long 0xAC "CSI0_CPD_BC_4,CSI0 Blue component Compander Constants Register 4" hexmask.long.word 0xAC 16.--24. 1. " CSI0_CPD_BC_9 ,CONSTANT 9 Parameter of Compander (Blue component)" hexmask.long.word 0xAC 0.--8. 1. " CSI0_CPD_BC_8 ,CONSTANT 8 Parameter of Compander (Blue component)" line.long 0xB0 "CSI0_CPD_BC_5,CSI0 Blue component Compander Constants Register 5" hexmask.long.word 0xB0 16.--24. 1. " CSI0_CPD_BC_11 ,CONSTANT 11 Parameter of Compander (Blue component)" hexmask.long.word 0xB0 0.--8. 1. " CSI0_CPD_BC_10 ,CONSTANT 10 Parameter of Compander (Blue component)" line.long 0xB4 "CSI0_CPD_BC_6,CSI0 Blue component Compander Constants Register 6" hexmask.long.word 0xB4 16.--24. 1. " CSI0_CPD_BC_13 ,CONSTANT 13 Parameter of Compander (Blue component)" hexmask.long.word 0xB4 0.--8. 1. " CSI0_CPD_BC_12 ,CONSTANT 12 Parameter of Compander (Blue component)" line.long 0xB8 "CSI0_CPD_BC_7,CSI0 Blue component Compander Constants Register 7" hexmask.long.word 0xB8 16.--24. 1. " CSI0_CPD_BC_15 ,CONSTANT 15 Parameter of Compander (Blue component)" hexmask.long.word 0xB8 0.--8. 1. " CSI0_CPD_BC_14 ,CONSTANT 14 Parameter of Compander (Blue component)" line.long 0xBC "CSI0_CPD_BS_0,CSI0 Blue component Compander SLOPE Register 0" hexmask.long.byte 0xBC 24.--31. 1. " CSI0_CPD_BS_3 ,SLOPE 3 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 16.--23. 1. " CSI0_CPD_BS_2 ,SLOPE 2 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 8.--15. 1. " CSI0_CPD_BS_1 ,SLOPE 1 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 0.--7. 1. " CSI0_CPD_BS_0 ,SLOPE 0 Parameter of Compander (Blue component)" line.long 0xC0 "CSI0_CPD_BS_1,CSI0 Blue component Compander SLOPE Register 1" hexmask.long.byte 0xC0 24.--31. 1. " CSI0_CPD_BS_7 ,SLOPE 7 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 16.--23. 1. " CSI0_CPD_BS_6 ,SLOPE 6 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 8.--15. 1. " CSI0_CPD_BS_5 ,SLOPE 5 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 0.--7. 1. " CSI0_CPD_BS_4 ,SLOPE 4 Parameter of Compander (Blue component)" line.long 0xC4 "CSI0_CPD_BS_2,CSI0 Blue component Compander SLOPE Register 2" hexmask.long.byte 0xC4 24.--31. 1. " CSI0_CPD_BS_11 ,SLOPE 11 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 16.--23. 1. " CSI0_CPD_BS_10 ,SLOPE 10 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 8.--15. 1. " CSI0_CPD_BS_9 ,SLOPE 9 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 0.--7. 1. " CSI0_CPD_BS_8 ,SLOPE 8 Parameter of Compander (Blue component)" line.long 0xC8 "CSI0_CPD_BS_3,CSI0 Blue component Compander SLOPE Register 3" hexmask.long.byte 0xC8 24.--31. 1. " CSI0_CPD_BS_15 ,SLOPE 15 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 16.--23. 1. " CSI0_CPD_BS_14 ,SLOPE 14 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 8.--15. 1. " CSI0_CPD_BS_13 ,SLOPE 13 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 0.--7. 1. " CSI0_CPD_BS_12 ,SLOPE 12 Parameter of Compander (Blue component)" line.long 0xcc "CSI0_CPD_OFFSET1,CSI0 Compander Offset Register 1" hexmask.long.word 0xcc 20.--29. 1. " CSI0_CPD_B_OFFSET ,CSI0 Blue component offset" hexmask.long.word 0xcc 10.--19. 1. " CSI0_GB_OFFSET ,CSI0 Green Blue component offset" hexmask.long.word 0xcc 0.--9. 1. " CSI0_GR_OFFSET ,CSI0 Green Red component offset" line.long 0xd0 "CSI0_CPD_OFFSET2,CSI0 Compander Offset Register 2" hexmask.long.word 0xd0 0.--9. 1. " CSI0_CPD_R_OFFSET ,CSI0 Red component offset" else sif (cpuis("IMX6*")) group.long 0x20++0x03 line.long 0x00 "CSI0_DI,CSI0 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI0_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI0_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI0_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI0_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" endif group.long 0x24++0x03 line.long 0x00 "CSI0_SKIP,CSI0 SKIP Register" sif (cpuis("IMX6*")) bitfld.long 0x00 8.--9. " CSI0_ID_2_SKIP ,Data from the CSI0 to the SMFC has an ID associated with it" "00,01,10,11" textline " " endif bitfld.long 0x00 3.--7. " CSI0_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CSI0_MAX_RATIO_SKIP_SMFC ,CSI0 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" endif width 0x0B tree.end tree "CSI1 registers" base ad:0x02638000 width 20. group.long 0x00++0x1b line.long 0x00 "CSI1_SENS_CONF,CSI1 Sensor Configuration Register" bitfld.long 0x00 31. " CSI1_DATA_EN_POL ,Invert IPP_IND_SENSB_DATA_EN input" "Not inverted,Inverted" bitfld.long 0x00 29. " CSI1_FORCE_EOF ,Force End of frame" "No effect,Forced" bitfld.long 0x00 28. " CSI1_JPEG_MODE ,JPEG Mode" "Not valid,Valid" textline " " bitfld.long 0x00 27. " CSI1_JPEG8_EN ,JPEG8 enable bit" "Disabled,Enabled" bitfld.long 0x00 24.--26. " CSI1_DATA_DEST ,Destination of the data coming from the CSI" ",IC,IDMAC via SMFC,?..." hexmask.long.byte 0x00 16.--23. 1. " CSI1_DIV_RATIO ,Clock division ratio minus 1" textline " " bitfld.long 0x00 15. " CSI1_EXT_VSYNC ,External VSYNC enable" "Internal,External" bitfld.long 0x00 11.--14. " CSI1_DATA_WIDTH ,Number of bits per color" ",8,,10,,,,,,16,?..." bitfld.long 0x00 8.--10. " CSI1_SENS_DATA_FORMAT ,Data format from the sensor" "Full RGB or YUV444,YUV422 (YUYV...),YUV422 (UYVY...),Bayer or Generic,RGB565,RGB555,RGB444,JPEG" textline " " bitfld.long 0x00 7. " CSI1_PACK_TIGHT ,CSI1 Pack Tight" "Not tight,Tight" bitfld.long 0x00 4.--6. " CSI1_SENS_PRTCL ,Sensor protocol" "Gated clock mode,Non-gated clock mode,CCIR progressive mode (BT.656),CCIR interlaced mode (BT.656),CCIR progressive (BT.1120 DDR),CCIR progressive (BT.1120 SDR),CCIR interlaced mode (BT.1120 DDR),CCIR interlaced mode (BT.1120 SDR)" bitfld.long 0x00 3. " CSI1_SENS_PIX_CLK_POL ,Invert pixel clock input" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " CSI1_DATA_POL ,Invert data input" "Not inverted,Inverted" bitfld.long 0x00 1. " CSI1_HSYNC_POL ,Invert IPP_IND_SENSB_HSYNC input" "Not inverted,Inverted" bitfld.long 0x00 0. " CSI1_VSYNC_POL ,Invert IPP_IND_SENSB_VSYNC input" "Not inverted,Inverted" line.long 0x04 "CSI1_SENS_FRM_SIZE,CSI1 Sense Frame Size Register" hexmask.long.word 0x04 16.--27. 1. " CSI1_SENS_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x04 0.--12. 1. " CSI1_SENS_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x08 "CSI1_ACT_FRM_SIZE,CSI1 Actual Frame Size Register" hexmask.long.word 0x08 16.--27. 1. " CSI1_ACT_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x08 0.--12. 1. " CSI1_ACT_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x0c "CSI1_OUT_FRM_CTRL,CSI1 Output Control Register" bitfld.long 0x0c 31. " CSI1_HORZ_DWNS ,Enable horizontal downsizing" "Disabled,Enabled" bitfld.long 0x0c 30. " CSI1_VERT_DWNS ,Enable vertical downsizing" "Disabled,Enabled" hexmask.long.word 0x0c 16.--28. 1. " CSI1_HSC ,Number of columns to skip" textline " " hexmask.long.word 0x0c 0.--11. 1. " CSI1_VSC ,Number of rows to skip" line.long 0x10 "CSI1_TST_CTRL,CSI1 Test Control Register" bitfld.long 0x10 24. " CSI1_TEST_GEN_MODE ,Test generator mode" "Inactive,Active" hexmask.long.byte 0x10 16.--23. 1. " CSI1_PG_B_VALUE ,Pattern generator B value" hexmask.long.byte 0x10 8.--15. 1. " CSI1_PG_G_VALUE ,Pattern generator G value" textline " " hexmask.long.byte 0x10 0.--7. 1. " CSI1_PG_R_VALUE ,Pattern generator R value" line.long 0x14 "CSI1_CCIR_CODE_1,CSI1 Output Control Register 1" bitfld.long 0x14 24. " CSI1_CCIR_ERR_DET_EN ,Enable error detection and correction for CCIR interlaced mode with protection bit" "Disabled,Enabled" bitfld.long 0x14 19.--21. " CSI1_STRT_FLD0_ACTV ,Start of field 0 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " CSI1_END_FLD0_ACTV ,End of field 0 active line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 9.--11. " CSI1_STRT_FLD0_BLNK_2ND ,Start of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " CSI1_END_FLD0_BLNK_2ND ,End of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 3.--5. " CSI1_STRT_FLD0_BLNK_1ST ,Start of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 0.--2. " CSI1_END_FLD0_BLNK_1ST ,End of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" line.long 0x18 "CSI1_CCIR_CODE_2,CSI1 CCIR Code Register 2" bitfld.long 0x18 19.--21. " CSI1_STRT_FLD1_ACTV ,Start of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " CSI1_END_FLD1_ACTV ,End of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9.--11. " CSI1_STRT_FLD1_BLNK_2ND ,Start of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 6.--8. " CSI1_END_FLD1_BLNK_2ND ,End of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 3.--5. " CSI1_STRT_FLD1_BLNK_1ST ,Start of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CSI1_END_FLD1_BLNK_1ST ,End of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " if (((per.l(ad:0x02638000))&0x70)==0x20)||(((per.l(ad:0x02638000))&0x70)==0x30) group.long 0x1c++0x3 line.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " CSI1_CCIR_PRECOM ,CCIR pre command (3X8bit)" elif (((per.l(ad:0x02638000))&0x70)==0x40)||(((per.l(ad:0x02638000))&0x70)==0x50)||(((per.l(ad:0x02638000))&0x70)==0x60)||(((per.l(ad:0x02638000))&0x70)==0x70) group.long 0x1c++0x3 line.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" hexmask.long 0x00 0.--29. 1. " CSI1_CCIR_PRECOM ,CCIR pre command (3X10bit)" else hgroup.long 0x1c++0x3 hide.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" endif sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") group.long 0x20++0xd3 line.long 0x00 "CSI1_DI,CSI1 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI1_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI1_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI1_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI1_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" line.long 0x04 "CSI1_SKIP,CSI1 SKIP Register" bitfld.long 0x04 19.--23. " CSI1_SKIP_ISP ,Skipping pattern of the frames send to the ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--18. " CSI1_MAX_RATIO_SKIP_ISP ,CSI1 Maximum Ratio Skip for ISP" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3.--7. " CSI1_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--2. " CSI1_MAX_RATIO_SKIP_SMFC ,CSI1 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" line.long 0x08 "CSI1_CPD_CTRL,CSI1 Compander Control Register" bitfld.long 0x08 2.--4. " CSI1_CPD ,Enable the compander in the path to different destination" "ISP,IC,IDMAC via SMFC,?..." bitfld.long 0x08 1. " CSI1_RED_ROW_BEGIN ,Color of first row in the frame" "GBGB,GRGR" bitfld.long 0x08 0. " CSI1_GREEN_P_BEGIN ,Color of first component in the frame" "Blue or red,Green" line.long 0xC "CSI1_CPD_RC_0,CSI1 Red component Compander Constants Register 0" hexmask.long.word 0xC 16.--25. 1. " CSI1_CPD_RC_1 ,CONSTANT 1 Parameter of Compander (Red component)" hexmask.long.word 0xC 0.--9. 1. " CSI1_CPD_RC_0 ,CONSTANT 0 Parameter of Compander (Red component)" line.long 0x10 "CSI1_CPD_RC_1,CSI1 Red component Compander Constants Register 1" hexmask.long.word 0x10 16.--25. 1. " CSI1_CPD_RC_3 ,CONSTANT 3 Parameter of Compander (Red component)" hexmask.long.word 0x10 0.--9. 1. " CSI1_CPD_RC_2 ,CONSTANT 2 Parameter of Compander (Red component)" line.long 0x14 "CSI1_CPD_RC_2,CSI1 Red component Compander Constants Register 2" hexmask.long.word 0x14 16.--25. 1. " CSI1_CPD_RC_5 ,CONSTANT 5 Parameter of Compander (Red component)" hexmask.long.word 0x14 0.--9. 1. " CSI1_CPD_RC_4 ,CONSTANT 4 Parameter of Compander (Red component)" line.long 0x18 "CSI1_CPD_RC_3,CSI1 Red component Compander Constants Register 3" hexmask.long.word 0x18 16.--25. 1. " CSI1_CPD_RC_7 ,CONSTANT 7 Parameter of Compander (Red component)" hexmask.long.word 0x18 0.--9. 1. " CSI1_CPD_RC_6 ,CONSTANT 6 Parameter of Compander (Red component)" line.long 0x1C "CSI1_CPD_RC_4,CSI1 Red component Compander Constants Register 4" hexmask.long.word 0x1C 16.--25. 1. " CSI1_CPD_RC_9 ,CONSTANT 9 Parameter of Compander (Red component)" hexmask.long.word 0x1C 0.--9. 1. " CSI1_CPD_RC_8 ,CONSTANT 8 Parameter of Compander (Red component)" line.long 0x20 "CSI1_CPD_RC_5,CSI1 Red component Compander Constants Register 5" hexmask.long.word 0x20 16.--25. 1. " CSI1_CPD_RC_11 ,CONSTANT 11 Parameter of Compander (Red component)" hexmask.long.word 0x20 0.--9. 1. " CSI1_CPD_RC_10 ,CONSTANT 10 Parameter of Compander (Red component)" line.long 0x24 "CSI1_CPD_RC_6,CSI1 Red component Compander Constants Register 6" hexmask.long.word 0x24 16.--25. 1. " CSI1_CPD_RC_13 ,CONSTANT 13 Parameter of Compander (Red component)" hexmask.long.word 0x24 0.--9. 1. " CSI1_CPD_RC_12 ,CONSTANT 12 Parameter of Compander (Red component)" line.long 0x28 "CSI1_CPD_RC_7,CSI1 Red component Compander Constants Register 7" hexmask.long.word 0x28 16.--25. 1. " CSI1_CPD_RC_15 ,CONSTANT 15 Parameter of Compander (Red component)" hexmask.long.word 0x28 0.--9. 1. " CSI1_CPD_RC_14 ,CONSTANT 14 Parameter of Compander (Red component)" line.long 0x2C "CSI1_CPD_RS_0,CSI1 Red component Compander SLOPE Register 0" hexmask.long.byte 0x2C 24.--31. 1. " CSI1_CPD_RS_3 ,SLOPE 3 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 16.--23. 1. " CSI1_CPD_RS_2 ,SLOPE 2 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 8.--15. 1. " CSI1_CPD_RS_1 ,SLOPE 1 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 0.--7. 1. " CSI1_CPD_RS_0 ,SLOPE 0 Parameter of Compander (Red component)" line.long 0x30 "CSI1_CPD_RS_1,CSI1 Red component Compander SLOPE Register 1" hexmask.long.byte 0x30 24.--31. 1. " CSI1_CPD_RS_7 ,SLOPE 7 Parameter of Compander (Red component)" hexmask.long.byte 0x30 16.--23. 1. " CSI1_CPD_RS_6 ,SLOPE 6 Parameter of Compander (Red component)" hexmask.long.byte 0x30 8.--15. 1. " CSI1_CPD_RS_5 ,SLOPE 5 Parameter of Compander (Red component)" hexmask.long.byte 0x30 0.--7. 1. " CSI1_CPD_RS_4 ,SLOPE 4 Parameter of Compander (Red component)" line.long 0x34 "CSI1_CPD_RS_2,CSI1 Red component Compander SLOPE Register 2" hexmask.long.byte 0x34 24.--31. 1. " CSI1_CPD_RS_11 ,SLOPE 11 Parameter of Compander (Red component)" hexmask.long.byte 0x34 16.--23. 1. " CSI1_CPD_RS_10 ,SLOPE 10 Parameter of Compander (Red component)" hexmask.long.byte 0x34 8.--15. 1. " CSI1_CPD_RS_9 ,SLOPE 9 Parameter of Compander (Red component)" hexmask.long.byte 0x34 0.--7. 1. " CSI1_CPD_RS_8 ,SLOPE 8 Parameter of Compander (Red component)" line.long 0x38 "CSI1_CPD_RS_3,CSI1 Red component Compander SLOPE Register 3" hexmask.long.byte 0x38 24.--31. 1. " CSI1_CPD_RS_15 ,SLOPE 15 Parameter of Compander (Red component)" hexmask.long.byte 0x38 16.--23. 1. " CSI1_CPD_RS_14 ,SLOPE 14 Parameter of Compander (Red component)" hexmask.long.byte 0x38 8.--15. 1. " CSI1_CPD_RS_13 ,SLOPE 13 Parameter of Compander (Red component)" hexmask.long.byte 0x38 0.--7. 1. " CSI1_CPD_RS_12 ,SLOPE 12 Parameter of Compander (Red component)" line.long 0x3C "CSI1_CPD_GRC_0,CSI1 GR component Compander Constants Register 0" hexmask.long.word 0x3C 16.--24. 1. " CSI1_CPD_GRC_1 ,CONSTANT 1 Parameter of Compander (GR component)" hexmask.long.word 0x3C 0.--8. 1. " CSI1_CPD_GRC_0 ,CONSTANT 0 Parameter of Compander (GR component)" line.long 0x40 "CSI1_CPD_GRC_1,CSI1 GR component Compander Constants Register 1" hexmask.long.word 0x40 16.--24. 1. " CSI1_CPD_GRC_3 ,CONSTANT 3 Parameter of Compander (GR component)" hexmask.long.word 0x40 0.--8. 1. " CSI1_CPD_GRC_2 ,CONSTANT 2 Parameter of Compander (GR component)" line.long 0x44 "CSI1_CPD_GRC_2,CSI1 GR component Compander Constants Register 2" hexmask.long.word 0x44 16.--24. 1. " CSI1_CPD_GRC_5 ,CONSTANT 5 Parameter of Compander (GR component)" hexmask.long.word 0x44 0.--8. 1. " CSI1_CPD_GRC_4 ,CONSTANT 4 Parameter of Compander (GR component)" line.long 0x48 "CSI1_CPD_GRC_3,CSI1 GR component Compander Constants Register 3" hexmask.long.word 0x48 16.--24. 1. " CSI1_CPD_GRC_7 ,CONSTANT 7 Parameter of Compander (GR component)" hexmask.long.word 0x48 0.--8. 1. " CSI1_CPD_GRC_6 ,CONSTANT 6 Parameter of Compander (GR component)" line.long 0x4C "CSI1_CPD_GRC_4,CSI1 GR component Compander Constants Register 4" hexmask.long.word 0x4C 16.--24. 1. " CSI1_CPD_GRC_9 ,CONSTANT 9 Parameter of Compander (GR component)" hexmask.long.word 0x4C 0.--8. 1. " CSI1_CPD_GRC_8 ,CONSTANT 8 Parameter of Compander (GR component)" line.long 0x50 "CSI1_CPD_GRC_5,CSI1 GR component Compander Constants Register 5" hexmask.long.word 0x50 16.--24. 1. " CSI1_CPD_GRC_11 ,CONSTANT 11 Parameter of Compander (GR component)" hexmask.long.word 0x50 0.--8. 1. " CSI1_CPD_GRC_10 ,CONSTANT 10 Parameter of Compander (GR component)" line.long 0x54 "CSI1_CPD_GRC_6,CSI1 GR component Compander Constants Register 6" hexmask.long.word 0x54 16.--24. 1. " CSI1_CPD_GRC_13 ,CONSTANT 13 Parameter of Compander (GR component)" hexmask.long.word 0x54 0.--8. 1. " CSI1_CPD_GRC_12 ,CONSTANT 12 Parameter of Compander (GR component)" line.long 0x58 "CSI1_CPD_GRC_7,CSI1 GR component Compander Constants Register 7" hexmask.long.word 0x58 16.--24. 1. " CSI1_CPD_GRC_15 ,CONSTANT 15 Parameter of Compander (GR component)" hexmask.long.word 0x58 0.--8. 1. " CSI1_CPD_GRC_14 ,CONSTANT 14 Parameter of Compander (GR component)" line.long 0x5C "CSI1_CPD_GRS_0,CSI1 GR component Compander SLOPE Register 0" hexmask.long.byte 0x5C 24.--31. 1. " CSI1_CPD_GRS_3 ,SLOPE 3 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 16.--23. 1. " CSI1_CPD_GRS_2 ,SLOPE 2 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 8.--15. 1. " CSI1_CPD_GRS_1 ,SLOPE 1 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 0.--7. 1. " CSI1_CPD_GRS_0 ,SLOPE 0 Parameter of Compander (GR component)" line.long 0x60 "CSI1_CPD_GRS_1,CSI1 GR component Compander SLOPE Register 1" hexmask.long.byte 0x60 24.--31. 1. " CSI1_CPD_GRS_7 ,SLOPE 7 Parameter of Compander (GR component)" hexmask.long.byte 0x60 16.--23. 1. " CSI1_CPD_GRS_6 ,SLOPE 6 Parameter of Compander (GR component)" hexmask.long.byte 0x60 8.--15. 1. " CSI1_CPD_GRS_5 ,SLOPE 5 Parameter of Compander (GR component)" hexmask.long.byte 0x60 0.--7. 1. " CSI1_CPD_GRS_4 ,SLOPE 4 Parameter of Compander (GR component)" line.long 0x64 "CSI1_CPD_GRS_2,CSI1 GR component Compander SLOPE Register 2" hexmask.long.byte 0x64 24.--31. 1. " CSI1_CPD_GRS_11 ,SLOPE 11 Parameter of Compander (GR component)" hexmask.long.byte 0x64 16.--23. 1. " CSI1_CPD_GRS_10 ,SLOPE 10 Parameter of Compander (GR component)" hexmask.long.byte 0x64 8.--15. 1. " CSI1_CPD_GRS_9 ,SLOPE 9 Parameter of Compander (GR component)" hexmask.long.byte 0x64 0.--7. 1. " CSI1_CPD_GRS_8 ,SLOPE 8 Parameter of Compander (GR component)" line.long 0x68 "CSI1_CPD_GRS_3,CSI1 GR component Compander SLOPE Register 3" hexmask.long.byte 0x68 24.--31. 1. " CSI1_CPD_GRS_15 ,SLOPE 15 Parameter of Compander (GR component)" hexmask.long.byte 0x68 16.--23. 1. " CSI1_CPD_GRS_14 ,SLOPE 14 Parameter of Compander (GR component)" hexmask.long.byte 0x68 8.--15. 1. " CSI1_CPD_GRS_13 ,SLOPE 13 Parameter of Compander (GR component)" hexmask.long.byte 0x68 0.--7. 1. " CSI1_CPD_GRS_12 ,SLOPE 12 Parameter of Compander (GR component)" line.long 0x6C "CSI1_CPD_GBC_0,CSI1 GB component Compander Constants Register 0" hexmask.long.word 0x6C 16.--24. 1. " CSI1_CPD_GBC_1 ,CONSTANT 1 Parameter of Compander (GB component)" hexmask.long.word 0x6C 0.--8. 1. " CSI1_CPD_GBC_0 ,CONSTANT 0 Parameter of Compander (GB component)" line.long 0x70 "CSI1_CPD_GBC_1,CSI1 GB component Compander Constants Register 1" hexmask.long.word 0x70 16.--24. 1. " CSI1_CPD_GBC_3 ,CONSTANT 3 Parameter of Compander (GB component)" hexmask.long.word 0x70 0.--8. 1. " CSI1_CPD_GBC_2 ,CONSTANT 2 Parameter of Compander (GB component)" line.long 0x74 "CSI1_CPD_GBC_2,CSI1 GB component Compander Constants Register 2" hexmask.long.word 0x74 16.--24. 1. " CSI1_CPD_GBC_5 ,CONSTANT 5 Parameter of Compander (GB component)" hexmask.long.word 0x74 0.--8. 1. " CSI1_CPD_GBC_4 ,CONSTANT 4 Parameter of Compander (GB component)" line.long 0x78 "CSI1_CPD_GBC_3,CSI1 GB component Compander Constants Register 3" hexmask.long.word 0x78 16.--24. 1. " CSI1_CPD_GBC_7 ,CONSTANT 7 Parameter of Compander (GB component)" hexmask.long.word 0x78 0.--8. 1. " CSI1_CPD_GBC_6 ,CONSTANT 6 Parameter of Compander (GB component)" line.long 0x7C "CSI1_CPD_GBC_4,CSI1 GB component Compander Constants Register 4" hexmask.long.word 0x7C 16.--24. 1. " CSI1_CPD_GBC_9 ,CONSTANT 9 Parameter of Compander (GB component)" hexmask.long.word 0x7C 0.--8. 1. " CSI1_CPD_GBC_8 ,CONSTANT 8 Parameter of Compander (GB component)" line.long 0x80 "CSI1_CPD_GBC_5,CSI1 GB component Compander Constants Register 5" hexmask.long.word 0x80 16.--24. 1. " CSI1_CPD_GBC_11 ,CONSTANT 11 Parameter of Compander (GB component)" hexmask.long.word 0x80 0.--8. 1. " CSI1_CPD_GBC_10 ,CONSTANT 10 Parameter of Compander (GB component)" line.long 0x84 "CSI1_CPD_GBC_6,CSI1 GB component Compander Constants Register 6" hexmask.long.word 0x84 16.--24. 1. " CSI1_CPD_GBC_13 ,CONSTANT 13 Parameter of Compander (GB component)" hexmask.long.word 0x84 0.--8. 1. " CSI1_CPD_GBC_12 ,CONSTANT 12 Parameter of Compander (GB component)" line.long 0x88 "CSI1_CPD_GBC_7,CSI1 GB component Compander Constants Register 7" hexmask.long.word 0x88 16.--24. 1. " CSI1_CPD_GBC_15 ,CONSTANT 15 Parameter of Compander (GB component)" hexmask.long.word 0x88 0.--8. 1. " CSI1_CPD_GBC_14 ,CONSTANT 14 Parameter of Compander (GB component)" line.long 0x8C "CSI1_CPD_GBS_0,CSI1 GB component Compander SLOPE Register 0" hexmask.long.byte 0x8C 24.--31. 1. " CSI1_CPD_GBS_3 ,SLOPE 3 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 16.--23. 1. " CSI1_CPD_GBS_2 ,SLOPE 2 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 8.--15. 1. " CSI1_CPD_GBS_1 ,SLOPE 1 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 0.--7. 1. " CSI1_CPD_GBS_0 ,SLOPE 0 Parameter of Compander (GB component)" line.long 0x90 "CSI1_CPD_GBS_1,CSI1 GB component Compander SLOPE Register 1" hexmask.long.byte 0x90 24.--31. 1. " CSI1_CPD_GBS_7 ,SLOPE 7 Parameter of Compander (GB component)" hexmask.long.byte 0x90 16.--23. 1. " CSI1_CPD_GBS_6 ,SLOPE 6 Parameter of Compander (GB component)" hexmask.long.byte 0x90 8.--15. 1. " CSI1_CPD_GBS_5 ,SLOPE 5 Parameter of Compander (GB component)" hexmask.long.byte 0x90 0.--7. 1. " CSI1_CPD_GBS_4 ,SLOPE 4 Parameter of Compander (GB component)" line.long 0x94 "CSI1_CPD_GBS_2,CSI1 GB component Compander SLOPE Register 2" hexmask.long.byte 0x94 24.--31. 1. " CSI1_CPD_GBS_11 ,SLOPE 11 Parameter of Compander (GB component)" hexmask.long.byte 0x94 16.--23. 1. " CSI1_CPD_GBS_10 ,SLOPE 10 Parameter of Compander (GB component)" hexmask.long.byte 0x94 8.--15. 1. " CSI1_CPD_GBS_9 ,SLOPE 9 Parameter of Compander (GB component)" hexmask.long.byte 0x94 0.--7. 1. " CSI1_CPD_GBS_8 ,SLOPE 8 Parameter of Compander (GB component)" line.long 0x98 "CSI1_CPD_GBS_3,CSI1 GB component Compander SLOPE Register 3" hexmask.long.byte 0x98 24.--31. 1. " CSI1_CPD_GBS_15 ,SLOPE 15 Parameter of Compander (GB component)" hexmask.long.byte 0x98 16.--23. 1. " CSI1_CPD_GBS_14 ,SLOPE 14 Parameter of Compander (GB component)" hexmask.long.byte 0x98 8.--15. 1. " CSI1_CPD_GBS_13 ,SLOPE 13 Parameter of Compander (GB component)" hexmask.long.byte 0x98 0.--7. 1. " CSI1_CPD_GBS_12 ,SLOPE 12 Parameter of Compander (GB component)" line.long 0x9C "CSI1_CPD_BC_0,CSI1 Blue component Compander Constants Register 0" hexmask.long.word 0x9C 16.--24. 1. " CSI1_CPD_BC_1 ,CONSTANT 1 Parameter of Compander (Blue component)" hexmask.long.word 0x9C 0.--8. 1. " CSI1_CPD_BC_0 ,CONSTANT 0 Parameter of Compander (Blue component)" line.long 0xA0 "CSI1_CPD_BC_1,CSI1 Blue component Compander Constants Register 1" hexmask.long.word 0xA0 16.--24. 1. " CSI1_CPD_BC_3 ,CONSTANT 3 Parameter of Compander (Blue component)" hexmask.long.word 0xA0 0.--8. 1. " CSI1_CPD_BC_2 ,CONSTANT 2 Parameter of Compander (Blue component)" line.long 0xA4 "CSI1_CPD_BC_2,CSI1 Blue component Compander Constants Register 2" hexmask.long.word 0xA4 16.--24. 1. " CSI1_CPD_BC_5 ,CONSTANT 5 Parameter of Compander (Blue component)" hexmask.long.word 0xA4 0.--8. 1. " CSI1_CPD_BC_4 ,CONSTANT 4 Parameter of Compander (Blue component)" line.long 0xA8 "CSI1_CPD_BC_3,CSI1 Blue component Compander Constants Register 3" hexmask.long.word 0xA8 16.--24. 1. " CSI1_CPD_BC_7 ,CONSTANT 7 Parameter of Compander (Blue component)" hexmask.long.word 0xA8 0.--8. 1. " CSI1_CPD_BC_6 ,CONSTANT 6 Parameter of Compander (Blue component)" line.long 0xAC "CSI1_CPD_BC_4,CSI1 Blue component Compander Constants Register 4" hexmask.long.word 0xAC 16.--24. 1. " CSI1_CPD_BC_9 ,CONSTANT 9 Parameter of Compander (Blue component)" hexmask.long.word 0xAC 0.--8. 1. " CSI1_CPD_BC_8 ,CONSTANT 8 Parameter of Compander (Blue component)" line.long 0xB0 "CSI1_CPD_BC_5,CSI1 Blue component Compander Constants Register 5" hexmask.long.word 0xB0 16.--24. 1. " CSI1_CPD_BC_11 ,CONSTANT 11 Parameter of Compander (Blue component)" hexmask.long.word 0xB0 0.--8. 1. " CSI1_CPD_BC_10 ,CONSTANT 10 Parameter of Compander (Blue component)" line.long 0xB4 "CSI1_CPD_BC_6,CSI1 Blue component Compander Constants Register 6" hexmask.long.word 0xB4 16.--24. 1. " CSI1_CPD_BC_13 ,CONSTANT 13 Parameter of Compander (Blue component)" hexmask.long.word 0xB4 0.--8. 1. " CSI1_CPD_BC_12 ,CONSTANT 12 Parameter of Compander (Blue component)" line.long 0xB8 "CSI1_CPD_BC_7,CSI1 Blue component Compander Constants Register 7" hexmask.long.word 0xB8 16.--24. 1. " CSI1_CPD_BC_15 ,CONSTANT 15 Parameter of Compander (Blue component)" hexmask.long.word 0xB8 0.--8. 1. " CSI1_CPD_BC_14 ,CONSTANT 14 Parameter of Compander (Blue component)" line.long 0xBC "CSI1_CPD_BS_0,CSI1 Blue component Compander SLOPE Register 0" hexmask.long.byte 0xBC 24.--31. 1. " CSI1_CPD_BS_3 ,SLOPE 3 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 16.--23. 1. " CSI1_CPD_BS_2 ,SLOPE 2 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 8.--15. 1. " CSI1_CPD_BS_1 ,SLOPE 1 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 0.--7. 1. " CSI1_CPD_BS_0 ,SLOPE 0 Parameter of Compander (Blue component)" line.long 0xC0 "CSI1_CPD_BS_1,CSI1 Blue component Compander SLOPE Register 1" hexmask.long.byte 0xC0 24.--31. 1. " CSI1_CPD_BS_7 ,SLOPE 7 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 16.--23. 1. " CSI1_CPD_BS_6 ,SLOPE 6 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 8.--15. 1. " CSI1_CPD_BS_5 ,SLOPE 5 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 0.--7. 1. " CSI1_CPD_BS_4 ,SLOPE 4 Parameter of Compander (Blue component)" line.long 0xC4 "CSI1_CPD_BS_2,CSI1 Blue component Compander SLOPE Register 2" hexmask.long.byte 0xC4 24.--31. 1. " CSI1_CPD_BS_11 ,SLOPE 11 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 16.--23. 1. " CSI1_CPD_BS_10 ,SLOPE 10 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 8.--15. 1. " CSI1_CPD_BS_9 ,SLOPE 9 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 0.--7. 1. " CSI1_CPD_BS_8 ,SLOPE 8 Parameter of Compander (Blue component)" line.long 0xC8 "CSI1_CPD_BS_3,CSI1 Blue component Compander SLOPE Register 3" hexmask.long.byte 0xC8 24.--31. 1. " CSI1_CPD_BS_15 ,SLOPE 15 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 16.--23. 1. " CSI1_CPD_BS_14 ,SLOPE 14 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 8.--15. 1. " CSI1_CPD_BS_13 ,SLOPE 13 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 0.--7. 1. " CSI1_CPD_BS_12 ,SLOPE 12 Parameter of Compander (Blue component)" line.long 0xcc "CSI1_CPD_OFFSET1,CSI1 Compander Offset Register 1" hexmask.long.word 0xcc 20.--29. 1. " CSI1_CPD_B_OFFSET ,CSI1 Blue component offset" hexmask.long.word 0xcc 10.--19. 1. " CSI1_GB_OFFSET ,CSI1 Green Blue component offset" hexmask.long.word 0xcc 0.--9. 1. " CSI1_GR_OFFSET ,CSI1 Green Red component offset" line.long 0xd0 "CSI1_CPD_OFFSET2,CSI1 Compander Offset Register 2" hexmask.long.word 0xd0 0.--9. 1. " CSI1_CPD_R_OFFSET ,CSI1 Red component offset" else sif (cpuis("IMX6*")) group.long 0x20++0x03 line.long 0x00 "CSI1_DI,CSI1 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI1_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI1_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI1_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI1_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" endif group.long 0x24++0x03 line.long 0x00 "CSI1_SKIP,CSI1 SKIP Register" sif (cpuis("IMX6*")) bitfld.long 0x00 8.--9. " CSI1_ID_2_SKIP ,Data from the CSI1 to the SMFC has an ID associated with it" "00,01,10,11" textline " " endif bitfld.long 0x00 3.--7. " CSI1_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CSI1_MAX_RATIO_SKIP_SMFC ,CSI1 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" endif width 0x0B tree.end tree "DI0 registers" base ad:0x02640000 width 17. group.long 0x00++0x57 line.long 0x00 "DI0_GENERAL,DI0 General Register" bitfld.long 0x00 31. " DI0_PIN8_PIN15_SEL ,Route PIN8 over PIN15" "Not routed,Routed" bitfld.long 0x00 28.--30. " DI0_DISP_Y_SEL ,DI0 Display Vertical coordinate (Y) select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x00 24.--27. " DI0_CLOCK_STOP_MODE ,DI clock stop mode" "Next edge,Next event of Cnt. 1,Next event of Cnt. 2,Next event of Cnt. 3,Next event of Cnt. 4,Next event of Cnt. 5,Next event of Cnt. 6,Next event of Cnt. 7,Next event of Cnt. 8,Next event of Cnt. 9,,,EOL/now,EOF/now,EOL/next line,EOF/next frame" textline " " bitfld.long 0x00 23. " DI0_DISP_CLOCK_INIT ,Display clock's initial mode" "Stopped,Running" bitfld.long 0x00 22. " DI0_MASK_SEL ,DI0 Mask select" "Counter 2,Extracted MASK data" bitfld.long 0x00 21. " DI0_VSYNC_EXT ,DI0 External VSYNC" "Internally,External" textline " " bitfld.long 0x00 20. " DI0_CLK_EXT ,DI0 External Clock" "Internally,External" bitfld.long 0x00 18.--19. " DI0_WATCHDOG_MODE ,DI0 watchdog mode" "4,16,64,128" bitfld.long 0x00 17. " DI0_POLARITY_DISP_CLK ,DI0 Output Clock's polarity" "Active low,Active high" textline " " bitfld.long 0x00 12.--15. " DI0_SYNC_COUNT_SEL ,Selects synchronous flow synchronization counter in DI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " DI0_ERR_TREATMENT ,In case of synchronous flow error there are 2 ways to handle the display" "Drive the last component,To wait" bitfld.long 0x00 10. " DI0_ERM_VSYNC_SEL ,DI0 error recovery module's VSYNC source select" "Vsync_pre,Vsync_post" textline " " bitfld.long 0x00 9. " DI0_POLARITY_CS1 ,DI0 Chip Select's 1 polarity" "Active Low,Active High" bitfld.long 0x00 8. " DI0_POLARITY_CS0 ,DI0 Chip Select's 0 polarity" "Active Low,Active High" bitfld.long 0x00 7. " DI0_POLARITY_8 ,DI0 output pin 8 polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " DI0_POLARITY_7 ,DI0 output pin 7 polarity" "Active low,Active high" bitfld.long 0x00 5. " DI0_POLARITY_6 ,DI0 output pin 6 polarity" "Active low,Active high" bitfld.long 0x00 4. " DI0_POLARITY_5 ,DI0 output pin 5 polarity" "Active low,Active high" textline " " bitfld.long 0x00 3. " DI0_POLARITY_4 ,DI0 output pin 4 polarity" "Active low,Active high" bitfld.long 0x00 2. " DI0_POLARITY_3 ,DI0 output pin 3 polarity" "Active low,Active high" bitfld.long 0x00 1. " DI0_POLARITY_2 ,DI0 output pin 2 polarity" "Active low,Active high" textline " " bitfld.long 0x00 0. " DI0_POLARITY_1 ,DI0 output pin 1 polarity" "Active low,Active high" line.long 0x04 "DI0_BS_CLKGEN0,DI0 Base Sync Clock Gen 0 Register" hexmask.long.word 0x04 16.--24. 1. " DI0_DISP_CLK_OFFSET ,DI0 Display Clock Offset" hexmask.long.byte 0x04 4.--11. 1. " DI0_DISP_CLK_PERIOD1 ,DI0 Display Clock Period (integer part)" hexmask.long.byte 0x04 0.--3. 1. " DI0_DISP_CLK_PERIOD0 ,DI0 Display Clock Period (fractional part)" line.long 0x08 "DI0_BS_CLKGEN1,DI0 Base Sync Clock Gen 1 Register" hexmask.long.byte 0x08 17.--24. 1. " DI0_DISP_CLK_DOWN1 ,DI0 display clock falling edge position (integer part)" bitfld.long 0x08 16. " DI0_DISP_CLK_DOWN0 ,DI0 display clock falling edge position(fractional part)" "0,1" hexmask.long.byte 0x08 1.--8. 1. " DI0_DISP_CLK_UP1 ,DI0 display clock rising edge position (integer part)" textline " " bitfld.long 0x08 0. " DI0_DISP_CLK_UP0 ,DI0 display clock rising edge position (fractional part)" "0,1" line.long 0x0c "DI0_SW_GEN0_1,DI0 Sync Wave Gen 1 Register 0" hexmask.long.word 0x0C 19.--30. 1. " DI0_RUN_VALUE_M1_1 ,DI0 counter #1 pre defined value" bitfld.long 0x0C 16.--18. " DI0_RUN_RESOLUTION_1 ,DI0 counter #1 Run Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0C 3.--14. 1. " DI0_OFFSET_VALUE_1 ,DI0 counter #1 offset value" textline " " bitfld.long 0x0C 0.--2. " DI0_OFFSET_RESOLUTION_1 ,DI0 counter #1 offset Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" line.long 0x10 "DI0_SW_GEN0_2,DI0 Sync Wave Gen 2 Register 0" hexmask.long.word 0x10 19.--30. 1. " DI0_RUN_VALUE_M1_2 ,DI0 counter #2 pre defined value" bitfld.long 0x10 16.--18. " DI0_RUN_RESOLUTION_2 ,DI0 counter #2 Run Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x10 3.--14. 1. " DI0_OFFSET_VALUE_2 ,DI0 counter #2 offset value" textline " " bitfld.long 0x10 0.--2. " DI0_OFFSET_RESOLUTION_2 ,DI0 counter #2 offset Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" line.long 0x14 "DI0_SW_GEN0_3,DI0 Sync Wave Gen 3 Register 0" hexmask.long.word 0x14 19.--30. 1. " DI0_RUN_VALUE_M1_3 ,DI0 counter #3 pre defined value" bitfld.long 0x14 16.--18. " DI0_RUN_RESOLUTION_3 ,DI0 counter #3 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x14 3.--14. 1. " DI0_OFFSET_VALUE_3 ,counter #3 offset value" textline " " bitfld.long 0x14 0.--2. " DI0_OFFSET_RESOLUTION_3 ,DI0 counter #3 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" line.long 0x18 "DI0_SW_GEN0_4,DI0 Sync Wave Gen 4 Register 0" hexmask.long.word 0x18 19.--30. 1. " DI0_RUN_VALUE_M1_4 ,DI0 counter #4 pre defined value" bitfld.long 0x18 16.--18. " DI0_RUN_RESOLUTION_4 ,DI0 counter #4 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x18 3.--14. 1. " DI0_OFFSET_VALUE_4 ,DI0 counter #4 offset value" textline " " bitfld.long 0x18 0.--2. " DI0_OFFSET_RESOLUTION_4 ,DI0 counter #4 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" line.long 0x1c "DI0_SW_GEN0_5,DI0 Sync Wave Gen 5 Register 0" hexmask.long.word 0x1C 19.--30. 1. " DI0_RUN_VALUE_M1_5 ,DI0 counter #5 pre defined value" bitfld.long 0x1C 16.--18. " DI0_RUN_RESOLUTION_5 ,DI0 counter #5 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x1C 3.--14. 1. " DI0_OFFSET_VALUE_5 ,DI0 counter #5 offset value" textline " " bitfld.long 0x1C 0.--2. " DI0_OFFSET_RESOLUTION_5 ,DI0 counter #5 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" line.long 0x20 "DI0_SW_GEN0_6,DI0 Sync Wave Gen 6 Register 0" hexmask.long.word 0x20 19.--30. 1. " DI0_RUN_VALUE_M1_6 ,DI0 counter #6 pre defined value" bitfld.long 0x20 16.--18. " DI0_RUN_RESOLUTION_6 ,DI0 counter #6 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x20 3.--14. 1. " DI0_OFFSET_VALUE_6 ,DI0 counter #6 offset value" textline " " bitfld.long 0x20 0.--2. " DI0_OFFSET_RESOLUTION_6 ,DI0 counter #6 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x24 "DI0_SW_GEN0_7,DI0 Sync Wave Gen 7 Register 0" hexmask.long.word 0x24 19.--30. 1. " DI0_RUN_VALUE_M1_7 ,DI0 counter #7 pre defined value" bitfld.long 0x24 16.--18. " DI0_RUN_RESOLUTION_7 ,DI0 counter #7 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x24 3.--14. 1. " DI0_OFFSET_VALUE_7 ,DI0 counter #7 offset value" textline " " bitfld.long 0x24 0.--2. " DI0_OFFSET_RESOLUTION_7 ,DI0 counter #7 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x28 "DI0_SW_GEN0_8,DI0 Sync Wave Gen 8 Register 0" hexmask.long.word 0x28 19.--30. 1. " DI0_RUN_VALUE_M1_8 ,DI0 counter #8 pre defined value" bitfld.long 0x28 16.--18. " DI0_RUN_RESOLUTION_8 ,DI0 counter #8 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x28 3.--14. 1. " DI0_OFFSET_VALUE_8 ,DI0 counter #8 offset value" textline " " bitfld.long 0x28 0.--2. " DI0_OFFSET_RESOLUTION_8 ,DI0 counter #8 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x2c "DI0_SW_GEN0_9,DI0 Sync Wave Gen 9 Register 0" hexmask.long.word 0x2C 19.--30. 1. " DI0_RUN_VALUE_M1_9 ,DI0 counter #9 pre defined value" bitfld.long 0x2C 16.--18. " DI0_RUN_RESOLUTION_9 ,DI0 counter #9 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x2C 3.--14. 1. " DI0_OFFSET_VALUE_9 ,DI0 counter #9 offset value" textline " " bitfld.long 0x2C 0.--2. " DI0_OFFSET_RESOLUTION_9 ,DI0 counter #9 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" textline " " line.long 0x30 "DI0_SW_GEN1_1,DI0 Sync Wave 1 Gen Register 1" bitfld.long 0x30 29.--30. " DI0_CNT_POLARITY_GEN_EN_1 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x30 28. " DI0_CNT_AUTO_RELOAD_1 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x30 25.--27. " DI0_CNT_CLR_SEL_1 ,Counter Clear select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x30 16.--24. 1. " DI0_CNT_DOWN_1 ,Counter falling edge position" textline " " bitfld.long 0x30 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_1 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x30 9.--11. " DI0_CNT_POLARITY_CLR_SEL_1 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x30 1.--8. 1. " DI0_CNT_UP_1_1 ,Counter rising edge position(integer part)" bitfld.long 0x30 0. " DI0_CNT_UP_1_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x34 "DI0_SW_GEN1_2,DI0 Sync Wave 2 Gen Register 1" bitfld.long 0x34 29.--30. " DI0_CNT_POLARITY_GEN_EN_2 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x34 28. " DI0_CNT_AUTO_RELOAD_2 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x34 25.--27. " DI0_CNT_CLR_SEL_2 ,Counter Clear select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x34 16.--24. 1. " DI0_CNT_DOWN_2 ,Counter falling edge position" textline " " bitfld.long 0x34 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_2 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x34 9.--11. " DI0_CNT_POLARITY_CLR_SEL_2 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x34 1.--8. 1. " DI0_CNT_UP_2_1 ,Counter rising edge position(integer part)" bitfld.long 0x34 0. " DI0_CNT_UP_2_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x38 "DI0_SW_GEN1_3,DI0 Sync Wave 3 Gen Register 1" bitfld.long 0x38 29.--30. " DI0_CNT_POLARITY_GEN_EN_3 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x38 28. " DI0_CNT_AUTO_RELOAD_3 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x38 25.--27. " DI0_CNT_CLR_SEL_3 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x38 16.--24. 1. " DI0_CNT_DOWN_3 ,Counter falling edge position" textline " " bitfld.long 0x38 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_3 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x38 9.--11. " DI0_CNT_POLARITY_CLR_SEL_3 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,?..." textline " " hexmask.long.byte 0x38 1.--8. 1. " DI0_CNT_UP_3_1 ,Counter rising edge position(integer part)" bitfld.long 0x38 0. " DI0_CNT_UP_3_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x3c "DI0_SW_GEN1_4,DI0 Sync Wave 4 Gen Register 1" bitfld.long 0x3C 29.--30. " DI0_CNT_POLARITY_GEN_EN_4 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x3C 28. " DI0_CNT_AUTO_RELOAD_4 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x3C 25.--27. " DI0_CNT_CLR_SEL_4 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x3C 16.--24. 1. " DI0_CNT_DOWN_4 ,Counter falling edge position" textline " " bitfld.long 0x3C 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_4 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x3C 9.--11. " DI0_CNT_POLARITY_CLR_SEL_4 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,?..." textline " " hexmask.long.byte 0x3C 1.--8. 1. " DI0_CNT_UP_4_1 ,Counter rising edge position(integer part)" bitfld.long 0x3C 0. " DI0_CNT_UP_4_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x40 "DI0_SW_GEN1_5,DI0 Sync Wave 5 Gen Register 1" bitfld.long 0x40 29.--30. " DI0_CNT_POLARITY_GEN_EN_5 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x40 28. " DI0_CNT_AUTO_RELOAD_5 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x40 25.--27. " DI0_CNT_CLR_SEL_5 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x40 16.--24. 1. " DI0_CNT_DOWN_5 ,Counter falling edge position" textline " " bitfld.long 0x40 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_5 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" bitfld.long 0x40 9.--11. " DI0_CNT_POLARITY_CLR_SEL_5 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,?..." textline " " hexmask.long.byte 0x40 1.--8. 1. " DI0_CNT_UP_5_1 ,Counter rising edge position(integer part)" bitfld.long 0x40 0. " DI0_CNT_UP_5_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x44 "DI0_SW_GEN1_6,DI0 Sync Wave 6 Gen Register 1" bitfld.long 0x44 29.--30. " DI0_CNT_POLARITY_GEN_EN_6 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x44 28. " DI0_CNT_AUTO_RELOAD_6 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x44 25.--27. " DI0_CNT_CLR_SEL_6 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x44 16.--24. 1. " DI0_CNT_DOWN_6 ,Counter falling edge position" textline " " bitfld.long 0x44 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_6 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x44 9.--11. " DI0_CNT_POLARITY_CLR_SEL_6 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,?..." textline " " hexmask.long.byte 0x44 1.--8. 1. " DI0_CNT_UP_6_1 ,Counter rising edge position(integer part)" bitfld.long 0x44 0. " DI0_CNT_UP_6_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x48 "DI0_SW_GEN1_7,DI0 Sync Wave 7 Gen Register 1" bitfld.long 0x48 29.--30. " DI0_CNT_POLARITY_GEN_EN_7 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x48 28. " DI0_CNT_AUTO_RELOAD_7 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x48 25.--27. " DI0_CNT_CLR_SEL_7 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x48 16.--24. 1. " DI0_CNT_DOWN_7 ,Counter falling edge position" textline " " bitfld.long 0x48 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_7 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x48 9.--11. " DI0_CNT_POLARITY_CLR_SEL_7 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x48 1.--8. 1. " DI0_CNT_UP_7_1 ,Counter rising edge position(integer part)" bitfld.long 0x48 0. " DI0_CNT_UP_7_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x4c "DI0_SW_GEN1_8,DI0 Sync Wave 8 Gen Register 1" bitfld.long 0x4c 29.--30. " DI0_CNT_POLARITY_GEN_EN_8 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x4c 28. " DI0_CNT_AUTO_RELOAD_8 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x4c 25.--27. " DI0_CNT_CLR_SEL_8 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x4c 16.--24. 1. " DI0_CNT_DOWN_8 ,Counter falling edge position" textline " " bitfld.long 0x4c 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_8 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x4c 9.--11. " DI0_CNT_POLARITY_CLR_SEL_8 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x4c 1.--8. 1. " DI0_CNT_UP_8_1 ,Counter rising edge position(integer part)" bitfld.long 0x4c 0. " DI0_CNT_UP_8_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x50 "DI0_SW_GEN1_9,DI0 Sync Wave 9 Gen Register 1" bitfld.long 0x50 29.--31. " DI0_GENTIME_SEL_9 ,Counter #9 main waveform select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x50 28. " DI0_CNT_AUTO_RELOAD_9 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x50 25.--27. " DI0_CNT_CLR_SEL_9 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x50 16.--24. 1. " DI0_CNT_DOWN_9 ,Counter falling edge position" textline " " bitfld.long 0x50 15. " DI0_TAG_SEL_9 ,Tag's source select" "Triggering counter,Counter 9" hexmask.long.byte 0x50 1.--8. 1. " DI0_CNT_UP_9_1 ,Counter rising edge position(integer part)" textline " " bitfld.long 0x50 0. " DI0_CNT_UP_9_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x54 "DI0_SYNC_AS_GEN,DI0 Sync Assistance Gen Register" sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||(cpuis("IMX6*"))) bitfld.long 0x54 28. " DI0_SYNC_START_EN ,DI0_SYNC_START_EN" "Disabled,Enabled" textline " " endif bitfld.long 0x54 13.--15. " DI0_VSYNC_SEL ,VSYNC select" "1,2,3,4,5,6,7,8" hexmask.long.word 0x54 0.--11. 1. " DI0_SYNC_START ,DI0 Sync start" tree "DI0_DW_GEN 0-11 (Serial display)" group.long 0x58++0x2f line.long 0x0 "DI0_DW_GEN_0 ,DI0 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI0_SERIAL_PERIOD_0 ,DI0 Serial Period 0 " hexmask.long.byte 0x0 16.--23. 1. " DI0_START_PERIOD_0 ,DI0 start period" bitfld.long 0x0 14.--15. " DI0_CST_0 ,DI0 Chip Select pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 4.--8. " DI0_SERIAL_VALID_BITS_0 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0 2.--3. " DI0_SERIAL_RS_0 ,DI0 Serial RS" "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI0_SERIAL_CLK_0 ,DI0 serial clock" "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " line.long 0x4 "DI0_DW_GEN_1 ,DI0 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI0_SERIAL_PERIOD_1 ,DI0 Serial Period 1 " hexmask.long.byte 0x4 16.--23. 1. " DI0_START_PERIOD_1 ,DI0 start period" bitfld.long 0x4 14.--15. " DI0_CST_1 ,DI0 Chip Select pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 4.--8. " DI0_SERIAL_VALID_BITS_1 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4 2.--3. " DI0_SERIAL_RS_1 ,DI0 Serial RS" "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI0_SERIAL_CLK_1 ,DI0 serial clock" "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " line.long 0x8 "DI0_DW_GEN_2 ,DI0 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI0_SERIAL_PERIOD_2 ,DI0 Serial Period 2 " hexmask.long.byte 0x8 16.--23. 1. " DI0_START_PERIOD_2 ,DI0 start period" bitfld.long 0x8 14.--15. " DI0_CST_2 ,DI0 Chip Select pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 4.--8. " DI0_SERIAL_VALID_BITS_2 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x8 2.--3. " DI0_SERIAL_RS_2 ,DI0 Serial RS" "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI0_SERIAL_CLK_2 ,DI0 serial clock" "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " line.long 0xC "DI0_DW_GEN_3 ,DI0 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI0_SERIAL_PERIOD_3 ,DI0 Serial Period 3 " hexmask.long.byte 0xC 16.--23. 1. " DI0_START_PERIOD_3 ,DI0 start period" bitfld.long 0xC 14.--15. " DI0_CST_3 ,DI0 Chip Select pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 4.--8. " DI0_SERIAL_VALID_BITS_3 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0xC 2.--3. " DI0_SERIAL_RS_3 ,DI0 Serial RS" "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI0_SERIAL_CLK_3 ,DI0 serial clock" "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " line.long 0x10 "DI0_DW_GEN_4 ,DI0 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI0_SERIAL_PERIOD_4 ,DI0 Serial Period 4 " hexmask.long.byte 0x10 16.--23. 1. " DI0_START_PERIOD_4 ,DI0 start period" bitfld.long 0x10 14.--15. " DI0_CST_4 ,DI0 Chip Select pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 4.--8. " DI0_SERIAL_VALID_BITS_4 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 2.--3. " DI0_SERIAL_RS_4 ,DI0 Serial RS" "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI0_SERIAL_CLK_4 ,DI0 serial clock" "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " line.long 0x14 "DI0_DW_GEN_5 ,DI0 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI0_SERIAL_PERIOD_5 ,DI0 Serial Period 5 " hexmask.long.byte 0x14 16.--23. 1. " DI0_START_PERIOD_5 ,DI0 start period" bitfld.long 0x14 14.--15. " DI0_CST_5 ,DI0 Chip Select pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 4.--8. " DI0_SERIAL_VALID_BITS_5 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 2.--3. " DI0_SERIAL_RS_5 ,DI0 Serial RS" "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI0_SERIAL_CLK_5 ,DI0 serial clock" "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " line.long 0x18 "DI0_DW_GEN_6 ,DI0 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI0_SERIAL_PERIOD_6 ,DI0 Serial Period 6 " hexmask.long.byte 0x18 16.--23. 1. " DI0_START_PERIOD_6 ,DI0 start period" bitfld.long 0x18 14.--15. " DI0_CST_6 ,DI0 Chip Select pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 4.--8. " DI0_SERIAL_VALID_BITS_6 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 2.--3. " DI0_SERIAL_RS_6 ,DI0 Serial RS" "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI0_SERIAL_CLK_6 ,DI0 serial clock" "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " line.long 0x1C "DI0_DW_GEN_7 ,DI0 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI0_SERIAL_PERIOD_7 ,DI0 Serial Period 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI0_START_PERIOD_7 ,DI0 start period" bitfld.long 0x1C 14.--15. " DI0_CST_7 ,DI0 Chip Select pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 4.--8. " DI0_SERIAL_VALID_BITS_7 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 2.--3. " DI0_SERIAL_RS_7 ,DI0 Serial RS" "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI0_SERIAL_CLK_7 ,DI0 serial clock" "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " line.long 0x20 "DI0_DW_GEN_8 ,DI0 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI0_SERIAL_PERIOD_8 ,DI0 Serial Period 8 " hexmask.long.byte 0x20 16.--23. 1. " DI0_START_PERIOD_8 ,DI0 start period" bitfld.long 0x20 14.--15. " DI0_CST_8 ,DI0 Chip Select pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 4.--8. " DI0_SERIAL_VALID_BITS_8 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 2.--3. " DI0_SERIAL_RS_8 ,DI0 Serial RS" "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI0_SERIAL_CLK_8 ,DI0 serial clock" "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " line.long 0x24 "DI0_DW_GEN_9 ,DI0 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI0_SERIAL_PERIOD_9 ,DI0 Serial Period 9 " hexmask.long.byte 0x24 16.--23. 1. " DI0_START_PERIOD_9 ,DI0 start period" bitfld.long 0x24 14.--15. " DI0_CST_9 ,DI0 Chip Select pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 4.--8. " DI0_SERIAL_VALID_BITS_9 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 2.--3. " DI0_SERIAL_RS_9 ,DI0 Serial RS" "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI0_SERIAL_CLK_9 ,DI0 serial clock" "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " line.long 0x28 "DI0_DW_GEN_10,DI0 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI0_SERIAL_PERIOD_10 ,DI0 Serial Period 10" hexmask.long.byte 0x28 16.--23. 1. " DI0_START_PERIOD_10 ,DI0 start period" bitfld.long 0x28 14.--15. " DI0_CST_10 ,DI0 Chip Select pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 4.--8. " DI0_SERIAL_VALID_BITS_10 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 2.--3. " DI0_SERIAL_RS_10 ,DI0 Serial RS" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 0.--1. " DI0_SERIAL_CLK_10 ,DI0 serial clock" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" line.long 0x2C "DI0_DW_GEN_11,DI0 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI0_SERIAL_PERIOD_11 ,DI0 Serial Period 11" hexmask.long.byte 0x2C 16.--23. 1. " DI0_START_PERIOD_11 ,DI0 start period" bitfld.long 0x2C 14.--15. " DI0_CST_11 ,DI0 Chip Select pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 4.--8. " DI0_SERIAL_VALID_BITS_11 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 2.--3. " DI0_SERIAL_RS_11 ,DI0 Serial RS" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI0_SERIAL_CLK_11 ,DI0 serial clock" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" tree.end tree "DI0_DW_GEN 0-11 (Parallel display)" group.long 0x58++0x2f line.long 0x0 "DI0_DW_GEN_0 ,DI0 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI0_ACCESS_SIZE_0 ,DI0 Access Size 0 " hexmask.long.byte 0x0 16.--23. 1. " DI0_COMPONENT_SIZE_0 ,DI0 component Size" bitfld.long 0x0 14.--15. " DI0_CST_0 ,DI0 Chip Select pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 12.--13. " DI0_PT_6_0 ,DI0 PIN_17 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " textline " " bitfld.long 0x0 10.--11. " DI0_PT_5_0 ,DI0 PIN_16 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 8.--9. " DI0_PT_4_0 ,DI0 PIN_15 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 6.--7. " DI0_PT_3_0 ,DI0 PIN_14 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 4.--5. " DI0_PT_2_0 ,DI0 PIN_13 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " textline " " bitfld.long 0x0 2.--3. " DI0_PT_1_0 ,DI0 PIN_12 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI0_PT_0_0 ,DI0 PIN_11 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " line.long 0x4 "DI0_DW_GEN_1 ,DI0 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI0_ACCESS_SIZE_1 ,DI0 Access Size 1 " hexmask.long.byte 0x4 16.--23. 1. " DI0_COMPONENT_SIZE_1 ,DI0 component Size" bitfld.long 0x4 14.--15. " DI0_CST_1 ,DI0 Chip Select pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 12.--13. " DI0_PT_6_1 ,DI0 PIN_17 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " textline " " bitfld.long 0x4 10.--11. " DI0_PT_5_1 ,DI0 PIN_16 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 8.--9. " DI0_PT_4_1 ,DI0 PIN_15 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 6.--7. " DI0_PT_3_1 ,DI0 PIN_14 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 4.--5. " DI0_PT_2_1 ,DI0 PIN_13 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " textline " " bitfld.long 0x4 2.--3. " DI0_PT_1_1 ,DI0 PIN_12 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI0_PT_0_1 ,DI0 PIN_11 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " line.long 0x8 "DI0_DW_GEN_2 ,DI0 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI0_ACCESS_SIZE_2 ,DI0 Access Size 2 " hexmask.long.byte 0x8 16.--23. 1. " DI0_COMPONENT_SIZE_2 ,DI0 component Size" bitfld.long 0x8 14.--15. " DI0_CST_2 ,DI0 Chip Select pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 12.--13. " DI0_PT_6_2 ,DI0 PIN_17 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " textline " " bitfld.long 0x8 10.--11. " DI0_PT_5_2 ,DI0 PIN_16 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 8.--9. " DI0_PT_4_2 ,DI0 PIN_15 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 6.--7. " DI0_PT_3_2 ,DI0 PIN_14 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 4.--5. " DI0_PT_2_2 ,DI0 PIN_13 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " textline " " bitfld.long 0x8 2.--3. " DI0_PT_1_2 ,DI0 PIN_12 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI0_PT_0_2 ,DI0 PIN_11 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " line.long 0xC "DI0_DW_GEN_3 ,DI0 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI0_ACCESS_SIZE_3 ,DI0 Access Size 3 " hexmask.long.byte 0xC 16.--23. 1. " DI0_COMPONENT_SIZE_3 ,DI0 component Size" bitfld.long 0xC 14.--15. " DI0_CST_3 ,DI0 Chip Select pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 12.--13. " DI0_PT_6_3 ,DI0 PIN_17 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " textline " " bitfld.long 0xC 10.--11. " DI0_PT_5_3 ,DI0 PIN_16 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 8.--9. " DI0_PT_4_3 ,DI0 PIN_15 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 6.--7. " DI0_PT_3_3 ,DI0 PIN_14 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 4.--5. " DI0_PT_2_3 ,DI0 PIN_13 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " textline " " bitfld.long 0xC 2.--3. " DI0_PT_1_3 ,DI0 PIN_12 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI0_PT_0_3 ,DI0 PIN_11 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " line.long 0x10 "DI0_DW_GEN_4 ,DI0 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI0_ACCESS_SIZE_4 ,DI0 Access Size 4 " hexmask.long.byte 0x10 16.--23. 1. " DI0_COMPONENT_SIZE_4 ,DI0 component Size" bitfld.long 0x10 14.--15. " DI0_CST_4 ,DI0 Chip Select pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 12.--13. " DI0_PT_6_4 ,DI0 PIN_17 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " textline " " bitfld.long 0x10 10.--11. " DI0_PT_5_4 ,DI0 PIN_16 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 8.--9. " DI0_PT_4_4 ,DI0 PIN_15 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 6.--7. " DI0_PT_3_4 ,DI0 PIN_14 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 4.--5. " DI0_PT_2_4 ,DI0 PIN_13 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " textline " " bitfld.long 0x10 2.--3. " DI0_PT_1_4 ,DI0 PIN_12 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI0_PT_0_4 ,DI0 PIN_11 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " line.long 0x14 "DI0_DW_GEN_5 ,DI0 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI0_ACCESS_SIZE_5 ,DI0 Access Size 5 " hexmask.long.byte 0x14 16.--23. 1. " DI0_COMPONENT_SIZE_5 ,DI0 component Size" bitfld.long 0x14 14.--15. " DI0_CST_5 ,DI0 Chip Select pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 12.--13. " DI0_PT_6_5 ,DI0 PIN_17 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " textline " " bitfld.long 0x14 10.--11. " DI0_PT_5_5 ,DI0 PIN_16 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 8.--9. " DI0_PT_4_5 ,DI0 PIN_15 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 6.--7. " DI0_PT_3_5 ,DI0 PIN_14 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 4.--5. " DI0_PT_2_5 ,DI0 PIN_13 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " textline " " bitfld.long 0x14 2.--3. " DI0_PT_1_5 ,DI0 PIN_12 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI0_PT_0_5 ,DI0 PIN_11 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " line.long 0x18 "DI0_DW_GEN_6 ,DI0 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI0_ACCESS_SIZE_6 ,DI0 Access Size 6 " hexmask.long.byte 0x18 16.--23. 1. " DI0_COMPONENT_SIZE_6 ,DI0 component Size" bitfld.long 0x18 14.--15. " DI0_CST_6 ,DI0 Chip Select pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 12.--13. " DI0_PT_6_6 ,DI0 PIN_17 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " textline " " bitfld.long 0x18 10.--11. " DI0_PT_5_6 ,DI0 PIN_16 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 8.--9. " DI0_PT_4_6 ,DI0 PIN_15 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 6.--7. " DI0_PT_3_6 ,DI0 PIN_14 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 4.--5. " DI0_PT_2_6 ,DI0 PIN_13 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " textline " " bitfld.long 0x18 2.--3. " DI0_PT_1_6 ,DI0 PIN_12 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI0_PT_0_6 ,DI0 PIN_11 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " line.long 0x1C "DI0_DW_GEN_7 ,DI0 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI0_ACCESS_SIZE_7 ,DI0 Access Size 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI0_COMPONENT_SIZE_7 ,DI0 component Size" bitfld.long 0x1C 14.--15. " DI0_CST_7 ,DI0 Chip Select pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 12.--13. " DI0_PT_6_7 ,DI0 PIN_17 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " textline " " bitfld.long 0x1C 10.--11. " DI0_PT_5_7 ,DI0 PIN_16 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 8.--9. " DI0_PT_4_7 ,DI0 PIN_15 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 6.--7. " DI0_PT_3_7 ,DI0 PIN_14 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 4.--5. " DI0_PT_2_7 ,DI0 PIN_13 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " textline " " bitfld.long 0x1C 2.--3. " DI0_PT_1_7 ,DI0 PIN_12 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI0_PT_0_7 ,DI0 PIN_11 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " line.long 0x20 "DI0_DW_GEN_8 ,DI0 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI0_ACCESS_SIZE_8 ,DI0 Access Size 8 " hexmask.long.byte 0x20 16.--23. 1. " DI0_COMPONENT_SIZE_8 ,DI0 component Size" bitfld.long 0x20 14.--15. " DI0_CST_8 ,DI0 Chip Select pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 12.--13. " DI0_PT_6_8 ,DI0 PIN_17 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " textline " " bitfld.long 0x20 10.--11. " DI0_PT_5_8 ,DI0 PIN_16 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 8.--9. " DI0_PT_4_8 ,DI0 PIN_15 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 6.--7. " DI0_PT_3_8 ,DI0 PIN_14 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 4.--5. " DI0_PT_2_8 ,DI0 PIN_13 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " textline " " bitfld.long 0x20 2.--3. " DI0_PT_1_8 ,DI0 PIN_12 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI0_PT_0_8 ,DI0 PIN_11 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " line.long 0x24 "DI0_DW_GEN_9 ,DI0 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI0_ACCESS_SIZE_9 ,DI0 Access Size 9 " hexmask.long.byte 0x24 16.--23. 1. " DI0_COMPONENT_SIZE_9 ,DI0 component Size" bitfld.long 0x24 14.--15. " DI0_CST_9 ,DI0 Chip Select pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 12.--13. " DI0_PT_6_9 ,DI0 PIN_17 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " textline " " bitfld.long 0x24 10.--11. " DI0_PT_5_9 ,DI0 PIN_16 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 8.--9. " DI0_PT_4_9 ,DI0 PIN_15 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 6.--7. " DI0_PT_3_9 ,DI0 PIN_14 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 4.--5. " DI0_PT_2_9 ,DI0 PIN_13 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " textline " " bitfld.long 0x24 2.--3. " DI0_PT_1_9 ,DI0 PIN_12 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI0_PT_0_9 ,DI0 PIN_11 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " line.long 0x28 "DI0_DW_GEN_10,DI0 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI0_ACCESS_SIZE_10 ,DI0 Access Size 10" hexmask.long.byte 0x28 16.--23. 1. " DI0_COMPONENT_SIZE_10 ,DI0 component Size" bitfld.long 0x28 14.--15. " DI0_CST_10 ,DI0 Chip Select pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 12.--13. " DI0_PT_6_10 ,DI0 PIN_17 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" textline " " bitfld.long 0x28 10.--11. " DI0_PT_5_10 ,DI0 PIN_16 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 8.--9. " DI0_PT_4_10 ,DI0 PIN_15 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 6.--7. " DI0_PT_3_10 ,DI0 PIN_14 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 4.--5. " DI0_PT_2_10 ,DI0 PIN_13 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" textline " " bitfld.long 0x28 2.--3. " DI0_PT_1_10 ,DI0 PIN_12 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 0.--1. " DI0_PT_0_10 ,DI0 PIN_11 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" line.long 0x2C "DI0_DW_GEN_11,DI0 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI0_ACCESS_SIZE_11 ,DI0 Access Size 11" hexmask.long.byte 0x2C 16.--23. 1. " DI0_COMPONENT_SIZE_11 ,DI0 component Size" bitfld.long 0x2C 14.--15. " DI0_CST_11 ,DI0 Chip Select pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 12.--13. " DI0_PT_6_11 ,DI0 PIN_17 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" textline " " bitfld.long 0x2C 10.--11. " DI0_PT_5_11 ,DI0 PIN_16 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 8.--9. " DI0_PT_4_11 ,DI0 PIN_15 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 6.--7. " DI0_PT_3_11 ,DI0 PIN_14 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 4.--5. " DI0_PT_2_11 ,DI0 PIN_13 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" textline " " bitfld.long 0x2C 2.--3. " DI0_PT_1_11 ,DI0 PIN_12 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI0_PT_0_11 ,DI0 PIN_11 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" tree.end textline " " group.long 0x88++0xeb line.long 0x0 "DI0_DW_SET0_0 ,DI0 Data Wave Set 0 0 Registers" hexmask.long.word 0x0 16.--24. 1. " DI0_DATA_CNT_DOWN0_0 ,Waveform's falling edge position" hexmask.long.word 0x0 0.--8. 1. " DI0_DATA_CNT_UP0_0 ,Waveform's rising edge position" line.long 0x4 "DI0_DW_SET0_1 ,DI0 Data Wave Set 0 1 Registers" hexmask.long.word 0x4 16.--24. 1. " DI0_DATA_CNT_DOWN0_1 ,Waveform's falling edge position" hexmask.long.word 0x4 0.--8. 1. " DI0_DATA_CNT_UP0_1 ,Waveform's rising edge position" line.long 0x8 "DI0_DW_SET0_2 ,DI0 Data Wave Set 0 2 Registers" hexmask.long.word 0x8 16.--24. 1. " DI0_DATA_CNT_DOWN0_2 ,Waveform's falling edge position" hexmask.long.word 0x8 0.--8. 1. " DI0_DATA_CNT_UP0_2 ,Waveform's rising edge position" line.long 0xC "DI0_DW_SET0_3 ,DI0 Data Wave Set 0 3 Registers" hexmask.long.word 0xC 16.--24. 1. " DI0_DATA_CNT_DOWN0_3 ,Waveform's falling edge position" hexmask.long.word 0xC 0.--8. 1. " DI0_DATA_CNT_UP0_3 ,Waveform's rising edge position" line.long 0x10 "DI0_DW_SET0_4 ,DI0 Data Wave Set 0 4 Registers" hexmask.long.word 0x10 16.--24. 1. " DI0_DATA_CNT_DOWN0_4 ,Waveform's falling edge position" hexmask.long.word 0x10 0.--8. 1. " DI0_DATA_CNT_UP0_4 ,Waveform's rising edge position" line.long 0x14 "DI0_DW_SET0_5 ,DI0 Data Wave Set 0 5 Registers" hexmask.long.word 0x14 16.--24. 1. " DI0_DATA_CNT_DOWN0_5 ,Waveform's falling edge position" hexmask.long.word 0x14 0.--8. 1. " DI0_DATA_CNT_UP0_5 ,Waveform's rising edge position" line.long 0x18 "DI0_DW_SET0_6 ,DI0 Data Wave Set 0 6 Registers" hexmask.long.word 0x18 16.--24. 1. " DI0_DATA_CNT_DOWN0_6 ,Waveform's falling edge position" hexmask.long.word 0x18 0.--8. 1. " DI0_DATA_CNT_UP0_6 ,Waveform's rising edge position" line.long 0x1C "DI0_DW_SET0_7 ,DI0 Data Wave Set 0 7 Registers" hexmask.long.word 0x1C 16.--24. 1. " DI0_DATA_CNT_DOWN0_7 ,Waveform's falling edge position" hexmask.long.word 0x1C 0.--8. 1. " DI0_DATA_CNT_UP0_7 ,Waveform's rising edge position" line.long 0x20 "DI0_DW_SET0_8 ,DI0 Data Wave Set 0 8 Registers" hexmask.long.word 0x20 16.--24. 1. " DI0_DATA_CNT_DOWN0_8 ,Waveform's falling edge position" hexmask.long.word 0x20 0.--8. 1. " DI0_DATA_CNT_UP0_8 ,Waveform's rising edge position" line.long 0x24 "DI0_DW_SET0_9 ,DI0 Data Wave Set 0 9 Registers" hexmask.long.word 0x24 16.--24. 1. " DI0_DATA_CNT_DOWN0_9 ,Waveform's falling edge position" hexmask.long.word 0x24 0.--8. 1. " DI0_DATA_CNT_UP0_9 ,Waveform's rising edge position" line.long 0x28 "DI0_DW_SET0_10,DI0 Data Wave Set 0 10 Registers" hexmask.long.word 0x28 16.--24. 1. " DI0_DATA_CNT_DOWN0_10 ,Waveform's falling edge position" hexmask.long.word 0x28 0.--8. 1. " DI0_DATA_CNT_UP0_10 ,Waveform's rising edge position" line.long 0x2C "DI0_DW_SET0_11,DI0 Data Wave Set 0 11 Registers" hexmask.long.word 0x2C 16.--24. 1. " DI0_DATA_CNT_DOWN0_11 ,Waveform's falling edge position" hexmask.long.word 0x2C 0.--8. 1. " DI0_DATA_CNT_UP0_11 ,Waveform's rising edge position" line.long 0x30 "DI0_DW_SET1_0 ,DI0 Data Wave Set 1 0 Registers" hexmask.long.word 0x30 16.--24. 1. " DI0_DATA_CNT_DOWN1_0 ,Waveform's falling edge position" hexmask.long.word 0x30 0.--8. 1. " DI0_DATA_CNT_UP1_0 ,Waveform's rising edge position" line.long 0x34 "DI0_DW_SET1_1 ,DI0 Data Wave Set 1 1 Registers" hexmask.long.word 0x34 16.--24. 1. " DI0_DATA_CNT_DOWN1_1 ,Waveform's falling edge position" hexmask.long.word 0x34 0.--8. 1. " DI0_DATA_CNT_UP1_1 ,Waveform's rising edge position" line.long 0x38 "DI0_DW_SET1_2 ,DI0 Data Wave Set 1 2 Registers" hexmask.long.word 0x38 16.--24. 1. " DI0_DATA_CNT_DOWN1_2 ,Waveform's falling edge position" hexmask.long.word 0x38 0.--8. 1. " DI0_DATA_CNT_UP1_2 ,Waveform's rising edge position" line.long 0x3C "DI0_DW_SET1_3 ,DI0 Data Wave Set 1 3 Registers" hexmask.long.word 0x3C 16.--24. 1. " DI0_DATA_CNT_DOWN1_3 ,Waveform's falling edge position" hexmask.long.word 0x3C 0.--8. 1. " DI0_DATA_CNT_UP1_3 ,Waveform's rising edge position" line.long 0x40 "DI0_DW_SET1_4 ,DI0 Data Wave Set 1 4 Registers" hexmask.long.word 0x40 16.--24. 1. " DI0_DATA_CNT_DOWN1_4 ,Waveform's falling edge position" hexmask.long.word 0x40 0.--8. 1. " DI0_DATA_CNT_UP1_4 ,Waveform's rising edge position" line.long 0x44 "DI0_DW_SET1_5 ,DI0 Data Wave Set 1 5 Registers" hexmask.long.word 0x44 16.--24. 1. " DI0_DATA_CNT_DOWN1_5 ,Waveform's falling edge position" hexmask.long.word 0x44 0.--8. 1. " DI0_DATA_CNT_UP1_5 ,Waveform's rising edge position" line.long 0x48 "DI0_DW_SET1_6 ,DI0 Data Wave Set 1 6 Registers" hexmask.long.word 0x48 16.--24. 1. " DI0_DATA_CNT_DOWN1_6 ,Waveform's falling edge position" hexmask.long.word 0x48 0.--8. 1. " DI0_DATA_CNT_UP1_6 ,Waveform's rising edge position" line.long 0x4C "DI0_DW_SET1_7 ,DI0 Data Wave Set 1 7 Registers" hexmask.long.word 0x4C 16.--24. 1. " DI0_DATA_CNT_DOWN1_7 ,Waveform's falling edge position" hexmask.long.word 0x4C 0.--8. 1. " DI0_DATA_CNT_UP1_7 ,Waveform's rising edge position" line.long 0x50 "DI0_DW_SET1_8 ,DI0 Data Wave Set 1 8 Registers" hexmask.long.word 0x50 16.--24. 1. " DI0_DATA_CNT_DOWN1_8 ,Waveform's falling edge position" hexmask.long.word 0x50 0.--8. 1. " DI0_DATA_CNT_UP1_8 ,Waveform's rising edge position" line.long 0x54 "DI0_DW_SET1_9 ,DI0 Data Wave Set 1 9 Registers" hexmask.long.word 0x54 16.--24. 1. " DI0_DATA_CNT_DOWN1_9 ,Waveform's falling edge position" hexmask.long.word 0x54 0.--8. 1. " DI0_DATA_CNT_UP1_9 ,Waveform's rising edge position" line.long 0x58 "DI0_DW_SET1_10,DI0 Data Wave Set 1 10 Registers" hexmask.long.word 0x58 16.--24. 1. " DI0_DATA_CNT_DOWN1_10 ,Waveform's falling edge position" hexmask.long.word 0x58 0.--8. 1. " DI0_DATA_CNT_UP1_10 ,Waveform's rising edge position" line.long 0x5C "DI0_DW_SET1_11,DI0 Data Wave Set 1 11 Registers" hexmask.long.word 0x5C 16.--24. 1. " DI0_DATA_CNT_DOWN1_11 ,Waveform's falling edge position" hexmask.long.word 0x5C 0.--8. 1. " DI0_DATA_CNT_UP1_11 ,Waveform's rising edge position" line.long 0x60 "DI0_DW_SET2_0 ,DI0 Data Wave Set 2 0 Registers" hexmask.long.word 0x60 16.--24. 1. " DI0_DATA_CNT_DOWN2_0 ,Waveform's falling edge position" hexmask.long.word 0x60 0.--8. 1. " DI0_DATA_CNT_UP2_0 ,Waveform's rising edge position" line.long 0x64 "DI0_DW_SET2_1 ,DI0 Data Wave Set 2 1 Registers" hexmask.long.word 0x64 16.--24. 1. " DI0_DATA_CNT_DOWN2_1 ,Waveform's falling edge position" hexmask.long.word 0x64 0.--8. 1. " DI0_DATA_CNT_UP2_1 ,Waveform's rising edge position" line.long 0x68 "DI0_DW_SET2_2 ,DI0 Data Wave Set 2 2 Registers" hexmask.long.word 0x68 16.--24. 1. " DI0_DATA_CNT_DOWN2_2 ,Waveform's falling edge position" hexmask.long.word 0x68 0.--8. 1. " DI0_DATA_CNT_UP2_2 ,Waveform's rising edge position" line.long 0x6C "DI0_DW_SET2_3 ,DI0 Data Wave Set 2 3 Registers" hexmask.long.word 0x6C 16.--24. 1. " DI0_DATA_CNT_DOWN2_3 ,Waveform's falling edge position" hexmask.long.word 0x6C 0.--8. 1. " DI0_DATA_CNT_UP2_3 ,Waveform's rising edge position" line.long 0x70 "DI0_DW_SET2_4 ,DI0 Data Wave Set 2 4 Registers" hexmask.long.word 0x70 16.--24. 1. " DI0_DATA_CNT_DOWN2_4 ,Waveform's falling edge position" hexmask.long.word 0x70 0.--8. 1. " DI0_DATA_CNT_UP2_4 ,Waveform's rising edge position" line.long 0x74 "DI0_DW_SET2_5 ,DI0 Data Wave Set 2 5 Registers" hexmask.long.word 0x74 16.--24. 1. " DI0_DATA_CNT_DOWN2_5 ,Waveform's falling edge position" hexmask.long.word 0x74 0.--8. 1. " DI0_DATA_CNT_UP2_5 ,Waveform's rising edge position" line.long 0x78 "DI0_DW_SET2_6 ,DI0 Data Wave Set 2 6 Registers" hexmask.long.word 0x78 16.--24. 1. " DI0_DATA_CNT_DOWN2_6 ,Waveform's falling edge position" hexmask.long.word 0x78 0.--8. 1. " DI0_DATA_CNT_UP2_6 ,Waveform's rising edge position" line.long 0x7C "DI0_DW_SET2_7 ,DI0 Data Wave Set 2 7 Registers" hexmask.long.word 0x7C 16.--24. 1. " DI0_DATA_CNT_DOWN2_7 ,Waveform's falling edge position" hexmask.long.word 0x7C 0.--8. 1. " DI0_DATA_CNT_UP2_7 ,Waveform's rising edge position" line.long 0x80 "DI0_DW_SET2_8 ,DI0 Data Wave Set 2 8 Registers" hexmask.long.word 0x80 16.--24. 1. " DI0_DATA_CNT_DOWN2_8 ,Waveform's falling edge position" hexmask.long.word 0x80 0.--8. 1. " DI0_DATA_CNT_UP2_8 ,Waveform's rising edge position" line.long 0x84 "DI0_DW_SET2_9 ,DI0 Data Wave Set 2 9 Registers" hexmask.long.word 0x84 16.--24. 1. " DI0_DATA_CNT_DOWN2_9 ,Waveform's falling edge position" hexmask.long.word 0x84 0.--8. 1. " DI0_DATA_CNT_UP2_9 ,Waveform's rising edge position" line.long 0x88 "DI0_DW_SET2_10,DI0 Data Wave Set 2 10 Registers" hexmask.long.word 0x88 16.--24. 1. " DI0_DATA_CNT_DOWN2_10 ,Waveform's falling edge position" hexmask.long.word 0x88 0.--8. 1. " DI0_DATA_CNT_UP2_10 ,Waveform's rising edge position" line.long 0x8C "DI0_DW_SET2_11,DI0 Data Wave Set 2 11 Registers" hexmask.long.word 0x8C 16.--24. 1. " DI0_DATA_CNT_DOWN2_11 ,Waveform's falling edge position" hexmask.long.word 0x8C 0.--8. 1. " DI0_DATA_CNT_UP2_11 ,Waveform's rising edge position" line.long 0x90 "DI0_DW_SET3_0 ,DI0 Data Wave Set 3 0 Registers" hexmask.long.word 0x90 16.--24. 1. " DI0_DATA_CNT_DOWN3_0 ,Waveform's falling edge position" hexmask.long.word 0x90 0.--8. 1. " DI0_DATA_CNT_UP3_0 ,Waveform's rising edge position" line.long 0x94 "DI0_DW_SET3_1 ,DI0 Data Wave Set 3 1 Registers" hexmask.long.word 0x94 16.--24. 1. " DI0_DATA_CNT_DOWN3_1 ,Waveform's falling edge position" hexmask.long.word 0x94 0.--8. 1. " DI0_DATA_CNT_UP3_1 ,Waveform's rising edge position" line.long 0x98 "DI0_DW_SET3_2 ,DI0 Data Wave Set 3 2 Registers" hexmask.long.word 0x98 16.--24. 1. " DI0_DATA_CNT_DOWN3_2 ,Waveform's falling edge position" hexmask.long.word 0x98 0.--8. 1. " DI0_DATA_CNT_UP3_2 ,Waveform's rising edge position" line.long 0x9C "DI0_DW_SET3_3 ,DI0 Data Wave Set 3 3 Registers" hexmask.long.word 0x9C 16.--24. 1. " DI0_DATA_CNT_DOWN3_3 ,Waveform's falling edge position" hexmask.long.word 0x9C 0.--8. 1. " DI0_DATA_CNT_UP3_3 ,Waveform's rising edge position" line.long 0xA0 "DI0_DW_SET3_4 ,DI0 Data Wave Set 3 4 Registers" hexmask.long.word 0xA0 16.--24. 1. " DI0_DATA_CNT_DOWN3_4 ,Waveform's falling edge position" hexmask.long.word 0xA0 0.--8. 1. " DI0_DATA_CNT_UP3_4 ,Waveform's rising edge position" line.long 0xA4 "DI0_DW_SET3_5 ,DI0 Data Wave Set 3 5 Registers" hexmask.long.word 0xA4 16.--24. 1. " DI0_DATA_CNT_DOWN3_5 ,Waveform's falling edge position" hexmask.long.word 0xA4 0.--8. 1. " DI0_DATA_CNT_UP3_5 ,Waveform's rising edge position" line.long 0xA8 "DI0_DW_SET3_6 ,DI0 Data Wave Set 3 6 Registers" hexmask.long.word 0xA8 16.--24. 1. " DI0_DATA_CNT_DOWN3_6 ,Waveform's falling edge position" hexmask.long.word 0xA8 0.--8. 1. " DI0_DATA_CNT_UP3_6 ,Waveform's rising edge position" line.long 0xAC "DI0_DW_SET3_7 ,DI0 Data Wave Set 3 7 Registers" hexmask.long.word 0xAC 16.--24. 1. " DI0_DATA_CNT_DOWN3_7 ,Waveform's falling edge position" hexmask.long.word 0xAC 0.--8. 1. " DI0_DATA_CNT_UP3_7 ,Waveform's rising edge position" line.long 0xB0 "DI0_DW_SET3_8 ,DI0 Data Wave Set 3 8 Registers" hexmask.long.word 0xB0 16.--24. 1. " DI0_DATA_CNT_DOWN3_8 ,Waveform's falling edge position" hexmask.long.word 0xB0 0.--8. 1. " DI0_DATA_CNT_UP3_8 ,Waveform's rising edge position" line.long 0xB4 "DI0_DW_SET3_9 ,DI0 Data Wave Set 3 9 Registers" hexmask.long.word 0xB4 16.--24. 1. " DI0_DATA_CNT_DOWN3_9 ,Waveform's falling edge position" hexmask.long.word 0xB4 0.--8. 1. " DI0_DATA_CNT_UP3_9 ,Waveform's rising edge position" line.long 0xB8 "DI0_DW_SET3_10,DI0 Data Wave Set 3 10 Registers" hexmask.long.word 0xB8 16.--24. 1. " DI0_DATA_CNT_DOWN3_10 ,Waveform's falling edge position" hexmask.long.word 0xB8 0.--8. 1. " DI0_DATA_CNT_UP3_10 ,Waveform's rising edge position" line.long 0xBC "DI0_DW_SET3_11,DI0 Data Wave Set 3 11 Registers" hexmask.long.word 0xBC 16.--24. 1. " DI0_DATA_CNT_DOWN3_11 ,Waveform's falling edge position" hexmask.long.word 0xBC 0.--8. 1. " DI0_DATA_CNT_UP3_11 ,Waveform's rising edge position" line.long 0xC0 "DI0_STP_REP_1,DI0 Step Repeat 1 Registers" hexmask.long.word 0xC0 16.--27. 1. " DI0_STEP_REPEAT_1 ,Step Repeat 1" hexmask.long.word 0xC0 0.--11. 1. " DI0_STEP_REPEAT_0 ,Step Repeat 0" line.long 0xC4 "DI0_STP_REP_2,DI0 Step Repeat 2 Registers" hexmask.long.word 0xC4 16.--27. 1. " DI0_STEP_REPEAT_3 ,Step Repeat 3" hexmask.long.word 0xC4 0.--11. 1. " DI0_STEP_REPEAT_2 ,Step Repeat 2" line.long 0xC8 "DI0_STP_REP_3,DI0 Step Repeat 3 Registers" hexmask.long.word 0xC8 16.--27. 1. " DI0_STEP_REPEAT_5 ,Step Repeat 5" hexmask.long.word 0xC8 0.--11. 1. " DI0_STEP_REPEAT_4 ,Step Repeat 4" line.long 0xCC "DI0_STP_REP_4,DI0 Step Repeat 4 Registers" hexmask.long.word 0xCC 16.--27. 1. " DI0_STEP_REPEAT_7 ,Step Repeat 7" hexmask.long.word 0xCC 0.--11. 1. " DI0_STEP_REPEAT_6 ,Step Repeat 6" line.long 0xd0 "DI0_STP_REP_9,DI0 Step Repeat 9 Registers" hexmask.long.word 0xd0 0.--11. 1. " DI0_STEP_REPEAT_9 ,Step Repeat 9" line.long 0xd4 "DI0_SER_CONF,DI0 Serial Display Control Register" bitfld.long 0xd4 28.--31. " DI0_SERIAL_LLA_PNTR_RS_R_1 ,RS 3 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 24.--27. " DI0_SERIAL_LLA_PNTR_RS_R_0 ,RS 2 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 20.--23. " DI0_SERIAL_LLA_PNTR_RS_W_1 ,RS 1 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." textline " " bitfld.long 0xd4 16.--19. " DI0_SERIAL_LLA_PNTR_RS_W_0 ,RS 0 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0xd4 8.--15. 1. " DI0_SERIAL_LATCH ,DI0 Serial Latch" bitfld.long 0xd4 5. " DI0_LLA_SER_ACCESS ,Direct Low Level Access to Serial display" "Disabled,Enabled" textline " " bitfld.long 0xd4 4. " DI0_SER_CLK_POLARITY ,Serial Clock Polarity" "Not inverted,Inverted" bitfld.long 0xd4 3. " DI0_SERIAL_DATA_POLARITY ,Serial Data Polarity" "Not inverted,Inverted" bitfld.long 0xd4 2. " DI0_SERIAL_RS_POLARITY ,Serial RS Polarity" "Not inverted,Inverted" textline " " bitfld.long 0xd4 1. " DI0_SERIAL_CS_POLARITY ,Serial Chip Select Polarity" "Not inverted,Inverted" bitfld.long 0xd4 0. " DI0_WAIT4SERIAL ,Wait for Serial" "Not wait,Wait" line.long 0xd8 "DI0_SSC,DI0 Special Signals Control Register" bitfld.long 0xd8 23. " DI0_PIN17_ERM ,DI0 PIN17 error recovery mode" "No error,Error" bitfld.long 0xd8 22. " DI0_PIN16_ERM ,DI0 PIN16 error recovery mode" "No error,Error" bitfld.long 0xd8 21. " DI0_PIN15_ERM ,DI0 PIN15 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 20. " DI0_PIN14_ERM ,DI0 PIN14 error recovery mode" "No error,Error" bitfld.long 0xd8 19. " DI0_PIN13_ERM ,DI0 PIN13 error recovery mode" "No error,Error" bitfld.long 0xd8 18. " DI0_PIN12_ERM ,DI0 PIN12 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 17. " DI0_PIN11_ERM ,DI0 PIN11 error recovery mode" "No error,Error" bitfld.long 0xd8 16. " DI0_CS_ERM ,DI0 CS error recovery mode" "No error,Error" bitfld.long 0xd8 5. " DI0_WAIT_ON ,Wait On" "Continued,Held" textline " " bitfld.long 0xd8 3. " DI0_BYTE_EN_RD_IN ,Byte Enable Read In" "R/W [17:16],W [17:16]/R [19:18]" bitfld.long 0xd8 0.--2. " DI0_BYTE_EN_PNTR ,Byte Enable Pointer" "Pin_11,Pin_12,Pin_13,Pin_14,Pin_15,Pin_16,Pin_17,CS pin" line.long 0xdc "DI0_POL,DI0 Polarity Register" bitfld.long 0xdc 26. " DI0_WAIT_POLARITY ,WAIT polarity" "Active low,Active high" bitfld.long 0xdc 25. " DI0_CS1_BYTE_EN_POLARITY ,Byte Enable associated with CS1 polarity" "Active low,Active high" bitfld.long 0xdc 24. " DI0_CS0_BYTE_EN_POLARITY ,Byte Enable associated with CS0 polarity" "Active low,Active high" textline " " bitfld.long 0xdc 23. " DI0_CS1_DATA_POLARITY ,Data Polarity associated with CS1" "Active low,Active high" bitfld.long 0xdc 22. " DI0_CS1_POLARITY_17 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 21. " DI0_CS1_POLARITY_16 ,DI0 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 20. " DI0_CS1_POLARITY_15 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 19. " DI0_CS1_POLARITY_14 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 18. " DI0_CS1_POLARITY_13 ,DI0 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 17. " DI0_CS1_POLARITY_12 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 16. " DI0_CS1_POLARITY_11 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 15. " DI0_CS0_DATA_POLARITY ,Data Polarity associated with CS0" "Active low,Active high" textline " " bitfld.long 0xdc 14. " DI0_CS0_POLARITY_17 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 13. " DI0_CS0_POLARITY_16 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 12. " DI0_CS0_POLARITY_15 ,DI0 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 11. " DI0_CS0_POLARITY_14 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 10. " DI0_CS0_POLARITY_13 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 9. " DI0_CS0_POLARITY_12 ,DI0 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 8. " DI0_CS0_POLARITY_11 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 7. " DI0_DRDY_DATA_POLARITY ,Data Polarity associated with DRDY" "Active low,Active high" bitfld.long 0xdc 6. " DI0_DRDY_POLARITY_17 ,DI0 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 5. " DI0_DRDY_POLARITY_16 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 4. " DI0_DRDY_POLARITY_15 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 3. " DI0_DRDY_POLARITY_14 ,DI0 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 2. " DI0_DRDY_POLARITY_13 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 1. " DI0_DRDY_POLARITY_12 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 0. " DI0_DRDY_POLARITY_11 ,DI0 output pin's polarity for DRDY" "Active low,Active high" line.long 0xe0 "DI0_AW0,DI0 Active Window 0 Register" bitfld.long 0xe0 28.--31. " DI0_AW_TRIG_SEL ,Selects the trigger for sending data during the display's active window" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on,?..." hexmask.long.word 0xe0 16.--27. 1. " DI0_AW_HEND ,Horizontal end of the active window" bitfld.long 0xe0 12.--15. " DI0_AW_HCOUNT_SEL ,Selects the counter that counts the horizontal position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." textline " " hexmask.long.word 0xe0 0.--11. 1. " DI0_AW_HSTART ,Horizontal start of the active window" line.long 0xe4 "DI0_AW1,DI0 Active Window 1 Register" hexmask.long.word 0xe4 16.--27. 1. " DI0_AW_VEND ,Vertical end of the active window" bitfld.long 0xe4 12.--15. " DI0_AW_VCOUNT_SEL ,Selects the counter that counts the vertical position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." hexmask.long.word 0xe4 0.--11. 1. " DI0_AW_VSTART ,Vertical start of the active window" line.long 0xe8 "DI0_SCR_CONF,DI0 Screen Configuration Register" hexmask.long.word 0xe8 0.--11. 1. " DI0_SCREEN_HEIGHT ,Number of display rows" rgroup.long 0x174++0x03 line.long 0x00 "DI0_STAT,DI0 Status Register" bitfld.long 0x00 3. " DI0_CNTR_FIFO_FULL ,DI0_CNTR_FIFO_FULL" "Not full,Full" bitfld.long 0x00 2. " DI0_CNTR_FIFO_EMPTY ,DI0_CNTR_FIFO_EMPTY" "Not empty,Empty" bitfld.long 0x00 1. " DI0_READ_FIFO_FULL ,DI0_READ_FIFO_FULL" "Not full,Full" textline " " bitfld.long 0x00 0. " DI0_READ_FIFO_EMPTY ,DI0_READ_FIFO_EMPTY" "Not empty,Empty" width 0x0B tree.end tree "DI1 registers" base ad:0x02648000 width 17. group.long 0x00++0x57 line.long 0x00 "DI1_GENERAL,DI1 General Register" bitfld.long 0x00 31. " DI1_PIN8_PIN15_SEL ,Route PIN8 over PIN15" "Not routed,Routed" bitfld.long 0x00 28.--30. " DI1_DISP_Y_SEL ,DI1 Display Vertical coordinate (Y) select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x00 24.--27. " DI1_CLOCK_STOP_MODE ,DI clock stop mode" "Next edge,Next event of Cnt. 1,Next event of Cnt. 2,Next event of Cnt. 3,Next event of Cnt. 4,Next event of Cnt. 5,Next event of Cnt. 6,Next event of Cnt. 7,Next event of Cnt. 8,Next event of Cnt. 9,,,EOL/now,EOF/now,EOL/next line,EOF/next frame" textline " " bitfld.long 0x00 23. " DI1_DISP_CLOCK_INIT ,Display clock's initial mode" "Stopped,Running" bitfld.long 0x00 22. " DI1_MASK_SEL ,DI1 Mask select" "Counter 2,Extracted MASK data" bitfld.long 0x00 21. " DI1_VSYNC_EXT ,DI1 External VSYNC" "Internally,External" textline " " bitfld.long 0x00 20. " DI1_CLK_EXT ,DI1 External Clock" "Internally,External" bitfld.long 0x00 18.--19. " DI1_WATCHDOG_MODE ,DI1 watchdog mode" "4,16,64,128" bitfld.long 0x00 17. " DI1_POLARITY_DISP_CLK ,DI1 Output Clock's polarity" "Active low,Active high" textline " " bitfld.long 0x00 12.--15. " DI1_SYNC_COUNT_SEL ,Selects synchronous flow synchronization counter in DI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " DI1_ERR_TREATMENT ,In case of synchronous flow error there are 2 ways to handle the display" "Drive the last component,To wait" bitfld.long 0x00 10. " DI1_ERM_VSYNC_SEL ,DI1 error recovery module's VSYNC source select" "Vsync_pre,Vsync_post" textline " " bitfld.long 0x00 9. " DI1_POLARITY_CS1 ,DI1 Chip Select's 1 polarity" "Active Low,Active High" bitfld.long 0x00 8. " DI1_POLARITY_CS0 ,DI1 Chip Select's 0 polarity" "Active Low,Active High" bitfld.long 0x00 7. " DI1_POLARITY_8 ,DI1 output pin 8 polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " DI1_POLARITY_7 ,DI1 output pin 7 polarity" "Active low,Active high" bitfld.long 0x00 5. " DI1_POLARITY_6 ,DI1 output pin 6 polarity" "Active low,Active high" bitfld.long 0x00 4. " DI1_POLARITY_5 ,DI1 output pin 5 polarity" "Active low,Active high" textline " " bitfld.long 0x00 3. " DI1_POLARITY_4 ,DI1 output pin 4 polarity" "Active low,Active high" bitfld.long 0x00 2. " DI1_POLARITY_3 ,DI1 output pin 3 polarity" "Active low,Active high" bitfld.long 0x00 1. " DI1_POLARITY_2 ,DI1 output pin 2 polarity" "Active low,Active high" textline " " bitfld.long 0x00 0. " DI1_POLARITY_1 ,DI1 output pin 1 polarity" "Active low,Active high" line.long 0x04 "DI1_BS_CLKGEN0,DI1 Base Sync Clock Gen 0 Register" hexmask.long.word 0x04 16.--24. 1. " DI1_DISP_CLK_OFFSET ,DI1 Display Clock Offset" hexmask.long.byte 0x04 4.--11. 1. " DI1_DISP_CLK_PERIOD1 ,DI1 Display Clock Period (integer part)" hexmask.long.byte 0x04 0.--3. 1. " DI1_DISP_CLK_PERIOD0 ,DI1 Display Clock Period (fractional part)" line.long 0x08 "DI1_BS_CLKGEN1,DI1 Base Sync Clock Gen 1 Register" hexmask.long.byte 0x08 17.--24. 1. " DI1_DISP_CLK_DOWN1 ,DI1 display clock falling edge position (integer part)" bitfld.long 0x08 16. " DI1_DISP_CLK_DOWN0 ,DI1 display clock falling edge position(fractional part)" "0,1" hexmask.long.byte 0x08 1.--8. 1. " DI1_DISP_CLK_UP1 ,DI1 display clock rising edge position (integer part)" textline " " bitfld.long 0x08 0. " DI1_DISP_CLK_UP0 ,DI1 display clock rising edge position (fractional part)" "0,1" line.long 0x0c "DI1_SW_GEN0_1,DI1 Sync Wave Gen 1 Register 0" hexmask.long.word 0x0C 19.--30. 1. " DI1_RUN_VALUE_M1_1 ,DI1 counter #1 pre defined value" bitfld.long 0x0C 16.--18. " DI1_RUN_RESOLUTION_1 ,DI1 counter #1 Run Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0C 3.--14. 1. " DI1_OFFSET_VALUE_1 ,DI1 counter #1 offset value" textline " " bitfld.long 0x0C 0.--2. " DI1_OFFSET_RESOLUTION_1 ,DI1 counter #1 offset Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" line.long 0x10 "DI1_SW_GEN0_2,DI1 Sync Wave Gen 2 Register 0" hexmask.long.word 0x10 19.--30. 1. " DI1_RUN_VALUE_M1_2 ,DI1 counter #2 pre defined value" bitfld.long 0x10 16.--18. " DI1_RUN_RESOLUTION_2 ,DI1 counter #2 Run Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x10 3.--14. 1. " DI1_OFFSET_VALUE_2 ,DI1 counter #2 offset value" textline " " bitfld.long 0x10 0.--2. " DI1_OFFSET_RESOLUTION_2 ,DI1 counter #2 offset Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" line.long 0x14 "DI1_SW_GEN0_3,DI1 Sync Wave Gen 3 Register 0" hexmask.long.word 0x14 19.--30. 1. " DI1_RUN_VALUE_M1_3 ,DI1 counter #3 pre defined value" bitfld.long 0x14 16.--18. " DI1_RUN_RESOLUTION_3 ,DI1 counter #3 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x14 3.--14. 1. " DI1_OFFSET_VALUE_3 ,counter #3 offset value" textline " " bitfld.long 0x14 0.--2. " DI1_OFFSET_RESOLUTION_3 ,DI1 counter #3 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" line.long 0x18 "DI1_SW_GEN0_4,DI1 Sync Wave Gen 4 Register 0" hexmask.long.word 0x18 19.--30. 1. " DI1_RUN_VALUE_M1_4 ,DI1 counter #4 pre defined value" bitfld.long 0x18 16.--18. " DI1_RUN_RESOLUTION_4 ,DI1 counter #4 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x18 3.--14. 1. " DI1_OFFSET_VALUE_4 ,DI1 counter #4 offset value" textline " " bitfld.long 0x18 0.--2. " DI1_OFFSET_RESOLUTION_4 ,DI1 counter #4 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" line.long 0x1c "DI1_SW_GEN0_5,DI1 Sync Wave Gen 5 Register 0" hexmask.long.word 0x1C 19.--30. 1. " DI1_RUN_VALUE_M1_5 ,DI1 counter #5 pre defined value" bitfld.long 0x1C 16.--18. " DI1_RUN_RESOLUTION_5 ,DI1 counter #5 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x1C 3.--14. 1. " DI1_OFFSET_VALUE_5 ,DI1 counter #5 offset value" textline " " bitfld.long 0x1C 0.--2. " DI1_OFFSET_RESOLUTION_5 ,DI1 counter #5 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" line.long 0x20 "DI1_SW_GEN0_6,DI1 Sync Wave Gen 6 Register 0" hexmask.long.word 0x20 19.--30. 1. " DI1_RUN_VALUE_M1_6 ,DI1 counter #6 pre defined value" bitfld.long 0x20 16.--18. " DI1_RUN_RESOLUTION_6 ,DI1 counter #6 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x20 3.--14. 1. " DI1_OFFSET_VALUE_6 ,DI1 counter #6 offset value" textline " " bitfld.long 0x20 0.--2. " DI1_OFFSET_RESOLUTION_6 ,DI1 counter #6 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x24 "DI1_SW_GEN0_7,DI1 Sync Wave Gen 7 Register 0" hexmask.long.word 0x24 19.--30. 1. " DI1_RUN_VALUE_M1_7 ,DI1 counter #7 pre defined value" bitfld.long 0x24 16.--18. " DI1_RUN_RESOLUTION_7 ,DI1 counter #7 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x24 3.--14. 1. " DI1_OFFSET_VALUE_7 ,DI1 counter #7 offset value" textline " " bitfld.long 0x24 0.--2. " DI1_OFFSET_RESOLUTION_7 ,DI1 counter #7 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x28 "DI1_SW_GEN0_8,DI1 Sync Wave Gen 8 Register 0" hexmask.long.word 0x28 19.--30. 1. " DI1_RUN_VALUE_M1_8 ,DI1 counter #8 pre defined value" bitfld.long 0x28 16.--18. " DI1_RUN_RESOLUTION_8 ,DI1 counter #8 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x28 3.--14. 1. " DI1_OFFSET_VALUE_8 ,DI1 counter #8 offset value" textline " " bitfld.long 0x28 0.--2. " DI1_OFFSET_RESOLUTION_8 ,DI1 counter #8 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x2c "DI1_SW_GEN0_9,DI1 Sync Wave Gen 9 Register 0" hexmask.long.word 0x2C 19.--30. 1. " DI1_RUN_VALUE_M1_9 ,DI1 counter #9 pre defined value" bitfld.long 0x2C 16.--18. " DI1_RUN_RESOLUTION_9 ,DI1 counter #9 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x2C 3.--14. 1. " DI1_OFFSET_VALUE_9 ,DI1 counter #9 offset value" textline " " bitfld.long 0x2C 0.--2. " DI1_OFFSET_RESOLUTION_9 ,DI1 counter #9 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" textline " " line.long 0x30 "DI1_SW_GEN1_1,DI1 Sync Wave 1 Gen Register 1" bitfld.long 0x30 29.--30. " DI1_CNT_POLARITY_GEN_EN_1 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x30 28. " DI1_CNT_AUTO_RELOAD_1 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x30 25.--27. " DI1_CNT_CLR_SEL_1 ,Counter Clear select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x30 16.--24. 1. " DI1_CNT_DOWN_1 ,Counter falling edge position" textline " " bitfld.long 0x30 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_1 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x30 9.--11. " DI1_CNT_POLARITY_CLR_SEL_1 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x30 1.--8. 1. " DI1_CNT_UP_1_1 ,Counter rising edge position(integer part)" bitfld.long 0x30 0. " DI1_CNT_UP_1_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x34 "DI1_SW_GEN1_2,DI1 Sync Wave 2 Gen Register 1" bitfld.long 0x34 29.--30. " DI1_CNT_POLARITY_GEN_EN_2 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x34 28. " DI1_CNT_AUTO_RELOAD_2 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x34 25.--27. " DI1_CNT_CLR_SEL_2 ,Counter Clear select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x34 16.--24. 1. " DI1_CNT_DOWN_2 ,Counter falling edge position" textline " " bitfld.long 0x34 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_2 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x34 9.--11. " DI1_CNT_POLARITY_CLR_SEL_2 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x34 1.--8. 1. " DI1_CNT_UP_2_1 ,Counter rising edge position(integer part)" bitfld.long 0x34 0. " DI1_CNT_UP_2_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x38 "DI1_SW_GEN1_3,DI1 Sync Wave 3 Gen Register 1" bitfld.long 0x38 29.--30. " DI1_CNT_POLARITY_GEN_EN_3 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x38 28. " DI1_CNT_AUTO_RELOAD_3 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x38 25.--27. " DI1_CNT_CLR_SEL_3 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x38 16.--24. 1. " DI1_CNT_DOWN_3 ,Counter falling edge position" textline " " bitfld.long 0x38 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_3 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x38 9.--11. " DI1_CNT_POLARITY_CLR_SEL_3 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,?..." textline " " hexmask.long.byte 0x38 1.--8. 1. " DI1_CNT_UP_3_1 ,Counter rising edge position(integer part)" bitfld.long 0x38 0. " DI1_CNT_UP_3_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x3c "DI1_SW_GEN1_4,DI1 Sync Wave 4 Gen Register 1" bitfld.long 0x3C 29.--30. " DI1_CNT_POLARITY_GEN_EN_4 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x3C 28. " DI1_CNT_AUTO_RELOAD_4 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x3C 25.--27. " DI1_CNT_CLR_SEL_4 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x3C 16.--24. 1. " DI1_CNT_DOWN_4 ,Counter falling edge position" textline " " bitfld.long 0x3C 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_4 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x3C 9.--11. " DI1_CNT_POLARITY_CLR_SEL_4 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,?..." textline " " hexmask.long.byte 0x3C 1.--8. 1. " DI1_CNT_UP_4_1 ,Counter rising edge position(integer part)" bitfld.long 0x3C 0. " DI1_CNT_UP_4_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x40 "DI1_SW_GEN1_5,DI1 Sync Wave 5 Gen Register 1" bitfld.long 0x40 29.--30. " DI1_CNT_POLARITY_GEN_EN_5 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x40 28. " DI1_CNT_AUTO_RELOAD_5 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x40 25.--27. " DI1_CNT_CLR_SEL_5 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x40 16.--24. 1. " DI1_CNT_DOWN_5 ,Counter falling edge position" textline " " bitfld.long 0x40 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_5 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" bitfld.long 0x40 9.--11. " DI1_CNT_POLARITY_CLR_SEL_5 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,?..." textline " " hexmask.long.byte 0x40 1.--8. 1. " DI1_CNT_UP_5_1 ,Counter rising edge position(integer part)" bitfld.long 0x40 0. " DI1_CNT_UP_5_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x44 "DI1_SW_GEN1_6,DI1 Sync Wave 6 Gen Register 1" bitfld.long 0x44 29.--30. " DI1_CNT_POLARITY_GEN_EN_6 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x44 28. " DI1_CNT_AUTO_RELOAD_6 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x44 25.--27. " DI1_CNT_CLR_SEL_6 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x44 16.--24. 1. " DI1_CNT_DOWN_6 ,Counter falling edge position" textline " " bitfld.long 0x44 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_6 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x44 9.--11. " DI1_CNT_POLARITY_CLR_SEL_6 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,?..." textline " " hexmask.long.byte 0x44 1.--8. 1. " DI1_CNT_UP_6_1 ,Counter rising edge position(integer part)" bitfld.long 0x44 0. " DI1_CNT_UP_6_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x48 "DI1_SW_GEN1_7,DI1 Sync Wave 7 Gen Register 1" bitfld.long 0x48 29.--30. " DI1_CNT_POLARITY_GEN_EN_7 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x48 28. " DI1_CNT_AUTO_RELOAD_7 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x48 25.--27. " DI1_CNT_CLR_SEL_7 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x48 16.--24. 1. " DI1_CNT_DOWN_7 ,Counter falling edge position" textline " " bitfld.long 0x48 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_7 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x48 9.--11. " DI1_CNT_POLARITY_CLR_SEL_7 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x48 1.--8. 1. " DI1_CNT_UP_7_1 ,Counter rising edge position(integer part)" bitfld.long 0x48 0. " DI1_CNT_UP_7_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x4c "DI1_SW_GEN1_8,DI1 Sync Wave 8 Gen Register 1" bitfld.long 0x4c 29.--30. " DI1_CNT_POLARITY_GEN_EN_8 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x4c 28. " DI1_CNT_AUTO_RELOAD_8 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x4c 25.--27. " DI1_CNT_CLR_SEL_8 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x4c 16.--24. 1. " DI1_CNT_DOWN_8 ,Counter falling edge position" textline " " bitfld.long 0x4c 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_8 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x4c 9.--11. " DI1_CNT_POLARITY_CLR_SEL_8 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x4c 1.--8. 1. " DI1_CNT_UP_8_1 ,Counter rising edge position(integer part)" bitfld.long 0x4c 0. " DI1_CNT_UP_8_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x50 "DI1_SW_GEN1_9,DI1 Sync Wave 9 Gen Register 1" bitfld.long 0x50 29.--31. " DI1_GENTIME_SEL_9 ,Counter #9 main waveform select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x50 28. " DI1_CNT_AUTO_RELOAD_9 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x50 25.--27. " DI1_CNT_CLR_SEL_9 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x50 16.--24. 1. " DI1_CNT_DOWN_9 ,Counter falling edge position" textline " " bitfld.long 0x50 15. " DI1_TAG_SEL_9 ,Tag's source select" "Triggering counter,Counter 9" hexmask.long.byte 0x50 1.--8. 1. " DI1_CNT_UP_9_1 ,Counter rising edge position(integer part)" textline " " bitfld.long 0x50 0. " DI1_CNT_UP_9_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x54 "DI1_SYNC_AS_GEN,DI1 Sync Assistance Gen Register" sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||(cpuis("IMX6*"))) bitfld.long 0x54 28. " DI1_SYNC_START_EN ,DI0_SYNC_START_EN" "Disabled,Enabled" textline " " endif bitfld.long 0x54 13.--15. " DI1_VSYNC_SEL ,VSYNC select" "1,2,3,4,5,6,7,8" hexmask.long.word 0x54 0.--11. 1. " DI1_SYNC_START ,DI1 Sync start" tree "DI1_DW_GEN 0-11 (Serial display)" group.long 0x58++0x2f line.long 0x0 "DI1_DW_GEN_0 ,DI1 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI1_SERIAL_PERIOD_0 ,DI1 Serial Period 0 " hexmask.long.byte 0x0 16.--23. 1. " DI1_START_PERIOD_0 ,DI1 start period" bitfld.long 0x0 14.--15. " DI1_CST_0 ,DI1 Chip Select pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 4.--8. " DI1_SERIAL_VALID_BITS_0 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0 2.--3. " DI1_SERIAL_RS_0 ,DI1 Serial RS" "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI1_SERIAL_CLK_0 ,DI1 serial clock" "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " line.long 0x4 "DI1_DW_GEN_1 ,DI1 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI1_SERIAL_PERIOD_1 ,DI1 Serial Period 1 " hexmask.long.byte 0x4 16.--23. 1. " DI1_START_PERIOD_1 ,DI1 start period" bitfld.long 0x4 14.--15. " DI1_CST_1 ,DI1 Chip Select pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 4.--8. " DI1_SERIAL_VALID_BITS_1 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4 2.--3. " DI1_SERIAL_RS_1 ,DI1 Serial RS" "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI1_SERIAL_CLK_1 ,DI1 serial clock" "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " line.long 0x8 "DI1_DW_GEN_2 ,DI1 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI1_SERIAL_PERIOD_2 ,DI1 Serial Period 2 " hexmask.long.byte 0x8 16.--23. 1. " DI1_START_PERIOD_2 ,DI1 start period" bitfld.long 0x8 14.--15. " DI1_CST_2 ,DI1 Chip Select pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 4.--8. " DI1_SERIAL_VALID_BITS_2 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x8 2.--3. " DI1_SERIAL_RS_2 ,DI1 Serial RS" "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI1_SERIAL_CLK_2 ,DI1 serial clock" "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " line.long 0xC "DI1_DW_GEN_3 ,DI1 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI1_SERIAL_PERIOD_3 ,DI1 Serial Period 3 " hexmask.long.byte 0xC 16.--23. 1. " DI1_START_PERIOD_3 ,DI1 start period" bitfld.long 0xC 14.--15. " DI1_CST_3 ,DI1 Chip Select pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 4.--8. " DI1_SERIAL_VALID_BITS_3 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0xC 2.--3. " DI1_SERIAL_RS_3 ,DI1 Serial RS" "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI1_SERIAL_CLK_3 ,DI1 serial clock" "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " line.long 0x10 "DI1_DW_GEN_4 ,DI1 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI1_SERIAL_PERIOD_4 ,DI1 Serial Period 4 " hexmask.long.byte 0x10 16.--23. 1. " DI1_START_PERIOD_4 ,DI1 start period" bitfld.long 0x10 14.--15. " DI1_CST_4 ,DI1 Chip Select pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 4.--8. " DI1_SERIAL_VALID_BITS_4 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 2.--3. " DI1_SERIAL_RS_4 ,DI1 Serial RS" "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI1_SERIAL_CLK_4 ,DI1 serial clock" "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " line.long 0x14 "DI1_DW_GEN_5 ,DI1 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI1_SERIAL_PERIOD_5 ,DI1 Serial Period 5 " hexmask.long.byte 0x14 16.--23. 1. " DI1_START_PERIOD_5 ,DI1 start period" bitfld.long 0x14 14.--15. " DI1_CST_5 ,DI1 Chip Select pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 4.--8. " DI1_SERIAL_VALID_BITS_5 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 2.--3. " DI1_SERIAL_RS_5 ,DI1 Serial RS" "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI1_SERIAL_CLK_5 ,DI1 serial clock" "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " line.long 0x18 "DI1_DW_GEN_6 ,DI1 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI1_SERIAL_PERIOD_6 ,DI1 Serial Period 6 " hexmask.long.byte 0x18 16.--23. 1. " DI1_START_PERIOD_6 ,DI1 start period" bitfld.long 0x18 14.--15. " DI1_CST_6 ,DI1 Chip Select pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 4.--8. " DI1_SERIAL_VALID_BITS_6 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 2.--3. " DI1_SERIAL_RS_6 ,DI1 Serial RS" "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI1_SERIAL_CLK_6 ,DI1 serial clock" "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " line.long 0x1C "DI1_DW_GEN_7 ,DI1 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI1_SERIAL_PERIOD_7 ,DI1 Serial Period 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI1_START_PERIOD_7 ,DI1 start period" bitfld.long 0x1C 14.--15. " DI1_CST_7 ,DI1 Chip Select pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 4.--8. " DI1_SERIAL_VALID_BITS_7 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 2.--3. " DI1_SERIAL_RS_7 ,DI1 Serial RS" "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI1_SERIAL_CLK_7 ,DI1 serial clock" "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " line.long 0x20 "DI1_DW_GEN_8 ,DI1 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI1_SERIAL_PERIOD_8 ,DI1 Serial Period 8 " hexmask.long.byte 0x20 16.--23. 1. " DI1_START_PERIOD_8 ,DI1 start period" bitfld.long 0x20 14.--15. " DI1_CST_8 ,DI1 Chip Select pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 4.--8. " DI1_SERIAL_VALID_BITS_8 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 2.--3. " DI1_SERIAL_RS_8 ,DI1 Serial RS" "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI1_SERIAL_CLK_8 ,DI1 serial clock" "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " line.long 0x24 "DI1_DW_GEN_9 ,DI1 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI1_SERIAL_PERIOD_9 ,DI1 Serial Period 9 " hexmask.long.byte 0x24 16.--23. 1. " DI1_START_PERIOD_9 ,DI1 start period" bitfld.long 0x24 14.--15. " DI1_CST_9 ,DI1 Chip Select pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 4.--8. " DI1_SERIAL_VALID_BITS_9 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 2.--3. " DI1_SERIAL_RS_9 ,DI1 Serial RS" "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI1_SERIAL_CLK_9 ,DI1 serial clock" "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " line.long 0x28 "DI1_DW_GEN_10,DI1 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI1_SERIAL_PERIOD_10 ,DI1 Serial Period 10" hexmask.long.byte 0x28 16.--23. 1. " DI1_START_PERIOD_10 ,DI1 start period" bitfld.long 0x28 14.--15. " DI1_CST_10 ,DI1 Chip Select pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 4.--8. " DI1_SERIAL_VALID_BITS_10 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 2.--3. " DI1_SERIAL_RS_10 ,DI1 Serial RS" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 0.--1. " DI1_SERIAL_CLK_10 ,DI1 serial clock" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" line.long 0x2C "DI1_DW_GEN_11,DI1 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI1_SERIAL_PERIOD_11 ,DI1 Serial Period 11" hexmask.long.byte 0x2C 16.--23. 1. " DI1_START_PERIOD_11 ,DI1 start period" bitfld.long 0x2C 14.--15. " DI1_CST_11 ,DI1 Chip Select pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 4.--8. " DI1_SERIAL_VALID_BITS_11 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 2.--3. " DI1_SERIAL_RS_11 ,DI1 Serial RS" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI1_SERIAL_CLK_11 ,DI1 serial clock" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" tree.end tree "DI1_DW_GEN 0-11 (Parallel display)" group.long 0x58++0x2f line.long 0x0 "DI1_DW_GEN_0 ,DI1 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI1_ACCESS_SIZE_0 ,DI1 Access Size 0 " hexmask.long.byte 0x0 16.--23. 1. " DI1_COMPONENT_SIZE_0 ,DI1 component Size" bitfld.long 0x0 14.--15. " DI1_CST_0 ,DI1 Chip Select pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 12.--13. " DI1_PT_6_0 ,DI1 PIN_17 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " textline " " bitfld.long 0x0 10.--11. " DI1_PT_5_0 ,DI1 PIN_16 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 8.--9. " DI1_PT_4_0 ,DI1 PIN_15 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 6.--7. " DI1_PT_3_0 ,DI1 PIN_14 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 4.--5. " DI1_PT_2_0 ,DI1 PIN_13 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " textline " " bitfld.long 0x0 2.--3. " DI1_PT_1_0 ,DI1 PIN_12 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI1_PT_0_0 ,DI1 PIN_11 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " line.long 0x4 "DI1_DW_GEN_1 ,DI1 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI1_ACCESS_SIZE_1 ,DI1 Access Size 1 " hexmask.long.byte 0x4 16.--23. 1. " DI1_COMPONENT_SIZE_1 ,DI1 component Size" bitfld.long 0x4 14.--15. " DI1_CST_1 ,DI1 Chip Select pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 12.--13. " DI1_PT_6_1 ,DI1 PIN_17 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " textline " " bitfld.long 0x4 10.--11. " DI1_PT_5_1 ,DI1 PIN_16 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 8.--9. " DI1_PT_4_1 ,DI1 PIN_15 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 6.--7. " DI1_PT_3_1 ,DI1 PIN_14 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 4.--5. " DI1_PT_2_1 ,DI1 PIN_13 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " textline " " bitfld.long 0x4 2.--3. " DI1_PT_1_1 ,DI1 PIN_12 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI1_PT_0_1 ,DI1 PIN_11 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " line.long 0x8 "DI1_DW_GEN_2 ,DI1 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI1_ACCESS_SIZE_2 ,DI1 Access Size 2 " hexmask.long.byte 0x8 16.--23. 1. " DI1_COMPONENT_SIZE_2 ,DI1 component Size" bitfld.long 0x8 14.--15. " DI1_CST_2 ,DI1 Chip Select pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 12.--13. " DI1_PT_6_2 ,DI1 PIN_17 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " textline " " bitfld.long 0x8 10.--11. " DI1_PT_5_2 ,DI1 PIN_16 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 8.--9. " DI1_PT_4_2 ,DI1 PIN_15 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 6.--7. " DI1_PT_3_2 ,DI1 PIN_14 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 4.--5. " DI1_PT_2_2 ,DI1 PIN_13 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " textline " " bitfld.long 0x8 2.--3. " DI1_PT_1_2 ,DI1 PIN_12 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI1_PT_0_2 ,DI1 PIN_11 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " line.long 0xC "DI1_DW_GEN_3 ,DI1 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI1_ACCESS_SIZE_3 ,DI1 Access Size 3 " hexmask.long.byte 0xC 16.--23. 1. " DI1_COMPONENT_SIZE_3 ,DI1 component Size" bitfld.long 0xC 14.--15. " DI1_CST_3 ,DI1 Chip Select pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 12.--13. " DI1_PT_6_3 ,DI1 PIN_17 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " textline " " bitfld.long 0xC 10.--11. " DI1_PT_5_3 ,DI1 PIN_16 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 8.--9. " DI1_PT_4_3 ,DI1 PIN_15 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 6.--7. " DI1_PT_3_3 ,DI1 PIN_14 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 4.--5. " DI1_PT_2_3 ,DI1 PIN_13 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " textline " " bitfld.long 0xC 2.--3. " DI1_PT_1_3 ,DI1 PIN_12 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI1_PT_0_3 ,DI1 PIN_11 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " line.long 0x10 "DI1_DW_GEN_4 ,DI1 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI1_ACCESS_SIZE_4 ,DI1 Access Size 4 " hexmask.long.byte 0x10 16.--23. 1. " DI1_COMPONENT_SIZE_4 ,DI1 component Size" bitfld.long 0x10 14.--15. " DI1_CST_4 ,DI1 Chip Select pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 12.--13. " DI1_PT_6_4 ,DI1 PIN_17 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " textline " " bitfld.long 0x10 10.--11. " DI1_PT_5_4 ,DI1 PIN_16 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 8.--9. " DI1_PT_4_4 ,DI1 PIN_15 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 6.--7. " DI1_PT_3_4 ,DI1 PIN_14 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 4.--5. " DI1_PT_2_4 ,DI1 PIN_13 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " textline " " bitfld.long 0x10 2.--3. " DI1_PT_1_4 ,DI1 PIN_12 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI1_PT_0_4 ,DI1 PIN_11 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " line.long 0x14 "DI1_DW_GEN_5 ,DI1 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI1_ACCESS_SIZE_5 ,DI1 Access Size 5 " hexmask.long.byte 0x14 16.--23. 1. " DI1_COMPONENT_SIZE_5 ,DI1 component Size" bitfld.long 0x14 14.--15. " DI1_CST_5 ,DI1 Chip Select pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 12.--13. " DI1_PT_6_5 ,DI1 PIN_17 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " textline " " bitfld.long 0x14 10.--11. " DI1_PT_5_5 ,DI1 PIN_16 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 8.--9. " DI1_PT_4_5 ,DI1 PIN_15 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 6.--7. " DI1_PT_3_5 ,DI1 PIN_14 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 4.--5. " DI1_PT_2_5 ,DI1 PIN_13 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " textline " " bitfld.long 0x14 2.--3. " DI1_PT_1_5 ,DI1 PIN_12 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI1_PT_0_5 ,DI1 PIN_11 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " line.long 0x18 "DI1_DW_GEN_6 ,DI1 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI1_ACCESS_SIZE_6 ,DI1 Access Size 6 " hexmask.long.byte 0x18 16.--23. 1. " DI1_COMPONENT_SIZE_6 ,DI1 component Size" bitfld.long 0x18 14.--15. " DI1_CST_6 ,DI1 Chip Select pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 12.--13. " DI1_PT_6_6 ,DI1 PIN_17 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " textline " " bitfld.long 0x18 10.--11. " DI1_PT_5_6 ,DI1 PIN_16 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 8.--9. " DI1_PT_4_6 ,DI1 PIN_15 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 6.--7. " DI1_PT_3_6 ,DI1 PIN_14 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 4.--5. " DI1_PT_2_6 ,DI1 PIN_13 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " textline " " bitfld.long 0x18 2.--3. " DI1_PT_1_6 ,DI1 PIN_12 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI1_PT_0_6 ,DI1 PIN_11 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " line.long 0x1C "DI1_DW_GEN_7 ,DI1 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI1_ACCESS_SIZE_7 ,DI1 Access Size 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI1_COMPONENT_SIZE_7 ,DI1 component Size" bitfld.long 0x1C 14.--15. " DI1_CST_7 ,DI1 Chip Select pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 12.--13. " DI1_PT_6_7 ,DI1 PIN_17 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " textline " " bitfld.long 0x1C 10.--11. " DI1_PT_5_7 ,DI1 PIN_16 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 8.--9. " DI1_PT_4_7 ,DI1 PIN_15 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 6.--7. " DI1_PT_3_7 ,DI1 PIN_14 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 4.--5. " DI1_PT_2_7 ,DI1 PIN_13 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " textline " " bitfld.long 0x1C 2.--3. " DI1_PT_1_7 ,DI1 PIN_12 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI1_PT_0_7 ,DI1 PIN_11 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " line.long 0x20 "DI1_DW_GEN_8 ,DI1 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI1_ACCESS_SIZE_8 ,DI1 Access Size 8 " hexmask.long.byte 0x20 16.--23. 1. " DI1_COMPONENT_SIZE_8 ,DI1 component Size" bitfld.long 0x20 14.--15. " DI1_CST_8 ,DI1 Chip Select pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 12.--13. " DI1_PT_6_8 ,DI1 PIN_17 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " textline " " bitfld.long 0x20 10.--11. " DI1_PT_5_8 ,DI1 PIN_16 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 8.--9. " DI1_PT_4_8 ,DI1 PIN_15 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 6.--7. " DI1_PT_3_8 ,DI1 PIN_14 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 4.--5. " DI1_PT_2_8 ,DI1 PIN_13 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " textline " " bitfld.long 0x20 2.--3. " DI1_PT_1_8 ,DI1 PIN_12 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI1_PT_0_8 ,DI1 PIN_11 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " line.long 0x24 "DI1_DW_GEN_9 ,DI1 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI1_ACCESS_SIZE_9 ,DI1 Access Size 9 " hexmask.long.byte 0x24 16.--23. 1. " DI1_COMPONENT_SIZE_9 ,DI1 component Size" bitfld.long 0x24 14.--15. " DI1_CST_9 ,DI1 Chip Select pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 12.--13. " DI1_PT_6_9 ,DI1 PIN_17 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " textline " " bitfld.long 0x24 10.--11. " DI1_PT_5_9 ,DI1 PIN_16 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 8.--9. " DI1_PT_4_9 ,DI1 PIN_15 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 6.--7. " DI1_PT_3_9 ,DI1 PIN_14 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 4.--5. " DI1_PT_2_9 ,DI1 PIN_13 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " textline " " bitfld.long 0x24 2.--3. " DI1_PT_1_9 ,DI1 PIN_12 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI1_PT_0_9 ,DI1 PIN_11 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " line.long 0x28 "DI1_DW_GEN_10,DI1 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI1_ACCESS_SIZE_10 ,DI1 Access Size 10" hexmask.long.byte 0x28 16.--23. 1. " DI1_COMPONENT_SIZE_10 ,DI1 component Size" bitfld.long 0x28 14.--15. " DI1_CST_10 ,DI1 Chip Select pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 12.--13. " DI1_PT_6_10 ,DI1 PIN_17 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" textline " " bitfld.long 0x28 10.--11. " DI1_PT_5_10 ,DI1 PIN_16 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 8.--9. " DI1_PT_4_10 ,DI1 PIN_15 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 6.--7. " DI1_PT_3_10 ,DI1 PIN_14 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 4.--5. " DI1_PT_2_10 ,DI1 PIN_13 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" textline " " bitfld.long 0x28 2.--3. " DI1_PT_1_10 ,DI1 PIN_12 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 0.--1. " DI1_PT_0_10 ,DI1 PIN_11 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" line.long 0x2C "DI1_DW_GEN_11,DI1 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI1_ACCESS_SIZE_11 ,DI1 Access Size 11" hexmask.long.byte 0x2C 16.--23. 1. " DI1_COMPONENT_SIZE_11 ,DI1 component Size" bitfld.long 0x2C 14.--15. " DI1_CST_11 ,DI1 Chip Select pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 12.--13. " DI1_PT_6_11 ,DI1 PIN_17 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" textline " " bitfld.long 0x2C 10.--11. " DI1_PT_5_11 ,DI1 PIN_16 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 8.--9. " DI1_PT_4_11 ,DI1 PIN_15 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 6.--7. " DI1_PT_3_11 ,DI1 PIN_14 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 4.--5. " DI1_PT_2_11 ,DI1 PIN_13 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" textline " " bitfld.long 0x2C 2.--3. " DI1_PT_1_11 ,DI1 PIN_12 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI1_PT_0_11 ,DI1 PIN_11 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" tree.end textline " " group.long 0x88++0xeb line.long 0x0 "DI1_DW_SET0_0 ,DI1 Data Wave Set 0 0 Registers" hexmask.long.word 0x0 16.--24. 1. " DI1_DATA_CNT_DOWN0_0 ,Waveform's falling edge position" hexmask.long.word 0x0 0.--8. 1. " DI1_DATA_CNT_UP0_0 ,Waveform's rising edge position" line.long 0x4 "DI1_DW_SET0_1 ,DI1 Data Wave Set 0 1 Registers" hexmask.long.word 0x4 16.--24. 1. " DI1_DATA_CNT_DOWN0_1 ,Waveform's falling edge position" hexmask.long.word 0x4 0.--8. 1. " DI1_DATA_CNT_UP0_1 ,Waveform's rising edge position" line.long 0x8 "DI1_DW_SET0_2 ,DI1 Data Wave Set 0 2 Registers" hexmask.long.word 0x8 16.--24. 1. " DI1_DATA_CNT_DOWN0_2 ,Waveform's falling edge position" hexmask.long.word 0x8 0.--8. 1. " DI1_DATA_CNT_UP0_2 ,Waveform's rising edge position" line.long 0xC "DI1_DW_SET0_3 ,DI1 Data Wave Set 0 3 Registers" hexmask.long.word 0xC 16.--24. 1. " DI1_DATA_CNT_DOWN0_3 ,Waveform's falling edge position" hexmask.long.word 0xC 0.--8. 1. " DI1_DATA_CNT_UP0_3 ,Waveform's rising edge position" line.long 0x10 "DI1_DW_SET0_4 ,DI1 Data Wave Set 0 4 Registers" hexmask.long.word 0x10 16.--24. 1. " DI1_DATA_CNT_DOWN0_4 ,Waveform's falling edge position" hexmask.long.word 0x10 0.--8. 1. " DI1_DATA_CNT_UP0_4 ,Waveform's rising edge position" line.long 0x14 "DI1_DW_SET0_5 ,DI1 Data Wave Set 0 5 Registers" hexmask.long.word 0x14 16.--24. 1. " DI1_DATA_CNT_DOWN0_5 ,Waveform's falling edge position" hexmask.long.word 0x14 0.--8. 1. " DI1_DATA_CNT_UP0_5 ,Waveform's rising edge position" line.long 0x18 "DI1_DW_SET0_6 ,DI1 Data Wave Set 0 6 Registers" hexmask.long.word 0x18 16.--24. 1. " DI1_DATA_CNT_DOWN0_6 ,Waveform's falling edge position" hexmask.long.word 0x18 0.--8. 1. " DI1_DATA_CNT_UP0_6 ,Waveform's rising edge position" line.long 0x1C "DI1_DW_SET0_7 ,DI1 Data Wave Set 0 7 Registers" hexmask.long.word 0x1C 16.--24. 1. " DI1_DATA_CNT_DOWN0_7 ,Waveform's falling edge position" hexmask.long.word 0x1C 0.--8. 1. " DI1_DATA_CNT_UP0_7 ,Waveform's rising edge position" line.long 0x20 "DI1_DW_SET0_8 ,DI1 Data Wave Set 0 8 Registers" hexmask.long.word 0x20 16.--24. 1. " DI1_DATA_CNT_DOWN0_8 ,Waveform's falling edge position" hexmask.long.word 0x20 0.--8. 1. " DI1_DATA_CNT_UP0_8 ,Waveform's rising edge position" line.long 0x24 "DI1_DW_SET0_9 ,DI1 Data Wave Set 0 9 Registers" hexmask.long.word 0x24 16.--24. 1. " DI1_DATA_CNT_DOWN0_9 ,Waveform's falling edge position" hexmask.long.word 0x24 0.--8. 1. " DI1_DATA_CNT_UP0_9 ,Waveform's rising edge position" line.long 0x28 "DI1_DW_SET0_10,DI1 Data Wave Set 0 10 Registers" hexmask.long.word 0x28 16.--24. 1. " DI1_DATA_CNT_DOWN0_10 ,Waveform's falling edge position" hexmask.long.word 0x28 0.--8. 1. " DI1_DATA_CNT_UP0_10 ,Waveform's rising edge position" line.long 0x2C "DI1_DW_SET0_11,DI1 Data Wave Set 0 11 Registers" hexmask.long.word 0x2C 16.--24. 1. " DI1_DATA_CNT_DOWN0_11 ,Waveform's falling edge position" hexmask.long.word 0x2C 0.--8. 1. " DI1_DATA_CNT_UP0_11 ,Waveform's rising edge position" line.long 0x30 "DI1_DW_SET1_0 ,DI1 Data Wave Set 1 0 Registers" hexmask.long.word 0x30 16.--24. 1. " DI1_DATA_CNT_DOWN1_0 ,Waveform's falling edge position" hexmask.long.word 0x30 0.--8. 1. " DI1_DATA_CNT_UP1_0 ,Waveform's rising edge position" line.long 0x34 "DI1_DW_SET1_1 ,DI1 Data Wave Set 1 1 Registers" hexmask.long.word 0x34 16.--24. 1. " DI1_DATA_CNT_DOWN1_1 ,Waveform's falling edge position" hexmask.long.word 0x34 0.--8. 1. " DI1_DATA_CNT_UP1_1 ,Waveform's rising edge position" line.long 0x38 "DI1_DW_SET1_2 ,DI1 Data Wave Set 1 2 Registers" hexmask.long.word 0x38 16.--24. 1. " DI1_DATA_CNT_DOWN1_2 ,Waveform's falling edge position" hexmask.long.word 0x38 0.--8. 1. " DI1_DATA_CNT_UP1_2 ,Waveform's rising edge position" line.long 0x3C "DI1_DW_SET1_3 ,DI1 Data Wave Set 1 3 Registers" hexmask.long.word 0x3C 16.--24. 1. " DI1_DATA_CNT_DOWN1_3 ,Waveform's falling edge position" hexmask.long.word 0x3C 0.--8. 1. " DI1_DATA_CNT_UP1_3 ,Waveform's rising edge position" line.long 0x40 "DI1_DW_SET1_4 ,DI1 Data Wave Set 1 4 Registers" hexmask.long.word 0x40 16.--24. 1. " DI1_DATA_CNT_DOWN1_4 ,Waveform's falling edge position" hexmask.long.word 0x40 0.--8. 1. " DI1_DATA_CNT_UP1_4 ,Waveform's rising edge position" line.long 0x44 "DI1_DW_SET1_5 ,DI1 Data Wave Set 1 5 Registers" hexmask.long.word 0x44 16.--24. 1. " DI1_DATA_CNT_DOWN1_5 ,Waveform's falling edge position" hexmask.long.word 0x44 0.--8. 1. " DI1_DATA_CNT_UP1_5 ,Waveform's rising edge position" line.long 0x48 "DI1_DW_SET1_6 ,DI1 Data Wave Set 1 6 Registers" hexmask.long.word 0x48 16.--24. 1. " DI1_DATA_CNT_DOWN1_6 ,Waveform's falling edge position" hexmask.long.word 0x48 0.--8. 1. " DI1_DATA_CNT_UP1_6 ,Waveform's rising edge position" line.long 0x4C "DI1_DW_SET1_7 ,DI1 Data Wave Set 1 7 Registers" hexmask.long.word 0x4C 16.--24. 1. " DI1_DATA_CNT_DOWN1_7 ,Waveform's falling edge position" hexmask.long.word 0x4C 0.--8. 1. " DI1_DATA_CNT_UP1_7 ,Waveform's rising edge position" line.long 0x50 "DI1_DW_SET1_8 ,DI1 Data Wave Set 1 8 Registers" hexmask.long.word 0x50 16.--24. 1. " DI1_DATA_CNT_DOWN1_8 ,Waveform's falling edge position" hexmask.long.word 0x50 0.--8. 1. " DI1_DATA_CNT_UP1_8 ,Waveform's rising edge position" line.long 0x54 "DI1_DW_SET1_9 ,DI1 Data Wave Set 1 9 Registers" hexmask.long.word 0x54 16.--24. 1. " DI1_DATA_CNT_DOWN1_9 ,Waveform's falling edge position" hexmask.long.word 0x54 0.--8. 1. " DI1_DATA_CNT_UP1_9 ,Waveform's rising edge position" line.long 0x58 "DI1_DW_SET1_10,DI1 Data Wave Set 1 10 Registers" hexmask.long.word 0x58 16.--24. 1. " DI1_DATA_CNT_DOWN1_10 ,Waveform's falling edge position" hexmask.long.word 0x58 0.--8. 1. " DI1_DATA_CNT_UP1_10 ,Waveform's rising edge position" line.long 0x5C "DI1_DW_SET1_11,DI1 Data Wave Set 1 11 Registers" hexmask.long.word 0x5C 16.--24. 1. " DI1_DATA_CNT_DOWN1_11 ,Waveform's falling edge position" hexmask.long.word 0x5C 0.--8. 1. " DI1_DATA_CNT_UP1_11 ,Waveform's rising edge position" line.long 0x60 "DI1_DW_SET2_0 ,DI1 Data Wave Set 2 0 Registers" hexmask.long.word 0x60 16.--24. 1. " DI1_DATA_CNT_DOWN2_0 ,Waveform's falling edge position" hexmask.long.word 0x60 0.--8. 1. " DI1_DATA_CNT_UP2_0 ,Waveform's rising edge position" line.long 0x64 "DI1_DW_SET2_1 ,DI1 Data Wave Set 2 1 Registers" hexmask.long.word 0x64 16.--24. 1. " DI1_DATA_CNT_DOWN2_1 ,Waveform's falling edge position" hexmask.long.word 0x64 0.--8. 1. " DI1_DATA_CNT_UP2_1 ,Waveform's rising edge position" line.long 0x68 "DI1_DW_SET2_2 ,DI1 Data Wave Set 2 2 Registers" hexmask.long.word 0x68 16.--24. 1. " DI1_DATA_CNT_DOWN2_2 ,Waveform's falling edge position" hexmask.long.word 0x68 0.--8. 1. " DI1_DATA_CNT_UP2_2 ,Waveform's rising edge position" line.long 0x6C "DI1_DW_SET2_3 ,DI1 Data Wave Set 2 3 Registers" hexmask.long.word 0x6C 16.--24. 1. " DI1_DATA_CNT_DOWN2_3 ,Waveform's falling edge position" hexmask.long.word 0x6C 0.--8. 1. " DI1_DATA_CNT_UP2_3 ,Waveform's rising edge position" line.long 0x70 "DI1_DW_SET2_4 ,DI1 Data Wave Set 2 4 Registers" hexmask.long.word 0x70 16.--24. 1. " DI1_DATA_CNT_DOWN2_4 ,Waveform's falling edge position" hexmask.long.word 0x70 0.--8. 1. " DI1_DATA_CNT_UP2_4 ,Waveform's rising edge position" line.long 0x74 "DI1_DW_SET2_5 ,DI1 Data Wave Set 2 5 Registers" hexmask.long.word 0x74 16.--24. 1. " DI1_DATA_CNT_DOWN2_5 ,Waveform's falling edge position" hexmask.long.word 0x74 0.--8. 1. " DI1_DATA_CNT_UP2_5 ,Waveform's rising edge position" line.long 0x78 "DI1_DW_SET2_6 ,DI1 Data Wave Set 2 6 Registers" hexmask.long.word 0x78 16.--24. 1. " DI1_DATA_CNT_DOWN2_6 ,Waveform's falling edge position" hexmask.long.word 0x78 0.--8. 1. " DI1_DATA_CNT_UP2_6 ,Waveform's rising edge position" line.long 0x7C "DI1_DW_SET2_7 ,DI1 Data Wave Set 2 7 Registers" hexmask.long.word 0x7C 16.--24. 1. " DI1_DATA_CNT_DOWN2_7 ,Waveform's falling edge position" hexmask.long.word 0x7C 0.--8. 1. " DI1_DATA_CNT_UP2_7 ,Waveform's rising edge position" line.long 0x80 "DI1_DW_SET2_8 ,DI1 Data Wave Set 2 8 Registers" hexmask.long.word 0x80 16.--24. 1. " DI1_DATA_CNT_DOWN2_8 ,Waveform's falling edge position" hexmask.long.word 0x80 0.--8. 1. " DI1_DATA_CNT_UP2_8 ,Waveform's rising edge position" line.long 0x84 "DI1_DW_SET2_9 ,DI1 Data Wave Set 2 9 Registers" hexmask.long.word 0x84 16.--24. 1. " DI1_DATA_CNT_DOWN2_9 ,Waveform's falling edge position" hexmask.long.word 0x84 0.--8. 1. " DI1_DATA_CNT_UP2_9 ,Waveform's rising edge position" line.long 0x88 "DI1_DW_SET2_10,DI1 Data Wave Set 2 10 Registers" hexmask.long.word 0x88 16.--24. 1. " DI1_DATA_CNT_DOWN2_10 ,Waveform's falling edge position" hexmask.long.word 0x88 0.--8. 1. " DI1_DATA_CNT_UP2_10 ,Waveform's rising edge position" line.long 0x8C "DI1_DW_SET2_11,DI1 Data Wave Set 2 11 Registers" hexmask.long.word 0x8C 16.--24. 1. " DI1_DATA_CNT_DOWN2_11 ,Waveform's falling edge position" hexmask.long.word 0x8C 0.--8. 1. " DI1_DATA_CNT_UP2_11 ,Waveform's rising edge position" line.long 0x90 "DI1_DW_SET3_0 ,DI1 Data Wave Set 3 0 Registers" hexmask.long.word 0x90 16.--24. 1. " DI1_DATA_CNT_DOWN3_0 ,Waveform's falling edge position" hexmask.long.word 0x90 0.--8. 1. " DI1_DATA_CNT_UP3_0 ,Waveform's rising edge position" line.long 0x94 "DI1_DW_SET3_1 ,DI1 Data Wave Set 3 1 Registers" hexmask.long.word 0x94 16.--24. 1. " DI1_DATA_CNT_DOWN3_1 ,Waveform's falling edge position" hexmask.long.word 0x94 0.--8. 1. " DI1_DATA_CNT_UP3_1 ,Waveform's rising edge position" line.long 0x98 "DI1_DW_SET3_2 ,DI1 Data Wave Set 3 2 Registers" hexmask.long.word 0x98 16.--24. 1. " DI1_DATA_CNT_DOWN3_2 ,Waveform's falling edge position" hexmask.long.word 0x98 0.--8. 1. " DI1_DATA_CNT_UP3_2 ,Waveform's rising edge position" line.long 0x9C "DI1_DW_SET3_3 ,DI1 Data Wave Set 3 3 Registers" hexmask.long.word 0x9C 16.--24. 1. " DI1_DATA_CNT_DOWN3_3 ,Waveform's falling edge position" hexmask.long.word 0x9C 0.--8. 1. " DI1_DATA_CNT_UP3_3 ,Waveform's rising edge position" line.long 0xA0 "DI1_DW_SET3_4 ,DI1 Data Wave Set 3 4 Registers" hexmask.long.word 0xA0 16.--24. 1. " DI1_DATA_CNT_DOWN3_4 ,Waveform's falling edge position" hexmask.long.word 0xA0 0.--8. 1. " DI1_DATA_CNT_UP3_4 ,Waveform's rising edge position" line.long 0xA4 "DI1_DW_SET3_5 ,DI1 Data Wave Set 3 5 Registers" hexmask.long.word 0xA4 16.--24. 1. " DI1_DATA_CNT_DOWN3_5 ,Waveform's falling edge position" hexmask.long.word 0xA4 0.--8. 1. " DI1_DATA_CNT_UP3_5 ,Waveform's rising edge position" line.long 0xA8 "DI1_DW_SET3_6 ,DI1 Data Wave Set 3 6 Registers" hexmask.long.word 0xA8 16.--24. 1. " DI1_DATA_CNT_DOWN3_6 ,Waveform's falling edge position" hexmask.long.word 0xA8 0.--8. 1. " DI1_DATA_CNT_UP3_6 ,Waveform's rising edge position" line.long 0xAC "DI1_DW_SET3_7 ,DI1 Data Wave Set 3 7 Registers" hexmask.long.word 0xAC 16.--24. 1. " DI1_DATA_CNT_DOWN3_7 ,Waveform's falling edge position" hexmask.long.word 0xAC 0.--8. 1. " DI1_DATA_CNT_UP3_7 ,Waveform's rising edge position" line.long 0xB0 "DI1_DW_SET3_8 ,DI1 Data Wave Set 3 8 Registers" hexmask.long.word 0xB0 16.--24. 1. " DI1_DATA_CNT_DOWN3_8 ,Waveform's falling edge position" hexmask.long.word 0xB0 0.--8. 1. " DI1_DATA_CNT_UP3_8 ,Waveform's rising edge position" line.long 0xB4 "DI1_DW_SET3_9 ,DI1 Data Wave Set 3 9 Registers" hexmask.long.word 0xB4 16.--24. 1. " DI1_DATA_CNT_DOWN3_9 ,Waveform's falling edge position" hexmask.long.word 0xB4 0.--8. 1. " DI1_DATA_CNT_UP3_9 ,Waveform's rising edge position" line.long 0xB8 "DI1_DW_SET3_10,DI1 Data Wave Set 3 10 Registers" hexmask.long.word 0xB8 16.--24. 1. " DI1_DATA_CNT_DOWN3_10 ,Waveform's falling edge position" hexmask.long.word 0xB8 0.--8. 1. " DI1_DATA_CNT_UP3_10 ,Waveform's rising edge position" line.long 0xBC "DI1_DW_SET3_11,DI1 Data Wave Set 3 11 Registers" hexmask.long.word 0xBC 16.--24. 1. " DI1_DATA_CNT_DOWN3_11 ,Waveform's falling edge position" hexmask.long.word 0xBC 0.--8. 1. " DI1_DATA_CNT_UP3_11 ,Waveform's rising edge position" line.long 0xC0 "DI1_STP_REP_1,DI1 Step Repeat 1 Registers" hexmask.long.word 0xC0 16.--27. 1. " DI1_STEP_REPEAT_1 ,Step Repeat 1" hexmask.long.word 0xC0 0.--11. 1. " DI1_STEP_REPEAT_0 ,Step Repeat 0" line.long 0xC4 "DI1_STP_REP_2,DI1 Step Repeat 2 Registers" hexmask.long.word 0xC4 16.--27. 1. " DI1_STEP_REPEAT_3 ,Step Repeat 3" hexmask.long.word 0xC4 0.--11. 1. " DI1_STEP_REPEAT_2 ,Step Repeat 2" line.long 0xC8 "DI1_STP_REP_3,DI1 Step Repeat 3 Registers" hexmask.long.word 0xC8 16.--27. 1. " DI1_STEP_REPEAT_5 ,Step Repeat 5" hexmask.long.word 0xC8 0.--11. 1. " DI1_STEP_REPEAT_4 ,Step Repeat 4" line.long 0xCC "DI1_STP_REP_4,DI1 Step Repeat 4 Registers" hexmask.long.word 0xCC 16.--27. 1. " DI1_STEP_REPEAT_7 ,Step Repeat 7" hexmask.long.word 0xCC 0.--11. 1. " DI1_STEP_REPEAT_6 ,Step Repeat 6" line.long 0xd0 "DI1_STP_REP_9,DI1 Step Repeat 9 Registers" hexmask.long.word 0xd0 0.--11. 1. " DI1_STEP_REPEAT_9 ,Step Repeat 9" line.long 0xd4 "DI1_SER_CONF,DI1 Serial Display Control Register" bitfld.long 0xd4 28.--31. " DI1_SERIAL_LLA_PNTR_RS_R_1 ,RS 3 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 24.--27. " DI1_SERIAL_LLA_PNTR_RS_R_0 ,RS 2 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 20.--23. " DI1_SERIAL_LLA_PNTR_RS_W_1 ,RS 1 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." textline " " bitfld.long 0xd4 16.--19. " DI1_SERIAL_LLA_PNTR_RS_W_0 ,RS 0 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0xd4 8.--15. 1. " DI1_SERIAL_LATCH ,DI1 Serial Latch" bitfld.long 0xd4 5. " DI1_LLA_SER_ACCESS ,Direct Low Level Access to Serial display" "Disabled,Enabled" textline " " bitfld.long 0xd4 4. " DI1_SER_CLK_POLARITY ,Serial Clock Polarity" "Not inverted,Inverted" bitfld.long 0xd4 3. " DI1_SERIAL_DATA_POLARITY ,Serial Data Polarity" "Not inverted,Inverted" bitfld.long 0xd4 2. " DI1_SERIAL_RS_POLARITY ,Serial RS Polarity" "Not inverted,Inverted" textline " " bitfld.long 0xd4 1. " DI1_SERIAL_CS_POLARITY ,Serial Chip Select Polarity" "Not inverted,Inverted" bitfld.long 0xd4 0. " DI1_WAIT4SERIAL ,Wait for Serial" "Not wait,Wait" line.long 0xd8 "DI1_SSC,DI1 Special Signals Control Register" bitfld.long 0xd8 23. " DI1_PIN17_ERM ,DI1 PIN17 error recovery mode" "No error,Error" bitfld.long 0xd8 22. " DI1_PIN16_ERM ,DI1 PIN16 error recovery mode" "No error,Error" bitfld.long 0xd8 21. " DI1_PIN15_ERM ,DI1 PIN15 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 20. " DI1_PIN14_ERM ,DI1 PIN14 error recovery mode" "No error,Error" bitfld.long 0xd8 19. " DI1_PIN13_ERM ,DI1 PIN13 error recovery mode" "No error,Error" bitfld.long 0xd8 18. " DI1_PIN12_ERM ,DI1 PIN12 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 17. " DI1_PIN11_ERM ,DI1 PIN11 error recovery mode" "No error,Error" bitfld.long 0xd8 16. " DI1_CS_ERM ,DI1 CS error recovery mode" "No error,Error" bitfld.long 0xd8 5. " DI1_WAIT_ON ,Wait On" "Continued,Held" textline " " bitfld.long 0xd8 4. " DI1_BYTE_EN_POLARITY ,Byte Enable polarity" "Active low,Active high" textline " " bitfld.long 0xd8 3. " DI1_BYTE_EN_RD_IN ,Byte Enable Read In" "R/W [17:16],W [17:16]/R [19:18]" bitfld.long 0xd8 0.--2. " DI1_BYTE_EN_PNTR ,Byte Enable Pointer" "Pin_11,Pin_12,Pin_13,Pin_14,Pin_15,Pin_16,Pin_17,CS pin" line.long 0xdc "DI1_POL,DI1 Polarity Register" bitfld.long 0xdc 26. " DI1_WAIT_POLARITY ,WAIT polarity" "Active low,Active high" bitfld.long 0xdc 25. " DI1_CS1_BYTE_EN_POLARITY ,Byte Enable associated with CS1 polarity" "Active low,Active high" bitfld.long 0xdc 24. " DI1_CS0_BYTE_EN_POLARITY ,Byte Enable associated with CS0 polarity" "Active low,Active high" textline " " bitfld.long 0xdc 23. " DI1_CS1_DATA_POLARITY ,Data Polarity associated with CS1" "Active low,Active high" bitfld.long 0xdc 22. " DI1_CS1_POLARITY_17 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 21. " DI1_CS1_POLARITY_16 ,DI1 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 20. " DI1_CS1_POLARITY_15 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 19. " DI1_CS1_POLARITY_14 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 18. " DI1_CS1_POLARITY_13 ,DI1 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 17. " DI1_CS1_POLARITY_12 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 16. " DI1_CS1_POLARITY_11 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 15. " DI1_CS0_DATA_POLARITY ,Data Polarity associated with CS0" "Active low,Active high" textline " " bitfld.long 0xdc 14. " DI1_CS0_POLARITY_17 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 13. " DI1_CS0_POLARITY_16 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 12. " DI1_CS0_POLARITY_15 ,DI1 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 11. " DI1_CS0_POLARITY_14 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 10. " DI1_CS0_POLARITY_13 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 9. " DI1_CS0_POLARITY_12 ,DI1 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 8. " DI1_CS0_POLARITY_11 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 7. " DI1_DRDY_DATA_POLARITY ,Data Polarity associated with DRDY" "Active low,Active high" bitfld.long 0xdc 6. " DI1_DRDY_POLARITY_17 ,DI1 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 5. " DI1_DRDY_POLARITY_16 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 4. " DI1_DRDY_POLARITY_15 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 3. " DI1_DRDY_POLARITY_14 ,DI1 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 2. " DI1_DRDY_POLARITY_13 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 1. " DI1_DRDY_POLARITY_12 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 0. " DI1_DRDY_POLARITY_11 ,DI1 output pin's polarity for DRDY" "Active low,Active high" line.long 0xe0 "DI1_AW0,DI1 Active Window 0 Register" bitfld.long 0xe0 28.--31. " DI1_AW_TRIG_SEL ,Selects the trigger for sending data during the display's active window" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on,?..." hexmask.long.word 0xe0 16.--27. 1. " DI1_AW_HEND ,Horizontal end of the active window" bitfld.long 0xe0 12.--15. " DI1_AW_HCOUNT_SEL ,Selects the counter that counts the horizontal position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." textline " " hexmask.long.word 0xe0 0.--11. 1. " DI1_AW_HSTART ,Horizontal start of the active window" line.long 0xe4 "DI1_AW1,DI1 Active Window 1 Register" hexmask.long.word 0xe4 16.--27. 1. " DI1_AW_VEND ,Vertical end of the active window" bitfld.long 0xe4 12.--15. " DI1_AW_VCOUNT_SEL ,Selects the counter that counts the vertical position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." hexmask.long.word 0xe4 0.--11. 1. " DI1_AW_VSTART ,Vertical start of the active window" line.long 0xe8 "DI1_SCR_CONF,DI1 Screen Configuration Register" hexmask.long.word 0xe8 0.--11. 1. " DI1_SCREEN_HEIGHT ,Number of display rows" rgroup.long 0x174++0x03 line.long 0x00 "DI1_STAT,DI1 Status Register" bitfld.long 0x00 3. " DI1_CNTR_FIFO_FULL ,DI1_CNTR_FIFO_FULL" "Not full,Full" bitfld.long 0x00 2. " DI1_CNTR_FIFO_EMPTY ,DI1_CNTR_FIFO_EMPTY" "Not empty,Empty" bitfld.long 0x00 1. " DI1_READ_FIFO_FULL ,DI1_READ_FIFO_FULL" "Not full,Full" textline " " bitfld.long 0x00 0. " DI1_READ_FIFO_EMPTY ,DI1_READ_FIFO_EMPTY" "Not empty,Empty" width 0x0B tree.end tree "SMFC registers" base ad:0x02650000 width 17. group.long 0x00++0x57 line.long 0x00 "SMFC_MAP,SMFC Mapping Register" bitfld.long 0x00 9.--11. " MAP_CH3 ,DMASMFC channel 3 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" bitfld.long 0x00 6.--8. " MAP_CH2 ,DMASMFC channel 2 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" textline " " bitfld.long 0x00 3.--5. " MAP_CH1 ,DMASMFC channel 1 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" bitfld.long 0x00 0.--2. " MAP_CH0 ,DMASMFC channel 0 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" line.long 0x04 "SMFC_WMC,SMFC Water Mark Control Register" bitfld.long 0x04 25.--27. " WM3_CLR ,Watermark 'clear' level of DMASMFC channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 22.--24. " WM3_SET ,Watermark 'set' level of DMASMFC channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 19.--21. " WM2_CLR ,Watermark 'clear' level of DMASMFC channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 16.--18. " WM2_SET ,Watermark 'set' level of DMASMFC channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 9.--11. " WM1_CLR ,Watermark 'clear' level of DMASMFC channel 1" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 6.--8. " WM1_SET ,Watermark 'set' level of DMASMFC channel 1" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 3.--5. " WM0_CLR ,Watermark 'clear' level of DMASMFC channel 0" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 0.--2. " WM0_SET ,Watermark 'set' level of DMASMFC channel 0" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" line.long 0x08 "SMFC_BS,SMFC Burst Size Register" bitfld.long 0x08 12.--15. " BURST3_SIZE ,Burst Size of SMFCDMA channel 3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " BURST2_SIZE ,Burst Size of SMFCDMA channel 2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x08 4.--7. " BURST1_SIZE ,Burst Size of SMFCDMA channel 1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 0.--3. " BURST0_SIZE ,Burst Size of SMFCDMA channel 0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" width 0xb tree.end tree "DC registers" base ad:0x02658000 width 18. tree "Channel 0" group.long 0x00++0x1b line.long 0x00 "DC_READ_CH_CONF,DC Read Channel Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TIME_OUT_VALUE ,Time out value" bitfld.long 0x00 11. " CS_ID_3 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 10. " CS_ID_2 ,Maps an asynchronous display to a chip select" "CS0,CS1" textline " " bitfld.long 0x00 9. " CS_ID_1 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 8. " CS_ID_0 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 6. " CHAN_MASK_DEFAULT_0 ,Event mask bit for the read channel" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 4.--5. " W_SIZE_0 ,Word Size" "8 bits,16 LSB bits,24 MSB bits,32 bits" bitfld.long 0x00 2.--3. " PROG_DISP_ID_0 ,The field defines which one of the 4 displays can be read" "0,1,2,3" bitfld.long 0x00 1. " PROG_DI_ID_0 ,This bit select the DI which a read transaction can be performed to" "0,1" textline " " bitfld.long 0x00 0. " RD_CHANNEL_EN ,Enables the read channel" "Disabled,Enabled" line.long 0x04 "DC_READ_CH_ADDR,DC Read Channel Start Address Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_0 ,Start address within the display's memory space (Channel 0)" line.long 0x08 "DC_RL0_CH_0,DC Routine Link Register 0 Channel 0" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_0 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_0 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_0 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_0 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_0,DC Routine Link Register 1 Channel 0" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_0 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_0 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_0 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_0 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_0,DC Routine Link Register 2 Channel 0" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_0 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_0 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_0 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_0 ,Priority of the end-of-line event (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_0,DC Routine Link Register 3 Channel 0" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_0 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_0 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_0 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_0 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_0,DC Routine Link Register 4 Channel 0" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_0 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_0 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 1" group.long 0x1c++0x1b line.long 0x00 "DC_WR_CH_CONF_1,DC Write Channel 1 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_1 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 1 window" bitfld.long 0x00 9. " FIELD_MODE_1 ,Field mode bit for channel #1" "Frame,Field" textline " " bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_1 ,Event mask bit for channel #1" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_1 ,This field define the mode of operation of channel #1" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" textline " " bitfld.long 0x00 3.--4. " PROG_DISP_ID_1 ,The field defines which one of the 4 displays is associated with channel #1" "0,1,2,3" bitfld.long 0x00 2. " PROG_DI_ID_1 ,Select the DI which a transaction associated with channel #1 can be performed to" "0,1" textline " " bitfld.long 0x00 0.--1. " W_SIZE_1 ,Word Size associated with channel #1" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_ADDR_1,DC Write Channel 1 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_1 ,Start address within the display's memory space (Channel 1)" line.long 0x08 "DC_RL0_CH_1,DC Routine Link Register 0 Channel 1" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_1 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_1 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_1 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_1 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_1,DC Routine Link Register 1 Channel 1" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_1 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_1 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_1 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_1 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_1,DC Routine Link Register 2 Channel 1" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_1 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_1 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_1 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_1 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_1,DC Routine Link Register 3 Channel 1" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_1 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_1 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_1 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_1 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_1,DC Routine Link Register 4 Channel 1" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_1 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_1 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 2" group.long 0x38++0x1b line.long 0x00 "DC_WR_CH_CONF_2,DC Write Channel 2 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_2 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 2 window" bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_2 ,Event mask bit for channel #2" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_2 ,Mode of operation of channel #2" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" bitfld.long 0x00 3.--4. " PROG_DISP_ID_2 ,The field defines which one of the 4 displays is associated with channel #2" "0,1,2,3" textline " " bitfld.long 0x00 2. " PROG_DI_ID_2 ,Select the DI which a transaction associated with channel #2 can be performed to" "0,1" bitfld.long 0x00 0.--1. " W_SIZE_2 ,Word Size" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_2,DC Write Channel 2 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_2 ,Start address within the display's memory space (Channel 2)" line.long 0x08 "DC_RL0_CH_2,DC Routine Link Register 0 Channel 2" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_2 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_2 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_2 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_2 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_2,DC Routine Link Register 1 Channel 2" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_2 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_2 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_2 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_2 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_2,DC Routine Link Register 2 Channel 2" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_2 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_2 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_2 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_2 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_2,DC Routine Link Register 3 Channel 2" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_2 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_2 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_2 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_2 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_2,DC Routine Link Register 4 Channel 2" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_2 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_2 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 3" group.long 0x54++0x03 line.long 0x00 "DC_CMD_CH_CONF_3,DC Command Channel 3 Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " COD_CMND_START_CHAN_RS1_3 ,Pointer to the address within the microcode memory (command start event)" hexmask.long.byte 0x00 8.--15. 1. " COD_CMND_START_CHAN_RS0_3 ,Pointer to the address within the microcode memory (command start event)" bitfld.long 0x00 0.--1. " W_SIZE_3 ,Word Size associated with channel #3" "8 bits,16 LSB,24 MSB,32 bits" tree.end tree "Channel 4" group.long 0x58++0x03 line.long 0x00 "DC_CMD_CH_CONF_4,DC Command Channel 4 Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " COD_CMND_START_CHAN_RS1_4 ,Pointer to the address within the microcode memory (command start event)" hexmask.long.byte 0x00 8.--15. 1. " COD_CMND_START_CHAN_RS0_4 ,Pointer to the address within the microcode memory (command start event)" bitfld.long 0x00 0.--1. " W_SIZE_4 ,Word Size associated with channel #4" "8 bits,16 LSB,24 MSB,32 bits" tree.end tree "Channel 5" group.long 0x5c++0x1b line.long 0x00 "DC_WR_CH_CONF_5,DC Write Channel 5 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_5 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 5 window" bitfld.long 0x00 9. " FIELD_MODE_5 ,Field mode bit for channel #5" "Frame,Field" textline " " bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_5 ,Event mask bit for channel #5" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_5 ,Mode of operation of channel #5" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" textline " " bitfld.long 0x00 3.--4. " PROG_DISP_ID_5 ,Defines which one of the 4 displays is associated with channel #5" "0,1,2,3" bitfld.long 0x00 2. " PROG_DI_ID_5 ,Select the DI which a transaction associated with channel #5 can be performed to" "0,1" textline " " bitfld.long 0x00 0.--1. " W_SIZE_5 ,Word Size associated with channel #5" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_5,DC Write Channel 5 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_5 ,Start address within the display's memory space (Channel 5)" line.long 0x08 "DC_RL0_CH_5,DC Routine Link Register 0 Channel 5" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_5 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_5 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_5 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_5 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_5,DC Routine Link Register 1 Channel 5" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_5 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_5 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_5 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_5 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_5,DC Routine Link Register 2 Channel 5" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_5 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_5 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_5 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_5 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_5,DC Routine Link Register 3 Channel 5" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_5 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_5 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_5 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_5 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_5,DC Routine Link Register 4 Channel 5" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_5 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_5 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 6" group.long 0x78++0x1b line.long 0x00 "DC_WR_CH_CONF_6,DC Write Channel 6 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_6 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 6 window" bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_6 ,Event mask bit for channel #6" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_6 ,Mode of operation of channel #6" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" bitfld.long 0x00 3.--4. " PROG_DISP_ID_6 ,Defines which one of the 4 displays is associated with channel #6" "0,1,2,3" textline " " bitfld.long 0x00 2. " PROG_DI_ID_6 ,Select the DI which a transaction associated with channel #6 can be performed to" "0,1" bitfld.long 0x00 0.--1. " W_SIZE_6 ,Word Size associated with channel #6" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_6,DC Write Channel 6 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_6 ,Start address within the display's memory space (Channel 6)" line.long 0x08 "DC_RL0_CH_6,DC Routine Link Register 0 Channel 6" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_6 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_6 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_6 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_6 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_6,DC Routine Link Register 1 Channel 6" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_6 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_6 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_6 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_6 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_6,DC Routine Link Register 2 Channel 6" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_6 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_6 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_6 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_6 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_6,DC Routine Link Register 3 Channel 6" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_6 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_6 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_6 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_6 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_6,DC Routine Link Register 4 Channel 6" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_6 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_6 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 8" group.long 0x94++0x1f line.long 0x00 "DC_WR_CH_CONF1_8,DC Write Channel 8 Configuration 1 Register" bitfld.long 0x00 3.--4. " MCU_DISP_ID_8 ,Defines which one of the 4 displays is associated with channel #8" "0,1,2,3" bitfld.long 0x00 2. " CHAN_MASK_DEFAULT_8 ,Event mask bit for channel #8" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 0.--1. " W_SIZE_8 ,Word Size associated with channel #8" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_CONF2_8,DC Write Channel 8 Configuration 2 Register" hexmask.long 0x04 0.--28. 1. " NEW_ADDR_SPACE_SA_8 ,Base address of the second region accessible on the display" line.long 0x08 "DC_RL1_CH_8,DC Routine Link Register 1 Channel 8" hexmask.long.byte 0x08 24.--31. 1. " COD_NEW_ADDR_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x08 8.--15. 1. " COD_NEW_ADDR_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new address/first region)" bitfld.long 0x08 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_8 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL2_CH_8,DC Routine Link Register 2 Channel 8" hexmask.long.byte 0x0C 24.--31. 1. " COD_NEW_CHAN_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x0C 8.--15. 1. " COD_NEW_CHAN_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new channel/second region)" bitfld.long 0x0C 0.--3. " COD_NEW_CHAN_PRIORITY_CHAN_8 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL3_CH_8,DC Routine Link Register 3 Channel 8" hexmask.long.byte 0x10 24.--31. 1. " COD_NEW_DATA_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x10 8.--15. 1. " COD_NEW_DATA_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new data/first region)" bitfld.long 0x10 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_8 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL4_CH_8,DC Routine Link Register 4 Channel 8" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_ADDR_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x14 8.--15. 1. " OD_NEW_ADDR_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new address/first region)" line.long 0x18 "DC_RL5_CH_8,DC Routine Link Register 5 Channel 8" hexmask.long.byte 0x18 24.--31. 1. " COD_NEW_CHAN_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_CHAN_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new channel/first region)" line.long 0x1c "DC_RL6_CH_8,DC Routine Link Register 6 Channel 8" hexmask.long.byte 0x1C 24.--31. 1. " COD_NEW_DATA_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x1C 8.--15. 1. " COD_NEW_DATA_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new data/first region)" tree.end tree "Channel 9" group.long 0xb4++0x1f line.long 0x00 "DC_WR_CH_CONF1_9,DC Write Channel 9 Configuration 1 Register" bitfld.long 0x00 3.--4. " MCU_DISP_ID_9 ,Defines which one of the 4 displays is associated with channel #9" "0,1,2,3" bitfld.long 0x00 2. " CHAN_MASK_DEFAULT_9 ,Event mask bit for channel #9" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 0.--1. " W_SIZE_9 ,Word Size associated with channel #9" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_CONF2_9,DC Write Channel 9 Configuration 2 Register" hexmask.long 0x04 0.--28. 1. " NEW_ADDR_SPACE_SA_9 ,Base address of the second region accessible on the display" line.long 0x08 "DC_RL1_CH_9,DC Routine Link Register 1 Channel 9" hexmask.long.byte 0x08 24.--31. 1. " COD_NEW_ADDR_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x08 8.--15. 1. " COD_NEW_ADDR_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new address/first region)" bitfld.long 0x08 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_9 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL2_CH_9,DC Routine Link Register 2 Channel 9" hexmask.long.byte 0x0C 24.--31. 1. " COD_NEW_CHAN_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x0C 8.--15. 1. " COD_NEW_CHAN_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new channel/second region)" bitfld.long 0x0C 0.--3. " COD_NEW_CHAN_PRIORITY_CHAN_9 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL3_CH_9,DC Routine Link Register 3 Channel 9" hexmask.long.byte 0x10 24.--31. 1. " COD_NEW_DATA_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x10 8.--15. 1. " COD_NEW_DATA_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new data/first region)" bitfld.long 0x10 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_9 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL4_CH_9,DC Routine Link Register 4 Channel 9" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_ADDR_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x14 8.--15. 1. " OD_NEW_ADDR_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new address/first region)" line.long 0x18 "DC_RL5_CH_9,DC Routine Link Register 5 Channel 9" hexmask.long.byte 0x18 24.--31. 1. " COD_NEW_CHAN_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_CHAN_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new channel/first region)" line.long 0x1c "DC_RL6_CH_9,DC Routine Link Register 6 Channel 9" hexmask.long.byte 0x1C 24.--31. 1. " COD_NEW_DATA_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x1C 8.--15. 1. " COD_NEW_DATA_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new data/first region)" tree.end textline " " group.long 0xd4++0x03 line.long 0x00 "DC_GEN,DC General Register" bitfld.long 0x00 24. " DC_BK_EN ,Cursor blinking enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " DC_BKDIV ,Blinking Rate" bitfld.long 0x00 8. " DC_CH5_TYPE ,Channel 5 is used for synchronous flow" "Synchronous,Asynchronous" textline " " bitfld.long 0x00 7. " SYNC_PRIORITY_1 ,Sets the priority of channel #1" "Low,High" bitfld.long 0x00 6. " SYNC_PRIORITY_5 ,Sets the priority of channel #5" "Low,High" bitfld.long 0x00 5. " MASK4CHAN_5 ,Mask for channel #5" "DC,DP" textline " " bitfld.long 0x00 4. " MASK_EN ,Enable of the mask channel" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SYNC_1_6 ,Channel 1 of the DC async/sync flow handle" "Async flow,,Sync flow,?..." if (((per.long(ad:0x02658000+0xd8+0x0))&0x40)==0x00) group.long (0xd8+0x0)++0x03 line.long 0x00 "DC_DISP_CONF1_0,DC Display Configuration 1 Register 0" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_0 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_0 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_0 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_0 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_0 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x0)++0x03 line.long 0x00 "DC_DISP_CONF1_0,DC Display Configuration 1 Register 0" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_0 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_0 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_0 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_0 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_0 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02658000+0xd8+0x4))&0x40)==0x00) group.long (0xd8+0x4)++0x03 line.long 0x00 "DC_DISP_CONF1_1,DC Display Configuration 1 Register 1" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_1 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_1 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_1 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_1 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_1 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x4)++0x03 line.long 0x00 "DC_DISP_CONF1_1,DC Display Configuration 1 Register 1" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_1 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_1 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_1 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_1 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_1 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02658000+0xd8+0x8))&0x40)==0x00) group.long (0xd8+0x8)++0x03 line.long 0x00 "DC_DISP_CONF1_2,DC Display Configuration 1 Register 2" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_2 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_2 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_2 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_2 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_2 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x8)++0x03 line.long 0x00 "DC_DISP_CONF1_2,DC Display Configuration 1 Register 2" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_2 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_2 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_2 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_2 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_2 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02658000+0xd8+0xC))&0x40)==0x00) group.long (0xd8+0xC)++0x03 line.long 0x00 "DC_DISP_CONF1_3,DC Display Configuration 1 Register 3" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_3 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_3 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_3 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_3 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_3 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0xC)++0x03 line.long 0x00 "DC_DISP_CONF1_3,DC Display Configuration 1 Register 3" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_3 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_3 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_3 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_3 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_3 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif group.long 0xe8--0x1c7 line.long 0x0 "DC_DISP_CONF2_0,DC Display Configuration 2 Register 0" hexmask.long 0x0 0.--28. 1. " SL_0 ,Stride line of display 0" line.long 0x4 "DC_DISP_CONF2_1,DC Display Configuration 2 Register 1" hexmask.long 0x4 0.--28. 1. " SL_1 ,Stride line of display 1" line.long 0x8 "DC_DISP_CONF2_2,DC Display Configuration 2 Register 2" hexmask.long 0x8 0.--28. 1. " SL_2 ,Stride line of display 2" line.long 0xC "DC_DISP_CONF2_3,DC Display Configuration 2 Register 3" hexmask.long 0xC 0.--28. 1. " SL_3 ,Stride line of display 3" line.long 0x10 "DC_DI0_CONF_1,DC DI0 Configuration Register 1" line.long 0x14 "DC_DI0_CONF_2,DC DI0 Configuration Register 2" line.long 0x18 "DC_DI1_CONF_1,DC DI1 Configuration Register 1" line.long 0x1C "DC_DI1_CONF_2,DC DI1 Configuration Register 2" textline " " line.long 0x20 "DC_MAP_CONF_0,DC Mapping Configuration Register 0" bitfld.long 0x20 26.--30. " MAPPING_PNTR_BYTE2_1 ,Mapping pointer #1 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 21.--25. " MAPPING_PNTR_BYTE1_1 ,Mapping pointer #1 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 16.--20. " MAPPING_PNTR_BYTE0_1 ,Mapping pointer #1 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 10.--14. " MAPPING_PNTR_BYTE2_0 ,Mapping pointer #0 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 5.--9. " MAPPING_PNTR_BYTE1_0 ,Mapping pointer #0 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--4. " MAPPING_PNTR_BYTE0_0 ,Mapping pointer #0 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "DC_MAP_CONF_1,DC Mapping Configuration Register 1" bitfld.long 0x24 26.--30. " MAPPING_PNTR_BYTE2_3 ,Mapping pointer #3 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 21.--25. " MAPPING_PNTR_BYTE1_3 ,Mapping pointer #3 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 16.--20. " MAPPING_PNTR_BYTE0_3 ,Mapping pointer #3 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 10.--14. " MAPPING_PNTR_BYTE2_2 ,Mapping pointer #2 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 5.--9. " MAPPING_PNTR_BYTE1_2 ,Mapping pointer #2 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. " MAPPING_PNTR_BYTE0_2 ,Mapping pointer #2 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "DC_MAP_CONF_2,DC Mapping Configuration Register 2" bitfld.long 0x28 26.--30. " MAPPING_PNTR_BYTE2_5 ,Mapping pointer #5 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 21.--25. " MAPPING_PNTR_BYTE1_5 ,Mapping pointer #5 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 16.--20. " MAPPING_PNTR_BYTE0_5 ,Mapping pointer #5 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 10.--14. " MAPPING_PNTR_BYTE2_4 ,Mapping pointer #4 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 5.--9. " MAPPING_PNTR_BYTE1_4 ,Mapping pointer #4 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--4. " MAPPING_PNTR_BYTE0_4 ,Mapping pointer #4 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "DC_MAP_CONF_3,DC Mapping Configuration Register 3" bitfld.long 0x2C 26.--30. " MAPPING_PNTR_BYTE2_7 ,Mapping pointer #7 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 21.--25. " MAPPING_PNTR_BYTE1_7 ,Mapping pointer #7 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 16.--20. " MAPPING_PNTR_BYTE0_7 ,Mapping pointer #7 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 10.--14. " MAPPING_PNTR_BYTE2_6 ,Mapping pointer #6 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 5.--9. " MAPPING_PNTR_BYTE1_6 ,Mapping pointer #6 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--4. " MAPPING_PNTR_BYTE0_6 ,Mapping pointer #6 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "DC_MAP_CONF_4,DC Mapping Configuration Register 4" bitfld.long 0x30 26.--30. " MAPPING_PNTR_BYTE2_9 ,Mapping pointer #9 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 21.--25. " MAPPING_PNTR_BYTE1_9 ,Mapping pointer #9 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 16.--20. " MAPPING_PNTR_BYTE0_9 ,Mapping pointer #9 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 10.--14. " MAPPING_PNTR_BYTE2_8 ,Mapping pointer #8 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x30 5.--9. " MAPPING_PNTR_BYTE1_8 ,Mapping pointer #8 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 0.--4. " MAPPING_PNTR_BYTE0_8 ,Mapping pointer #8 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "DC_MAP_CONF_5,DC Mapping Configuration Register 5" bitfld.long 0x34 26.--30. " MAPPING_PNTR_BYTE2_11 ,Mapping pointer #11 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 21.--25. " MAPPING_PNTR_BYTE1_11 ,Mapping pointer #11 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 16.--20. " MAPPING_PNTR_BYTE0_11 ,Mapping pointer #11 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 10.--14. " MAPPING_PNTR_BYTE2_10 ,Mapping pointer #10 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 5.--9. " MAPPING_PNTR_BYTE1_10 ,Mapping pointer #10 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 0.--4. " MAPPING_PNTR_BYTE0_10 ,Mapping pointer #10 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "DC_MAP_CONF_6,DC Mapping Configuration Register 6" bitfld.long 0x38 26.--30. " MAPPING_PNTR_BYTE2_13 ,Mapping pointer #13 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 21.--25. " MAPPING_PNTR_BYTE1_13 ,Mapping pointer #13 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 16.--20. " MAPPING_PNTR_BYTE0_13 ,Mapping pointer #13 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 10.--14. " MAPPING_PNTR_BYTE2_12 ,Mapping pointer #12 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x38 5.--9. " MAPPING_PNTR_BYTE1_12 ,Mapping pointer #12 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 0.--4. " MAPPING_PNTR_BYTE0_12 ,Mapping pointer #12 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "DC_MAP_CONF_7,DC Mapping Configuration Register 7" bitfld.long 0x3C 26.--30. " MAPPING_PNTR_BYTE2_15 ,Mapping pointer #15 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 21.--25. " MAPPING_PNTR_BYTE1_15 ,Mapping pointer #15 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 16.--20. " MAPPING_PNTR_BYTE0_15 ,Mapping pointer #15 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 10.--14. " MAPPING_PNTR_BYTE2_14 ,Mapping pointer #14 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x3C 5.--9. " MAPPING_PNTR_BYTE1_14 ,Mapping pointer #14 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 0.--4. " MAPPING_PNTR_BYTE0_14 ,Mapping pointer #14 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "DC_MAP_CONF_8,DC Mapping Configuration Register 8" bitfld.long 0x40 26.--30. " MAPPING_PNTR_BYTE2_17 ,Mapping pointer #17 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 21.--25. " MAPPING_PNTR_BYTE1_17 ,Mapping pointer #17 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 16.--20. " MAPPING_PNTR_BYTE0_17 ,Mapping pointer #17 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 10.--14. " MAPPING_PNTR_BYTE2_16 ,Mapping pointer #16 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x40 5.--9. " MAPPING_PNTR_BYTE1_16 ,Mapping pointer #16 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 0.--4. " MAPPING_PNTR_BYTE0_16 ,Mapping pointer #16 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "DC_MAP_CONF_9,DC Mapping Configuration Register 9" bitfld.long 0x44 26.--30. " MAPPING_PNTR_BYTE2_19 ,Mapping pointer #19 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 21.--25. " MAPPING_PNTR_BYTE1_19 ,Mapping pointer #19 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 16.--20. " MAPPING_PNTR_BYTE0_19 ,Mapping pointer #19 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 10.--14. " MAPPING_PNTR_BYTE2_18 ,Mapping pointer #18 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x44 5.--9. " MAPPING_PNTR_BYTE1_18 ,Mapping pointer #18 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 0.--4. " MAPPING_PNTR_BYTE0_18 ,Mapping pointer #18 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "DC_MAP_CONF_10,DC Mapping Configuration Register 10" bitfld.long 0x48 26.--30. " MAPPING_PNTR_BYTE2_21 ,Mapping pointer #21 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 21.--25. " MAPPING_PNTR_BYTE1_21 ,Mapping pointer #21 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 16.--20. " MAPPING_PNTR_BYTE0_21 ,Mapping pointer #21 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 10.--14. " MAPPING_PNTR_BYTE2_20 ,Mapping pointer #20 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x48 5.--9. " MAPPING_PNTR_BYTE1_20 ,Mapping pointer #20 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 0.--4. " MAPPING_PNTR_BYTE0_20 ,Mapping pointer #20 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "DC_MAP_CONF_11,DC Mapping Configuration Register 11" bitfld.long 0x4C 26.--30. " MAPPING_PNTR_BYTE2_23 ,Mapping pointer #23 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 21.--25. " MAPPING_PNTR_BYTE1_23 ,Mapping pointer #23 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 16.--20. " MAPPING_PNTR_BYTE0_23 ,Mapping pointer #23 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 10.--14. " MAPPING_PNTR_BYTE2_22 ,Mapping pointer #22 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4C 5.--9. " MAPPING_PNTR_BYTE1_22 ,Mapping pointer #22 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 0.--4. " MAPPING_PNTR_BYTE0_22 ,Mapping pointer #22 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "DC_MAP_CONF_12,DC Mapping Configuration Register 12" bitfld.long 0x50 26.--30. " MAPPING_PNTR_BYTE2_25 ,Mapping pointer #25 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 21.--25. " MAPPING_PNTR_BYTE1_25 ,Mapping pointer #25 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 16.--20. " MAPPING_PNTR_BYTE0_25 ,Mapping pointer #25 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 10.--14. " MAPPING_PNTR_BYTE2_24 ,Mapping pointer #24 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x50 5.--9. " MAPPING_PNTR_BYTE1_24 ,Mapping pointer #24 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--4. " MAPPING_PNTR_BYTE0_24 ,Mapping pointer #24 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "DC_MAP_CONF_13,DC Mapping Configuration Register 13" bitfld.long 0x54 26.--30. " MAPPING_PNTR_BYTE2_27 ,Mapping pointer #27 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 21.--25. " MAPPING_PNTR_BYTE1_27 ,Mapping pointer #27 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 16.--20. " MAPPING_PNTR_BYTE0_27 ,Mapping pointer #27 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 10.--14. " MAPPING_PNTR_BYTE2_26 ,Mapping pointer #26 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x54 5.--9. " MAPPING_PNTR_BYTE1_26 ,Mapping pointer #26 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 0.--4. " MAPPING_PNTR_BYTE0_26 ,Mapping pointer #26 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "DC_MAP_CONF_14,DC Mapping Configuration Register 14" bitfld.long 0x58 26.--30. " MAPPING_PNTR_BYTE2_29 ,Mapping pointer #29 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 21.--25. " MAPPING_PNTR_BYTE1_29 ,Mapping pointer #29 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 16.--20. " MAPPING_PNTR_BYTE0_29 ,Mapping pointer #29 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 10.--14. " MAPPING_PNTR_BYTE2_28 ,Mapping pointer #28 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x58 5.--9. " MAPPING_PNTR_BYTE1_28 ,Mapping pointer #28 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 0.--4. " MAPPING_PNTR_BYTE0_28 ,Mapping pointer #28 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " line.long 0x5C "DC_MAP_CONF_15,DC Mapping Configuration Register 15" bitfld.long 0x5C 24.--28. " MD_OFFSET_1 ,Mapping unit's offset parameter #1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x5C 16.--23. 1. " MD_MASK_1 ,Mapping unit's mask value #1" bitfld.long 0x5C 8.--12. " MD_OFFSET_0 ,Mapping unit's offset parameter #0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x5C 0.--7. 1. " MD_MASK_0 ,Mapping unit's mask value #0" line.long 0x60 "DC_MAP_CONF_16,DC Mapping Configuration Register 16" bitfld.long 0x60 24.--28. " MD_OFFSET_3 ,Mapping unit's offset parameter #3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x60 16.--23. 1. " MD_MASK_3 ,Mapping unit's mask value #3" bitfld.long 0x60 8.--12. " MD_OFFSET_2 ,Mapping unit's offset parameter #2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x60 0.--7. 1. " MD_MASK_2 ,Mapping unit's mask value #2" line.long 0x64 "DC_MAP_CONF_17,DC Mapping Configuration Register 17" bitfld.long 0x64 24.--28. " MD_OFFSET_5 ,Mapping unit's offset parameter #5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x64 16.--23. 1. " MD_MASK_5 ,Mapping unit's mask value #5" bitfld.long 0x64 8.--12. " MD_OFFSET_4 ,Mapping unit's offset parameter #4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x64 0.--7. 1. " MD_MASK_4 ,Mapping unit's mask value #4" line.long 0x68 "DC_MAP_CONF_18,DC Mapping Configuration Register 18" bitfld.long 0x68 24.--28. " MD_OFFSET_7 ,Mapping unit's offset parameter #7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x68 16.--23. 1. " MD_MASK_7 ,Mapping unit's mask value #7" bitfld.long 0x68 8.--12. " MD_OFFSET_6 ,Mapping unit's offset parameter #6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x68 0.--7. 1. " MD_MASK_6 ,Mapping unit's mask value #6" line.long 0x6C "DC_MAP_CONF_19,DC Mapping Configuration Register 19" bitfld.long 0x6C 24.--28. " MD_OFFSET_9 ,Mapping unit's offset parameter #9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x6C 16.--23. 1. " MD_MASK_9 ,Mapping unit's mask value #9" bitfld.long 0x6C 8.--12. " MD_OFFSET_8 ,Mapping unit's offset parameter #8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x6C 0.--7. 1. " MD_MASK_8 ,Mapping unit's mask value #8" line.long 0x70 "DC_MAP_CONF_20,DC Mapping Configuration Register 20" bitfld.long 0x70 24.--28. " MD_OFFSET_11 ,Mapping unit's offset parameter #11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x70 16.--23. 1. " MD_MASK_11 ,Mapping unit's mask value #11" bitfld.long 0x70 8.--12. " MD_OFFSET_10 ,Mapping unit's offset parameter #10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x70 0.--7. 1. " MD_MASK_10 ,Mapping unit's mask value #10" line.long 0x74 "DC_MAP_CONF_21,DC Mapping Configuration Register 21" bitfld.long 0x74 24.--28. " MD_OFFSET_13 ,Mapping unit's offset parameter #13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x74 16.--23. 1. " MD_MASK_13 ,Mapping unit's mask value #13" bitfld.long 0x74 8.--12. " MD_OFFSET_12 ,Mapping unit's offset parameter #12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x74 0.--7. 1. " MD_MASK_12 ,Mapping unit's mask value #12" line.long 0x78 "DC_MAP_CONF_22,DC Mapping Configuration Register 22" bitfld.long 0x78 24.--28. " MD_OFFSET_15 ,Mapping unit's offset parameter #15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x78 16.--23. 1. " MD_MASK_15 ,Mapping unit's mask value #15" bitfld.long 0x78 8.--12. " MD_OFFSET_14 ,Mapping unit's offset parameter #14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x78 0.--7. 1. " MD_MASK_14 ,Mapping unit's mask value #14" line.long 0x7C "DC_MAP_CONF_23,DC Mapping Configuration Register 23" bitfld.long 0x7C 24.--28. " MD_OFFSET_17 ,Mapping unit's offset parameter #17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x7C 16.--23. 1. " MD_MASK_17 ,Mapping unit's mask value #17" bitfld.long 0x7C 8.--12. " MD_OFFSET_16 ,Mapping unit's offset parameter #16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x7C 0.--7. 1. " MD_MASK_16 ,Mapping unit's mask value #16" line.long 0x80 "DC_MAP_CONF_24,DC Mapping Configuration Register 24" bitfld.long 0x80 24.--28. " MD_OFFSET_19 ,Mapping unit's offset parameter #19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x80 16.--23. 1. " MD_MASK_19 ,Mapping unit's mask value #19" bitfld.long 0x80 8.--12. " MD_OFFSET_18 ,Mapping unit's offset parameter #18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x80 0.--7. 1. " MD_MASK_18 ,Mapping unit's mask value #18" line.long 0x84 "DC_MAP_CONF_25,DC Mapping Configuration Register 25" bitfld.long 0x84 24.--28. " MD_OFFSET_21 ,Mapping unit's offset parameter #21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x84 16.--23. 1. " MD_MASK_21 ,Mapping unit's mask value #21" bitfld.long 0x84 8.--12. " MD_OFFSET_20 ,Mapping unit's offset parameter #20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x84 0.--7. 1. " MD_MASK_20 ,Mapping unit's mask value #20" line.long 0x88 "DC_MAP_CONF_26,DC Mapping Configuration Register 26" bitfld.long 0x88 24.--28. " MD_OFFSET_23 ,Mapping unit's offset parameter #23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x88 16.--23. 1. " MD_MASK_23 ,Mapping unit's mask value #23" bitfld.long 0x88 8.--12. " MD_OFFSET_22 ,Mapping unit's offset parameter #22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x88 0.--7. 1. " MD_MASK_22 ,Mapping unit's mask value #22" line.long 0x8C "DC_UGDE0_0,DC User General Data Event 0 Register 0" bitfld.long 0x8C 27.--28. " NF_NL_0 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0x8C 26. " AUTORESTART_0 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0x8C 25. " ODD_EN_0 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0x8C 16.--23. 1. " COD_ODD_START_0 ,Pointer in the microcode holding the routine to be performed following the user general event #0 (odd events)" textline " " hexmask.long.byte 0x8C 8.--15. 1. " COD_EV_START_0 ,Pointer in the microcode holding the routine to be performed following the user general event #0 (even events)" bitfld.long 0x8C 3.--6. " COD_EV_PRIORITY_0 ,Priority of the user general event #0" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0x8C 0.--2. " ID_CODED_0 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0x8C+0x04) "DC_UGDE0_1,DC User General Data Event 0 Register 1" hexmask.long (0x8C+0x04) 0.--28. 1. " STEP_0 ,Pre defined value that the counter counts too" line.long (0x8C+0x08) "DC_UGDE0_2,DC User General Data Event 0 Register 2" hexmask.long (0x8C+0x08) 0.--28. 1. " OFFSET_DT_0 ,Offset value from which the counter of user general event #0 will start counting from" line.long (0x8C+0x0c) "DC_UGDE0_3,DC User General Data Event 0 Register 3" hexmask.long (0x8C+0x0c) 0.--28. 1. " STEP_REPEAT_0 ,Number of events that will be generated by the user general event #0 mechanism" line.long 0x9C "DC_UGDE1_0,DC User General Data Event 1 Register 0" bitfld.long 0x9C 27.--28. " NF_NL_1 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0x9C 26. " AUTORESTART_1 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0x9C 25. " ODD_EN_1 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0x9C 16.--23. 1. " COD_ODD_START_1 ,Pointer in the microcode holding the routine to be performed following the user general event #1 (odd events)" textline " " hexmask.long.byte 0x9C 8.--15. 1. " COD_EV_START_1 ,Pointer in the microcode holding the routine to be performed following the user general event #1 (even events)" bitfld.long 0x9C 3.--6. " COD_EV_PRIORITY_1 ,Priority of the user general event #1" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0x9C 0.--2. " ID_CODED_1 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0x9C+0x04) "DC_UGDE1_1,DC User General Data Event 1 Register 1" hexmask.long (0x9C+0x04) 0.--28. 1. " STEP_1 ,Pre defined value that the counter counts too" line.long (0x9C+0x08) "DC_UGDE1_2,DC User General Data Event 1 Register 2" hexmask.long (0x9C+0x08) 0.--28. 1. " OFFSET_DT_1 ,Offset value from which the counter of user general event #1 will start counting from" line.long (0x9C+0x0c) "DC_UGDE1_3,DC User General Data Event 1 Register 3" hexmask.long (0x9C+0x0c) 0.--28. 1. " STEP_REPEAT_1 ,Number of events that will be generated by the user general event #1 mechanism" line.long 0xAC "DC_UGDE2_0,DC User General Data Event 2 Register 0" bitfld.long 0xAC 27.--28. " NF_NL_2 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0xAC 26. " AUTORESTART_2 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0xAC 25. " ODD_EN_2 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0xAC 16.--23. 1. " COD_ODD_START_2 ,Pointer in the microcode holding the routine to be performed following the user general event #2 (odd events)" textline " " hexmask.long.byte 0xAC 8.--15. 1. " COD_EV_START_2 ,Pointer in the microcode holding the routine to be performed following the user general event #2 (even events)" bitfld.long 0xAC 3.--6. " COD_EV_PRIORITY_2 ,Priority of the user general event #2" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0xAC 0.--2. " ID_CODED_2 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0xAC+0x04) "DC_UGDE2_1,DC User General Data Event 2 Register 1" hexmask.long (0xAC+0x04) 0.--28. 1. " STEP_2 ,Pre defined value that the counter counts too" line.long (0xAC+0x08) "DC_UGDE2_2,DC User General Data Event 2 Register 2" hexmask.long (0xAC+0x08) 0.--28. 1. " OFFSET_DT_2 ,Offset value from which the counter of user general event #2 will start counting from" line.long (0xAC+0x0c) "DC_UGDE2_3,DC User General Data Event 2 Register 3" hexmask.long (0xAC+0x0c) 0.--28. 1. " STEP_REPEAT_2 ,Number of events that will be generated by the user general event #2 mechanism" line.long 0xBC "DC_UGDE3_0,DC User General Data Event 3 Register 0" bitfld.long 0xBC 27.--28. " NF_NL_3 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0xBC 26. " AUTORESTART_3 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0xBC 25. " ODD_EN_3 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0xBC 16.--23. 1. " COD_ODD_START_3 ,Pointer in the microcode holding the routine to be performed following the user general event #3 (odd events)" textline " " hexmask.long.byte 0xBC 8.--15. 1. " COD_EV_START_3 ,Pointer in the microcode holding the routine to be performed following the user general event #3 (even events)" bitfld.long 0xBC 3.--6. " COD_EV_PRIORITY_3 ,Priority of the user general event #3" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0xBC 0.--2. " ID_CODED_3 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0xBC+0x04) "DC_UGDE3_1,DC User General Data Event 3 Register 1" hexmask.long (0xBC+0x04) 0.--28. 1. " STEP_3 ,Pre defined value that the counter counts too" line.long (0xBC+0x08) "DC_UGDE3_2,DC User General Data Event 3 Register 2" hexmask.long (0xBC+0x08) 0.--28. 1. " OFFSET_DT_3 ,Offset value from which the counter of user general event #3 will start counting from" line.long (0xBC+0x0c) "DC_UGDE3_3,DC User General Data Event 3 Register 3" hexmask.long (0xBC+0x0c) 0.--28. 1. " STEP_REPEAT_3 ,Number of events that will be generated by the user general event #3 mechanism" line.long 0xCC "DC_LLA0,DC Low Level Access Control Register 0" hexmask.long.byte 0xCC 24.--31. 1. " MCU_RS_3_0 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_8 (Low level)" hexmask.long.byte 0xCC 16.--23. 1. " MCU_RS_2_0 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_8 (Low level)" hexmask.long.byte 0xCC 8.--15. 1. " MCU_RS_1_0 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_8 (Low level)" textline " " hexmask.long.byte 0xCC 0.--7. 1. " MCU_RS_0_0 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_8 (Low level)" line.long 0xD0 "DC_LLA1,DC Low Level Access Control Register 1" hexmask.long.byte 0xD0 24.--31. 1. " MCU_RS_3_1 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_9 (Low level)" hexmask.long.byte 0xD0 16.--23. 1. " MCU_RS_2_1 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_9 (Low level)" hexmask.long.byte 0xD0 8.--15. 1. " MCU_RS_1_1 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_9 (Low level)" textline " " hexmask.long.byte 0xD0 0.--7. 1. " MCU_RS_0_1 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_9 (Low level)" line.long 0xD4 "DC_R_LLA0,DC Low Level Read Access Control Register 0" hexmask.long.byte 0xD4 24.--31. 1. " MCU_RS_R_3_0 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_8 (Read Low level)" hexmask.long.byte 0xD4 16.--23. 1. " MCU_RS_R_2_0 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_8 (Read Low level)" hexmask.long.byte 0xD4 8.--15. 1. " MCU_RS_R_1_0 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_8 (Read Low level)" textline " " hexmask.long.byte 0xD4 0.--7. 1. " MCU_RS_R_0_0 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_8 (Read Low level)" line.long 0xD8 "DC_R_LLA1,DC Low Level Read Access Control Register 1" hexmask.long.byte 0xD8 24.--31. 1. " MCU_RS_R_3_1 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_9 (Read Low level)" hexmask.long.byte 0xD8 16.--23. 1. " MCU_RS_R_2_1 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_9 (Read Low level)" hexmask.long.byte 0xD8 8.--15. 1. " MCU_RS_R_1_1 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_9 (Read Low level)" textline " " hexmask.long.byte 0xD8 0.--7. 1. " MCU_RS_R_0_1 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_9 (Read Low level)" width 21. textline " " line.long 0xdc "DC_WR_CH_ADDR_5_ALT,DC Write Channel 5 Configuration Register" hexmask.long 0xdc 0.--28. 1. " ST_ADDR_5_ALT ,Start address within the display's memory space (channel #5)" rgroup.long 0x1c8++0x03 line.long 0x00 "DC_STAT,DC Status Register" bitfld.long 0x00 7. " DC_TRIPLE_BUF_DATA_EMPTY_1 ,DC_TRIPLE_BUF_DATA_EMPTY_1" "Not empty,Empty" bitfld.long 0x00 6. " DC_TRIPLE_BUF_DATA_FULL_1 ,DC_TRIPLE_BUF_DATA_FULL_1" "Not full,Full" bitfld.long 0x00 5. " DC_TRIPLE_BUF_CNT_EMPTY_1 ,DC_TRIPLE_BUF_CNT_EMPTY_1" "Not empty,Empty" textline " " bitfld.long 0x00 4. " DC_TRIPLE_BUF_CNT_FULL_1 ,DC_TRIPLE_BUF_CNT_FULL_1" "Not full,Full" bitfld.long 0x00 3. " DC_TRIPLE_BUF_DATA_EMPTY_0 ,DC_TRIPLE_BUF_DATA_EMPTY_0" "Not empty,Empty" bitfld.long 0x00 2. " DC_TRIPLE_BUF_DATA_FULL_0 ,DC_TRIPLE_BUF_DATA_FULL_0" "Not full,Full" textline " " bitfld.long 0x00 1. " DC_TRIPLE_BUF_CNT_EMPTY_0 ,DC_TRIPLE_BUF_CNT_EMPTY_0" "Not empty,Empty" bitfld.long 0x00 0. " DC_TRIPLE_BUF_CNT_FULL_0 ,DC_TRIPLE_BUF_CNT_FULL_0" "Not full,Full" width 0x0B tree.end tree "DMFC registers" base ad:0x02660000 width 22. group.long 0x00++0x33 line.long 0x00 "DMFC_RD_CHAN,DMFC Read Channel Register" bitfld.long 0x00 24.--25. " DMFC_PPW_C ,Pixel Per Word coded" "8,16,24,?..." bitfld.long 0x00 21.--23. " DMFC_WM_CLR_0 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18.--20. " DMFC_WM_SET_0 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17. " DMFC_WM_EN_0 ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " DMFC_BURST_SIZE_0 ,Read burst Size" "32,16,8,4" line.long 0x04 "DMFC_WR_CHAN,DMFC Write Channel Register" bitfld.long 0x04 30.--31. " DMFC_BURST_SIZE_2C ,Burst size of IDMAC's channel 43" "32,16,8,4" bitfld.long 0x04 27.--29. " DMFC_FIFO_SIZE_2C ,DMFC FIFO size for IDMAC's channel 43" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x04 24.--26. " DMFC_ST_ADDR_2C ,DMFC Start Address for IDMAC's channel 43" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x04 22.--23. " DMFC_BURST_SIZE_1C ,Burst size of IDMAC's channel 42" "32,16,8,4" textline " " bitfld.long 0x04 19.--21. " DMFC_FIFO_SIZE_1C ,DMFC FIFO size for IDMAC's channel 42" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x04 16.--18. " DMFC_ST_ADDR_1C ,DMFC Start Address for IDMAC's channel 42" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x04 14.--15. " DMFC_BURST_SIZE_2 ,Burst size of IDMAC's channel 41" "32,16,8,4" bitfld.long 0x04 11.--13. " DMFC_FIFO_SIZE_2 ,DMFC FIFO size for IDMAC's channel 41" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x04 8.--10. " DMFC_ST_ADDR_2 ,DMFC Start Address for IDMAC's channel 41" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x04 6.--7. " DMFC_BURST_SIZE_1 ,Burst size of IDMAC's channel 28" "32,16,8,4" textline " " bitfld.long 0x04 3.--5. " DMFC_FIFO_SIZE_1 ,DMFC FIFO size for IDMAC's channel 28" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x04 0.--2. " DMFC_ST_ADDR_1 ,DMFC Start Address for IDMAC's channel 28" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x08 "DMFC_WR_CHAN_DEF,DMFC Write Channel Definition Register" bitfld.long 0x08 29.--31. " DMFC_WM_CLR_2C ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x08 26.--28. " DMFC_WM_SET_2C ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 25. " DMFC_WM_EN_2C ,Watermark enable" "Disabled,Enabled" bitfld.long 0x08 21.--23. " DMFC_WM_CLR_1C ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 18.--20. " DMFC_WM_SET_1C ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x08 17. " DMFC_WM_EN_1C ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13.--15. " DMFC_WM_CLR_2 ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. " DMFC_WM_SET_2 ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 9. " DMFC_WM_EN_2 ,Watermark enable" "Disabled,Enabled" bitfld.long 0x08 5.--7. " DMFC_WM_CLR_1 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 2.--4. " DMFC_WM_SET_1 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1. " DMFC_WM_EN_1 ,Watermark enable" "Disabled,Enabled" line.long 0x0c "DMFC_DP_CHAN,DMFC Display Processor Channel Register" bitfld.long 0x0c 30.--31. " DMFC_BURST_SIZE_6F ,Burst size of IDMAC's channel 29" "32,16,8,4" bitfld.long 0x0c 27.--29. " DMFC_FIFO_SIZE_6F ,DMFC FIFO size for IDMAC's channel 29" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x0c 24.--26. " DMFC_ST_ADDR_6F ,DMFC Start Address for IDMAC's channel 29" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x0c 22.--23. " DMFC_BURST_SIZE_6B ,Burst size of IDMAC's channel 24" "32,16,8,4" textline " " bitfld.long 0x0c 19.--21. " DMFC_FIFO_SIZE_6B ,DMFC FIFO size for IDMAC's channel 24" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x0c 16.--18. " DMFC_ST_ADDR_6B ,DMFC Start Address for IDMAC's channel 24" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x0c 14.--15. " DMFC_BURST_SIZE_5F ,Burst size of IDMAC's channel 27" "32,16,8,4" bitfld.long 0x0c 11.--13. " DMFC_FIFO_SIZE_5F ,DMFC FIFO size for IDMAC's channel 27" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x0c 8.--10. " DMFC_ST_ADDR_5F ,DMFC Start Address for IDMAC's channel 27" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x0c 6.--7. " DMFC_BURST_SIZE_5B ,Burst size of IDMAC's channel 23" "32,16,8,4" textline " " bitfld.long 0x0c 3.--5. " DMFC_FIFO_SIZE_5B ,DMFC FIFO size for IDMAC's channel 23" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x0c 0.--2. " DMFC_ST_ADDR_5B ,DMFC Start Address for IDMAC's channel 23" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x10 "DMFC_DP_CHAN_DEF,DMFC Display Channel Definition Register" bitfld.long 0x10 29.--31. " DMFC_WM_CLR_6F ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x10 26.--28. " DMFC_WM_SET_6F ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 25. " DMFC_WM_EN_6F ,Watermark enable" "Disabled,Enabled" bitfld.long 0x10 21.--23. " DMFC_WM_CLR_6B ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 18.--20. " DMFC_WM_SET_6B ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x10 17. " DMFC_WM_EN_6B ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13.--15. " DMFC_WM_CLR_5F ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. " DMFC_WM_SET_5F ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 9. " DMFC_WM_EN_5F ,Watermark enable" "Disabled,Enabled" bitfld.long 0x10 5.--7. " DMFC_WM_CLR_5B ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 2.--4. " DMFC_WM_SET_5B ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. " DMFC_WM_EN_5B ,Watermark enable" "Disabled,Enabled" line.long 0x14 "DMFC_GENERAL1,DMFC General 1 Register" bitfld.long 0x14 24. " WAIT4EOT_9 ,FIFO #9 operation mode" "Normal,Wait4eot" bitfld.long 0x14 23. " WAIT4EOT_6F ,FIFO #6F operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 22. " WAIT4EOT_6B ,FIFO #6B operation mode" "Normal,Wait4eot" bitfld.long 0x14 21. " WAIT4EOT_5F ,FIFO #5F operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 20. " WAIT4EOT_5B ,FIFO #5B operation mode" "Normal,Wait4eot" bitfld.long 0x14 19. " WAIT4EOT_4 ,FIFO #4 operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 18. " WAIT4EOT_3 ,FIFO #3 operation mode" "Normal,Wait4eot" bitfld.long 0x14 17. " WAIT4EOT_2 ,FIFO #2 operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 16. " WAIT4EOT_1 ,FIFO #1 operation mode" "Normal,Wait4eot" bitfld.long 0x14 13.--15. " DMFC_WM_CLR_9 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 10.--12. " DMFC_WM_SET_9 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. " DMFC_WM_EN_9 ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5.--6. " DMFC_BURST_SIZE_9 ,Burst size of IDMAC's channel 44" "32,16,8,4" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x14 0.--1. " DMFC_DCDP_SYNC_PR ,Burst size of IDMAC's channel 44" "Forbidden,DC over DP,DP over DC,Round Robin" else bitfld.long 0x14 0.--1. " DMFC_DCDP_SYNC_PR ,DMFC's memory access priority" "Forbidden,DC over DP,DP over DC,Round Robin" endif line.long 0x18 "DMFC_GENERAL2,DMFC General Register 2" hexmask.long.word 0x18 16.--28. 1. " DMFC_FRAME_HEIGHT_RD ,Frame height for read channel from the display to the IDMAC" hexmask.long.word 0x18 0.--12. 1. " DMFC_FRAME_WIDTH_RD ,Frame width for read channel from the display to the IDMAC" line.long 0x1c "DMFC_IC_CTRL,DMFC IC Interface Control Register" hexmask.long.word 0x1c 19.--31. 1. " DMFC_IC_FRAME_HEIGHT_RD ,Frame's height for the channel coming from IC" hexmask.long.word 0x1c 6.--18. 1. " DMFC_IC_FRAME_WIDTH_RD ,Frame's width for the channel coming from IC" textline " " bitfld.long 0x1c 4.--5. " DMFC_IC_PPW_C ,Pixel Per Word coded from IC" "8,16,24,?..." bitfld.long 0x1c 0.--2. " DMFC_IC_IN_PORT ,DMFC input port" "CH28,CH41,,,CH23,CH27,CH24,CH29" line.long 0x20 "DMFC_WR_CHAN_ALT,DMFC Write Channel Alternate Register" bitfld.long 0x20 14.--15. " DMFC_BURST_SIZE_2_ALT ,Burst size of IDMAC's channel 41" "32,16,8,4" bitfld.long 0x20 11.--13. " DMFC_FIFO_SIZE_2_ALT ,DMFC FIFO size for IDMAC's channel 41 (for alternate flow)" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x20 8.--10. " DMFC_FIFO_SIZE_2_ALT ,DMFC Start Address for IDMAC's channel 41 (for alternate flow)" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x24 "DMFC_WR_CHAN_DEF_ALT,DMFC Write Channel Definition Alternate Register" bitfld.long 0x24 13.--15. " DMFC_WM_CLR_2_ALT ,Watermark Clear (for alternate flow)" "0,1,2,3,4,5,6,7" bitfld.long 0x24 10.--12. " DMFC_WM_SET_2_ALT ,Watermark Set (for alternate flow)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 9. " DMFC_WM_EN_2_ALT ,Watermark enable (for alternate flow)" "Disabled,Enabled" line.long 0x28 "DMFC_DP_CHAN_ALT,DMFC Display Processor Channel Alternate Register" bitfld.long 0x28 30.--31. " DMFC_BURST_SIZE_6F_ALT ,Burst size of IDMAC's channel 29" "32,16,8,4" bitfld.long 0x28 27.--29. " DMFC_FIFO_SIZE_6F_ALT ,DMFC FIFO size for IDMAC's channel 29" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x28 24.--26. " DMFC_ST_ADDR_6F_ALT ,DMFC Start Address for IDMAC's channel 29" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x28 22.--23. " DMFC_BURST_SIZE_6B_ALT ,Burst size of IDMAC's channel 24" "32,16,8,4" textline " " bitfld.long 0x28 19.--21. " DMFC_FIFO_SIZE_6B_ALT ,DMFC FIFO size for IDMAC's channel 24" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x28 16.--18. " DMFC_ST_ADDR_6B_ALT ,DMFC Start Address for IDMAC's channel 24" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x28 6.--7. " DMFC_BURST_SIZE_5B_ALT ,Burst size of IDMAC's channel 23" "32,16,8,4" bitfld.long 0x28 3.--5. " DMFC_FIFO_SIZE_5B_ALT ,DMFC FIFO size for IDMAC's channel 23" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x28 0.--2. " DMFC_ST_ADDR_5B_ALT ,DMFC Start Address for IDMAC's channel 23" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x2c "DMFC_DP_CHAN_DEF_ALT,DMFC Display Channel Definition Alternate Register" bitfld.long 0x2c 29.--31. " DMFC_WM_CLR_6F_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 26.--28. " DMFC_WM_SET_6F_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 25. " DMFC_WM_EN_6F_ALT ,Watermark enable" "Disabled,Enabled" bitfld.long 0x2c 21.--23. " DMFC_WM_CLR_6B_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 18.--20. " DMFC_WM_SET_6B_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 17. " DMFC_WM_EN_6B_ALT ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x2c 5.--7. " DMFC_WM_CLR_5B_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 2.--4. " DMFC_WM_SET_5B_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 1. " DMFC_WM_EN_5B_ALT ,Watermark enable" "Disabled,Enabled" line.long 0x30 "DMFC_GENERAL1_ALT,DMFC General 1 Altenate Register" bitfld.long 0x30 23. " WAIT4EOT_6F_ALT ,FIFO #6F operation mode" "Normal,Wait4eot" bitfld.long 0x30 22. " WAIT4EOT_6B_ALT ,FIFO #6B operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x30 20. " WAIT4EOT_5B_ALT ,FIFO #5B operation mode" "Normal,Wait4eot" bitfld.long 0x30 17. " WAIT4EOT_2_ALT ,FIFO #2 operation mode" "Normal,Wait4eot" rgroup.long 0x34++0x3 line.long 0x00 "DMFC_STAT,DMFC Status Register" bitfld.long 0x00 25. " DMFC_IC_BUFFER_EMPTY ,Indicates on a IC FIFO empty condition" "Not empty,Empty" bitfld.long 0x00 24. " DMFC_IC_BUFFER_FULL ,Indicates on a IC FIFO full condition" "Not full,Full" textline " " bitfld.long 0x00 23. " DMFC_FIFO_EMPTY_11 ,Indicates on a DMFC FIFO 11 empty condition" "Not empty,Empty" bitfld.long 0x00 22. " DMFC_FIFO_EMPTY_10 ,Indicates on a DMFC FIFO 10 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 21. " DMFC_FIFO_EMPTY_9 ,Indicates on a DMFC FIFO 9 empty condition" "Not empty,Empty" bitfld.long 0x00 20. " DMFC_FIFO_EMPTY_8 ,Indicates on a DMFC FIFO 8 (6F) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 19. " DMFC_FIFO_EMPTY_7 ,Indicates on a DMFC FIFO 7 (6b) empty condition" "Not empty,Empty" bitfld.long 0x00 18. " DMFC_FIFO_EMPTY_6 ,Indicates on a DMFC FIFO 6 (5f) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 17. " DMFC_FIFO_EMPTY_5 ,Indicates on a DMFC FIFO 5 (5b) empty condition" "Not empty,Empty" bitfld.long 0x00 16. " DMFC_FIFO_EMPTY_4 ,Indicates on a DMFC FIFO 4 (2c) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 15. " DMFC_FIFO_EMPTY_3 ,Indicates on a DMFC FIFO 3 (1c) empty condition" "Not empty,Empty" bitfld.long 0x00 14. " DMFC_FIFO_EMPTY_2 ,Indicates on a DMFC FIFO 2 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 13. " DMFC_FIFO_EMPTY_1 ,Indicates on a DMFC FIFO 1 empty condition" "Not empty,Empty" bitfld.long 0x00 12. " DMFC_FIFO_EMPTY_0 ,Indicates on a DMFC FIFO 0 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 11. " DMFC_FIFO_FULL_11 ,Indicates on a DMFC FIFO 11 full condition" "Not full,Full" bitfld.long 0x00 10. " DMFC_FIFO_FULL_10 ,Indicates on a DMFC FIFO 10 full condition" "Not full,Full" textline " " bitfld.long 0x00 9. " DMFC_FIFO_FULL_9 ,Indicates on a DMFC FIFO 9 full condition" "Not full,Full" bitfld.long 0x00 8. " DMFC_FIFO_FULL_8 ,Indicates on a DMFC FIFO 8 (6f) full condition" "Not full,Full" textline " " bitfld.long 0x00 7. " DMFC_FIFO_FULL_7 ,Indicates on a DMFC FIFO 7 (6b) full condition" "Not full,Full" bitfld.long 0x00 6. " DMFC_FIFO_FULL_6 ,Indicates on a DMFC FIFO 6 (5f) full condition" "Not full,Full" textline " " bitfld.long 0x00 5. " DMFC_FIFO_FULL_5 ,Indicates on a DMFC FIFO 5 (5b) full condition" "Not full,Full" bitfld.long 0x00 4. " DMFC_FIFO_FULL_4 ,Indicates on a DMFC FIFO 4 (2c) full condition" "Not full,Full" textline " " bitfld.long 0x00 3. " DMFC_FIFO_FULL_3 ,Indicates on a DMFC FIFO 3 (1c) full condition" "Not full,Full" bitfld.long 0x00 2. " DMFC_FIFO_FULL_2 ,Indicates on a DMFC FIFO 2 full condition" "Not full,Full" textline " " bitfld.long 0x00 1. " DMFC_FIFO_FULL_1 ,Indicates on a DMFC FIFO 1 full condition" "Not full,Full" bitfld.long 0x00 0. " DMFC_FIFO_FULL_0 ,Indicates on a DMFC FIFO 0 full condition" "Not full,Full" width 0x0B tree.end tree "VDI Registers" base ad:0x02668000 width 12. group.long 0x00++0x7 line.long 0x00 "VDI_FSIZE,VDI Field Size Register" sif ((!cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x00 16.--25. 1. " VDI_FHEIGHT ,Frame height" hexmask.long.word 0x00 0.--9. 1. " VDI_FWIDTH ,Frame width" else hexmask.long.word 0x00 16.--26. 1. " VDI_FHEIGHT ,Frame height" hexmask.long.word 0x00 0.--10. 1. " VDI_FWIDTH ,Frame width" endif line.long 0x04 "VDI_C,VDI Control Register" bitfld.long 0x04 31. " VDI_TOP_FIELD_AUTO ,VDI top filed (automatic)" "0,1" bitfld.long 0x04 30. " VDI_TOP_FIELD_MAN ,VDI top filed (manual)" "0,1" textline " " bitfld.long 0x04 25.--27. " VDI_VWM3_CLR ,VDI WaterMark clear level for channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 22.--24. " VDI_VWM3_SET ,VDI WaterMark set level for channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 19.--21. " VDI_VWM1_CLR ,VDI WaterMark clear level for channel 1 or channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" else bitfld.long 0x04 19.--21. " VDI_VWM1_CLR ,VDI WaterMark clear level for channel 1 or channel 4" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" endif bitfld.long 0x04 16.--18. " VDI_VWM1_SET ,VDI WaterMark set level for channel 1 or channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 12.--15. " VDI_BURST_SIZE3 ,Burst Size for channel 3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " VDI_BURST_SIZE2 ,Burst Size for channel 2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x04 4.--7. " VDI_BURST_SIZE1 ,Burst Size for channels 1 or 4" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 2.--3. " VDI_MOT_SEL ,Motion select" "ROM 1,ROM 2,Full motion,Forbidden" textline " " bitfld.long 0x04 1. " VDI_CH_422 ,Chroma format at input and output of VDI" "420,422" sif (cpu()=="IMX53"||cpuis("IMX6*")||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") group.long 0x08++0x1B line.long 0x00 "VDI_C2,VDI Control Register 2" bitfld.long 0x00 3. " PLANE_1_EN ,Plane 1 enable" "Disabled,Enabled" bitfld.long 0x00 2. " GLB_A_EN ,Global alpha enable" "Local,Global" bitfld.long 0x00 1. " KEY_COLOR_EN ,Key Color Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CMB_EN ,Combining enable" "Disabled,Enabled" line.long 0x04 "VDI_CMDP_1,VDI Combining Parameters Register 1" hexmask.long.byte 0x04 24.--31. 1. " ALPHA ,Global Alpha" hexmask.long.byte 0x04 16.--23. 1. " KEY_COLOR_R ,Red component of Key Color" hexmask.long.byte 0x04 8.--15. 1. " KEY_COLOR_G ,Green component of Key Color" textline " " hexmask.long.byte 0x04 0.--7. 1. " KEY_COLOR_B ,Blue component of Key Color" line.long 0x08 "VDI_CMDP_2,VDI Combining Parameters Register 2" hexmask.long.byte 0x08 16.--23. 1. " VDI_KEY_COLOR_R ,Red component of background Color" hexmask.long.byte 0x08 8.--15. 1. " VDI_KEY_COLOR_G ,Green component of background Color" textline " " hexmask.long.byte 0x08 0.--7. 1. " VDI_KEY_COLOR_B ,Blue component of background Color" line.long 0x0C "VDI_PS_1,VDI Plane Size Register 1" hexmask.long.word 0x0C 16.--26. 1. " VDI_FHEIGHT1 ,Plane 1 height" hexmask.long.word 0x0C 0.--10. 1. " VDI_FWIDTH1 ,Plane 1 width" line.long 0x10 "VDI_PS_2,VDI Plane Size Register 2" hexmask.long.word 0x10 16.--26. 1. " VDI_OFFSET_VER1 ,Vertical offset of plane 1" hexmask.long.word 0x10 0.--10. 1. " VDI_OFFSET_HOR1 ,Horizontal offset of plane 1" line.long 0x14 "VDI_PS_3,VDI Plane Size Register 3" hexmask.long.word 0x14 16.--26. 1. " VDI_FHEIGHT3 ,Plane 3 height" hexmask.long.word 0x14 0.--10. 1. " VDI_FWIDTH3 ,Plane 3 width" line.long 0x18 "VDI_PS_4,VDI Plane Size Register 4" hexmask.long.word 0x18 16.--26. 1. " VDI_OFFSET_VER3 ,Vertical offset of plane 3" hexmask.long.word 0x18 0.--10. 1. " VDI_OFFSET_HOR3 ,Horizontal offset of plane 3" endif width 0xb tree.end tree.end sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") tree "IPU 2" tree "Common registers" base ad:0x02A00000 width 11. group.long 0x00++0x3b line.long 0x00 "IPU_CONF,Configuration Register" bitfld.long 0x00 31. " CSI_SEL ,CSI select bit" "CSI0,CSI1" bitfld.long 0x00 30. " IC_INPUT ,IC Input select bit" "CSI0/1,VDI" bitfld.long 0x00 29. " CSI1_DATA_SOURCE ,CSI1 data source" "Parallel,MCT" textline " " bitfld.long 0x00 28. " CSI0_DATA_SOURCE ,CSI0 data source" "Parallel,MCT" bitfld.long 0x00 27. " VDI_DMFC_SYNC ,VDIC -> IC_VF -> DMFC Sync flow" "Disabled,Enabled" bitfld.long 0x00 26. " IC_DMFC_SYNC ,IC to DMFC Sync flow" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 25. " IC_DMFC_SEL ,IC to DMFC select" "IDMAC,DMFC" bitfld.long 0x00 22. " IDMAC_DISABLE ,Image DMA controller (IDMAC) disable bit" "No,Yes" bitfld.long 0x00 21. " IPU_DIAGBUS_ON ,Diagnostics bus on" "Off,On" textline " " bitfld.long 0x00 12. " VDI_EN ,VDIC enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " SISG_EN ,Still Image Synchronization Generator (SISG) Enable bit" "Disabled,Enabled" bitfld.long 0x00 10. " DMFC_EN ,Display's Multi FIFO Controller Module (DMFC) Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DC_EN ,Display Controller Module (DC) Enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " SMFC_EN ,Sensor's Multi FIFO Controller Module (SMFC) Enable bit" "Disabled,Enabled" bitfld.long 0x00 7. " DI1_EN ,Display Interface Module 1 Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DI0_EN ,Display interface Module 0 Enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " DP_EN ,Display processor Module Enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " IRT_EN ,Image Rotation Module Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IC_EN ,Image Conversion Module Enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " CSI1_EN ,Camera Sensor Interface 1 Enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " CSI0_EN ,Camera Sensor Interface 0 Enable bit" "Disabled,Enabled" line.long 0x04 "SISG_CTRL0,SISG Control 0 Register" bitfld.long 0x04 30. " EXT_ACTV ,External Active" "Not active,Active" hexmask.long 0x04 4.--28. 1. " VAL_STOP_SISG_COUNTER ,SISG Stop Counters value" bitfld.long 0x04 1.--3. " NO_VSYNC_2_STRT_CNT ,VSYCs to Start Counter" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0. " VSYNC_RST_CNT ,VSYNC Resets counters" "VAL_STOP_SISG_COUNTER,VSYNC" line.long 0x08 "SISG_CTRL1,SISG Control 1 Register" bitfld.long 0x08 13. " SISG_OUT_POL[5] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 12. " SISG_OUT_POL[4] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 11. " SISG_OUT_POL[3] ,Polarity of the SISG output signals" "Active low,Active high" textline " " bitfld.long 0x08 10. " SISG_OUT_POL[2] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 9. " SISG_OUT_POL[1] ,Polarity of the SISG output signals" "Active low,Active high" bitfld.long 0x08 8. " SISG_OUT_POL[0] ,Polarity of the SISG output signals" "Active low,Active high" textline " " bitfld.long 0x08 0.--4. " SISG_STROBE_CNT ,SISG Strobe Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC "SISG_SET_1,SISG set 1 Register" hexmask.long 0xC 0.--24. 1. " SISG_SET_1 ,Define the set value of the SISG counter #1" line.long 0x10 "SISG_SET_2,SISG set 2 Register" hexmask.long 0x10 0.--24. 1. " SISG_SET_2 ,Define the set value of the SISG counter #2" line.long 0x14 "SISG_SET_3,SISG set 3 Register" hexmask.long 0x14 0.--24. 1. " SISG_SET_3 ,Define the set value of the SISG counter #3" line.long 0x18 "SISG_SET_4,SISG set 4 Register" hexmask.long 0x18 0.--24. 1. " SISG_SET_4 ,Define the set value of the SISG counter #4" line.long 0x1C "SISG_SET_5,SISG set 5 Register" hexmask.long 0x1C 0.--24. 1. " SISG_SET_5 ,Define the set value of the SISG counter #5" line.long 0x20 "SISG_SET_6,SISG set 6 Register" hexmask.long 0x20 0.--24. 1. " SISG_SET_6 ,Define the set value of the SISG counter #6" line.long 0x24 "SISG_CLR_1,SISG clear 1 Register" hexmask.long 0x24 0.--24. 1. " SISG_CLEAR_1 ,Define the clear value of the SISG counter #1" line.long 0x28 "SISG_CLR_2,SISG clear 2 Register" hexmask.long 0x28 0.--24. 1. " SISG_CLEAR_2 ,Define the clear value of the SISG counter #2" line.long 0x2C "SISG_CLR_3,SISG clear 3 Register" hexmask.long 0x2C 0.--24. 1. " SISG_CLEAR_3 ,Define the clear value of the SISG counter #3" line.long 0x30 "SISG_CLR_4,SISG clear 4 Register" hexmask.long 0x30 0.--24. 1. " SISG_CLEAR_4 ,Define the clear value of the SISG counter #4" line.long 0x34 "SISG_CLR_5,SISG clear 5 Register" hexmask.long 0x34 0.--24. 1. " SISG_CLEAR_5 ,Define the clear value of the SISG counter #5" line.long 0x38 "SISG_CLR_6,SISG clear 6 Register" hexmask.long 0x38 0.--24. 1. " SISG_CLEAR_6 ,Define the clear value of the SISG counter #6" textline " " width 25. group.long 0x3c++0x23 line.long 0x00 "IPU_INT_CTRL_1,Interrupt Control Register 1" bitfld.long 0x00 31. " IDMAC_EOF_EN_31 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 29. " IDMAC_EOF_EN_29 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " IDMAC_EOF_EN_28 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " IDMAC_EOF_EN_27 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " IDMAC_EOF_EN_26 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 25. " IDMAC_EOF_EN_25 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " IDMAC_EOF_EN_24 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 23. " IDMAC_EOF_EN_23 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " IDMAC_EOF_EN_22 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " IDMAC_EOF_EN_21 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " IDMAC_EOF_EN_20 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 19. " IDMAC_EOF_EN_19 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " IDMAC_EOF_EN_18 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 17. " IDMAC_EOF_EN_17 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 15. " IDMAC_EOF_EN_15 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " IDMAC_EOF_EN_14 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " IDMAC_EOF_EN_13 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " IDMAC_EOF_EN_12 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " IDMAC_EOF_EN_11 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " IDMAC_EOF_EN_10 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " IDMAC_EOF_EN_9 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDMAC_EOF_EN_8 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " IDMAC_EOF_EN_5 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 3. " IDMAC_EOF_EN_3 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IDMAC_EOF_EN_2 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IDMAC_EOF_EN_1 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IDMAC_EOF_EN_0 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" line.long 0x04 "IPU_INT_CTRL_2,Interrupt Control Register 2" bitfld.long 0x04 20. " IDMAC_EOF_EN_52 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 19. " IDMAC_EOF_EN_51 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " IDMAC_EOF_EN_50 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " IDMAC_EOF_EN_49 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " IDMAC_EOF_EN_48 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 15. " IDMAC_EOF_EN_47 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " IDMAC_EOF_EN_46 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 13. " IDMAC_EOF_EN_45 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " IDMAC_EOF_EN_44 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " IDMAC_EOF_EN_43 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " IDMAC_EOF_EN_42 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 9. " IDMAC_EOF_EN_41 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " IDMAC_EOF_EN_40 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " IDMAC_EOF_EN_33 ,Enable End of Frame of Channel interrupt" "Disabled,Enabled" line.long 0x08 "IPU_INT_CTRL_3,Interrupt Control Register 3" bitfld.long 0x08 31. " IDMAC_NFACK_EN_31 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 29. " IDMAC_NFACK_EN_29 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 28. " IDMAC_NFACK_EN_28 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " IDMAC_NFACK_EN_27 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 26. " IDMAC_NFACK_EN_26 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 25. " IDMAC_NFACK_EN_25 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " IDMAC_NFACK_EN_24 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 23. " IDMAC_NFACK_EN_23 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 22. " IDMAC_NFACK_EN_22 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " IDMAC_NFACK_EN_21 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 20. " IDMAC_NFACK_EN_20 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 19. " IDMAC_NFACK_EN_19 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 18. " IDMAC_NFACK_EN_18 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 17. " IDMAC_NFACK_EN_17 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 15. " IDMAC_NFACK_EN_15 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " IDMAC_NFACK_EN_14 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 13. " IDMAC_NFACK_EN_13 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 12. " IDMAC_NFACK_EN_12 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " IDMAC_NFACK_EN_11 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 10. " IDMAC_NFACK_EN_10 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 9. " IDMAC_NFACK_EN_9 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " IDMAC_NFACK_EN_8 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 5. " IDMAC_NFACK_EN_5 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 3. " IDMAC_NFACK_EN_3 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " IDMAC_NFACK_EN_2 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 1. " IDMAC_NFACK_EN_1 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x08 0. " IDMAC_NFACK_EN_0 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" line.long 0x0c "IPU_INT_CTRL_4,Interrupt Control Register 4" bitfld.long 0x0c 20. " IDMAC_NFACK_EN_52 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 19. " IDMAC_NFACK_EN_51 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 18. " IDMAC_NFACK_EN_50 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 17. " IDMAC_NFACK_EN_49 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 16. " IDMAC_NFACK_EN_48 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 15. " IDMAC_NFACK_EN_47 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 14. " IDMAC_NFACK_EN_46 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 13. " IDMAC_NFACK_EN_45 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 12. " IDMAC_NFACK_EN_44 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 11. " IDMAC_NFACK_EN_43 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 10. " IDMAC_NFACK_EN_42 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 9. " IDMAC_NFACK_EN_41 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0c 8. " IDMAC_NFACK_EN_40 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" bitfld.long 0x0c 1. " IDMAC_NFACK_EN_33 ,Enable New Frame Ack of Channel interrupt" "Disabled,Enabled" line.long 0x10 "IPU_INT_CTRL_5,Interrupt Control Register 5" bitfld.long 0x10 31. " IDMAC_NFB4EOF_EN_31 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 29. " IDMAC_NFB4EOF_EN_29 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 28. " IDMAC_NFB4EOF_EN_28 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " IDMAC_NFB4EOF_EN_27 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 26. " IDMAC_NFB4EOF_EN_26 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_NFB4EOF_EN_25 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " IDMAC_NFB4EOF_EN_24 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 23. " IDMAC_NFB4EOF_EN_23 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 22. " IDMAC_NFB4EOF_EN_22 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " IDMAC_NFB4EOF_EN_21 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 20. " IDMAC_NFB4EOF_EN_20 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 19. " IDMAC_NFB4EOF_EN_19 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " IDMAC_NFB4EOF_EN_18 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 17. " IDMAC_NFB4EOF_EN_17 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 15. " IDMAC_NFB4EOF_EN_15 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IDMAC_NFB4EOF_EN_14 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_NFB4EOF_EN_13 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_NFB4EOF_EN_12 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_NFB4EOF_EN_11 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_NFB4EOF_EN_10 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 9. " IDMAC_NFB4EOF_EN_9 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " IDMAC_NFB4EOF_EN_8 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 5. " IDMAC_NFB4EOF_EN_5 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 3. " IDMAC_NFB4EOF_EN_3 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " IDMAC_NFB4EOF_EN_2 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_NFB4EOF_EN_1 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 0. " IDMAC_NFB4EOF_EN_0 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" line.long 0x14 "IPU_INT_CTRL_6,Interrupt Control Register 6" bitfld.long 0x14 20. " IDMAC_NFB4EOF_EN_52 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 19. " IDMAC_NFB4EOF_EN_51 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 18. " IDMAC_NFB4EOF_EN_50 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " IDMAC_NFB4EOF_EN_49 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 16. " IDMAC_NFB4EOF_EN_48 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 15. " IDMAC_NFB4EOF_EN_47 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " IDMAC_NFB4EOF_EN_46 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 13. " IDMAC_NFB4EOF_EN_45 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 12. " IDMAC_NFB4EOF_EN_44 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " IDMAC_NFB4EOF_EN_43 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 10. " IDMAC_NFB4EOF_EN_42 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 9. " IDMAC_NFB4EOF_EN_41 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " IDMAC_NFB4EOF_EN_40 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x14 1. " IDMAC_NFB4EOF_EN_33 ,New Frame before end-of-frame error indication of Channel interrupt" "Disabled,Enabled" line.long 0x18 "IPU_INT_CTRL_7,Interrupt Control Register 7" bitfld.long 0x18 31. " IDMAC_EOS_EN_31 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 29. " IDMAC_EOS_EN_29 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 28. " IDMAC_EOS_EN_28 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " IDMAC_EOS_EN_27 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 26. " IDMAC_EOS_EN_26 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 25. " IDMAC_EOS_EN_25 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " IDMAC_EOS_EN_24 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 23. " IDMAC_EOS_EN_23 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x18 19. " IDMAC_EOS_EN_19 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" line.long 0x1c "IPU_INT_CTRL_8,Interrupt Control Register 8" bitfld.long 0x1c 20. " IDMAC_EOS_EN_52 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 19. " IDMAC_EOS_EN_51 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 12. " IDMAC_EOS_EN_44 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x1c 11. " IDMAC_EOS_EN_43 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 10. " IDMAC_EOS_EN_42 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x1c 9. " IDMAC_EOS_EN_41 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " IDMAC_EOS_EN_33 ,End of Scroll indication of Channel interrupt" "Disabled,Enabled" line.long 0x20 "IPU_INT_CTRL_9,Interrupt Control Register 9" bitfld.long 0x20 31. " CSI1_PUPE_EN ,CSI1 parameters update error interrupt enable" "Disabled,Enabled" bitfld.long 0x20 30. " CSI0_PUPE_EN ,CSI0 parameters update error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 28. " IC_VF_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" bitfld.long 0x20 27. " IC_ENC_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" bitfld.long 0x20 26. " IC_BAYER_BUF_OVF_EN ,Enables an interrupt that is a result of the IC Buffer overflow" "Disabled,Enabled" textline " " bitfld.long 0x20 0. " VDI_FIFO1_OVF_EN ,FIFO1 overflow Interrupt1 Enable" "Disabled,Enabled" group.long 0x60++0x3f line.long 0x0 "IPU_INT_CTRL_10,Interrupt Control Register 10" bitfld.long 0x0 30. " AXIR_ERR_EN ,AXI read access interrupt enable" "Disabled,Enabled" bitfld.long 0x0 29. " AXIW_ERR_EN ,AXI write access interrupt enable" "Disabled,Enabled" bitfld.long 0x0 28. " NON_PRIVILEGED_ACC_ERR_EN ,Non Privileged Access Error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 26. " IC_BAYER_FRM_LOST_ERR_EN ,IC's Bayer frame lost interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " IC_ENC_FRM_LOST_ERR_EN ,IC's encoding frame lost interrupt enable" "Disabled,Enabled" bitfld.long 0x0 24. " IC_VF_FRM_LOST_ERR_EN ,IC's view finder frame lost interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 22. " DI1_TIME_OUT_ERR_EN ,DI1 time out error interrupt enable" "Disabled,Enabled" bitfld.long 0x0 21. " DI0_TIME_OUT_ERR_EN ,DI0 time out error interrupt enable" "Disabled,Enabled" bitfld.long 0x0 20. " DI1_SYNC_DISP_ERR_EN ,DI1 Synchronous display error enable" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " DI0_SYNC_DISP_ERR_EN ,DI0 Synchronous display error enable" "Disabled,Enabled" bitfld.long 0x0 18. " DC_TEARING_ERR_6_EN ,Tearing Error #6 enable" "Disabled,Enabled" bitfld.long 0x0 17. " DC_TEARING_ERR_2_EN ,Tearing Error #2 enable" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " DC_TEARING_ERR_1_EN ,Tearing Error #1 enable" "Disabled,Enabled" bitfld.long 0x0 3. " SMFC3_FRM_LOST_EN ,Frame Lost of SMFC channel 3 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x0 2. " SMFC2_FRM_LOST_EN ,Frame Lost of SMFC channel 2 interrupt enable bit" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " SMFC1_FRM_LOST_EN ,Frame Lost of SMFC channel 1 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x0 0. " SMFC0_FRM_LOST_EN ,Frame Lost of SMFC channel 0 interrupt enable bit" "Disabled,Enabled" line.long 0x4 "IPU_INT_CTRL_11,IPU Interrupt Control Register 11" bitfld.long 0x4 26. " IDMAC_EOBND_EN_26 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 25. " IDMAC_EOBND_EN_25 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 22. " IDMAC_EOBND_EN_22 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 21. " IDMAC_EOBND_EN_21 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 20. " IDMAC_EOBND_EN_20 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 12. " IDMAC_EOBND_EN_12 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " IDMAC_EOBND_EN_11 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 5. " IDMAC_EOBND_EN_5 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 3. " IDMAC_EOBND_EN_3 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " IDMAC_EOBND_EN_2 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 1. " IDMAC_EOBND_EN_1 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x4 0. " DMAC_EOBND_EN_0 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" line.long 0x8 "IPU_INT_CTRL_12,Interrupt Control Register 12" bitfld.long 0x8 18. " IDMAC_EOBND_EN_50 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 17. " IDMAC_EOBND_EN_49 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 16. " IDMAC_EOBND_EN_48 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x8 15. " IDMAC_EOBND_EN_47 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 14. " IDMAC_EOBND_EN_46 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x8 13. " IDMAC_EOBND_EN_45 ,End-of-band indication of Channel interrupt" "Disabled,Enabled" line.long 0xc "IPU_INT_CTRL_13,Interrupt Control Register 13" bitfld.long 0xc 31. " IDMAC_TH_EN_31 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 29. " IDMAC_TH_EN_29 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 28. " IDMAC_TH_EN_28 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 27. " IDMAC_TH_EN_27 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 26. " IDMAC_TH_EN_26 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 25. " IDMAC_TH_EN_25 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 24. " IDMAC_TH_EN_24 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 23. " IDMAC_TH_EN_23 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 22. " IDMAC_TH_EN_22 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 21. " IDMAC_TH_EN_21 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 20. " IDMAC_TH_EN_20 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 19. " IDMAC_TH_EN_19 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 18. " IDMAC_TH_EN_18 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 17. " IDMAC_TH_EN_17 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 15. " IDMAC_TH_EN_15 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 14. " IDMAC_TH_EN_14 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 13. " IDMAC_TH_EN_13 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 12. " IDMAC_TH_EN_12 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 11. " IDMAC_TH_EN_11 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 10. " IDMAC_TH_EN_10 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 9. " IDMAC_TH_EN_9 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 8. " IDMAC_TH_EN_8 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 5. " IDMAC_TH_EN_5 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 3. " IDMAC_TH_EN_3 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0xc 2. " IDMAC_TH_EN_2 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 1. " IDMAC_TH_EN_1 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0xc 0. " IDMAC_TH_EN_0 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" line.long 0x10 "IPU_INT_CTRL_14,Interrupt Control Register 14" bitfld.long 0x10 20. " IDMAC_TH_EN_52 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 19. " IDMAC_TH_EN_51 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 18. " IDMAC_TH_EN_50 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " IDMAC_TH_EN_49 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 16. " IDMAC_TH_EN_48 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 15. " IDMAC_TH_EN_47 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IDMAC_TH_EN_46 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_TH_EN_45 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_TH_EN_44 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_TH_EN_43 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_TH_EN_42 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 9. " IDMAC_TH_EN_41 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " IDMAC_TH_EN_40 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_TH_EN_33 ,Threshold crossing indication of Channel interrupt" "Disabled,Enabled" line.long 0x14 "IPU_INT_CTRL_15,Interrupt Control Register 15" bitfld.long 0x14 31. " DI1_CNT_EN_PRE_8_EN ,Trigger generated by counter #8 of DI1 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 30. " DI1_CNT_EN_PRE_3_EN ,Trigger generated by counter #3 of DI1 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 29. " DI1_DISP_CLK_EN_PRE_EN , DI1_DISP_CLK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " DI0_CNT_EN_PRE_10_EN ,Trigger generated by counter #10 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 27. " DI0_CNT_EN_PRE_9_EN ,Trigger generated by counter #9 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 26. " DI0_CNT_EN_PRE_8_EN ,Trigger generated by counter #8 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " DI0_CNT_EN_PRE_7_EN ,Trigger generated by counter #7 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 24. " DI0_CNT_EN_PRE_6_EN ,Trigger generated by counter #6 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 23. " DI0_CNT_EN_PRE_5_EN ,Trigger generated by counter #5 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " DI0_CNT_EN_PRE_4_EN ,Trigger generated by counter #4 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 21. " DI0_CNT_EN_PRE_3_EN ,Trigger generated by counter #3 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 20. " DI0_CNT_EN_PRE_2_EN ,Trigger generated by counter #2 of DI0 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " DI0_CNT_EN_PRE_1_EN ,Trigger generated by counter #1 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 18. " DI0_CNT_EN_PRE_0_EN ,Trigger generated by counter #0 of DI0 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 17. " DC_ASYNC_STOP_EN ,DP stops an async flow and moves to a sync flow interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " DC_DP_START_EN ,DP start a new sync or async flow or when an async flow interrupt enable" "Disabled,Enabled" bitfld.long 0x14 15. " DI_VSYNC_PRE_1_EN ,Enables the DI1 interrupt indicating of a VSYNC signal" "Disabled,Enabled" bitfld.long 0x14 14. " DI_VSYNC_PRE_0_EN ,Enables the DI0 interrupt indicating of a VSYNC signal" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " DC_FC_6_EN ,Enables the DC Frame Complete on channel #6 interrupt" "Disabled,Enabled" bitfld.long 0x14 12. " DC_FC_4_EN ,Enables the DC Frame Complete on channel #4 interrupt" "Disabled,Enabled" bitfld.long 0x14 11. " DC_FC_3_EN ,Enables the DC Frame Complete on channel #3 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " DC_FC_2_EN ,Enables the DC Frame Complete on channel #2 interrupt" "Disabled,Enabled" bitfld.long 0x14 9. " DC_FC_1_EN ,Enables the DC Frame Complete on channel #1 interrupt" "Disabled,Enabled" bitfld.long 0x14 8. " DC_FC_0_EN ,Enables the DC Frame Complete on channel #0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " DP_ASF_BRAKE_EN ,DP Async Flow Brake enable bit" "Disabled,Enabled" bitfld.long 0x14 6. " DP_SF_BRAKE_EN ,DP Sync Flow Brake enable bit" "Disabled,Enabled" bitfld.long 0x14 5. " DP_ASF_END_EN ,DP Async Flow End enable bit" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " DP_ASF_START_EN ,DP Async Flow Start enable bit" "Disabled,Enabled" bitfld.long 0x14 3. " DP_SF_END_EN ,DP Sync Flow End enable bit" "Disabled,Enabled" bitfld.long 0x14 2. " DP_SF_START_EN ,DP Sync Flow Start enable bit" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " IPU_SNOOPING2_INT_EN ,IPU snooping 2 interrupt enable bit" "Disabled,Enabled" bitfld.long 0x14 0. " IPU_SNOOPING1_INT_EN ,IPU snooping 1 interrupt enable bit" "Disabled,Enabled" line.long 0x18 "IPU_SDMA_EVENT_1,SDMA Event Control Register 1" bitfld.long 0x18 31. " IDMAC_EOF_SDMA_EN_31 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 29. " IDMAC_EOF_SDMA_EN_29 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 28. " IDMAC_EOF_SDMA_EN_28 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " IDMAC_EOF_SDMA_EN_27 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 26. " IDMAC_EOF_SDMA_EN_26 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 25. " IDMAC_EOF_SDMA_EN_25 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " IDMAC_EOF_SDMA_EN_24 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 23. " IDMAC_EOF_SDMA_EN_23 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 22. " IDMAC_EOF_SDMA_EN_22 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " IDMAC_EOF_SDMA_EN_21 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 20. " IDMAC_EOF_SDMA_EN_20 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 19. " IDMAC_EOF_SDMA_EN_19 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 18. " IDMAC_EOF_SDMA_EN_18 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 17. " IDMAC_EOF_SDMA_EN_17 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 15. " IDMAC_EOF_SDMA_EN_15 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 14. " IDMAC_EOF_SDMA_EN_14 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 13. " IDMAC_EOF_SDMA_EN_13 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 12. " IDMAC_EOF_SDMA_EN_12 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " IDMAC_EOF_SDMA_EN_11 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 10. " IDMAC_EOF_SDMA_EN_10 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 9. " IDMAC_EOF_SDMA_EN_9 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " IDMAC_EOF_SDMA_EN_8 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 5. " IDMAC_EOF_SDMA_EN_5 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 3. " IDMAC_EOF_SDMA_EN_3 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " IDMAC_EOF_SDMA_EN_2 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 1. " IDMAC_EOF_SDMA_EN_1 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x18 0. " IDMAC_EOF_SDMA_EN_0 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" line.long 0x1c "IPU_SDMA_EVENT_2,SDMA Event Control Register 2" bitfld.long 0x1c 20. " IDMAC_EOF_SDMA_EN_52 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 19. " IDMAC_EOF_SDMA_EN_51 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 18. " IDMAC_EOF_SDMA_EN_50 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 17. " IDMAC_EOF_SDMA_EN_49 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 16. " IDMAC_EOF_SDMA_EN_48 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 15. " IDMAC_EOF_SDMA_EN_47 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 14. " IDMAC_EOF_SDMA_EN_46 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 13. " IDMAC_EOF_SDMA_EN_45 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 12. " IDMAC_EOF_SDMA_EN_44 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 11. " IDMAC_EOF_SDMA_EN_43 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 10. " IDMAC_EOF_SDMA_EN_42 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 9. " IDMAC_EOF_SDMA_EN_41 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x1c 8. " IDMAC_EOF_SDMA_EN_40 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x1c 1. " IDMAC_EOF_SDMA_EN_33 ,Enable End of Frame of Channel SDMA event" "Disabled,Enabled" line.long 0x20 "IPU_SDMA_EVENT_3,SDMA Event Control Register 3" bitfld.long 0x20 31. " IDMAC_NFACK_SDMA_EN_31 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 29. " IDMAC_NFACK_SDMA_EN_29 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 28. " IDMAC_NFACK_SDMA_EN_28 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 27. " IDMAC_NFACK_SDMA_EN_27 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 26. " IDMAC_NFACK_SDMA_EN_26 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 25. " IDMAC_NFACK_SDMA_EN_25 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 24. " IDMAC_NFACK_SDMA_EN_24 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 23. " IDMAC_NFACK_SDMA_EN_23 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 22. " IDMAC_NFACK_SDMA_EN_22 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 21. " IDMAC_NFACK_SDMA_EN_21 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 20. " IDMAC_NFACK_SDMA_EN_20 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 19. " IDMAC_NFACK_SDMA_EN_19 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " IDMAC_NFACK_SDMA_EN_18 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 17. " IDMAC_NFACK_SDMA_EN_17 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 15. " IDMAC_NFACK_SDMA_EN_15 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 14. " IDMAC_NFACK_SDMA_EN_14 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 13. " IDMAC_NFACK_SDMA_EN_13 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 12. " IDMAC_NFACK_SDMA_EN_12 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " IDMAC_NFACK_SDMA_EN_11 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 10. " IDMAC_NFACK_SDMA_EN_10 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 9. " IDMAC_NFACK_SDMA_EN_9 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 8. " IDMAC_NFACK_SDMA_EN_8 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 5. " IDMAC_NFACK_SDMA_EN_5 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 3. " IDMAC_NFACK_SDMA_EN_3 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " IDMAC_NFACK_SDMA_EN_2 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 1. " IDMAC_NFACK_SDMA_EN_1 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x20 0. " IDMAC_EOF_SDMA_EN_0 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" line.long 0x24 "IPU_SDMA_EVENT_4,SDMA Event Control Register 4" bitfld.long 0x24 20. " IDMAC_NFACK_SDMA_EN_52 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 19. " IDMAC_NFACK_SDMA_EN_51 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 18. " IDMAC_NFACK_SDMA_EN_50 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 17. " IDMAC_NFACK_SDMA_EN_49 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 16. " IDMAC_NFACK_SDMA_EN_48 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 15. " IDMAC_NFACK_SDMA_EN_47 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 14. " IDMAC_NFACK_SDMA_EN_46 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 13. " IDMAC_NFACK_SDMA_EN_45 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 12. " IDMAC_NFACK_SDMA_EN_44 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " IDMAC_NFACK_SDMA_EN_43 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 10. " IDMAC_NFACK_SDMA_EN_42 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 9. " IDMAC_NFACK_SDMA_EN_41 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " IDMAC_NFACK_SDMA_EN_40 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x24 1. " IDMAC_NFACK_SDMA_EN_33 ,Enable New Frame Acknowledge of Channel SDMA event" "Disabled,Enabled" line.long 0x28 "IPU_SDMA_EVENT_7,SDMA Event Control Register 7" bitfld.long 0x28 31. " IDMAC_EOS_SDMA_EN_31 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 29. " IDMAC_EOS_SDMA_EN_29 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 28. " IDMAC_EOS_SDMA_EN_28 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x28 27. " IDMAC_EOS_SDMA_EN_27 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 26. " IDMAC_EOS_SDMA_EN_26 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 25. " IDMAC_EOS_SDMA_EN_25 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x28 24. " IDMAC_EOS_SDMA_EN_24 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 23. " IDMAC_EOS_SDMA_EN_23 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x28 19. " IDMAC_EOS_SDMA_EN_19 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" line.long 0x2c "IPU_SDMA_EVENT_8,SDMA Event Control Register 8" bitfld.long 0x2c 20. " IDMAC_EOS_SDMA_EN_52 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 19. " IDMAC_EOS_SDMA_EN_51 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 12. " IDMAC_EOS_SDMA_EN_44 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x2c 11. " IDMAC_EOS_SDMA_EN_43 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 10. " IDMAC_EOS_SDMA_EN_42 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x2c 9. " IDMAC_EOS_SDMA_EN_41 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x2c 1. " IDMAC_EOS_SDMA_EN_33 ,Enable End of Scroll of Channel SDMA event" "Disabled,Enabled" line.long 0x30 "IPU_SDMA_EVENT_11,SDMA Event Control Register 11" bitfld.long 0x30 26. " IDMAC_EOBND_SDMA_EN_26 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 25. " DMAC_EOBND_SDMA_EN_25 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 22. " IDMAC_EOBND_SDMA_EN_22 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 21. " DMAC_EOBND_SDMA_EN_21 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 20. " IDMAC_EOBND_SDMA_EN_20 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 12. " IDMAC_EOBND_SDMA_EN_12 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 11. " IDMAC_EOBND_SDMA_EN_11 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 5. " IDMAC_EOBND_SDMA_EN_5 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 3. " IDMAC_EOBND_SDMA_EN_3 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x30 2. " IDMAC_EOBND_SDMA_EN_2 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 1. " IDMAC_EOBND_SDMA_EN_1 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x30 0. " IDMAC_EOBND_SDMA_EN_0 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" line.long 0x34 "IPU_SDMA_EVENT_12,SDMA Event Control Register 12" bitfld.long 0x34 18. " IDMAC_EOBND_SDMA_EN_50 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 17. " IDMAC_EOBND_SDMA_EN_49 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 16. " IDMAC_EOBND_SDMA_EN_48 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x34 15. " IDMAC_EOBND_SDMA_EN_47 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 14. " IDMAC_EOBND_SDMA_EN_46 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x34 13. " IDMAC_EOBND_SDMA_EN_45 ,Enable End of Band of Channel SDMA event" "Disabled,Enabled" line.long 0x38 "IPU_SDMA_EVENT_13,SDMA Event Control Register 13" bitfld.long 0x38 31. " IDMAC_TH_SDMA_EN_31 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 29. " IDMAC_TH_SDMA_EN_29 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 28. " IDMAC_TH_SDMA_EN_28 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 27. " IDMAC_TH_SDMA_EN_27 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 26. " IDMAC_TH_SDMA_EN_26 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 25. " IDMAC_TH_SDMA_EN_25 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 24. " IDMAC_TH_SDMA_EN_24 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 23. " IDMAC_TH_SDMA_EN_23 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 22. " IDMAC_TH_SDMA_EN_22 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 21. " IDMAC_TH_SDMA_EN_21 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 20. " IDMAC_TH_SDMA_EN_20 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 19. " IDMAC_TH_SDMA_EN_19 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 18. " IDMAC_TH_SDMA_EN_18 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 17. " IDMAC_TH_SDMA_EN_17 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 15. " IDMAC_TH_SDMA_EN_15 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 14. " IDMAC_TH_SDMA_EN_14 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 13. " IDMAC_TH_SDMA_EN_13 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 12. " IDMAC_TH_SDMA_EN_12 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 11. " IDMAC_TH_SDMA_EN_11 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 10. " IDMAC_TH_SDMA_EN_10 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 9. " IDMAC_TH_SDMA_EN_9 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 8. " IDMAC_TH_SDMA_EN_8 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 5. " IDMAC_TH_SDMA_EN_5 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 3. " IDMAC_TH_SDMA_EN_3 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x38 2. " IDMAC_TH_SDMA_EN_2 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 1. " IDMAC_TH_SDMA_EN_1 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x38 0. " IDMAC_TH_SDMA_EN_0 ,Enable Threshold of Channel SDMA event" "Disabled,Enabled" line.long 0x3c "IPU_SDMA_EVENT_14,SDMA Event Control Register 14" bitfld.long 0x3c 20. " IDMAC_TH_SDMA_EN_52 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 19. " IDMAC_TH_SDMA_EN_51 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 18. " IDMAC_TH_SDMA_EN_50 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 17. " IDMAC_TH_SDMA_EN_49 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 16. " IDMAC_TH_SDMA_EN_48 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 15. " IDMAC_TH_SDMA_EN_47 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 14. " IDMAC_TH_SDMA_EN_46 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 13. " IDMAC_TH_SDMA_EN_45 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 12. " IDMAC_TH_SDMA_EN_44 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 11. " IDMAC_TH_SDMA_EN_43 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 10. " IDMAC_TH_SDMA_EN_42 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 9. " IDMAC_TH_SDMA_EN_41 ,Threshold of Channel SDMA event" "Disabled,Enabled" textline " " bitfld.long 0x3c 8. " IDMAC_TH_SDMA_EN_40 ,Threshold of Channel SDMA event" "Disabled,Enabled" bitfld.long 0x3c 1. " IDMAC_TH_SDMA_EN_33 ,Threshold of Channel SDMA event" "Disabled,Enabled" group.long 0xa0++0x13 line.long 0x00 "IPU_SRM_PRI1,Shadow Registers Memory Priority 1 Register" bitfld.long 0x00 11.--12. " CSI0_SRM_MODE ,CSI0 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x00 8.--10. " CSI0_SRM_PRI ,CSI0 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3.--4. " CSI1_SRM_MODE ,CSI1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x00 0.--2. " CSI1_SRM_PRI ,CSI1 SRM priority" "0,1,2,3,4,5,6,7" line.long 0x04 "IPU_SRM_PRI2,Shadow Registers Memory Priority 2 Register" bitfld.long 0x04 27.--28. " DI1_SRM_MODE ,DCI1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 24.--26. " DI1_SRM_PRI ,DI1 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 19.--20. " DI0_SRM_MCU_USE ,DI0 SRM is used by ARM platform" "Not updated,Updated,," textline " " bitfld.long 0x04 16.--18. " DI0_SRM_PRI ,DI0 SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 14.--15. " DC_6_SRM_MODE ,DC Group #6 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 12.--13. " DC_2_SRM_MODE ,DC Group #2 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x04 9.--11. " DC_SRM_PRI ,DC SRM priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7.--8. " DP_A1_SRM_MODE ,DP Async flow #1 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" bitfld.long 0x04 5.--6. " DP_A0_SRM_MODE ,DP Async flow #0 SRM Mode" "Disabled,Next frame,Frame by frame,Update now" textline " " bitfld.long 0x04 3.--4. " DP_S_SRM_MODE ,DP sync flow SRM Mode" "Disabled,Next frame,,Update now" bitfld.long 0x04 0.--2. " DP_SRM_PRI ,DC SRM priority" "0,1,2,3,4,5,6,7" line.long 0x08 "IPU_FS_PROC_FLOW1,FSU Processing Flow 1 Register" bitfld.long 0x08 31. " VF_IN_VALID ,View-finder input valid" "Skipped,Used" bitfld.long 0x08 30. " ENC_IN_VALID ,Encoding input valid" "Skipped,Used" bitfld.long 0x08 28.--29. " VDI_SRC_SEL ,Source select for the VDI" "MCU,CSI direct (cb7),?..." textline " " bitfld.long 0x08 24.--27. " PRP_SRC_SEL ,Source select for the Pre Processing Task" "MCU,Capture0 (smfc0),,Capture2 (smfco2),,IC direct (cb7),IRT Encoding,IRT viewfinder,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 22.--23. " VDI3_SRC_SEL ,Source select for the VDIC plane #3" "MCU,Viewfinder,Playback,Post-processing" bitfld.long 0x08 20.--21. " VDI1_SRC_SEL ,Source select for the VDIC plane #1" "MCU,Viewfinder,Playback,Post-processing" textline " " bitfld.long 0x08 16.--19. " PP_ROT_SRC_SEL ,Source select for the pre processing task of the IRT" "MCU,Capture0 (smfc0),,Capture2 (smfc2),,Post-processing,,,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 12.--15. " PP_SRC_SEL ,Source select for the pre processing task of the IC" "MCU,Capture0 (smfc0),,Capture2 (smfc2),,,Rotation,,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x08 8.--11. " PRPVF_ROT_SRC_SEL ,Source select for the view finder task of the IRT" "MCU,Capture0 (smfc0),Capture1 (smfc1),Capture2 (smfc2),Capture3 (smfc3),IC direct (cb7),,,View-finder,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" textline " " bitfld.long 0x08 0.--3. " PRPENC_ROT_SRC_SEL ,Source select for the encoding task of the IRT" "MCU,Capture0 (smfc0),Capture1 (smfc1),Capture2 (smfc2),Capture3 (smfc3),IC direct (cb7),,Encoding,,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" line.long 0x0c "IPU_FS_PROC_FLOW2,FSU Processing Flow 2 Register" bitfld.long 0x0c 24.--27. " PRP_DEST_SEL ,Pre processing destination select" "MCU,IC input buffer (ch12),PP (ch11),PP_ROT (ch47),DC1 (ch28),DC2 (ch41),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),DP_SYNC1 (ch27),DP_SYNC0 (ch23),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29),?..." bitfld.long 0x0c 20.--23. " PRPENC_ROT_DEST_SEL ,Destination select for Rotation task coming from the Encoding input" "MCU,,,,,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 16.--19. " PP_ROT_DEST_SEL ,Destination select for Rotation task coming from the Post Processing input" "MCU,,,,IC Playback,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x0c 12.--15. " PP_DEST_SEL ,Destination select for post processing task" "MCU,,,IRT playback,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 8.--11. " PRPVF_ROT_DEST_SEL ,Destination select for Rotation task coming from the View finder input" "MCU,,,VDI_PLANE3 (ch25),VDI_PLANE1 (ch26),IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" bitfld.long 0x0c 4.--7. " PRPVF_DEST_SEL ,Destination select for View finder task" "MCU,IRT viewfinder,,,,,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x0c 0.--3. " PRP_ENC_DEST_SEL ,Destination select for Encoding task" "MCU,IRT Encoding,,,,,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" line.long 0x10 "IPU_FS_PROC_FLOW3,FSU Processing Flow 3 Register" bitfld.long 0x10 24.--25. " VPU_DEST_SEL ,Selects the corresponding IDMAC channel's EOL indication" "Disabled,capture0 (smfc0),capture2 (smfc2),IC viewfinder (ch21)" bitfld.long 0x10 22.--23. " EXT_SRC2_DEST_SEL ,Destination select for External Source 2" "Disabled,DP_SYNC0 (ch23),DP_SYNC1 (ch27),DC1 (ch28)" bitfld.long 0x10 20.--21. " EXT_SRC1_DEST_SEL ,Destination select for External Source 1" "Disabled,DP_SYNC0 (ch23),DP_SYNC1 (ch27),DC1 (ch28)" textline " " bitfld.long 0x10 16.--17. " VDOA_DEST_SEL ,Destination select for VDOA" "Disabled,IC Playback,VDI,?..." bitfld.long 0x10 11.--13. " SMFC3_DEST_SEL ,Destination select for SMFC3" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,?..." bitfld.long 0x10 7.--10. " SMFC2_DEST_SEL ,Destination select for SMFC2" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" textline " " bitfld.long 0x10 4.--6. " SMFC1_DEST_SEL ,Destination select for SMFC1" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,?..." bitfld.long 0x10 0.--3. " SMFC0_DEST_SEL ,Destination select for SMFC0" "MCU,IRT Encoding,IRT viewfinder,IRT playback,IC Playback,IC Pre Processing,,DC1 (ch28),DC2 (ch41),DP_SYNC0 (ch23),DP_SYNC1 (ch27),DP_ASYNC1 (ch24),DP_ASYNC0 (ch29),Alt DC2 (ch41),Alt DP_ASYNC1 (ch24),Alt DP_ASYNC0 (ch29)" group.long 0xb4++0xb line.long 0x00 "IPU_FS_DISP_FLOW1,FSU Displaying Flow 1 Register" bitfld.long 0x00 20.--23. " DC1_SRC_SEL ,Source select for DS1/DS2 - MG (graphics) plane (ch28)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,External source 1,Snoop1,External source 2" bitfld.long 0x00 16.--19. " DC2_SRC_SEL ,Source select for DS3 (ch41)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x00 12.--15. " DP_ASYNC1_SRC_SEL ,Source select for DS1/DS2 - Vx (video) plane (ch24)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" textline " " bitfld.long 0x00 8.--11. " DP_ASYNC0_SRC_SEL ,Source select for DS2 - MG (graphics) plane (ch29)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x00 4.--7. " DP_SYNC1_SRC_SEL ,Source select for DS1/DS2 - Vx (video) plane (ch27)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,,,,Snoop1,Snoop2" bitfld.long 0x00 0.--3. " DP_SYNC0_SRC_SEL ,Source select for DS2 - MG (graphics) plane (ch23))" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,,,,Snoop1,Snoop2" line.long 0x04 "IPU_FS_DISP_FLOW2,FSU Displaying Flow 2 Register" bitfld.long 0x04 16.--19. " DC2_ALT_SRC_SEL ,Source select for Alternate DS3 (ch41)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x04 4.--7. " DP_ASYNC1_ALT_SRC_SEL ,Source select for alternate DS1/DS2 - Vx (video) plane (ch24)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" bitfld.long 0x04 0.--3. " DP_ASYNC0_ALT_SRC_SEL ,Source select for alternate DS2 - MG (graphics) plane (ch29)" "MCU,Capture0 (smfc0),Capture2 (smfc2),IC encoding,IC viewfinder,IC playback,IRT Encoding,IRT viewfinder,IRT playback,,,Autoref,Autoref+snoop1,Autoref+snoop2,Snoop1,Snoop2" line.long 0x08 "IPU_SKIP,IPU SKIP Register" hexmask.long.word 0x08 20.--31. 1. " VDI_SKIP ,VDI Skip" bitfld.long 0x08 16.--19. " VDI_MAX_RATIO_SKIP ,Maximum Ratio Skip for VDIC" "Disabled,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x08 11.--15. " CSI_SKIP_IC_VF ,Skipping pattern of the frames send to the IC for view finder" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 8.--10. " CSI_MAX_RATIO_SKIP_IC_VF ,CSI Maximum Ratio Skip for IC (view finder task)" "Disabled,1,2,3,4,?..." bitfld.long 0x08 3.--7. " CSI_SKIP_IC_ENC ,Skipping pattern of the frames send to the IC for encoding" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--2. " CSI_MAX_RATIO_SKIP_IC_ENC ,CSI Maximum Ratio Skip for IC (encoding task)" "Disabled,1,2,3,4,?..." textline " " group.long 0xc4++0x13 line.long 0x00 "IPU_DISP_GEN,Display General control Register" bitfld.long 0x00 25. " DI1_COUNTER_RELEASE ,DI1 Counter release" "Cleared and stopped,Released and running" bitfld.long 0x00 24. " DI0_COUNTER_RELEASE ,DI0 Counter release" "Cleared and stopped,Released and running" bitfld.long 0x00 23. " CSI_VSYNC_DEST ,Destination of the VSYNC coming from the CSI's" "CSI0_VSYNC to DI0 & CSI1_VSYNC to DI1,CSI1_VSYNC to DI0 & CSI0_VSYNC to DI1" textline " " bitfld.long 0x00 22. " MCU_MAX_BURST_STOP ,MCU Maximal burst" "Unlimited,8-beat" bitfld.long 0x00 18.--21. " MCU_T ,MCU address space MSB-T" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,?..." bitfld.long 0x00 17. " MCU_DI_ID_9 ,Defines the DI that the MCU DC's access via channel #9" "Via DI0,Via DI1" textline " " bitfld.long 0x00 16. " MCU_DI_ID_8 ,Defines the DI that the MCU DC's access via channel #8" "Via DI0,Via DI1" bitfld.long 0x00 6. " DP_PIPE_CLR ,DP Pipe Clear" "Idle,Cleared" bitfld.long 0x00 5. " DP_FG_EN_ASYNC1 ,FG_EN - partial plane Enable for async flow 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DP_FG_EN_ASYNC0 ,FG_EN - partial plane Enable for async flow 0" "Disabled,Enabled" bitfld.long 0x00 3. " DP_ASYNC_DOUBLE_FLOW ,DP Async Double Flow" "Single,Double" bitfld.long 0x00 2. " DC2_DOUBLE_FLOW ,DC2 Double Flow" "Single,Double" textline " " bitfld.long 0x00 1. " DI1_DUAL_MODE ,DI1 dual mode control" "Not dual,Dual" bitfld.long 0x00 0. " DI0_DUAL_MODE ,DI0 dual mode control" "Not dual,Dual" textline " " line.long 0x04 "IPU_DISP_ALT1,Display Alternate flow control Register 1" bitfld.long 0x04 28.--31. " SEL_ALT_0 ,Select alternative parameters instead of DI Sync Wave Gen counter?..." "Disabled,1,2,3,4,5,6,7,8,?..." hexmask.long.word 0x04 16.--27. 1. " STEP_REPEAT_ALT_0 ,Defines the amount of repetitions that will be performed by the counter" bitfld.long 0x04 15. " CNT_AUTO_RELOAD_ALT_0 ,Counter auto reload mode" "Not automatically,Automatically" textline " " bitfld.long 0x04 12.--14. " CNT_CLR_SEL_ALT_0 ,Counter Clear select" "Disabled,Triggered,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x04 0.--11. 1. " RUN_VALUE_M1_ALT_0 ,Counter pre defined value" line.long 0x08 "IPU_DISP_ALT2,Display Alternate flow control Register 2" bitfld.long 0x08 16.--18. " RUN_RESOLUTION_ALT_0 ,Counter Run Resolution" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " OFFSET_RESOLUTION_ALT0 ,Counter offset Resolution" "0,1,2,3,4,5,6,7" hexmask.long.word 0x08 0.--11. 1. " OFFSET_VALUE_ALT_0 ,Counter offset value" line.long 0x0c "IPU_DISP_ALT3,Display Alternate flow control Register 3" bitfld.long 0x0c 28.--31. " SEL_ALT_1 ,Select alternative parameters instead of DI Sync Wave Gen counter?..." "Disabled,1,2,3,4,5,6,7,8,?..." hexmask.long.word 0x0c 16.--27. 1. " STEP_REPEAT_ALT_1 ,Defines the amount of repetitions that will be performed by the counter" bitfld.long 0x0c 15. " CNT_AUTO_RELOAD_ALT_1 ,Counter auto reload mode" "Not automatically,Automatically" textline " " bitfld.long 0x0c 12.--14. " CNT_CLR_SEL_ALT_1 ,Counter Clear select" "Disabled,Same as display clock,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0c 0.--11. 1. " RUN_VALUE_M1_ALT_1 ,Counter pre defined value" line.long 0x10 "IPU_DISP_ALT4,Display Alternate flow control Register 4" bitfld.long 0x10 16.--18. " RUN_RESOLUTION_ALT_1 ,Counter Run Resolution" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. " OFFSET_RESOLUTION_ALT1 ,Counter offset Resolution" "0,1,2,3,4,5,6,7" hexmask.long.word 0x10 0.--11. 1. " OFFSET_VALUE_ALT_1 ,Counter offset value" ; line.long 0x14 "IPU_SNOOP,Autorefresh and Snooping Control Register" ; bitfld.long 0x14 16. " SNOOP2_SYNC_BYP ,Bypass of the synchronizer on emi_snooping2 signal" "Normal,Bypassed" ; hexmask.long.word 0x14 0.--9. 1. " AUTOREF_PER ,Autorefresh period minus 1" group.long 0xdc++0x0B line.long 0x00 "IPU_MEM_RST,Memory Reset Control Register" bitfld.long 0x00 31. " RST_MEM_START ,Memory Reset Start" "No reset,Reset" bitfld.long 0x00 22. " RST_MEM_EN[22] ,Reset Memory Enable (dmfc_wr)" "Disabled,Enabled" bitfld.long 0x00 21. " RST_MEM_EN[21] ,Reset Memory Enable (dmfc_rd)" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " RST_MEM_EN[20] ,Reset Memory Enable (dc_template)" "Disabled,Enabled" bitfld.long 0x00 15. " RST_MEM_EN[15] ,Reset Memory Enable (vdi_fifo1)" "Disabled,Enabled" bitfld.long 0x00 14. " RST_MEM_EN[14] ,Reset Memory Enable (icb)" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RST_MEM_EN[13] ,Reset Memory Enable (vdi_fifo3)" "Disabled,Enabled" bitfld.long 0x00 12. " RST_MEM_EN[12] ,Reset Memory Enable (vdi_fifo2)" "Disabled,Enabled" bitfld.long 0x00 11. " RST_MEM_EN[11] ,Reset Memory Enable (ram_smfc)" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RST_MEM_EN[10] ,Reset Memory Enable (lut1)" "Disabled,Enabled" bitfld.long 0x00 9. " RST_MEM_EN[9] ,Reset Memory Enable (lut0)" "Disabled,Enabled" bitfld.long 0x00 8. " RST_MEM_EN[8] ,Reset Memory Enable (dsom)" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RST_MEM_EN[7] ,Reset Memory Enable (dstm)" "Disabled,Enabled" bitfld.long 0x00 6. " RST_MEM_EN[6] ,Reset Memory Enable (rm)" "Disabled,Enabled" bitfld.long 0x00 5. " RST_MEM_EN[5] ,Reset Memory Enable (bm)" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RST_MEM_EN[4] ,Reset Memory Enable (mpm)" "Disabled,Enabled" bitfld.long 0x00 3. " RST_MEM_EN[3] ,Reset Memory Enable (tpm)" "Disabled,Enabled" bitfld.long 0x00 2. " RST_MEM_EN[2] ,Reset Memory Enable (cpmem)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RST_MEM_EN[1] ,Reset Memory Enable (alpha)" "Disabled,Enabled" bitfld.long 0x00 0. " RST_MEM_EN[0] ,Reset Memory Enable (srm)" "Disabled,Enabled" line.long 0x04 "IPU_PM,Power modes Control Register" bitfld.long 0x04 31. " LPSR_MODE ,LPSR Mode enable" "Disabled,Enabled" bitfld.long 0x04 30. " DI1_SRM_CLOCK_CHANGE_MODE ,SRM clock change mode" "Disabled,Enabled" hexmask.long.byte 0x04 23.--29. 1. " DI1_CLK_PERIOD_1 ,DI1_CLK period option 1" textline " " hexmask.long.byte 0x04 16.--22. 1. " DI1_CLK_PERIOD_0 ,DI1_CLK period option 0" rbitfld.long 0x04 15. " CLCOK_MODE_STAT ,Clock mode status" "0,1" bitfld.long 0x04 14. " DI0_SRM_CLOCK_CHANGE_MODE ,SRM clock change mode" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 7.--13. 1. " DI0_CLK_PERIOD_1 ,DI0_CLK period option 1" hexmask.long.byte 0x04 0.--6. 1. " DI0_CLK_PERIOD_0 ,DI0_CLK period option 0" line.long 0x08 "IPU_GPR,General Purpose Register" eventfld.long 0x08 31. " IPU_CH_BUF1_RDY1_CLR ,Defines the IPU_CH_BUF1_RDY1 properties" "W1s,W1c" eventfld.long 0x08 30. " IPU_CH_BUF1_RDY0_CLR ,Defines the IPU_CH_BUF1_RDY0 properties" "W1s,W1c" eventfld.long 0x08 29. " IPU_CH_BUF0_RDY1_CLR ,Defines the IPU_CH_BUF0_RDY1 properties" "W1s,W1c" textline " " eventfld.long 0x08 28. " IPU_CH_BUF0_RDY0_CLR ,Defines the IPU_CH_BUF0_RDY0 properties" "W1s,W1c" eventfld.long 0x08 27. " IPU_ALT_CH_BUF1_RDY1_CLR ,Defines the IPU_ALT_CH_BUF1_RDY1 properties" "W1s,W1c" eventfld.long 0x08 26. " IPU_ALT_CH_BUF1_RDY0_CLR ,Defines the IPU_ALT_CH_BUF1_RDY0 properties" "W1s,W1c" textline " " eventfld.long 0x08 25. " IPU_ALT_CH_BUF0_RDY1_CLR ,Defines the IPU_ALT_CH_BUF0_RDY1 properties" "W1s,W1c" eventfld.long 0x08 24. " IPU_ALT_CH_BUF0_RDY0_CLR ,Defines the IPU_ALT_CH_BUF0_RDY0 properties" "W1s,W1c" bitfld.long 0x08 23. " IPU_DI1_CLK_CHANGE_ACK_DIS ,Disable DI1's clock change mechanism" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x08 22. " IPU_DI0_CLK_CHANGE_ACK_DIS ,Disable DI0's clock change mechanism" "Not acknowledged,Acknowledged" eventfld.long 0x08 21. " IPU_CH_BUF2_RDY1_CLR ,Defines the IPU_CH_BUF2_RDY1 properties" "W1s,W1c" eventfld.long 0x08 20. " IPU_CH_BUF2_RDY0_CLR ,Defines the IPU_CH_BUF2_RDY0 properties" "W1s,W1c" textline " " hexmask.long.tbyte 0x08 0.--19. 1. " IPU_GP ,General Purpose bit" group.long 0x150++0x07 line.long 0x00 "IPU_CH_DB_MODE_SEL0,Channel Double Buffer Mode Select 0 Register" bitfld.long 0x00 31. " DMA_CH_DB_MODE_SEL_31 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 29. " DMA_CH_DB_MODE_SEL_29 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 28. " DMA_CH_DB_MODE_SEL_28 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 27. " DMA_CH_DB_MODE_SEL_27 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 26. " DMA_CH_DB_MODE_SEL_26 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 25. " DMA_CH_DB_MODE_SEL_25 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 24. " DMA_CH_DB_MODE_SEL_24 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 23. " DMA_CH_DB_MODE_SEL_23 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 22. " DMA_CH_DB_MODE_SEL_22 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 21. " DMA_CH_DB_MODE_SEL_21 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 20. " DMA_CH_DB_MODE_SEL_20 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 19. " DMA_CH_DB_MODE_SEL_19 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 18. " DMA_CH_DB_MODE_SEL_18 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 17. " DMA_CH_DB_MODE_SEL_17 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 15. " DMA_CH_DB_MODE_SEL_15 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 14. " DMA_CH_DB_MODE_SEL_14 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 13. " DMA_CH_DB_MODE_SEL_13 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 12. " DMA_CH_DB_MODE_SEL_12 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 11. " DMA_CH_DB_MODE_SEL_11 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 10. " DMA_CH_DB_MODE_SEL_10 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 9. " DMA_CH_DB_MODE_SEL_9 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 8. " DMA_CH_DB_MODE_SEL_8 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 5. " DMA_CH_DB_MODE_SEL_5 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 3. " DMA_CH_DB_MODE_SEL_3 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 2. " DMA_CH_DB_MODE_SEL_2 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 1. " DMA_CH_DB_MODE_SEL_1 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 0. " DMA_CH_DB_MODE_SEL_0 ,Double buffer mode select" "Not used,Used" line.long 0x04 "IPU_CH_DB_MODE_SEL1,Channel Double Buffer Mode Select 1 Register" bitfld.long 0x04 20. " DMA_CH_DB_MODE_SEL_52 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 19. " DMA_CH_DB_MODE_SEL_51 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 18. " DMA_CH_DB_MODE_SEL_50 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 17. " DMA_CH_DB_MODE_SEL_49 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 16. " DMA_CH_DB_MODE_SEL_48 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 15. " DMA_CH_DB_MODE_SEL_47 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 14. " DMA_CH_DB_MODE_SEL_46 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 13. " DMA_CH_DB_MODE_SEL_45 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 12. " DMA_CH_DB_MODE_SEL_44 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 11. " DMA_CH_DB_MODE_SEL_43 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 10. " DMA_CH_DB_MODE_SEL_42 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 9. " DMA_CH_DB_MODE_SEL_41 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x04 8. " DMA_CH_DB_MODE_SEL_40 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 1. " DMA_CH_DB_MODE_SEL_33 ,Double buffer mode select" "Not used,Used" group.long 0x168++0x07 line.long 0x00 "IPU_ALT_CH_DB_MODE_SEL0,Alternate Channel Double Buffer Mode Select 0 Register" bitfld.long 0x00 29. " DMA_CH_ALT_DB_MODE_SEL_29 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 24. " DMA_CH_ALT_DB_MODE_SEL_24 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 7. " DMA_CH_ALT_DB_MODE_SEL_7 ,Double buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 6. " DMA_CH_ALT_DB_MODE_SEL_6 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 5. " DMA_CH_ALT_DB_MODE_SEL_5 ,Double buffer mode select" "Not used,Used" bitfld.long 0x00 4. " DMA_CH_ALT_DB_MODE_SEL_4 ,Double buffer mode select" "Not used,Used" line.long 0x04 "IPU_ALT_CH_DB_MODE_SEL1,Alternate Channel Double Buffer Mode Select 1 Register" bitfld.long 0x04 20. " DMA_CH_ALT_DB_MODE_SEL_52 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 9. " DMA_CH_ALT_DB_MODE_SEL_41 ,Double buffer mode select" "Not used,Used" bitfld.long 0x04 1. " DMA_CH_ALT_DB_MODE_SEL_33 ,Double buffer mode select" "Not used,Used" group.long 0x178++0x07 line.long 0x00 "IPU_CH_TRB_MODE_SEL0,IPU Channel Triple Buffer Mode Select 0 Register" bitfld.long 0x00 28. " DMA_CH_TRB_MODE_SEL_28 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 27. " DMA_CH_TRB_MODE_SEL_27 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 23. " DMA_CH_TRB_MODE_SEL_23 ,Triple buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 21. " DMA_CH_TRB_MODE_SEL_21 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 13. " DMA_CH_TRB_MODE_SEL_13 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 10. " DMA_CH_TRB_MODE_SEL_10 ,Triple buffer mode select" "Not used,Used" textline " " bitfld.long 0x00 9. " DMA_CH_TRB_MODE_SEL_9 ,Triple buffer mode select" "Not used,Used" bitfld.long 0x00 8. " DMA_CH_TRB_MODE_SEL_8 ,Triple buffer mode select" "Not used,Used" tree "IPU Status registers" width 22. group.long 0x200++0xF line.long 0x00 "IPU_INT_STAT_1,Interrupt Status Register 1" eventfld.long 0x00 31. " IDMAC_EOF_31 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 29. " IDMAC_EOF_29 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 28. " IDMAC_EOF_28 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 27. " IDMAC_EOF_27 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 26. " IDMAC_EOF_26 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 25. " IDMAC_EOF_25 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 24. " IDMAC_EOF_24 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 23. " IDMAC_EOF_23 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 22. " IDMAC_EOF_22 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 21. " IDMAC_EOF_21 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 20. " IDMAC_EOF_20 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 19. " IDMAC_EOF_19 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 18. " IDMAC_EOF_18 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 17. " IDMAC_EOF_17 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 15. " IDMAC_EOF_15 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 14. " IDMAC_EOF_14 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 13. " IDMAC_EOF_13 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 12. " IDMAC_EOF_12 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 11. " IDMAC_EOF_11 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 10. " IDMAC_EOF_10 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 9. " IDMAC_EOF_9 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 8. " IDMAC_EOF_8 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 5. " IDMAC_EOF_5 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 3. " IDMAC_EOF_3 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 2. " IDMAC_EOF_2 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 1. " IDMAC_EOF_1 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 0. " IDMAC_EOF_0 ,Enable End of Frame of Channel interrupt" "Cleared,Requested" line.long 0x04 "IPU_INT_STAT_2,Interrupt Status Register 2" eventfld.long 0x04 20. " IDMAC_EOF_52 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 19. " IDMAC_EOF_51 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 18. " IDMAC_EOF_50 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 17. " IDMAC_EOF_49 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 16. " IDMAC_EOF_48 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 15. " IDMAC_EOF_47 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 14. " IDMAC_EOF_46 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 13. " IDMAC_EOF_45 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 12. " IDMAC_EOF_44 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 11. " IDMAC_EOF_43 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 10. " IDMAC_EOF_42 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 9. " IDMAC_EOF_41 ,End of Frame of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 8. " IDMAC_EOF_40 ,End of Frame of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 1. " IDMAC_EOF_33 ,End of Frame of Channel interrupt" "Cleared,Requested" line.long 0x08 "IPU_INT_STAT_3,Interrupt Status Register 3" eventfld.long 0x08 31. " IDMAC_NFACK_31 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 29. " IDMAC_NFACK_29 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 28. " IDMAC_NFACK_28 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 27. " IDMAC_NFACK_27 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 26. " IDMAC_NFACK_26 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 25. " IDMAC_NFACK_25 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 24. " IDMAC_NFACK_24 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 23. " IDMAC_NFACK_23 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 22. " IDMAC_NFACK_22 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 21. " IDMAC_NFACK_21 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 20. " IDMAC_NFACK_20 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 19. " IDMAC_NFACK_19 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 18. " IDMAC_NFACK_18 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 17. " IDMAC_NFACK_17 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 15. " IDMAC_NFACK_15 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 14. " IDMAC_NFACK_14 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 13. " IDMAC_NFACK_13 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 12. " IDMAC_NFACK_12 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 11. " IDMAC_NFACK_11 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 10. " IDMAC_NFACK_10 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 9. " IDMAC_NFACK_9 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 8. " IDMAC_NFACK_8 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 5. " IDMAC_NFACK_5 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 3. " IDMAC_NFACK_3 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 2. " IDMAC_NFACK_2 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 1. " IDMAC_NFACK_1 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 0. " IDMAC_NFACK_0 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" line.long 0x0C "IPU_INT_STAT_4,Interrupt Status Register 4" eventfld.long 0x0C 20. " IDMAC_NFACK_52 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 19. " IDMAC_NFACK_51 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 18. " IDMAC_NFACK_50 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 17. " IDMAC_NFACK_49 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 16. " IDMAC_NFACK_48 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 15. " IDMAC_NFACK_47 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 14. " IDMAC_NFACK_46 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 13. " IDMAC_NFACK_45 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 12. " IDMAC_NFACK_44 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 11. " IDMAC_NFACK_43 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 10. " IDMAC_NFACK_42 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 9. " IDMAC_NFACK_41 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0C 8. " IDMAC_NFACK_40 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x0C 1. " IDMAC_NFACK_33 ,Enable New Frame Ack of Channel interrupt" "Cleared,Requested" group.long 0x210++0x2b line.long 0x00 "IPU_INT_STAT_5,Interrupt Status Register 5" eventfld.long 0x00 31. " IDMAC_NFB4EOF_ERR_31 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 29. " IDMAC_NFB4EOF_ERR_29 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 28. " IDMAC_NFB4EOF_ERR_28 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 27. " IDMAC_NFB4EOF_ERR_27 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 26. " IDMAC_NFB4EOF_ERR_26 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 25. " IDMAC_NFB4EOF_ERR_25 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 24. " IDMAC_NFB4EOF_ERR_24 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 23. " IDMAC_NFB4EOF_ERR_23 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 22. " IDMAC_NFB4EOF_ERR_22 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 21. " IDMAC_NFB4EOF_ERR_21 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 20. " IDMAC_NFB4EOF_ERR_20 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 19. " IDMAC_NFB4EOF_ERR_19 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 18. " IDMAC_NFB4EOF_ERR_18 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 17. " IDMAC_NFB4EOF_ERR_17 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 15. " IDMAC_NFB4EOF_ERR_15 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 14. " IDMAC_NFB4EOF_ERR_14 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 13. " IDMAC_NFB4EOF_ERR_13 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 12. " IDMAC_NFB4EOF_ERR_12 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 11. " IDMAC_NFB4EOF_ERR_11 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 10. " IDMAC_NFB4EOF_ERR_10 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 9. " IDMAC_NFB4EOF_ERR_9 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 8. " IDMAC_NFB4EOF_ERR_8 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 5. " IDMAC_NFB4EOF_ERR_5 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 3. " IDMAC_NFB4EOF_ERR_3 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x00 2. " IDMAC_NFB4EOF_ERR_2 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 1. " IDMAC_NFB4EOF_ERR_1 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x00 0. " IDMAC_NFB4EOF_ERR_0 ,New Frame before end-of-frame error indication of Channel interrupt" "Cleared,Requested" line.long 0x04 "IPU_INT_STAT_6,Interrupt Status Register 6" eventfld.long 0x04 20. " IDMAC_NFB4EOF_ERR_52 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 19. " IDMAC_NFB4EOF_ERR_51 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 18. " IDMAC_NFB4EOF_ERR_50 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 17. " IDMAC_NFB4EOF_ERR_49 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 16. " IDMAC_NFB4EOF_ERR_48 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 15. " IDMAC_NFB4EOF_ERR_47 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 14. " IDMAC_NFB4EOF_ERR_46 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 13. " IDMAC_NFB4EOF_ERR_45 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 12. " IDMAC_NFB4EOF_ERR_44 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 11. " IDMAC_NFB4EOF_ERR_43 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 10. " IDMAC_NFB4EOF_ERR_42 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 9. " IDMAC_NFB4EOF_ERR_41 ,New Frame Ack of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x04 8. " IDMAC_NFB4EOF_ERR_40 ,New Frame Ack of Channel interrupt" "Cleared,Requested" eventfld.long 0x04 1. " IDMAC_NFB4EOF_ERR_33 ,New Frame Ack of Channel interrupt" "Cleared,Requested" line.long 0x08 "IPU_INT_STAT_7,Interrupt Status Register 7" eventfld.long 0x08 31. " EOS_31 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 29. " EOS_29 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 28. " EOS_28 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 27. " EOS_27 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 26. " EOS_26 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 25. " EOS_25 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x08 24. " EOS_24 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 23. " EOS_23 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x08 19. " EOS_19 ,End of Scroll indication of Channel interrupt" "Cleared,Requested" line.long 0x0c "IPU_INT_STAT_8,Interrupt Status Register 8" eventfld.long 0x0c 20. " EOS_52 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 19. " EOS_51 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 12. " EOS_44 ,End of Scroll of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0c 11. " EOS_43 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 10. " EOS_42 ,End of Scroll of Channel interrupt" "Cleared,Requested" eventfld.long 0x0c 9. " EOS_41 ,End of Scroll of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x0c 1. " EOS_33 ,End of Scroll of Channel interrupt" "Cleared,Requested" line.long 0x10 "IPU_INT_STAT_9,Interrupt Status Register 9" eventfld.long 0x10 31. " CSI1_PUPE ,CSI1 parameters update error interrupt" "Cleared,Requested" eventfld.long 0x10 30. " CSI0_PUPE ,CSI0 parameters update error interrupt" "Cleared,Requested" eventfld.long 0x10 28. " IC_VF_BUF_OVF ,IC Buffer overflow for view finder interrupt" "Cleared,Requested" textline " " eventfld.long 0x10 27. " IC_ENC_BUF_OVF ,IC Buffer overflow for encoding interrupt" "Cleared,Requested" eventfld.long 0x10 26. " IC_BAYER_BUF_OVF ,IC Buffer overflow for Bayer coming interrupt" "Cleared,Requested" eventfld.long 0x10 0. " VDI_FIFO1_OVF ,FIFO1 overflow Interrupt1" "Cleared,Requested" line.long 0x14 "IPU_INT_STAT_10,IPU Interrupt Status Register 10" eventfld.long 0x14 30. " AXIR_ERR ,AXI read access interrupt status" "Cleared,Requested" eventfld.long 0x14 29. " AXIW_ERR ,AXI write access interrupt status" "Cleared,Requested" eventfld.long 0x14 28. " NON_PRIVILEGED_ACC_ERR ,Non Privileged Access Error interrupt status" "Cleared,Requested" textline " " eventfld.long 0x14 26. " IC_BAYER_FRM_LOST_ERR ,IC's Bayer frame lost interrupt status" "Disabled,Enabled" eventfld.long 0x14 25. " IC_ENC_FRM_LOST_ERR ,IC's encoding frame lost interrupt status" "Disabled,Enabled" eventfld.long 0x14 24. " IC_VF_FRM_LOST_ERR ,IC's view finder frame lost interrupt status" "Disabled,Enabled" textline " " eventfld.long 0x14 22. " DI1_TIME_OUT_ERR ,DI1 time out error interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 21. " DI0_TIME_OUT_ERR ,DI0 time outwore interrupt status" "No interrupt,Interrupt" eventfld.long 0x14 20. " DI1_SYNC_DISP_ERR ,DI1 Synchronous display error status" "No interrupt,Interrupt" textline " " eventfld.long 0x14 19. " DI0_SYNC_DISP_ERR ,DI0 Synchronous display error status" "No interrupt,Interrupt" eventfld.long 0x14 18. " DC_TEARING_ERR_6 ,Tearing Error #6 status" "No interrupt,Interrupt" eventfld.long 0x14 17. " DC_TEARING_ERR_2 ,Tearing Error #2 status" "No interrupt,Interrupt" textline " " eventfld.long 0x14 16. " DC_TEARING_ERR_1 ,Tearing Error #1 status" "No interrupt,Interrupt" eventfld.long 0x14 3. " SMFC3_FRM_LOST ,Frame Lost of SMFC channel 3 interrupt" "Cleared,Requested" eventfld.long 0x14 2. " SMFC2_FRM_LOST ,Frame Lost of SMFC channel 2 interrupt" "Cleared,Requested" textline " " eventfld.long 0x14 1. " SMFC1_FRM_LOST ,Frame Lost of SMFC channel 1 interrupt" "Cleared,Requested" eventfld.long 0x14 0. " SMFC0_FRM_LOST ,Frame Lost of SMFC channel 0 interrupt" "Cleared,Requested" line.long 0x18 "IPU_INT_STAT_11,Interrupt Status Register 11" eventfld.long 0x18 26. " EOBND_26 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 25. " EOBND_25 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 22. " EOBND_22 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 21. " EOBND_21 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 20. " EOBND_20 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 12. " EOBND_12 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 11. " EOBND_11 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 5. " EOBND_5 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 3. " EOBND_3 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x18 2. " EOBND_2 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 1. " EOBND_1 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x18 0. " EOBND_0 ,End-of-band indication of Channel interrupt" "Cleared,Requested" line.long 0x1c "IPU_INT_STAT_12,Interrupt Status Register 12" eventfld.long 0x1c 18. " EOBND_50 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 17. " EOBND_49 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 16. " EOBND_48 ,End-of-band indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x1c 15. " EOBND_47 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 14. " EOBND_46 ,End-of-band indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x1c 13. " EOBND_45 ,End-of-band indication of Channel interrupt" "Cleared,Requested" line.long 0x20 "IPU_INT_STAT_13,Interrupt Status Register 13" eventfld.long 0x20 31. " IDMAC_TH_31 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 29. " IDMAC_TH_29 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 28. " IDMAC_TH_28 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 27. " IDMAC_TH_27 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 26. " IDMAC_TH_26 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 25. " IDMAC_TH_25 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 24. " IDMAC_TH_24 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 23. " IDMAC_TH_23 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 22. " IDMAC_TH_22 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 21. " IDMAC_TH_21 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 20. " IDMAC_TH_20 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 19. " IDMAC_TH_19 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 18. " IDMAC_TH_18 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 17. " IDMAC_TH_17 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 15. " IDMAC_TH_15 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 14. " IDMAC_TH_14 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 13. " IDMAC_TH_13 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x20 12. " IDMAC_TH_12 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x20 11. " IDMAC_TH_11 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 10. " IDMAC_TH_10 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 9. " IDMAC_TH_9 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" textline " " eventfld.long 0x20 8. " IDMAC_TH_8 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 5. " IDMAC_TH_5 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 3. " IDMAC_TH_3 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" textline " " eventfld.long 0x20 2. " IDMAC_TH_2 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 1. " IDMAC_TH_1 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" eventfld.long 0x20 0. " IDMAC_TH_0 ,Threshold crossing indication of Channel interruptrupt" "Cleared,Requested" line.long 0x24 "IPU_INT_STAT_14,Interrupt Status Register 14" eventfld.long 0x24 20. " IDMAC_TH_52 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 19. " IDMAC_TH_51 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 18. " IDMAC_TH_50 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 17. " IDMAC_TH_49 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 16. " IDMAC_TH_48 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 15. " IDMAC_TH_47 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 14. " IDMAC_TH_46 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 13. " IDMAC_TH_45 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 12. " IDMAC_TH_44 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 11. " IDMAC_TH_43 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 10. " IDMAC_TH_42 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 9. " IDMAC_TH_41 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" textline " " eventfld.long 0x24 8. " IDMAC_TH_40 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" eventfld.long 0x24 1. " IDMAC_TH_33 ,Threshold crossing indication of Channel interrupt" "Cleared,Requested" line.long 0x28 "IPU_INT_STAT_15,IPU Interrupt Status Register 15" eventfld.long 0x28 31. " DI1_CNT_PRE_8 ,Trigger generated by counter #8 of DI1 interrupt status" "Cleared,Requested" eventfld.long 0x28 30. " DI1_CNT_PRE_3 ,Trigger generated by counter #3 of DI1 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 29. " DI1_DISP_CLK_PRE , DI1_DISP_CLK interrupt status" "Cleared,Requested" eventfld.long 0x28 28. " DI0_CNT_PRE_10 ,Trigger generated by counter #10 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 27. " DI0_CNT_PRE_9 ,Trigger generated by counter #9 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 26. " DI0_CNT_PRE_8 ,Trigger generated by counter #8 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 25. " DI0_CNT_PRE_7 ,Trigger generated by counter #7 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 24. " DI0_CNT_PRE_6 ,Trigger generated by counter #6 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 23. " DI0_CNT_PRE_5 ,Trigger generated by counter #5 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 22. " DI0_CNT_PRE_4 ,Trigger generated by counter #4 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 21. " DI0_CNT_PRE_3 ,Trigger generated by counter #3 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 20. " DI0_CNT_PRE_2 ,Trigger generated by counter #2 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 19. " DI0_CNT_PRE_1 ,Trigger generated by counter #1 of DI0 interrupt status" "Cleared,Requested" eventfld.long 0x28 18. " DI0_CNT_PRE_0 ,Trigger generated by counter #0 of DI0 interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 17. " DC_ASYNC_STOP ,DP stops an async flow and moves to a sync flow interrupt status" "Cleared,Requested" eventfld.long 0x28 16. " DC_DP_START ,DP start a new sync or async flow or when an async flow interrupt status" "Cleared,Requested" textline " " eventfld.long 0x28 15. " DI_VSYNC_PRE_1 ,Status the DI1 interrupt indicating of a VSYNC signal" "Cleared,Requested" eventfld.long 0x28 14. " DI_VSYNC_PRE_0 ,Status the DI0 interrupt indicating of a VSYNC signal" "Cleared,Requested" textline " " eventfld.long 0x28 13. " DC_FC_6 ,Status the DC Frame Complete on channel #6 interrupt" "Cleared,Requested" eventfld.long 0x28 12. " DC_FC_4 ,Status the DC Frame Complete on channel #4 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 11. " DC_FC_3 ,Status the DC Frame Complete on channel #3 interrupt" "Cleared,Requested" eventfld.long 0x28 10. " DC_FC_2 ,Status the DC Frame Complete on channel #2 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 9. " DC_FC_1 ,Status the DC Frame Complete on channel #1 interrupt" "Cleared,Requested" eventfld.long 0x28 8. " DC_FC_0 ,Status the DC Frame Complete on channel #0 interrupt" "Cleared,Requested" textline " " eventfld.long 0x28 7. " DP_ASF_BRAKE ,DP Async Flow Brake status bit" "Cleared,Requested" eventfld.long 0x28 6. " DP_SF_BRAKE ,DP Sync Flow Brake status bit" "Cleared,Requested" textline " " eventfld.long 0x28 5. " DP_ASF_END ,DP Async Flow End status bit" "Cleared,Requested" eventfld.long 0x28 4. " DP_ASF_START ,DP Async Flow Start status bit" "Cleared,Requested" textline " " eventfld.long 0x28 3. " DP_SF_END ,DP Sync Flow End status bit" "Cleared,Requested" eventfld.long 0x28 2. " DP_SF_START ,DP Sync Flow Start status bit" "Cleared,Requested" textline " " eventfld.long 0x28 1. " IPU_SNOOPING2_INT ,Snooping 2 interrupt status bit" "Cleared,Requested" eventfld.long 0x28 0. " IPU_SNOOPING1_INT ,Snooping 1 interrupt status bit" "Cleared,Requested" rgroup.long 0x23c++0x17 line.long 0x00 "IPU_CUR_BUF_0,Current Buffer Register 0" bitfld.long 0x00 31. " DMA_CH_CUR_BUF_31 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 29. " DMA_CH_CUR_BUF_29 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 28. " DMA_CH_CUR_BUF_28 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 27. " DMA_CH_CUR_BUF_27 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 26. " DMA_CH_CUR_BUF_26 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 25. " DMA_CH_CUR_BUF_25 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 24. " DMA_CH_CUR_BUF_24 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 23. " DMA_CH_CUR_BUF_23 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 22. " DMA_CH_CUR_BUF_22 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 21. " DMA_CH_CUR_BUF_21 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 20. " DMA_CH_CUR_BUF_20 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 19. " DMA_CH_CUR_BUF_19 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 18. " DMA_CH_CUR_BUF_18 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 17. " DMA_CH_CUR_BUF_17 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 15. " DMA_CH_CUR_BUF_15 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 14. " DMA_CH_CUR_BUF_14 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 13. " DMA_CH_CUR_BUF_13 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 12. " DMA_CH_CUR_BUF_12 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 11. " DMA_CH_CUR_BUF_11 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 10. " DMA_CH_CUR_BUF_10 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 9. " DMA_CH_CUR_BUF_9 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 8. " DMA_CH_CUR_BUF_8 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 5. " DMA_CH_CUR_BUF_5 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 3. " DMA_CH_CUR_BUF_3 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 2. " DMA_CH_CUR_BUF_2 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x00 1. " DMA_CH_CUR_BUF_1 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x00 0. " DMA_CH_CUR_BUF_0 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x04 "IPU_CUR_BUF_1,IPU Current Buffer Register 1" bitfld.long 0x04 20. " DMA_CH_CUR_BUF_52 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 19. " DMA_CH_CUR_BUF_51 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 18. " DMA_CH_CUR_BUF_50 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 17. " DMA_CH_CUR_BUF_49 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 16. " DMA_CH_CUR_BUF_48 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 15. " DMA_CH_CUR_BUF_47 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 14. " DMA_CH_CUR_BUF_46 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 13. " DMA_CH_CUR_BUF_45 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 12. " DMA_CH_CUR_BUF_44 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 11. " DMA_CH_CUR_BUF_43 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 10. " DMA_CH_CUR_BUF_42 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 9. " DMA_CH_CUR_BUF_41 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" textline " " bitfld.long 0x04 8. " DMA_CH_CUR_BUF_40 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x04 1. " DMA_CH_CUR_BUF_33 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x08 "IPU_ALT_CUR_BUF_0,Alternate Current Buffer Register 0" bitfld.long 0x08 29. " DMA_CH_ALT_CUR_BUF_29 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x08 24. " DMA_CH_ALT_CUR_BUF_24 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x0c "IPU_ALT_CUR_BUF_1,Alternate Current Buffer Register 1" bitfld.long 0x0c 20. " DMA_CH_ALT_CUR_BUF_52 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x0c 9. " DMA_CH_ALT_CUR_BUF_41 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" bitfld.long 0x0c 1. " DMA_CH_ALT_CUR_BUF_33 ,Indicates which buffer is in use by DMA" "Buffer 0,Buffer 1" line.long 0x10 "IPU_SRM_STAT,IPU Shadow Registers Memory Status Register" bitfld.long 0x10 9. " DI1_SRM_STAT ,Indicates that the SRM is currently updating the DI1" "Not updated,Updated" bitfld.long 0x10 8. " DI0_SRM_STAT ,Indicates that the SRM is currently updating the DI0" "Not updated,Updated" bitfld.long 0x10 7. " CSI1_SRM_STAT ,Indicates that the SRM is currently updating the CSI1" "Not updated,Updated" textline " " bitfld.long 0x10 6. " CSI0_SRM_STAT ,Indicates that the SRM is currently updating the CSI0" "Not updated,Updated" bitfld.long 0x10 5. " DC_6_SRM_STAT ,Indicates that the SRM is currently updating the DC group #6" "Not updated,Updated" bitfld.long 0x10 4. " DC_2_SRM_STAT ,Indicates that the SRM is currently updating the DC group #2" "Not updated,Updated" textline " " bitfld.long 0x10 2. " DP_A1_SRM_STAT ,Indicates that the SRM is currently updating the DP async flow 1" "Not updated,Updated" bitfld.long 0x10 1. " DP_A0_SRM_STAT ,Indicates that the SRM is currently updating the DP async flow 0" "Not updated,Updated" bitfld.long 0x10 0. " DP_S_SRM_STAT ,Indicates that the SRM is currently updating the DP sync flow" "Not updated,Updated" line.long 0x14 "IPU_PROC_TASKS_STAT,Processing Tasks Status Register" bitfld.long 0x14 12.--14. " MEM2PRP_TSTAT ,Status of the pre processing tasks(viewfinder and encoding)" "IDLE,BOTH_ACTIVE,ENC_ACTIVE,VF_ACTIVE,BOTH_PAUSE,?..." bitfld.long 0x14 10.--11. " PP_ROT_TSTAT ,Status of the rotation for post processing task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 8.--9. " VF_ROT_TSTAT ,Status of the rotation for viewfinder task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x14 6.--7. " ENC_ROT_TSTAT ,Status of the rotation for encoding task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 4.--5. " PP_TSTAT ,Status of the post processing task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x14 2.--3. " VF_TSTAT ,Status of the viewfinder task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." textline " " bitfld.long 0x14 0.--1. " ENC_TSTAT ,Status of the encoding task" "IDLE,ACTIVE,WAIT_FOR_READY,?..." rgroup.long 0x254++0x03 line.long 0x00 "IPU_DISP_TASKS_STAT,IPU Display Tasks Status Register" bitfld.long 0x00 11. " DC_ASYNC2_CUR_FLOW ,Current asynchronous #2 flow via the DC" "Main,Alternate" bitfld.long 0x00 8.--10. " DC_ASYNCH2_STAT ,Status of the Asynchronous flow #2 through the DC" "IDLE,PRIM_ACTIVE,ALT_ACTIVE,UPDATE_PARAM,PAUSE,?..." textline " " bitfld.long 0x00 4.--5. " DC_ASYNC1_STAT ,Status of the Asynchronous flow #1 through the DC" "IDLE,ACTIVE,WAIT_FOR_READY,?..." bitfld.long 0x00 3. " DP_ASYNC_CUR_FLOW ,Current asynchronous flow via the DP" "Main,Alternate" textline " " bitfld.long 0x00 0.--2. " DP_ASYNCH_TSTAT ,Status of the Asynchronous flow through the DP" "IDLE,PRIM_ACTIVE,ALT_ACTIVE,UPDATE_PARAM,PAUSE,?..." rgroup.long 0x258++0x07 line.long 0x00 "IPU_TRIPLE_CUR_BUF_0,Triple Current Buffer Register 0" bitfld.long 0x00 26.--27. " DMA_CH_TRIPLE_CUR_BUF_13 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x00 20.--21. " DMA_CH_TRIPLE_CUR_BUF_10 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." textline " " bitfld.long 0x00 18.--19. " DMA_CH_TRIPLE_CUR_BUF_9 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x00 16.--17. " DMA_CH_TRIPLE_CUR_BUF_8 ,Current buffer for triple buffer mode" "Buffer 0,Buffer 1,Buffer 2,?..." line.long 0x04 "IPU_TRIPLE_CUR_BUF_1,Triple Current Buffer Register 1" bitfld.long 0x04 24.--25. " DMA_CH_TRIPLE_CUR_BUF_28 ,Current buffer for triple buffer mode 28" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x04 22.--23. " DMA_CH_TRIPLE_CUR_BUF_27 ,Current buffer for triple buffer mode 27" "Buffer 0,Buffer 1,Buffer 2,?..." textline " " bitfld.long 0x04 14.--15. " DMA_CH_TRIPLE_CUR_BUF_23 ,Current buffer for triple buffer mode 23" "Buffer 0,Buffer 1,Buffer 2,?..." bitfld.long 0x04 10.--11. " DMA_CH_TRIPLE_CUR_BUF_21 ,Current buffer for triple buffer mode 21" "Buffer 0,Buffer 1,Buffer 2,?..." group.long 0x268++0x27 line.long 0x00 "IPU_CH_BUF0_RDY0,IPU Channels Buffer 0 Ready 0 Register" bitfld.long 0x00 31. " DMA_CH_BUF0_RDY_31 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 29. " DMA_CH_BUF0_RDY_29 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 28. " DMA_CH_BUF0_RDY_28 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 27. " DMA_CH_BUF0_RDY_27 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 24. " DMA_CH_BUF0_RDY_24 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 23. " DMA_CH_BUF0_RDY_23 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 22. " DMA_CH_BUF0_RDY_22 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 21. " DMA_CH_BUF0_RDY_21 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 20. " DMA_CH_BUF0_RDY_20 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 18. " DMA_CH_BUF0_RDY_18 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 17. " DMA_CH_BUF0_RDY_17 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 15. " DMA_CH_BUF0_RDY_15 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 14. " DMA_CH_BUF0_RDY_14 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 13. " DMA_CH_BUF0_RDY_13 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 12. " DMA_CH_BUF0_RDY_12 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 11. " DMA_CH_BUF0_RDY_11 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 10. " DMA_CH_BUF0_RDY_10 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 9. " DMA_CH_BUF0_RDY_9 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " DMA_CH_BUF0_RDY_8 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 7. " DMA_CH_BUF0_RDY_7 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 6. " DMA_CH_BUF0_RDY_6 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 5. " DMA_CH_BUF0_RDY_5 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 4. " DMA_CH_BUF0_RDY_4 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 3. " DMA_CH_BUF0_RDY_3 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x00 2. " DMA_CH_BUF0_RDY_2 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 1. " DMA_CH_BUF0_RDY_1 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x00 0. " DMA_CH_BUF0_RDY_0 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x04 "IPU_CH_BUF0_RDY1,IPU Channels Buffer 0 Ready 1 Register" bitfld.long 0x04 20. " DMA_CH_BUF0_RDY_52 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 19. " DMA_CH_BUF0_RDY_51 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 18. " DMA_CH_BUF0_RDY_50 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 17. " DMA_CH_BUF0_RDY_49 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 16. " DMA_CH_BUF0_RDY_48 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 15. " DMA_CH_BUF0_RDY_47 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 14. " DMA_CH_BUF0_RDY_46 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 13. " DMA_CH_BUF0_RDY_45 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 12. " DMA_CH_BUF0_RDY_44 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 11. " DMA_CH_BUF0_RDY_43 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 10. " DMA_CH_BUF0_RDY_42 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 9. " DMA_CH_BUF0_RDY_41 ,Buffer 0 is ready" "Not ready,Ready" textline " " bitfld.long 0x04 8. " DMA_CH_BUF0_RDY_40 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x04 1. " DMA_CH_BUF0_RDY_33 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x08 "IPU_CH_BUF1_RDY0,Channels Buffer 1 Ready 0 Register" bitfld.long 0x08 31. " DMA_CH_BUF1_RDY_31 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 29. " DMA_CH_BUF1_RDY_29 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 28. " DMA_CH_BUF1_RDY_28 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 27. " DMA_CH_BUF1_RDY_27 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 26. " DMA_CH_BUF1_RDY_26 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 25. " DMA_CH_BUF1_RDY_25 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 24. " DMA_CH_BUF1_RDY_24 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 23. " DMA_CH_BUF1_RDY_23 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 22. " DMA_CH_BUF1_RDY_22 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 21. " DMA_CH_BUF1_RDY_21 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 20. " DMA_CH_BUF1_RDY_20 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 19. " DMA_CH_BUF1_RDY_19 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 18. " DMA_CH_BUF1_RDY_18 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 17. " DMA_CH_BUF1_RDY_17 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 15. " DMA_CH_BUF1_RDY_15 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 14. " DMA_CH_BUF1_RDY_14 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 13. " DMA_CH_BUF1_RDY_13 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 12. " DMA_CH_BUF1_RDY_12 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 11. " DMA_CH_BUF1_RDY_11 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 10. " DMA_CH_BUF1_RDY_10 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 9. " DMA_CH_BUF1_RDY_9 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 8. " DMA_CH_BUF1_RDY_8 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 5. " DMA_CH_BUF1_RDY_5 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 3. " DMA_CH_BUF1_RDY_3 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x08 2. " DMA_CH_BUF1_RDY_2 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 1. " DMA_CH_BUF1_RDY_1 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x08 0. " DMA_CH_BUF1_RDY_0 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x0c "IPU_CH_BUF1_RDY1,Channels Buffer 1 Ready 1 Register" bitfld.long 0x0c 20. " DMA_CH_BUF1_RDY_52 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 19. " DMA_CH_BUF1_RDY_51 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 18. " DMA_CH_BUF1_RDY_50 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 17. " DMA_CH_BUF1_RDY_49 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 16. " DMA_CH_BUF1_RDY_48 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 15. " DMA_CH_BUF1_RDY_47 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 14. " DMA_CH_BUF1_RDY_46 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 13. " DMA_CH_BUF1_RDY_45 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 12. " DMA_CH_BUF1_RDY_44 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 11. " DMA_CH_BUF1_RDY_43 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 10. " DMA_CH_BUF1_RDY_42 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 9. " DMA_CH_BUF1_RDY_41 ,Buffer 1 is ready" "Not ready,Ready" textline " " bitfld.long 0x0c 8. " DMA_CH_BUF1_RDY_40 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x0c 1. " DMA_CH_BUF1_RDY_33 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x10 "IPU_ALT_CH_BUF0_RDY0,IPU Alternate Channels Buffer 0 Ready 0 Register" bitfld.long 0x10 29. " DMA_CH_ALT_BUF0_RDY_29 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x10 24. " DMA_CH_ALT_BUF0_RDY_24 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x14 "IPU_ALT_CH_BUF0_RDY1,IPU Alternate Channels Buffer 0 Ready 1 Register" bitfld.long 0x14 20. " DMA_CH_ALT_BUF0_RDY_52 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x14 9. " DMA_CH_ALT_BUF0_RDY_41 ,Buffer 0 is ready" "Not ready,Ready" bitfld.long 0x14 1. " DMA_CH_ALT_BUF0_RDY_33 ,Buffer 0 is ready" "Not ready,Ready" line.long 0x18 "IPU_ALT_CH_BUF1_RDY0,Alternate Channels Buffer 1 Ready 0 Register" bitfld.long 0x18 29. " DMA_CH_ALT_BUF1_RDY_29 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x18 24. " DMA_CH_ALT_BUF1_RDY_24 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x1c "IPU_ALT_CH_BUF1_RDY1,Alternate Channels Buffer 1 Ready 1 Register" bitfld.long 0x1c 20. " DMA_CH_ALT_BUF1_RDY_52 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x1c 9. " DMA_CH_ALT_BUF1_RDY_41 ,Buffer 1 is ready" "Not ready,Ready" bitfld.long 0x1c 1. " DMA_CH_ALT_BUF1_RDY_33 ,Buffer 1 is ready" "Not ready,Ready" line.long 0x20 "IPU_CH_BUF2_RDY0,Channels Buffer 2 Ready 0 Register" bitfld.long 0x20 28. " DMA_CH_BUF2_RDY_28 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 27. " DMA_CH_BUF2_RDY_27 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 23. " DMA_CH_BUF2_RDY_23 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 21. " DMA_CH_BUF2_RDY_21 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 13. " DMA_CH_BUF2_RDY_13 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 10. " DMA_CH_BUF2_RDY_10 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 9. " DMA_CH_BUF2_RDY_9 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 8. " DMA_CH_BUF2_RDY_8 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x20 2. " DMA_CH_BUF2_RDY_2 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x20 0. " DMA_CH_BUF2_RDY_0 ,Buffer 2 is ready" "Not ready,Ready" line.long 0x24 "IPU_CH_BUF2_RDY1,Channels Buffer 2 Ready 1 Register" bitfld.long 0x24 31. " DMA_CH_BUF2_RDY_31 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 30. " DMA_CH_BUF2_RDY_30 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 29. " DMA_CH_BUF2_RDY_29 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 28. " DMA_CH_BUF2_RDY_28 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 27. " DMA_CH_BUF2_RDY_27 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 26. " DMA_CH_BUF2_RDY_26 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 25. " DMA_CH_BUF2_RDY_25 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 24. " DMA_CH_BUF2_RDY_24 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 23. " DMA_CH_BUF2_RDY_23 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 22. " DMA_CH_BUF2_RDY_22 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 21. " DMA_CH_BUF2_RDY_21 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 20. " DMA_CH_BUF2_RDY_20 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 19. " DMA_CH_BUF2_RDY_19 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 18. " DMA_CH_BUF2_RDY_18 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 17. " DMA_CH_BUF2_RDY_17 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 16. " DMA_CH_BUF2_RDY_16 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 15. " DMA_CH_BUF2_RDY_15 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 14. " DMA_CH_BUF2_RDY_14 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 13. " DMA_CH_BUF2_RDY_13 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 12. " DMA_CH_BUF2_RDY_12 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 11. " DMA_CH_BUF2_RDY_11 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 10. " DMA_CH_BUF2_RDY_10 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 9. " DMA_CH_BUF2_RDY_9 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 8. " DMA_CH_BUF2_RDY_8 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 7. " DMA_CH_BUF2_RDY_7 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 6. " DMA_CH_BUF2_RDY_6 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 5. " DMA_CH_BUF2_RDY_5 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 4. " DMA_CH_BUF2_RDY_4 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 3. " DMA_CH_BUF2_RDY_3 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 2. " DMA_CH_BUF2_RDY_2 ,Buffer 2 is ready" "Not ready,Ready" textline " " bitfld.long 0x24 1. " DMA_CH_BUF2_RDY_1 ,Buffer 2 is ready" "Not ready,Ready" bitfld.long 0x24 0. " DMA_CH_BUF2_RDY_0 ,Buffer 2 is ready" "Not ready,Ready" tree.end width 0x0B tree.end tree "IDMAC registers" base ad:0x02A08000 width 21. group.long 0x00++0x0B line.long 0x00 "IDMAC_CONF,IDMAC Configuration Register" bitfld.long 0x00 25. " USED_BUFS_EN_R ,Limit on the number of pending non real time read requests" "Disabled,Enabled" bitfld.long 0x00 21.--24. " USED_BUFS_MAX_R ,Limit the number of pending non real time read requests" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 20. " USED_BUFS_EN_W ,Limit on the number of pending non real time write requests" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--19. " USED_BUFS_MAX_W ,Limit the number of pending non real time write requests" "0,1,2,3,4,5,6,?..." bitfld.long 0x00 16. " P_ENDIAN ,Pixel Endianness" "Little,Big" bitfld.long 0x00 5. " RDI ,Read Data Interleaving" "Not supported,Supported" textline " " bitfld.long 0x00 3.--4. " WIDPT ,Write Interleaving Depth" "1,2,3,4" bitfld.long 0x00 0.--2. " MAX_REQ_READ ,Maximum Read Requests" "0,1,2,3,4,5,6,7" line.long 0x04 "IDMAC_CH_EN_1,IDMAC Channel Enable 1 Register" bitfld.long 0x04 31. " IDMAC_CH_EN_31 ,IDMAC Channel enable bit 31" "Disabled,Enabled" bitfld.long 0x04 29. " IDMAC_CH_EN_29 ,IDMAC Channel enable bit 29" "Disabled,Enabled" bitfld.long 0x04 28. " IDMAC_CH_EN_28 ,IDMAC Channel enable bit 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " IDMAC_CH_EN_27 ,IDMAC Channel enable bit 27" "Disabled,Enabled" bitfld.long 0x04 26. " IDMAC_CH_EN_26 ,IDMAC Channel enable bit 24" "Disabled,Enabled" bitfld.long 0x04 25. " IDMAC_CH_EN_25 ,IDMAC Channel enable bit 24" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " IDMAC_CH_EN_24 ,IDMAC Channel enable bit 24" "Disabled,Enabled" bitfld.long 0x04 23. " IDMAC_CH_EN_23 ,IDMAC Channel enable bit 23" "Disabled,Enabled" bitfld.long 0x04 22. " IDMAC_CH_EN_22 ,IDMAC Channel enable bit 22" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " IDMAC_CH_EN_21 ,IDMAC Channel enable bit 21" "Disabled,Enabled" bitfld.long 0x04 20. " IDMAC_CH_EN_20 ,IDMAC Channel enable bit 20" "Disabled,Enabled" bitfld.long 0x04 19. " IDMAC_CH_EN_19 ,IDMAC Channel enable bit 18" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " IDMAC_CH_EN_18 ,IDMAC Channel enable bit 18" "Disabled,Enabled" bitfld.long 0x04 17. " IDMAC_CH_EN_17 ,IDMAC Channel enable bit 17" "Disabled,Enabled" bitfld.long 0x04 15. " IDMAC_CH_EN_15 ,IDMAC Channel enable bit 15" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " IDMAC_CH_EN_14 ,IDMAC Channel enable bit 14" "Disabled,Enabled" bitfld.long 0x04 13. " IDMAC_CH_EN_13 ,IDMAC Channel enable bit 13" "Disabled,Enabled" bitfld.long 0x04 12. " IDMAC_CH_EN_12 ,IDMAC Channel enable bit 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " IDMAC_CH_EN_11 ,IDMAC Channel enable bit 11" "Disabled,Enabled" bitfld.long 0x04 10. " IDMAC_CH_EN_10 ,IDMAC Channel enable bit 10" "Disabled,Enabled" bitfld.long 0x04 9. " IDMAC_CH_EN_9 ,IDMAC Channel enable bit 9" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " IDMAC_CH_EN_8 ,IDMAC Channel enable bit 8" "Disabled,Enabled" bitfld.long 0x04 5. " IDMAC_CH_EN_5 ,IDMAC Channel enable bit 5" "Disabled,Enabled" bitfld.long 0x04 3. " IDMAC_CH_EN_3 ,IDMAC Channel enable bit 3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " IDMAC_CH_EN_2 ,IDMAC Channel enable bit 2" "Disabled,Enabled" bitfld.long 0x04 1. " IDMAC_CH_EN_1 ,IDMAC Channel enable bit 1" "Disabled,Enabled" bitfld.long 0x04 0. " IDMAC_CH_EN_0 ,IDMAC Channel enable bit 0" "Disabled,Enabled" line.long 0x08 "IDMAC_CH_EN_2,IDMAC Channel Enable 2 Register" bitfld.long 0x08 20. " IDMAC_CH_EN_52 ,IDMAC Channel enable bit 52" "Disabled,Enabled" bitfld.long 0x08 19. " IDMAC_CH_EN_51 ,IDMAC Channel enable bit 51" "Disabled,Enabled" bitfld.long 0x08 18. " IDMAC_CH_EN_50 ,IDMAC Channel enable bit 50" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " IDMAC_CH_EN_49 ,IDMAC Channel enable bit 49" "Disabled,Enabled" bitfld.long 0x08 16. " IDMAC_CH_EN_48 ,IDMAC Channel enable bit 48" "Disabled,Enabled" bitfld.long 0x08 15. " IDMAC_CH_EN_47 ,IDMAC Channel enable bit 47" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " IDMAC_CH_EN_46 ,IDMAC Channel enable bit 46" "Disabled,Enabled" bitfld.long 0x08 13. " IDMAC_CH_EN_45 ,IDMAC Channel enable bit 45" "Disabled,Enabled" bitfld.long 0x08 12. " IDMAC_CH_EN_44 ,IDMAC Channel enable bit 44" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " IDMAC_CH_EN_43 ,IDMAC Channel enable bit 43" "Disabled,Enabled" bitfld.long 0x08 10. " IDMAC_CH_EN_42 ,IDMAC Channel enable bit 42" "Disabled,Enabled" bitfld.long 0x08 9. " IDMAC_CH_EN_41 ,IDMAC Channel enable bit 41" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " IDMAC_CH_EN_40 ,IDMAC Channel enable bit 40" "Disabled,Enabled" bitfld.long 0x08 1. " IDMAC_CH_EN_33 ,IDMAC Channel enable bit 33" "Disabled,Enabled" group.long 0x0C++0x1F line.long 0x00 "IDMAC_SEP_ALPHA,IDMAC Separate Alpha Indication Register" bitfld.long 0x00 29. " IDMAC_SEP_AL_29 ,IDMAC Separate alpha indication bit 29" "Not read,Read" bitfld.long 0x00 27. " IDMAC_SEP_AL_27 ,IDMAC Separate alpha indication bit 27" "Not read,Read" bitfld.long 0x00 25. " IDMAC_SEP_AL_25 ,IDMAC Separate alpha indication bit 24" "Not read,Read" textline " " bitfld.long 0x00 24. " IDMAC_SEP_AL_24 ,IDMAC Separate alpha indication bit 24" "Not read,Read" bitfld.long 0x00 23. " IDMAC_SEP_AL_23 ,IDMAC Separate alpha indication bit 23" "Not read,Read" bitfld.long 0x00 15. " IDMAC_SEP_AL_15 ,IDMAC Separate alpha indication bit 15" "Not read,Read" textline " " bitfld.long 0x00 14. " IDMAC_SEP_AL_14 ,IDMAC Separate alpha indication bit 14" "Not read,Read" line.long 0x04 "IDMAC_ALT_SEP_ALPHA,IDMAC Alternate Separate Alpha Indication Register" bitfld.long 0x04 29. " IDMAC_ALT_SEP_AL_29 ,IDMAC Separate alpha indication bit 29" "Not read,Read" bitfld.long 0x04 24. " IDMAC_ALT_SEP_AL_24 ,IDMAC Separate alpha indication bit 24" "Not read,Read" bitfld.long 0x04 23. " IDMAC_ALT_SEP_AL_23 ,IDMAC Separate alpha indication bit 23" "Not read,Read" line.long 0x08 "IDMAC_CH_PRI_1,IDMAC Channel Priority 1 Register" bitfld.long 0x08 29. " IDMAC_CH_PRI_29 ,IDMAC Channel priority bit 29" "Low,High" bitfld.long 0x08 28. " IDMAC_CH_PRI_28 ,IDMAC Channel priority bit 28" "Low,High" bitfld.long 0x08 27. " IDMAC_CH_PRI_27 ,IDMAC Channel priority bit 27" "Low,High" textline " " bitfld.long 0x08 26. " IDMAC_CH_PRI_26 ,IDMAC Channel priority bit 26" "Low,High" bitfld.long 0x08 25. " IDMAC_CH_PRI_25 ,IDMAC Channel priority bit 25" "Low,High" bitfld.long 0x08 24. " IDMAC_CH_PRI_24 ,IDMAC Channel priority bit 24" "Low,High" textline " " bitfld.long 0x08 23. " IDMAC_CH_PRI_23 ,IDMAC Channel priority bit 23" "Low,High" bitfld.long 0x08 22. " IDMAC_CH_PRI_22 ,IDMAC Channel priority bit 22" "Low,High" bitfld.long 0x08 21. " IDMAC_CH_PRI_21 ,IDMAC Channel priority bit 21" "Low,High" textline " " bitfld.long 0x08 20. " IDMAC_CH_PRI_20 ,IDMAC Channel priority bit 20" "Low,High" bitfld.long 0x08 15. " IDMAC_CH_PRI_15 ,IDMAC Channel priority bit 15" "Low,High" bitfld.long 0x08 14. " IDMAC_CH_PRI_14 ,IDMAC Channel priority bit 14" "Low,High" textline " " bitfld.long 0x08 13. " IDMAC_CH_PRI_13 ,IDMAC Channel priority bit 13" "Low,High" bitfld.long 0x08 12. " IDMAC_CH_PRI_12 ,IDMAC Channel priority bit 12" "Low,High" bitfld.long 0x08 11. " IDMAC_CH_PRI_11 ,IDMAC Channel priority bit 11" "Low,High" textline " " bitfld.long 0x08 10. " IDMAC_CH_PRI_10 ,IDMAC Channel priority bit 10" "Low,High" bitfld.long 0x08 9. " IDMAC_CH_PRI_9 ,IDMAC Channel priority bit 9" "Low,High" bitfld.long 0x08 8. " IDMAC_CH_PRI_8 ,IDMAC Channel priority bit 8" "Low,High" textline " " bitfld.long 0x08 5. " IDMAC_CH_PRI_5 ,IDMAC Channel priority bit 5" "Low,High" bitfld.long 0x08 3. " IDMAC_CH_PRI_3 ,IDMAC Channel priority bit 3" "Low,High" bitfld.long 0x08 2. " IDMAC_CH_PRI_2 ,IDMAC Channel priority bit 2" "Low,High" textline " " bitfld.long 0x08 1. " IDMAC_CH_PRI_1 ,IDMAC Channel priority bit 1" "Low,High" bitfld.long 0x08 0. " IDMAC_CH_PRI_0 ,IDMAC Channel priority bit 0" "Low,High" line.long 0x0C "IDMAC_CH_PRI_2,IDMAC Channel Priority 2 Register" bitfld.long 0x0C 18. " IDMAC_CH_PRI_18 ,IDMAC Channel priority bit 18" "Low,High" bitfld.long 0x0C 17. " IDMAC_CH_PRI_17 ,IDMAC Channel priority bit 17" "Low,High" bitfld.long 0x0C 16. " IDMAC_CH_PRI_16 ,IDMAC Channel priority bit 16" "Low,High" textline " " bitfld.long 0x0C 15. " IDMAC_CH_PRI_15 ,IDMAC Channel priority bit 15" "Low,High" bitfld.long 0x0C 14. " IDMAC_CH_PRI_14 ,IDMAC Channel priority bit 14" "Low,High" bitfld.long 0x0C 13. " IDMAC_CH_PRI_13 ,IDMAC Channel priority bit 13" "Low,High" textline " " bitfld.long 0x0C 12. " IDMAC_CH_PRI_12 ,IDMAC Channel priority bit 12" "Low,High" bitfld.long 0x0C 11. " IDMAC_CH_PRI_11 ,IDMAC Channel priority bit 11" "Low,High" bitfld.long 0x0C 10. " IDMAC_CH_PRI_10 ,IDMAC Channel priority bit 10" "Low,High" textline " " bitfld.long 0x0C 9. " IDMAC_CH_PRI_9 ,IDMAC Channel priority bit 9" "Low,High" bitfld.long 0x0C 8. " IDMAC_CH_PRI_8 ,IDMAC Channel priority bit 8" "Low,High" line.long 0x10 "IDMAC_WM_EN_1,IDMAC Channel Watermark Enable 1 Register" bitfld.long 0x10 29. " IDMAC_WM_EN_29 ,IDMAC Watermark enable bit 29" "Disabled,Enabled" bitfld.long 0x10 28. " IDMAC_WM_EN_28 ,IDMAC Watermark enable bit 28" "Disabled,Enabled" bitfld.long 0x10 27. " IDMAC_WM_EN_27 ,IDMAC Watermark enable bit 27" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " IDMAC_WM_EN_26 ,IDMAC Watermark enable bit 26" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_WM_EN_25 ,IDMAC Watermark enable bit 25" "Disabled,Enabled" bitfld.long 0x10 24. " IDMAC_WM_EN_24 ,IDMAC Watermark enable bit 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " IDMAC_WM_EN_23 ,IDMAC Watermark enable bit 23" "Disabled,Enabled" bitfld.long 0x10 14. " IDMAC_WM_EN_14 ,IDMAC Watermark enable bit 14" "Disabled,Enabled" bitfld.long 0x10 13. " IDMAC_WM_EN_13 ,IDMAC Watermark enable bit 13" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " IDMAC_WM_EN_12 ,IDMAC Watermark enable bit 12" "Disabled,Enabled" bitfld.long 0x10 10. " IDMAC_WM_EN_10 ,IDMAC Watermark enable bit 10" "Disabled,Enabled" bitfld.long 0x10 8. " IDMAC_WM_EN_8 ,IDMAC Watermark enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " IDMAC_WM_EN_3 ,IDMAC Watermark enable bit 3" "Disabled,Enabled" bitfld.long 0x10 2. " IDMAC_WM_EN_2 ,IDMAC Watermark enable bit 2" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_WM_EN_1 ,IDMAC Watermark enable bit 1" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " IDMAC_WM_EN_0 ,IDMAC Watermark enable bit 0" "Disabled,Enabled" line.long 0x14 "IDMAC_WM_EN_2,IDMAC Channel Watermark Enable 2 Register" bitfld.long 0x14 12. " IDMAC_WM_EN_44 ,IDMAC Watermark enable bit 44" "Disabled,Enabled" bitfld.long 0x14 11. " IDMAC_WM_EN_43 ,IDMAC Watermark enable bit 43" "Disabled,Enabled" bitfld.long 0x14 10. " IDMAC_WM_EN_42 ,IDMAC Watermark enable bit 42" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " IDMAC_WM_EN_41 ,IDMAC Watermark enable bit 41" "Disabled,Enabled" bitfld.long 0x14 8. " IDMAC_WM_EN_40 ,IDMAC Watermark enable bit 40" "Disabled,Enabled" line.long 0x18 "IDMAC_LOCK_EN_1,IDMAC Channel Lock Enable 1 Register" bitfld.long 0x18 20.--21. " IDMAC_LOCK_EN_28 ,IDMAC lock bits for channel 28" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 18.--19. " IDMAC_LOCK_EN_27 ,IDMAC lock bits for channel 27" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 16.--17. " IDMAC_LOCK_EN_23 ,IDMAC lock bits for channel 23" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 14.--15. " IDMAC_LOCK_EN_22 ,IDMAC lock bits for channel 22" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 12.--13. " IDMAC_LOCK_EN_21 ,IDMAC lock bits for channel 21" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 10.--11. " IDMAC_LOCK_EN_20 ,IDMAC lock bits for channel 20" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 8.--9. " IDMAC_LOCK_EN_15 ,IDMAC lock bits for channel 15" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 6.--7. " IDMAC_LOCK_EN_14 ,IDMAC lock bits for channel 14" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 4.--5. " IDMAC_LOCK_EN_12 ,IDMAC lock bits for channel 12" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x18 2.--3. " IDMAC_LOCK_EN_11 ,IDMAC lock bits for channel 11" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x18 0.--1. " IDMAC_LOCK_EN_5 ,IDMAC lock bits for channel 5" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" line.long 0x1C "IDMAC_LOCK_EN_2,IDMAC Channel Lock Enable 2 Register" bitfld.long 0x1C 10.--11. " IDMAC_LOCK_EN_50 ,IDMAC lock bits for channel 50" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 8.--9. " IDMAC_LOCK_EN_49 ,IDMAC lock bits for channel 49" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 6.--7. " IDMAC_LOCK_EN_48 ,IDMAC lock bits for channel 48" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" textline " " bitfld.long 0x1C 4.--5. " IDMAC_LOCK_EN_47 ,IDMAC lock bits for channel 47" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 2.--3. " IDMAC_LOCK_EN_46 ,IDMAC lock bits for channel 46" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" bitfld.long 0x1C 0.--1. " IDMAC_LOCK_EN_45 ,IDMAC lock bits for channel 45" "Disabled,2 AXI bursts,4 AXI bursts,8 AXI bursts" group.long 0x2C++0x03 line.long 0x00 "IDMAC_SUB_ADDR_0,IDMAC Channel Alternate address 0 Register" group.long 0x30++0x1f line.long 0x00 "IDMAC_SUB_ADDR_1,IDMAC Channel Alternate address 1 Register" hexmask.long.byte 0x00 24.--30. 1. " IDMAC_SUB_ADDR_33 ,The CPMEM alternative entry 33" hexmask.long.byte 0x00 16.--22. 1. " IDMAC_SUB_ADDR_29 ,The CPMEM alternative entry 29" hexmask.long.byte 0x00 8.--14. 1. " IDMAC_SUB_ADDR_24 ,The CPMEM alternative entry 24" textline " " hexmask.long.byte 0x00 0.--6. 1. " IDMAC_SUB_ADDR_23 ,The CPMEM alternative entry 23" line.long 0x04 "IDMAC_SUB_ADDR_2,IDMAC Channel Alternate address 2 Register" hexmask.long.byte 0x04 16.--22. 1. " IDMAC_SUB_ADDR_52 ,The CPMEM alternative entry 52" hexmask.long.byte 0x04 8.--14. 1. " IDMAC_SUB_ADDR_51 ,The CPMEM alternative entry 51" hexmask.long.byte 0x04 0.--6. 1. " IDMAC_SUB_ADDR_41 ,The CPMEM alternative entry 41" line.long 0x08 "IDMAC_SUB_ADDR_3,IDMAC Channel Alternate address 3 Register" hexmask.long.byte 0x08 24.--30. 1. " IDMAC_SUB_ADDR_27 ,The CPMEM alternative entry 27" hexmask.long.byte 0x08 16.--22. 1. " IDMAC_SUB_ADDR_13 ,The CPMEM alternative entry 13" hexmask.long.byte 0x08 8.--14. 1. " IDMAC_SUB_ADDR_10 ,The CPMEM alternative entry 10" textline " " hexmask.long.byte 0x08 0.--6. 1. " IDMAC_SUB_ADDR_9 ,The CPMEM alternative entry 9" line.long 0x0c "IDMAC_SUB_ADDR_4,IDMAC Channel Alternate address 4 Register" hexmask.long.byte 0x0c 16.--22. 1. " IDMAC_SUB_ADDR_21 ,The CPMEM alternative entry 21" hexmask.long.byte 0x0c 8.--14. 1. " IDMAC_SUB_ADDR_8 ,The CPMEM alternative entry 8" hexmask.long.byte 0x0c 0.--6. 1. " IDMAC_SUB_ADDR_28 ,The CPMEM alternative entry 28" line.long 0x10 "IDMAC_BNDM_EN_1,IDMAC Band Mode Enable 1 Register" bitfld.long 0x10 26. " IDMAC_BNDM_EN_26 ,IDMAC Band Mode Enable bit 26" "Disabled,Enabled" bitfld.long 0x10 25. " IDMAC_BNDM_EN_25 ,IDMAC Band Mode Enable bit 25" "Disabled,Enabled" bitfld.long 0x10 22. " IDMAC_BNDM_EN_22 ,IDMAC Band Mode Enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " IDMAC_BNDM_EN_21 ,IDMAC Band Mode Enable bit 21" "Disabled,Enabled" bitfld.long 0x10 20. " IDMAC_BNDM_EN_20 ,IDMAC Band Mode Enable bit 20" "Disabled,Enabled" bitfld.long 0x10 12. " IDMAC_BNDM_EN_12 ,IDMAC Band Mode Enable bit 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " IDMAC_BNDM_EN_11 ,IDMAC Band Mode Enable bit 11" "Disabled,Enabled" bitfld.long 0x10 5. " IDMAC_BNDM_EN_5 ,IDMAC Band Mode Enable bit 5" "Disabled,Enabled" bitfld.long 0x10 3. " IDMAC_BNDM_EN_3 ,IDMAC Band Mode Enable bit 3" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " IDMAC_BNDM_EN_2 ,IDMAC Band Mode Enable bit 2" "Disabled,Enabled" bitfld.long 0x10 1. " IDMAC_BNDM_EN_1 ,IDMAC Band Mode Enable bit 1" "Disabled,Enabled" bitfld.long 0x10 0. " IDMAC_BNDM_EN_0 ,IDMAC Band Mode Enable bit 0" "Disabled,Enabled" line.long 0x14 "IDMAC_BNDM_EN_2,IDMAC Band Mode Enable 2 Register" bitfld.long 0x14 18. " IDMAC_BNDM_EN_50 ,IDMAC Band Mode Enable bit 50" "Disabled,Enabled" bitfld.long 0x14 17. " IDMAC_BNDM_EN_49 ,IDMAC Band Mode Enable bit 49" "Disabled,Enabled" bitfld.long 0x14 16. " IDMAC_BNDM_EN_48 ,IDMAC Band Mode Enable bit 48" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " IDMAC_BNDM_EN_47 ,IDMAC Band Mode Enable bit 47" "Disabled,Enabled" bitfld.long 0x14 14. " IDMAC_BNDM_EN_46 ,IDMAC Band Mode Enable bit 46" "Disabled,Enabled" bitfld.long 0x14 13. " IDMAC_BNDM_EN_45 ,IDMAC Band Mode Enable bit 45" "Disabled,Enabled" line.long 0x18 "IDMAC_SC_CORD0,IDMAC Scroll Coordinations Register" hexmask.long.word 0x18 16.--27. 1. " SX0 ,Scroll X coordination" hexmask.long.word 0x18 0.--10. 1. " SY0 ,Scroll Y coordination" line.long 0x1c "IDMAC_SC_CORD1,IDMAC Scroll Coordinations Register" hexmask.long.word 0x1c 16.--27. 1. " SX1 ,Scroll X coordination" hexmask.long.word 0x1c 0.--10. 1. " SY1 ,Scroll Y coordination" rgroup.long 0x100++0x07 line.long 0x00 "IDMAC_CH_BUSY_1,IDMAC Channel Busy 1 Register" bitfld.long 0x00 31. " IDMAC_CH_BUSY_31 ,IDMAC Channel busy bit 31" "Not busy,Busy" bitfld.long 0x00 29. " IDMAC_CH_BUSY_29 ,IDMAC Channel busy bit 29" "Not busy,Busy" bitfld.long 0x00 28. " IDMAC_CH_BUSY_28 ,IDMAC Channel busy bit 28" "Not busy,Busy" textline " " bitfld.long 0x00 27. " IDMAC_CH_BUSY_27 ,IDMAC Channel busy bit 27" "Not busy,Busy" bitfld.long 0x00 26. " IDMAC_CH_BUSY_26 ,IDMAC Channel busy bit 26" "Not busy,Busy" bitfld.long 0x00 25. " IDMAC_CH_BUSY_25 ,IDMAC Channel busy bit 25" "Not busy,Busy" textline " " bitfld.long 0x00 24. " IDMAC_CH_BUSY_24 ,IDMAC Channel busy bit 24" "Not busy,Busy" bitfld.long 0x00 23. " IDMAC_CH_BUSY_23 ,IDMAC Channel busy bit 23" "Not busy,Busy" bitfld.long 0x00 22. " IDMAC_CH_BUSY_22 ,IDMAC Channel busy bit 22" "Not busy,Busy" textline " " bitfld.long 0x00 21. " IDMAC_CH_BUSY_21 ,IDMAC Channel busy bit 21" "Not busy,Busy" bitfld.long 0x00 20. " IDMAC_CH_BUSY_20 ,IDMAC Channel busy bit 20" "Not busy,Busy" bitfld.long 0x00 18. " IDMAC_CH_BUSY_18 ,IDMAC Channel busy bit 18" "Not busy,Busy" textline " " bitfld.long 0x00 17. " IDMAC_CH_BUSY_17 ,IDMAC Channel busy bit 17" "Not busy,Busy" bitfld.long 0x00 15. " IDMAC_CH_BUSY_15 ,IDMAC Channel busy bit 15" "Not busy,Busy" bitfld.long 0x00 14. " IDMAC_CH_BUSY_14 ,IDMAC Channel busy bit 14" "Not busy,Busy" textline " " bitfld.long 0x00 13. " IDMAC_CH_BUSY_13 ,IDMAC Channel busy bit 13" "Not busy,Busy" bitfld.long 0x00 12. " IDMAC_CH_BUSY_12 ,IDMAC Channel busy bit 12" "Not busy,Busy" bitfld.long 0x00 11. " IDMAC_CH_BUSY_11 ,IDMAC Channel busy bit 11" "Not busy,Busy" textline " " bitfld.long 0x00 10. " IDMAC_CH_BUSY_10 ,IDMAC Channel busy bit 10" "Not busy,Busy" bitfld.long 0x00 9. " IDMAC_CH_BUSY_9 ,IDMAC Channel busy bit 9" "Not busy,Busy" bitfld.long 0x00 8. " IDMAC_CH_BUSY_8 ,IDMAC Channel busy bit 8" "Not busy,Busy" textline " " bitfld.long 0x00 5. " IDMAC_CH_BUSY_5 ,IDMAC Channel busy bit 5" "Not busy,Busy" bitfld.long 0x00 3. " IDMAC_CH_BUSY_3 ,IDMAC Channel busy bit 3" "Not busy,Busy" bitfld.long 0x00 2. " IDMAC_CH_BUSY_2 ,IDMAC Channel busy bit 2" "Not busy,Busy" textline " " bitfld.long 0x00 1. " IDMAC_CH_BUSY_1 ,IDMAC Channel busy bit 1" "Not busy,Busy" bitfld.long 0x00 0. " IDMAC_CH_BUSY_0 ,IDMAC Channel busy bit 0" "Not busy,Busy" line.long 0x04 "IDMAC_CH_BUSY_2,IDMAC Channel Busy 2 Register" bitfld.long 0x04 20. " IDMAC_CH_BUSY_52 ,IDMAC Channel busy bit 52" "Not busy,Busy" bitfld.long 0x04 19. " IDMAC_CH_BUSY_51 ,IDMAC Channel busy bit 51" "Not busy,Busy" bitfld.long 0x04 18. " IDMAC_CH_BUSY_50 ,IDMAC Channel busy bit 50" "Not busy,Busy" textline " " bitfld.long 0x04 17. " IDMAC_CH_BUSY_49 ,IDMAC Channel busy bit 49" "Not busy,Busy" bitfld.long 0x04 16. " IDMAC_CH_BUSY_48 ,IDMAC Channel busy bit 48" "Not busy,Busy" bitfld.long 0x04 15. " IDMAC_CH_BUSY_47 ,IDMAC Channel busy bit 47" "Not busy,Busy" textline " " bitfld.long 0x04 14. " IDMAC_CH_BUSY_46 ,IDMAC Channel busy bit 46" "Not busy,Busy" bitfld.long 0x04 13. " IDMAC_CH_BUSY_45 ,IDMAC Channel busy bit 45" "Not busy,Busy" bitfld.long 0x04 12. " IDMAC_CH_BUSY_44 ,IDMAC Channel busy bit 44" "Not busy,Busy" textline " " bitfld.long 0x04 11. " IDMAC_CH_BUSY_43 ,IDMAC Channel busy bit 43" "Not busy,Busy" bitfld.long 0x04 10. " IDMAC_CH_BUSY_42 ,IDMAC Channel busy bit 42" "Not busy,Busy" bitfld.long 0x04 9. " IDMAC_CH_BUSY_41 ,IDMAC Channel busy bit 41" "Not busy,Busy" textline " " bitfld.long 0x04 8. " IDMAC_CH_BUSY_40 ,IDMAC Channel busy bit 40" "Not busy,Busy" bitfld.long 0x04 1. " IDMAC_CH_BUSY_33 ,IDMAC Channel busy bit 33" "Not busy,Busy" width 0x0B tree.end tree "DP registers" base ad:0x02A100000 width 27. group.long 0x00++0x117 line.long 0x00 "DP_COM_CONF_SYNC,DP Common Configuration Sync Flow Register" bitfld.long 0x00 13. " DP_GAMMA_YUV_EN_SYNC ,GAMMA's YUV mode enable for sync flow" "Disabled,Enabled" bitfld.long 0x00 12. " DP_GAMMA_EN_SYNC ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DP_CSC_YUV_SAT_MODE_SYNC ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0x00 10. " DP_CSC_GAMUT_SAT_EN_SYNC ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " DP_CSC_DEF_SYNC ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0x00 4.--6. " DP_COC_SYNC ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0x00 3. " DP_GWCKE_SYNC ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DP_GWAM_SYNC ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0x00 1. " DP_GWSEL_SYNC ,Graphic Window Select" "Full,Partial" bitfld.long 0x00 0. " DP_FG_EN_SYNC ,Partial plane Enable" "Disabled,Enabled" line.long 0x04 "DP_GRAPH_WIND_CTRL_SYNC,Graphic Window Alpha Value" hexmask.long.byte 0x04 24.--31. 1. " DP_GWAV_SYNC ,Graphic Window Alpha Value" hexmask.long.byte 0x04 16.--23. 1. " DP_GWCKR_SYNC ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0x04 8.--15. 1. " DP_GWCKG_SYNC ,Graphic Window Color Keying Green Component" hexmask.long.byte 0x04 0.--7. 1. " DP_GWCKB_SYNC ,Graphic Window Color Keying Blue Component" line.long 0x08 "DP_FG_POS_SYNC,DP partial plane Window Position Sync Flow Register" hexmask.long.word 0x08 16.--26. 1. " DP_FGXP_SYNC ,FGXP partial plane Window X Position" hexmask.long.word 0x08 0.--10. 1. " DP_FGYP_SYNC ,FGYP partial plane Window Y Position" line.long 0x0c "DP_CUR_POS_SYNC,DP Cursor Position and Size Sync Flow Register" hexmask.long.byte 0x0c 27.--31. 1. " DP_CYP_SYNC ,Cursor Y Position" hexmask.long.word 0x0c 16.--26. 1. " DP_CYH_SYNC ,Cursor Height" textline " " hexmask.long.byte 0x0c 11.--15. 1. " DP_CXP_SYNC ,Cursor X Position" hexmask.long.word 0x0c 0.--10. 1. " DP_CXW_SYNC ,Cursor Width" line.long 0x10 "DP_CUR_MAP_SYNC,DP Color Cursor Mapping Sync Flow Register" hexmask.long.byte 0x10 16.--23. 1. " DP_CUR_COL_B_SYNC ,Blue component of the cursor color in color mode" hexmask.long.byte 0x10 8.--15. 1. " DP_CUR_COL_G_SYNC ,Green component of the cursor color in color mode" textline " " hexmask.long.byte 0x10 0.--7. 1. " DP_CUR_COL_R_SYNC ,Red component of the cursor color in color mode" line.long 0x14 "DP_GAMMA_C_SYNC_0,DP Gamma Constants Sync Flow Register 0" hexmask.long.word 0x14 16.--24. 1. " DP_GAMMA_C_SYNC_1 ,CONSTANT 1 parameter of Gamma Correction" hexmask.long.word 0x14 0.--8. 1. " DP_GAMMA_C_SYNC_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0x18 "DP_GAMMA_C_SYNC_1,DP Gamma Constants Sync Flow Register 1" hexmask.long.word 0x18 16.--24. 1. " DP_GAMMA_C_SYNC_3 ,CONSTANT 3 parameter of Gamma Correction" hexmask.long.word 0x18 0.--8. 1. " DP_GAMMA_C_SYNC_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0x1C "DP_GAMMA_C_SYNC_2,DP Gamma Constants Sync Flow Register 2" hexmask.long.word 0x1C 16.--24. 1. " DP_GAMMA_C_SYNC_5 ,CONSTANT 5 parameter of Gamma Correction" hexmask.long.word 0x1C 0.--8. 1. " DP_GAMMA_C_SYNC_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0x20 "DP_GAMMA_C_SYNC_3,DP Gamma Constants Sync Flow Register 3" hexmask.long.word 0x20 16.--24. 1. " DP_GAMMA_C_SYNC_7 ,CONSTANT 7 parameter of Gamma Correction" hexmask.long.word 0x20 0.--8. 1. " DP_GAMMA_C_SYNC_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0x24 "DP_GAMMA_C_SYNC_4,DP Gamma Constants Sync Flow Register 4" hexmask.long.word 0x24 16.--24. 1. " DP_GAMMA_C_SYNC_9 ,CONSTANT 9 parameter of Gamma Correction" hexmask.long.word 0x24 0.--8. 1. " DP_GAMMA_C_SYNC_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0x28 "DP_GAMMA_C_SYNC_5,DP Gamma Constants Sync Flow Register 5" hexmask.long.word 0x28 16.--24. 1. " DP_GAMMA_C_SYNC_11 ,CONSTANT 11 parameter of Gamma Correction" hexmask.long.word 0x28 0.--8. 1. " DP_GAMMA_C_SYNC_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0x2C "DP_GAMMA_C_SYNC_6,DP Gamma Constants Sync Flow Register 6" hexmask.long.word 0x2C 16.--24. 1. " DP_GAMMA_C_SYNC_13 ,CONSTANT 13 parameter of Gamma Correction" hexmask.long.word 0x2C 0.--8. 1. " DP_GAMMA_C_SYNC_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0x30 "DP_GAMMA_C_SYNC_7,DP Gamma Constants Sync Flow Register 7" hexmask.long.word 0x30 16.--24. 1. " DP_GAMMA_C_SYNC_15 ,CONSTANT 15 parameter of Gamma Correction" hexmask.long.word 0x30 0.--8. 1. " DP_GAMMA_C_SYNC_14 ,CONSTANT 14 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x34 "DP_GAMMA_C_SYNC_0,DP Gamma Constants Sync Flow Register 0" else line.long 0x34 "DP_GAMMA_S_SYNC_0,DP Gamma Correction Slope Sync Flow Register 0" endif hexmask.long.byte 0x34 24.--31. 1. " DP_GAMMA_S_SYNC_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0x34 16.--23. 1. " DP_GAMMA_S_SYNC_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0x34 8.--15. 1. " DP_GAMMA_S_SYNC_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0x34 0.--7. 1. " DP_GAMMA_S_SYNC_0 ,SLOPE 0 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x38 "DP_GAMMA_C_SYNC_1,DP Gamma Constants Sync Flow Register 1" else line.long 0x38 "DP_GAMMA_S_SYNC_1,DP Gamma Correction Slope Sync Flow Register 1" endif hexmask.long.byte 0x38 24.--31. 1. " DP_GAMMA_S_SYNC_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0x38 16.--23. 1. " DP_GAMMA_S_SYNC_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0x38 8.--15. 1. " DP_GAMMA_S_SYNC_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0x38 0.--7. 1. " DP_GAMMA_S_SYNC_4 ,SLOPE 4 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x3C "DP_GAMMA_C_SYNC_2,DP Gamma Constants Sync Flow Register 2" else line.long 0x3C "DP_GAMMA_S_SYNC_2,DP Gamma Correction Slope Sync Flow Register 2" endif hexmask.long.byte 0x3C 24.--31. 1. " DP_GAMMA_S_SYNC_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0x3C 16.--23. 1. " DP_GAMMA_S_SYNC_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0x3C 8.--15. 1. " DP_GAMMA_S_SYNC_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0x3C 0.--7. 1. " DP_GAMMA_S_SYNC_8 ,SLOPE 8 parameter of Gamma Correction" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") line.long 0x40 "DP_GAMMA_C_SYNC_3,DP Gamma Constants Sync Flow Register 3" else line.long 0x40 "DP_GAMMA_S_SYNC_3,DP Gamma Correction Slope Sync Flow Register 3" endif hexmask.long.byte 0x40 24.--31. 1. " DP_GAMMA_S_SYNC_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0x40 16.--23. 1. " DP_GAMMA_S_SYNC_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0x40 8.--15. 1. " DP_GAMMA_S_SYNC_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0x40 0.--7. 1. " DP_GAMMA_S_SYNC_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0x44 "DP_CSCA_SYNC_0,DP Color Space Conversion Control Sync Flow register 0" hexmask.long.word 0x44 16.--25. 1. " DP_CSC_A_SYNC_1 ,A 1 parameter of color conversion" hexmask.long.word 0x44 0.--9. 1. " DP_CSC_A_SYNC_0 ,A 0 parameter of color conversion" line.long 0x48 "DP_CSCA_SYNC_1,DP Color Space Conversion Control Sync Flow register 1" hexmask.long.word 0x48 16.--25. 1. " DP_CSC_A_SYNC_3 ,A 3 parameter of color conversion" hexmask.long.word 0x48 0.--9. 1. " DP_CSC_A_SYNC_2 ,A 2 parameter of color conversion" line.long 0x4C "DP_CSCA_SYNC_2,DP Color Space Conversion Control Sync Flow register 2" hexmask.long.word 0x4C 16.--25. 1. " DP_CSC_A_SYNC_5 ,A 5 parameter of color conversion" hexmask.long.word 0x4C 0.--9. 1. " DP_CSC_A_SYNC_4 ,A 4 parameter of color conversion" line.long 0x50 "DP_CSCA_SYNC_3,DP Color Space Conversion Control Sync Flow register 3" hexmask.long.word 0x50 16.--25. 1. " DP_CSC_A_SYNC_7 ,A 7 parameter of color conversion" hexmask.long.word 0x50 0.--9. 1. " DP_CSC_A_SYNC_6 ,A 6 parameter of color conversion" line.long 0x54 "DP_CSC_SYNC_0,DP Color Conversion Control Sync Flow register 0" bitfld.long 0x54 30.--31. " DP_CSC_S0_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x54 16.--29. 1. " DP_CSC_B0_SYNC ,B0 parameter of color conversion" textline " " hexmask.long.word 0x54 0.--9. 1. " DP_CSC_A8_SYNC ,A parameter of color conversion" line.long 0x58 "DP_CSC_SYNC_1,DP Color Conversion Control Sync Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x58 30.--31. " DP_CSC_S2_SYNC ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 16.--29. 1. " DP_CSC_B2_SYNC ,B2 parameter of color conversion" textline " " bitfld.long 0x58 14.--15. " DP_CSC_S1_SYNC ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 0.--13. 1. " DP_CSC_B1_SYNC ,B1 parameter of color conversion" else bitfld.long 0x58 30.--31. " DP_CSC_S2_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 16.--29. 1. " DP_CSC_B2_SYNC ,B0 parameter of color conversion" textline " " bitfld.long 0x58 14.--15. " DP_CSC_S1_SYNC ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x58 0.--13. 1. " DP_CSC_B1_SYNC ,B0 parameter of color conversion" endif line.long 0x5c "DP_CUR_POS_ALT,DP Cursor Position and Size Alternate Register" hexmask.long.byte 0x5c 27.--31. 1. " DP_CYP_SYNC_ALT ,Cursor Y Position" hexmask.long.word 0x5c 16.--26. 1. " DP_CYH_SYNC_ALT ,Cursor Height" textline " " hexmask.long.byte 0x5c 11.--15. 1. " DP_CXP_SYNC_ALT ,Cursor X Position" hexmask.long.word 0x5c 0.--10. 1. " DP_CXW_SYNC_ALT ,Cursor Width" line.long 0x60 "DP_COM_CONF_ASYNC0,DP Common Configuration async0 Flow Register" bitfld.long 0x60 13. " DP_GAMMA_YUV_EN_ASYNC0 ,GAMMA's YUV mode enable for async flow 0" "Disabled,Enabled" bitfld.long 0x60 12. " DP_GAMMA_EN_ASYNC0 ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0x60 11. " DP_CSC_YUV_SAT_MODE_ASYNC0 ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0x60 10. " DP_CSC_GAMUT_SAT_EN_ASYNC0 ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0x60 8.--9. " DP_CSC_DEF_ASYNC0 ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0x60 4.--6. " DP_COC_ASYNC0 ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0x60 3. " DP_GWCKE_ASYNC0 ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0x60 2. " DP_GWAM_ASYNC0 ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0x60 1. " DP_GWSEL_ASYNC0 ,Graphic Window Select" "Full,Partial" line.long 0x64 "DP_GRAPH_WIND_CTRL_ASYNC0,DP Graphic Window Control async0 Flow Register" hexmask.long.byte 0x64 24.--31. 1. " DP_GWAV_ASYNC0 ,Graphic Window Alpha Value" hexmask.long.byte 0x64 16.--23. 1. " DP_GWCKR_ASYNC0 ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0x64 8.--15. 1. " DP_GWCKG_ASYNC0 ,Graphic Window Color Keying Green Component" hexmask.long.byte 0x64 0.--7. 1. " DP_GWCKB_ASYNC0 ,Graphic Window Color Keying Blue Component" line.long 0x68 "DP_FG_POS_ASYNC0,DP partial plane Window Position async0 Flow Register" hexmask.long.word 0x68 16.--26. 1. " DP_FGXP_ASYNC0 ,FGXP partial plane Window X Position" hexmask.long.word 0x68 0.--10. 1. " DP_FGYP_ASYNC0 ,FGYP partial plane Window Y Position" line.long 0x6c "DP_CUR_POS_ASYNC0,DP Cursor Position and Size async0 Flow Register" hexmask.long.byte 0x6c 27.--31. 1. " DP_CYP_ASYNC0 ,Cursor Y Position" hexmask.long.word 0x6c 16.--26. 1. " DP_CYH_ASYNC0 ,Cursor Height" textline " " hexmask.long.byte 0x6c 11.--15. 1. " DP_CXP_ASYNC0 ,Cursor X Position" hexmask.long.word 0x6c 0.--10. 1. " DP_CXW_ASYNC0 ,Cursor Width" line.long 0x70 "DP_CUR_MAP_ASYNC0,DP Color Cursor Mapping async0 Flow Register" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.byte 0x70 16.--23. 1. " CUR_COL_R_ASYNC0 ,Red component of the cursor color in color mode" else hexmask.long.byte 0x70 16.--23. 1. " CUR_COL_B_ASYNC0 ,Blue component of the cursor color in color mode" endif hexmask.long.byte 0x70 8.--15. 1. " CUR_COL_G_ASYNC0 ,Green component of the cursor color in color mode" textline " " sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.byte 0x70 0.--7. 1. " CUR_COL_B_ASYNC0 ,Blue component of the cursor color in color mode" else hexmask.long.byte 0x70 0.--7. 1. " CUR_COL_R_ASYNC0 ,Red component of the cursor color in color mode" endif line.long 0x74 "DP_GAMMA_C_ASYNC0_0,DP Gamma Constants ASYNC0 Flow Register 0" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x74 16.--24. 1. " DP_GAMMA_C_ASYNC0_1 ,CONSTANT 1 parameter of Gamma Correction" else hexmask.long.word 0x74 16.--27. 1. " DP_GAMMA_C_ASYNC0_1 ,CONSTANT 1 parameter of Gamma Correction" endif hexmask.long.word 0x74 0.--8. 1. " DP_GAMMA_C_ASYNC0_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0x78 "DP_GAMMA_C_ASYNC0_1,DP Gamma Constants ASYNC0 Flow Register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x78 16.--24. 1. " DP_GAMMA_C_ASYNC0_3 ,CONSTANT 3 parameter of Gamma Correction" else hexmask.long.word 0x78 16.--27. 1. " DP_GAMMA_C_ASYNC0_3 ,CONSTANT 3 parameter of Gamma Correction" endif hexmask.long.word 0x78 0.--8. 1. " DP_GAMMA_C_ASYNC0_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0x7C "DP_GAMMA_C_ASYNC0_2,DP Gamma Constants ASYNC0 Flow Register 2" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x7C 16.--24. 1. " DP_GAMMA_C_ASYNC0_5 ,CONSTANT 5 parameter of Gamma Correction" else hexmask.long.word 0x7C 16.--27. 1. " DP_GAMMA_C_ASYNC0_5 ,CONSTANT 5 parameter of Gamma Correction" endif hexmask.long.word 0x7C 0.--8. 1. " DP_GAMMA_C_ASYNC0_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0x80 "DP_GAMMA_C_ASYNC0_3,DP Gamma Constants ASYNC0 Flow Register 3" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x80 16.--24. 1. " DP_GAMMA_C_ASYNC0_7 ,CONSTANT 7 parameter of Gamma Correction" else hexmask.long.word 0x80 16.--27. 1. " DP_GAMMA_C_ASYNC0_7 ,CONSTANT 7 parameter of Gamma Correction" endif hexmask.long.word 0x80 0.--8. 1. " DP_GAMMA_C_ASYNC0_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0x84 "DP_GAMMA_C_ASYNC0_4,DP Gamma Constants ASYNC0 Flow Register 4" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x84 16.--24. 1. " DP_GAMMA_C_ASYNC0_9 ,CONSTANT 9 parameter of Gamma Correction" else hexmask.long.word 0x84 16.--27. 1. " DP_GAMMA_C_ASYNC0_9 ,CONSTANT 9 parameter of Gamma Correction" endif hexmask.long.word 0x84 0.--8. 1. " DP_GAMMA_C_ASYNC0_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0x88 "DP_GAMMA_C_ASYNC0_5,DP Gamma Constants ASYNC0 Flow Register 5" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x88 16.--24. 1. " DP_GAMMA_C_ASYNC0_11 ,CONSTANT 11 parameter of Gamma Correction" else hexmask.long.word 0x88 16.--27. 1. " DP_GAMMA_C_ASYNC0_11 ,CONSTANT 11 parameter of Gamma Correction" endif hexmask.long.word 0x88 0.--8. 1. " DP_GAMMA_C_ASYNC0_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0x8C "DP_GAMMA_C_ASYNC0_6,DP Gamma Constants ASYNC0 Flow Register 6" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x8C 16.--24. 1. " DP_GAMMA_C_ASYNC0_13 ,CONSTANT 13 parameter of Gamma Correction" else hexmask.long.word 0x8C 16.--27. 1. " DP_GAMMA_C_ASYNC0_13 ,CONSTANT 13 parameter of Gamma Correction" endif hexmask.long.word 0x8C 0.--8. 1. " DP_GAMMA_C_ASYNC0_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0x90 "DP_GAMMA_C_ASYNC0_7,DP Gamma Constants ASYNC0 Flow Register 7" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x90 16.--24. 1. " DP_GAMMA_C_ASYNC0_15 ,CONSTANT 15 parameter of Gamma Correction" else hexmask.long.word 0x90 16.--27. 1. " DP_GAMMA_C_ASYNC0_15 ,CONSTANT 15 parameter of Gamma Correction" endif hexmask.long.word 0x90 0.--8. 1. " DP_GAMMA_C_ASYNC0_14 ,CONSTANT 14 parameter of Gamma Correction" line.long 0x94 "DP_GAMMA_S_ASYNC0_0,DP Gamma Correction Slope async0 Flow Register 0" hexmask.long.byte 0x94 24.--31. 1. " DP_GAMMA_S_ASYNC0_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0x94 16.--23. 1. " DP_GAMMA_S_ASYNC0_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0x94 8.--15. 1. " DP_GAMMA_S_ASYNC0_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0x94 0.--7. 1. " DP_GAMMA_S_ASYNC0_0 ,SLOPE 0 parameter of Gamma Correction" line.long 0x98 "DP_GAMMA_S_ASYNC0_1,DP Gamma Correction Slope async0 Flow Register 1" hexmask.long.byte 0x98 24.--31. 1. " DP_GAMMA_S_ASYNC0_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0x98 16.--23. 1. " DP_GAMMA_S_ASYNC0_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0x98 8.--15. 1. " DP_GAMMA_S_ASYNC0_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0x98 0.--7. 1. " DP_GAMMA_S_ASYNC0_4 ,SLOPE 4 parameter of Gamma Correction" line.long 0x9C "DP_GAMMA_S_ASYNC0_2,DP Gamma Correction Slope async0 Flow Register 2" hexmask.long.byte 0x9C 24.--31. 1. " DP_GAMMA_S_ASYNC0_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0x9C 16.--23. 1. " DP_GAMMA_S_ASYNC0_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0x9C 8.--15. 1. " DP_GAMMA_S_ASYNC0_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0x9C 0.--7. 1. " DP_GAMMA_S_ASYNC0_8 ,SLOPE 8 parameter of Gamma Correction" line.long 0xA0 "DP_GAMMA_S_ASYNC0_3,DP Gamma Correction Slope async0 Flow Register 3" hexmask.long.byte 0xA0 24.--31. 1. " DP_GAMMA_S_ASYNC0_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0xA0 16.--23. 1. " DP_GAMMA_S_ASYNC0_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0xA0 8.--15. 1. " DP_GAMMA_S_ASYNC0_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0xA0 0.--7. 1. " DP_GAMMA_S_ASYNC0_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0xA4 "DP_CSCA_ASYNC0_0,DP Color Space Conversion Control ASYNC0 Flow register 0" hexmask.long.word 0xA4 16.--25. 1. " DP_CSC_A_ASYNC0_1 ,A 1 parameter of color conversion" hexmask.long.word 0xA4 0.--9. 1. " DP_CSC_A_ASYNC0_0 ,A 0 parameter of color conversion" line.long 0xA8 "DP_CSCA_ASYNC0_1,DP Color Space Conversion Control ASYNC0 Flow register 1" hexmask.long.word 0xA8 16.--25. 1. " DP_CSC_A_ASYNC0_3 ,A 3 parameter of color conversion" hexmask.long.word 0xA8 0.--9. 1. " DP_CSC_A_ASYNC0_2 ,A 2 parameter of color conversion" line.long 0xAC "DP_CSCA_ASYNC0_2,DP Color Space Conversion Control ASYNC0 Flow register 2" hexmask.long.word 0xAC 16.--25. 1. " DP_CSC_A_ASYNC0_5 ,A 5 parameter of color conversion" hexmask.long.word 0xAC 0.--9. 1. " DP_CSC_A_ASYNC0_4 ,A 4 parameter of color conversion" line.long 0xB0 "DP_CSCA_ASYNC0_3,DP Color Space Conversion Control ASYNC0 Flow register 3" hexmask.long.word 0xB0 16.--25. 1. " DP_CSC_A_ASYNC0_7 ,A 7 parameter of color conversion" hexmask.long.word 0xB0 0.--9. 1. " DP_CSC_A_ASYNC0_6 ,A 6 parameter of color conversion" line.long 0xb4 "DP_CSC_ASYNC0_0,DP Color Conversion Control ASYNC0 Flow register 0" bitfld.long 0xb4 30.--31. " DP_CSC_S0_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb4 16.--29. 1. " DP_CSC_B0_ASYNC0 ,B0 parameter of color conversion" textline " " hexmask.long.word 0xb4 0.--9. 1. " DP_CSC_A8_ASYNC0 ,A parameter of color conversion" line.long 0xb8 "DP_CSC_ASYNC0_1,DP Color Conversion Control ASYNC0 Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0xb8 30.--31. " DP_CSC_S2_ASYNC0 ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 16.--29. 1. " DP_CSC_B2_ASYNC0 ,B2 parameter of color conversion" textline " " bitfld.long 0xb8 14.--15. " DP_CSC_S1_ASYNC0 ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 0.--13. 1. " DP_CSC_B1_ASYNC0 ,B1 parameter of color conversion" else bitfld.long 0xb8 30.--31. " DP_CSC_S2_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 16.--29. 1. " DP_CSC_B2_ASYNC0 ,B0 parameter of color conversion" textline " " bitfld.long 0xb8 14.--15. " DP_CSC_S1_ASYNC0 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0xb8 0.--13. 1. " DP_CSC_B1_ASYNC0 ,B0 parameter of color conversion" endif line.long 0xbc "DP_COM_CONF_ASYNC1,DP Common Configuration ASYNC1 Flow Register" bitfld.long 0xbc 13. " DP_GAMMA_YUV_EN_ASYNC1 ,GAMMA's YUV mode enable for async flow 1" "Disabled,Enabled" bitfld.long 0xbc 12. " DP_GAMMA_EN_ASYNC1 ,GAMMA_EN - Gamma correction module enable bit" "Disabled,Enabled" textline " " bitfld.long 0xbc 11. " DP_CSC_YUV_SAT_MODE_ASYNC1 ,YUV saturation mode for color space conversion" "Y/U/V range 0-255/0-255/0-255,Y/U/V range 16-235/16-240/16-240" bitfld.long 0xbc 10. " DP_CSC_GAMUT_SAT_EN_ASYNC1 ,Indicate if GAMUT saturation is enabled" "Disabled,Enabled" textline " " bitfld.long 0xbc 8.--9. " DP_CSC_DEF_ASYNC1 ,Enable or disable Color Space Conversion" "Disabled,Enable after combining,Enable before comb. on BG,Enable before comb. on FG" bitfld.long 0xbc 4.--6. " DP_COC_ASYNC1 ,Cursor Operation Control" "Disabled,Full,Reversed,AND,Reserved,OR,XOR,?..." textline " " bitfld.long 0xbc 3. " DP_GWCKE_ASYNC1 ,Graphic Window Color Keying Enable" "Disabled,Enabled" bitfld.long 0xbc 2. " DP_GWAM_ASYNC1 ,Graphic Window Alpha Mode" "Local,Global" textline " " bitfld.long 0xbc 1. " DP_GWSEL_ASYNC1 ,Graphic Window Select" "Full,Partial" line.long 0xc0 "DP_GRAPH_WIND_CTRL_ASYNC1,DP Graphic Window Control ASYNC1 Flow Register" hexmask.long.byte 0xc0 24.--31. 1. " DP_GWAV_ASYNC1 ,Graphic Window Alpha Value" hexmask.long.byte 0xc0 16.--23. 1. " DP_GWCKR_ASYNC1 ,Graphic Window Color Keying Red Component" textline " " hexmask.long.byte 0xc0 8.--15. 1. " DP_GWCKG_ASYNC1 ,Graphic Window Color Keying Green Component" hexmask.long.byte 0xc0 0.--7. 1. " DP_GWCKB_ASYNC1 ,Graphic Window Color Keying Blue Component" line.long 0xc4 "DP_FG_POS_ASYNC1,DP partial plane Window Position ASYNC1 Flow Register" hexmask.long.word 0xc4 16.--26. 1. " DP_FGXP_ASYNC1 ,FGXP partial plane Window X Position" hexmask.long.word 0xc4 0.--10. 1. " DP_FGYP_ASYNC1 ,FGYP partial plane Window Y Position" line.long 0xc8 "DP_CUR_POS_ASYNC1,DP Cursor Position and Size ASYNC1 Flow Register" hexmask.long.byte 0xc8 27.--31. 1. " DP_CYP_ASYNC1 ,Cursor Y Position" hexmask.long.word 0xc8 16.--26. 1. " DP_CYH_ASYNC1 ,Cursor Height" textline " " hexmask.long.byte 0xc8 11.--15. 1. " DP_CXP_ASYNC1 ,Cursor X Position" hexmask.long.word 0xc8 0.--10. 1. " DP_CXW_ASYNC1 ,Cursor Width" line.long 0xcc "DP_CUR_MAP_ASYNC1,DP Color Cursor Mapping ASYNC1 Flow Register" hexmask.long.byte 0xcc 16.--23. 1. " DP_CUR_COL_B_ASYNC1 ,Blue component of the cursor color in color mode" hexmask.long.byte 0xcc 8.--15. 1. " CUR_COL_G_ASYNC1 ,Green component of the cursor color in color mode" textline " " hexmask.long.byte 0xcc 0.--7. 1. " CUR_COL_R_ASYNC1 ,Red component of the cursor color in color mode" line.long 0xD0 "DP_GAMMA_C_ASYNC1_0,DP Gamma Constants ASYNC1 Flow Register 0" hexmask.long.word 0xD0 16.--24. 1. " DP_GAMMA_C_ASYNC1_1 ,CONSTANT 1 parameter of Gamma Correction" hexmask.long.word 0xD0 0.--8. 1. " DP_GAMMA_C_ASYNC1_0 ,CONSTANT 0 parameter of Gamma Correction" line.long 0xD4 "DP_GAMMA_C_ASYNC1_1,DP Gamma Constants ASYNC1 Flow Register 1" hexmask.long.word 0xD4 16.--24. 1. " DP_GAMMA_C_ASYNC1_3 ,CONSTANT 3 parameter of Gamma Correction" hexmask.long.word 0xD4 0.--8. 1. " DP_GAMMA_C_ASYNC1_2 ,CONSTANT 2 parameter of Gamma Correction" line.long 0xD8 "DP_GAMMA_C_ASYNC1_2,DP Gamma Constants ASYNC1 Flow Register 2" hexmask.long.word 0xD8 16.--24. 1. " DP_GAMMA_C_ASYNC1_5 ,CONSTANT 5 parameter of Gamma Correction" hexmask.long.word 0xD8 0.--8. 1. " DP_GAMMA_C_ASYNC1_4 ,CONSTANT 4 parameter of Gamma Correction" line.long 0xDC "DP_GAMMA_C_ASYNC1_3,DP Gamma Constants ASYNC1 Flow Register 3" hexmask.long.word 0xDC 16.--24. 1. " DP_GAMMA_C_ASYNC1_7 ,CONSTANT 7 parameter of Gamma Correction" hexmask.long.word 0xDC 0.--8. 1. " DP_GAMMA_C_ASYNC1_6 ,CONSTANT 6 parameter of Gamma Correction" line.long 0xE0 "DP_GAMMA_C_ASYNC1_4,DP Gamma Constants ASYNC1 Flow Register 4" hexmask.long.word 0xE0 16.--24. 1. " DP_GAMMA_C_ASYNC1_9 ,CONSTANT 9 parameter of Gamma Correction" hexmask.long.word 0xE0 0.--8. 1. " DP_GAMMA_C_ASYNC1_8 ,CONSTANT 8 parameter of Gamma Correction" line.long 0xE4 "DP_GAMMA_C_ASYNC1_5,DP Gamma Constants ASYNC1 Flow Register 5" hexmask.long.word 0xE4 16.--24. 1. " DP_GAMMA_C_ASYNC1_11 ,CONSTANT 11 parameter of Gamma Correction" hexmask.long.word 0xE4 0.--8. 1. " DP_GAMMA_C_ASYNC1_10 ,CONSTANT 10 parameter of Gamma Correction" line.long 0xE8 "DP_GAMMA_C_ASYNC1_6,DP Gamma Constants ASYNC1 Flow Register 6" hexmask.long.word 0xE8 16.--24. 1. " DP_GAMMA_C_ASYNC1_13 ,CONSTANT 13 parameter of Gamma Correction" hexmask.long.word 0xE8 0.--8. 1. " DP_GAMMA_C_ASYNC1_12 ,CONSTANT 12 parameter of Gamma Correction" line.long 0xEC "DP_GAMMA_C_ASYNC1_7,DP Gamma Constants ASYNC1 Flow Register 7" hexmask.long.word 0xEC 16.--24. 1. " DP_GAMMA_C_ASYNC1_15 ,CONSTANT 15 parameter of Gamma Correction" hexmask.long.word 0xEC 0.--8. 1. " DP_GAMMA_C_ASYNC1_14 ,CONSTANT 14 parameter of Gamma Correction" line.long 0xF0 "DP_GAMMA_S_ASYNC1_0,DP Gamma Correction Slope async1 Flow Register0" hexmask.long.byte 0xF0 24.--31. 1. " DP_GAMMA_S_ASYNC1_3 ,SLOPE 3 parameter of Gamma Correction" hexmask.long.byte 0xF0 16.--23. 1. " DP_GAMMA_S_ASYNC1_2 ,SLOPE 2 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF0 8.--15. 1. " DP_GAMMA_S_ASYNC1_1 ,SLOPE 1 parameter of Gamma Correction" hexmask.long.byte 0xF0 0.--7. 1. " DP_GAMMA_S_ASYNC1_0 ,SLOPE 0 parameter of Gamma Correction" line.long 0xF4 "DP_GAMMA_S_ASYNC1_1,DP Gamma Correction Slope async1 Flow Register1" hexmask.long.byte 0xF4 24.--31. 1. " DP_GAMMA_S_ASYNC1_7 ,SLOPE 7 parameter of Gamma Correction" hexmask.long.byte 0xF4 16.--23. 1. " DP_GAMMA_S_ASYNC1_6 ,SLOPE 6 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF4 8.--15. 1. " DP_GAMMA_S_ASYNC1_5 ,SLOPE 5 parameter of Gamma Correction" hexmask.long.byte 0xF4 0.--7. 1. " DP_GAMMA_S_ASYNC1_4 ,SLOPE 4 parameter of Gamma Correction" line.long 0xF8 "DP_GAMMA_S_ASYNC1_2,DP Gamma Correction Slope async1 Flow Register2" hexmask.long.byte 0xF8 24.--31. 1. " DP_GAMMA_S_ASYNC1_11 ,SLOPE 11 parameter of Gamma Correction" hexmask.long.byte 0xF8 16.--23. 1. " DP_GAMMA_S_ASYNC1_10 ,SLOPE 10 parameter of Gamma Correction" textline " " hexmask.long.byte 0xF8 8.--15. 1. " DP_GAMMA_S_ASYNC1_9 ,SLOPE 9 parameter of Gamma Correction" hexmask.long.byte 0xF8 0.--7. 1. " DP_GAMMA_S_ASYNC1_8 ,SLOPE 8 parameter of Gamma Correction" line.long 0xFC "DP_GAMMA_S_ASYNC1_3,DP Gamma Correction Slope async1 Flow Register3" hexmask.long.byte 0xFC 24.--31. 1. " DP_GAMMA_S_ASYNC1_15 ,SLOPE 15 parameter of Gamma Correction" hexmask.long.byte 0xFC 16.--23. 1. " DP_GAMMA_S_ASYNC1_14 ,SLOPE 14 parameter of Gamma Correction" textline " " hexmask.long.byte 0xFC 8.--15. 1. " DP_GAMMA_S_ASYNC1_13 ,SLOPE 13 parameter of Gamma Correction" hexmask.long.byte 0xFC 0.--7. 1. " DP_GAMMA_S_ASYNC1_12 ,SLOPE 12 parameter of Gamma Correction" line.long 0x100 "DP_CSCA_ASYNC1_0,DP Color Space Conversion Control ASYNC1 Flow register 0" hexmask.long.word 0x100 16.--25. 1. " DP_CSC_A_ASYNC1_1 ,A 1 parameter of color conversion" hexmask.long.word 0x100 0.--9. 1. " DP_CSC_A_ASYNC1_0 ,A 0 parameter of color conversion" line.long 0x104 "DP_CSCA_ASYNC1_1,DP Color Space Conversion Control ASYNC1 Flow register 1" hexmask.long.word 0x104 16.--25. 1. " DP_CSC_A_ASYNC1_3 ,A 3 parameter of color conversion" hexmask.long.word 0x104 0.--9. 1. " DP_CSC_A_ASYNC1_2 ,A 2 parameter of color conversion" line.long 0x108 "DP_CSCA_ASYNC1_2,DP Color Space Conversion Control ASYNC1 Flow register 2" hexmask.long.word 0x108 16.--25. 1. " DP_CSC_A_ASYNC1_5 ,A 5 parameter of color conversion" hexmask.long.word 0x108 0.--9. 1. " DP_CSC_A_ASYNC1_4 ,A 4 parameter of color conversion" line.long 0x10C "DP_CSCA_ASYNC1_3,DP Color Space Conversion Control ASYNC1 Flow register 3" hexmask.long.word 0x10C 16.--25. 1. " DP_CSC_A_ASYNC1_7 ,A 7 parameter of color conversion" hexmask.long.word 0x10C 0.--9. 1. " DP_CSC_A_ASYNC1_6 ,A 6 parameter of color conversion" line.long 0x110 "DP_CSC_ASYNC1_0,DP Color Conversion Control ASYNC1 Flow register 0" bitfld.long 0x110 30.--31. " DP_CSC_S0_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x110 16.--29. 1. " DP_CSC_B0_ASYNC1 ,B0 parameter of color conversion" textline " " hexmask.long.word 0x110 0.--9. 1. " DP_CSC_A8_ASYNC1 ,A parameter of color conversion" line.long 0x114 "DP_CSC_ASYNC1_1,DP Color Conversion Control ASYNC1 Flow register 1" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x114 30.--31. " DP_CSC_S2_ASYNC1 ,S2 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 16.--29. 1. " DP_CSC_B2_ASYNC1 ,B2 parameter of color conversion" textline " " bitfld.long 0x114 14.--15. " DP_CSC_S1_ASYNC1 ,S1 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 0.--13. 1. " DP_CSC_B1_ASYNC1 ,B1 parameter of color conversion" else bitfld.long 0x114 30.--31. " DP_CSC_S2_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 16.--29. 1. " DP_CSC_B2_ASYNC1 ,B0 parameter of color conversion" textline " " bitfld.long 0x114 14.--15. " DP_CSC_S1_ASYNC1 ,S0 parameter of color conversion" "2,1,0,-1" hexmask.long.word 0x114 0.--13. 1. " DP_CSC_B1_ASYNC1 ,B0 parameter of color conversion" endif base ad:0x02A180BC group.long 0x00++0x03 line.long 0x00 "DP_DEBUG_CNT,DP Debug Control register" bitfld.long 0x00 5.--7. " BRAKE_CNT_1 ,Counts the breaking events for unit #1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. " BRAKE_STATUS_EN_1 ,Enables the break/status unit #1" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " BRAKE_CNT_0 ,Counts the breaking events for unit #0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " BRAKE_STATUS_EN_0 ,Enables the break/status unit #0" "Disabled,Enabled" rgroup.long 0x04++0x3 line.long 0x00 "DP_DEBUG_STAT,DP Debug Status register" bitfld.long 0x00 29. " CYP_EN_OLD_1 ,Async flow has been broken in the middle of a cursor" "Not occurred,Occurred" bitfld.long 0x00 28. " COMBYP_EN_OLD_1 ,Async flow has been broken in the middle of combining" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " FG_ACTIVE_1 ,Displaying the partial frame has been started" "Not occurred,Occurred" hexmask.long.word 0x00 16.--26. 1. " V_CNT_OLD_1 ,The exact row where the async flow has been broken" textline " " bitfld.long 0x00 13. " CYP_EN_OLD_0 ,Async flow has been broken in the middle of a cursor" "Not occurred,Occurred" bitfld.long 0x00 12. " COMBYP_EN_OLD_0 ,Async flow has been broken in the middle of combining" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " FG_ACTIVE_0 ,Displaying the partial frame has been started for async flow" "Not occurred,Occurred" hexmask.long.word 0x00 0.--10. 1. " V_CNT_OLD_0 ,The exact row where the async flow has been broken" width 0x0B tree.end tree "IC registers" base ad:0x02A20000 width 16. group.long 0x00++0x27 line.long 0x00 "IC_CONF,IC Configuration Register" bitfld.long 0x00 31. " CSI_MEM_WR_EN ,CSI direct memory write enable" "Disabled,Enabled" bitfld.long 0x00 30. " RWS_EN ,Raw sensor enable" "Disabled,Enabled" bitfld.long 0x00 29. " IC_KEY_COLOR_EN ,Key color enable" "Disabled,Enabled" bitfld.long 0x00 28. " IC_GLB_LOC_A ,Global alpha" "Local,Global" textline " " bitfld.long 0x00 20. " PP_ROT_EN ,Postprocessing rotation task enable" "Disabled,Enabled" bitfld.long 0x00 19. " PP_CMB ,Postprocessing task combining enable" "Disabled,Enabled" bitfld.long 0x00 18. " PP_CSC2 ,Postprocessing task color conversion RGB-->YUV enable" "Disabled,Enabled" bitfld.long 0x00 17. " PP_CSC1 ,Postprocessing task color conversion YUV-->RGB enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PP_EN ,Postprocessing task enable" "Disabled,Enabled" bitfld.long 0x00 12. " PRPVF_ROT_EN ,Preprocessing rotation task for viewfinder enable" "Disabled,Enabled" bitfld.long 0x00 11. " PRPVF_CMB ,Preprocessing task for view-finder combining enable" "Disabled,Enabled" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") textline " " bitfld.long 0x00 10. " PRPVF_CSC2 ,Preprocessing task for view-finder second color conversion enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 9. " PRPVF_CSC1 ,Preprocessing task for view-finder first color conversion enable" "Disabled,Enabled" bitfld.long 0x00 8. " PRPVF_EN ,Preprocessing task for view-finder enable" "Disabled,Enabled" bitfld.long 0x00 2. " PRPENC_ROT_EN ,Preprocessing rotation task for encoding enable" "Disabled,Enabled" bitfld.long 0x00 1. " PRPENC_CSC1 ,Preprocessing task for encoding color conversion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PRPENC_EN ,Preprocessing task for encoding enable" "Disabled,Enabled" line.long 0x04 "IC_PRP_ENC_RSC,IC Preprocessing Encoder Resizing Coefficients Register" bitfld.long 0x04 30.--31. " PRPENC_DS_R_V ,Preprocessing task for encoding downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. " PRPENC_RS_R_V ,Preprocessing task for encoding resizing vertical ratio" bitfld.long 0x04 14.--15. " PRPENC_DS_R_H ,Preprocessing task for encoding downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x04 0.--13. 1. " PRPENC_RS_R_H ,Preprocessing task for encoding resizing horizontal ratio" line.long 0x08 "IC_PRP_VF_RSC,IC Preprocessing View-Finder Resizing Coefficients Register" bitfld.long 0x08 30.--31. " PRPVF_DS_R_V ,Preprocessing task for encoding downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x08 16.--29. 1. " PRPVF_RS_R_V ,Preprocessing task for encoding resizing vertical ratio" bitfld.long 0x08 14.--15. " PRPVF_DS_R_H ,Preprocessing task for encoding downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x08 0.--13. 1. " PRPVF_RS_R_H ,Preprocessing task for view-finding resizing horizontal ratio" line.long 0x0c "IC_PP_RSC,IC Postprocessing Resizing Coefficients Register" bitfld.long 0x0c 30.--31. " PP_DS_R_V ,Postprocessing task downsizing vertical ratio" "0,1,2,3" hexmask.long.word 0x0c 16.--29. 1. " PP_RS_R_V ,Postprocessing task resizing vertical ratio" bitfld.long 0x0c 14.--15. " PP_DS_R_H ,Postprocessing task downsizing horizontal ratio" "1,2,4,?..." hexmask.long.word 0x0c 0.--13. 1. " PP_RS_R_H ,Postprocessing task resizing horizontal ratio" line.long 0x10 "IC_CMBP_1,IC Combining Parameters Register 1" hexmask.long.byte 0x10 8.--15. 1. " IC_PP_ALPHA_V ,Postprocessing task global alpha" hexmask.long.byte 0x10 0.--7. 1. " IC_PRPVF_ALPHA_V ,Preprocessing task for encoding global alpha" line.long 0x14 "IC_CMBP_2,IC Combining Parameters Register 2" hexmask.long.byte 0x14 16.--23. 1. " IC_KEY_COLOR_R ,Key color red" hexmask.long.byte 0x14 8.--15. 1. " IC_KEY_COLOR_G ,Key color green" hexmask.long.byte 0x14 0.--7. 1. " IC_KEY_COLOR_B ,Key color blue" line.long 0x18 "IC_IDMAC_1,IC IDMAC Parameters 1 Register" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x18 25. " ALT_CB7_BURST_16 ,Number of pixels within a burst coming from the IDMAC for IC's CB7" "8,16" bitfld.long 0x18 24. " ALT_CB6_BURST_16 ,Number of active cycles within a burst coming coming from the IDMAC for IC's CB6" "8,16" textline " " endif bitfld.long 0x18 22. " T3_FLIP_RS ,LEFT/RIGHT flip for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 21. " T2_FLIP_RS ,LEFT/RIGHT flip for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 20. " T1_FLIP_RS ,LEFT/RIGHT flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 19. " T3_FLIP_UD ,UP/DOWN flip for Post Processing (PP) task" "Disabled,Enabled" textline " " bitfld.long 0x18 18. " T3_FLIP_LR ,LEFT/RIGHT flip for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 17. " T3_ROT ,Rotation for Post Processing (PP) task" "Disabled,Enabled" bitfld.long 0x18 16. " T2_FLIP_UD ,UP/DOWN flip for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 15. " T2_FLIP_LR ,LEFT/RIGHT flip for View Finder (VF) task" "Disabled,Enabled" textline " " bitfld.long 0x18 14. " T2_ROT ,Rotation for View Finder (VF) task" "Disabled,Enabled" bitfld.long 0x18 13. " T1_FLIP_UD ,UP/DOWN flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 12. " T1_FLIP_LR ,LEFT/RIGHT flip for Encoding (ENC) task" "Disabled,Enabled" bitfld.long 0x18 11. " T1_ROT ,Rotation for Encoding (ENC) task" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " CB7_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB7" "8,16" bitfld.long 0x18 6. " CB6_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB6" "8,16" bitfld.long 0x18 5. " CB5_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB5" "8,16" bitfld.long 0x18 4. " CB4_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB4" "8,16" textline " " bitfld.long 0x18 3. " CB3_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB3" "8,16" bitfld.long 0x18 2. " CB2_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB2" "8,16" bitfld.long 0x18 1. " CB1_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB1" "8,16" bitfld.long 0x18 0. " CB0_BURST_16 ,Number of active cycles within a burst coming from the IDMAC for IC's CB0" "8,16" line.long 0x1c "IC_IDMAC_2,IC IDMAC Parameters 2 Register" hexmask.long.word 0x1C 20.--29. 1. " T3_FR_HEIGHT ,Frame Height for Post Processing (PP) task" hexmask.long.word 0x1C 10.--19. 1. " T2_FR_HEIGHT ,Frame Height for View Finder (VF) task" hexmask.long.word 0x1C 0.--9. 1. " T1_FR_HEIGHT ,Frame Height for Encoding (ENC) task" line.long 0x20 "IC_IDMAC_3,IC IDMAC Parameters 3 Register" hexmask.long.word 0x20 20.--29. 1. " T3_FR_WIDTH ,Frame Width for Post Processing (PP) task" hexmask.long.word 0x20 10.--19. 1. " T2_FR_WIDTH ,Frame Width for View Finder (VF) task" hexmask.long.word 0x20 0.--9. 1. " T1_FR_WIDTH ,Frame Width for Encoding (ENC) task" line.long 0x24 "IC_IDMAC_4,IC IDMAC Parameters 4 Register" bitfld.long 0x24 12.--15. " RM_BRDG_MAX_RQ ,RM memory Bridge Max Requests" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 8.--11. " IBM_BRDG_MAX_RQ ,IBM memory Bridge Max Requests" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 4.--7. " MPM_DMFC_BRDG_MAX_RQ ,MPM memory Bridge Max Requests for the IC DMFC interface" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. " MPM_RW_BRDG_MAX_RQ ,MPM memory Bridge Max Requests between MPM's read and writes" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "CSI0 registers" base ad:0x02A30000 width 20. group.long 0x00++0x1b line.long 0x00 "CSI0_SENS_CONF,CSI0 Sensor Configuration Register" bitfld.long 0x00 31. " CSI0_DATA_EN_POL ,Invert IPP_IND_SENSB_DATA_EN input" "Not inverted,Inverted" bitfld.long 0x00 29. " CSI0_FORCE_EOF ,Force End of frame" "No effect,Forced" bitfld.long 0x00 28. " CSI0_JPEG_MODE ,JPEG Mode" "Not valid,Valid" textline " " bitfld.long 0x00 27. " CSI0_JPEG8_EN ,JPEG8 enable bit" "Disabled,Enabled" bitfld.long 0x00 24.--26. " CSI0_DATA_DEST ,Destination of the data coming from the CSI" ",IC,IDMAC via SMFC,?..." hexmask.long.byte 0x00 16.--23. 1. " CSI0_DIV_RATIO ,Clock division ratio minus 1" textline " " bitfld.long 0x00 15. " CSI0_EXT_VSYNC ,External VSYNC enable" "Internal,External" bitfld.long 0x00 11.--14. " CSI0_DATA_WIDTH ,Number of bits per color" "4,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--10. " CSI0_SENS_DATA_FORMAT ,Data format from the sensor" "Full RGB or YUV444,YUV422 (YUYV...),YUV422 (UYVY...),Bayer or Generic,RGB565,RGB555,RGB444,JPEG" textline " " bitfld.long 0x00 7. " CSI0_PACK_TIGHT ,CSI0 Pack Tight" "Not tight,Tight" bitfld.long 0x00 4.--6. " CSI0_SENS_PRTCL ,Sensor protocol" "Gated clock mode,Non-gated clock mode,CCIR progressive mode (BT.656),CCIR interlaced mode (BT.656),CCIR progressive (BT.1120 DDR),CCIR progressive (BT.1120 SDR),CCIR interlaced mode (BT.1120 DDR),CCIR interlaced mode (BT.1120 SDR)" bitfld.long 0x00 3. " CSI0_SENS_PIX_CLK_POL ,Invert pixel clock input" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " CSI0_DATA_POL ,Invert data input" "Not inverted,Inverted" bitfld.long 0x00 1. " CSI0_HSYNC_POL ,Invert IPP_IND_SENSB_HSYNC input" "Not inverted,Inverted" bitfld.long 0x00 0. " CSI0_VSYNC_POL ,Invert IPP_IND_SENSB_VSYNC input" "Not inverted,Inverted" line.long 0x04 "CSI0_SENS_FRM_SIZE,CSI0 Sense Frame Size Register" hexmask.long.word 0x04 16.--27. 1. " CSI0_SENS_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x04 0.--12. 1. " CSI0_SENS_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x08 "CSI0_ACT_FRM_SIZE,CSI0 Actual Frame Size Register" hexmask.long.word 0x08 16.--27. 1. " CSI0_ACT_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x08 0.--12. 1. " CSI0_ACT_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x0c "CSI0_OUT_FRM_CTRL,CSI0 Output Control Register" bitfld.long 0x0c 31. " CSI0_HORZ_DWNS ,Enable horizontal downsizing" "Disabled,Enabled" bitfld.long 0x0c 30. " CSI0_VERT_DWNS ,Enable vertical downsizing" "Disabled,Enabled" hexmask.long.word 0x0c 16.--28. 1. " CSI0_HSC ,Number of columns to skip" textline " " hexmask.long.word 0x0c 0.--11. 1. " CSI0_VSC ,Number of rows to skip" line.long 0x10 "CSI0_TST_CTRL,CSI0 Test Control Register" bitfld.long 0x10 24. " CSI0_TEST_GEN_MODE ,Test generator mode" "Inactive,Active" hexmask.long.byte 0x10 16.--23. 1. " CSI0_PG_B_VALUE ,Pattern generator B value" hexmask.long.byte 0x10 8.--15. 1. " CSI0_PG_G_VALUE ,Pattern generator G value" textline " " hexmask.long.byte 0x10 0.--7. 1. " CSI0_PG_R_VALUE ,Pattern generator R value" line.long 0x14 "CSI0_CCIR_CODE_1,CSI0 Output Control Register 1" bitfld.long 0x14 24. " CSI0_CCIR_ERR_DET_EN ,Enable error detection and correction for CCIR interlaced mode with protection bit" "Disabled,Enabled" bitfld.long 0x14 19.--21. " CSI0_STRT_FLD0_ACTV ,Start of field 0 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " CSI0_END_FLD0_ACTV ,End of field 0 active line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 9.--11. " CSI0_STRT_FLD0_BLNK_2ND ,Start of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " CSI0_END_FLD0_BLNK_2ND ,End of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 3.--5. " CSI0_STRT_FLD0_BLNK_1ST ,Start of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 0.--2. " CSI0_END_FLD0_BLNK_1ST ,End of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" line.long 0x18 "CSI0_CCIR_CODE_2,CSI0 CCIR Code Register 2" bitfld.long 0x18 19.--21. " CSI0_STRT_FLD1_ACTV ,Start of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " CSI0_END_FLD1_ACTV ,End of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9.--11. " CSI0_STRT_FLD1_BLNK_2ND ,Start of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 6.--8. " CSI0_END_FLD1_BLNK_2ND ,End of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 3.--5. " CSI0_STRT_FLD1_BLNK_1ST ,Start of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CSI0_END_FLD1_BLNK_1ST ,End of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " if (((per.l(ad:0x02A30000))&0x70)==0x20)||(((per.l(ad:0x02A30000))&0x70)==0x30) group.long 0x1c++0x3 line.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " CSI0_CCIR_PRECOM ,CCIR pre command (3X8bit)" elif (((per.l(ad:0x02A30000))&0x70)==0x40)||(((per.l(ad:0x02A30000))&0x70)==0x50)||(((per.l(ad:0x02A30000))&0x70)==0x60)||(((per.l(ad:0x02A30000))&0x70)==0x70) group.long 0x1c++0x3 line.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" hexmask.long 0x00 0.--29. 1. " CSI0_CCIR_PRECOM ,CCIR pre command (3X10bit)" else hgroup.long 0x1c++0x3 hide.long 0x00 "CSI0_CCIR_CODE_3,CSI0 CCIR Code Register 3" endif sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") group.long 0x20++0xd3 line.long 0x00 "CSI0_DI,CSI0 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI0_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI0_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI0_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI0_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" line.long 0x04 "CSI0_SKIP,CSI0 SKIP Register" bitfld.long 0x04 19.--23. " CSI0_SKIP_ISP ,Skipping pattern of the frames send to the ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--18. " CSI0_MAX_RATIO_SKIP_ISP ,CSI0 Maximum Ratio Skip for ISP" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3.--7. " CSI0_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--2. " CSI0_MAX_RATIO_SKIP_SMFC ,CSI0 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" line.long 0x08 "CSI0_CPD_CTRL,CSI0 Compander Control Register" bitfld.long 0x08 2.--4. " CSI0_CPD ,Enable the compander in the path to different destination" "ISP,IC,IDMAC via SMFC,?..." bitfld.long 0x08 1. " CSI0_RED_ROW_BEGIN ,Color of first row in the frame" "GBGB,GRGR" bitfld.long 0x08 0. " CSI0_GREEN_P_BEGIN ,Color of first component in the frame" "Blue or red,Green" line.long 0xC "CSI0_CPD_RC_0,CSI0 Red component Compander Constants Register 0" hexmask.long.word 0xC 16.--25. 1. " CSI0_CPD_RC_1 ,CONSTANT 1 Parameter of Compander (Red component)" hexmask.long.word 0xC 0.--9. 1. " CSI0_CPD_RC_0 ,CONSTANT 0 Parameter of Compander (Red component)" line.long 0x10 "CSI0_CPD_RC_1,CSI0 Red component Compander Constants Register 1" hexmask.long.word 0x10 16.--25. 1. " CSI0_CPD_RC_3 ,CONSTANT 3 Parameter of Compander (Red component)" hexmask.long.word 0x10 0.--9. 1. " CSI0_CPD_RC_2 ,CONSTANT 2 Parameter of Compander (Red component)" line.long 0x14 "CSI0_CPD_RC_2,CSI0 Red component Compander Constants Register 2" hexmask.long.word 0x14 16.--25. 1. " CSI0_CPD_RC_5 ,CONSTANT 5 Parameter of Compander (Red component)" hexmask.long.word 0x14 0.--9. 1. " CSI0_CPD_RC_4 ,CONSTANT 4 Parameter of Compander (Red component)" line.long 0x18 "CSI0_CPD_RC_3,CSI0 Red component Compander Constants Register 3" hexmask.long.word 0x18 16.--25. 1. " CSI0_CPD_RC_7 ,CONSTANT 7 Parameter of Compander (Red component)" hexmask.long.word 0x18 0.--9. 1. " CSI0_CPD_RC_6 ,CONSTANT 6 Parameter of Compander (Red component)" line.long 0x1C "CSI0_CPD_RC_4,CSI0 Red component Compander Constants Register 4" hexmask.long.word 0x1C 16.--25. 1. " CSI0_CPD_RC_9 ,CONSTANT 9 Parameter of Compander (Red component)" hexmask.long.word 0x1C 0.--9. 1. " CSI0_CPD_RC_8 ,CONSTANT 8 Parameter of Compander (Red component)" line.long 0x20 "CSI0_CPD_RC_5,CSI0 Red component Compander Constants Register 5" hexmask.long.word 0x20 16.--25. 1. " CSI0_CPD_RC_11 ,CONSTANT 11 Parameter of Compander (Red component)" hexmask.long.word 0x20 0.--9. 1. " CSI0_CPD_RC_10 ,CONSTANT 10 Parameter of Compander (Red component)" line.long 0x24 "CSI0_CPD_RC_6,CSI0 Red component Compander Constants Register 6" hexmask.long.word 0x24 16.--25. 1. " CSI0_CPD_RC_13 ,CONSTANT 13 Parameter of Compander (Red component)" hexmask.long.word 0x24 0.--9. 1. " CSI0_CPD_RC_12 ,CONSTANT 12 Parameter of Compander (Red component)" line.long 0x28 "CSI0_CPD_RC_7,CSI0 Red component Compander Constants Register 7" hexmask.long.word 0x28 16.--25. 1. " CSI0_CPD_RC_15 ,CONSTANT 15 Parameter of Compander (Red component)" hexmask.long.word 0x28 0.--9. 1. " CSI0_CPD_RC_14 ,CONSTANT 14 Parameter of Compander (Red component)" line.long 0x2C "CSI0_CPD_RS_0,CSI0 Red component Compander SLOPE Register 0" hexmask.long.byte 0x2C 24.--31. 1. " CSI0_CPD_RS_3 ,SLOPE 3 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 16.--23. 1. " CSI0_CPD_RS_2 ,SLOPE 2 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 8.--15. 1. " CSI0_CPD_RS_1 ,SLOPE 1 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 0.--7. 1. " CSI0_CPD_RS_0 ,SLOPE 0 Parameter of Compander (Red component)" line.long 0x30 "CSI0_CPD_RS_1,CSI0 Red component Compander SLOPE Register 1" hexmask.long.byte 0x30 24.--31. 1. " CSI0_CPD_RS_7 ,SLOPE 7 Parameter of Compander (Red component)" hexmask.long.byte 0x30 16.--23. 1. " CSI0_CPD_RS_6 ,SLOPE 6 Parameter of Compander (Red component)" hexmask.long.byte 0x30 8.--15. 1. " CSI0_CPD_RS_5 ,SLOPE 5 Parameter of Compander (Red component)" hexmask.long.byte 0x30 0.--7. 1. " CSI0_CPD_RS_4 ,SLOPE 4 Parameter of Compander (Red component)" line.long 0x34 "CSI0_CPD_RS_2,CSI0 Red component Compander SLOPE Register 2" hexmask.long.byte 0x34 24.--31. 1. " CSI0_CPD_RS_11 ,SLOPE 11 Parameter of Compander (Red component)" hexmask.long.byte 0x34 16.--23. 1. " CSI0_CPD_RS_10 ,SLOPE 10 Parameter of Compander (Red component)" hexmask.long.byte 0x34 8.--15. 1. " CSI0_CPD_RS_9 ,SLOPE 9 Parameter of Compander (Red component)" hexmask.long.byte 0x34 0.--7. 1. " CSI0_CPD_RS_8 ,SLOPE 8 Parameter of Compander (Red component)" line.long 0x38 "CSI0_CPD_RS_3,CSI0 Red component Compander SLOPE Register 3" hexmask.long.byte 0x38 24.--31. 1. " CSI0_CPD_RS_15 ,SLOPE 15 Parameter of Compander (Red component)" hexmask.long.byte 0x38 16.--23. 1. " CSI0_CPD_RS_14 ,SLOPE 14 Parameter of Compander (Red component)" hexmask.long.byte 0x38 8.--15. 1. " CSI0_CPD_RS_13 ,SLOPE 13 Parameter of Compander (Red component)" hexmask.long.byte 0x38 0.--7. 1. " CSI0_CPD_RS_12 ,SLOPE 12 Parameter of Compander (Red component)" line.long 0x3C "CSI0_CPD_GRC_0,CSI0 GR component Compander Constants Register 0" hexmask.long.word 0x3C 16.--24. 1. " CSI0_CPD_GRC_1 ,CONSTANT 1 Parameter of Compander (GR component)" hexmask.long.word 0x3C 0.--8. 1. " CSI0_CPD_GRC_0 ,CONSTANT 0 Parameter of Compander (GR component)" line.long 0x40 "CSI0_CPD_GRC_1,CSI0 GR component Compander Constants Register 1" hexmask.long.word 0x40 16.--24. 1. " CSI0_CPD_GRC_3 ,CONSTANT 3 Parameter of Compander (GR component)" hexmask.long.word 0x40 0.--8. 1. " CSI0_CPD_GRC_2 ,CONSTANT 2 Parameter of Compander (GR component)" line.long 0x44 "CSI0_CPD_GRC_2,CSI0 GR component Compander Constants Register 2" hexmask.long.word 0x44 16.--24. 1. " CSI0_CPD_GRC_5 ,CONSTANT 5 Parameter of Compander (GR component)" hexmask.long.word 0x44 0.--8. 1. " CSI0_CPD_GRC_4 ,CONSTANT 4 Parameter of Compander (GR component)" line.long 0x48 "CSI0_CPD_GRC_3,CSI0 GR component Compander Constants Register 3" hexmask.long.word 0x48 16.--24. 1. " CSI0_CPD_GRC_7 ,CONSTANT 7 Parameter of Compander (GR component)" hexmask.long.word 0x48 0.--8. 1. " CSI0_CPD_GRC_6 ,CONSTANT 6 Parameter of Compander (GR component)" line.long 0x4C "CSI0_CPD_GRC_4,CSI0 GR component Compander Constants Register 4" hexmask.long.word 0x4C 16.--24. 1. " CSI0_CPD_GRC_9 ,CONSTANT 9 Parameter of Compander (GR component)" hexmask.long.word 0x4C 0.--8. 1. " CSI0_CPD_GRC_8 ,CONSTANT 8 Parameter of Compander (GR component)" line.long 0x50 "CSI0_CPD_GRC_5,CSI0 GR component Compander Constants Register 5" hexmask.long.word 0x50 16.--24. 1. " CSI0_CPD_GRC_11 ,CONSTANT 11 Parameter of Compander (GR component)" hexmask.long.word 0x50 0.--8. 1. " CSI0_CPD_GRC_10 ,CONSTANT 10 Parameter of Compander (GR component)" line.long 0x54 "CSI0_CPD_GRC_6,CSI0 GR component Compander Constants Register 6" hexmask.long.word 0x54 16.--24. 1. " CSI0_CPD_GRC_13 ,CONSTANT 13 Parameter of Compander (GR component)" hexmask.long.word 0x54 0.--8. 1. " CSI0_CPD_GRC_12 ,CONSTANT 12 Parameter of Compander (GR component)" line.long 0x58 "CSI0_CPD_GRC_7,CSI0 GR component Compander Constants Register 7" hexmask.long.word 0x58 16.--24. 1. " CSI0_CPD_GRC_15 ,CONSTANT 15 Parameter of Compander (GR component)" hexmask.long.word 0x58 0.--8. 1. " CSI0_CPD_GRC_14 ,CONSTANT 14 Parameter of Compander (GR component)" line.long 0x5C "CSI0_CPD_GRS_0,CSI0 GR component Compander SLOPE Register 0" hexmask.long.byte 0x5C 24.--31. 1. " CSI0_CPD_GRS_3 ,SLOPE 3 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 16.--23. 1. " CSI0_CPD_GRS_2 ,SLOPE 2 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 8.--15. 1. " CSI0_CPD_GRS_1 ,SLOPE 1 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 0.--7. 1. " CSI0_CPD_GRS_0 ,SLOPE 0 Parameter of Compander (GR component)" line.long 0x60 "CSI0_CPD_GRS_1,CSI0 GR component Compander SLOPE Register 1" hexmask.long.byte 0x60 24.--31. 1. " CSI0_CPD_GRS_7 ,SLOPE 7 Parameter of Compander (GR component)" hexmask.long.byte 0x60 16.--23. 1. " CSI0_CPD_GRS_6 ,SLOPE 6 Parameter of Compander (GR component)" hexmask.long.byte 0x60 8.--15. 1. " CSI0_CPD_GRS_5 ,SLOPE 5 Parameter of Compander (GR component)" hexmask.long.byte 0x60 0.--7. 1. " CSI0_CPD_GRS_4 ,SLOPE 4 Parameter of Compander (GR component)" line.long 0x64 "CSI0_CPD_GRS_2,CSI0 GR component Compander SLOPE Register 2" hexmask.long.byte 0x64 24.--31. 1. " CSI0_CPD_GRS_11 ,SLOPE 11 Parameter of Compander (GR component)" hexmask.long.byte 0x64 16.--23. 1. " CSI0_CPD_GRS_10 ,SLOPE 10 Parameter of Compander (GR component)" hexmask.long.byte 0x64 8.--15. 1. " CSI0_CPD_GRS_9 ,SLOPE 9 Parameter of Compander (GR component)" hexmask.long.byte 0x64 0.--7. 1. " CSI0_CPD_GRS_8 ,SLOPE 8 Parameter of Compander (GR component)" line.long 0x68 "CSI0_CPD_GRS_3,CSI0 GR component Compander SLOPE Register 3" hexmask.long.byte 0x68 24.--31. 1. " CSI0_CPD_GRS_15 ,SLOPE 15 Parameter of Compander (GR component)" hexmask.long.byte 0x68 16.--23. 1. " CSI0_CPD_GRS_14 ,SLOPE 14 Parameter of Compander (GR component)" hexmask.long.byte 0x68 8.--15. 1. " CSI0_CPD_GRS_13 ,SLOPE 13 Parameter of Compander (GR component)" hexmask.long.byte 0x68 0.--7. 1. " CSI0_CPD_GRS_12 ,SLOPE 12 Parameter of Compander (GR component)" line.long 0x6C "CSI0_CPD_GBC_0,CSI0 GB component Compander Constants Register 0" hexmask.long.word 0x6C 16.--24. 1. " CSI0_CPD_GBC_1 ,CONSTANT 1 Parameter of Compander (GB component)" hexmask.long.word 0x6C 0.--8. 1. " CSI0_CPD_GBC_0 ,CONSTANT 0 Parameter of Compander (GB component)" line.long 0x70 "CSI0_CPD_GBC_1,CSI0 GB component Compander Constants Register 1" hexmask.long.word 0x70 16.--24. 1. " CSI0_CPD_GBC_3 ,CONSTANT 3 Parameter of Compander (GB component)" hexmask.long.word 0x70 0.--8. 1. " CSI0_CPD_GBC_2 ,CONSTANT 2 Parameter of Compander (GB component)" line.long 0x74 "CSI0_CPD_GBC_2,CSI0 GB component Compander Constants Register 2" hexmask.long.word 0x74 16.--24. 1. " CSI0_CPD_GBC_5 ,CONSTANT 5 Parameter of Compander (GB component)" hexmask.long.word 0x74 0.--8. 1. " CSI0_CPD_GBC_4 ,CONSTANT 4 Parameter of Compander (GB component)" line.long 0x78 "CSI0_CPD_GBC_3,CSI0 GB component Compander Constants Register 3" hexmask.long.word 0x78 16.--24. 1. " CSI0_CPD_GBC_7 ,CONSTANT 7 Parameter of Compander (GB component)" hexmask.long.word 0x78 0.--8. 1. " CSI0_CPD_GBC_6 ,CONSTANT 6 Parameter of Compander (GB component)" line.long 0x7C "CSI0_CPD_GBC_4,CSI0 GB component Compander Constants Register 4" hexmask.long.word 0x7C 16.--24. 1. " CSI0_CPD_GBC_9 ,CONSTANT 9 Parameter of Compander (GB component)" hexmask.long.word 0x7C 0.--8. 1. " CSI0_CPD_GBC_8 ,CONSTANT 8 Parameter of Compander (GB component)" line.long 0x80 "CSI0_CPD_GBC_5,CSI0 GB component Compander Constants Register 5" hexmask.long.word 0x80 16.--24. 1. " CSI0_CPD_GBC_11 ,CONSTANT 11 Parameter of Compander (GB component)" hexmask.long.word 0x80 0.--8. 1. " CSI0_CPD_GBC_10 ,CONSTANT 10 Parameter of Compander (GB component)" line.long 0x84 "CSI0_CPD_GBC_6,CSI0 GB component Compander Constants Register 6" hexmask.long.word 0x84 16.--24. 1. " CSI0_CPD_GBC_13 ,CONSTANT 13 Parameter of Compander (GB component)" hexmask.long.word 0x84 0.--8. 1. " CSI0_CPD_GBC_12 ,CONSTANT 12 Parameter of Compander (GB component)" line.long 0x88 "CSI0_CPD_GBC_7,CSI0 GB component Compander Constants Register 7" hexmask.long.word 0x88 16.--24. 1. " CSI0_CPD_GBC_15 ,CONSTANT 15 Parameter of Compander (GB component)" hexmask.long.word 0x88 0.--8. 1. " CSI0_CPD_GBC_14 ,CONSTANT 14 Parameter of Compander (GB component)" line.long 0x8C "CSI0_CPD_GBS_0,CSI0 GB component Compander SLOPE Register 0" hexmask.long.byte 0x8C 24.--31. 1. " CSI0_CPD_GBS_3 ,SLOPE 3 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 16.--23. 1. " CSI0_CPD_GBS_2 ,SLOPE 2 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 8.--15. 1. " CSI0_CPD_GBS_1 ,SLOPE 1 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 0.--7. 1. " CSI0_CPD_GBS_0 ,SLOPE 0 Parameter of Compander (GB component)" line.long 0x90 "CSI0_CPD_GBS_1,CSI0 GB component Compander SLOPE Register 1" hexmask.long.byte 0x90 24.--31. 1. " CSI0_CPD_GBS_7 ,SLOPE 7 Parameter of Compander (GB component)" hexmask.long.byte 0x90 16.--23. 1. " CSI0_CPD_GBS_6 ,SLOPE 6 Parameter of Compander (GB component)" hexmask.long.byte 0x90 8.--15. 1. " CSI0_CPD_GBS_5 ,SLOPE 5 Parameter of Compander (GB component)" hexmask.long.byte 0x90 0.--7. 1. " CSI0_CPD_GBS_4 ,SLOPE 4 Parameter of Compander (GB component)" line.long 0x94 "CSI0_CPD_GBS_2,CSI0 GB component Compander SLOPE Register 2" hexmask.long.byte 0x94 24.--31. 1. " CSI0_CPD_GBS_11 ,SLOPE 11 Parameter of Compander (GB component)" hexmask.long.byte 0x94 16.--23. 1. " CSI0_CPD_GBS_10 ,SLOPE 10 Parameter of Compander (GB component)" hexmask.long.byte 0x94 8.--15. 1. " CSI0_CPD_GBS_9 ,SLOPE 9 Parameter of Compander (GB component)" hexmask.long.byte 0x94 0.--7. 1. " CSI0_CPD_GBS_8 ,SLOPE 8 Parameter of Compander (GB component)" line.long 0x98 "CSI0_CPD_GBS_3,CSI0 GB component Compander SLOPE Register 3" hexmask.long.byte 0x98 24.--31. 1. " CSI0_CPD_GBS_15 ,SLOPE 15 Parameter of Compander (GB component)" hexmask.long.byte 0x98 16.--23. 1. " CSI0_CPD_GBS_14 ,SLOPE 14 Parameter of Compander (GB component)" hexmask.long.byte 0x98 8.--15. 1. " CSI0_CPD_GBS_13 ,SLOPE 13 Parameter of Compander (GB component)" hexmask.long.byte 0x98 0.--7. 1. " CSI0_CPD_GBS_12 ,SLOPE 12 Parameter of Compander (GB component)" line.long 0x9C "CSI0_CPD_BC_0,CSI0 Blue component Compander Constants Register 0" hexmask.long.word 0x9C 16.--24. 1. " CSI0_CPD_BC_1 ,CONSTANT 1 Parameter of Compander (Blue component)" hexmask.long.word 0x9C 0.--8. 1. " CSI0_CPD_BC_0 ,CONSTANT 0 Parameter of Compander (Blue component)" line.long 0xA0 "CSI0_CPD_BC_1,CSI0 Blue component Compander Constants Register 1" hexmask.long.word 0xA0 16.--24. 1. " CSI0_CPD_BC_3 ,CONSTANT 3 Parameter of Compander (Blue component)" hexmask.long.word 0xA0 0.--8. 1. " CSI0_CPD_BC_2 ,CONSTANT 2 Parameter of Compander (Blue component)" line.long 0xA4 "CSI0_CPD_BC_2,CSI0 Blue component Compander Constants Register 2" hexmask.long.word 0xA4 16.--24. 1. " CSI0_CPD_BC_5 ,CONSTANT 5 Parameter of Compander (Blue component)" hexmask.long.word 0xA4 0.--8. 1. " CSI0_CPD_BC_4 ,CONSTANT 4 Parameter of Compander (Blue component)" line.long 0xA8 "CSI0_CPD_BC_3,CSI0 Blue component Compander Constants Register 3" hexmask.long.word 0xA8 16.--24. 1. " CSI0_CPD_BC_7 ,CONSTANT 7 Parameter of Compander (Blue component)" hexmask.long.word 0xA8 0.--8. 1. " CSI0_CPD_BC_6 ,CONSTANT 6 Parameter of Compander (Blue component)" line.long 0xAC "CSI0_CPD_BC_4,CSI0 Blue component Compander Constants Register 4" hexmask.long.word 0xAC 16.--24. 1. " CSI0_CPD_BC_9 ,CONSTANT 9 Parameter of Compander (Blue component)" hexmask.long.word 0xAC 0.--8. 1. " CSI0_CPD_BC_8 ,CONSTANT 8 Parameter of Compander (Blue component)" line.long 0xB0 "CSI0_CPD_BC_5,CSI0 Blue component Compander Constants Register 5" hexmask.long.word 0xB0 16.--24. 1. " CSI0_CPD_BC_11 ,CONSTANT 11 Parameter of Compander (Blue component)" hexmask.long.word 0xB0 0.--8. 1. " CSI0_CPD_BC_10 ,CONSTANT 10 Parameter of Compander (Blue component)" line.long 0xB4 "CSI0_CPD_BC_6,CSI0 Blue component Compander Constants Register 6" hexmask.long.word 0xB4 16.--24. 1. " CSI0_CPD_BC_13 ,CONSTANT 13 Parameter of Compander (Blue component)" hexmask.long.word 0xB4 0.--8. 1. " CSI0_CPD_BC_12 ,CONSTANT 12 Parameter of Compander (Blue component)" line.long 0xB8 "CSI0_CPD_BC_7,CSI0 Blue component Compander Constants Register 7" hexmask.long.word 0xB8 16.--24. 1. " CSI0_CPD_BC_15 ,CONSTANT 15 Parameter of Compander (Blue component)" hexmask.long.word 0xB8 0.--8. 1. " CSI0_CPD_BC_14 ,CONSTANT 14 Parameter of Compander (Blue component)" line.long 0xBC "CSI0_CPD_BS_0,CSI0 Blue component Compander SLOPE Register 0" hexmask.long.byte 0xBC 24.--31. 1. " CSI0_CPD_BS_3 ,SLOPE 3 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 16.--23. 1. " CSI0_CPD_BS_2 ,SLOPE 2 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 8.--15. 1. " CSI0_CPD_BS_1 ,SLOPE 1 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 0.--7. 1. " CSI0_CPD_BS_0 ,SLOPE 0 Parameter of Compander (Blue component)" line.long 0xC0 "CSI0_CPD_BS_1,CSI0 Blue component Compander SLOPE Register 1" hexmask.long.byte 0xC0 24.--31. 1. " CSI0_CPD_BS_7 ,SLOPE 7 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 16.--23. 1. " CSI0_CPD_BS_6 ,SLOPE 6 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 8.--15. 1. " CSI0_CPD_BS_5 ,SLOPE 5 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 0.--7. 1. " CSI0_CPD_BS_4 ,SLOPE 4 Parameter of Compander (Blue component)" line.long 0xC4 "CSI0_CPD_BS_2,CSI0 Blue component Compander SLOPE Register 2" hexmask.long.byte 0xC4 24.--31. 1. " CSI0_CPD_BS_11 ,SLOPE 11 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 16.--23. 1. " CSI0_CPD_BS_10 ,SLOPE 10 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 8.--15. 1. " CSI0_CPD_BS_9 ,SLOPE 9 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 0.--7. 1. " CSI0_CPD_BS_8 ,SLOPE 8 Parameter of Compander (Blue component)" line.long 0xC8 "CSI0_CPD_BS_3,CSI0 Blue component Compander SLOPE Register 3" hexmask.long.byte 0xC8 24.--31. 1. " CSI0_CPD_BS_15 ,SLOPE 15 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 16.--23. 1. " CSI0_CPD_BS_14 ,SLOPE 14 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 8.--15. 1. " CSI0_CPD_BS_13 ,SLOPE 13 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 0.--7. 1. " CSI0_CPD_BS_12 ,SLOPE 12 Parameter of Compander (Blue component)" line.long 0xcc "CSI0_CPD_OFFSET1,CSI0 Compander Offset Register 1" hexmask.long.word 0xcc 20.--29. 1. " CSI0_CPD_B_OFFSET ,CSI0 Blue component offset" hexmask.long.word 0xcc 10.--19. 1. " CSI0_GB_OFFSET ,CSI0 Green Blue component offset" hexmask.long.word 0xcc 0.--9. 1. " CSI0_GR_OFFSET ,CSI0 Green Red component offset" line.long 0xd0 "CSI0_CPD_OFFSET2,CSI0 Compander Offset Register 2" hexmask.long.word 0xd0 0.--9. 1. " CSI0_CPD_R_OFFSET ,CSI0 Red component offset" else sif (cpuis("IMX6*")) group.long 0x20++0x03 line.long 0x00 "CSI0_DI,CSI0 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI0_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI0_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI0_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI0_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" endif group.long 0x24++0x03 line.long 0x00 "CSI0_SKIP,CSI0 SKIP Register" sif (cpuis("IMX6*")) bitfld.long 0x00 8.--9. " CSI0_ID_2_SKIP ,Data from the CSI0 to the SMFC has an ID associated with it" "00,01,10,11" textline " " endif bitfld.long 0x00 3.--7. " CSI0_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CSI0_MAX_RATIO_SKIP_SMFC ,CSI0 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" endif width 0x0B tree.end tree "CSI1 registers" base ad:0x02A38000 width 20. group.long 0x00++0x1b line.long 0x00 "CSI1_SENS_CONF,CSI1 Sensor Configuration Register" bitfld.long 0x00 31. " CSI1_DATA_EN_POL ,Invert IPP_IND_SENSB_DATA_EN input" "Not inverted,Inverted" bitfld.long 0x00 29. " CSI1_FORCE_EOF ,Force End of frame" "No effect,Forced" bitfld.long 0x00 28. " CSI1_JPEG_MODE ,JPEG Mode" "Not valid,Valid" textline " " bitfld.long 0x00 27. " CSI1_JPEG8_EN ,JPEG8 enable bit" "Disabled,Enabled" bitfld.long 0x00 24.--26. " CSI1_DATA_DEST ,Destination of the data coming from the CSI" ",IC,IDMAC via SMFC,?..." hexmask.long.byte 0x00 16.--23. 1. " CSI1_DIV_RATIO ,Clock division ratio minus 1" textline " " bitfld.long 0x00 15. " CSI1_EXT_VSYNC ,External VSYNC enable" "Internal,External" bitfld.long 0x00 11.--14. " CSI1_DATA_WIDTH ,Number of bits per color" ",8,,10,,,,,,16,?..." bitfld.long 0x00 8.--10. " CSI1_SENS_DATA_FORMAT ,Data format from the sensor" "Full RGB or YUV444,YUV422 (YUYV...),YUV422 (UYVY...),Bayer or Generic,RGB565,RGB555,RGB444,JPEG" textline " " bitfld.long 0x00 7. " CSI1_PACK_TIGHT ,CSI1 Pack Tight" "Not tight,Tight" bitfld.long 0x00 4.--6. " CSI1_SENS_PRTCL ,Sensor protocol" "Gated clock mode,Non-gated clock mode,CCIR progressive mode (BT.656),CCIR interlaced mode (BT.656),CCIR progressive (BT.1120 DDR),CCIR progressive (BT.1120 SDR),CCIR interlaced mode (BT.1120 DDR),CCIR interlaced mode (BT.1120 SDR)" bitfld.long 0x00 3. " CSI1_SENS_PIX_CLK_POL ,Invert pixel clock input" "Not inverted,Inverted" textline " " bitfld.long 0x00 2. " CSI1_DATA_POL ,Invert data input" "Not inverted,Inverted" bitfld.long 0x00 1. " CSI1_HSYNC_POL ,Invert IPP_IND_SENSB_HSYNC input" "Not inverted,Inverted" bitfld.long 0x00 0. " CSI1_VSYNC_POL ,Invert IPP_IND_SENSB_VSYNC input" "Not inverted,Inverted" line.long 0x04 "CSI1_SENS_FRM_SIZE,CSI1 Sense Frame Size Register" hexmask.long.word 0x04 16.--27. 1. " CSI1_SENS_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x04 0.--12. 1. " CSI1_SENS_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x08 "CSI1_ACT_FRM_SIZE,CSI1 Actual Frame Size Register" hexmask.long.word 0x08 16.--27. 1. " CSI1_ACT_FRM_HEIGHT ,Sensor frame height minus 1" hexmask.long.word 0x08 0.--12. 1. " CSI1_ACT_FRM_WIDTH ,Sensor frame width minus 1" line.long 0x0c "CSI1_OUT_FRM_CTRL,CSI1 Output Control Register" bitfld.long 0x0c 31. " CSI1_HORZ_DWNS ,Enable horizontal downsizing" "Disabled,Enabled" bitfld.long 0x0c 30. " CSI1_VERT_DWNS ,Enable vertical downsizing" "Disabled,Enabled" hexmask.long.word 0x0c 16.--28. 1. " CSI1_HSC ,Number of columns to skip" textline " " hexmask.long.word 0x0c 0.--11. 1. " CSI1_VSC ,Number of rows to skip" line.long 0x10 "CSI1_TST_CTRL,CSI1 Test Control Register" bitfld.long 0x10 24. " CSI1_TEST_GEN_MODE ,Test generator mode" "Inactive,Active" hexmask.long.byte 0x10 16.--23. 1. " CSI1_PG_B_VALUE ,Pattern generator B value" hexmask.long.byte 0x10 8.--15. 1. " CSI1_PG_G_VALUE ,Pattern generator G value" textline " " hexmask.long.byte 0x10 0.--7. 1. " CSI1_PG_R_VALUE ,Pattern generator R value" line.long 0x14 "CSI1_CCIR_CODE_1,CSI1 Output Control Register 1" bitfld.long 0x14 24. " CSI1_CCIR_ERR_DET_EN ,Enable error detection and correction for CCIR interlaced mode with protection bit" "Disabled,Enabled" bitfld.long 0x14 19.--21. " CSI1_STRT_FLD0_ACTV ,Start of field 0 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " CSI1_END_FLD0_ACTV ,End of field 0 active line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 9.--11. " CSI1_STRT_FLD0_BLNK_2ND ,Start of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 6.--8. " CSI1_END_FLD0_BLNK_2ND ,End of field 0 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 3.--5. " CSI1_STRT_FLD0_BLNK_1ST ,Start of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 0.--2. " CSI1_END_FLD0_BLNK_1ST ,End of field 0 first blanking line command (I)" "0,1,2,3,4,5,6,7" line.long 0x18 "CSI1_CCIR_CODE_2,CSI1 CCIR Code Register 2" bitfld.long 0x18 19.--21. " CSI1_STRT_FLD1_ACTV ,Start of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " CSI1_END_FLD1_ACTV ,End of field 1 active line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9.--11. " CSI1_STRT_FLD1_BLNK_2ND ,Start of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 6.--8. " CSI1_END_FLD1_BLNK_2ND ,End of field 1 second blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 3.--5. " CSI1_STRT_FLD1_BLNK_1ST ,Start of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CSI1_END_FLD1_BLNK_1ST ,End of field 1 first blanking line command (I)" "0,1,2,3,4,5,6,7" textline " " if (((per.l(ad:0x02A38000))&0x70)==0x20)||(((per.l(ad:0x02A38000))&0x70)==0x30) group.long 0x1c++0x3 line.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " CSI1_CCIR_PRECOM ,CCIR pre command (3X8bit)" elif (((per.l(ad:0x02A38000))&0x70)==0x40)||(((per.l(ad:0x02A38000))&0x70)==0x50)||(((per.l(ad:0x02A38000))&0x70)==0x60)||(((per.l(ad:0x02A38000))&0x70)==0x70) group.long 0x1c++0x3 line.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" hexmask.long 0x00 0.--29. 1. " CSI1_CCIR_PRECOM ,CCIR pre command (3X10bit)" else hgroup.long 0x1c++0x3 hide.long 0x00 "CSI1_CCIR_CODE_3,CSI1 CCIR Code Register 3" endif sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") group.long 0x20++0xd3 line.long 0x00 "CSI1_DI,CSI1 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI1_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI1_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI1_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI1_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" line.long 0x04 "CSI1_SKIP,CSI1 SKIP Register" bitfld.long 0x04 19.--23. " CSI1_SKIP_ISP ,Skipping pattern of the frames send to the ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--18. " CSI1_MAX_RATIO_SKIP_ISP ,CSI1 Maximum Ratio Skip for ISP" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3.--7. " CSI1_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--2. " CSI1_MAX_RATIO_SKIP_SMFC ,CSI1 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" line.long 0x08 "CSI1_CPD_CTRL,CSI1 Compander Control Register" bitfld.long 0x08 2.--4. " CSI1_CPD ,Enable the compander in the path to different destination" "ISP,IC,IDMAC via SMFC,?..." bitfld.long 0x08 1. " CSI1_RED_ROW_BEGIN ,Color of first row in the frame" "GBGB,GRGR" bitfld.long 0x08 0. " CSI1_GREEN_P_BEGIN ,Color of first component in the frame" "Blue or red,Green" line.long 0xC "CSI1_CPD_RC_0,CSI1 Red component Compander Constants Register 0" hexmask.long.word 0xC 16.--25. 1. " CSI1_CPD_RC_1 ,CONSTANT 1 Parameter of Compander (Red component)" hexmask.long.word 0xC 0.--9. 1. " CSI1_CPD_RC_0 ,CONSTANT 0 Parameter of Compander (Red component)" line.long 0x10 "CSI1_CPD_RC_1,CSI1 Red component Compander Constants Register 1" hexmask.long.word 0x10 16.--25. 1. " CSI1_CPD_RC_3 ,CONSTANT 3 Parameter of Compander (Red component)" hexmask.long.word 0x10 0.--9. 1. " CSI1_CPD_RC_2 ,CONSTANT 2 Parameter of Compander (Red component)" line.long 0x14 "CSI1_CPD_RC_2,CSI1 Red component Compander Constants Register 2" hexmask.long.word 0x14 16.--25. 1. " CSI1_CPD_RC_5 ,CONSTANT 5 Parameter of Compander (Red component)" hexmask.long.word 0x14 0.--9. 1. " CSI1_CPD_RC_4 ,CONSTANT 4 Parameter of Compander (Red component)" line.long 0x18 "CSI1_CPD_RC_3,CSI1 Red component Compander Constants Register 3" hexmask.long.word 0x18 16.--25. 1. " CSI1_CPD_RC_7 ,CONSTANT 7 Parameter of Compander (Red component)" hexmask.long.word 0x18 0.--9. 1. " CSI1_CPD_RC_6 ,CONSTANT 6 Parameter of Compander (Red component)" line.long 0x1C "CSI1_CPD_RC_4,CSI1 Red component Compander Constants Register 4" hexmask.long.word 0x1C 16.--25. 1. " CSI1_CPD_RC_9 ,CONSTANT 9 Parameter of Compander (Red component)" hexmask.long.word 0x1C 0.--9. 1. " CSI1_CPD_RC_8 ,CONSTANT 8 Parameter of Compander (Red component)" line.long 0x20 "CSI1_CPD_RC_5,CSI1 Red component Compander Constants Register 5" hexmask.long.word 0x20 16.--25. 1. " CSI1_CPD_RC_11 ,CONSTANT 11 Parameter of Compander (Red component)" hexmask.long.word 0x20 0.--9. 1. " CSI1_CPD_RC_10 ,CONSTANT 10 Parameter of Compander (Red component)" line.long 0x24 "CSI1_CPD_RC_6,CSI1 Red component Compander Constants Register 6" hexmask.long.word 0x24 16.--25. 1. " CSI1_CPD_RC_13 ,CONSTANT 13 Parameter of Compander (Red component)" hexmask.long.word 0x24 0.--9. 1. " CSI1_CPD_RC_12 ,CONSTANT 12 Parameter of Compander (Red component)" line.long 0x28 "CSI1_CPD_RC_7,CSI1 Red component Compander Constants Register 7" hexmask.long.word 0x28 16.--25. 1. " CSI1_CPD_RC_15 ,CONSTANT 15 Parameter of Compander (Red component)" hexmask.long.word 0x28 0.--9. 1. " CSI1_CPD_RC_14 ,CONSTANT 14 Parameter of Compander (Red component)" line.long 0x2C "CSI1_CPD_RS_0,CSI1 Red component Compander SLOPE Register 0" hexmask.long.byte 0x2C 24.--31. 1. " CSI1_CPD_RS_3 ,SLOPE 3 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 16.--23. 1. " CSI1_CPD_RS_2 ,SLOPE 2 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 8.--15. 1. " CSI1_CPD_RS_1 ,SLOPE 1 Parameter of Compander (Red component)" hexmask.long.byte 0x2C 0.--7. 1. " CSI1_CPD_RS_0 ,SLOPE 0 Parameter of Compander (Red component)" line.long 0x30 "CSI1_CPD_RS_1,CSI1 Red component Compander SLOPE Register 1" hexmask.long.byte 0x30 24.--31. 1. " CSI1_CPD_RS_7 ,SLOPE 7 Parameter of Compander (Red component)" hexmask.long.byte 0x30 16.--23. 1. " CSI1_CPD_RS_6 ,SLOPE 6 Parameter of Compander (Red component)" hexmask.long.byte 0x30 8.--15. 1. " CSI1_CPD_RS_5 ,SLOPE 5 Parameter of Compander (Red component)" hexmask.long.byte 0x30 0.--7. 1. " CSI1_CPD_RS_4 ,SLOPE 4 Parameter of Compander (Red component)" line.long 0x34 "CSI1_CPD_RS_2,CSI1 Red component Compander SLOPE Register 2" hexmask.long.byte 0x34 24.--31. 1. " CSI1_CPD_RS_11 ,SLOPE 11 Parameter of Compander (Red component)" hexmask.long.byte 0x34 16.--23. 1. " CSI1_CPD_RS_10 ,SLOPE 10 Parameter of Compander (Red component)" hexmask.long.byte 0x34 8.--15. 1. " CSI1_CPD_RS_9 ,SLOPE 9 Parameter of Compander (Red component)" hexmask.long.byte 0x34 0.--7. 1. " CSI1_CPD_RS_8 ,SLOPE 8 Parameter of Compander (Red component)" line.long 0x38 "CSI1_CPD_RS_3,CSI1 Red component Compander SLOPE Register 3" hexmask.long.byte 0x38 24.--31. 1. " CSI1_CPD_RS_15 ,SLOPE 15 Parameter of Compander (Red component)" hexmask.long.byte 0x38 16.--23. 1. " CSI1_CPD_RS_14 ,SLOPE 14 Parameter of Compander (Red component)" hexmask.long.byte 0x38 8.--15. 1. " CSI1_CPD_RS_13 ,SLOPE 13 Parameter of Compander (Red component)" hexmask.long.byte 0x38 0.--7. 1. " CSI1_CPD_RS_12 ,SLOPE 12 Parameter of Compander (Red component)" line.long 0x3C "CSI1_CPD_GRC_0,CSI1 GR component Compander Constants Register 0" hexmask.long.word 0x3C 16.--24. 1. " CSI1_CPD_GRC_1 ,CONSTANT 1 Parameter of Compander (GR component)" hexmask.long.word 0x3C 0.--8. 1. " CSI1_CPD_GRC_0 ,CONSTANT 0 Parameter of Compander (GR component)" line.long 0x40 "CSI1_CPD_GRC_1,CSI1 GR component Compander Constants Register 1" hexmask.long.word 0x40 16.--24. 1. " CSI1_CPD_GRC_3 ,CONSTANT 3 Parameter of Compander (GR component)" hexmask.long.word 0x40 0.--8. 1. " CSI1_CPD_GRC_2 ,CONSTANT 2 Parameter of Compander (GR component)" line.long 0x44 "CSI1_CPD_GRC_2,CSI1 GR component Compander Constants Register 2" hexmask.long.word 0x44 16.--24. 1. " CSI1_CPD_GRC_5 ,CONSTANT 5 Parameter of Compander (GR component)" hexmask.long.word 0x44 0.--8. 1. " CSI1_CPD_GRC_4 ,CONSTANT 4 Parameter of Compander (GR component)" line.long 0x48 "CSI1_CPD_GRC_3,CSI1 GR component Compander Constants Register 3" hexmask.long.word 0x48 16.--24. 1. " CSI1_CPD_GRC_7 ,CONSTANT 7 Parameter of Compander (GR component)" hexmask.long.word 0x48 0.--8. 1. " CSI1_CPD_GRC_6 ,CONSTANT 6 Parameter of Compander (GR component)" line.long 0x4C "CSI1_CPD_GRC_4,CSI1 GR component Compander Constants Register 4" hexmask.long.word 0x4C 16.--24. 1. " CSI1_CPD_GRC_9 ,CONSTANT 9 Parameter of Compander (GR component)" hexmask.long.word 0x4C 0.--8. 1. " CSI1_CPD_GRC_8 ,CONSTANT 8 Parameter of Compander (GR component)" line.long 0x50 "CSI1_CPD_GRC_5,CSI1 GR component Compander Constants Register 5" hexmask.long.word 0x50 16.--24. 1. " CSI1_CPD_GRC_11 ,CONSTANT 11 Parameter of Compander (GR component)" hexmask.long.word 0x50 0.--8. 1. " CSI1_CPD_GRC_10 ,CONSTANT 10 Parameter of Compander (GR component)" line.long 0x54 "CSI1_CPD_GRC_6,CSI1 GR component Compander Constants Register 6" hexmask.long.word 0x54 16.--24. 1. " CSI1_CPD_GRC_13 ,CONSTANT 13 Parameter of Compander (GR component)" hexmask.long.word 0x54 0.--8. 1. " CSI1_CPD_GRC_12 ,CONSTANT 12 Parameter of Compander (GR component)" line.long 0x58 "CSI1_CPD_GRC_7,CSI1 GR component Compander Constants Register 7" hexmask.long.word 0x58 16.--24. 1. " CSI1_CPD_GRC_15 ,CONSTANT 15 Parameter of Compander (GR component)" hexmask.long.word 0x58 0.--8. 1. " CSI1_CPD_GRC_14 ,CONSTANT 14 Parameter of Compander (GR component)" line.long 0x5C "CSI1_CPD_GRS_0,CSI1 GR component Compander SLOPE Register 0" hexmask.long.byte 0x5C 24.--31. 1. " CSI1_CPD_GRS_3 ,SLOPE 3 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 16.--23. 1. " CSI1_CPD_GRS_2 ,SLOPE 2 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 8.--15. 1. " CSI1_CPD_GRS_1 ,SLOPE 1 Parameter of Compander (GR component)" hexmask.long.byte 0x5C 0.--7. 1. " CSI1_CPD_GRS_0 ,SLOPE 0 Parameter of Compander (GR component)" line.long 0x60 "CSI1_CPD_GRS_1,CSI1 GR component Compander SLOPE Register 1" hexmask.long.byte 0x60 24.--31. 1. " CSI1_CPD_GRS_7 ,SLOPE 7 Parameter of Compander (GR component)" hexmask.long.byte 0x60 16.--23. 1. " CSI1_CPD_GRS_6 ,SLOPE 6 Parameter of Compander (GR component)" hexmask.long.byte 0x60 8.--15. 1. " CSI1_CPD_GRS_5 ,SLOPE 5 Parameter of Compander (GR component)" hexmask.long.byte 0x60 0.--7. 1. " CSI1_CPD_GRS_4 ,SLOPE 4 Parameter of Compander (GR component)" line.long 0x64 "CSI1_CPD_GRS_2,CSI1 GR component Compander SLOPE Register 2" hexmask.long.byte 0x64 24.--31. 1. " CSI1_CPD_GRS_11 ,SLOPE 11 Parameter of Compander (GR component)" hexmask.long.byte 0x64 16.--23. 1. " CSI1_CPD_GRS_10 ,SLOPE 10 Parameter of Compander (GR component)" hexmask.long.byte 0x64 8.--15. 1. " CSI1_CPD_GRS_9 ,SLOPE 9 Parameter of Compander (GR component)" hexmask.long.byte 0x64 0.--7. 1. " CSI1_CPD_GRS_8 ,SLOPE 8 Parameter of Compander (GR component)" line.long 0x68 "CSI1_CPD_GRS_3,CSI1 GR component Compander SLOPE Register 3" hexmask.long.byte 0x68 24.--31. 1. " CSI1_CPD_GRS_15 ,SLOPE 15 Parameter of Compander (GR component)" hexmask.long.byte 0x68 16.--23. 1. " CSI1_CPD_GRS_14 ,SLOPE 14 Parameter of Compander (GR component)" hexmask.long.byte 0x68 8.--15. 1. " CSI1_CPD_GRS_13 ,SLOPE 13 Parameter of Compander (GR component)" hexmask.long.byte 0x68 0.--7. 1. " CSI1_CPD_GRS_12 ,SLOPE 12 Parameter of Compander (GR component)" line.long 0x6C "CSI1_CPD_GBC_0,CSI1 GB component Compander Constants Register 0" hexmask.long.word 0x6C 16.--24. 1. " CSI1_CPD_GBC_1 ,CONSTANT 1 Parameter of Compander (GB component)" hexmask.long.word 0x6C 0.--8. 1. " CSI1_CPD_GBC_0 ,CONSTANT 0 Parameter of Compander (GB component)" line.long 0x70 "CSI1_CPD_GBC_1,CSI1 GB component Compander Constants Register 1" hexmask.long.word 0x70 16.--24. 1. " CSI1_CPD_GBC_3 ,CONSTANT 3 Parameter of Compander (GB component)" hexmask.long.word 0x70 0.--8. 1. " CSI1_CPD_GBC_2 ,CONSTANT 2 Parameter of Compander (GB component)" line.long 0x74 "CSI1_CPD_GBC_2,CSI1 GB component Compander Constants Register 2" hexmask.long.word 0x74 16.--24. 1. " CSI1_CPD_GBC_5 ,CONSTANT 5 Parameter of Compander (GB component)" hexmask.long.word 0x74 0.--8. 1. " CSI1_CPD_GBC_4 ,CONSTANT 4 Parameter of Compander (GB component)" line.long 0x78 "CSI1_CPD_GBC_3,CSI1 GB component Compander Constants Register 3" hexmask.long.word 0x78 16.--24. 1. " CSI1_CPD_GBC_7 ,CONSTANT 7 Parameter of Compander (GB component)" hexmask.long.word 0x78 0.--8. 1. " CSI1_CPD_GBC_6 ,CONSTANT 6 Parameter of Compander (GB component)" line.long 0x7C "CSI1_CPD_GBC_4,CSI1 GB component Compander Constants Register 4" hexmask.long.word 0x7C 16.--24. 1. " CSI1_CPD_GBC_9 ,CONSTANT 9 Parameter of Compander (GB component)" hexmask.long.word 0x7C 0.--8. 1. " CSI1_CPD_GBC_8 ,CONSTANT 8 Parameter of Compander (GB component)" line.long 0x80 "CSI1_CPD_GBC_5,CSI1 GB component Compander Constants Register 5" hexmask.long.word 0x80 16.--24. 1. " CSI1_CPD_GBC_11 ,CONSTANT 11 Parameter of Compander (GB component)" hexmask.long.word 0x80 0.--8. 1. " CSI1_CPD_GBC_10 ,CONSTANT 10 Parameter of Compander (GB component)" line.long 0x84 "CSI1_CPD_GBC_6,CSI1 GB component Compander Constants Register 6" hexmask.long.word 0x84 16.--24. 1. " CSI1_CPD_GBC_13 ,CONSTANT 13 Parameter of Compander (GB component)" hexmask.long.word 0x84 0.--8. 1. " CSI1_CPD_GBC_12 ,CONSTANT 12 Parameter of Compander (GB component)" line.long 0x88 "CSI1_CPD_GBC_7,CSI1 GB component Compander Constants Register 7" hexmask.long.word 0x88 16.--24. 1. " CSI1_CPD_GBC_15 ,CONSTANT 15 Parameter of Compander (GB component)" hexmask.long.word 0x88 0.--8. 1. " CSI1_CPD_GBC_14 ,CONSTANT 14 Parameter of Compander (GB component)" line.long 0x8C "CSI1_CPD_GBS_0,CSI1 GB component Compander SLOPE Register 0" hexmask.long.byte 0x8C 24.--31. 1. " CSI1_CPD_GBS_3 ,SLOPE 3 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 16.--23. 1. " CSI1_CPD_GBS_2 ,SLOPE 2 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 8.--15. 1. " CSI1_CPD_GBS_1 ,SLOPE 1 Parameter of Compander (GB component)" hexmask.long.byte 0x8C 0.--7. 1. " CSI1_CPD_GBS_0 ,SLOPE 0 Parameter of Compander (GB component)" line.long 0x90 "CSI1_CPD_GBS_1,CSI1 GB component Compander SLOPE Register 1" hexmask.long.byte 0x90 24.--31. 1. " CSI1_CPD_GBS_7 ,SLOPE 7 Parameter of Compander (GB component)" hexmask.long.byte 0x90 16.--23. 1. " CSI1_CPD_GBS_6 ,SLOPE 6 Parameter of Compander (GB component)" hexmask.long.byte 0x90 8.--15. 1. " CSI1_CPD_GBS_5 ,SLOPE 5 Parameter of Compander (GB component)" hexmask.long.byte 0x90 0.--7. 1. " CSI1_CPD_GBS_4 ,SLOPE 4 Parameter of Compander (GB component)" line.long 0x94 "CSI1_CPD_GBS_2,CSI1 GB component Compander SLOPE Register 2" hexmask.long.byte 0x94 24.--31. 1. " CSI1_CPD_GBS_11 ,SLOPE 11 Parameter of Compander (GB component)" hexmask.long.byte 0x94 16.--23. 1. " CSI1_CPD_GBS_10 ,SLOPE 10 Parameter of Compander (GB component)" hexmask.long.byte 0x94 8.--15. 1. " CSI1_CPD_GBS_9 ,SLOPE 9 Parameter of Compander (GB component)" hexmask.long.byte 0x94 0.--7. 1. " CSI1_CPD_GBS_8 ,SLOPE 8 Parameter of Compander (GB component)" line.long 0x98 "CSI1_CPD_GBS_3,CSI1 GB component Compander SLOPE Register 3" hexmask.long.byte 0x98 24.--31. 1. " CSI1_CPD_GBS_15 ,SLOPE 15 Parameter of Compander (GB component)" hexmask.long.byte 0x98 16.--23. 1. " CSI1_CPD_GBS_14 ,SLOPE 14 Parameter of Compander (GB component)" hexmask.long.byte 0x98 8.--15. 1. " CSI1_CPD_GBS_13 ,SLOPE 13 Parameter of Compander (GB component)" hexmask.long.byte 0x98 0.--7. 1. " CSI1_CPD_GBS_12 ,SLOPE 12 Parameter of Compander (GB component)" line.long 0x9C "CSI1_CPD_BC_0,CSI1 Blue component Compander Constants Register 0" hexmask.long.word 0x9C 16.--24. 1. " CSI1_CPD_BC_1 ,CONSTANT 1 Parameter of Compander (Blue component)" hexmask.long.word 0x9C 0.--8. 1. " CSI1_CPD_BC_0 ,CONSTANT 0 Parameter of Compander (Blue component)" line.long 0xA0 "CSI1_CPD_BC_1,CSI1 Blue component Compander Constants Register 1" hexmask.long.word 0xA0 16.--24. 1. " CSI1_CPD_BC_3 ,CONSTANT 3 Parameter of Compander (Blue component)" hexmask.long.word 0xA0 0.--8. 1. " CSI1_CPD_BC_2 ,CONSTANT 2 Parameter of Compander (Blue component)" line.long 0xA4 "CSI1_CPD_BC_2,CSI1 Blue component Compander Constants Register 2" hexmask.long.word 0xA4 16.--24. 1. " CSI1_CPD_BC_5 ,CONSTANT 5 Parameter of Compander (Blue component)" hexmask.long.word 0xA4 0.--8. 1. " CSI1_CPD_BC_4 ,CONSTANT 4 Parameter of Compander (Blue component)" line.long 0xA8 "CSI1_CPD_BC_3,CSI1 Blue component Compander Constants Register 3" hexmask.long.word 0xA8 16.--24. 1. " CSI1_CPD_BC_7 ,CONSTANT 7 Parameter of Compander (Blue component)" hexmask.long.word 0xA8 0.--8. 1. " CSI1_CPD_BC_6 ,CONSTANT 6 Parameter of Compander (Blue component)" line.long 0xAC "CSI1_CPD_BC_4,CSI1 Blue component Compander Constants Register 4" hexmask.long.word 0xAC 16.--24. 1. " CSI1_CPD_BC_9 ,CONSTANT 9 Parameter of Compander (Blue component)" hexmask.long.word 0xAC 0.--8. 1. " CSI1_CPD_BC_8 ,CONSTANT 8 Parameter of Compander (Blue component)" line.long 0xB0 "CSI1_CPD_BC_5,CSI1 Blue component Compander Constants Register 5" hexmask.long.word 0xB0 16.--24. 1. " CSI1_CPD_BC_11 ,CONSTANT 11 Parameter of Compander (Blue component)" hexmask.long.word 0xB0 0.--8. 1. " CSI1_CPD_BC_10 ,CONSTANT 10 Parameter of Compander (Blue component)" line.long 0xB4 "CSI1_CPD_BC_6,CSI1 Blue component Compander Constants Register 6" hexmask.long.word 0xB4 16.--24. 1. " CSI1_CPD_BC_13 ,CONSTANT 13 Parameter of Compander (Blue component)" hexmask.long.word 0xB4 0.--8. 1. " CSI1_CPD_BC_12 ,CONSTANT 12 Parameter of Compander (Blue component)" line.long 0xB8 "CSI1_CPD_BC_7,CSI1 Blue component Compander Constants Register 7" hexmask.long.word 0xB8 16.--24. 1. " CSI1_CPD_BC_15 ,CONSTANT 15 Parameter of Compander (Blue component)" hexmask.long.word 0xB8 0.--8. 1. " CSI1_CPD_BC_14 ,CONSTANT 14 Parameter of Compander (Blue component)" line.long 0xBC "CSI1_CPD_BS_0,CSI1 Blue component Compander SLOPE Register 0" hexmask.long.byte 0xBC 24.--31. 1. " CSI1_CPD_BS_3 ,SLOPE 3 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 16.--23. 1. " CSI1_CPD_BS_2 ,SLOPE 2 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 8.--15. 1. " CSI1_CPD_BS_1 ,SLOPE 1 Parameter of Compander (Blue component)" hexmask.long.byte 0xBC 0.--7. 1. " CSI1_CPD_BS_0 ,SLOPE 0 Parameter of Compander (Blue component)" line.long 0xC0 "CSI1_CPD_BS_1,CSI1 Blue component Compander SLOPE Register 1" hexmask.long.byte 0xC0 24.--31. 1. " CSI1_CPD_BS_7 ,SLOPE 7 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 16.--23. 1. " CSI1_CPD_BS_6 ,SLOPE 6 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 8.--15. 1. " CSI1_CPD_BS_5 ,SLOPE 5 Parameter of Compander (Blue component)" hexmask.long.byte 0xC0 0.--7. 1. " CSI1_CPD_BS_4 ,SLOPE 4 Parameter of Compander (Blue component)" line.long 0xC4 "CSI1_CPD_BS_2,CSI1 Blue component Compander SLOPE Register 2" hexmask.long.byte 0xC4 24.--31. 1. " CSI1_CPD_BS_11 ,SLOPE 11 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 16.--23. 1. " CSI1_CPD_BS_10 ,SLOPE 10 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 8.--15. 1. " CSI1_CPD_BS_9 ,SLOPE 9 Parameter of Compander (Blue component)" hexmask.long.byte 0xC4 0.--7. 1. " CSI1_CPD_BS_8 ,SLOPE 8 Parameter of Compander (Blue component)" line.long 0xC8 "CSI1_CPD_BS_3,CSI1 Blue component Compander SLOPE Register 3" hexmask.long.byte 0xC8 24.--31. 1. " CSI1_CPD_BS_15 ,SLOPE 15 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 16.--23. 1. " CSI1_CPD_BS_14 ,SLOPE 14 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 8.--15. 1. " CSI1_CPD_BS_13 ,SLOPE 13 Parameter of Compander (Blue component)" hexmask.long.byte 0xC8 0.--7. 1. " CSI1_CPD_BS_12 ,SLOPE 12 Parameter of Compander (Blue component)" line.long 0xcc "CSI1_CPD_OFFSET1,CSI1 Compander Offset Register 1" hexmask.long.word 0xcc 20.--29. 1. " CSI1_CPD_B_OFFSET ,CSI1 Blue component offset" hexmask.long.word 0xcc 10.--19. 1. " CSI1_GB_OFFSET ,CSI1 Green Blue component offset" hexmask.long.word 0xcc 0.--9. 1. " CSI1_GR_OFFSET ,CSI1 Green Red component offset" line.long 0xd0 "CSI1_CPD_OFFSET2,CSI1 Compander Offset Register 2" hexmask.long.word 0xd0 0.--9. 1. " CSI1_CPD_R_OFFSET ,CSI1 Red component offset" else sif (cpuis("IMX6*")) group.long 0x20++0x03 line.long 0x00 "CSI1_DI,CSI1 Data Identifier Register" hexmask.long.byte 0x00 24.--31. 1. " CSI1_MIPI_DI3 ,Holds the Data Identifier #3 handled by the CSI" hexmask.long.byte 0x00 16.--23. 1. " CSI1_MIPI_DI2 ,Holds the Data Identifier #2 handled by the CSI" hexmask.long.byte 0x00 8.--15. 1. " CSI1_MIPI_DI1 ,Holds the Data Identifier #1 handled by the CSI" hexmask.long.byte 0x00 0.--7. 1. " CSI1_MIPI_DI0 ,Holds the Data Identifier #0 handled by the CSI" endif group.long 0x24++0x03 line.long 0x00 "CSI1_SKIP,CSI1 SKIP Register" sif (cpuis("IMX6*")) bitfld.long 0x00 8.--9. " CSI1_ID_2_SKIP ,Data from the CSI1 to the SMFC has an ID associated with it" "00,01,10,11" textline " " endif bitfld.long 0x00 3.--7. " CSI1_SKIP_SMFC ,Skipping pattern of the frames send to the SMFC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CSI1_MAX_RATIO_SKIP_SMFC ,CSI1 Maximum Ratio Skip for SMFC" "0,1,2,3,4,5,6,7" endif width 0x0B tree.end tree "DI0 registers" base ad:0x02A40000 width 17. group.long 0x00++0x57 line.long 0x00 "DI0_GENERAL,DI0 General Register" bitfld.long 0x00 31. " DI0_PIN8_PIN15_SEL ,Route PIN8 over PIN15" "Not routed,Routed" bitfld.long 0x00 28.--30. " DI0_DISP_Y_SEL ,DI0 Display Vertical coordinate (Y) select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x00 24.--27. " DI0_CLOCK_STOP_MODE ,DI clock stop mode" "Next edge,Next event of Cnt. 1,Next event of Cnt. 2,Next event of Cnt. 3,Next event of Cnt. 4,Next event of Cnt. 5,Next event of Cnt. 6,Next event of Cnt. 7,Next event of Cnt. 8,Next event of Cnt. 9,,,EOL/now,EOF/now,EOL/next line,EOF/next frame" textline " " bitfld.long 0x00 23. " DI0_DISP_CLOCK_INIT ,Display clock's initial mode" "Stopped,Running" bitfld.long 0x00 22. " DI0_MASK_SEL ,DI0 Mask select" "Counter 2,Extracted MASK data" bitfld.long 0x00 21. " DI0_VSYNC_EXT ,DI0 External VSYNC" "Internally,External" textline " " bitfld.long 0x00 20. " DI0_CLK_EXT ,DI0 External Clock" "Internally,External" bitfld.long 0x00 18.--19. " DI0_WATCHDOG_MODE ,DI0 watchdog mode" "4,16,64,128" bitfld.long 0x00 17. " DI0_POLARITY_DISP_CLK ,DI0 Output Clock's polarity" "Active low,Active high" textline " " bitfld.long 0x00 12.--15. " DI0_SYNC_COUNT_SEL ,Selects synchronous flow synchronization counter in DI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " DI0_ERR_TREATMENT ,In case of synchronous flow error there are 2 ways to handle the display" "Drive the last component,To wait" bitfld.long 0x00 10. " DI0_ERM_VSYNC_SEL ,DI0 error recovery module's VSYNC source select" "Vsync_pre,Vsync_post" textline " " bitfld.long 0x00 9. " DI0_POLARITY_CS1 ,DI0 Chip Select's 1 polarity" "Active Low,Active High" bitfld.long 0x00 8. " DI0_POLARITY_CS0 ,DI0 Chip Select's 0 polarity" "Active Low,Active High" bitfld.long 0x00 7. " DI0_POLARITY_8 ,DI0 output pin 8 polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " DI0_POLARITY_7 ,DI0 output pin 7 polarity" "Active low,Active high" bitfld.long 0x00 5. " DI0_POLARITY_6 ,DI0 output pin 6 polarity" "Active low,Active high" bitfld.long 0x00 4. " DI0_POLARITY_5 ,DI0 output pin 5 polarity" "Active low,Active high" textline " " bitfld.long 0x00 3. " DI0_POLARITY_4 ,DI0 output pin 4 polarity" "Active low,Active high" bitfld.long 0x00 2. " DI0_POLARITY_3 ,DI0 output pin 3 polarity" "Active low,Active high" bitfld.long 0x00 1. " DI0_POLARITY_2 ,DI0 output pin 2 polarity" "Active low,Active high" textline " " bitfld.long 0x00 0. " DI0_POLARITY_1 ,DI0 output pin 1 polarity" "Active low,Active high" line.long 0x04 "DI0_BS_CLKGEN0,DI0 Base Sync Clock Gen 0 Register" hexmask.long.word 0x04 16.--24. 1. " DI0_DISP_CLK_OFFSET ,DI0 Display Clock Offset" hexmask.long.byte 0x04 4.--11. 1. " DI0_DISP_CLK_PERIOD1 ,DI0 Display Clock Period (integer part)" hexmask.long.byte 0x04 0.--3. 1. " DI0_DISP_CLK_PERIOD0 ,DI0 Display Clock Period (fractional part)" line.long 0x08 "DI0_BS_CLKGEN1,DI0 Base Sync Clock Gen 1 Register" hexmask.long.byte 0x08 17.--24. 1. " DI0_DISP_CLK_DOWN1 ,DI0 display clock falling edge position (integer part)" bitfld.long 0x08 16. " DI0_DISP_CLK_DOWN0 ,DI0 display clock falling edge position(fractional part)" "0,1" hexmask.long.byte 0x08 1.--8. 1. " DI0_DISP_CLK_UP1 ,DI0 display clock rising edge position (integer part)" textline " " bitfld.long 0x08 0. " DI0_DISP_CLK_UP0 ,DI0 display clock rising edge position (fractional part)" "0,1" line.long 0x0c "DI0_SW_GEN0_1,DI0 Sync Wave Gen 1 Register 0" hexmask.long.word 0x0C 19.--30. 1. " DI0_RUN_VALUE_M1_1 ,DI0 counter #1 pre defined value" bitfld.long 0x0C 16.--18. " DI0_RUN_RESOLUTION_1 ,DI0 counter #1 Run Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0C 3.--14. 1. " DI0_OFFSET_VALUE_1 ,DI0 counter #1 offset value" textline " " bitfld.long 0x0C 0.--2. " DI0_OFFSET_RESOLUTION_1 ,DI0 counter #1 offset Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" line.long 0x10 "DI0_SW_GEN0_2,DI0 Sync Wave Gen 2 Register 0" hexmask.long.word 0x10 19.--30. 1. " DI0_RUN_VALUE_M1_2 ,DI0 counter #2 pre defined value" bitfld.long 0x10 16.--18. " DI0_RUN_RESOLUTION_2 ,DI0 counter #2 Run Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x10 3.--14. 1. " DI0_OFFSET_VALUE_2 ,DI0 counter #2 offset value" textline " " bitfld.long 0x10 0.--2. " DI0_OFFSET_RESOLUTION_2 ,DI0 counter #2 offset Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" line.long 0x14 "DI0_SW_GEN0_3,DI0 Sync Wave Gen 3 Register 0" hexmask.long.word 0x14 19.--30. 1. " DI0_RUN_VALUE_M1_3 ,DI0 counter #3 pre defined value" bitfld.long 0x14 16.--18. " DI0_RUN_RESOLUTION_3 ,DI0 counter #3 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x14 3.--14. 1. " DI0_OFFSET_VALUE_3 ,counter #3 offset value" textline " " bitfld.long 0x14 0.--2. " DI0_OFFSET_RESOLUTION_3 ,DI0 counter #3 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" line.long 0x18 "DI0_SW_GEN0_4,DI0 Sync Wave Gen 4 Register 0" hexmask.long.word 0x18 19.--30. 1. " DI0_RUN_VALUE_M1_4 ,DI0 counter #4 pre defined value" bitfld.long 0x18 16.--18. " DI0_RUN_RESOLUTION_4 ,DI0 counter #4 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x18 3.--14. 1. " DI0_OFFSET_VALUE_4 ,DI0 counter #4 offset value" textline " " bitfld.long 0x18 0.--2. " DI0_OFFSET_RESOLUTION_4 ,DI0 counter #4 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" line.long 0x1c "DI0_SW_GEN0_5,DI0 Sync Wave Gen 5 Register 0" hexmask.long.word 0x1C 19.--30. 1. " DI0_RUN_VALUE_M1_5 ,DI0 counter #5 pre defined value" bitfld.long 0x1C 16.--18. " DI0_RUN_RESOLUTION_5 ,DI0 counter #5 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x1C 3.--14. 1. " DI0_OFFSET_VALUE_5 ,DI0 counter #5 offset value" textline " " bitfld.long 0x1C 0.--2. " DI0_OFFSET_RESOLUTION_5 ,DI0 counter #5 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" line.long 0x20 "DI0_SW_GEN0_6,DI0 Sync Wave Gen 6 Register 0" hexmask.long.word 0x20 19.--30. 1. " DI0_RUN_VALUE_M1_6 ,DI0 counter #6 pre defined value" bitfld.long 0x20 16.--18. " DI0_RUN_RESOLUTION_6 ,DI0 counter #6 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x20 3.--14. 1. " DI0_OFFSET_VALUE_6 ,DI0 counter #6 offset value" textline " " bitfld.long 0x20 0.--2. " DI0_OFFSET_RESOLUTION_6 ,DI0 counter #6 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x24 "DI0_SW_GEN0_7,DI0 Sync Wave Gen 7 Register 0" hexmask.long.word 0x24 19.--30. 1. " DI0_RUN_VALUE_M1_7 ,DI0 counter #7 pre defined value" bitfld.long 0x24 16.--18. " DI0_RUN_RESOLUTION_7 ,DI0 counter #7 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x24 3.--14. 1. " DI0_OFFSET_VALUE_7 ,DI0 counter #7 offset value" textline " " bitfld.long 0x24 0.--2. " DI0_OFFSET_RESOLUTION_7 ,DI0 counter #7 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x28 "DI0_SW_GEN0_8,DI0 Sync Wave Gen 8 Register 0" hexmask.long.word 0x28 19.--30. 1. " DI0_RUN_VALUE_M1_8 ,DI0 counter #8 pre defined value" bitfld.long 0x28 16.--18. " DI0_RUN_RESOLUTION_8 ,DI0 counter #8 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x28 3.--14. 1. " DI0_OFFSET_VALUE_8 ,DI0 counter #8 offset value" textline " " bitfld.long 0x28 0.--2. " DI0_OFFSET_RESOLUTION_8 ,DI0 counter #8 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x2c "DI0_SW_GEN0_9,DI0 Sync Wave Gen 9 Register 0" hexmask.long.word 0x2C 19.--30. 1. " DI0_RUN_VALUE_M1_9 ,DI0 counter #9 pre defined value" bitfld.long 0x2C 16.--18. " DI0_RUN_RESOLUTION_9 ,DI0 counter #9 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x2C 3.--14. 1. " DI0_OFFSET_VALUE_9 ,DI0 counter #9 offset value" textline " " bitfld.long 0x2C 0.--2. " DI0_OFFSET_RESOLUTION_9 ,DI0 counter #9 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" textline " " line.long 0x30 "DI0_SW_GEN1_1,DI0 Sync Wave 1 Gen Register 1" bitfld.long 0x30 29.--30. " DI0_CNT_POLARITY_GEN_EN_1 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x30 28. " DI0_CNT_AUTO_RELOAD_1 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x30 25.--27. " DI0_CNT_CLR_SEL_1 ,Counter Clear select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x30 16.--24. 1. " DI0_CNT_DOWN_1 ,Counter falling edge position" textline " " bitfld.long 0x30 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_1 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x30 9.--11. " DI0_CNT_POLARITY_CLR_SEL_1 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x30 1.--8. 1. " DI0_CNT_UP_1_1 ,Counter rising edge position(integer part)" bitfld.long 0x30 0. " DI0_CNT_UP_1_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x34 "DI0_SW_GEN1_2,DI0 Sync Wave 2 Gen Register 1" bitfld.long 0x34 29.--30. " DI0_CNT_POLARITY_GEN_EN_2 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x34 28. " DI0_CNT_AUTO_RELOAD_2 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x34 25.--27. " DI0_CNT_CLR_SEL_2 ,Counter Clear select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x34 16.--24. 1. " DI0_CNT_DOWN_2 ,Counter falling edge position" textline " " bitfld.long 0x34 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_2 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x34 9.--11. " DI0_CNT_POLARITY_CLR_SEL_2 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x34 1.--8. 1. " DI0_CNT_UP_2_1 ,Counter rising edge position(integer part)" bitfld.long 0x34 0. " DI0_CNT_UP_2_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x38 "DI0_SW_GEN1_3,DI0 Sync Wave 3 Gen Register 1" bitfld.long 0x38 29.--30. " DI0_CNT_POLARITY_GEN_EN_3 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x38 28. " DI0_CNT_AUTO_RELOAD_3 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x38 25.--27. " DI0_CNT_CLR_SEL_3 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x38 16.--24. 1. " DI0_CNT_DOWN_3 ,Counter falling edge position" textline " " bitfld.long 0x38 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_3 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x38 9.--11. " DI0_CNT_POLARITY_CLR_SEL_3 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,?..." textline " " hexmask.long.byte 0x38 1.--8. 1. " DI0_CNT_UP_3_1 ,Counter rising edge position(integer part)" bitfld.long 0x38 0. " DI0_CNT_UP_3_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x3c "DI0_SW_GEN1_4,DI0 Sync Wave 4 Gen Register 1" bitfld.long 0x3C 29.--30. " DI0_CNT_POLARITY_GEN_EN_4 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x3C 28. " DI0_CNT_AUTO_RELOAD_4 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x3C 25.--27. " DI0_CNT_CLR_SEL_4 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x3C 16.--24. 1. " DI0_CNT_DOWN_4 ,Counter falling edge position" textline " " bitfld.long 0x3C 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_4 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x3C 9.--11. " DI0_CNT_POLARITY_CLR_SEL_4 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,?..." textline " " hexmask.long.byte 0x3C 1.--8. 1. " DI0_CNT_UP_4_1 ,Counter rising edge position(integer part)" bitfld.long 0x3C 0. " DI0_CNT_UP_4_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x40 "DI0_SW_GEN1_5,DI0 Sync Wave 5 Gen Register 1" bitfld.long 0x40 29.--30. " DI0_CNT_POLARITY_GEN_EN_5 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x40 28. " DI0_CNT_AUTO_RELOAD_5 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x40 25.--27. " DI0_CNT_CLR_SEL_5 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x40 16.--24. 1. " DI0_CNT_DOWN_5 ,Counter falling edge position" textline " " bitfld.long 0x40 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_5 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" bitfld.long 0x40 9.--11. " DI0_CNT_POLARITY_CLR_SEL_5 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,?..." textline " " hexmask.long.byte 0x40 1.--8. 1. " DI0_CNT_UP_5_1 ,Counter rising edge position(integer part)" bitfld.long 0x40 0. " DI0_CNT_UP_5_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x44 "DI0_SW_GEN1_6,DI0 Sync Wave 6 Gen Register 1" bitfld.long 0x44 29.--30. " DI0_CNT_POLARITY_GEN_EN_6 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x44 28. " DI0_CNT_AUTO_RELOAD_6 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x44 25.--27. " DI0_CNT_CLR_SEL_6 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x44 16.--24. 1. " DI0_CNT_DOWN_6 ,Counter falling edge position" textline " " bitfld.long 0x44 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_6 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x44 9.--11. " DI0_CNT_POLARITY_CLR_SEL_6 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,?..." textline " " hexmask.long.byte 0x44 1.--8. 1. " DI0_CNT_UP_6_1 ,Counter rising edge position(integer part)" bitfld.long 0x44 0. " DI0_CNT_UP_6_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x48 "DI0_SW_GEN1_7,DI0 Sync Wave 7 Gen Register 1" bitfld.long 0x48 29.--30. " DI0_CNT_POLARITY_GEN_EN_7 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x48 28. " DI0_CNT_AUTO_RELOAD_7 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x48 25.--27. " DI0_CNT_CLR_SEL_7 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x48 16.--24. 1. " DI0_CNT_DOWN_7 ,Counter falling edge position" textline " " bitfld.long 0x48 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_7 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x48 9.--11. " DI0_CNT_POLARITY_CLR_SEL_7 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x48 1.--8. 1. " DI0_CNT_UP_7_1 ,Counter rising edge position(integer part)" bitfld.long 0x48 0. " DI0_CNT_UP_7_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x4c "DI0_SW_GEN1_8,DI0 Sync Wave 8 Gen Register 1" bitfld.long 0x4c 29.--30. " DI0_CNT_POLARITY_GEN_EN_8 ,DI0 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x4c 28. " DI0_CNT_AUTO_RELOAD_8 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x4c 25.--27. " DI0_CNT_CLR_SEL_8 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x4c 16.--24. 1. " DI0_CNT_DOWN_8 ,Counter falling edge position" textline " " bitfld.long 0x4c 12.--14. " DI0_CNT_POLARITY_TRIGGER_SEL_8 ,DI0 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x4c 9.--11. " DI0_CNT_POLARITY_CLR_SEL_8 ,DI0 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x4c 1.--8. 1. " DI0_CNT_UP_8_1 ,Counter rising edge position(integer part)" bitfld.long 0x4c 0. " DI0_CNT_UP_8_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x50 "DI0_SW_GEN1_9,DI0 Sync Wave 9 Gen Register 1" bitfld.long 0x50 29.--31. " DI0_GENTIME_SEL_9 ,Counter #9 main waveform select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x50 28. " DI0_CNT_AUTO_RELOAD_9 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x50 25.--27. " DI0_CNT_CLR_SEL_9 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x50 16.--24. 1. " DI0_CNT_DOWN_9 ,Counter falling edge position" textline " " bitfld.long 0x50 15. " DI0_TAG_SEL_9 ,Tag's source select" "Triggering counter,Counter 9" hexmask.long.byte 0x50 1.--8. 1. " DI0_CNT_UP_9_1 ,Counter rising edge position(integer part)" textline " " bitfld.long 0x50 0. " DI0_CNT_UP_9_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x54 "DI0_SYNC_AS_GEN,DI0 Sync Assistance Gen Register" sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||(cpuis("IMX6*"))) bitfld.long 0x54 28. " DI0_SYNC_START_EN ,DI0_SYNC_START_EN" "Disabled,Enabled" textline " " endif bitfld.long 0x54 13.--15. " DI0_VSYNC_SEL ,VSYNC select" "1,2,3,4,5,6,7,8" hexmask.long.word 0x54 0.--11. 1. " DI0_SYNC_START ,DI0 Sync start" tree "DI0_DW_GEN 0-11 (Serial display)" group.long 0x58++0x2f line.long 0x0 "DI0_DW_GEN_0 ,DI0 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI0_SERIAL_PERIOD_0 ,DI0 Serial Period 0 " hexmask.long.byte 0x0 16.--23. 1. " DI0_START_PERIOD_0 ,DI0 start period" bitfld.long 0x0 14.--15. " DI0_CST_0 ,DI0 Chip Select pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 4.--8. " DI0_SERIAL_VALID_BITS_0 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0 2.--3. " DI0_SERIAL_RS_0 ,DI0 Serial RS" "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI0_SERIAL_CLK_0 ,DI0 serial clock" "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " line.long 0x4 "DI0_DW_GEN_1 ,DI0 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI0_SERIAL_PERIOD_1 ,DI0 Serial Period 1 " hexmask.long.byte 0x4 16.--23. 1. " DI0_START_PERIOD_1 ,DI0 start period" bitfld.long 0x4 14.--15. " DI0_CST_1 ,DI0 Chip Select pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 4.--8. " DI0_SERIAL_VALID_BITS_1 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4 2.--3. " DI0_SERIAL_RS_1 ,DI0 Serial RS" "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI0_SERIAL_CLK_1 ,DI0 serial clock" "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " line.long 0x8 "DI0_DW_GEN_2 ,DI0 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI0_SERIAL_PERIOD_2 ,DI0 Serial Period 2 " hexmask.long.byte 0x8 16.--23. 1. " DI0_START_PERIOD_2 ,DI0 start period" bitfld.long 0x8 14.--15. " DI0_CST_2 ,DI0 Chip Select pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 4.--8. " DI0_SERIAL_VALID_BITS_2 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x8 2.--3. " DI0_SERIAL_RS_2 ,DI0 Serial RS" "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI0_SERIAL_CLK_2 ,DI0 serial clock" "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " line.long 0xC "DI0_DW_GEN_3 ,DI0 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI0_SERIAL_PERIOD_3 ,DI0 Serial Period 3 " hexmask.long.byte 0xC 16.--23. 1. " DI0_START_PERIOD_3 ,DI0 start period" bitfld.long 0xC 14.--15. " DI0_CST_3 ,DI0 Chip Select pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 4.--8. " DI0_SERIAL_VALID_BITS_3 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0xC 2.--3. " DI0_SERIAL_RS_3 ,DI0 Serial RS" "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI0_SERIAL_CLK_3 ,DI0 serial clock" "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " line.long 0x10 "DI0_DW_GEN_4 ,DI0 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI0_SERIAL_PERIOD_4 ,DI0 Serial Period 4 " hexmask.long.byte 0x10 16.--23. 1. " DI0_START_PERIOD_4 ,DI0 start period" bitfld.long 0x10 14.--15. " DI0_CST_4 ,DI0 Chip Select pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 4.--8. " DI0_SERIAL_VALID_BITS_4 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 2.--3. " DI0_SERIAL_RS_4 ,DI0 Serial RS" "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI0_SERIAL_CLK_4 ,DI0 serial clock" "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " line.long 0x14 "DI0_DW_GEN_5 ,DI0 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI0_SERIAL_PERIOD_5 ,DI0 Serial Period 5 " hexmask.long.byte 0x14 16.--23. 1. " DI0_START_PERIOD_5 ,DI0 start period" bitfld.long 0x14 14.--15. " DI0_CST_5 ,DI0 Chip Select pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 4.--8. " DI0_SERIAL_VALID_BITS_5 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 2.--3. " DI0_SERIAL_RS_5 ,DI0 Serial RS" "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI0_SERIAL_CLK_5 ,DI0 serial clock" "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " line.long 0x18 "DI0_DW_GEN_6 ,DI0 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI0_SERIAL_PERIOD_6 ,DI0 Serial Period 6 " hexmask.long.byte 0x18 16.--23. 1. " DI0_START_PERIOD_6 ,DI0 start period" bitfld.long 0x18 14.--15. " DI0_CST_6 ,DI0 Chip Select pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 4.--8. " DI0_SERIAL_VALID_BITS_6 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 2.--3. " DI0_SERIAL_RS_6 ,DI0 Serial RS" "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI0_SERIAL_CLK_6 ,DI0 serial clock" "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " line.long 0x1C "DI0_DW_GEN_7 ,DI0 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI0_SERIAL_PERIOD_7 ,DI0 Serial Period 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI0_START_PERIOD_7 ,DI0 start period" bitfld.long 0x1C 14.--15. " DI0_CST_7 ,DI0 Chip Select pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 4.--8. " DI0_SERIAL_VALID_BITS_7 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 2.--3. " DI0_SERIAL_RS_7 ,DI0 Serial RS" "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI0_SERIAL_CLK_7 ,DI0 serial clock" "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " line.long 0x20 "DI0_DW_GEN_8 ,DI0 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI0_SERIAL_PERIOD_8 ,DI0 Serial Period 8 " hexmask.long.byte 0x20 16.--23. 1. " DI0_START_PERIOD_8 ,DI0 start period" bitfld.long 0x20 14.--15. " DI0_CST_8 ,DI0 Chip Select pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 4.--8. " DI0_SERIAL_VALID_BITS_8 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 2.--3. " DI0_SERIAL_RS_8 ,DI0 Serial RS" "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI0_SERIAL_CLK_8 ,DI0 serial clock" "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " line.long 0x24 "DI0_DW_GEN_9 ,DI0 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI0_SERIAL_PERIOD_9 ,DI0 Serial Period 9 " hexmask.long.byte 0x24 16.--23. 1. " DI0_START_PERIOD_9 ,DI0 start period" bitfld.long 0x24 14.--15. " DI0_CST_9 ,DI0 Chip Select pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 4.--8. " DI0_SERIAL_VALID_BITS_9 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 2.--3. " DI0_SERIAL_RS_9 ,DI0 Serial RS" "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI0_SERIAL_CLK_9 ,DI0 serial clock" "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " line.long 0x28 "DI0_DW_GEN_10,DI0 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI0_SERIAL_PERIOD_10 ,DI0 Serial Period 10" hexmask.long.byte 0x28 16.--23. 1. " DI0_START_PERIOD_10 ,DI0 start period" bitfld.long 0x28 14.--15. " DI0_CST_10 ,DI0 Chip Select pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 4.--8. " DI0_SERIAL_VALID_BITS_10 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 2.--3. " DI0_SERIAL_RS_10 ,DI0 Serial RS" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 0.--1. " DI0_SERIAL_CLK_10 ,DI0 serial clock" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" line.long 0x2C "DI0_DW_GEN_11,DI0 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI0_SERIAL_PERIOD_11 ,DI0 Serial Period 11" hexmask.long.byte 0x2C 16.--23. 1. " DI0_START_PERIOD_11 ,DI0 start period" bitfld.long 0x2C 14.--15. " DI0_CST_11 ,DI0 Chip Select pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 4.--8. " DI0_SERIAL_VALID_BITS_11 ,DI0 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 2.--3. " DI0_SERIAL_RS_11 ,DI0 Serial RS" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI0_SERIAL_CLK_11 ,DI0 serial clock" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" tree.end tree "DI0_DW_GEN 0-11 (Parallel display)" group.long 0x58++0x2f line.long 0x0 "DI0_DW_GEN_0 ,DI0 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI0_ACCESS_SIZE_0 ,DI0 Access Size 0 " hexmask.long.byte 0x0 16.--23. 1. " DI0_COMPONENT_SIZE_0 ,DI0 component Size" bitfld.long 0x0 14.--15. " DI0_CST_0 ,DI0 Chip Select pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 12.--13. " DI0_PT_6_0 ,DI0 PIN_17 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " textline " " bitfld.long 0x0 10.--11. " DI0_PT_5_0 ,DI0 PIN_16 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 8.--9. " DI0_PT_4_0 ,DI0 PIN_15 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 6.--7. " DI0_PT_3_0 ,DI0 PIN_14 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 4.--5. " DI0_PT_2_0 ,DI0 PIN_13 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " textline " " bitfld.long 0x0 2.--3. " DI0_PT_1_0 ,DI0 PIN_12 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI0_PT_0_0 ,DI0 PIN_11 pointer for waveform 0 " "DI0_DW_SET0_0 ,DI0_DW_SET1_0 ,DI0_DW_SET2_0 ,DI0_DW_SET3_0 " line.long 0x4 "DI0_DW_GEN_1 ,DI0 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI0_ACCESS_SIZE_1 ,DI0 Access Size 1 " hexmask.long.byte 0x4 16.--23. 1. " DI0_COMPONENT_SIZE_1 ,DI0 component Size" bitfld.long 0x4 14.--15. " DI0_CST_1 ,DI0 Chip Select pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 12.--13. " DI0_PT_6_1 ,DI0 PIN_17 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " textline " " bitfld.long 0x4 10.--11. " DI0_PT_5_1 ,DI0 PIN_16 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 8.--9. " DI0_PT_4_1 ,DI0 PIN_15 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 6.--7. " DI0_PT_3_1 ,DI0 PIN_14 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 4.--5. " DI0_PT_2_1 ,DI0 PIN_13 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " textline " " bitfld.long 0x4 2.--3. " DI0_PT_1_1 ,DI0 PIN_12 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI0_PT_0_1 ,DI0 PIN_11 pointer for waveform 1 " "DI0_DW_SET0_1 ,DI0_DW_SET1_1 ,DI0_DW_SET2_1 ,DI0_DW_SET3_1 " line.long 0x8 "DI0_DW_GEN_2 ,DI0 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI0_ACCESS_SIZE_2 ,DI0 Access Size 2 " hexmask.long.byte 0x8 16.--23. 1. " DI0_COMPONENT_SIZE_2 ,DI0 component Size" bitfld.long 0x8 14.--15. " DI0_CST_2 ,DI0 Chip Select pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 12.--13. " DI0_PT_6_2 ,DI0 PIN_17 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " textline " " bitfld.long 0x8 10.--11. " DI0_PT_5_2 ,DI0 PIN_16 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 8.--9. " DI0_PT_4_2 ,DI0 PIN_15 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 6.--7. " DI0_PT_3_2 ,DI0 PIN_14 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 4.--5. " DI0_PT_2_2 ,DI0 PIN_13 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " textline " " bitfld.long 0x8 2.--3. " DI0_PT_1_2 ,DI0 PIN_12 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI0_PT_0_2 ,DI0 PIN_11 pointer for waveform 2 " "DI0_DW_SET0_2 ,DI0_DW_SET1_2 ,DI0_DW_SET2_2 ,DI0_DW_SET3_2 " line.long 0xC "DI0_DW_GEN_3 ,DI0 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI0_ACCESS_SIZE_3 ,DI0 Access Size 3 " hexmask.long.byte 0xC 16.--23. 1. " DI0_COMPONENT_SIZE_3 ,DI0 component Size" bitfld.long 0xC 14.--15. " DI0_CST_3 ,DI0 Chip Select pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 12.--13. " DI0_PT_6_3 ,DI0 PIN_17 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " textline " " bitfld.long 0xC 10.--11. " DI0_PT_5_3 ,DI0 PIN_16 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 8.--9. " DI0_PT_4_3 ,DI0 PIN_15 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 6.--7. " DI0_PT_3_3 ,DI0 PIN_14 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 4.--5. " DI0_PT_2_3 ,DI0 PIN_13 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " textline " " bitfld.long 0xC 2.--3. " DI0_PT_1_3 ,DI0 PIN_12 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI0_PT_0_3 ,DI0 PIN_11 pointer for waveform 3 " "DI0_DW_SET0_3 ,DI0_DW_SET1_3 ,DI0_DW_SET2_3 ,DI0_DW_SET3_3 " line.long 0x10 "DI0_DW_GEN_4 ,DI0 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI0_ACCESS_SIZE_4 ,DI0 Access Size 4 " hexmask.long.byte 0x10 16.--23. 1. " DI0_COMPONENT_SIZE_4 ,DI0 component Size" bitfld.long 0x10 14.--15. " DI0_CST_4 ,DI0 Chip Select pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 12.--13. " DI0_PT_6_4 ,DI0 PIN_17 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " textline " " bitfld.long 0x10 10.--11. " DI0_PT_5_4 ,DI0 PIN_16 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 8.--9. " DI0_PT_4_4 ,DI0 PIN_15 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 6.--7. " DI0_PT_3_4 ,DI0 PIN_14 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 4.--5. " DI0_PT_2_4 ,DI0 PIN_13 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " textline " " bitfld.long 0x10 2.--3. " DI0_PT_1_4 ,DI0 PIN_12 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI0_PT_0_4 ,DI0 PIN_11 pointer for waveform 4 " "DI0_DW_SET0_4 ,DI0_DW_SET1_4 ,DI0_DW_SET2_4 ,DI0_DW_SET3_4 " line.long 0x14 "DI0_DW_GEN_5 ,DI0 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI0_ACCESS_SIZE_5 ,DI0 Access Size 5 " hexmask.long.byte 0x14 16.--23. 1. " DI0_COMPONENT_SIZE_5 ,DI0 component Size" bitfld.long 0x14 14.--15. " DI0_CST_5 ,DI0 Chip Select pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 12.--13. " DI0_PT_6_5 ,DI0 PIN_17 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " textline " " bitfld.long 0x14 10.--11. " DI0_PT_5_5 ,DI0 PIN_16 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 8.--9. " DI0_PT_4_5 ,DI0 PIN_15 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 6.--7. " DI0_PT_3_5 ,DI0 PIN_14 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 4.--5. " DI0_PT_2_5 ,DI0 PIN_13 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " textline " " bitfld.long 0x14 2.--3. " DI0_PT_1_5 ,DI0 PIN_12 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI0_PT_0_5 ,DI0 PIN_11 pointer for waveform 5 " "DI0_DW_SET0_5 ,DI0_DW_SET1_5 ,DI0_DW_SET2_5 ,DI0_DW_SET3_5 " line.long 0x18 "DI0_DW_GEN_6 ,DI0 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI0_ACCESS_SIZE_6 ,DI0 Access Size 6 " hexmask.long.byte 0x18 16.--23. 1. " DI0_COMPONENT_SIZE_6 ,DI0 component Size" bitfld.long 0x18 14.--15. " DI0_CST_6 ,DI0 Chip Select pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 12.--13. " DI0_PT_6_6 ,DI0 PIN_17 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " textline " " bitfld.long 0x18 10.--11. " DI0_PT_5_6 ,DI0 PIN_16 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 8.--9. " DI0_PT_4_6 ,DI0 PIN_15 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 6.--7. " DI0_PT_3_6 ,DI0 PIN_14 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 4.--5. " DI0_PT_2_6 ,DI0 PIN_13 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " textline " " bitfld.long 0x18 2.--3. " DI0_PT_1_6 ,DI0 PIN_12 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI0_PT_0_6 ,DI0 PIN_11 pointer for waveform 6 " "DI0_DW_SET0_6 ,DI0_DW_SET1_6 ,DI0_DW_SET2_6 ,DI0_DW_SET3_6 " line.long 0x1C "DI0_DW_GEN_7 ,DI0 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI0_ACCESS_SIZE_7 ,DI0 Access Size 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI0_COMPONENT_SIZE_7 ,DI0 component Size" bitfld.long 0x1C 14.--15. " DI0_CST_7 ,DI0 Chip Select pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 12.--13. " DI0_PT_6_7 ,DI0 PIN_17 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " textline " " bitfld.long 0x1C 10.--11. " DI0_PT_5_7 ,DI0 PIN_16 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 8.--9. " DI0_PT_4_7 ,DI0 PIN_15 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 6.--7. " DI0_PT_3_7 ,DI0 PIN_14 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 4.--5. " DI0_PT_2_7 ,DI0 PIN_13 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " textline " " bitfld.long 0x1C 2.--3. " DI0_PT_1_7 ,DI0 PIN_12 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI0_PT_0_7 ,DI0 PIN_11 pointer for waveform 7 " "DI0_DW_SET0_7 ,DI0_DW_SET1_7 ,DI0_DW_SET2_7 ,DI0_DW_SET3_7 " line.long 0x20 "DI0_DW_GEN_8 ,DI0 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI0_ACCESS_SIZE_8 ,DI0 Access Size 8 " hexmask.long.byte 0x20 16.--23. 1. " DI0_COMPONENT_SIZE_8 ,DI0 component Size" bitfld.long 0x20 14.--15. " DI0_CST_8 ,DI0 Chip Select pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 12.--13. " DI0_PT_6_8 ,DI0 PIN_17 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " textline " " bitfld.long 0x20 10.--11. " DI0_PT_5_8 ,DI0 PIN_16 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 8.--9. " DI0_PT_4_8 ,DI0 PIN_15 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 6.--7. " DI0_PT_3_8 ,DI0 PIN_14 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 4.--5. " DI0_PT_2_8 ,DI0 PIN_13 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " textline " " bitfld.long 0x20 2.--3. " DI0_PT_1_8 ,DI0 PIN_12 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI0_PT_0_8 ,DI0 PIN_11 pointer for waveform 8 " "DI0_DW_SET0_8 ,DI0_DW_SET1_8 ,DI0_DW_SET2_8 ,DI0_DW_SET3_8 " line.long 0x24 "DI0_DW_GEN_9 ,DI0 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI0_ACCESS_SIZE_9 ,DI0 Access Size 9 " hexmask.long.byte 0x24 16.--23. 1. " DI0_COMPONENT_SIZE_9 ,DI0 component Size" bitfld.long 0x24 14.--15. " DI0_CST_9 ,DI0 Chip Select pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 12.--13. " DI0_PT_6_9 ,DI0 PIN_17 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " textline " " bitfld.long 0x24 10.--11. " DI0_PT_5_9 ,DI0 PIN_16 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 8.--9. " DI0_PT_4_9 ,DI0 PIN_15 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 6.--7. " DI0_PT_3_9 ,DI0 PIN_14 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 4.--5. " DI0_PT_2_9 ,DI0 PIN_13 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " textline " " bitfld.long 0x24 2.--3. " DI0_PT_1_9 ,DI0 PIN_12 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI0_PT_0_9 ,DI0 PIN_11 pointer for waveform 9 " "DI0_DW_SET0_9 ,DI0_DW_SET1_9 ,DI0_DW_SET2_9 ,DI0_DW_SET3_9 " line.long 0x28 "DI0_DW_GEN_10,DI0 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI0_ACCESS_SIZE_10 ,DI0 Access Size 10" hexmask.long.byte 0x28 16.--23. 1. " DI0_COMPONENT_SIZE_10 ,DI0 component Size" bitfld.long 0x28 14.--15. " DI0_CST_10 ,DI0 Chip Select pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 12.--13. " DI0_PT_6_10 ,DI0 PIN_17 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" textline " " bitfld.long 0x28 10.--11. " DI0_PT_5_10 ,DI0 PIN_16 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 8.--9. " DI0_PT_4_10 ,DI0 PIN_15 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 6.--7. " DI0_PT_3_10 ,DI0 PIN_14 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 4.--5. " DI0_PT_2_10 ,DI0 PIN_13 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" textline " " bitfld.long 0x28 2.--3. " DI0_PT_1_10 ,DI0 PIN_12 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" bitfld.long 0x28 0.--1. " DI0_PT_0_10 ,DI0 PIN_11 pointer for waveform 10" "DI0_DW_SET0_10,DI0_DW_SET1_10,DI0_DW_SET2_10,DI0_DW_SET3_10" line.long 0x2C "DI0_DW_GEN_11,DI0 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI0_ACCESS_SIZE_11 ,DI0 Access Size 11" hexmask.long.byte 0x2C 16.--23. 1. " DI0_COMPONENT_SIZE_11 ,DI0 component Size" bitfld.long 0x2C 14.--15. " DI0_CST_11 ,DI0 Chip Select pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 12.--13. " DI0_PT_6_11 ,DI0 PIN_17 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" textline " " bitfld.long 0x2C 10.--11. " DI0_PT_5_11 ,DI0 PIN_16 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 8.--9. " DI0_PT_4_11 ,DI0 PIN_15 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 6.--7. " DI0_PT_3_11 ,DI0 PIN_14 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 4.--5. " DI0_PT_2_11 ,DI0 PIN_13 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" textline " " bitfld.long 0x2C 2.--3. " DI0_PT_1_11 ,DI0 PIN_12 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI0_PT_0_11 ,DI0 PIN_11 pointer for waveform 11" "DI0_DW_SET0_11,DI0_DW_SET1_11,DI0_DW_SET2_11,DI0_DW_SET3_11" tree.end textline " " group.long 0x88++0xeb line.long 0x0 "DI0_DW_SET0_0 ,DI0 Data Wave Set 0 0 Registers" hexmask.long.word 0x0 16.--24. 1. " DI0_DATA_CNT_DOWN0_0 ,Waveform's falling edge position" hexmask.long.word 0x0 0.--8. 1. " DI0_DATA_CNT_UP0_0 ,Waveform's rising edge position" line.long 0x4 "DI0_DW_SET0_1 ,DI0 Data Wave Set 0 1 Registers" hexmask.long.word 0x4 16.--24. 1. " DI0_DATA_CNT_DOWN0_1 ,Waveform's falling edge position" hexmask.long.word 0x4 0.--8. 1. " DI0_DATA_CNT_UP0_1 ,Waveform's rising edge position" line.long 0x8 "DI0_DW_SET0_2 ,DI0 Data Wave Set 0 2 Registers" hexmask.long.word 0x8 16.--24. 1. " DI0_DATA_CNT_DOWN0_2 ,Waveform's falling edge position" hexmask.long.word 0x8 0.--8. 1. " DI0_DATA_CNT_UP0_2 ,Waveform's rising edge position" line.long 0xC "DI0_DW_SET0_3 ,DI0 Data Wave Set 0 3 Registers" hexmask.long.word 0xC 16.--24. 1. " DI0_DATA_CNT_DOWN0_3 ,Waveform's falling edge position" hexmask.long.word 0xC 0.--8. 1. " DI0_DATA_CNT_UP0_3 ,Waveform's rising edge position" line.long 0x10 "DI0_DW_SET0_4 ,DI0 Data Wave Set 0 4 Registers" hexmask.long.word 0x10 16.--24. 1. " DI0_DATA_CNT_DOWN0_4 ,Waveform's falling edge position" hexmask.long.word 0x10 0.--8. 1. " DI0_DATA_CNT_UP0_4 ,Waveform's rising edge position" line.long 0x14 "DI0_DW_SET0_5 ,DI0 Data Wave Set 0 5 Registers" hexmask.long.word 0x14 16.--24. 1. " DI0_DATA_CNT_DOWN0_5 ,Waveform's falling edge position" hexmask.long.word 0x14 0.--8. 1. " DI0_DATA_CNT_UP0_5 ,Waveform's rising edge position" line.long 0x18 "DI0_DW_SET0_6 ,DI0 Data Wave Set 0 6 Registers" hexmask.long.word 0x18 16.--24. 1. " DI0_DATA_CNT_DOWN0_6 ,Waveform's falling edge position" hexmask.long.word 0x18 0.--8. 1. " DI0_DATA_CNT_UP0_6 ,Waveform's rising edge position" line.long 0x1C "DI0_DW_SET0_7 ,DI0 Data Wave Set 0 7 Registers" hexmask.long.word 0x1C 16.--24. 1. " DI0_DATA_CNT_DOWN0_7 ,Waveform's falling edge position" hexmask.long.word 0x1C 0.--8. 1. " DI0_DATA_CNT_UP0_7 ,Waveform's rising edge position" line.long 0x20 "DI0_DW_SET0_8 ,DI0 Data Wave Set 0 8 Registers" hexmask.long.word 0x20 16.--24. 1. " DI0_DATA_CNT_DOWN0_8 ,Waveform's falling edge position" hexmask.long.word 0x20 0.--8. 1. " DI0_DATA_CNT_UP0_8 ,Waveform's rising edge position" line.long 0x24 "DI0_DW_SET0_9 ,DI0 Data Wave Set 0 9 Registers" hexmask.long.word 0x24 16.--24. 1. " DI0_DATA_CNT_DOWN0_9 ,Waveform's falling edge position" hexmask.long.word 0x24 0.--8. 1. " DI0_DATA_CNT_UP0_9 ,Waveform's rising edge position" line.long 0x28 "DI0_DW_SET0_10,DI0 Data Wave Set 0 10 Registers" hexmask.long.word 0x28 16.--24. 1. " DI0_DATA_CNT_DOWN0_10 ,Waveform's falling edge position" hexmask.long.word 0x28 0.--8. 1. " DI0_DATA_CNT_UP0_10 ,Waveform's rising edge position" line.long 0x2C "DI0_DW_SET0_11,DI0 Data Wave Set 0 11 Registers" hexmask.long.word 0x2C 16.--24. 1. " DI0_DATA_CNT_DOWN0_11 ,Waveform's falling edge position" hexmask.long.word 0x2C 0.--8. 1. " DI0_DATA_CNT_UP0_11 ,Waveform's rising edge position" line.long 0x30 "DI0_DW_SET1_0 ,DI0 Data Wave Set 1 0 Registers" hexmask.long.word 0x30 16.--24. 1. " DI0_DATA_CNT_DOWN1_0 ,Waveform's falling edge position" hexmask.long.word 0x30 0.--8. 1. " DI0_DATA_CNT_UP1_0 ,Waveform's rising edge position" line.long 0x34 "DI0_DW_SET1_1 ,DI0 Data Wave Set 1 1 Registers" hexmask.long.word 0x34 16.--24. 1. " DI0_DATA_CNT_DOWN1_1 ,Waveform's falling edge position" hexmask.long.word 0x34 0.--8. 1. " DI0_DATA_CNT_UP1_1 ,Waveform's rising edge position" line.long 0x38 "DI0_DW_SET1_2 ,DI0 Data Wave Set 1 2 Registers" hexmask.long.word 0x38 16.--24. 1. " DI0_DATA_CNT_DOWN1_2 ,Waveform's falling edge position" hexmask.long.word 0x38 0.--8. 1. " DI0_DATA_CNT_UP1_2 ,Waveform's rising edge position" line.long 0x3C "DI0_DW_SET1_3 ,DI0 Data Wave Set 1 3 Registers" hexmask.long.word 0x3C 16.--24. 1. " DI0_DATA_CNT_DOWN1_3 ,Waveform's falling edge position" hexmask.long.word 0x3C 0.--8. 1. " DI0_DATA_CNT_UP1_3 ,Waveform's rising edge position" line.long 0x40 "DI0_DW_SET1_4 ,DI0 Data Wave Set 1 4 Registers" hexmask.long.word 0x40 16.--24. 1. " DI0_DATA_CNT_DOWN1_4 ,Waveform's falling edge position" hexmask.long.word 0x40 0.--8. 1. " DI0_DATA_CNT_UP1_4 ,Waveform's rising edge position" line.long 0x44 "DI0_DW_SET1_5 ,DI0 Data Wave Set 1 5 Registers" hexmask.long.word 0x44 16.--24. 1. " DI0_DATA_CNT_DOWN1_5 ,Waveform's falling edge position" hexmask.long.word 0x44 0.--8. 1. " DI0_DATA_CNT_UP1_5 ,Waveform's rising edge position" line.long 0x48 "DI0_DW_SET1_6 ,DI0 Data Wave Set 1 6 Registers" hexmask.long.word 0x48 16.--24. 1. " DI0_DATA_CNT_DOWN1_6 ,Waveform's falling edge position" hexmask.long.word 0x48 0.--8. 1. " DI0_DATA_CNT_UP1_6 ,Waveform's rising edge position" line.long 0x4C "DI0_DW_SET1_7 ,DI0 Data Wave Set 1 7 Registers" hexmask.long.word 0x4C 16.--24. 1. " DI0_DATA_CNT_DOWN1_7 ,Waveform's falling edge position" hexmask.long.word 0x4C 0.--8. 1. " DI0_DATA_CNT_UP1_7 ,Waveform's rising edge position" line.long 0x50 "DI0_DW_SET1_8 ,DI0 Data Wave Set 1 8 Registers" hexmask.long.word 0x50 16.--24. 1. " DI0_DATA_CNT_DOWN1_8 ,Waveform's falling edge position" hexmask.long.word 0x50 0.--8. 1. " DI0_DATA_CNT_UP1_8 ,Waveform's rising edge position" line.long 0x54 "DI0_DW_SET1_9 ,DI0 Data Wave Set 1 9 Registers" hexmask.long.word 0x54 16.--24. 1. " DI0_DATA_CNT_DOWN1_9 ,Waveform's falling edge position" hexmask.long.word 0x54 0.--8. 1. " DI0_DATA_CNT_UP1_9 ,Waveform's rising edge position" line.long 0x58 "DI0_DW_SET1_10,DI0 Data Wave Set 1 10 Registers" hexmask.long.word 0x58 16.--24. 1. " DI0_DATA_CNT_DOWN1_10 ,Waveform's falling edge position" hexmask.long.word 0x58 0.--8. 1. " DI0_DATA_CNT_UP1_10 ,Waveform's rising edge position" line.long 0x5C "DI0_DW_SET1_11,DI0 Data Wave Set 1 11 Registers" hexmask.long.word 0x5C 16.--24. 1. " DI0_DATA_CNT_DOWN1_11 ,Waveform's falling edge position" hexmask.long.word 0x5C 0.--8. 1. " DI0_DATA_CNT_UP1_11 ,Waveform's rising edge position" line.long 0x60 "DI0_DW_SET2_0 ,DI0 Data Wave Set 2 0 Registers" hexmask.long.word 0x60 16.--24. 1. " DI0_DATA_CNT_DOWN2_0 ,Waveform's falling edge position" hexmask.long.word 0x60 0.--8. 1. " DI0_DATA_CNT_UP2_0 ,Waveform's rising edge position" line.long 0x64 "DI0_DW_SET2_1 ,DI0 Data Wave Set 2 1 Registers" hexmask.long.word 0x64 16.--24. 1. " DI0_DATA_CNT_DOWN2_1 ,Waveform's falling edge position" hexmask.long.word 0x64 0.--8. 1. " DI0_DATA_CNT_UP2_1 ,Waveform's rising edge position" line.long 0x68 "DI0_DW_SET2_2 ,DI0 Data Wave Set 2 2 Registers" hexmask.long.word 0x68 16.--24. 1. " DI0_DATA_CNT_DOWN2_2 ,Waveform's falling edge position" hexmask.long.word 0x68 0.--8. 1. " DI0_DATA_CNT_UP2_2 ,Waveform's rising edge position" line.long 0x6C "DI0_DW_SET2_3 ,DI0 Data Wave Set 2 3 Registers" hexmask.long.word 0x6C 16.--24. 1. " DI0_DATA_CNT_DOWN2_3 ,Waveform's falling edge position" hexmask.long.word 0x6C 0.--8. 1. " DI0_DATA_CNT_UP2_3 ,Waveform's rising edge position" line.long 0x70 "DI0_DW_SET2_4 ,DI0 Data Wave Set 2 4 Registers" hexmask.long.word 0x70 16.--24. 1. " DI0_DATA_CNT_DOWN2_4 ,Waveform's falling edge position" hexmask.long.word 0x70 0.--8. 1. " DI0_DATA_CNT_UP2_4 ,Waveform's rising edge position" line.long 0x74 "DI0_DW_SET2_5 ,DI0 Data Wave Set 2 5 Registers" hexmask.long.word 0x74 16.--24. 1. " DI0_DATA_CNT_DOWN2_5 ,Waveform's falling edge position" hexmask.long.word 0x74 0.--8. 1. " DI0_DATA_CNT_UP2_5 ,Waveform's rising edge position" line.long 0x78 "DI0_DW_SET2_6 ,DI0 Data Wave Set 2 6 Registers" hexmask.long.word 0x78 16.--24. 1. " DI0_DATA_CNT_DOWN2_6 ,Waveform's falling edge position" hexmask.long.word 0x78 0.--8. 1. " DI0_DATA_CNT_UP2_6 ,Waveform's rising edge position" line.long 0x7C "DI0_DW_SET2_7 ,DI0 Data Wave Set 2 7 Registers" hexmask.long.word 0x7C 16.--24. 1. " DI0_DATA_CNT_DOWN2_7 ,Waveform's falling edge position" hexmask.long.word 0x7C 0.--8. 1. " DI0_DATA_CNT_UP2_7 ,Waveform's rising edge position" line.long 0x80 "DI0_DW_SET2_8 ,DI0 Data Wave Set 2 8 Registers" hexmask.long.word 0x80 16.--24. 1. " DI0_DATA_CNT_DOWN2_8 ,Waveform's falling edge position" hexmask.long.word 0x80 0.--8. 1. " DI0_DATA_CNT_UP2_8 ,Waveform's rising edge position" line.long 0x84 "DI0_DW_SET2_9 ,DI0 Data Wave Set 2 9 Registers" hexmask.long.word 0x84 16.--24. 1. " DI0_DATA_CNT_DOWN2_9 ,Waveform's falling edge position" hexmask.long.word 0x84 0.--8. 1. " DI0_DATA_CNT_UP2_9 ,Waveform's rising edge position" line.long 0x88 "DI0_DW_SET2_10,DI0 Data Wave Set 2 10 Registers" hexmask.long.word 0x88 16.--24. 1. " DI0_DATA_CNT_DOWN2_10 ,Waveform's falling edge position" hexmask.long.word 0x88 0.--8. 1. " DI0_DATA_CNT_UP2_10 ,Waveform's rising edge position" line.long 0x8C "DI0_DW_SET2_11,DI0 Data Wave Set 2 11 Registers" hexmask.long.word 0x8C 16.--24. 1. " DI0_DATA_CNT_DOWN2_11 ,Waveform's falling edge position" hexmask.long.word 0x8C 0.--8. 1. " DI0_DATA_CNT_UP2_11 ,Waveform's rising edge position" line.long 0x90 "DI0_DW_SET3_0 ,DI0 Data Wave Set 3 0 Registers" hexmask.long.word 0x90 16.--24. 1. " DI0_DATA_CNT_DOWN3_0 ,Waveform's falling edge position" hexmask.long.word 0x90 0.--8. 1. " DI0_DATA_CNT_UP3_0 ,Waveform's rising edge position" line.long 0x94 "DI0_DW_SET3_1 ,DI0 Data Wave Set 3 1 Registers" hexmask.long.word 0x94 16.--24. 1. " DI0_DATA_CNT_DOWN3_1 ,Waveform's falling edge position" hexmask.long.word 0x94 0.--8. 1. " DI0_DATA_CNT_UP3_1 ,Waveform's rising edge position" line.long 0x98 "DI0_DW_SET3_2 ,DI0 Data Wave Set 3 2 Registers" hexmask.long.word 0x98 16.--24. 1. " DI0_DATA_CNT_DOWN3_2 ,Waveform's falling edge position" hexmask.long.word 0x98 0.--8. 1. " DI0_DATA_CNT_UP3_2 ,Waveform's rising edge position" line.long 0x9C "DI0_DW_SET3_3 ,DI0 Data Wave Set 3 3 Registers" hexmask.long.word 0x9C 16.--24. 1. " DI0_DATA_CNT_DOWN3_3 ,Waveform's falling edge position" hexmask.long.word 0x9C 0.--8. 1. " DI0_DATA_CNT_UP3_3 ,Waveform's rising edge position" line.long 0xA0 "DI0_DW_SET3_4 ,DI0 Data Wave Set 3 4 Registers" hexmask.long.word 0xA0 16.--24. 1. " DI0_DATA_CNT_DOWN3_4 ,Waveform's falling edge position" hexmask.long.word 0xA0 0.--8. 1. " DI0_DATA_CNT_UP3_4 ,Waveform's rising edge position" line.long 0xA4 "DI0_DW_SET3_5 ,DI0 Data Wave Set 3 5 Registers" hexmask.long.word 0xA4 16.--24. 1. " DI0_DATA_CNT_DOWN3_5 ,Waveform's falling edge position" hexmask.long.word 0xA4 0.--8. 1. " DI0_DATA_CNT_UP3_5 ,Waveform's rising edge position" line.long 0xA8 "DI0_DW_SET3_6 ,DI0 Data Wave Set 3 6 Registers" hexmask.long.word 0xA8 16.--24. 1. " DI0_DATA_CNT_DOWN3_6 ,Waveform's falling edge position" hexmask.long.word 0xA8 0.--8. 1. " DI0_DATA_CNT_UP3_6 ,Waveform's rising edge position" line.long 0xAC "DI0_DW_SET3_7 ,DI0 Data Wave Set 3 7 Registers" hexmask.long.word 0xAC 16.--24. 1. " DI0_DATA_CNT_DOWN3_7 ,Waveform's falling edge position" hexmask.long.word 0xAC 0.--8. 1. " DI0_DATA_CNT_UP3_7 ,Waveform's rising edge position" line.long 0xB0 "DI0_DW_SET3_8 ,DI0 Data Wave Set 3 8 Registers" hexmask.long.word 0xB0 16.--24. 1. " DI0_DATA_CNT_DOWN3_8 ,Waveform's falling edge position" hexmask.long.word 0xB0 0.--8. 1. " DI0_DATA_CNT_UP3_8 ,Waveform's rising edge position" line.long 0xB4 "DI0_DW_SET3_9 ,DI0 Data Wave Set 3 9 Registers" hexmask.long.word 0xB4 16.--24. 1. " DI0_DATA_CNT_DOWN3_9 ,Waveform's falling edge position" hexmask.long.word 0xB4 0.--8. 1. " DI0_DATA_CNT_UP3_9 ,Waveform's rising edge position" line.long 0xB8 "DI0_DW_SET3_10,DI0 Data Wave Set 3 10 Registers" hexmask.long.word 0xB8 16.--24. 1. " DI0_DATA_CNT_DOWN3_10 ,Waveform's falling edge position" hexmask.long.word 0xB8 0.--8. 1. " DI0_DATA_CNT_UP3_10 ,Waveform's rising edge position" line.long 0xBC "DI0_DW_SET3_11,DI0 Data Wave Set 3 11 Registers" hexmask.long.word 0xBC 16.--24. 1. " DI0_DATA_CNT_DOWN3_11 ,Waveform's falling edge position" hexmask.long.word 0xBC 0.--8. 1. " DI0_DATA_CNT_UP3_11 ,Waveform's rising edge position" line.long 0xC0 "DI0_STP_REP_1,DI0 Step Repeat 1 Registers" hexmask.long.word 0xC0 16.--27. 1. " DI0_STEP_REPEAT_1 ,Step Repeat 1" hexmask.long.word 0xC0 0.--11. 1. " DI0_STEP_REPEAT_0 ,Step Repeat 0" line.long 0xC4 "DI0_STP_REP_2,DI0 Step Repeat 2 Registers" hexmask.long.word 0xC4 16.--27. 1. " DI0_STEP_REPEAT_3 ,Step Repeat 3" hexmask.long.word 0xC4 0.--11. 1. " DI0_STEP_REPEAT_2 ,Step Repeat 2" line.long 0xC8 "DI0_STP_REP_3,DI0 Step Repeat 3 Registers" hexmask.long.word 0xC8 16.--27. 1. " DI0_STEP_REPEAT_5 ,Step Repeat 5" hexmask.long.word 0xC8 0.--11. 1. " DI0_STEP_REPEAT_4 ,Step Repeat 4" line.long 0xCC "DI0_STP_REP_4,DI0 Step Repeat 4 Registers" hexmask.long.word 0xCC 16.--27. 1. " DI0_STEP_REPEAT_7 ,Step Repeat 7" hexmask.long.word 0xCC 0.--11. 1. " DI0_STEP_REPEAT_6 ,Step Repeat 6" line.long 0xd0 "DI0_STP_REP_9,DI0 Step Repeat 9 Registers" hexmask.long.word 0xd0 0.--11. 1. " DI0_STEP_REPEAT_9 ,Step Repeat 9" line.long 0xd4 "DI0_SER_CONF,DI0 Serial Display Control Register" bitfld.long 0xd4 28.--31. " DI0_SERIAL_LLA_PNTR_RS_R_1 ,RS 3 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 24.--27. " DI0_SERIAL_LLA_PNTR_RS_R_0 ,RS 2 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 20.--23. " DI0_SERIAL_LLA_PNTR_RS_W_1 ,RS 1 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." textline " " bitfld.long 0xd4 16.--19. " DI0_SERIAL_LLA_PNTR_RS_W_0 ,RS 0 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0xd4 8.--15. 1. " DI0_SERIAL_LATCH ,DI0 Serial Latch" bitfld.long 0xd4 5. " DI0_LLA_SER_ACCESS ,Direct Low Level Access to Serial display" "Disabled,Enabled" textline " " bitfld.long 0xd4 4. " DI0_SER_CLK_POLARITY ,Serial Clock Polarity" "Not inverted,Inverted" bitfld.long 0xd4 3. " DI0_SERIAL_DATA_POLARITY ,Serial Data Polarity" "Not inverted,Inverted" bitfld.long 0xd4 2. " DI0_SERIAL_RS_POLARITY ,Serial RS Polarity" "Not inverted,Inverted" textline " " bitfld.long 0xd4 1. " DI0_SERIAL_CS_POLARITY ,Serial Chip Select Polarity" "Not inverted,Inverted" bitfld.long 0xd4 0. " DI0_WAIT4SERIAL ,Wait for Serial" "Not wait,Wait" line.long 0xd8 "DI0_SSC,DI0 Special Signals Control Register" bitfld.long 0xd8 23. " DI0_PIN17_ERM ,DI0 PIN17 error recovery mode" "No error,Error" bitfld.long 0xd8 22. " DI0_PIN16_ERM ,DI0 PIN16 error recovery mode" "No error,Error" bitfld.long 0xd8 21. " DI0_PIN15_ERM ,DI0 PIN15 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 20. " DI0_PIN14_ERM ,DI0 PIN14 error recovery mode" "No error,Error" bitfld.long 0xd8 19. " DI0_PIN13_ERM ,DI0 PIN13 error recovery mode" "No error,Error" bitfld.long 0xd8 18. " DI0_PIN12_ERM ,DI0 PIN12 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 17. " DI0_PIN11_ERM ,DI0 PIN11 error recovery mode" "No error,Error" bitfld.long 0xd8 16. " DI0_CS_ERM ,DI0 CS error recovery mode" "No error,Error" bitfld.long 0xd8 5. " DI0_WAIT_ON ,Wait On" "Continued,Held" textline " " bitfld.long 0xd8 3. " DI0_BYTE_EN_RD_IN ,Byte Enable Read In" "R/W [17:16],W [17:16]/R [19:18]" bitfld.long 0xd8 0.--2. " DI0_BYTE_EN_PNTR ,Byte Enable Pointer" "Pin_11,Pin_12,Pin_13,Pin_14,Pin_15,Pin_16,Pin_17,CS pin" line.long 0xdc "DI0_POL,DI0 Polarity Register" bitfld.long 0xdc 26. " DI0_WAIT_POLARITY ,WAIT polarity" "Active low,Active high" bitfld.long 0xdc 25. " DI0_CS1_BYTE_EN_POLARITY ,Byte Enable associated with CS1 polarity" "Active low,Active high" bitfld.long 0xdc 24. " DI0_CS0_BYTE_EN_POLARITY ,Byte Enable associated with CS0 polarity" "Active low,Active high" textline " " bitfld.long 0xdc 23. " DI0_CS1_DATA_POLARITY ,Data Polarity associated with CS1" "Active low,Active high" bitfld.long 0xdc 22. " DI0_CS1_POLARITY_17 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 21. " DI0_CS1_POLARITY_16 ,DI0 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 20. " DI0_CS1_POLARITY_15 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 19. " DI0_CS1_POLARITY_14 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 18. " DI0_CS1_POLARITY_13 ,DI0 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 17. " DI0_CS1_POLARITY_12 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 16. " DI0_CS1_POLARITY_11 ,DI0 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 15. " DI0_CS0_DATA_POLARITY ,Data Polarity associated with CS0" "Active low,Active high" textline " " bitfld.long 0xdc 14. " DI0_CS0_POLARITY_17 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 13. " DI0_CS0_POLARITY_16 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 12. " DI0_CS0_POLARITY_15 ,DI0 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 11. " DI0_CS0_POLARITY_14 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 10. " DI0_CS0_POLARITY_13 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 9. " DI0_CS0_POLARITY_12 ,DI0 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 8. " DI0_CS0_POLARITY_11 ,DI0 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 7. " DI0_DRDY_DATA_POLARITY ,Data Polarity associated with DRDY" "Active low,Active high" bitfld.long 0xdc 6. " DI0_DRDY_POLARITY_17 ,DI0 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 5. " DI0_DRDY_POLARITY_16 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 4. " DI0_DRDY_POLARITY_15 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 3. " DI0_DRDY_POLARITY_14 ,DI0 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 2. " DI0_DRDY_POLARITY_13 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 1. " DI0_DRDY_POLARITY_12 ,DI0 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 0. " DI0_DRDY_POLARITY_11 ,DI0 output pin's polarity for DRDY" "Active low,Active high" line.long 0xe0 "DI0_AW0,DI0 Active Window 0 Register" bitfld.long 0xe0 28.--31. " DI0_AW_TRIG_SEL ,Selects the trigger for sending data during the display's active window" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on,?..." hexmask.long.word 0xe0 16.--27. 1. " DI0_AW_HEND ,Horizontal end of the active window" bitfld.long 0xe0 12.--15. " DI0_AW_HCOUNT_SEL ,Selects the counter that counts the horizontal position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." textline " " hexmask.long.word 0xe0 0.--11. 1. " DI0_AW_HSTART ,Horizontal start of the active window" line.long 0xe4 "DI0_AW1,DI0 Active Window 1 Register" hexmask.long.word 0xe4 16.--27. 1. " DI0_AW_VEND ,Vertical end of the active window" bitfld.long 0xe4 12.--15. " DI0_AW_VCOUNT_SEL ,Selects the counter that counts the vertical position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." hexmask.long.word 0xe4 0.--11. 1. " DI0_AW_VSTART ,Vertical start of the active window" line.long 0xe8 "DI0_SCR_CONF,DI0 Screen Configuration Register" hexmask.long.word 0xe8 0.--11. 1. " DI0_SCREEN_HEIGHT ,Number of display rows" rgroup.long 0x174++0x03 line.long 0x00 "DI0_STAT,DI0 Status Register" bitfld.long 0x00 3. " DI0_CNTR_FIFO_FULL ,DI0_CNTR_FIFO_FULL" "Not full,Full" bitfld.long 0x00 2. " DI0_CNTR_FIFO_EMPTY ,DI0_CNTR_FIFO_EMPTY" "Not empty,Empty" bitfld.long 0x00 1. " DI0_READ_FIFO_FULL ,DI0_READ_FIFO_FULL" "Not full,Full" textline " " bitfld.long 0x00 0. " DI0_READ_FIFO_EMPTY ,DI0_READ_FIFO_EMPTY" "Not empty,Empty" width 0x0B tree.end tree "DI1 registers" base ad:0x02A48000 width 17. group.long 0x00++0x57 line.long 0x00 "DI1_GENERAL,DI1 General Register" bitfld.long 0x00 31. " DI1_PIN8_PIN15_SEL ,Route PIN8 over PIN15" "Not routed,Routed" bitfld.long 0x00 28.--30. " DI1_DISP_Y_SEL ,DI1 Display Vertical coordinate (Y) select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x00 24.--27. " DI1_CLOCK_STOP_MODE ,DI clock stop mode" "Next edge,Next event of Cnt. 1,Next event of Cnt. 2,Next event of Cnt. 3,Next event of Cnt. 4,Next event of Cnt. 5,Next event of Cnt. 6,Next event of Cnt. 7,Next event of Cnt. 8,Next event of Cnt. 9,,,EOL/now,EOF/now,EOL/next line,EOF/next frame" textline " " bitfld.long 0x00 23. " DI1_DISP_CLOCK_INIT ,Display clock's initial mode" "Stopped,Running" bitfld.long 0x00 22. " DI1_MASK_SEL ,DI1 Mask select" "Counter 2,Extracted MASK data" bitfld.long 0x00 21. " DI1_VSYNC_EXT ,DI1 External VSYNC" "Internally,External" textline " " bitfld.long 0x00 20. " DI1_CLK_EXT ,DI1 External Clock" "Internally,External" bitfld.long 0x00 18.--19. " DI1_WATCHDOG_MODE ,DI1 watchdog mode" "4,16,64,128" bitfld.long 0x00 17. " DI1_POLARITY_DISP_CLK ,DI1 Output Clock's polarity" "Active low,Active high" textline " " bitfld.long 0x00 12.--15. " DI1_SYNC_COUNT_SEL ,Selects synchronous flow synchronization counter in DI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " DI1_ERR_TREATMENT ,In case of synchronous flow error there are 2 ways to handle the display" "Drive the last component,To wait" bitfld.long 0x00 10. " DI1_ERM_VSYNC_SEL ,DI1 error recovery module's VSYNC source select" "Vsync_pre,Vsync_post" textline " " bitfld.long 0x00 9. " DI1_POLARITY_CS1 ,DI1 Chip Select's 1 polarity" "Active Low,Active High" bitfld.long 0x00 8. " DI1_POLARITY_CS0 ,DI1 Chip Select's 0 polarity" "Active Low,Active High" bitfld.long 0x00 7. " DI1_POLARITY_8 ,DI1 output pin 8 polarity" "Active low,Active high" textline " " bitfld.long 0x00 6. " DI1_POLARITY_7 ,DI1 output pin 7 polarity" "Active low,Active high" bitfld.long 0x00 5. " DI1_POLARITY_6 ,DI1 output pin 6 polarity" "Active low,Active high" bitfld.long 0x00 4. " DI1_POLARITY_5 ,DI1 output pin 5 polarity" "Active low,Active high" textline " " bitfld.long 0x00 3. " DI1_POLARITY_4 ,DI1 output pin 4 polarity" "Active low,Active high" bitfld.long 0x00 2. " DI1_POLARITY_3 ,DI1 output pin 3 polarity" "Active low,Active high" bitfld.long 0x00 1. " DI1_POLARITY_2 ,DI1 output pin 2 polarity" "Active low,Active high" textline " " bitfld.long 0x00 0. " DI1_POLARITY_1 ,DI1 output pin 1 polarity" "Active low,Active high" line.long 0x04 "DI1_BS_CLKGEN0,DI1 Base Sync Clock Gen 0 Register" hexmask.long.word 0x04 16.--24. 1. " DI1_DISP_CLK_OFFSET ,DI1 Display Clock Offset" hexmask.long.byte 0x04 4.--11. 1. " DI1_DISP_CLK_PERIOD1 ,DI1 Display Clock Period (integer part)" hexmask.long.byte 0x04 0.--3. 1. " DI1_DISP_CLK_PERIOD0 ,DI1 Display Clock Period (fractional part)" line.long 0x08 "DI1_BS_CLKGEN1,DI1 Base Sync Clock Gen 1 Register" hexmask.long.byte 0x08 17.--24. 1. " DI1_DISP_CLK_DOWN1 ,DI1 display clock falling edge position (integer part)" bitfld.long 0x08 16. " DI1_DISP_CLK_DOWN0 ,DI1 display clock falling edge position(fractional part)" "0,1" hexmask.long.byte 0x08 1.--8. 1. " DI1_DISP_CLK_UP1 ,DI1 display clock rising edge position (integer part)" textline " " bitfld.long 0x08 0. " DI1_DISP_CLK_UP0 ,DI1 display clock rising edge position (fractional part)" "0,1" line.long 0x0c "DI1_SW_GEN0_1,DI1 Sync Wave Gen 1 Register 0" hexmask.long.word 0x0C 19.--30. 1. " DI1_RUN_VALUE_M1_1 ,DI1 counter #1 pre defined value" bitfld.long 0x0C 16.--18. " DI1_RUN_RESOLUTION_1 ,DI1 counter #1 Run Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x0C 3.--14. 1. " DI1_OFFSET_VALUE_1 ,DI1 counter #1 offset value" textline " " bitfld.long 0x0C 0.--2. " DI1_OFFSET_RESOLUTION_1 ,DI1 counter #1 offset Resolution" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" line.long 0x10 "DI1_SW_GEN0_2,DI1 Sync Wave Gen 2 Register 0" hexmask.long.word 0x10 19.--30. 1. " DI1_RUN_VALUE_M1_2 ,DI1 counter #2 pre defined value" bitfld.long 0x10 16.--18. " DI1_RUN_RESOLUTION_2 ,DI1 counter #2 Run Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x10 3.--14. 1. " DI1_OFFSET_VALUE_2 ,DI1 counter #2 offset value" textline " " bitfld.long 0x10 0.--2. " DI1_OFFSET_RESOLUTION_2 ,DI1 counter #2 offset Resolution" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" line.long 0x14 "DI1_SW_GEN0_3,DI1 Sync Wave Gen 3 Register 0" hexmask.long.word 0x14 19.--30. 1. " DI1_RUN_VALUE_M1_3 ,DI1 counter #3 pre defined value" bitfld.long 0x14 16.--18. " DI1_RUN_RESOLUTION_3 ,DI1 counter #3 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x14 3.--14. 1. " DI1_OFFSET_VALUE_3 ,counter #3 offset value" textline " " bitfld.long 0x14 0.--2. " DI1_OFFSET_RESOLUTION_3 ,DI1 counter #3 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" line.long 0x18 "DI1_SW_GEN0_4,DI1 Sync Wave Gen 4 Register 0" hexmask.long.word 0x18 19.--30. 1. " DI1_RUN_VALUE_M1_4 ,DI1 counter #4 pre defined value" bitfld.long 0x18 16.--18. " DI1_RUN_RESOLUTION_4 ,DI1 counter #4 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x18 3.--14. 1. " DI1_OFFSET_VALUE_4 ,DI1 counter #4 offset value" textline " " bitfld.long 0x18 0.--2. " DI1_OFFSET_RESOLUTION_4 ,DI1 counter #4 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" line.long 0x1c "DI1_SW_GEN0_5,DI1 Sync Wave Gen 5 Register 0" hexmask.long.word 0x1C 19.--30. 1. " DI1_RUN_VALUE_M1_5 ,DI1 counter #5 pre defined value" bitfld.long 0x1C 16.--18. " DI1_RUN_RESOLUTION_5 ,DI1 counter #5 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x1C 3.--14. 1. " DI1_OFFSET_VALUE_5 ,DI1 counter #5 offset value" textline " " bitfld.long 0x1C 0.--2. " DI1_OFFSET_RESOLUTION_5 ,DI1 counter #5 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" line.long 0x20 "DI1_SW_GEN0_6,DI1 Sync Wave Gen 6 Register 0" hexmask.long.word 0x20 19.--30. 1. " DI1_RUN_VALUE_M1_6 ,DI1 counter #6 pre defined value" bitfld.long 0x20 16.--18. " DI1_RUN_RESOLUTION_6 ,DI1 counter #6 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x20 3.--14. 1. " DI1_OFFSET_VALUE_6 ,DI1 counter #6 offset value" textline " " bitfld.long 0x20 0.--2. " DI1_OFFSET_RESOLUTION_6 ,DI1 counter #6 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x24 "DI1_SW_GEN0_7,DI1 Sync Wave Gen 7 Register 0" hexmask.long.word 0x24 19.--30. 1. " DI1_RUN_VALUE_M1_7 ,DI1 counter #7 pre defined value" bitfld.long 0x24 16.--18. " DI1_RUN_RESOLUTION_7 ,DI1 counter #7 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x24 3.--14. 1. " DI1_OFFSET_VALUE_7 ,DI1 counter #7 offset value" textline " " bitfld.long 0x24 0.--2. " DI1_OFFSET_RESOLUTION_7 ,DI1 counter #7 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x28 "DI1_SW_GEN0_8,DI1 Sync Wave Gen 8 Register 0" hexmask.long.word 0x28 19.--30. 1. " DI1_RUN_VALUE_M1_8 ,DI1 counter #8 pre defined value" bitfld.long 0x28 16.--18. " DI1_RUN_RESOLUTION_8 ,DI1 counter #8 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x28 3.--14. 1. " DI1_OFFSET_VALUE_8 ,DI1 counter #8 offset value" textline " " bitfld.long 0x28 0.--2. " DI1_OFFSET_RESOLUTION_8 ,DI1 counter #8 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" line.long 0x2c "DI1_SW_GEN0_9,DI1 Sync Wave Gen 9 Register 0" hexmask.long.word 0x2C 19.--30. 1. " DI1_RUN_VALUE_M1_9 ,DI1 counter #9 pre defined value" bitfld.long 0x2C 16.--18. " DI1_RUN_RESOLUTION_9 ,DI1 counter #9 Run Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x2C 3.--14. 1. " DI1_OFFSET_VALUE_9 ,DI1 counter #9 offset value" textline " " bitfld.long 0x2C 0.--2. " DI1_OFFSET_RESOLUTION_9 ,DI1 counter #9 offset Resolution" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" textline " " line.long 0x30 "DI1_SW_GEN1_1,DI1 Sync Wave 1 Gen Register 1" bitfld.long 0x30 29.--30. " DI1_CNT_POLARITY_GEN_EN_1 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x30 28. " DI1_CNT_AUTO_RELOAD_1 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x30 25.--27. " DI1_CNT_CLR_SEL_1 ,Counter Clear select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x30 16.--24. 1. " DI1_CNT_DOWN_1 ,Counter falling edge position" textline " " bitfld.long 0x30 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_1 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x30 9.--11. " DI1_CNT_POLARITY_CLR_SEL_1 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x30 1.--8. 1. " DI1_CNT_UP_1_1 ,Counter rising edge position(integer part)" bitfld.long 0x30 0. " DI1_CNT_UP_1_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x34 "DI1_SW_GEN1_2,DI1 Sync Wave 2 Gen Register 1" bitfld.long 0x34 29.--30. " DI1_CNT_POLARITY_GEN_EN_2 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x34 28. " DI1_CNT_AUTO_RELOAD_2 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x34 25.--27. " DI1_CNT_CLR_SEL_2 ,Counter Clear select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x34 16.--24. 1. " DI1_CNT_DOWN_2 ,Counter falling edge position" textline " " bitfld.long 0x34 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_2 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x34 9.--11. " DI1_CNT_POLARITY_CLR_SEL_2 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,?..." textline " " hexmask.long.byte 0x34 1.--8. 1. " DI1_CNT_UP_2_1 ,Counter rising edge position(integer part)" bitfld.long 0x34 0. " DI1_CNT_UP_2_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x38 "DI1_SW_GEN1_3,DI1 Sync Wave 3 Gen Register 1" bitfld.long 0x38 29.--30. " DI1_CNT_POLARITY_GEN_EN_3 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x38 28. " DI1_CNT_AUTO_RELOAD_3 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x38 25.--27. " DI1_CNT_CLR_SEL_3 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x38 16.--24. 1. " DI1_CNT_DOWN_3 ,Counter falling edge position" textline " " bitfld.long 0x38 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_3 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x38 9.--11. " DI1_CNT_POLARITY_CLR_SEL_3 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,?..." textline " " hexmask.long.byte 0x38 1.--8. 1. " DI1_CNT_UP_3_1 ,Counter rising edge position(integer part)" bitfld.long 0x38 0. " DI1_CNT_UP_3_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x3c "DI1_SW_GEN1_4,DI1 Sync Wave 4 Gen Register 1" bitfld.long 0x3C 29.--30. " DI1_CNT_POLARITY_GEN_EN_4 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x3C 28. " DI1_CNT_AUTO_RELOAD_4 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x3C 25.--27. " DI1_CNT_CLR_SEL_4 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" hexmask.long.word 0x3C 16.--24. 1. " DI1_CNT_DOWN_4 ,Counter falling edge position" textline " " bitfld.long 0x3C 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_4 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,CSI VSYNC,External VSYNC,Always on" bitfld.long 0x3C 9.--11. " DI1_CNT_POLARITY_CLR_SEL_4 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,?..." textline " " hexmask.long.byte 0x3C 1.--8. 1. " DI1_CNT_UP_4_1 ,Counter rising edge position(integer part)" bitfld.long 0x3C 0. " DI1_CNT_UP_4_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x40 "DI1_SW_GEN1_5,DI1 Sync Wave 5 Gen Register 1" bitfld.long 0x40 29.--30. " DI1_CNT_POLARITY_GEN_EN_5 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x40 28. " DI1_CNT_AUTO_RELOAD_5 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x40 25.--27. " DI1_CNT_CLR_SEL_5 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" hexmask.long.word 0x40 16.--24. 1. " DI1_CNT_DOWN_5 ,Counter falling edge position" textline " " bitfld.long 0x40 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_5 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,External VSYNC,Always on" bitfld.long 0x40 9.--11. " DI1_CNT_POLARITY_CLR_SEL_5 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,?..." textline " " hexmask.long.byte 0x40 1.--8. 1. " DI1_CNT_UP_5_1 ,Counter rising edge position(integer part)" bitfld.long 0x40 0. " DI1_CNT_UP_5_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x44 "DI1_SW_GEN1_6,DI1 Sync Wave 6 Gen Register 1" bitfld.long 0x44 29.--30. " DI1_CNT_POLARITY_GEN_EN_6 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x44 28. " DI1_CNT_AUTO_RELOAD_6 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x44 25.--27. " DI1_CNT_CLR_SEL_6 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x44 16.--24. 1. " DI1_CNT_DOWN_6 ,Counter falling edge position" textline " " bitfld.long 0x44 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_6 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x44 9.--11. " DI1_CNT_POLARITY_CLR_SEL_6 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,?..." textline " " hexmask.long.byte 0x44 1.--8. 1. " DI1_CNT_UP_6_1 ,Counter rising edge position(integer part)" bitfld.long 0x44 0. " DI1_CNT_UP_6_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x48 "DI1_SW_GEN1_7,DI1 Sync Wave 7 Gen Register 1" bitfld.long 0x48 29.--30. " DI1_CNT_POLARITY_GEN_EN_7 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x48 28. " DI1_CNT_AUTO_RELOAD_7 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x48 25.--27. " DI1_CNT_CLR_SEL_7 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x48 16.--24. 1. " DI1_CNT_DOWN_7 ,Counter falling edge position" textline " " bitfld.long 0x48 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_7 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x48 9.--11. " DI1_CNT_POLARITY_CLR_SEL_7 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x48 1.--8. 1. " DI1_CNT_UP_7_1 ,Counter rising edge position(integer part)" bitfld.long 0x48 0. " DI1_CNT_UP_7_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x4c "DI1_SW_GEN1_8,DI1 Sync Wave 8 Gen Register 1" bitfld.long 0x4c 29.--30. " DI1_CNT_POLARITY_GEN_EN_8 ,DI1 Counter polarity generator enable" "Disabled,Value multiple of 2,Enabled,Reached its pre defined value" bitfld.long 0x4c 28. " DI1_CNT_AUTO_RELOAD_8 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x4c 25.--27. " DI1_CNT_CLR_SEL_8 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x4c 16.--24. 1. " DI1_CNT_DOWN_8 ,Counter falling edge position" textline " " bitfld.long 0x4c 12.--14. " DI1_CNT_POLARITY_TRIGGER_SEL_8 ,DI1 Counter's toggling trigger select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" bitfld.long 0x4c 9.--11. " DI1_CNT_POLARITY_CLR_SEL_8 ,DI1 counter's polarity Clear select" "Always inverted,Kept the same,Inverted if set Counter 1,Inverted if set Counter 2,Inverted if set Counter 3,Inverted if set Counter 4,Inverted if set Counter 5,Inverted if set Counter 6" textline " " hexmask.long.byte 0x4c 1.--8. 1. " DI1_CNT_UP_8_1 ,Counter rising edge position(integer part)" bitfld.long 0x4c 0. " DI1_CNT_UP_8_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x50 "DI1_SW_GEN1_9,DI1 Sync Wave 9 Gen Register 1" bitfld.long 0x50 29.--31. " DI1_GENTIME_SEL_9 ,Counter #9 main waveform select" "Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8" bitfld.long 0x50 28. " DI1_CNT_AUTO_RELOAD_9 ,Counter auto reload mode" "Not reloaded,Reloaded" textline " " bitfld.long 0x50 25.--27. " DI1_CNT_CLR_SEL_9 ,Counter Clear select" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on" hexmask.long.word 0x50 16.--24. 1. " DI1_CNT_DOWN_9 ,Counter falling edge position" textline " " bitfld.long 0x50 15. " DI1_TAG_SEL_9 ,Tag's source select" "Triggering counter,Counter 9" hexmask.long.byte 0x50 1.--8. 1. " DI1_CNT_UP_9_1 ,Counter rising edge position(integer part)" textline " " bitfld.long 0x50 0. " DI1_CNT_UP_9_0 ,Counter rising edge position(fractional part)" "0,1" line.long 0x54 "DI1_SYNC_AS_GEN,DI1 Sync Assistance Gen Register" sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||(cpuis("IMX6*"))) bitfld.long 0x54 28. " DI1_SYNC_START_EN ,DI0_SYNC_START_EN" "Disabled,Enabled" textline " " endif bitfld.long 0x54 13.--15. " DI1_VSYNC_SEL ,VSYNC select" "1,2,3,4,5,6,7,8" hexmask.long.word 0x54 0.--11. 1. " DI1_SYNC_START ,DI1 Sync start" tree "DI1_DW_GEN 0-11 (Serial display)" group.long 0x58++0x2f line.long 0x0 "DI1_DW_GEN_0 ,DI1 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI1_SERIAL_PERIOD_0 ,DI1 Serial Period 0 " hexmask.long.byte 0x0 16.--23. 1. " DI1_START_PERIOD_0 ,DI1 start period" bitfld.long 0x0 14.--15. " DI1_CST_0 ,DI1 Chip Select pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 4.--8. " DI1_SERIAL_VALID_BITS_0 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0 2.--3. " DI1_SERIAL_RS_0 ,DI1 Serial RS" "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI1_SERIAL_CLK_0 ,DI1 serial clock" "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " line.long 0x4 "DI1_DW_GEN_1 ,DI1 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI1_SERIAL_PERIOD_1 ,DI1 Serial Period 1 " hexmask.long.byte 0x4 16.--23. 1. " DI1_START_PERIOD_1 ,DI1 start period" bitfld.long 0x4 14.--15. " DI1_CST_1 ,DI1 Chip Select pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 4.--8. " DI1_SERIAL_VALID_BITS_1 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4 2.--3. " DI1_SERIAL_RS_1 ,DI1 Serial RS" "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI1_SERIAL_CLK_1 ,DI1 serial clock" "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " line.long 0x8 "DI1_DW_GEN_2 ,DI1 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI1_SERIAL_PERIOD_2 ,DI1 Serial Period 2 " hexmask.long.byte 0x8 16.--23. 1. " DI1_START_PERIOD_2 ,DI1 start period" bitfld.long 0x8 14.--15. " DI1_CST_2 ,DI1 Chip Select pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 4.--8. " DI1_SERIAL_VALID_BITS_2 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x8 2.--3. " DI1_SERIAL_RS_2 ,DI1 Serial RS" "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI1_SERIAL_CLK_2 ,DI1 serial clock" "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " line.long 0xC "DI1_DW_GEN_3 ,DI1 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI1_SERIAL_PERIOD_3 ,DI1 Serial Period 3 " hexmask.long.byte 0xC 16.--23. 1. " DI1_START_PERIOD_3 ,DI1 start period" bitfld.long 0xC 14.--15. " DI1_CST_3 ,DI1 Chip Select pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 4.--8. " DI1_SERIAL_VALID_BITS_3 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0xC 2.--3. " DI1_SERIAL_RS_3 ,DI1 Serial RS" "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI1_SERIAL_CLK_3 ,DI1 serial clock" "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " line.long 0x10 "DI1_DW_GEN_4 ,DI1 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI1_SERIAL_PERIOD_4 ,DI1 Serial Period 4 " hexmask.long.byte 0x10 16.--23. 1. " DI1_START_PERIOD_4 ,DI1 start period" bitfld.long 0x10 14.--15. " DI1_CST_4 ,DI1 Chip Select pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 4.--8. " DI1_SERIAL_VALID_BITS_4 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 2.--3. " DI1_SERIAL_RS_4 ,DI1 Serial RS" "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI1_SERIAL_CLK_4 ,DI1 serial clock" "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " line.long 0x14 "DI1_DW_GEN_5 ,DI1 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI1_SERIAL_PERIOD_5 ,DI1 Serial Period 5 " hexmask.long.byte 0x14 16.--23. 1. " DI1_START_PERIOD_5 ,DI1 start period" bitfld.long 0x14 14.--15. " DI1_CST_5 ,DI1 Chip Select pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 4.--8. " DI1_SERIAL_VALID_BITS_5 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 2.--3. " DI1_SERIAL_RS_5 ,DI1 Serial RS" "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI1_SERIAL_CLK_5 ,DI1 serial clock" "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " line.long 0x18 "DI1_DW_GEN_6 ,DI1 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI1_SERIAL_PERIOD_6 ,DI1 Serial Period 6 " hexmask.long.byte 0x18 16.--23. 1. " DI1_START_PERIOD_6 ,DI1 start period" bitfld.long 0x18 14.--15. " DI1_CST_6 ,DI1 Chip Select pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 4.--8. " DI1_SERIAL_VALID_BITS_6 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 2.--3. " DI1_SERIAL_RS_6 ,DI1 Serial RS" "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI1_SERIAL_CLK_6 ,DI1 serial clock" "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " line.long 0x1C "DI1_DW_GEN_7 ,DI1 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI1_SERIAL_PERIOD_7 ,DI1 Serial Period 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI1_START_PERIOD_7 ,DI1 start period" bitfld.long 0x1C 14.--15. " DI1_CST_7 ,DI1 Chip Select pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 4.--8. " DI1_SERIAL_VALID_BITS_7 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 2.--3. " DI1_SERIAL_RS_7 ,DI1 Serial RS" "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI1_SERIAL_CLK_7 ,DI1 serial clock" "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " line.long 0x20 "DI1_DW_GEN_8 ,DI1 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI1_SERIAL_PERIOD_8 ,DI1 Serial Period 8 " hexmask.long.byte 0x20 16.--23. 1. " DI1_START_PERIOD_8 ,DI1 start period" bitfld.long 0x20 14.--15. " DI1_CST_8 ,DI1 Chip Select pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 4.--8. " DI1_SERIAL_VALID_BITS_8 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 2.--3. " DI1_SERIAL_RS_8 ,DI1 Serial RS" "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI1_SERIAL_CLK_8 ,DI1 serial clock" "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " line.long 0x24 "DI1_DW_GEN_9 ,DI1 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI1_SERIAL_PERIOD_9 ,DI1 Serial Period 9 " hexmask.long.byte 0x24 16.--23. 1. " DI1_START_PERIOD_9 ,DI1 start period" bitfld.long 0x24 14.--15. " DI1_CST_9 ,DI1 Chip Select pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 4.--8. " DI1_SERIAL_VALID_BITS_9 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 2.--3. " DI1_SERIAL_RS_9 ,DI1 Serial RS" "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI1_SERIAL_CLK_9 ,DI1 serial clock" "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " line.long 0x28 "DI1_DW_GEN_10,DI1 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI1_SERIAL_PERIOD_10 ,DI1 Serial Period 10" hexmask.long.byte 0x28 16.--23. 1. " DI1_START_PERIOD_10 ,DI1 start period" bitfld.long 0x28 14.--15. " DI1_CST_10 ,DI1 Chip Select pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 4.--8. " DI1_SERIAL_VALID_BITS_10 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 2.--3. " DI1_SERIAL_RS_10 ,DI1 Serial RS" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 0.--1. " DI1_SERIAL_CLK_10 ,DI1 serial clock" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" line.long 0x2C "DI1_DW_GEN_11,DI1 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI1_SERIAL_PERIOD_11 ,DI1 Serial Period 11" hexmask.long.byte 0x2C 16.--23. 1. " DI1_START_PERIOD_11 ,DI1 start period" bitfld.long 0x2C 14.--15. " DI1_CST_11 ,DI1 Chip Select pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 4.--8. " DI1_SERIAL_VALID_BITS_11 ,DI1 Serial valid bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 2.--3. " DI1_SERIAL_RS_11 ,DI1 Serial RS" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI1_SERIAL_CLK_11 ,DI1 serial clock" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" tree.end tree "DI1_DW_GEN 0-11 (Parallel display)" group.long 0x58++0x2f line.long 0x0 "DI1_DW_GEN_0 ,DI1 Data Wave Gen 0 Registers" hexmask.long.byte 0x0 24.--31. 1. " DI1_ACCESS_SIZE_0 ,DI1 Access Size 0 " hexmask.long.byte 0x0 16.--23. 1. " DI1_COMPONENT_SIZE_0 ,DI1 component Size" bitfld.long 0x0 14.--15. " DI1_CST_0 ,DI1 Chip Select pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 12.--13. " DI1_PT_6_0 ,DI1 PIN_17 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " textline " " bitfld.long 0x0 10.--11. " DI1_PT_5_0 ,DI1 PIN_16 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 8.--9. " DI1_PT_4_0 ,DI1 PIN_15 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 6.--7. " DI1_PT_3_0 ,DI1 PIN_14 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 4.--5. " DI1_PT_2_0 ,DI1 PIN_13 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " textline " " bitfld.long 0x0 2.--3. " DI1_PT_1_0 ,DI1 PIN_12 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " bitfld.long 0x0 0.--1. " DI1_PT_0_0 ,DI1 PIN_11 pointer for waveform 0 " "DI1_DW_SET0_0 ,DI1_DW_SET1_0 ,DI1_DW_SET2_0 ,DI1_DW_SET3_0 " line.long 0x4 "DI1_DW_GEN_1 ,DI1 Data Wave Gen 1 Registers" hexmask.long.byte 0x4 24.--31. 1. " DI1_ACCESS_SIZE_1 ,DI1 Access Size 1 " hexmask.long.byte 0x4 16.--23. 1. " DI1_COMPONENT_SIZE_1 ,DI1 component Size" bitfld.long 0x4 14.--15. " DI1_CST_1 ,DI1 Chip Select pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 12.--13. " DI1_PT_6_1 ,DI1 PIN_17 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " textline " " bitfld.long 0x4 10.--11. " DI1_PT_5_1 ,DI1 PIN_16 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 8.--9. " DI1_PT_4_1 ,DI1 PIN_15 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 6.--7. " DI1_PT_3_1 ,DI1 PIN_14 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 4.--5. " DI1_PT_2_1 ,DI1 PIN_13 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " textline " " bitfld.long 0x4 2.--3. " DI1_PT_1_1 ,DI1 PIN_12 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " bitfld.long 0x4 0.--1. " DI1_PT_0_1 ,DI1 PIN_11 pointer for waveform 1 " "DI1_DW_SET0_1 ,DI1_DW_SET1_1 ,DI1_DW_SET2_1 ,DI1_DW_SET3_1 " line.long 0x8 "DI1_DW_GEN_2 ,DI1 Data Wave Gen 2 Registers" hexmask.long.byte 0x8 24.--31. 1. " DI1_ACCESS_SIZE_2 ,DI1 Access Size 2 " hexmask.long.byte 0x8 16.--23. 1. " DI1_COMPONENT_SIZE_2 ,DI1 component Size" bitfld.long 0x8 14.--15. " DI1_CST_2 ,DI1 Chip Select pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 12.--13. " DI1_PT_6_2 ,DI1 PIN_17 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " textline " " bitfld.long 0x8 10.--11. " DI1_PT_5_2 ,DI1 PIN_16 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 8.--9. " DI1_PT_4_2 ,DI1 PIN_15 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 6.--7. " DI1_PT_3_2 ,DI1 PIN_14 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 4.--5. " DI1_PT_2_2 ,DI1 PIN_13 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " textline " " bitfld.long 0x8 2.--3. " DI1_PT_1_2 ,DI1 PIN_12 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " bitfld.long 0x8 0.--1. " DI1_PT_0_2 ,DI1 PIN_11 pointer for waveform 2 " "DI1_DW_SET0_2 ,DI1_DW_SET1_2 ,DI1_DW_SET2_2 ,DI1_DW_SET3_2 " line.long 0xC "DI1_DW_GEN_3 ,DI1 Data Wave Gen 3 Registers" hexmask.long.byte 0xC 24.--31. 1. " DI1_ACCESS_SIZE_3 ,DI1 Access Size 3 " hexmask.long.byte 0xC 16.--23. 1. " DI1_COMPONENT_SIZE_3 ,DI1 component Size" bitfld.long 0xC 14.--15. " DI1_CST_3 ,DI1 Chip Select pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 12.--13. " DI1_PT_6_3 ,DI1 PIN_17 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " textline " " bitfld.long 0xC 10.--11. " DI1_PT_5_3 ,DI1 PIN_16 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 8.--9. " DI1_PT_4_3 ,DI1 PIN_15 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 6.--7. " DI1_PT_3_3 ,DI1 PIN_14 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 4.--5. " DI1_PT_2_3 ,DI1 PIN_13 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " textline " " bitfld.long 0xC 2.--3. " DI1_PT_1_3 ,DI1 PIN_12 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " bitfld.long 0xC 0.--1. " DI1_PT_0_3 ,DI1 PIN_11 pointer for waveform 3 " "DI1_DW_SET0_3 ,DI1_DW_SET1_3 ,DI1_DW_SET2_3 ,DI1_DW_SET3_3 " line.long 0x10 "DI1_DW_GEN_4 ,DI1 Data Wave Gen 4 Registers" hexmask.long.byte 0x10 24.--31. 1. " DI1_ACCESS_SIZE_4 ,DI1 Access Size 4 " hexmask.long.byte 0x10 16.--23. 1. " DI1_COMPONENT_SIZE_4 ,DI1 component Size" bitfld.long 0x10 14.--15. " DI1_CST_4 ,DI1 Chip Select pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 12.--13. " DI1_PT_6_4 ,DI1 PIN_17 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " textline " " bitfld.long 0x10 10.--11. " DI1_PT_5_4 ,DI1 PIN_16 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 8.--9. " DI1_PT_4_4 ,DI1 PIN_15 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 6.--7. " DI1_PT_3_4 ,DI1 PIN_14 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 4.--5. " DI1_PT_2_4 ,DI1 PIN_13 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " textline " " bitfld.long 0x10 2.--3. " DI1_PT_1_4 ,DI1 PIN_12 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " bitfld.long 0x10 0.--1. " DI1_PT_0_4 ,DI1 PIN_11 pointer for waveform 4 " "DI1_DW_SET0_4 ,DI1_DW_SET1_4 ,DI1_DW_SET2_4 ,DI1_DW_SET3_4 " line.long 0x14 "DI1_DW_GEN_5 ,DI1 Data Wave Gen 5 Registers" hexmask.long.byte 0x14 24.--31. 1. " DI1_ACCESS_SIZE_5 ,DI1 Access Size 5 " hexmask.long.byte 0x14 16.--23. 1. " DI1_COMPONENT_SIZE_5 ,DI1 component Size" bitfld.long 0x14 14.--15. " DI1_CST_5 ,DI1 Chip Select pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 12.--13. " DI1_PT_6_5 ,DI1 PIN_17 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " textline " " bitfld.long 0x14 10.--11. " DI1_PT_5_5 ,DI1 PIN_16 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 8.--9. " DI1_PT_4_5 ,DI1 PIN_15 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 6.--7. " DI1_PT_3_5 ,DI1 PIN_14 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 4.--5. " DI1_PT_2_5 ,DI1 PIN_13 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " textline " " bitfld.long 0x14 2.--3. " DI1_PT_1_5 ,DI1 PIN_12 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " bitfld.long 0x14 0.--1. " DI1_PT_0_5 ,DI1 PIN_11 pointer for waveform 5 " "DI1_DW_SET0_5 ,DI1_DW_SET1_5 ,DI1_DW_SET2_5 ,DI1_DW_SET3_5 " line.long 0x18 "DI1_DW_GEN_6 ,DI1 Data Wave Gen 6 Registers" hexmask.long.byte 0x18 24.--31. 1. " DI1_ACCESS_SIZE_6 ,DI1 Access Size 6 " hexmask.long.byte 0x18 16.--23. 1. " DI1_COMPONENT_SIZE_6 ,DI1 component Size" bitfld.long 0x18 14.--15. " DI1_CST_6 ,DI1 Chip Select pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 12.--13. " DI1_PT_6_6 ,DI1 PIN_17 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " textline " " bitfld.long 0x18 10.--11. " DI1_PT_5_6 ,DI1 PIN_16 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 8.--9. " DI1_PT_4_6 ,DI1 PIN_15 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 6.--7. " DI1_PT_3_6 ,DI1 PIN_14 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 4.--5. " DI1_PT_2_6 ,DI1 PIN_13 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " textline " " bitfld.long 0x18 2.--3. " DI1_PT_1_6 ,DI1 PIN_12 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " bitfld.long 0x18 0.--1. " DI1_PT_0_6 ,DI1 PIN_11 pointer for waveform 6 " "DI1_DW_SET0_6 ,DI1_DW_SET1_6 ,DI1_DW_SET2_6 ,DI1_DW_SET3_6 " line.long 0x1C "DI1_DW_GEN_7 ,DI1 Data Wave Gen 7 Registers" hexmask.long.byte 0x1C 24.--31. 1. " DI1_ACCESS_SIZE_7 ,DI1 Access Size 7 " hexmask.long.byte 0x1C 16.--23. 1. " DI1_COMPONENT_SIZE_7 ,DI1 component Size" bitfld.long 0x1C 14.--15. " DI1_CST_7 ,DI1 Chip Select pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 12.--13. " DI1_PT_6_7 ,DI1 PIN_17 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " textline " " bitfld.long 0x1C 10.--11. " DI1_PT_5_7 ,DI1 PIN_16 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 8.--9. " DI1_PT_4_7 ,DI1 PIN_15 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 6.--7. " DI1_PT_3_7 ,DI1 PIN_14 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 4.--5. " DI1_PT_2_7 ,DI1 PIN_13 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " textline " " bitfld.long 0x1C 2.--3. " DI1_PT_1_7 ,DI1 PIN_12 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " bitfld.long 0x1C 0.--1. " DI1_PT_0_7 ,DI1 PIN_11 pointer for waveform 7 " "DI1_DW_SET0_7 ,DI1_DW_SET1_7 ,DI1_DW_SET2_7 ,DI1_DW_SET3_7 " line.long 0x20 "DI1_DW_GEN_8 ,DI1 Data Wave Gen 8 Registers" hexmask.long.byte 0x20 24.--31. 1. " DI1_ACCESS_SIZE_8 ,DI1 Access Size 8 " hexmask.long.byte 0x20 16.--23. 1. " DI1_COMPONENT_SIZE_8 ,DI1 component Size" bitfld.long 0x20 14.--15. " DI1_CST_8 ,DI1 Chip Select pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 12.--13. " DI1_PT_6_8 ,DI1 PIN_17 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " textline " " bitfld.long 0x20 10.--11. " DI1_PT_5_8 ,DI1 PIN_16 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 8.--9. " DI1_PT_4_8 ,DI1 PIN_15 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 6.--7. " DI1_PT_3_8 ,DI1 PIN_14 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 4.--5. " DI1_PT_2_8 ,DI1 PIN_13 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " textline " " bitfld.long 0x20 2.--3. " DI1_PT_1_8 ,DI1 PIN_12 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " bitfld.long 0x20 0.--1. " DI1_PT_0_8 ,DI1 PIN_11 pointer for waveform 8 " "DI1_DW_SET0_8 ,DI1_DW_SET1_8 ,DI1_DW_SET2_8 ,DI1_DW_SET3_8 " line.long 0x24 "DI1_DW_GEN_9 ,DI1 Data Wave Gen 9 Registers" hexmask.long.byte 0x24 24.--31. 1. " DI1_ACCESS_SIZE_9 ,DI1 Access Size 9 " hexmask.long.byte 0x24 16.--23. 1. " DI1_COMPONENT_SIZE_9 ,DI1 component Size" bitfld.long 0x24 14.--15. " DI1_CST_9 ,DI1 Chip Select pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 12.--13. " DI1_PT_6_9 ,DI1 PIN_17 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " textline " " bitfld.long 0x24 10.--11. " DI1_PT_5_9 ,DI1 PIN_16 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 8.--9. " DI1_PT_4_9 ,DI1 PIN_15 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 6.--7. " DI1_PT_3_9 ,DI1 PIN_14 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 4.--5. " DI1_PT_2_9 ,DI1 PIN_13 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " textline " " bitfld.long 0x24 2.--3. " DI1_PT_1_9 ,DI1 PIN_12 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " bitfld.long 0x24 0.--1. " DI1_PT_0_9 ,DI1 PIN_11 pointer for waveform 9 " "DI1_DW_SET0_9 ,DI1_DW_SET1_9 ,DI1_DW_SET2_9 ,DI1_DW_SET3_9 " line.long 0x28 "DI1_DW_GEN_10,DI1 Data Wave Gen 10 Registers" hexmask.long.byte 0x28 24.--31. 1. " DI1_ACCESS_SIZE_10 ,DI1 Access Size 10" hexmask.long.byte 0x28 16.--23. 1. " DI1_COMPONENT_SIZE_10 ,DI1 component Size" bitfld.long 0x28 14.--15. " DI1_CST_10 ,DI1 Chip Select pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 12.--13. " DI1_PT_6_10 ,DI1 PIN_17 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" textline " " bitfld.long 0x28 10.--11. " DI1_PT_5_10 ,DI1 PIN_16 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 8.--9. " DI1_PT_4_10 ,DI1 PIN_15 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 6.--7. " DI1_PT_3_10 ,DI1 PIN_14 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 4.--5. " DI1_PT_2_10 ,DI1 PIN_13 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" textline " " bitfld.long 0x28 2.--3. " DI1_PT_1_10 ,DI1 PIN_12 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" bitfld.long 0x28 0.--1. " DI1_PT_0_10 ,DI1 PIN_11 pointer for waveform 10" "DI1_DW_SET0_10,DI1_DW_SET1_10,DI1_DW_SET2_10,DI1_DW_SET3_10" line.long 0x2C "DI1_DW_GEN_11,DI1 Data Wave Gen 11 Registers" hexmask.long.byte 0x2C 24.--31. 1. " DI1_ACCESS_SIZE_11 ,DI1 Access Size 11" hexmask.long.byte 0x2C 16.--23. 1. " DI1_COMPONENT_SIZE_11 ,DI1 component Size" bitfld.long 0x2C 14.--15. " DI1_CST_11 ,DI1 Chip Select pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 12.--13. " DI1_PT_6_11 ,DI1 PIN_17 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" textline " " bitfld.long 0x2C 10.--11. " DI1_PT_5_11 ,DI1 PIN_16 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 8.--9. " DI1_PT_4_11 ,DI1 PIN_15 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 6.--7. " DI1_PT_3_11 ,DI1 PIN_14 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 4.--5. " DI1_PT_2_11 ,DI1 PIN_13 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" textline " " bitfld.long 0x2C 2.--3. " DI1_PT_1_11 ,DI1 PIN_12 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" bitfld.long 0x2C 0.--1. " DI1_PT_0_11 ,DI1 PIN_11 pointer for waveform 11" "DI1_DW_SET0_11,DI1_DW_SET1_11,DI1_DW_SET2_11,DI1_DW_SET3_11" tree.end textline " " group.long 0x88++0xeb line.long 0x0 "DI1_DW_SET0_0 ,DI1 Data Wave Set 0 0 Registers" hexmask.long.word 0x0 16.--24. 1. " DI1_DATA_CNT_DOWN0_0 ,Waveform's falling edge position" hexmask.long.word 0x0 0.--8. 1. " DI1_DATA_CNT_UP0_0 ,Waveform's rising edge position" line.long 0x4 "DI1_DW_SET0_1 ,DI1 Data Wave Set 0 1 Registers" hexmask.long.word 0x4 16.--24. 1. " DI1_DATA_CNT_DOWN0_1 ,Waveform's falling edge position" hexmask.long.word 0x4 0.--8. 1. " DI1_DATA_CNT_UP0_1 ,Waveform's rising edge position" line.long 0x8 "DI1_DW_SET0_2 ,DI1 Data Wave Set 0 2 Registers" hexmask.long.word 0x8 16.--24. 1. " DI1_DATA_CNT_DOWN0_2 ,Waveform's falling edge position" hexmask.long.word 0x8 0.--8. 1. " DI1_DATA_CNT_UP0_2 ,Waveform's rising edge position" line.long 0xC "DI1_DW_SET0_3 ,DI1 Data Wave Set 0 3 Registers" hexmask.long.word 0xC 16.--24. 1. " DI1_DATA_CNT_DOWN0_3 ,Waveform's falling edge position" hexmask.long.word 0xC 0.--8. 1. " DI1_DATA_CNT_UP0_3 ,Waveform's rising edge position" line.long 0x10 "DI1_DW_SET0_4 ,DI1 Data Wave Set 0 4 Registers" hexmask.long.word 0x10 16.--24. 1. " DI1_DATA_CNT_DOWN0_4 ,Waveform's falling edge position" hexmask.long.word 0x10 0.--8. 1. " DI1_DATA_CNT_UP0_4 ,Waveform's rising edge position" line.long 0x14 "DI1_DW_SET0_5 ,DI1 Data Wave Set 0 5 Registers" hexmask.long.word 0x14 16.--24. 1. " DI1_DATA_CNT_DOWN0_5 ,Waveform's falling edge position" hexmask.long.word 0x14 0.--8. 1. " DI1_DATA_CNT_UP0_5 ,Waveform's rising edge position" line.long 0x18 "DI1_DW_SET0_6 ,DI1 Data Wave Set 0 6 Registers" hexmask.long.word 0x18 16.--24. 1. " DI1_DATA_CNT_DOWN0_6 ,Waveform's falling edge position" hexmask.long.word 0x18 0.--8. 1. " DI1_DATA_CNT_UP0_6 ,Waveform's rising edge position" line.long 0x1C "DI1_DW_SET0_7 ,DI1 Data Wave Set 0 7 Registers" hexmask.long.word 0x1C 16.--24. 1. " DI1_DATA_CNT_DOWN0_7 ,Waveform's falling edge position" hexmask.long.word 0x1C 0.--8. 1. " DI1_DATA_CNT_UP0_7 ,Waveform's rising edge position" line.long 0x20 "DI1_DW_SET0_8 ,DI1 Data Wave Set 0 8 Registers" hexmask.long.word 0x20 16.--24. 1. " DI1_DATA_CNT_DOWN0_8 ,Waveform's falling edge position" hexmask.long.word 0x20 0.--8. 1. " DI1_DATA_CNT_UP0_8 ,Waveform's rising edge position" line.long 0x24 "DI1_DW_SET0_9 ,DI1 Data Wave Set 0 9 Registers" hexmask.long.word 0x24 16.--24. 1. " DI1_DATA_CNT_DOWN0_9 ,Waveform's falling edge position" hexmask.long.word 0x24 0.--8. 1. " DI1_DATA_CNT_UP0_9 ,Waveform's rising edge position" line.long 0x28 "DI1_DW_SET0_10,DI1 Data Wave Set 0 10 Registers" hexmask.long.word 0x28 16.--24. 1. " DI1_DATA_CNT_DOWN0_10 ,Waveform's falling edge position" hexmask.long.word 0x28 0.--8. 1. " DI1_DATA_CNT_UP0_10 ,Waveform's rising edge position" line.long 0x2C "DI1_DW_SET0_11,DI1 Data Wave Set 0 11 Registers" hexmask.long.word 0x2C 16.--24. 1. " DI1_DATA_CNT_DOWN0_11 ,Waveform's falling edge position" hexmask.long.word 0x2C 0.--8. 1. " DI1_DATA_CNT_UP0_11 ,Waveform's rising edge position" line.long 0x30 "DI1_DW_SET1_0 ,DI1 Data Wave Set 1 0 Registers" hexmask.long.word 0x30 16.--24. 1. " DI1_DATA_CNT_DOWN1_0 ,Waveform's falling edge position" hexmask.long.word 0x30 0.--8. 1. " DI1_DATA_CNT_UP1_0 ,Waveform's rising edge position" line.long 0x34 "DI1_DW_SET1_1 ,DI1 Data Wave Set 1 1 Registers" hexmask.long.word 0x34 16.--24. 1. " DI1_DATA_CNT_DOWN1_1 ,Waveform's falling edge position" hexmask.long.word 0x34 0.--8. 1. " DI1_DATA_CNT_UP1_1 ,Waveform's rising edge position" line.long 0x38 "DI1_DW_SET1_2 ,DI1 Data Wave Set 1 2 Registers" hexmask.long.word 0x38 16.--24. 1. " DI1_DATA_CNT_DOWN1_2 ,Waveform's falling edge position" hexmask.long.word 0x38 0.--8. 1. " DI1_DATA_CNT_UP1_2 ,Waveform's rising edge position" line.long 0x3C "DI1_DW_SET1_3 ,DI1 Data Wave Set 1 3 Registers" hexmask.long.word 0x3C 16.--24. 1. " DI1_DATA_CNT_DOWN1_3 ,Waveform's falling edge position" hexmask.long.word 0x3C 0.--8. 1. " DI1_DATA_CNT_UP1_3 ,Waveform's rising edge position" line.long 0x40 "DI1_DW_SET1_4 ,DI1 Data Wave Set 1 4 Registers" hexmask.long.word 0x40 16.--24. 1. " DI1_DATA_CNT_DOWN1_4 ,Waveform's falling edge position" hexmask.long.word 0x40 0.--8. 1. " DI1_DATA_CNT_UP1_4 ,Waveform's rising edge position" line.long 0x44 "DI1_DW_SET1_5 ,DI1 Data Wave Set 1 5 Registers" hexmask.long.word 0x44 16.--24. 1. " DI1_DATA_CNT_DOWN1_5 ,Waveform's falling edge position" hexmask.long.word 0x44 0.--8. 1. " DI1_DATA_CNT_UP1_5 ,Waveform's rising edge position" line.long 0x48 "DI1_DW_SET1_6 ,DI1 Data Wave Set 1 6 Registers" hexmask.long.word 0x48 16.--24. 1. " DI1_DATA_CNT_DOWN1_6 ,Waveform's falling edge position" hexmask.long.word 0x48 0.--8. 1. " DI1_DATA_CNT_UP1_6 ,Waveform's rising edge position" line.long 0x4C "DI1_DW_SET1_7 ,DI1 Data Wave Set 1 7 Registers" hexmask.long.word 0x4C 16.--24. 1. " DI1_DATA_CNT_DOWN1_7 ,Waveform's falling edge position" hexmask.long.word 0x4C 0.--8. 1. " DI1_DATA_CNT_UP1_7 ,Waveform's rising edge position" line.long 0x50 "DI1_DW_SET1_8 ,DI1 Data Wave Set 1 8 Registers" hexmask.long.word 0x50 16.--24. 1. " DI1_DATA_CNT_DOWN1_8 ,Waveform's falling edge position" hexmask.long.word 0x50 0.--8. 1. " DI1_DATA_CNT_UP1_8 ,Waveform's rising edge position" line.long 0x54 "DI1_DW_SET1_9 ,DI1 Data Wave Set 1 9 Registers" hexmask.long.word 0x54 16.--24. 1. " DI1_DATA_CNT_DOWN1_9 ,Waveform's falling edge position" hexmask.long.word 0x54 0.--8. 1. " DI1_DATA_CNT_UP1_9 ,Waveform's rising edge position" line.long 0x58 "DI1_DW_SET1_10,DI1 Data Wave Set 1 10 Registers" hexmask.long.word 0x58 16.--24. 1. " DI1_DATA_CNT_DOWN1_10 ,Waveform's falling edge position" hexmask.long.word 0x58 0.--8. 1. " DI1_DATA_CNT_UP1_10 ,Waveform's rising edge position" line.long 0x5C "DI1_DW_SET1_11,DI1 Data Wave Set 1 11 Registers" hexmask.long.word 0x5C 16.--24. 1. " DI1_DATA_CNT_DOWN1_11 ,Waveform's falling edge position" hexmask.long.word 0x5C 0.--8. 1. " DI1_DATA_CNT_UP1_11 ,Waveform's rising edge position" line.long 0x60 "DI1_DW_SET2_0 ,DI1 Data Wave Set 2 0 Registers" hexmask.long.word 0x60 16.--24. 1. " DI1_DATA_CNT_DOWN2_0 ,Waveform's falling edge position" hexmask.long.word 0x60 0.--8. 1. " DI1_DATA_CNT_UP2_0 ,Waveform's rising edge position" line.long 0x64 "DI1_DW_SET2_1 ,DI1 Data Wave Set 2 1 Registers" hexmask.long.word 0x64 16.--24. 1. " DI1_DATA_CNT_DOWN2_1 ,Waveform's falling edge position" hexmask.long.word 0x64 0.--8. 1. " DI1_DATA_CNT_UP2_1 ,Waveform's rising edge position" line.long 0x68 "DI1_DW_SET2_2 ,DI1 Data Wave Set 2 2 Registers" hexmask.long.word 0x68 16.--24. 1. " DI1_DATA_CNT_DOWN2_2 ,Waveform's falling edge position" hexmask.long.word 0x68 0.--8. 1. " DI1_DATA_CNT_UP2_2 ,Waveform's rising edge position" line.long 0x6C "DI1_DW_SET2_3 ,DI1 Data Wave Set 2 3 Registers" hexmask.long.word 0x6C 16.--24. 1. " DI1_DATA_CNT_DOWN2_3 ,Waveform's falling edge position" hexmask.long.word 0x6C 0.--8. 1. " DI1_DATA_CNT_UP2_3 ,Waveform's rising edge position" line.long 0x70 "DI1_DW_SET2_4 ,DI1 Data Wave Set 2 4 Registers" hexmask.long.word 0x70 16.--24. 1. " DI1_DATA_CNT_DOWN2_4 ,Waveform's falling edge position" hexmask.long.word 0x70 0.--8. 1. " DI1_DATA_CNT_UP2_4 ,Waveform's rising edge position" line.long 0x74 "DI1_DW_SET2_5 ,DI1 Data Wave Set 2 5 Registers" hexmask.long.word 0x74 16.--24. 1. " DI1_DATA_CNT_DOWN2_5 ,Waveform's falling edge position" hexmask.long.word 0x74 0.--8. 1. " DI1_DATA_CNT_UP2_5 ,Waveform's rising edge position" line.long 0x78 "DI1_DW_SET2_6 ,DI1 Data Wave Set 2 6 Registers" hexmask.long.word 0x78 16.--24. 1. " DI1_DATA_CNT_DOWN2_6 ,Waveform's falling edge position" hexmask.long.word 0x78 0.--8. 1. " DI1_DATA_CNT_UP2_6 ,Waveform's rising edge position" line.long 0x7C "DI1_DW_SET2_7 ,DI1 Data Wave Set 2 7 Registers" hexmask.long.word 0x7C 16.--24. 1. " DI1_DATA_CNT_DOWN2_7 ,Waveform's falling edge position" hexmask.long.word 0x7C 0.--8. 1. " DI1_DATA_CNT_UP2_7 ,Waveform's rising edge position" line.long 0x80 "DI1_DW_SET2_8 ,DI1 Data Wave Set 2 8 Registers" hexmask.long.word 0x80 16.--24. 1. " DI1_DATA_CNT_DOWN2_8 ,Waveform's falling edge position" hexmask.long.word 0x80 0.--8. 1. " DI1_DATA_CNT_UP2_8 ,Waveform's rising edge position" line.long 0x84 "DI1_DW_SET2_9 ,DI1 Data Wave Set 2 9 Registers" hexmask.long.word 0x84 16.--24. 1. " DI1_DATA_CNT_DOWN2_9 ,Waveform's falling edge position" hexmask.long.word 0x84 0.--8. 1. " DI1_DATA_CNT_UP2_9 ,Waveform's rising edge position" line.long 0x88 "DI1_DW_SET2_10,DI1 Data Wave Set 2 10 Registers" hexmask.long.word 0x88 16.--24. 1. " DI1_DATA_CNT_DOWN2_10 ,Waveform's falling edge position" hexmask.long.word 0x88 0.--8. 1. " DI1_DATA_CNT_UP2_10 ,Waveform's rising edge position" line.long 0x8C "DI1_DW_SET2_11,DI1 Data Wave Set 2 11 Registers" hexmask.long.word 0x8C 16.--24. 1. " DI1_DATA_CNT_DOWN2_11 ,Waveform's falling edge position" hexmask.long.word 0x8C 0.--8. 1. " DI1_DATA_CNT_UP2_11 ,Waveform's rising edge position" line.long 0x90 "DI1_DW_SET3_0 ,DI1 Data Wave Set 3 0 Registers" hexmask.long.word 0x90 16.--24. 1. " DI1_DATA_CNT_DOWN3_0 ,Waveform's falling edge position" hexmask.long.word 0x90 0.--8. 1. " DI1_DATA_CNT_UP3_0 ,Waveform's rising edge position" line.long 0x94 "DI1_DW_SET3_1 ,DI1 Data Wave Set 3 1 Registers" hexmask.long.word 0x94 16.--24. 1. " DI1_DATA_CNT_DOWN3_1 ,Waveform's falling edge position" hexmask.long.word 0x94 0.--8. 1. " DI1_DATA_CNT_UP3_1 ,Waveform's rising edge position" line.long 0x98 "DI1_DW_SET3_2 ,DI1 Data Wave Set 3 2 Registers" hexmask.long.word 0x98 16.--24. 1. " DI1_DATA_CNT_DOWN3_2 ,Waveform's falling edge position" hexmask.long.word 0x98 0.--8. 1. " DI1_DATA_CNT_UP3_2 ,Waveform's rising edge position" line.long 0x9C "DI1_DW_SET3_3 ,DI1 Data Wave Set 3 3 Registers" hexmask.long.word 0x9C 16.--24. 1. " DI1_DATA_CNT_DOWN3_3 ,Waveform's falling edge position" hexmask.long.word 0x9C 0.--8. 1. " DI1_DATA_CNT_UP3_3 ,Waveform's rising edge position" line.long 0xA0 "DI1_DW_SET3_4 ,DI1 Data Wave Set 3 4 Registers" hexmask.long.word 0xA0 16.--24. 1. " DI1_DATA_CNT_DOWN3_4 ,Waveform's falling edge position" hexmask.long.word 0xA0 0.--8. 1. " DI1_DATA_CNT_UP3_4 ,Waveform's rising edge position" line.long 0xA4 "DI1_DW_SET3_5 ,DI1 Data Wave Set 3 5 Registers" hexmask.long.word 0xA4 16.--24. 1. " DI1_DATA_CNT_DOWN3_5 ,Waveform's falling edge position" hexmask.long.word 0xA4 0.--8. 1. " DI1_DATA_CNT_UP3_5 ,Waveform's rising edge position" line.long 0xA8 "DI1_DW_SET3_6 ,DI1 Data Wave Set 3 6 Registers" hexmask.long.word 0xA8 16.--24. 1. " DI1_DATA_CNT_DOWN3_6 ,Waveform's falling edge position" hexmask.long.word 0xA8 0.--8. 1. " DI1_DATA_CNT_UP3_6 ,Waveform's rising edge position" line.long 0xAC "DI1_DW_SET3_7 ,DI1 Data Wave Set 3 7 Registers" hexmask.long.word 0xAC 16.--24. 1. " DI1_DATA_CNT_DOWN3_7 ,Waveform's falling edge position" hexmask.long.word 0xAC 0.--8. 1. " DI1_DATA_CNT_UP3_7 ,Waveform's rising edge position" line.long 0xB0 "DI1_DW_SET3_8 ,DI1 Data Wave Set 3 8 Registers" hexmask.long.word 0xB0 16.--24. 1. " DI1_DATA_CNT_DOWN3_8 ,Waveform's falling edge position" hexmask.long.word 0xB0 0.--8. 1. " DI1_DATA_CNT_UP3_8 ,Waveform's rising edge position" line.long 0xB4 "DI1_DW_SET3_9 ,DI1 Data Wave Set 3 9 Registers" hexmask.long.word 0xB4 16.--24. 1. " DI1_DATA_CNT_DOWN3_9 ,Waveform's falling edge position" hexmask.long.word 0xB4 0.--8. 1. " DI1_DATA_CNT_UP3_9 ,Waveform's rising edge position" line.long 0xB8 "DI1_DW_SET3_10,DI1 Data Wave Set 3 10 Registers" hexmask.long.word 0xB8 16.--24. 1. " DI1_DATA_CNT_DOWN3_10 ,Waveform's falling edge position" hexmask.long.word 0xB8 0.--8. 1. " DI1_DATA_CNT_UP3_10 ,Waveform's rising edge position" line.long 0xBC "DI1_DW_SET3_11,DI1 Data Wave Set 3 11 Registers" hexmask.long.word 0xBC 16.--24. 1. " DI1_DATA_CNT_DOWN3_11 ,Waveform's falling edge position" hexmask.long.word 0xBC 0.--8. 1. " DI1_DATA_CNT_UP3_11 ,Waveform's rising edge position" line.long 0xC0 "DI1_STP_REP_1,DI1 Step Repeat 1 Registers" hexmask.long.word 0xC0 16.--27. 1. " DI1_STEP_REPEAT_1 ,Step Repeat 1" hexmask.long.word 0xC0 0.--11. 1. " DI1_STEP_REPEAT_0 ,Step Repeat 0" line.long 0xC4 "DI1_STP_REP_2,DI1 Step Repeat 2 Registers" hexmask.long.word 0xC4 16.--27. 1. " DI1_STEP_REPEAT_3 ,Step Repeat 3" hexmask.long.word 0xC4 0.--11. 1. " DI1_STEP_REPEAT_2 ,Step Repeat 2" line.long 0xC8 "DI1_STP_REP_3,DI1 Step Repeat 3 Registers" hexmask.long.word 0xC8 16.--27. 1. " DI1_STEP_REPEAT_5 ,Step Repeat 5" hexmask.long.word 0xC8 0.--11. 1. " DI1_STEP_REPEAT_4 ,Step Repeat 4" line.long 0xCC "DI1_STP_REP_4,DI1 Step Repeat 4 Registers" hexmask.long.word 0xCC 16.--27. 1. " DI1_STEP_REPEAT_7 ,Step Repeat 7" hexmask.long.word 0xCC 0.--11. 1. " DI1_STEP_REPEAT_6 ,Step Repeat 6" line.long 0xd0 "DI1_STP_REP_9,DI1 Step Repeat 9 Registers" hexmask.long.word 0xd0 0.--11. 1. " DI1_STEP_REPEAT_9 ,Step Repeat 9" line.long 0xd4 "DI1_SER_CONF,DI1 Serial Display Control Register" bitfld.long 0xd4 28.--31. " DI1_SERIAL_LLA_PNTR_RS_R_1 ,RS 3 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 24.--27. " DI1_SERIAL_LLA_PNTR_RS_R_0 ,RS 2 waveform pointer for read low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0xd4 20.--23. " DI1_SERIAL_LLA_PNTR_RS_W_1 ,RS 1 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." textline " " bitfld.long 0xd4 16.--19. " DI1_SERIAL_LLA_PNTR_RS_W_0 ,RS 0 waveform pointer for write low level access" "1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0xd4 8.--15. 1. " DI1_SERIAL_LATCH ,DI1 Serial Latch" bitfld.long 0xd4 5. " DI1_LLA_SER_ACCESS ,Direct Low Level Access to Serial display" "Disabled,Enabled" textline " " bitfld.long 0xd4 4. " DI1_SER_CLK_POLARITY ,Serial Clock Polarity" "Not inverted,Inverted" bitfld.long 0xd4 3. " DI1_SERIAL_DATA_POLARITY ,Serial Data Polarity" "Not inverted,Inverted" bitfld.long 0xd4 2. " DI1_SERIAL_RS_POLARITY ,Serial RS Polarity" "Not inverted,Inverted" textline " " bitfld.long 0xd4 1. " DI1_SERIAL_CS_POLARITY ,Serial Chip Select Polarity" "Not inverted,Inverted" bitfld.long 0xd4 0. " DI1_WAIT4SERIAL ,Wait for Serial" "Not wait,Wait" line.long 0xd8 "DI1_SSC,DI1 Special Signals Control Register" bitfld.long 0xd8 23. " DI1_PIN17_ERM ,DI1 PIN17 error recovery mode" "No error,Error" bitfld.long 0xd8 22. " DI1_PIN16_ERM ,DI1 PIN16 error recovery mode" "No error,Error" bitfld.long 0xd8 21. " DI1_PIN15_ERM ,DI1 PIN15 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 20. " DI1_PIN14_ERM ,DI1 PIN14 error recovery mode" "No error,Error" bitfld.long 0xd8 19. " DI1_PIN13_ERM ,DI1 PIN13 error recovery mode" "No error,Error" bitfld.long 0xd8 18. " DI1_PIN12_ERM ,DI1 PIN12 error recovery mode" "No error,Error" textline " " bitfld.long 0xd8 17. " DI1_PIN11_ERM ,DI1 PIN11 error recovery mode" "No error,Error" bitfld.long 0xd8 16. " DI1_CS_ERM ,DI1 CS error recovery mode" "No error,Error" bitfld.long 0xd8 5. " DI1_WAIT_ON ,Wait On" "Continued,Held" textline " " bitfld.long 0xd8 4. " DI1_BYTE_EN_POLARITY ,Byte Enable polarity" "Active low,Active high" textline " " bitfld.long 0xd8 3. " DI1_BYTE_EN_RD_IN ,Byte Enable Read In" "R/W [17:16],W [17:16]/R [19:18]" bitfld.long 0xd8 0.--2. " DI1_BYTE_EN_PNTR ,Byte Enable Pointer" "Pin_11,Pin_12,Pin_13,Pin_14,Pin_15,Pin_16,Pin_17,CS pin" line.long 0xdc "DI1_POL,DI1 Polarity Register" bitfld.long 0xdc 26. " DI1_WAIT_POLARITY ,WAIT polarity" "Active low,Active high" bitfld.long 0xdc 25. " DI1_CS1_BYTE_EN_POLARITY ,Byte Enable associated with CS1 polarity" "Active low,Active high" bitfld.long 0xdc 24. " DI1_CS0_BYTE_EN_POLARITY ,Byte Enable associated with CS0 polarity" "Active low,Active high" textline " " bitfld.long 0xdc 23. " DI1_CS1_DATA_POLARITY ,Data Polarity associated with CS1" "Active low,Active high" bitfld.long 0xdc 22. " DI1_CS1_POLARITY_17 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 21. " DI1_CS1_POLARITY_16 ,DI1 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 20. " DI1_CS1_POLARITY_15 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 19. " DI1_CS1_POLARITY_14 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 18. " DI1_CS1_POLARITY_13 ,DI1 output pin's polarity for CS1" "Active low,Active high" textline " " bitfld.long 0xdc 17. " DI1_CS1_POLARITY_12 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 16. " DI1_CS1_POLARITY_11 ,DI1 output pin's polarity for CS1" "Active low,Active high" bitfld.long 0xdc 15. " DI1_CS0_DATA_POLARITY ,Data Polarity associated with CS0" "Active low,Active high" textline " " bitfld.long 0xdc 14. " DI1_CS0_POLARITY_17 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 13. " DI1_CS0_POLARITY_16 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 12. " DI1_CS0_POLARITY_15 ,DI1 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 11. " DI1_CS0_POLARITY_14 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 10. " DI1_CS0_POLARITY_13 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 9. " DI1_CS0_POLARITY_12 ,DI1 output pin's polarity for CS0" "Active low,Active high" textline " " bitfld.long 0xdc 8. " DI1_CS0_POLARITY_11 ,DI1 output pin's polarity for CS0" "Active low,Active high" bitfld.long 0xdc 7. " DI1_DRDY_DATA_POLARITY ,Data Polarity associated with DRDY" "Active low,Active high" bitfld.long 0xdc 6. " DI1_DRDY_POLARITY_17 ,DI1 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 5. " DI1_DRDY_POLARITY_16 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 4. " DI1_DRDY_POLARITY_15 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 3. " DI1_DRDY_POLARITY_14 ,DI1 output pin's polarity for DRDY" "Active low,Active high" textline " " bitfld.long 0xdc 2. " DI1_DRDY_POLARITY_13 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 1. " DI1_DRDY_POLARITY_12 ,DI1 output pin's polarity for DRDY" "Active low,Active high" bitfld.long 0xdc 0. " DI1_DRDY_POLARITY_11 ,DI1 output pin's polarity for DRDY" "Active low,Active high" line.long 0xe0 "DI1_AW0,DI1 Active Window 0 Register" bitfld.long 0xe0 28.--31. " DI1_AW_TRIG_SEL ,Selects the trigger for sending data during the display's active window" "Disabled,The same trig.,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Always on,?..." hexmask.long.word 0xe0 16.--27. 1. " DI1_AW_HEND ,Horizontal end of the active window" bitfld.long 0xe0 12.--15. " DI1_AW_HCOUNT_SEL ,Selects the counter that counts the horizontal position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." textline " " hexmask.long.word 0xe0 0.--11. 1. " DI1_AW_HSTART ,Horizontal start of the active window" line.long 0xe4 "DI1_AW1,DI1 Active Window 1 Register" hexmask.long.word 0xe4 16.--27. 1. " DI1_AW_VEND ,Vertical end of the active window" bitfld.long 0xe4 12.--15. " DI1_AW_VCOUNT_SEL ,Selects the counter that counts the vertical position of the display's active window" "Disabled,,Counter 1,Counter 2,Counter 3,Counter 4,Counter 5,Counter 6,Counter 7,Counter 8,?..." hexmask.long.word 0xe4 0.--11. 1. " DI1_AW_VSTART ,Vertical start of the active window" line.long 0xe8 "DI1_SCR_CONF,DI1 Screen Configuration Register" hexmask.long.word 0xe8 0.--11. 1. " DI1_SCREEN_HEIGHT ,Number of display rows" rgroup.long 0x174++0x03 line.long 0x00 "DI1_STAT,DI1 Status Register" bitfld.long 0x00 3. " DI1_CNTR_FIFO_FULL ,DI1_CNTR_FIFO_FULL" "Not full,Full" bitfld.long 0x00 2. " DI1_CNTR_FIFO_EMPTY ,DI1_CNTR_FIFO_EMPTY" "Not empty,Empty" bitfld.long 0x00 1. " DI1_READ_FIFO_FULL ,DI1_READ_FIFO_FULL" "Not full,Full" textline " " bitfld.long 0x00 0. " DI1_READ_FIFO_EMPTY ,DI1_READ_FIFO_EMPTY" "Not empty,Empty" width 0x0B tree.end tree "SMFC registers" base ad:0x02A50000 width 17. group.long 0x00++0x57 line.long 0x00 "SMFC_MAP,SMFC Mapping Register" bitfld.long 0x00 9.--11. " MAP_CH3 ,DMASMFC channel 3 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" bitfld.long 0x00 6.--8. " MAP_CH2 ,DMASMFC channel 2 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" textline " " bitfld.long 0x00 3.--5. " MAP_CH1 ,DMASMFC channel 1 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" bitfld.long 0x00 0.--2. " MAP_CH0 ,DMASMFC channel 0 mapping bits" "CSI0 ID=0,CSI0 ID=1,CSI0 ID=2,CSI0 ID=3,CSI1 ID=0,CSI1 ID=1,CSI1 ID=2,CSI1 ID=3" line.long 0x04 "SMFC_WMC,SMFC Water Mark Control Register" bitfld.long 0x04 25.--27. " WM3_CLR ,Watermark 'clear' level of DMASMFC channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 22.--24. " WM3_SET ,Watermark 'set' level of DMASMFC channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 19.--21. " WM2_CLR ,Watermark 'clear' level of DMASMFC channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 16.--18. " WM2_SET ,Watermark 'set' level of DMASMFC channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 9.--11. " WM1_CLR ,Watermark 'clear' level of DMASMFC channel 1" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 6.--8. " WM1_SET ,Watermark 'set' level of DMASMFC channel 1" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 3.--5. " WM0_CLR ,Watermark 'clear' level of DMASMFC channel 0" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 0.--2. " WM0_SET ,Watermark 'set' level of DMASMFC channel 0" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" line.long 0x08 "SMFC_BS,SMFC Burst Size Register" bitfld.long 0x08 12.--15. " BURST3_SIZE ,Burst Size of SMFCDMA channel 3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " BURST2_SIZE ,Burst Size of SMFCDMA channel 2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x08 4.--7. " BURST1_SIZE ,Burst Size of SMFCDMA channel 1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 0.--3. " BURST0_SIZE ,Burst Size of SMFCDMA channel 0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" width 0xb tree.end tree "DC registers" base ad:0x02A58000 width 18. tree "Channel 0" group.long 0x00++0x1b line.long 0x00 "DC_READ_CH_CONF,DC Read Channel Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TIME_OUT_VALUE ,Time out value" bitfld.long 0x00 11. " CS_ID_3 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 10. " CS_ID_2 ,Maps an asynchronous display to a chip select" "CS0,CS1" textline " " bitfld.long 0x00 9. " CS_ID_1 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 8. " CS_ID_0 ,Maps an asynchronous display to a chip select" "CS0,CS1" bitfld.long 0x00 6. " CHAN_MASK_DEFAULT_0 ,Event mask bit for the read channel" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 4.--5. " W_SIZE_0 ,Word Size" "8 bits,16 LSB bits,24 MSB bits,32 bits" bitfld.long 0x00 2.--3. " PROG_DISP_ID_0 ,The field defines which one of the 4 displays can be read" "0,1,2,3" bitfld.long 0x00 1. " PROG_DI_ID_0 ,This bit select the DI which a read transaction can be performed to" "0,1" textline " " bitfld.long 0x00 0. " RD_CHANNEL_EN ,Enables the read channel" "Disabled,Enabled" line.long 0x04 "DC_READ_CH_ADDR,DC Read Channel Start Address Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_0 ,Start address within the display's memory space (Channel 0)" line.long 0x08 "DC_RL0_CH_0,DC Routine Link Register 0 Channel 0" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_0 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_0 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_0 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_0 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_0,DC Routine Link Register 1 Channel 0" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_0 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_0 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_0 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_0 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_0,DC Routine Link Register 2 Channel 0" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_0 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_0 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_0 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_0 ,Priority of the end-of-line event (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_0,DC Routine Link Register 3 Channel 0" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_0 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_0 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_0 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_0 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_0,DC Routine Link Register 4 Channel 0" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_0 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_0 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 1" group.long 0x1c++0x1b line.long 0x00 "DC_WR_CH_CONF_1,DC Write Channel 1 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_1 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 1 window" bitfld.long 0x00 9. " FIELD_MODE_1 ,Field mode bit for channel #1" "Frame,Field" textline " " bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_1 ,Event mask bit for channel #1" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_1 ,This field define the mode of operation of channel #1" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" textline " " bitfld.long 0x00 3.--4. " PROG_DISP_ID_1 ,The field defines which one of the 4 displays is associated with channel #1" "0,1,2,3" bitfld.long 0x00 2. " PROG_DI_ID_1 ,Select the DI which a transaction associated with channel #1 can be performed to" "0,1" textline " " bitfld.long 0x00 0.--1. " W_SIZE_1 ,Word Size associated with channel #1" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_ADDR_1,DC Write Channel 1 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_1 ,Start address within the display's memory space (Channel 1)" line.long 0x08 "DC_RL0_CH_1,DC Routine Link Register 0 Channel 1" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_1 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_1 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_1 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_1 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_1,DC Routine Link Register 1 Channel 1" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_1 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_1 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_1 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_1 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_1,DC Routine Link Register 2 Channel 1" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_1 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_1 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_1 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_1 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_1,DC Routine Link Register 3 Channel 1" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_1 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_1 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_1 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_1 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_1,DC Routine Link Register 4 Channel 1" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_1 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_1 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 2" group.long 0x38++0x1b line.long 0x00 "DC_WR_CH_CONF_2,DC Write Channel 2 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_2 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 2 window" bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_2 ,Event mask bit for channel #2" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_2 ,Mode of operation of channel #2" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" bitfld.long 0x00 3.--4. " PROG_DISP_ID_2 ,The field defines which one of the 4 displays is associated with channel #2" "0,1,2,3" textline " " bitfld.long 0x00 2. " PROG_DI_ID_2 ,Select the DI which a transaction associated with channel #2 can be performed to" "0,1" bitfld.long 0x00 0.--1. " W_SIZE_2 ,Word Size" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_2,DC Write Channel 2 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_2 ,Start address within the display's memory space (Channel 2)" line.long 0x08 "DC_RL0_CH_2,DC Routine Link Register 0 Channel 2" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_2 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_2 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_2 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_2 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_2,DC Routine Link Register 1 Channel 2" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_2 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_2 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_2 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_2 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_2,DC Routine Link Register 2 Channel 2" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_2 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_2 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_2 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_2 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_2,DC Routine Link Register 3 Channel 2" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_2 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_2 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_2 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_2 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_2,DC Routine Link Register 4 Channel 2" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_2 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_2 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 3" group.long 0x54++0x03 line.long 0x00 "DC_CMD_CH_CONF_3,DC Command Channel 3 Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " COD_CMND_START_CHAN_RS1_3 ,Pointer to the address within the microcode memory (command start event)" hexmask.long.byte 0x00 8.--15. 1. " COD_CMND_START_CHAN_RS0_3 ,Pointer to the address within the microcode memory (command start event)" bitfld.long 0x00 0.--1. " W_SIZE_3 ,Word Size associated with channel #3" "8 bits,16 LSB,24 MSB,32 bits" tree.end tree "Channel 4" group.long 0x58++0x03 line.long 0x00 "DC_CMD_CH_CONF_4,DC Command Channel 4 Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " COD_CMND_START_CHAN_RS1_4 ,Pointer to the address within the microcode memory (command start event)" hexmask.long.byte 0x00 8.--15. 1. " COD_CMND_START_CHAN_RS0_4 ,Pointer to the address within the microcode memory (command start event)" bitfld.long 0x00 0.--1. " W_SIZE_4 ,Word Size associated with channel #4" "8 bits,16 LSB,24 MSB,32 bits" tree.end tree "Channel 5" group.long 0x5c++0x1b line.long 0x00 "DC_WR_CH_CONF_5,DC Write Channel 5 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_5 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 5 window" bitfld.long 0x00 9. " FIELD_MODE_5 ,Field mode bit for channel #5" "Frame,Field" textline " " bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_5 ,Event mask bit for channel #5" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_5 ,Mode of operation of channel #5" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" textline " " bitfld.long 0x00 3.--4. " PROG_DISP_ID_5 ,Defines which one of the 4 displays is associated with channel #5" "0,1,2,3" bitfld.long 0x00 2. " PROG_DI_ID_5 ,Select the DI which a transaction associated with channel #5 can be performed to" "0,1" textline " " bitfld.long 0x00 0.--1. " W_SIZE_5 ,Word Size associated with channel #5" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_5,DC Write Channel 5 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_5 ,Start address within the display's memory space (Channel 5)" line.long 0x08 "DC_RL0_CH_5,DC Routine Link Register 0 Channel 5" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_5 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_5 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_5 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_5 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_5,DC Routine Link Register 1 Channel 5" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_5 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_5 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_5 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_5 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_5,DC Routine Link Register 2 Channel 5" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_5 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_5 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_5 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_5 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_5,DC Routine Link Register 3 Channel 5" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_5 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_5 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_5 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_5 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_5,DC Routine Link Register 4 Channel 5" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_5 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_5 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 6" group.long 0x78++0x1b line.long 0x00 "DC_WR_CH_CONF_6,DC Write Channel 6 Configuration Register" hexmask.long.word 0x00 16.--26. 1. " PROG_START_TIME_6 ,Delay between display's vertical synchronization pulse and the start time point of DC's channel 6 window" bitfld.long 0x00 8. " CHAN_MASK_DEFAULT_6 ,Event mask bit for channel #6" "High. prior. used/rest masked,All used/Not masked" textline " " bitfld.long 0x00 5.--7. " PROG_CHAN_TYP_6 ,Mode of operation of channel #6" "Disabled,,,,Normal without anti-tearing,Normal with anti-tearing,,Add. cmd. ch. added" bitfld.long 0x00 3.--4. " PROG_DISP_ID_6 ,Defines which one of the 4 displays is associated with channel #6" "0,1,2,3" textline " " bitfld.long 0x00 2. " PROG_DI_ID_6 ,Select the DI which a transaction associated with channel #6 can be performed to" "0,1" bitfld.long 0x00 0.--1. " W_SIZE_6 ,Word Size associated with channel #6" "8 bits,16 LSB,24 MSB,32 bits" textline " " line.long 0x04 "DC_WR_CH_ADDR_6,DC Write Channel 6 Configuration Register" hexmask.long 0x04 0.--28. 1. " ST_ADDR_6 ,Start address within the display's memory space (Channel 6)" line.long 0x08 "DC_RL0_CH_6,DC Routine Link Register 0 Channel 6" hexmask.long.byte 0x08 24.--31. 1. " COD_NL_START_CHAN_6 ,Pointer to the address within the microcode memory (NL)" bitfld.long 0x08 16.--19. " COD_NL_PRIORITY_CHAN_6 ,Priority of the new line (NL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x08 8.--15. 1. " COD_NF_START_CHAN_6 ,Pointer to the address within the microcode memory (NF)" textline " " bitfld.long 0x08 0.--3. " COD_NF_PRIORITY_CHAN_6 ,Priority of the new frame (NF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL1_CH_6,DC Routine Link Register 1 Channel 6" hexmask.long.byte 0x0C 24.--31. 1. " COD_NFIELD_START_CHAN_6 ,Pointer to the address within the microcode memory (new field)" bitfld.long 0x0C 16.--19. " COD_NFIELD_PRIORITY_CHAN_6 ,Priority of the new field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x0C 8.--15. 1. " COD_EOF_START_CHAN_6 ,Pointer to the address within the microcode memory (EOF)" textline " " bitfld.long 0x0C 0.--3. " COD_EOF_PRIORITY_CHAN_6 ,Priority of the end-of-frame (EOF) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL2_CH_6,DC Routine Link Register 2 Channel 6" hexmask.long.byte 0x10 24.--31. 1. " COD_EOFIELD_START_CHAN_6 ,Pointer to the address within the microcode memory (end-of-field)" bitfld.long 0x10 16.--19. " COD_EOFIELD_PRIORITY_CHAN_6 ,Priority of the end-of-field event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x10 8.--15. 1. " COD_EOL_START_CHAN_6 ,Pointer to the address within the microcode memory (EOL)" textline " " bitfld.long 0x10 0.--3. " COD_EOL_PRIORITY_CHAN_6 ,Priority of the end of line (EOL) event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL3_CH_6,DC Routine Link Register 3 Channel 6" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_CHAN_START_CHAN_6 ,Pointer to the address within the microcode memory (new channel)" bitfld.long 0x14 16.--19. " COD_NEW_CHAN_PRIORITY_CHAN_6 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." hexmask.long.byte 0x14 8.--15. 1. " COD_NEW_ADDR_START_CHAN_6 ,Pointer to the address within the microcode memory (new address)" textline " " bitfld.long 0x14 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_6 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x18 "DC_RL4_CH_6,DC Routine Link Register 4 Channel 6" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_DATA_START_CHAN_6 ,Pointer to the address within the microcode memory (new data)" bitfld.long 0x18 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_6 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." tree.end tree "Channel 8" group.long 0x94++0x1f line.long 0x00 "DC_WR_CH_CONF1_8,DC Write Channel 8 Configuration 1 Register" bitfld.long 0x00 3.--4. " MCU_DISP_ID_8 ,Defines which one of the 4 displays is associated with channel #8" "0,1,2,3" bitfld.long 0x00 2. " CHAN_MASK_DEFAULT_8 ,Event mask bit for channel #8" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 0.--1. " W_SIZE_8 ,Word Size associated with channel #8" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_CONF2_8,DC Write Channel 8 Configuration 2 Register" hexmask.long 0x04 0.--28. 1. " NEW_ADDR_SPACE_SA_8 ,Base address of the second region accessible on the display" line.long 0x08 "DC_RL1_CH_8,DC Routine Link Register 1 Channel 8" hexmask.long.byte 0x08 24.--31. 1. " COD_NEW_ADDR_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x08 8.--15. 1. " COD_NEW_ADDR_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new address/first region)" bitfld.long 0x08 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_8 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL2_CH_8,DC Routine Link Register 2 Channel 8" hexmask.long.byte 0x0C 24.--31. 1. " COD_NEW_CHAN_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x0C 8.--15. 1. " COD_NEW_CHAN_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new channel/second region)" bitfld.long 0x0C 0.--3. " COD_NEW_CHAN_PRIORITY_CHAN_8 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL3_CH_8,DC Routine Link Register 3 Channel 8" hexmask.long.byte 0x10 24.--31. 1. " COD_NEW_DATA_START_CHAN_W_8_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x10 8.--15. 1. " COD_NEW_DATA_START_CHAN_W_8_0 ,Pointer to the address within the microcode memory (new data/first region)" bitfld.long 0x10 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_8 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL4_CH_8,DC Routine Link Register 4 Channel 8" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_ADDR_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x14 8.--15. 1. " OD_NEW_ADDR_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new address/first region)" line.long 0x18 "DC_RL5_CH_8,DC Routine Link Register 5 Channel 8" hexmask.long.byte 0x18 24.--31. 1. " COD_NEW_CHAN_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_CHAN_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new channel/first region)" line.long 0x1c "DC_RL6_CH_8,DC Routine Link Register 6 Channel 8" hexmask.long.byte 0x1C 24.--31. 1. " COD_NEW_DATA_START_CHAN_R_8_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x1C 8.--15. 1. " COD_NEW_DATA_START_CHAN_R_8_0 ,Pointer to the address within the microcode memory (new data/first region)" tree.end tree "Channel 9" group.long 0xb4++0x1f line.long 0x00 "DC_WR_CH_CONF1_9,DC Write Channel 9 Configuration 1 Register" bitfld.long 0x00 3.--4. " MCU_DISP_ID_9 ,Defines which one of the 4 displays is associated with channel #9" "0,1,2,3" bitfld.long 0x00 2. " CHAN_MASK_DEFAULT_9 ,Event mask bit for channel #9" "High. prior. used/rest masked,All used/Not masked" bitfld.long 0x00 0.--1. " W_SIZE_9 ,Word Size associated with channel #9" "8 bits,16 LSB,24 MSB,32 bits" line.long 0x04 "DC_WR_CH_CONF2_9,DC Write Channel 9 Configuration 2 Register" hexmask.long 0x04 0.--28. 1. " NEW_ADDR_SPACE_SA_9 ,Base address of the second region accessible on the display" line.long 0x08 "DC_RL1_CH_9,DC Routine Link Register 1 Channel 9" hexmask.long.byte 0x08 24.--31. 1. " COD_NEW_ADDR_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x08 8.--15. 1. " COD_NEW_ADDR_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new address/first region)" bitfld.long 0x08 0.--3. " COD_NEW_ADDR_PRIORITY_CHAN_9 ,Priority of the new address event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x0c "DC_RL2_CH_9,DC Routine Link Register 2 Channel 9" hexmask.long.byte 0x0C 24.--31. 1. " COD_NEW_CHAN_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x0C 8.--15. 1. " COD_NEW_CHAN_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new channel/second region)" bitfld.long 0x0C 0.--3. " COD_NEW_CHAN_PRIORITY_CHAN_9 ,Priority of the new channel event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x10 "DC_RL3_CH_9,DC Routine Link Register 3 Channel 9" hexmask.long.byte 0x10 24.--31. 1. " COD_NEW_DATA_START_CHAN_W_9_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x10 8.--15. 1. " COD_NEW_DATA_START_CHAN_W_9_0 ,Pointer to the address within the microcode memory (new data/first region)" bitfld.long 0x10 0.--3. " COD_NEW_DATA_PRIORITY_CHAN_9 ,Priority of the new data event" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." line.long 0x14 "DC_RL4_CH_9,DC Routine Link Register 4 Channel 9" hexmask.long.byte 0x14 24.--31. 1. " COD_NEW_ADDR_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new address/second region)" hexmask.long.byte 0x14 8.--15. 1. " OD_NEW_ADDR_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new address/first region)" line.long 0x18 "DC_RL5_CH_9,DC Routine Link Register 5 Channel 9" hexmask.long.byte 0x18 24.--31. 1. " COD_NEW_CHAN_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new channel/second region)" hexmask.long.byte 0x18 8.--15. 1. " COD_NEW_CHAN_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new channel/first region)" line.long 0x1c "DC_RL6_CH_9,DC Routine Link Register 6 Channel 9" hexmask.long.byte 0x1C 24.--31. 1. " COD_NEW_DATA_START_CHAN_R_9_1 ,Pointer to the address within the microcode memory (new data/second region)" hexmask.long.byte 0x1C 8.--15. 1. " COD_NEW_DATA_START_CHAN_R_9_0 ,Pointer to the address within the microcode memory (new data/first region)" tree.end textline " " group.long 0xd4++0x03 line.long 0x00 "DC_GEN,DC General Register" bitfld.long 0x00 24. " DC_BK_EN ,Cursor blinking enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " DC_BKDIV ,Blinking Rate" bitfld.long 0x00 8. " DC_CH5_TYPE ,Channel 5 is used for synchronous flow" "Synchronous,Asynchronous" textline " " bitfld.long 0x00 7. " SYNC_PRIORITY_1 ,Sets the priority of channel #1" "Low,High" bitfld.long 0x00 6. " SYNC_PRIORITY_5 ,Sets the priority of channel #5" "Low,High" bitfld.long 0x00 5. " MASK4CHAN_5 ,Mask for channel #5" "DC,DP" textline " " bitfld.long 0x00 4. " MASK_EN ,Enable of the mask channel" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SYNC_1_6 ,Channel 1 of the DC async/sync flow handle" "Async flow,,Sync flow,?..." if (((per.long(ad:0x02A58000+0xd8+0x0))&0x40)==0x00) group.long (0xd8+0x0)++0x03 line.long 0x00 "DC_DISP_CONF1_0,DC Display Configuration 1 Register 0" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_0 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_0 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_0 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_0 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_0 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x0)++0x03 line.long 0x00 "DC_DISP_CONF1_0,DC Display Configuration 1 Register 0" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_0 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_0 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_0 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_0 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_0 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02A58000+0xd8+0x4))&0x40)==0x00) group.long (0xd8+0x4)++0x03 line.long 0x00 "DC_DISP_CONF1_1,DC Display Configuration 1 Register 1" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_1 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_1 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_1 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_1 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_1 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x4)++0x03 line.long 0x00 "DC_DISP_CONF1_1,DC Display Configuration 1 Register 1" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_1 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_1 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_1 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_1 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_1 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02A58000+0xd8+0x8))&0x40)==0x00) group.long (0xd8+0x8)++0x03 line.long 0x00 "DC_DISP_CONF1_2,DC Display Configuration 1 Register 2" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_2 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_2 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_2 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_2 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_2 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0x8)++0x03 line.long 0x00 "DC_DISP_CONF1_2,DC Display Configuration 1 Register 2" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_2 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_2 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_2 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_2 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_2 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif if (((per.long(ad:0x02A58000+0xd8+0xC))&0x40)==0x00) group.long (0xd8+0xC)++0x03 line.long 0x00 "DC_DISP_CONF1_3,DC Display Configuration 1 Register 3" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_3 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_3 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_3 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,,2,?..." textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_3 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_3 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" else group.long (0xd8+0xC)++0x03 line.long 0x00 "DC_DISP_CONF1_3,DC Display Configuration 1 Register 3" bitfld.long 0x00 7. " DISP_RD_VALUE_PTR_3 ,Holds a pointer to the corresponding set of mask and value" "VALUE_0 & MASK_0,VALUE_1 & MASK_1" bitfld.long 0x00 6. " MCU_ACC_LB_MASK_3 ,Comparing mode" "Compared/ignored ADDR[0],Fully compared" bitfld.long 0x00 4.--5. " ADDR_BE_L_INC_3 ,Increment mode when the latest access was done with some of the byte enable signals are low" "No increment,1,2,3" textline " " bitfld.long 0x00 2.--3. " ADDR_INCREMENT_3 ,Increment step for auto increment mode" "1,2,3,4" bitfld.long 0x00 0.--1. " DISP_TYP_3 ,Type of the display" "Serial accesses,,Parallel/without byte_enable,Parallel/with byte_enable" endif group.long 0xe8--0x1c7 line.long 0x0 "DC_DISP_CONF2_0,DC Display Configuration 2 Register 0" hexmask.long 0x0 0.--28. 1. " SL_0 ,Stride line of display 0" line.long 0x4 "DC_DISP_CONF2_1,DC Display Configuration 2 Register 1" hexmask.long 0x4 0.--28. 1. " SL_1 ,Stride line of display 1" line.long 0x8 "DC_DISP_CONF2_2,DC Display Configuration 2 Register 2" hexmask.long 0x8 0.--28. 1. " SL_2 ,Stride line of display 2" line.long 0xC "DC_DISP_CONF2_3,DC Display Configuration 2 Register 3" hexmask.long 0xC 0.--28. 1. " SL_3 ,Stride line of display 3" line.long 0x10 "DC_DI0_CONF_1,DC DI0 Configuration Register 1" line.long 0x14 "DC_DI0_CONF_2,DC DI0 Configuration Register 2" line.long 0x18 "DC_DI1_CONF_1,DC DI1 Configuration Register 1" line.long 0x1C "DC_DI1_CONF_2,DC DI1 Configuration Register 2" textline " " line.long 0x20 "DC_MAP_CONF_0,DC Mapping Configuration Register 0" bitfld.long 0x20 26.--30. " MAPPING_PNTR_BYTE2_1 ,Mapping pointer #1 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 21.--25. " MAPPING_PNTR_BYTE1_1 ,Mapping pointer #1 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 16.--20. " MAPPING_PNTR_BYTE0_1 ,Mapping pointer #1 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 10.--14. " MAPPING_PNTR_BYTE2_0 ,Mapping pointer #0 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x20 5.--9. " MAPPING_PNTR_BYTE1_0 ,Mapping pointer #0 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--4. " MAPPING_PNTR_BYTE0_0 ,Mapping pointer #0 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "DC_MAP_CONF_1,DC Mapping Configuration Register 1" bitfld.long 0x24 26.--30. " MAPPING_PNTR_BYTE2_3 ,Mapping pointer #3 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 21.--25. " MAPPING_PNTR_BYTE1_3 ,Mapping pointer #3 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 16.--20. " MAPPING_PNTR_BYTE0_3 ,Mapping pointer #3 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 10.--14. " MAPPING_PNTR_BYTE2_2 ,Mapping pointer #2 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 5.--9. " MAPPING_PNTR_BYTE1_2 ,Mapping pointer #2 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. " MAPPING_PNTR_BYTE0_2 ,Mapping pointer #2 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "DC_MAP_CONF_2,DC Mapping Configuration Register 2" bitfld.long 0x28 26.--30. " MAPPING_PNTR_BYTE2_5 ,Mapping pointer #5 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 21.--25. " MAPPING_PNTR_BYTE1_5 ,Mapping pointer #5 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 16.--20. " MAPPING_PNTR_BYTE0_5 ,Mapping pointer #5 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 10.--14. " MAPPING_PNTR_BYTE2_4 ,Mapping pointer #4 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 5.--9. " MAPPING_PNTR_BYTE1_4 ,Mapping pointer #4 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--4. " MAPPING_PNTR_BYTE0_4 ,Mapping pointer #4 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "DC_MAP_CONF_3,DC Mapping Configuration Register 3" bitfld.long 0x2C 26.--30. " MAPPING_PNTR_BYTE2_7 ,Mapping pointer #7 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 21.--25. " MAPPING_PNTR_BYTE1_7 ,Mapping pointer #7 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 16.--20. " MAPPING_PNTR_BYTE0_7 ,Mapping pointer #7 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 10.--14. " MAPPING_PNTR_BYTE2_6 ,Mapping pointer #6 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 5.--9. " MAPPING_PNTR_BYTE1_6 ,Mapping pointer #6 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--4. " MAPPING_PNTR_BYTE0_6 ,Mapping pointer #6 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "DC_MAP_CONF_4,DC Mapping Configuration Register 4" bitfld.long 0x30 26.--30. " MAPPING_PNTR_BYTE2_9 ,Mapping pointer #9 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 21.--25. " MAPPING_PNTR_BYTE1_9 ,Mapping pointer #9 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 16.--20. " MAPPING_PNTR_BYTE0_9 ,Mapping pointer #9 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 10.--14. " MAPPING_PNTR_BYTE2_8 ,Mapping pointer #8 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x30 5.--9. " MAPPING_PNTR_BYTE1_8 ,Mapping pointer #8 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 0.--4. " MAPPING_PNTR_BYTE0_8 ,Mapping pointer #8 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "DC_MAP_CONF_5,DC Mapping Configuration Register 5" bitfld.long 0x34 26.--30. " MAPPING_PNTR_BYTE2_11 ,Mapping pointer #11 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 21.--25. " MAPPING_PNTR_BYTE1_11 ,Mapping pointer #11 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 16.--20. " MAPPING_PNTR_BYTE0_11 ,Mapping pointer #11 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 10.--14. " MAPPING_PNTR_BYTE2_10 ,Mapping pointer #10 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 5.--9. " MAPPING_PNTR_BYTE1_10 ,Mapping pointer #10 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 0.--4. " MAPPING_PNTR_BYTE0_10 ,Mapping pointer #10 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "DC_MAP_CONF_6,DC Mapping Configuration Register 6" bitfld.long 0x38 26.--30. " MAPPING_PNTR_BYTE2_13 ,Mapping pointer #13 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 21.--25. " MAPPING_PNTR_BYTE1_13 ,Mapping pointer #13 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 16.--20. " MAPPING_PNTR_BYTE0_13 ,Mapping pointer #13 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 10.--14. " MAPPING_PNTR_BYTE2_12 ,Mapping pointer #12 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x38 5.--9. " MAPPING_PNTR_BYTE1_12 ,Mapping pointer #12 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 0.--4. " MAPPING_PNTR_BYTE0_12 ,Mapping pointer #12 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "DC_MAP_CONF_7,DC Mapping Configuration Register 7" bitfld.long 0x3C 26.--30. " MAPPING_PNTR_BYTE2_15 ,Mapping pointer #15 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 21.--25. " MAPPING_PNTR_BYTE1_15 ,Mapping pointer #15 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 16.--20. " MAPPING_PNTR_BYTE0_15 ,Mapping pointer #15 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 10.--14. " MAPPING_PNTR_BYTE2_14 ,Mapping pointer #14 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x3C 5.--9. " MAPPING_PNTR_BYTE1_14 ,Mapping pointer #14 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 0.--4. " MAPPING_PNTR_BYTE0_14 ,Mapping pointer #14 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "DC_MAP_CONF_8,DC Mapping Configuration Register 8" bitfld.long 0x40 26.--30. " MAPPING_PNTR_BYTE2_17 ,Mapping pointer #17 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 21.--25. " MAPPING_PNTR_BYTE1_17 ,Mapping pointer #17 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 16.--20. " MAPPING_PNTR_BYTE0_17 ,Mapping pointer #17 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 10.--14. " MAPPING_PNTR_BYTE2_16 ,Mapping pointer #16 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x40 5.--9. " MAPPING_PNTR_BYTE1_16 ,Mapping pointer #16 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 0.--4. " MAPPING_PNTR_BYTE0_16 ,Mapping pointer #16 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "DC_MAP_CONF_9,DC Mapping Configuration Register 9" bitfld.long 0x44 26.--30. " MAPPING_PNTR_BYTE2_19 ,Mapping pointer #19 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 21.--25. " MAPPING_PNTR_BYTE1_19 ,Mapping pointer #19 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 16.--20. " MAPPING_PNTR_BYTE0_19 ,Mapping pointer #19 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 10.--14. " MAPPING_PNTR_BYTE2_18 ,Mapping pointer #18 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x44 5.--9. " MAPPING_PNTR_BYTE1_18 ,Mapping pointer #18 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 0.--4. " MAPPING_PNTR_BYTE0_18 ,Mapping pointer #18 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "DC_MAP_CONF_10,DC Mapping Configuration Register 10" bitfld.long 0x48 26.--30. " MAPPING_PNTR_BYTE2_21 ,Mapping pointer #21 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 21.--25. " MAPPING_PNTR_BYTE1_21 ,Mapping pointer #21 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 16.--20. " MAPPING_PNTR_BYTE0_21 ,Mapping pointer #21 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 10.--14. " MAPPING_PNTR_BYTE2_20 ,Mapping pointer #20 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x48 5.--9. " MAPPING_PNTR_BYTE1_20 ,Mapping pointer #20 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 0.--4. " MAPPING_PNTR_BYTE0_20 ,Mapping pointer #20 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "DC_MAP_CONF_11,DC Mapping Configuration Register 11" bitfld.long 0x4C 26.--30. " MAPPING_PNTR_BYTE2_23 ,Mapping pointer #23 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 21.--25. " MAPPING_PNTR_BYTE1_23 ,Mapping pointer #23 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 16.--20. " MAPPING_PNTR_BYTE0_23 ,Mapping pointer #23 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 10.--14. " MAPPING_PNTR_BYTE2_22 ,Mapping pointer #22 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x4C 5.--9. " MAPPING_PNTR_BYTE1_22 ,Mapping pointer #22 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 0.--4. " MAPPING_PNTR_BYTE0_22 ,Mapping pointer #22 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "DC_MAP_CONF_12,DC Mapping Configuration Register 12" bitfld.long 0x50 26.--30. " MAPPING_PNTR_BYTE2_25 ,Mapping pointer #25 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 21.--25. " MAPPING_PNTR_BYTE1_25 ,Mapping pointer #25 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 16.--20. " MAPPING_PNTR_BYTE0_25 ,Mapping pointer #25 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 10.--14. " MAPPING_PNTR_BYTE2_24 ,Mapping pointer #24 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x50 5.--9. " MAPPING_PNTR_BYTE1_24 ,Mapping pointer #24 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--4. " MAPPING_PNTR_BYTE0_24 ,Mapping pointer #24 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "DC_MAP_CONF_13,DC Mapping Configuration Register 13" bitfld.long 0x54 26.--30. " MAPPING_PNTR_BYTE2_27 ,Mapping pointer #27 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 21.--25. " MAPPING_PNTR_BYTE1_27 ,Mapping pointer #27 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 16.--20. " MAPPING_PNTR_BYTE0_27 ,Mapping pointer #27 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 10.--14. " MAPPING_PNTR_BYTE2_26 ,Mapping pointer #26 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x54 5.--9. " MAPPING_PNTR_BYTE1_26 ,Mapping pointer #26 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 0.--4. " MAPPING_PNTR_BYTE0_26 ,Mapping pointer #26 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "DC_MAP_CONF_14,DC Mapping Configuration Register 14" bitfld.long 0x58 26.--30. " MAPPING_PNTR_BYTE2_29 ,Mapping pointer #29 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 21.--25. " MAPPING_PNTR_BYTE1_29 ,Mapping pointer #29 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 16.--20. " MAPPING_PNTR_BYTE0_29 ,Mapping pointer #29 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 10.--14. " MAPPING_PNTR_BYTE2_28 ,Mapping pointer #28 for Byte 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x58 5.--9. " MAPPING_PNTR_BYTE1_28 ,Mapping pointer #28 for Byte 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 0.--4. " MAPPING_PNTR_BYTE0_28 ,Mapping pointer #28 for Byte 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " line.long 0x5C "DC_MAP_CONF_15,DC Mapping Configuration Register 15" bitfld.long 0x5C 24.--28. " MD_OFFSET_1 ,Mapping unit's offset parameter #1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x5C 16.--23. 1. " MD_MASK_1 ,Mapping unit's mask value #1" bitfld.long 0x5C 8.--12. " MD_OFFSET_0 ,Mapping unit's offset parameter #0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x5C 0.--7. 1. " MD_MASK_0 ,Mapping unit's mask value #0" line.long 0x60 "DC_MAP_CONF_16,DC Mapping Configuration Register 16" bitfld.long 0x60 24.--28. " MD_OFFSET_3 ,Mapping unit's offset parameter #3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x60 16.--23. 1. " MD_MASK_3 ,Mapping unit's mask value #3" bitfld.long 0x60 8.--12. " MD_OFFSET_2 ,Mapping unit's offset parameter #2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x60 0.--7. 1. " MD_MASK_2 ,Mapping unit's mask value #2" line.long 0x64 "DC_MAP_CONF_17,DC Mapping Configuration Register 17" bitfld.long 0x64 24.--28. " MD_OFFSET_5 ,Mapping unit's offset parameter #5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x64 16.--23. 1. " MD_MASK_5 ,Mapping unit's mask value #5" bitfld.long 0x64 8.--12. " MD_OFFSET_4 ,Mapping unit's offset parameter #4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x64 0.--7. 1. " MD_MASK_4 ,Mapping unit's mask value #4" line.long 0x68 "DC_MAP_CONF_18,DC Mapping Configuration Register 18" bitfld.long 0x68 24.--28. " MD_OFFSET_7 ,Mapping unit's offset parameter #7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x68 16.--23. 1. " MD_MASK_7 ,Mapping unit's mask value #7" bitfld.long 0x68 8.--12. " MD_OFFSET_6 ,Mapping unit's offset parameter #6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x68 0.--7. 1. " MD_MASK_6 ,Mapping unit's mask value #6" line.long 0x6C "DC_MAP_CONF_19,DC Mapping Configuration Register 19" bitfld.long 0x6C 24.--28. " MD_OFFSET_9 ,Mapping unit's offset parameter #9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x6C 16.--23. 1. " MD_MASK_9 ,Mapping unit's mask value #9" bitfld.long 0x6C 8.--12. " MD_OFFSET_8 ,Mapping unit's offset parameter #8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x6C 0.--7. 1. " MD_MASK_8 ,Mapping unit's mask value #8" line.long 0x70 "DC_MAP_CONF_20,DC Mapping Configuration Register 20" bitfld.long 0x70 24.--28. " MD_OFFSET_11 ,Mapping unit's offset parameter #11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x70 16.--23. 1. " MD_MASK_11 ,Mapping unit's mask value #11" bitfld.long 0x70 8.--12. " MD_OFFSET_10 ,Mapping unit's offset parameter #10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x70 0.--7. 1. " MD_MASK_10 ,Mapping unit's mask value #10" line.long 0x74 "DC_MAP_CONF_21,DC Mapping Configuration Register 21" bitfld.long 0x74 24.--28. " MD_OFFSET_13 ,Mapping unit's offset parameter #13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x74 16.--23. 1. " MD_MASK_13 ,Mapping unit's mask value #13" bitfld.long 0x74 8.--12. " MD_OFFSET_12 ,Mapping unit's offset parameter #12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x74 0.--7. 1. " MD_MASK_12 ,Mapping unit's mask value #12" line.long 0x78 "DC_MAP_CONF_22,DC Mapping Configuration Register 22" bitfld.long 0x78 24.--28. " MD_OFFSET_15 ,Mapping unit's offset parameter #15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x78 16.--23. 1. " MD_MASK_15 ,Mapping unit's mask value #15" bitfld.long 0x78 8.--12. " MD_OFFSET_14 ,Mapping unit's offset parameter #14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x78 0.--7. 1. " MD_MASK_14 ,Mapping unit's mask value #14" line.long 0x7C "DC_MAP_CONF_23,DC Mapping Configuration Register 23" bitfld.long 0x7C 24.--28. " MD_OFFSET_17 ,Mapping unit's offset parameter #17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x7C 16.--23. 1. " MD_MASK_17 ,Mapping unit's mask value #17" bitfld.long 0x7C 8.--12. " MD_OFFSET_16 ,Mapping unit's offset parameter #16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x7C 0.--7. 1. " MD_MASK_16 ,Mapping unit's mask value #16" line.long 0x80 "DC_MAP_CONF_24,DC Mapping Configuration Register 24" bitfld.long 0x80 24.--28. " MD_OFFSET_19 ,Mapping unit's offset parameter #19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x80 16.--23. 1. " MD_MASK_19 ,Mapping unit's mask value #19" bitfld.long 0x80 8.--12. " MD_OFFSET_18 ,Mapping unit's offset parameter #18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x80 0.--7. 1. " MD_MASK_18 ,Mapping unit's mask value #18" line.long 0x84 "DC_MAP_CONF_25,DC Mapping Configuration Register 25" bitfld.long 0x84 24.--28. " MD_OFFSET_21 ,Mapping unit's offset parameter #21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x84 16.--23. 1. " MD_MASK_21 ,Mapping unit's mask value #21" bitfld.long 0x84 8.--12. " MD_OFFSET_20 ,Mapping unit's offset parameter #20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x84 0.--7. 1. " MD_MASK_20 ,Mapping unit's mask value #20" line.long 0x88 "DC_MAP_CONF_26,DC Mapping Configuration Register 26" bitfld.long 0x88 24.--28. " MD_OFFSET_23 ,Mapping unit's offset parameter #23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x88 16.--23. 1. " MD_MASK_23 ,Mapping unit's mask value #23" bitfld.long 0x88 8.--12. " MD_OFFSET_22 ,Mapping unit's offset parameter #22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x88 0.--7. 1. " MD_MASK_22 ,Mapping unit's mask value #22" line.long 0x8C "DC_UGDE0_0,DC User General Data Event 0 Register 0" bitfld.long 0x8C 27.--28. " NF_NL_0 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0x8C 26. " AUTORESTART_0 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0x8C 25. " ODD_EN_0 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0x8C 16.--23. 1. " COD_ODD_START_0 ,Pointer in the microcode holding the routine to be performed following the user general event #0 (odd events)" textline " " hexmask.long.byte 0x8C 8.--15. 1. " COD_EV_START_0 ,Pointer in the microcode holding the routine to be performed following the user general event #0 (even events)" bitfld.long 0x8C 3.--6. " COD_EV_PRIORITY_0 ,Priority of the user general event #0" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0x8C 0.--2. " ID_CODED_0 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0x8C+0x04) "DC_UGDE0_1,DC User General Data Event 0 Register 1" hexmask.long (0x8C+0x04) 0.--28. 1. " STEP_0 ,Pre defined value that the counter counts too" line.long (0x8C+0x08) "DC_UGDE0_2,DC User General Data Event 0 Register 2" hexmask.long (0x8C+0x08) 0.--28. 1. " OFFSET_DT_0 ,Offset value from which the counter of user general event #0 will start counting from" line.long (0x8C+0x0c) "DC_UGDE0_3,DC User General Data Event 0 Register 3" hexmask.long (0x8C+0x0c) 0.--28. 1. " STEP_REPEAT_0 ,Number of events that will be generated by the user general event #0 mechanism" line.long 0x9C "DC_UGDE1_0,DC User General Data Event 1 Register 0" bitfld.long 0x9C 27.--28. " NF_NL_1 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0x9C 26. " AUTORESTART_1 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0x9C 25. " ODD_EN_1 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0x9C 16.--23. 1. " COD_ODD_START_1 ,Pointer in the microcode holding the routine to be performed following the user general event #1 (odd events)" textline " " hexmask.long.byte 0x9C 8.--15. 1. " COD_EV_START_1 ,Pointer in the microcode holding the routine to be performed following the user general event #1 (even events)" bitfld.long 0x9C 3.--6. " COD_EV_PRIORITY_1 ,Priority of the user general event #1" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0x9C 0.--2. " ID_CODED_1 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0x9C+0x04) "DC_UGDE1_1,DC User General Data Event 1 Register 1" hexmask.long (0x9C+0x04) 0.--28. 1. " STEP_1 ,Pre defined value that the counter counts too" line.long (0x9C+0x08) "DC_UGDE1_2,DC User General Data Event 1 Register 2" hexmask.long (0x9C+0x08) 0.--28. 1. " OFFSET_DT_1 ,Offset value from which the counter of user general event #1 will start counting from" line.long (0x9C+0x0c) "DC_UGDE1_3,DC User General Data Event 1 Register 3" hexmask.long (0x9C+0x0c) 0.--28. 1. " STEP_REPEAT_1 ,Number of events that will be generated by the user general event #1 mechanism" line.long 0xAC "DC_UGDE2_0,DC User General Data Event 2 Register 0" bitfld.long 0xAC 27.--28. " NF_NL_2 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0xAC 26. " AUTORESTART_2 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0xAC 25. " ODD_EN_2 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0xAC 16.--23. 1. " COD_ODD_START_2 ,Pointer in the microcode holding the routine to be performed following the user general event #2 (odd events)" textline " " hexmask.long.byte 0xAC 8.--15. 1. " COD_EV_START_2 ,Pointer in the microcode holding the routine to be performed following the user general event #2 (even events)" bitfld.long 0xAC 3.--6. " COD_EV_PRIORITY_2 ,Priority of the user general event #2" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0xAC 0.--2. " ID_CODED_2 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0xAC+0x04) "DC_UGDE2_1,DC User General Data Event 2 Register 1" hexmask.long (0xAC+0x04) 0.--28. 1. " STEP_2 ,Pre defined value that the counter counts too" line.long (0xAC+0x08) "DC_UGDE2_2,DC User General Data Event 2 Register 2" hexmask.long (0xAC+0x08) 0.--28. 1. " OFFSET_DT_2 ,Offset value from which the counter of user general event #2 will start counting from" line.long (0xAC+0x0c) "DC_UGDE2_3,DC User General Data Event 2 Register 3" hexmask.long (0xAC+0x0c) 0.--28. 1. " STEP_REPEAT_2 ,Number of events that will be generated by the user general event #2 mechanism" line.long 0xBC "DC_UGDE3_0,DC User General Data Event 3 Register 0" bitfld.long 0xBC 27.--28. " NF_NL_3 ,New-line New-Frame and New-field event" "New Line,New Frame,New Field,?..." bitfld.long 0xBC 26. " AUTORESTART_3 ,Auto restart mode" "Disabled,Enabled" bitfld.long 0xBC 25. " ODD_EN_3 ,Odd Mode Enable" "Disabled,Enabled" hexmask.long.byte 0xBC 16.--23. 1. " COD_ODD_START_3 ,Pointer in the microcode holding the routine to be performed following the user general event #3 (odd events)" textline " " hexmask.long.byte 0xBC 8.--15. 1. " COD_EV_START_3 ,Pointer in the microcode holding the routine to be performed following the user general event #3 (even events)" bitfld.long 0xBC 3.--6. " COD_EV_PRIORITY_3 ,Priority of the user general event #3" "Disabled,1(lowest),2,3,4,5,6,7,8,9,10,11,12,13(highest),?..." bitfld.long 0xBC 0.--2. " ID_CODED_3 ,Number of DC channel number" "0,1,2,5,6,?..." line.long (0xBC+0x04) "DC_UGDE3_1,DC User General Data Event 3 Register 1" hexmask.long (0xBC+0x04) 0.--28. 1. " STEP_3 ,Pre defined value that the counter counts too" line.long (0xBC+0x08) "DC_UGDE3_2,DC User General Data Event 3 Register 2" hexmask.long (0xBC+0x08) 0.--28. 1. " OFFSET_DT_3 ,Offset value from which the counter of user general event #3 will start counting from" line.long (0xBC+0x0c) "DC_UGDE3_3,DC User General Data Event 3 Register 3" hexmask.long (0xBC+0x0c) 0.--28. 1. " STEP_REPEAT_3 ,Number of events that will be generated by the user general event #3 mechanism" line.long 0xCC "DC_LLA0,DC Low Level Access Control Register 0" hexmask.long.byte 0xCC 24.--31. 1. " MCU_RS_3_0 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_8 (Low level)" hexmask.long.byte 0xCC 16.--23. 1. " MCU_RS_2_0 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_8 (Low level)" hexmask.long.byte 0xCC 8.--15. 1. " MCU_RS_1_0 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_8 (Low level)" textline " " hexmask.long.byte 0xCC 0.--7. 1. " MCU_RS_0_0 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_8 (Low level)" line.long 0xD0 "DC_LLA1,DC Low Level Access Control Register 1" hexmask.long.byte 0xD0 24.--31. 1. " MCU_RS_3_1 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_9 (Low level)" hexmask.long.byte 0xD0 16.--23. 1. " MCU_RS_2_1 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_9 (Low level)" hexmask.long.byte 0xD0 8.--15. 1. " MCU_RS_1_1 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_9 (Low level)" textline " " hexmask.long.byte 0xD0 0.--7. 1. " MCU_RS_0_1 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_9 (Low level)" line.long 0xD4 "DC_R_LLA0,DC Low Level Read Access Control Register 0" hexmask.long.byte 0xD4 24.--31. 1. " MCU_RS_R_3_0 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_8 (Read Low level)" hexmask.long.byte 0xD4 16.--23. 1. " MCU_RS_R_2_0 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_8 (Read Low level)" hexmask.long.byte 0xD4 8.--15. 1. " MCU_RS_R_1_0 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_8 (Read Low level)" textline " " hexmask.long.byte 0xD4 0.--7. 1. " MCU_RS_R_0_0 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_8 (Read Low level)" line.long 0xD8 "DC_R_LLA1,DC Low Level Read Access Control Register 1" hexmask.long.byte 0xD8 24.--31. 1. " MCU_RS_R_3_1 ,Pointer in the microcode handling the RS_3 routine for the display defined at DISP_ID_9 (Read Low level)" hexmask.long.byte 0xD8 16.--23. 1. " MCU_RS_R_2_1 ,Pointer in the microcode handling the RS_2 routine for the display defined at DISP_ID_9 (Read Low level)" hexmask.long.byte 0xD8 8.--15. 1. " MCU_RS_R_1_1 ,Pointer in the microcode handling the RS_1 routine for the display defined at DISP_ID_9 (Read Low level)" textline " " hexmask.long.byte 0xD8 0.--7. 1. " MCU_RS_R_0_1 ,Pointer in the microcode handling the RS_0 routine for the display defined at DISP_ID_9 (Read Low level)" width 21. textline " " line.long 0xdc "DC_WR_CH_ADDR_5_ALT,DC Write Channel 5 Configuration Register" hexmask.long 0xdc 0.--28. 1. " ST_ADDR_5_ALT ,Start address within the display's memory space (channel #5)" rgroup.long 0x1c8++0x03 line.long 0x00 "DC_STAT,DC Status Register" bitfld.long 0x00 7. " DC_TRIPLE_BUF_DATA_EMPTY_1 ,DC_TRIPLE_BUF_DATA_EMPTY_1" "Not empty,Empty" bitfld.long 0x00 6. " DC_TRIPLE_BUF_DATA_FULL_1 ,DC_TRIPLE_BUF_DATA_FULL_1" "Not full,Full" bitfld.long 0x00 5. " DC_TRIPLE_BUF_CNT_EMPTY_1 ,DC_TRIPLE_BUF_CNT_EMPTY_1" "Not empty,Empty" textline " " bitfld.long 0x00 4. " DC_TRIPLE_BUF_CNT_FULL_1 ,DC_TRIPLE_BUF_CNT_FULL_1" "Not full,Full" bitfld.long 0x00 3. " DC_TRIPLE_BUF_DATA_EMPTY_0 ,DC_TRIPLE_BUF_DATA_EMPTY_0" "Not empty,Empty" bitfld.long 0x00 2. " DC_TRIPLE_BUF_DATA_FULL_0 ,DC_TRIPLE_BUF_DATA_FULL_0" "Not full,Full" textline " " bitfld.long 0x00 1. " DC_TRIPLE_BUF_CNT_EMPTY_0 ,DC_TRIPLE_BUF_CNT_EMPTY_0" "Not empty,Empty" bitfld.long 0x00 0. " DC_TRIPLE_BUF_CNT_FULL_0 ,DC_TRIPLE_BUF_CNT_FULL_0" "Not full,Full" width 0x0B tree.end tree "DMFC registers" base ad:0x02A60000 width 22. group.long 0x00++0x33 line.long 0x00 "DMFC_RD_CHAN,DMFC Read Channel Register" bitfld.long 0x00 24.--25. " DMFC_PPW_C ,Pixel Per Word coded" "8,16,24,?..." bitfld.long 0x00 21.--23. " DMFC_WM_CLR_0 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18.--20. " DMFC_WM_SET_0 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17. " DMFC_WM_EN_0 ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " DMFC_BURST_SIZE_0 ,Read burst Size" "32,16,8,4" line.long 0x04 "DMFC_WR_CHAN,DMFC Write Channel Register" bitfld.long 0x04 30.--31. " DMFC_BURST_SIZE_2C ,Burst size of IDMAC's channel 43" "32,16,8,4" bitfld.long 0x04 27.--29. " DMFC_FIFO_SIZE_2C ,DMFC FIFO size for IDMAC's channel 43" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x04 24.--26. " DMFC_ST_ADDR_2C ,DMFC Start Address for IDMAC's channel 43" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x04 22.--23. " DMFC_BURST_SIZE_1C ,Burst size of IDMAC's channel 42" "32,16,8,4" textline " " bitfld.long 0x04 19.--21. " DMFC_FIFO_SIZE_1C ,DMFC FIFO size for IDMAC's channel 42" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x04 16.--18. " DMFC_ST_ADDR_1C ,DMFC Start Address for IDMAC's channel 42" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x04 14.--15. " DMFC_BURST_SIZE_2 ,Burst size of IDMAC's channel 41" "32,16,8,4" bitfld.long 0x04 11.--13. " DMFC_FIFO_SIZE_2 ,DMFC FIFO size for IDMAC's channel 41" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x04 8.--10. " DMFC_ST_ADDR_2 ,DMFC Start Address for IDMAC's channel 41" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x04 6.--7. " DMFC_BURST_SIZE_1 ,Burst size of IDMAC's channel 28" "32,16,8,4" textline " " bitfld.long 0x04 3.--5. " DMFC_FIFO_SIZE_1 ,DMFC FIFO size for IDMAC's channel 28" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x04 0.--2. " DMFC_ST_ADDR_1 ,DMFC Start Address for IDMAC's channel 28" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x08 "DMFC_WR_CHAN_DEF,DMFC Write Channel Definition Register" bitfld.long 0x08 29.--31. " DMFC_WM_CLR_2C ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x08 26.--28. " DMFC_WM_SET_2C ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 25. " DMFC_WM_EN_2C ,Watermark enable" "Disabled,Enabled" bitfld.long 0x08 21.--23. " DMFC_WM_CLR_1C ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 18.--20. " DMFC_WM_SET_1C ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x08 17. " DMFC_WM_EN_1C ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13.--15. " DMFC_WM_CLR_2 ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. " DMFC_WM_SET_2 ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 9. " DMFC_WM_EN_2 ,Watermark enable" "Disabled,Enabled" bitfld.long 0x08 5.--7. " DMFC_WM_CLR_1 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 2.--4. " DMFC_WM_SET_1 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1. " DMFC_WM_EN_1 ,Watermark enable" "Disabled,Enabled" line.long 0x0c "DMFC_DP_CHAN,DMFC Display Processor Channel Register" bitfld.long 0x0c 30.--31. " DMFC_BURST_SIZE_6F ,Burst size of IDMAC's channel 29" "32,16,8,4" bitfld.long 0x0c 27.--29. " DMFC_FIFO_SIZE_6F ,DMFC FIFO size for IDMAC's channel 29" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x0c 24.--26. " DMFC_ST_ADDR_6F ,DMFC Start Address for IDMAC's channel 29" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x0c 22.--23. " DMFC_BURST_SIZE_6B ,Burst size of IDMAC's channel 24" "32,16,8,4" textline " " bitfld.long 0x0c 19.--21. " DMFC_FIFO_SIZE_6B ,DMFC FIFO size for IDMAC's channel 24" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x0c 16.--18. " DMFC_ST_ADDR_6B ,DMFC Start Address for IDMAC's channel 24" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x0c 14.--15. " DMFC_BURST_SIZE_5F ,Burst size of IDMAC's channel 27" "32,16,8,4" bitfld.long 0x0c 11.--13. " DMFC_FIFO_SIZE_5F ,DMFC FIFO size for IDMAC's channel 27" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x0c 8.--10. " DMFC_ST_ADDR_5F ,DMFC Start Address for IDMAC's channel 27" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x0c 6.--7. " DMFC_BURST_SIZE_5B ,Burst size of IDMAC's channel 23" "32,16,8,4" textline " " bitfld.long 0x0c 3.--5. " DMFC_FIFO_SIZE_5B ,DMFC FIFO size for IDMAC's channel 23" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x0c 0.--2. " DMFC_ST_ADDR_5B ,DMFC Start Address for IDMAC's channel 23" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x10 "DMFC_DP_CHAN_DEF,DMFC Display Channel Definition Register" bitfld.long 0x10 29.--31. " DMFC_WM_CLR_6F ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x10 26.--28. " DMFC_WM_SET_6F ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 25. " DMFC_WM_EN_6F ,Watermark enable" "Disabled,Enabled" bitfld.long 0x10 21.--23. " DMFC_WM_CLR_6B ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 18.--20. " DMFC_WM_SET_6B ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x10 17. " DMFC_WM_EN_6B ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13.--15. " DMFC_WM_CLR_5F ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. " DMFC_WM_SET_5F ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 9. " DMFC_WM_EN_5F ,Watermark enable" "Disabled,Enabled" bitfld.long 0x10 5.--7. " DMFC_WM_CLR_5B ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 2.--4. " DMFC_WM_SET_5B ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. " DMFC_WM_EN_5B ,Watermark enable" "Disabled,Enabled" line.long 0x14 "DMFC_GENERAL1,DMFC General 1 Register" bitfld.long 0x14 24. " WAIT4EOT_9 ,FIFO #9 operation mode" "Normal,Wait4eot" bitfld.long 0x14 23. " WAIT4EOT_6F ,FIFO #6F operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 22. " WAIT4EOT_6B ,FIFO #6B operation mode" "Normal,Wait4eot" bitfld.long 0x14 21. " WAIT4EOT_5F ,FIFO #5F operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 20. " WAIT4EOT_5B ,FIFO #5B operation mode" "Normal,Wait4eot" bitfld.long 0x14 19. " WAIT4EOT_4 ,FIFO #4 operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 18. " WAIT4EOT_3 ,FIFO #3 operation mode" "Normal,Wait4eot" bitfld.long 0x14 17. " WAIT4EOT_2 ,FIFO #2 operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x14 16. " WAIT4EOT_1 ,FIFO #1 operation mode" "Normal,Wait4eot" bitfld.long 0x14 13.--15. " DMFC_WM_CLR_9 ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 10.--12. " DMFC_WM_SET_9 ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. " DMFC_WM_EN_9 ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5.--6. " DMFC_BURST_SIZE_9 ,Burst size of IDMAC's channel 44" "32,16,8,4" sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x14 0.--1. " DMFC_DCDP_SYNC_PR ,Burst size of IDMAC's channel 44" "Forbidden,DC over DP,DP over DC,Round Robin" else bitfld.long 0x14 0.--1. " DMFC_DCDP_SYNC_PR ,DMFC's memory access priority" "Forbidden,DC over DP,DP over DC,Round Robin" endif line.long 0x18 "DMFC_GENERAL2,DMFC General Register 2" hexmask.long.word 0x18 16.--28. 1. " DMFC_FRAME_HEIGHT_RD ,Frame height for read channel from the display to the IDMAC" hexmask.long.word 0x18 0.--12. 1. " DMFC_FRAME_WIDTH_RD ,Frame width for read channel from the display to the IDMAC" line.long 0x1c "DMFC_IC_CTRL,DMFC IC Interface Control Register" hexmask.long.word 0x1c 19.--31. 1. " DMFC_IC_FRAME_HEIGHT_RD ,Frame's height for the channel coming from IC" hexmask.long.word 0x1c 6.--18. 1. " DMFC_IC_FRAME_WIDTH_RD ,Frame's width for the channel coming from IC" textline " " bitfld.long 0x1c 4.--5. " DMFC_IC_PPW_C ,Pixel Per Word coded from IC" "8,16,24,?..." bitfld.long 0x1c 0.--2. " DMFC_IC_IN_PORT ,DMFC input port" "CH28,CH41,,,CH23,CH27,CH24,CH29" line.long 0x20 "DMFC_WR_CHAN_ALT,DMFC Write Channel Alternate Register" bitfld.long 0x20 14.--15. " DMFC_BURST_SIZE_2_ALT ,Burst size of IDMAC's channel 41" "32,16,8,4" bitfld.long 0x20 11.--13. " DMFC_FIFO_SIZE_2_ALT ,DMFC FIFO size for IDMAC's channel 41 (for alternate flow)" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x20 8.--10. " DMFC_FIFO_SIZE_2_ALT ,DMFC Start Address for IDMAC's channel 41 (for alternate flow)" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x24 "DMFC_WR_CHAN_DEF_ALT,DMFC Write Channel Definition Alternate Register" bitfld.long 0x24 13.--15. " DMFC_WM_CLR_2_ALT ,Watermark Clear (for alternate flow)" "0,1,2,3,4,5,6,7" bitfld.long 0x24 10.--12. " DMFC_WM_SET_2_ALT ,Watermark Set (for alternate flow)" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 9. " DMFC_WM_EN_2_ALT ,Watermark enable (for alternate flow)" "Disabled,Enabled" line.long 0x28 "DMFC_DP_CHAN_ALT,DMFC Display Processor Channel Alternate Register" bitfld.long 0x28 30.--31. " DMFC_BURST_SIZE_6F_ALT ,Burst size of IDMAC's channel 29" "32,16,8,4" bitfld.long 0x28 27.--29. " DMFC_FIFO_SIZE_6F_ALT ,DMFC FIFO size for IDMAC's channel 29" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x28 24.--26. " DMFC_ST_ADDR_6F_ALT ,DMFC Start Address for IDMAC's channel 29" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" bitfld.long 0x28 22.--23. " DMFC_BURST_SIZE_6B_ALT ,Burst size of IDMAC's channel 24" "32,16,8,4" textline " " bitfld.long 0x28 19.--21. " DMFC_FIFO_SIZE_6B_ALT ,DMFC FIFO size for IDMAC's channel 24" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" bitfld.long 0x28 16.--18. " DMFC_ST_ADDR_6B_ALT ,DMFC Start Address for IDMAC's channel 24" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" textline " " bitfld.long 0x28 6.--7. " DMFC_BURST_SIZE_5B_ALT ,Burst size of IDMAC's channel 23" "32,16,8,4" bitfld.long 0x28 3.--5. " DMFC_FIFO_SIZE_5B_ALT ,DMFC FIFO size for IDMAC's channel 23" "512X128,256X128,128X128,64X128,32X128,16X128,8X128,4X128" textline " " bitfld.long 0x28 0.--2. " DMFC_ST_ADDR_5B_ALT ,DMFC Start Address for IDMAC's channel 23" "Segment 0,Segment 1,Segment 2,Segment 3,Segment 4,Segment 5,Segment 6,Segment 7" line.long 0x2c "DMFC_DP_CHAN_DEF_ALT,DMFC Display Channel Definition Alternate Register" bitfld.long 0x2c 29.--31. " DMFC_WM_CLR_6F_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 26.--28. " DMFC_WM_SET_6F_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 25. " DMFC_WM_EN_6F_ALT ,Watermark enable" "Disabled,Enabled" bitfld.long 0x2c 21.--23. " DMFC_WM_CLR_6B_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 18.--20. " DMFC_WM_SET_6B_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 17. " DMFC_WM_EN_6B_ALT ,Watermark enable" "Disabled,Enabled" textline " " bitfld.long 0x2c 5.--7. " DMFC_WM_CLR_5B_ALT ,Watermark Clear" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 2.--4. " DMFC_WM_SET_5B_ALT ,Watermark Set" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 1. " DMFC_WM_EN_5B_ALT ,Watermark enable" "Disabled,Enabled" line.long 0x30 "DMFC_GENERAL1_ALT,DMFC General 1 Altenate Register" bitfld.long 0x30 23. " WAIT4EOT_6F_ALT ,FIFO #6F operation mode" "Normal,Wait4eot" bitfld.long 0x30 22. " WAIT4EOT_6B_ALT ,FIFO #6B operation mode" "Normal,Wait4eot" textline " " bitfld.long 0x30 20. " WAIT4EOT_5B_ALT ,FIFO #5B operation mode" "Normal,Wait4eot" bitfld.long 0x30 17. " WAIT4EOT_2_ALT ,FIFO #2 operation mode" "Normal,Wait4eot" rgroup.long 0x34++0x3 line.long 0x00 "DMFC_STAT,DMFC Status Register" bitfld.long 0x00 25. " DMFC_IC_BUFFER_EMPTY ,Indicates on a IC FIFO empty condition" "Not empty,Empty" bitfld.long 0x00 24. " DMFC_IC_BUFFER_FULL ,Indicates on a IC FIFO full condition" "Not full,Full" textline " " bitfld.long 0x00 23. " DMFC_FIFO_EMPTY_11 ,Indicates on a DMFC FIFO 11 empty condition" "Not empty,Empty" bitfld.long 0x00 22. " DMFC_FIFO_EMPTY_10 ,Indicates on a DMFC FIFO 10 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 21. " DMFC_FIFO_EMPTY_9 ,Indicates on a DMFC FIFO 9 empty condition" "Not empty,Empty" bitfld.long 0x00 20. " DMFC_FIFO_EMPTY_8 ,Indicates on a DMFC FIFO 8 (6F) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 19. " DMFC_FIFO_EMPTY_7 ,Indicates on a DMFC FIFO 7 (6b) empty condition" "Not empty,Empty" bitfld.long 0x00 18. " DMFC_FIFO_EMPTY_6 ,Indicates on a DMFC FIFO 6 (5f) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 17. " DMFC_FIFO_EMPTY_5 ,Indicates on a DMFC FIFO 5 (5b) empty condition" "Not empty,Empty" bitfld.long 0x00 16. " DMFC_FIFO_EMPTY_4 ,Indicates on a DMFC FIFO 4 (2c) empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 15. " DMFC_FIFO_EMPTY_3 ,Indicates on a DMFC FIFO 3 (1c) empty condition" "Not empty,Empty" bitfld.long 0x00 14. " DMFC_FIFO_EMPTY_2 ,Indicates on a DMFC FIFO 2 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 13. " DMFC_FIFO_EMPTY_1 ,Indicates on a DMFC FIFO 1 empty condition" "Not empty,Empty" bitfld.long 0x00 12. " DMFC_FIFO_EMPTY_0 ,Indicates on a DMFC FIFO 0 empty condition" "Not empty,Empty" textline " " bitfld.long 0x00 11. " DMFC_FIFO_FULL_11 ,Indicates on a DMFC FIFO 11 full condition" "Not full,Full" bitfld.long 0x00 10. " DMFC_FIFO_FULL_10 ,Indicates on a DMFC FIFO 10 full condition" "Not full,Full" textline " " bitfld.long 0x00 9. " DMFC_FIFO_FULL_9 ,Indicates on a DMFC FIFO 9 full condition" "Not full,Full" bitfld.long 0x00 8. " DMFC_FIFO_FULL_8 ,Indicates on a DMFC FIFO 8 (6f) full condition" "Not full,Full" textline " " bitfld.long 0x00 7. " DMFC_FIFO_FULL_7 ,Indicates on a DMFC FIFO 7 (6b) full condition" "Not full,Full" bitfld.long 0x00 6. " DMFC_FIFO_FULL_6 ,Indicates on a DMFC FIFO 6 (5f) full condition" "Not full,Full" textline " " bitfld.long 0x00 5. " DMFC_FIFO_FULL_5 ,Indicates on a DMFC FIFO 5 (5b) full condition" "Not full,Full" bitfld.long 0x00 4. " DMFC_FIFO_FULL_4 ,Indicates on a DMFC FIFO 4 (2c) full condition" "Not full,Full" textline " " bitfld.long 0x00 3. " DMFC_FIFO_FULL_3 ,Indicates on a DMFC FIFO 3 (1c) full condition" "Not full,Full" bitfld.long 0x00 2. " DMFC_FIFO_FULL_2 ,Indicates on a DMFC FIFO 2 full condition" "Not full,Full" textline " " bitfld.long 0x00 1. " DMFC_FIFO_FULL_1 ,Indicates on a DMFC FIFO 1 full condition" "Not full,Full" bitfld.long 0x00 0. " DMFC_FIFO_FULL_0 ,Indicates on a DMFC FIFO 0 full condition" "Not full,Full" width 0x0B tree.end tree "VDI Registers" base ad:0x02A68000 width 12. group.long 0x00++0x7 line.long 0x00 "VDI_FSIZE,VDI Field Size Register" sif ((!cpuis("IMX6*"))&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") hexmask.long.word 0x00 16.--25. 1. " VDI_FHEIGHT ,Frame height" hexmask.long.word 0x00 0.--9. 1. " VDI_FWIDTH ,Frame width" else hexmask.long.word 0x00 16.--26. 1. " VDI_FHEIGHT ,Frame height" hexmask.long.word 0x00 0.--10. 1. " VDI_FWIDTH ,Frame width" endif line.long 0x04 "VDI_C,VDI Control Register" bitfld.long 0x04 31. " VDI_TOP_FIELD_AUTO ,VDI top filed (automatic)" "0,1" bitfld.long 0x04 30. " VDI_TOP_FIELD_MAN ,VDI top filed (manual)" "0,1" textline " " bitfld.long 0x04 25.--27. " VDI_VWM3_CLR ,VDI WaterMark clear level for channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" bitfld.long 0x04 22.--24. " VDI_VWM3_SET ,VDI WaterMark set level for channel 3" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " sif (cpu()!="IMX53"&&(!cpuis("IMX6*"))&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538") bitfld.long 0x04 19.--21. " VDI_VWM1_CLR ,VDI WaterMark clear level for channel 1 or channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" else bitfld.long 0x04 19.--21. " VDI_VWM1_CLR ,VDI WaterMark clear level for channel 1 or channel 4" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" endif bitfld.long 0x04 16.--18. " VDI_VWM1_SET ,VDI WaterMark set level for channel 1 or channel 2" "Full on 1/8,Full on 2/8,Full on 3/8,Full on 4/8,Full on 5/8,Full on 6/8,Full on 7/8,Full" textline " " bitfld.long 0x04 12.--15. " VDI_BURST_SIZE3 ,Burst Size for channel 3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " VDI_BURST_SIZE2 ,Burst Size for channel 2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x04 4.--7. " VDI_BURST_SIZE1 ,Burst Size for channels 1 or 4" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 2.--3. " VDI_MOT_SEL ,Motion select" "ROM 1,ROM 2,Full motion,Forbidden" textline " " bitfld.long 0x04 1. " VDI_CH_422 ,Chroma format at input and output of VDI" "420,422" sif (cpu()=="IMX53"||cpuis("IMX6*")||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538") group.long 0x08++0x1B line.long 0x00 "VDI_C2,VDI Control Register 2" bitfld.long 0x00 3. " PLANE_1_EN ,Plane 1 enable" "Disabled,Enabled" bitfld.long 0x00 2. " GLB_A_EN ,Global alpha enable" "Local,Global" bitfld.long 0x00 1. " KEY_COLOR_EN ,Key Color Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CMB_EN ,Combining enable" "Disabled,Enabled" line.long 0x04 "VDI_CMDP_1,VDI Combining Parameters Register 1" hexmask.long.byte 0x04 24.--31. 1. " ALPHA ,Global Alpha" hexmask.long.byte 0x04 16.--23. 1. " KEY_COLOR_R ,Red component of Key Color" hexmask.long.byte 0x04 8.--15. 1. " KEY_COLOR_G ,Green component of Key Color" textline " " hexmask.long.byte 0x04 0.--7. 1. " KEY_COLOR_B ,Blue component of Key Color" line.long 0x08 "VDI_CMDP_2,VDI Combining Parameters Register 2" hexmask.long.byte 0x08 16.--23. 1. " VDI_KEY_COLOR_R ,Red component of background Color" hexmask.long.byte 0x08 8.--15. 1. " VDI_KEY_COLOR_G ,Green component of background Color" textline " " hexmask.long.byte 0x08 0.--7. 1. " VDI_KEY_COLOR_B ,Blue component of background Color" line.long 0x0C "VDI_PS_1,VDI Plane Size Register 1" hexmask.long.word 0x0C 16.--26. 1. " VDI_FHEIGHT1 ,Plane 1 height" hexmask.long.word 0x0C 0.--10. 1. " VDI_FWIDTH1 ,Plane 1 width" line.long 0x10 "VDI_PS_2,VDI Plane Size Register 2" hexmask.long.word 0x10 16.--26. 1. " VDI_OFFSET_VER1 ,Vertical offset of plane 1" hexmask.long.word 0x10 0.--10. 1. " VDI_OFFSET_HOR1 ,Horizontal offset of plane 1" line.long 0x14 "VDI_PS_3,VDI Plane Size Register 3" hexmask.long.word 0x14 16.--26. 1. " VDI_FHEIGHT3 ,Plane 3 height" hexmask.long.word 0x14 0.--10. 1. " VDI_FWIDTH3 ,Plane 3 width" line.long 0x18 "VDI_PS_4,VDI Plane Size Register 4" hexmask.long.word 0x18 16.--26. 1. " VDI_OFFSET_VER3 ,Vertical offset of plane 3" hexmask.long.word 0x18 0.--10. 1. " VDI_OFFSET_HOR3 ,Horizontal offset of plane 3" endif width 0xb tree.end tree.end endif tree.end endif tree "KPP (Keypad Port)" base ad:0x020B8000 width 6. group.word 0x00++0x7 line.word 0x00 "KPCR,Keypad Control Register" bitfld.word 0x00 15. " KCO7 ,Keypad Column Strobe Open-Drain Enable 7" "Totem pole,Open drain" bitfld.word 0x00 14. " KCO6 ,Keypad Column Strobe Open-Drain Enable 6" "Totem pole,Open drain" bitfld.word 0x00 13. " KCO5 ,Keypad Column Strobe Open-Drain Enable 5" "Totem pole,Open drain" bitfld.word 0x00 12. " KCO4 ,Keypad Column Strobe Open-Drain Enable 4" "Totem pole,Open drain" bitfld.word 0x00 11. " KCO3 ,Keypad Column Strobe Open-Drain Enable 3" "Totem pole,Open drain" bitfld.word 0x00 10. " KCO2 ,Keypad Column Strobe Open-Drain Enable 2" "Totem pole,Open drain" bitfld.word 0x00 9. " KCO1 ,Keypad Column Strobe Open-Drain Enable 1" "Totem pole,Open drain" bitfld.word 0x00 8. " KCO0 ,Keypad Column Strobe Open-Drain Enable 0" "Totem pole,Open drain" textline " " bitfld.word 0x00 7. " KRE7 ,Keypad Row Enable 7" "Disabled,Enabled" bitfld.word 0x00 6. " KRE6 ,Keypad Row Enable 6" "Disabled,Enabled" bitfld.word 0x00 5. " KRE5 ,Keypad Row Enable 5" "Disabled,Enabled" bitfld.word 0x00 4. " KRE4 ,Keypad Row Enable 4" "Disabled,Enabled" bitfld.word 0x00 3. " KRE3 ,Keypad Row Enable 3" "Disabled,Enabled" bitfld.word 0x00 2. " KRE2 ,Keypad Row Enable 2" "Disabled,Enabled" bitfld.word 0x00 1. " KRE1 ,Keypad Row Enable 1" "Disabled,Enabled" bitfld.word 0x00 0. " KRE0 ,Keypad Row Enable 0" "Disabled,Enabled" line.word 0x02 "KPSR,Keypad Status Register" bitfld.word 0x02 9. " KRIE ,Keypad Release Interrupt Enable" "Disabled,Enabled" bitfld.word 0x02 8. " KDIE ,Keypad Key Depress Interrupt Enable" "Disabled,Enabled" bitfld.word 0x02 3. " KRSS ,Key Release Synchronizer Set" "No effect,Set" bitfld.word 0x02 2. " KDSC ,Key Depress Synchronizer Clear" "No effect,Clear" eventfld.word 0x02 1. " KPKR ,Keypad Key Release" "Not released,Released" eventfld.word 0x02 0. " KPKD ,Keypad Key Depress" "Not depressed,Depressed" line.word 0x04 "KDDR,Keypad Data Direction Register" bitfld.word 0x04 15. " KCDD7 ,Keypad Column Data Direction 7" "Input,Output" bitfld.word 0x04 14. " KCDD6 ,Keypad Column Data Direction 6" "Input,Output" bitfld.word 0x04 13. " KCDD5 ,Keypad Column Data Direction 5" "Input,Output" bitfld.word 0x04 12. " KCDD4 ,Keypad Column Data Direction 4" "Input,Output" bitfld.word 0x04 11. " KCDD3 ,Keypad Column Data Direction 3" "Input,Output" bitfld.word 0x04 10. " KCDD2 ,Keypad Column Data Direction 2" "Input,Output" bitfld.word 0x04 9. " KCDD1 ,Keypad Column Data Direction 1" "Input,Output" bitfld.word 0x04 8. " KCDD0 ,Keypad Column Data Direction 0" "Input,Output" textline " " bitfld.word 0x04 7. " KRDD7 ,Keypad Row Data Direction 7" "Input,Output" bitfld.word 0x04 6. " KRDD6 ,Keypad Row Data Direction 6" "Input,Output" bitfld.word 0x04 5. " KRDD5 ,Keypad Row Data Direction 5" "Input,Output" bitfld.word 0x04 4. " KRDD4 ,Keypad Row Data Direction 4" "Input,Output" bitfld.word 0x04 3. " KRDD3 ,Keypad Row Data Direction 3" "Input,Output" bitfld.word 0x04 2. " KRDD2 ,Keypad Row Data Direction 2" "Input,Output" bitfld.word 0x04 1. " KRDD1 ,Keypad Row Data Direction 1" "Input,Output" bitfld.word 0x04 0. " KRDD0 ,Keypad Row Data Direction 0" "Input,Output" line.word 0x06 "KPDR,Keypad Data Register" bitfld.word 0x06 15. " KCD7 ,Keypad Column Data 7" "Pin=0,Pin=1" bitfld.word 0x06 14. " KCD6 ,Keypad Column Data 6" "Pin=0,Pin=1" bitfld.word 0x06 13. " KCD5 ,Keypad Column Data 5" "Pin=0,Pin=1" bitfld.word 0x06 12. " KCD4 ,Keypad Column Data 4" "Pin=0,Pin=1" bitfld.word 0x06 11. " KCD3 ,Keypad Column Data 3" "Pin=0,Pin=1" bitfld.word 0x06 10. " KCD2 ,Keypad Column Data 2" "Pin=0,Pin=1" bitfld.word 0x06 9. " KCD1 ,Keypad Column Data 1" "Pin=0,Pin=1" bitfld.word 0x06 8. " KCD0 ,Keypad Column Data 0" "Pin=0,Pin=1" textline " " bitfld.word 0x06 7. " KRD7 ,Keypad Row Data 7" "Pin=0,Pin=1" bitfld.word 0x06 6. " KRD6 ,Keypad Row Data 6" "Pin=0,Pin=1" bitfld.word 0x06 5. " KRD5 ,Keypad Row Data 5" "Pin=0,Pin=1" bitfld.word 0x06 4. " KRD4 ,Keypad Row Data 4" "Pin=0,Pin=1" bitfld.word 0x06 3. " KRD3 ,Keypad Row Data 3" "Pin=0,Pin=1" bitfld.word 0x06 2. " KRD2 ,Keypad Row Data 2" "Pin=0,Pin=1" bitfld.word 0x06 1. " KRD1 ,Keypad Row Data 1" "Pin=0,Pin=1" bitfld.word 0x06 0. " KRD0 ,Keypad Row Data 0" "Pin=0,Pin=1" width 0x0B tree.end sif (cpu()!="IMX6SOLOLITE") tree "LDB (LVDS Display Bridge)" base ad:0x020E0008 width 10. group.long 0x00++0x03 line.long 0x00 "LDB_CTRL,LDB Control Register" bitfld.long 0x00 20.--21. " COUNTER_RESET_VAL ,Reset value for the LDB counter which determines when the shift registers are loaded with data" "5,3,4,6" bitfld.long 0x00 16.--18. " LVDS_CLK_SHIFT ,Shifts the LVDS output clock in relation to the data" "1100011,1110001,1111000,1000111,0001111,0011111,0111100,1100011" textline " " bitfld.long 0x00 10. " DI1_VS_POLARITY ,Vsync polarity for IPU's DI1 interface" "High,Low" bitfld.long 0x00 9. " DI0_VS_POLARITY ,Vsync polarity for IPU's DI0 interface" "High,Low" bitfld.long 0x00 8. " BIT_MAPPING_CH1 ,Data mapping for LVDS channel 1" "SPWG,JEIDA" textline " " bitfld.long 0x00 7. " DATA_WIDTH_CH1 ,Data width for LVDS channel 1" "18 bits,24 bits" bitfld.long 0x00 6. " BIT_MAPPING_CH0 ,Data mapping for LVDS channel 0" "SPWG,JEIDA" bitfld.long 0x00 5. " DATA_WIDTH_CH0 ,Data width for LVDS channel 0" "18 bits,24 bits" textline " " bitfld.long 0x00 4. " SPLIT_MODE_EN ,Enable split mode" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CH1_MODE ,LVDS channel 1 operation mode" "Disabled,Enabled/D10,Disabled,Enabled/D11" bitfld.long 0x00 0.--1. " CH0_MODE ,LVDS channel 0 operation mode" "Disabled,Enabled/D10,Disabled,Enabled/D11" width 11. tree.end tree.open "MIPI" tree "MIPI_CSI (MIPI - Camera Serial Interface)" base ad:0x021DC000 width 24. rgroup.long 0x00++0x03 line.long 0x00 "MIPI_CSI_VERSION,Controller Version Identification Register" group.long 0x04++0x0F line.long 0x00 "MIPI_CSI_N_LANES,Number of Active Data Lanes" sif (cpu()=="IMX6SOLO"||cpu()=="IMX6DUALLITE") bitfld.long 0x00 0. " N_LANES ,Number of Active Data Lanes" "1,2" else bitfld.long 0x00 0.--1. " N_LANES ,Number of Active Data Lanes" "1,2,3,4" endif line.long 0x04 "MIPI_CSI_PHY_SHUTDOWNZ,Phy shutdown control" bitfld.long 0x04 0. " PHY_SHUTDOWNZ ,Phy shutdown control" "Low,High" line.long 0x08 "MIPI_CSI_DPHY_RSTZ,Phy reset control" bitfld.long 0x08 0. " DPHY_RSTZ ,DPHY reset output" "Reset,No effect" line.long 0x0C "MIPI_CSI_CSI2_RESETN,CSI2 controller reset" bitfld.long 0x0C 0. " CSI2_RESETN ,CSI-2 controller reset output" "Reset,No effect" group.long 0x14++0x03 line.long 0x00 "MIPI_CSI_PHY_STATE,General settings for all blocks" rbitfld.long 0x00 11. " BYPASS_2ECC_TST ,Payload Bypass test mode for double ECC errors" "Not bypassed,Bypassed" rbitfld.long 0x00 10. " PHY_STOPSTATECLK ,Clock Lane in Stop state" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PHY_RXULPSCLKNOT ,Indicates that the Clock Lane module has entered the Ultra Low Power state" "Not occurred,Occurred" rbitfld.long 0x00 8. " PHY_RXCLKACTIVEHS ,Indicates that the clock lane is actively receiving a DDR clock" "Not occurred,Occurred" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") rbitfld.long 0x00 7. " PHY_STOPSTATEDATA_3 ,Data Lane 3 in Stop state" "Not occurred,Occurred" rbitfld.long 0x00 6. " PHY_STOPSTATEDATA_2 ,Data Lane 2 in Stop state" "Not occurred,Occurred" textline " " endif rbitfld.long 0x00 5. " PHY_STOPSTATEDATA_1 ,Data Lane 1 in Stop state" "Not occurred,Occurred" rbitfld.long 0x00 4. " PHY_STOPSTATEDATA_0 ,Data Lane 0 in Stop state" "Not occurred,Occurred" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") rbitfld.long 0x00 3. " PHY_RXULPSESC_3 ,Lane module 3 has entered the Ultra Low Power mode" "Not occurred,Occurred" rbitfld.long 0x00 2. " PHY_RXULPSESC_2 ,Lane module 2 has entered the Ultra Low Power mode" "Not occurred,Occurred" textline " " endif rbitfld.long 0x00 1. " PHY_RXULPSESC_1 ,Lane module 1 has entered the Ultra Low Power mode" "Not occurred,Occurred" rbitfld.long 0x00 0. " PHY_RXULPSESC_0 ,Lane module 0 has entered the Ultra Low Power mode" "Not occurred,Occurred" group.long 0x18++0x03 line.long 0x00 "MIPI_CSI_DATA_IDS_1,Data IDs for which IDI reports line boundary matching errors" bitfld.long 0x00 30.--31. " DI3_VC ,Data ID 3 Virtual channel" "0,1,2,3" bitfld.long 0x00 24.--29. " DI3_DT ,Data ID 3 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 22.--23. " DI2_VC ,Data ID 2 Virtual channel" "0,1,2,3" bitfld.long 0x00 16.--21. " DI2_DT ,Data ID 2 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 14.--15. " DI1_VC ,Data ID 1 Virtual channel" "0,1,2,3" bitfld.long 0x00 8.--13. " DI1_DT ,Data ID 1 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 6.--7. " DI0_VC ,Data ID 0 Virtual channel" "0,1,2,3" bitfld.long 0x00 0.--5. " DI0_DT ,Data ID 0 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.long 0x1C++0x03 line.long 0x00 "MIPI_CSI_DATA_IDS_2,Data IDs for which IDI reports line boundary matching errors" bitfld.long 0x00 30.--31. " DI7_VC ,Data ID 7 Virtual channel" "0,1,2,3" bitfld.long 0x00 24.--29. " DI7_DT ,Data ID 7 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 22.--23. " DI6_VC ,Data ID 6 Virtual channel" "0,1,2,3" bitfld.long 0x00 16.--21. " DI6_DT ,Data ID 6 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 14.--15. " DI5_VC ,Data ID 5 Virtual channel" "0,1,2,3" bitfld.long 0x00 8.--13. " DI5_DT ,Data ID 5 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." textline " " bitfld.long 0x00 6.--7. " DI4_VC ,Data ID 4 Virtual channel" "0,1,2,3" bitfld.long 0x00 0.--5. " DI4_DT ,Data ID 4 Data Type" "Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Synchronization Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Short Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,Generic Long Packet Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,YUV Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RGB Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,RAW Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,User Defined Byte-based Data,?..." endif rgroup.long 0x20++0x07 line.long 0x00 "MIPI_CSI_ERR1,Error state register 1" bitfld.long 0x00 28. " ERR_ECC_DOUBLE ,Header ECC contains 2 errors" "No error,Error" bitfld.long 0x00 27. " VC3_ERR_CRC ,Checksum Error detected on Virtual Channel 3" "No error,Error" textline " " bitfld.long 0x00 26. " VC2_ERR_CRC ,Checksum Error detected on Virtual Channel 2" "No error,Error" bitfld.long 0x00 25. " VC1_ERR_CRC ,Checksum Error detected on Virtual Channel 1" "No error,Error" textline " " bitfld.long 0x00 24. " VC0_ERR_CRC ,Checksum Error detected on Virtual Channel 0" "No error,Error" bitfld.long 0x00 23. " ERR_I_SEQ_DI3 ,Error in the sequence of lines for vc3 and dt3" "No error,Error" textline " " bitfld.long 0x00 22. " ERR_I_SEQ_DI2 ,Error in the sequence of lines for vc2 and dt2" "No error,Error" bitfld.long 0x00 21. " ERR_I_SEQ_DI1 ,Error in the sequence of lines for vc1 and dt1" "No error,Error" textline " " bitfld.long 0x00 20. " ERR_I_SEQ_DI0 ,Error in the sequence of lines for vc0 and dt0" "No error,Error" bitfld.long 0x00 19. " ERR_I_BNDRY_MATCH_DI3 ,Error matching Line Start with Line End for vc3 and dt3" "No error,Error" textline " " bitfld.long 0x00 18. " ERR_I_BNDRY_MATCH_DI2 ,Error matching Line Start with Line End for vc2 and dt2" "No error,Error" bitfld.long 0x00 17. " ERR_I_BNDRY_MATCH_DI1 ,Error matching Line Start with Line End for vc1 and dt1" "No error,Error" textline " " bitfld.long 0x00 16. " ERR_I_BNDRY_MATCH_DI0 ,Error matching Line Start with Line End for vc0 and dt0" "No error,Error" bitfld.long 0x00 15. " ERR_FRAME_DATA_VC3 ,Last received frame, in Virtual Channel 3, had at least one CRC error" "No error,Error" textline " " bitfld.long 0x00 14. " ERR_FRAME_DATA_VC2 ,Last received frame, in Virtual Channel 2, had at least one CRC error" "No error,Error" bitfld.long 0x00 13. " ERR_FRAME_DATA_VC1 ,Last received frame, in Virtual Channel 1, had at least one CRC error" "No error,Error" textline " " bitfld.long 0x00 12. " ERR_FRAME_DATA_VC0 ,Last received frame, in Virtual Channel 0, had at least one CRC error" "No error,Error" bitfld.long 0x00 11. " ERR_F_SEQ_VC3 ,Incorrect Frame Sequence detected in Virtual Channel 3" "No error,Error" textline " " bitfld.long 0x00 10. " ERR_F_SEQ_VC2 ,Incorrect Frame Sequence detected in Virtual Channel 2" "No error,Error" bitfld.long 0x00 9. " ERR_F_SEQ_VC1 ,Incorrect Frame Sequence detected in Virtual Channel 1" "No error,Error" textline " " bitfld.long 0x00 8. " ERR_F_SEQ_VC0 ,Incorrect Frame Sequence detected in Virtual Channel 0" "No error,Error" bitfld.long 0x00 7. " ERR_F_BNDRY_MATCH_VC3 ,Error matching Frame Start with Frame End for Virtual Channel 3" "No error,Error" textline " " bitfld.long 0x00 6. " ERR_F_BNDRY_MATCH_VC2 ,Error matching Frame Start with Frame End for Virtual Channel 2" "No error,Error" bitfld.long 0x00 5. " ERR_F_BNDRY_MATCH_VC1 ,Error matching Frame Start with Frame End for Virtual Channel 1" "No error,Error" textline " " bitfld.long 0x00 4. " ERR_F_BNDRY_MATCH_VC0 ,Error matching Frame Start with Frame End for Virtual Channel 0" "No error,Error" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x00 3. " PHY_ERRSOTSYNCHS_3 ,Start of Transmission Error on data lane 3" "No error,Error" bitfld.long 0x00 2. " PHY_ERRSOTSYNCHS_2 ,Start of Transmission Error on data lane 2" "No error,Error" textline " " endif bitfld.long 0x00 1. " PHY_ERRSOTSYNCHS_1 ,Start of Transmission Error on data lane 1" "No error,Error" bitfld.long 0x00 0. " PHY_ERRSOTSYNCHS_0 ,Start of Transmission Error on data lane 0" "No error,Error" line.long 0x04 "MIPI_CSI_ERR2,Error state register 2" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x04 23. " ERR_I_SEQ_DI7 ,Error in the sequence of lines for vc7 and dt7" "No error,Error" bitfld.long 0x04 22. " ERR_I_SEQ_DI6 ,Error in the sequence of lines for vc6 and dt6" "No error,Error" textline " " bitfld.long 0x04 21. " ERR_I_SEQ_DI5 ,Error in the sequence of lines for vc5 and dt5" "No error,Error" bitfld.long 0x04 20. " ERR_I_SEQ_DI4 ,Error in the sequence of lines for vc4 and dt4" "No error,Error" textline " " bitfld.long 0x04 19. " ERR_I_BNDRY_MATCH_DI7 ,Error matching Line Start with Line End for vc7 and dt7" "No error,Error" bitfld.long 0x04 18. " ERR_I_BNDRY_MATCH_DI6 ,Error matching Line Start with Line End for vc6 and dt6" "No error,Error" textline " " bitfld.long 0x04 17. " ERR_I_BNDRY_MATCH_DI5 ,Error matching Line Start with Line End for vc5 and dt5" "No error,Error" bitfld.long 0x04 16. " ERR_I_BNDRY_MATCH_DI4 ,Error matching Line Start with Line End for vc4 and dt4" "No error,Error" textline " " endif bitfld.long 0x04 15. " ERR_ID_VC3 ,Unrecognized or unimplemented data type detected in Virtual Channel 3" "No error,Error" bitfld.long 0x04 14. " ERR_ID_VC2 ,Unrecognized or unimplemented data type detected in Virtual Channel 2" "No error,Error" textline " " bitfld.long 0x04 13. " ERR_ID_VC1 ,Unrecognized or unimplemented data type detected in Virtual Channel 1" "No error,Error" bitfld.long 0x04 12. " ERR_ID_VC0 ,Unrecognized or unimplemented data type detected in Virtual Channel 0" "No error,Error" textline " " bitfld.long 0x04 11. " VC3_ERR_ECC_CORRECTED ,Header error detected and corrected on Virtual Channel 3" "No error,Error" bitfld.long 0x04 10. " VC2_ERR_ECC_CORRECTED ,Header error detected and corrected on Virtual Channel 2" "No error,Error" textline " " bitfld.long 0x04 9. " VC1_ERR_ECC_CORRECTED ,Header error detected and corrected on Virtual Channel 1" "No error,Error" bitfld.long 0x04 8. " VC0_ERR_ECC_CORRECTED ,Header error detected and corrected on Virtual Channel 0" "No error,Error" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x04 7. " PHY_ERRSOTHS_3 ,Start of Transmission Error on data lane 3" "No error,Error" bitfld.long 0x04 6. " PHY_ERRSOTHS_2 ,Start of Transmission Error on data lane 2" "No error,Error" textline " " endif bitfld.long 0x04 5. " PHY_ERRSOTHS_1 ,Start of Transmission Error on data lane 1" "No error,Error" bitfld.long 0x04 4. " PHY_ERRSOTHS_0 ,Start of Transmission Error on data lane 0" "No error,Error" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x04 3. " PHY_ERRESC_3 ,Escape Entry Error (ULPM) on data lane 3" "No error,Error" bitfld.long 0x04 2. " PHY_ERRESC_2 ,Escape Entry Error (ULPM) on data lane 2" "No error,Error" textline " " endif bitfld.long 0x04 1. " PHY_ERRESC_1 ,Escape Entry Error (ULPM) on data lane 1" "No error,Error" bitfld.long 0x04 0. " PHY_ERRESC_0 ,Escape Entry Error (ULPM) on data lane 0" "No error,Error" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") group.long 0x28++0x03 line.long 0x00 "MIPI_CSI_MASK1,Masks for errors 1" bitfld.long 0x00 28. " MASK_ERR_ECC_DOUBLE ,Header ECC Mask" "Masked,Not masked" bitfld.long 0x00 27. " MASK_VC3_ERR_CRC ,Checksum Error Virtual Channel 3 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 26. " MASK_VC2_ERR_CRC ,Checksum Error Virtual Channel 2 Mask" "Masked,Not masked" bitfld.long 0x00 25. " MASK_VC1_ERR_CRC ,Checksum Error Virtual Channel 1 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 24. " MASK_VC0_ERR_CRC ,Checksum Error Virtual Channel 0 Mask" "Masked,Not masked" bitfld.long 0x00 23. " MASK_ERR_I_SEQ_DI3 ,Vc3 and dt3 Error Mask" "Masked,Not masked" textline " " bitfld.long 0x00 22. " MASK_ERR_I_SEQ_DI2 ,Vc2 and dt2 Error Mask" "Masked,Not masked" bitfld.long 0x00 21. " MASK_ERR_I_SEQ_DI1 ,Vc1 and dt1 Error Mask" "Masked,Not masked" textline " " bitfld.long 0x00 20. " MASK_ERR_I_SEQ_DI0 ,Vc0 and dt0 Error Mask" "Masked,Not masked" bitfld.long 0x00 19. " MASK_ERR_I_BNDRY_MATCH_DI3 ,Error matching Line Start with Line End for vc3 and dt3 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 18. " MASK_ERR_I_BNDRY_MATCH_DI2 ,Error matching Line Start with Line End for vc2 and dt2 Mask" "Masked,Not masked" bitfld.long 0x00 17. " MASK_ERR_I_BNDRY_MATCH_DI1 ,Error matching Line Start with Line End for vc1 and dt1 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 16. " MASK_ERR_I_BNDRY_MATCH_DI0 ,Error matching Line Start with Line End for vc0 and dt0 Mask" "Masked,Not masked" bitfld.long 0x00 15. " MASK_ERR_FRAME_DATA_VC3 ,CRC error Virtual Channel 3 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 14. " MASK_ERR_FRAME_DATA_VC2 ,CRC error Virtual Channel 2 Mask" "Masked,Not masked" bitfld.long 0x00 13. " MASK_ERR_FRAME_DATA_VC1 ,CRC error Virtual Channel 1 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 12. " MASK_ERR_FRAME_DATA_VC0 ,CRC error Virtual Channel 0 Mask" "Masked,Not masked" bitfld.long 0x00 11. " MASK_ERR_F_SEQ_VC3 ,Incorrect Frame Sequence Virtual Channel 3 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 10. " MASK_ERR_F_SEQ_VC2 ,Incorrect Frame Sequence Virtual Channel 2 Mask" "Masked,Not masked" bitfld.long 0x00 9. " MASK_ERR_F_SEQ_VC1 ,Incorrect Frame Sequence Virtual Channel 1 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 8. " MASK_ERR_F_SEQ_VC0 ,Incorrect Frame Sequence Virtual Channel 0 Mask" "Masked,Not masked" bitfld.long 0x00 7. " MASK_ERR_F_BNDRY_MATCH_VC3 ,Error matching Virtual Channel 3 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 6. " MASK_ERR_F_BNDRY_MATCH_VC2 ,Error matching Virtual Channel 2 Mask" "Masked,Not masked" bitfld.long 0x00 5. " MASK_ERR_F_BNDRY_MATCH_VC1 ,Error matching Virtual Channel 1 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 4. " MASK_ERR_F_BNDRY_MATCH_VC0 ,Error matching Virtual Channel 0 Mask" "Masked,Not masked" bitfld.long 0x00 3. " MASK_PHY_ERRSOTSYNCHS_3 ,Start of Transmission Error on data lane 3" "Masked,Not masked" textline " " bitfld.long 0x00 2. " MASK_PHY_ERRSOTSYNCHS_2 ,Start of Transmission Error on data lane 2" "Masked,Not masked" bitfld.long 0x00 1. " MASK_PHY_ERRSOTSYNCHS_1 ,Start of Transmission Error on data lane 1" "Masked,Not masked" textline " " bitfld.long 0x00 0. " MASK_PHY_ERRSOTSYNCHS_0 ,Start of Transmission Error on data lane 0" "Masked,Not masked" endif group.long 0x2C++0x0B line.long 0x00 "MIPI_CSI_MASK2,Masks for errors 2" sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x00 23. " MASK_ERR_I_SEQ_DI7 ,Vc7 and dt7 Error Mask" "Masked,Not masked" bitfld.long 0x00 22. " MASK_ERR_I_SEQ_DI6 ,Vc6 and dt6 Error Mask" "Masked,Not masked" textline " " bitfld.long 0x00 21. " MASK_ERR_I_SEQ_DI5 ,Vc5 and dt5 Error Mask" "Masked,Not masked" bitfld.long 0x00 20. " MASK_ERR_I_SEQ_DI4 ,Vc4 and dt4 Error Mask" "Masked,Not masked" textline " " bitfld.long 0x00 19. " MASK_ERR_I_BNDRY_MATCH_DI7 ,Error matching Line Start with Line End for vc7 and dt7" "Masked,Not masked" bitfld.long 0x00 18. " MASK_ERR_I_BNDRY_MATCH_DI6 ,Error matching Line Start with Line End for vc6 and dt6" "Masked,Not masked" textline " " bitfld.long 0x00 17. " MASK_ERR_I_BNDRY_MATCH_DI5 ,Error matching Line Start with Line End for vc5 and dt5" "Masked,Not masked" bitfld.long 0x00 16. " MASK_ERR_I_BNDRY_MATCH_DI4 ,Error matching Line Start with Line End for vc4 and dt4" "Masked,Not masked" textline " " endif bitfld.long 0x00 15. " MASK_ERR_ID_VC3 ,Unrecognized or unimplemented data type detected in Virtual Channel 3 Mask" "Masked,Not masked" bitfld.long 0x00 14. " MASK_ERR_ID_VC2 ,Unrecognized or unimplemented data type detected in Virtual Channel 2 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 13. " MASK_ERR_ID_VC1 ,Unrecognized or unimplemented data type detected in Virtual Channel 1 Mask" "Masked,Not masked" bitfld.long 0x00 12. " MASK_ERR_ID_VC0 ,Unrecognized or unimplemented data type detected in Virtual Channel 0 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 11. " MASK_VC3_ERR_ECC_CORRECTED ,Header error Virtual Channel 3 Mask" "Masked,Not masked" bitfld.long 0x00 10. " MASK_VC2_ERR_ECC_CORRECTED ,Header error Virtual Channel 2 Mask" "Masked,Not masked" textline " " bitfld.long 0x00 9. " MASK_VC1_ERR_ECC_CORRECTED ,Header error Virtual Channel 1 Mask" "Masked,Not masked" bitfld.long 0x00 8. " MASK_VC0_ERR_ECC_CORRECTED ,Header error Virtual Channel 0 Mask" "Masked,Not masked" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x00 7. " MASK_PHY_ERRSOTHS_3 ,Start of Transmission Error on data lane 3 Mask" "Masked,Not masked" bitfld.long 0x00 6. " MASK_PHY_ERRSOTHS_2 ,Start of Transmission Error on data lane 2 Mask" "Masked,Not masked" textline " " endif bitfld.long 0x00 5. " MASK_PHY_ERRSOTHS_1 ,Start of Transmission Error on data lane 1 Mask" "Masked,Not masked" bitfld.long 0x00 4. " MASK_PHY_ERRSOTHS_0 ,Start of Transmission Error on data lane 0 Mask" "Masked,Not masked" textline " " sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6DUALLITE") bitfld.long 0x00 3. " MASK_PHY_ERRESC_3 ,Escape Entry Error on data lane 3 Mask" "Masked,Not masked" bitfld.long 0x00 2. " MASK_PHY_ERRESC_2 ,Escape Entry Error on data lane 2 Mask" "Masked,Not masked" textline " " endif bitfld.long 0x00 1. " MASK_PHY_ERRESC_1 ,Escape Entry Error on data lane 1 Mask" "Masked,Not masked" bitfld.long 0x00 0. " MASK_PHY_ERRESC_0 ,Escape Entry Error on data lane 0 Mask" "Masked,Not masked" line.long 0x04 "MIPI_CSI_PHY_TST_CRTL0,D-PHY Test interface control 0" bitfld.long 0x04 1. " PHY_TESTCLK ,PHY test interface strobe signal" "Disabled,Enabled" bitfld.long 0x04 0. " PHY_TESTCLR ,PHY test interface clear" "Disabled,Enabled" line.long 0x08 "MIPI_CSI_PHY_TST_CTRL1,D-PHY Test interface control 1" bitfld.long 0x08 16. " PHY_TESTEN ,PHY test interface operation selector" "Rising edge,Falling edge" hexmask.long.byte 0x08 8.--15. 1. " PHY_TESTDOUT ,PHY output 8-bit data bus for read-back and internal probing functionalities" textline " " hexmask.long.byte 0x08 0.--7. 1. " PHY_TESTDIN ,PHY test interface input 8-bit data bus for internal register programming and test functionalities access" width 0x0B tree.end tree "MIPI_DSI (MIPI DSI Host Controller)" base ad:0x021E0000 width 25. rgroup.long 0x00++0x03 line.long 0x00 "MIPI_DSI_VERSION,Version of the DSI host ctrl" group.long 0x04++0x67 line.long 0x00 "MIPI_DSI_PWR_UP,Core power up" bitfld.long 0x00 0. " SHUTDOWNZ ,Core power up" "Reset,Power up" line.long 0x04 "MIPI_DSI_CLKMGR_CFG,Number of active data lanes" hexmask.long.byte 0x04 8.--15. 1. " TO_CLK_DIVIDSION ,Division factor for Time Out clock" hexmask.long.byte 0x04 0.--7. 1. " TX_ESC_CLK_DIVIDSION ,Division factor for TX ESCAPE clock source" line.long 0x08 "MIPI_DSI_DPI_CFG,DPI interface configuration" bitfld.long 0x08 10. " EN18_LOOSELY ,Enable 18 loosely packet pixel stream" "Disabled,Enabled" bitfld.long 0x08 9. " COLORM_ACTIVE_LOW ,Set to configure Color Mode pin" "Enabled,Disabled" textline " " bitfld.long 0x08 8. " SHUTD_ACTIVE_LOW ,Set to configure Shut Down pin" "Enabled,Disabled" bitfld.long 0x08 7. " HSYNC_ACTIVE_LOW ,Set to configure Horizontal Synchronism pin" "Enabled,Disabled" textline " " bitfld.long 0x08 6. " VSYNC_ACTIVE_LOW ,Set to configure Vertical Synchronism pin" "Enabled,Disabled" bitfld.long 0x08 5. " DATAEN_ACTIVE_LOW ,Set to configure Data enable pin" "Enabled,Disabled" textline " " bitfld.long 0x08 2.--4. " DPI_COLOR_CODING ,DPI color coding" "16bit config1,16bit config2,16bit config3,18bit config1,18bit config2,24 bit,24 bit,24 bit" bitfld.long 0x08 0.--1. " DPI_VID ,Configures the DPI Virtual Channel ID" "0,1,2,3" line.long 0x0C "MIPI_DSI_DBI_CFG,DBI interface configuration" bitfld.long 0x0C 9.--12. " OUT_DBI_CONF ,Configures the DBI output pixel data configuration" "8bit 8bpp,8bit 12bpp,8bit 16bpp,8bit 18bpp,8bit 24bpp,9bit 18bpp,16bit 8bpp,16bit 12bpp,16bit 16bpp,16bit 18bpp option1,16bit 18bpp option2,16bit 24bpp option1,16bit 24bpp option2,?..." bitfld.long 0x0C 8. " PARTITIONING_EN ,Enables write memory continue through input command" "Disabled,Enabled" textline " " bitfld.long 0x0C 6.--7. " LUT_SIZE_CONF ,Configures the size used to transport Write Lut commands" "16-bit color,18-bit color,24-bit color,16-bit color" bitfld.long 0x0C 2.--5. " IN_DBI_CONF ,Configures DBI input pixel data configuration" "8bit 8bpp,8bit 12bpp,8bit 16bpp,8bit 18bpp,8bit 24bpp,9bit 18bpp,16bit 8bpp,16bit 12bpp,16bit 16bpp,16bit 18bpp option1,16bit 18bpp option2,16bit 24bpp option1,16bit 24bpp option2,?..." textline " " bitfld.long 0x0C 0.--1. " DBI_VID ,Configures the DBI Virtual Channel ID" "0,1,2,3" line.long 0x10 "MIPI_DSI_DBIS_CMDSIZE,DBI command size configuration" hexmask.long.word 0x10 16.--31. 1. " ALLOWED_CMD_SIZE ,Configures the maximum allowed size of a DCS write memory command" hexmask.long.word 0x10 0.--15. 1. " WR_CMD_SIZE ,Configures the size of the DCS write memory commands" line.long 0x14 "MIPI_DSI_PCKHDL_CFG,Packet handler configuration" bitfld.long 0x14 5.--6. " GEN_VID_RX ,Generic interface read-back Virtual Channel identification" "0,1,2,3" bitfld.long 0x14 4. " EN_CRC_RX ,Enables CRC reception and error reporting" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " EN_ECC_RX ,Enables ECC reception, error correction and reporting" "Disabled,Enabled" bitfld.long 0x14 2. " EN_BTA ,Enables Bus Turn-Around request" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " EN_EOTN_RX ,Enables EOTp reception" "Disabled,Enabled" bitfld.long 0x14 0. " EN_EOTP_TX ,Enables EOTp transmission" "Disabled,Enabled" line.long 0x18 "MIPI_DSI_VID_MODE_CFG,Video Mode Configuration" bitfld.long 0x18 11. " FRAME_BTA_ACK ,Enables the request for an acknowledge response at the end of a frame" "Disabled,Enabled" bitfld.long 0x18 10. " EN_NULL_PKT ,Enables the tranmission of null packets in the HACT period" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " EN_MULTI_PKT ,Enables the tranmission of multi video packets in the HACT period" "Disabled,Enabled" bitfld.long 0x18 8. " EN_LP_HFP ,Enables return to Low Power inside HFP period when timing allows" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " EN_LP_HBP ,Enables return to Low Power inside HBP period when timing allows" "Disabled,Enabled" bitfld.long 0x18 6. " EN_LP_VACT ,Enables return to Low Power inside VACT period when timing allows" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " EN_LP_VFP ,Enables return to Low Power inside VFP period when timing allows" "Disabled,Enabled" bitfld.long 0x18 4. " EN_LP_VBP ,Enables return to Low Power inside VBP period when timing allows" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " EN_LP_VSA ,Enables return to Low Power inside VSA period when timing allows" "Disabled,Enabled" bitfld.long 0x18 1.--2. " VID_MODE_TYPE ,Selects video mode transmission type" "Non-burst with Sync pulses,Non-burst with Sync events,Burst with Sync pulses,Burst with Sync pulses" textline " " bitfld.long 0x18 0. " EN_VIDEO_MODE ,Enables DPI Video mode transmission" "Disabled,Enabled" line.long 0x1C "MIPI_DSI_VID_PKT_CFG,Video packet configuration" hexmask.long.word 0x1C 21.--30. 1. " NULL_PKT_SIZE ,Configures the number of bytes in a null packet" hexmask.long.word 0x1C 11.--20. 1. " NUM_CHUNKS ,Configures the number of chunks to be transmitted during a Line period" textline " " hexmask.long.word 0x1C 0.--10. 1. " VID_PKT_SIZE ,Configures the number of pixel on a single video packet" line.long 0x20 "MIPI_DSI_CMD_MODE_CFG,Command mode configuration" bitfld.long 0x20 14. " EN_TEAR_FX ,Enables the tearing effect acknowledge request" "Disabled,Enabled" bitfld.long 0x20 13. " EN_ACK_RQST ,Enables the acknowledge request after each packet transmission" "Disabled,Enabled" textline " " bitfld.long 0x20 12. " DCS_LW_TX ,Configures the DCS Long Write Packet command transmission type" "High speed,Low power" bitfld.long 0x20 11. " GEN_LW_TX ,Configures the Generic Long Write Packet command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 10. " MAX_RD_PKT_SIZE ,Configures the Maximum Read Packet Size command transmission type" "High speed,Low power" bitfld.long 0x20 9. " DCS_SW_2P_TX ,Configures the DCS Short Write Packet with 2 Parameters command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 8. " DCS_SW_1P_TX ,Configures the DCS Short Write Packet with 1 Parameters command transmission type" "High speed,Low power" bitfld.long 0x20 7. " DCS_SW_0P_TX ,Configures the DCS Short Write Packet with 0 Parameters command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 6. " GEN_SR_2P_TX ,Configures the Generic Short Read Packet with 2 Parameters command transmission type" "High speed,Low power" bitfld.long 0x20 5. " GEN_SR_1P_TX ,Configures the Generic Short Read Packet with 1 Parameters command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 4. " GEN_SR_0P_TX ,Configures the Generic Short Read Packet with 0 Parameters command transmission type" "High speed,Low power" bitfld.long 0x20 3. " GEN_SW_2P_TX ,Configures the Generic Short Write Packet with 2 Parameters command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 2. " GEN_SW_1P_TX ,Configures the Generic Short Write Packet with 1 Parameters command transmission type" "High speed,Low power" bitfld.long 0x20 1. " GEN_SW_0P_TX ,Configures the Generic Short Write Packet with 0 Parameters command transmission type" "High speed,Low power" textline " " bitfld.long 0x20 0. " EN_CMD_MODE ,Enables the Command Mode Protocol for transmissions" "Disabled,Enabled" line.long 0x24 "MIPI_DSI_TMR_LINE_CFG,Line timer configuration" hexmask.long.word 0x24 18.--31. 1. " HLINE_TIME ,Configures the size of the total line counted in lane byte cycles" hexmask.long.word 0x24 9.--17. 1. " HBP_TIME ,Configures the Horizontal Back Porch period in lane byte clock cycles" textline " " hexmask.long.word 0x24 0.--8. 1. " HSA_TIME ,Configures the Horizontal Synchronism Active period in lane byte clock cycles" line.long 0x28 "MIPI_DSI_VTIMING_CFG,Vertical timing configuration" hexmask.long.word 0x28 16.--26. 1. " V_ACTIVE_LINES ,Configures the Vertical Active period measured in horizontal lines" bitfld.long 0x28 10.--15. " VFP_LINES ,Configures the Vertical Front Porch period measured in horizontal lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x28 4.--9. " VBP_LINES ,Configures the Vertical Back Porch period measured in horizontal lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 0.--3. " VSA_LINES ,Configures the Vertical Synchronism Active period measured in horizontal lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "MIPI_DSI_PHY_TMR_CFG,D-PHY timing configuration" hexmask.long.byte 0x2C 20.--27. 1. " PHY_HS2LP_TIME ,Configures the maximum time that the PHY takes to go from High Speed to Low Power transmission" hexmask.long.byte 0x2C 12.--19. 1. " PHY_LP2HS_TIME ,Configures the maximum time that the PHY takes to go from Low Power to High Speed transmission" textline " " hexmask.long.word 0x2C 0.--11. 1. " BTA_TIME ,Configures the maximum time required to perform the Bus Turn Around operation" line.long 0x30 "MIPI_DSI_GEN_HDR,Generic packet Header configuration" hexmask.long.word 0x30 8.--23. 1. " GEN_HDATA ,Configures the packet data to be transmitted through the generic interface" hexmask.long.byte 0x30 0.--7. 1. " GEN_HTYPE ,Configures the packet type to be transmitted through the generic interface" line.long 0x34 "MIPI_DSI_GEN_PLD_DATA,Generic payload data in/out" line.long 0x38 "MIPI_DSI_CMD_PKT_STATUS,Command packet status" bitfld.long 0x38 14. " DBI_RD_CMD_BUSY ,DBI read command" "Not busy,Busy" bitfld.long 0x38 13. " DBI_PLD_R_FULL ,DBI Read Payload FIFO Full" "Not full,Full" textline " " bitfld.long 0x38 12. " DBI_PLD_R_EMPTY ,DBI Read Payload FIFO Empty" "Not empty,Empty" bitfld.long 0x38 11. " DBI_PLD_W_FULL ,DBI Write Payload FIFO Full" "Not full,Full" textline " " bitfld.long 0x38 10. " DBI_PLD_W_EMPTY ,DBI Write Payload FIFO Empty" "Not empty,Empty" bitfld.long 0x38 9. " DBI_CMD_FULL ,DBI Command FIFO Full" "Not full,Full" textline " " bitfld.long 0x38 8. " DBI_CMD_EMPTY ,DBI Command FIFO Empty" "Not empty,Empty" bitfld.long 0x38 6. " GEN_RD_CMD_BUSY ,Generic read command" "Not busy,Busy" textline " " bitfld.long 0x38 5. " GEN_PLD_R_FULL ,Generic read payload FIFO" "Not full,Full" bitfld.long 0x38 4. " GEN_PLD_R_EMPTY ,Generic read payload FIFO" "Not empty,Empty" textline " " bitfld.long 0x38 3. " GEN_PLD_W_FULL ,Generic write payload FIFO" "Not full,Full" bitfld.long 0x38 2. " GEN_PLD_W_EMPTY ,Generic write payload FIFO" "Not empty,Empty" textline " " bitfld.long 0x38 1. " GEN_CMD_FULL ,Generic command FIFO" "Not full,Full" bitfld.long 0x38 0. " GEN_CMD_EMPTY ,Generic command FIFO" "Not empty,Empty" line.long 0x3C "MIPI_DSI_TO_CNT_CFG0,Time Out timers configuration" hexmask.long.word 0x3C 16.--31. 1. " LPRX_TO_CNT ,Configures the time out counter that will trigger a Low Power Reception Time Out Contention Detection" hexmask.long.word 0x3C 0.--15. 1. " HSTX_TO_CNT ,Configures the time out counter that will trigger a High Speed Transmission Time Out Contention Detection" line.long 0x40 "MIPI_DSI_ERROR_ST0,Interrupt status register 0" bitfld.long 0x40 20. " DPHY_ERRORS_4 ,ErrContentionLP1 LP1 Contention Error from Lane 0" "Not occurred,Occurred" bitfld.long 0x40 19. " DPHY_ERRORS_3 ,ErrContentionLP0 LP0 Contention Error from Lane 0" "Not occurred,Occurred" textline " " bitfld.long 0x40 18. " DPHY_ERRORS_2 ,ErrControl Control Error from Lane 0" "Not occurred,Occurred" bitfld.long 0x40 17. " DPHY_ERRORS_1 ,ErrSyncEsc Low-Power Data Transmission Synchronization Error from Lane 0" "Not occurred,Occurred" textline " " bitfld.long 0x40 16. " DPHY_ERRORS_0 ,ErrEsc Escape Entry Error from Lane 0" "Not occurred,Occurred" bitfld.long 0x40 15. " ACK_WITH_ERR_15 ,Retrieves DSI Protocol Violation from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 13. " ACK_WITH_ERR_13 ,Retrieves Invalid Transmission Length from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 12. " ACK_WITH_ERR_12 ,Retrieves DSI VC ID Invalid from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 11. " ACK_WITH_ERR_11 ,Retrieves DSI Data Type Not Recognized from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 10. " ACK_WITH_ERR_10 ,Retrieves Checksum Error from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 9. " ACK_WITH_ERR_9 ,Retrieves ECC Error, multi-bit from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 8. " ACK_WITH_ERR_8 ,Retrieves ECC Error, single-bit from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 6. " ACK_WITH_ERR_6 ,Retrieves False Control Error from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 5. " ACK_WITH_ERR_5 ,Retrieves HS Receive Timeout Error from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 4. " ACK_WITH_ERR_4 ,Retrieves Low-Power Transmit Sync Error from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 3. " ACK_WITH_ERR_3 ,Retrieves Escape Mode Entry Command Error from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 2. " ACK_WITH_ERR_2 ,Retrieves EoT Sync Error from Display Acknowledge Error Report" "Not occurred,Occurred" bitfld.long 0x40 1. " ACK_WITH_ERR_1 ,Retrieves SoT Sync Error from Display Acknowledge Error Report" "Not occurred,Occurred" textline " " bitfld.long 0x40 0. " ACK_WITH_ERR_0 ,Retrieves SoT Error from Display Acknowledge Error Report" "Not occurred,Occurred" line.long 0x44 "MIPI_DSI_ERROR_ST1,Interrupt status register 1" bitfld.long 0x44 17. " DBI_ILLEGAL_COMM_ERR ,Attempt to write an illegal command on the DPI interface" "No,Yes" bitfld.long 0x44 16. " DBI_PLD_RECV_ERR ,DBI read back packet payload FIFO went full" "Not occurred,Occurred" textline " " bitfld.long 0x44 15. " DBI_PLD_RD_ERR ,DCS read data payload FIFO went empty" "Not occurred,Occurred" bitfld.long 0x44 14. " DBI_PLD_WR_ERR ,Writes payload data through the DBI interface and the FIFO was full" "Not occurred,Occurred" textline " " bitfld.long 0x44 13. " DBI_CMD_WR_ERR ,Write a command through the DBI but the command FIFO was full" "Not occurred,Occurred" bitfld.long 0x44 12. " GEN_PLD_RECV_ERR ,Generic interface packet read back payload FIFO went full" "Not occurred,Occurred" textline " " bitfld.long 0x44 11. " GEN_PLD_RD_ERR ,Payload FIFO went empty and data was send to the interface" "Not occurred,Occurred" bitfld.long 0x44 10. " GEN_PLD_SEND_ERR ,Payload FIFO went empty and data was sent" "Not occurred,Occurred" textline " " bitfld.long 0x44 9. " GEN_PLD_WR_ERR ,Writes a payload data through the generic interface and FIFO was full" "Not occurred,Occurred" bitfld.long 0x44 8. " GEN_CMD_WR_ERR ,Writes a command through the generic interface and FIFO was full" "Not occurred,Occurred" textline " " bitfld.long 0x44 7. " DPI_PLD_WR_ERR ,During a DPI pixel line storage the payload FIFO went full and data stored" "Not occurred,Occurred" bitfld.long 0x44 6. " EOPT_ERR ,EOTp Packet not received at the end of the incoming peripheral transmission" "Not occurred,Occurred" textline " " bitfld.long 0x44 5. " PKT_SIZE_ERR ,Packet size error" "Not occurred,Occurred" bitfld.long 0x44 4. " CRC_ERR ,CRC error" "Not occurred,Occurred" textline " " bitfld.long 0x44 3. " ECC_MULTI_ERR ,ECC multiple error" "Not occurred,Occurred" bitfld.long 0x44 2. " ECC_SINGLE_ERR ,ECC single error" "Not occurred,Occurred" textline " " bitfld.long 0x44 1. " TO_LP_RX ,Low Power Reception Time Out Counter reached the end and Contention Detection" "Not occurred,Occurred" bitfld.long 0x44 0. " TO_HS_TX ,High Speed Transmission Time Out Counter reached the end and Contention Detection" "Not occurred,Occurred" line.long 0x48 "MIPI_DSI_ERROR_MSK0,Masks Interrupt generation trigged by ERROR_ST0 register" bitfld.long 0x48 20. " DPHY_ERRORS_4 ,ErrContentionLP1 LP1 Contention Error from Lane 0" "Masked,Not masked" bitfld.long 0x48 19. " DPHY_ERRORS_3 ,ErrContentionLP0 LP0 Contention Error from Lane 0" "Masked,Not masked" textline " " bitfld.long 0x48 18. " DPHY_ERRORS_2 ,ErrControl Control Error from Lane 0" "Masked,Not masked" bitfld.long 0x48 17. " DPHY_ERRORS_1 ,ErrSyncEsc Low-Power Data Transmission Synchronization Error from Lane 0" "Masked,Not masked" textline " " bitfld.long 0x48 16. " DPHY_ERRORS_0 ,ErrEsc Escape Entry Error from Lane 0" "Masked,Not masked" bitfld.long 0x48 15. " ACK_WITH_ERR_15 ,Masks DSI Protocol Violation from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 13. " ACK_WITH_ERR_13 ,Masks Invalid Transmission Length from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 12. " ACK_WITH_ERR_12 ,Masks DSI VC ID Invalid from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 11. " ACK_WITH_ERR_11 ,Masks DSI Data Type Not Recognized from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 10. " ACK_WITH_ERR_10 ,Masks Checksum Error from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 9. " ACK_WITH_ERR_9 ,Masks ECC Error, multi-bit from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 8. " ACK_WITH_ERR_8 ,Masks ECC Error, single-bit from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 6. " ACK_WITH_ERR_6 ,Masks False Control Error from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 5. " ACK_WITH_ERR_5 ,Masks HS Receive Timeout Error from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 4. " ACK_WITH_ERR_4 ,Masks Low-Power Transmit Sync Error from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 3. " ACK_WITH_ERR_3 ,Masks Escape Mode Entry Command Error from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 2. " ACK_WITH_ERR_2 ,Masks EoT Sync Error from Display Acknowledge Error Report" "Masked,Not masked" bitfld.long 0x48 1. " ACK_WITH_ERR_1 ,Masks SoT Sync Error from Display Acknowledge Error Report" "Masked,Not masked" textline " " bitfld.long 0x48 0. " ACK_WITH_ERR_0 ,Masks SoT Error from Display Acknowledge Error Report" "Masked,Not masked" line.long 0x4C "MIPI_DSI_ERROR_MSK1,Masks Interrupt generation trigged by ERROR_ST1 register" bitfld.long 0x4C 17. " DBI_ILLEGAL_COMM_ERR ,Masks error attempt to write an illegal command on DPI" "Masked,Not masked" bitfld.long 0x4C 16. " DBI_PLD_RECV_ERR ,Masks DBI read back packet payload FIFO full error" "Masked,Not masked" textline " " bitfld.long 0x4C 15. " DBI_PLD_RD_ERR ,Masks payload DBI FIFO empty error" "Masked,Not masked" bitfld.long 0x4C 14. " DBI_PLD_WR_ERR ,Masks write payload data DBI FIFO full error" "Masked,Not masked" textline " " bitfld.long 0x4C 13. " DBI_CMD_WR_ERR ,Masks DBI command FIFO full error" "Masked,Not masked" bitfld.long 0x4C 12. " GEN_PLD_RECV_ERR ,Masks generic interface packet read back FIFO full error" "Masked,Not masked" textline " " bitfld.long 0x4C 11. " GEN_PLD_RD_ERR ,Masks DCS read data payload FIFO empty error" "Masked,Not masked" bitfld.long 0x4C 10. " GEN_PLD_SEND_ERR ,Masks generic interface packet build FIFO empty error" "Masked,Not masked" textline " " bitfld.long 0x4C 9. " GEN_PLD_WR_ERR ,Masks payload data FIFO of generic interface full error" "Masked,Not masked" bitfld.long 0x4C 8. " GEN_CMD_WR_ERR ,Masks command FIFO of generic interface full error" "Masked,Not masked" textline " " bitfld.long 0x4C 7. " DPI_PLD_WR_ERR ,Masks DPI pixel line payload FIFO full error" "Masked,Not masked" bitfld.long 0x4C 6. " EOPT_ERR ,Masks EOTp Packet not received error" "Masked,Not masked" textline " " bitfld.long 0x4C 5. " PKT_SIZE_ERR ,Masks Packet size error" "Masked,Not masked" bitfld.long 0x4C 4. " CRC_ERR ,Masks CRC error" "Masked,Not masked" textline " " bitfld.long 0x4C 3. " ECC_MULTI_ERR ,Masks ECC multiple error" "Masked,Not masked" bitfld.long 0x4C 2. " ECC_SINGLE_ERR ,Masks ECC single error" "Masked,Not masked" textline " " bitfld.long 0x4C 1. " TO_LP_RX ,Masks Low Power Reception Time Out Counter error" "Masked,Not masked" bitfld.long 0x4C 0. " TO_HS_TX ,Masks High Speed Transmission Time Out Counter error" "Masked,Not masked" line.long 0x50 "MIPI_DSI_PHY_RSTZ,D-PHY reset control" bitfld.long 0x50 2. " PHY_ENABLECLK ,Enables D-PHY Clock Lane Module" "Disabled,Enabled" bitfld.long 0x50 1. " PHY_RSTZ ,D-PHY Reset" "Enabled,Disabled" textline " " bitfld.long 0x50 0. " PHY_SHUTDOWNZ ,D-PHY Shutdown" "Enabled,Disabled" line.long 0x54 "MIPI_DSI_PHY_IF_CFG,D-PHY interface configuration" hexmask.long.byte 0x54 2.--9. 1. " PHY_STOP_WAIT_TIME ,Configures minimum wait period to request an HS transmission" bitfld.long 0x54 0.--1. " N_LANES ,Number of active data lanes" "1,2,?..." line.long 0x58 "MIPI_DSI_PHY_IF_CTRL,D-PHY PPI interface control" bitfld.long 0x58 5.--8. " PHY_TX_TRIGGERS ,Controls the trigger transmissions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 4. " PHY_TXEXITULPSLAN ,ULPS mode Exit on on all active data lanes" "Disabled,Enabled" textline " " bitfld.long 0x58 3. " PHY_TXREQULPSLAN ,ULPS mode Request on all active data lanes" "Disabled,Enabled" bitfld.long 0x58 2. " PHY_TXEXITULPSCLK ,ULPS mode Exit on Clock Lane" "Disabled,Enabled" textline " " bitfld.long 0x58 1. " PHY_TXREQULPSCLK ,ULPS mode Request on Clock Lane" "Disabled,Enabled" bitfld.long 0x58 0. " PHY_TXREQUESTCLKHS ,Controls D-PHY PPI txrequestclkHS" "Disabled,Enabled" line.long 0x5C "MIPI_DSI_PHY_STATUS,D-PHY PPI status interface" bitfld.long 0x5C 12. " ULPSACTIVENOT3LANE ,Reports status of ULPSACTIVENOT3LANE D-PHY pin" "Low,High" bitfld.long 0x5C 11. " PHYSTOPSTATE3LANE ,Reports status of PHYSTOPSTATE3LANE D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 10. " ULPSACTIVENOT2LANE ,Reports status of ULPSACTIVENOT2LANE D-PHY pin" "Low,High" bitfld.long 0x5C 9. " PHYSTOPSTATE2LANE ,Reports status of PHYSTOPSTATE2LANE D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 8. " ULPSACTIVENOT1LANE ,Reports status of ULPSACTIVENOT1LANE D-PHY pin" "Low,High" bitfld.long 0x5C 7. " PHYSTOPSTATE1LANE ,Reports status of PHYSTOPSTATE1LANE D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 6. " RXULPSESC0LANE ,Reports status of RXULPSESC0LANE D-PHY pin" "Low,High" bitfld.long 0x5C 5. " ULPSACTIVENOT0LANE ,Reports status of ULPSACTIVENOT0LANE D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 4. " PHYSTOPSTATE0LANE ,Reports status of PHYSTOPSTATE0LANE D-PHY pin" "Low,High" bitfld.long 0x5C 3. " PHYRXULPSCLKNOT ,Reports status of PHYRXULPSCLKNOT D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 2. " PHYSTOPSTATECLKLANE ,Reports status of PHYSTOPSTATECLKLANE D-PHY pin" "Low,High" bitfld.long 0x5C 1. " PHYDIRECTION ,Reports status of PHYDIRECTION D-PHY pin" "Low,High" textline " " bitfld.long 0x5C 0. " PHYLOCK ,Reports status of phylock D-PHY pin" "Low,High" line.long 0x60 "MIPI_DSI_PHY_TST_CTRL0,D-PHY Test interface control 0" bitfld.long 0x60 1. " PHY_TESTCLK ,PHY test interface strobe signal" "Disabled,Enabled" bitfld.long 0x60 0. " PHY_TESTCLR ,PHY test interface clear" "Disabled,Enabled" line.long 0x64 "MIPI_DSI_PHY_TST_CTRL1,D-PHY Test interface control 1" bitfld.long 0x64 16. " PHY_TESTEN ,PHY test interface operation selector" "Rising edge,Falling edge" hexmask.long.byte 0x64 8.--15. 1. " PHY_TESTDOUT ,PHY output 8-bit data bus for read-back and internal probing functionalities" textline " " hexmask.long.byte 0x64 0.--7. 1. " PHY_TESTDIN ,PHY test interface input 8-bit data bus for internal register programming and test functionalities access" width 0x0B tree.end tree "MIPI_HSI (MIPI HSI Host Controller)" base ad:0x02208000 width 30. group.long 0x00++0x0B line.long 0x00 "MIPI_HSI_CTRL,HSI Control Register" bitfld.long 0x00 31. " SFTRST ,Enable normal HSI operation" "Enabled,Disabled" bitfld.long 0x00 30. " CLKGATE ,Clock gate" "Not gated,Gated" textline " " bitfld.long 0x00 27. " DMA_DISABLE ,DMA disable" "No,Yes" bitfld.long 0x00 24.--26. " RX_DLY_SEL ,Denote the tap delay values for reception of data and flag" "0ns,1ns,2ns,3ns,4ns,5ns,6ns,7ns" textline " " hexmask.long.byte 0x00 16.--23. 1. " RX_FRAME_BRST_CNT ,Limits the continous Frame transmission count in Pipelined Data flow" bitfld.long 0x00 12.--13. " RX_TAIL_BIT_CNT ,Determines the length of the Tailing bit counter" "800,400,200,100" textline " " bitfld.long 0x00 8.--11. " DATA_TIMEOUT_CNT ,Determines the interval by which DATA timeouts are detected" "Clock x 2^13,Clock x 2^14,,,,,,,,,,,,,Clock x 2^27,?..." bitfld.long 0x00 4. " TX_BREAK ,Transmission break" "No break,Break" textline " " bitfld.long 0x00 0.--3. " TX_CLK_DIVISOR ,Holds the divisor of the base clock (tx_refclk) frequency" "/1,/2,/4,/8,/16,/32,/64,/128,/256,?..." line.long 0x04 "MIPI_HSI_TX_CONF,HSI Tx Config Register" bitfld.long 0x04 31. " CH15_EN ,Tx Ch15" "Disabled,Enabled" bitfld.long 0x04 30. " CH14_EN ,Tx Ch14" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " CH13_EN ,Tx Ch13" "Disabled,Enabled" bitfld.long 0x04 28. " CH12_EN ,Tx Ch12" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " CH11_EN ,Tx Ch11" "Disabled,Enabled" bitfld.long 0x04 26. " CH10_EN ,Tx Ch10" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " CH9_EN ,Tx Ch9" "Disabled,Enabled" bitfld.long 0x04 24. " CH8_EN ,Tx Ch8" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " CH7_EN ,Tx Ch7" "Disabled,Enabled" bitfld.long 0x04 22. " CH6_EN ,Tx Ch6" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " CH5_EN ,Tx Ch5" "Disabled,Enabled" bitfld.long 0x04 20. " CH4_EN ,Tx Ch4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " CH3_EN ,Tx Ch3" "Disabled,Enabled" bitfld.long 0x04 18. " CH2_EN ,Tx Ch2" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " CH1_EN ,Tx Ch1" "Disabled,Enabled" bitfld.long 0x04 16. " CH0_EN ,Tx Ch0" "Disabled,Enabled" textline " " bitfld.long 0x04 8.--11. " TIMEOUT_CNT ,Tx timeout value" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x04 1. " WAKEUP ,Transmitter state" "Sleep,Wakeup" textline " " bitfld.long 0x04 0. " TRANS_MODE ,Transmission Mode" "Stream,Frame" line.long 0x08 "MIPI_HSI_RX_CONF,HSI Rx Config Register" bitfld.long 0x08 31. " CH15_EN ,Rx Ch15" "Disabled,Enabled" bitfld.long 0x08 30. " CH14_EN ,Rx Ch14" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " CH13_EN ,Rx Ch13" "Disabled,Enabled" bitfld.long 0x08 28. " CH12_EN ,Rx Ch12" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " CH11_EN ,Rx Ch11" "Disabled,Enabled" bitfld.long 0x08 26. " CH10_EN ,Rx Ch10" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " CH9_EN ,Rx Ch9" "Disabled,Enabled" bitfld.long 0x08 24. " CH8_EN ,Rx Ch8" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " CH7_EN ,Rx Ch7" "Disabled,Enabled" bitfld.long 0x08 22. " CH6_EN ,Rx Ch6" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " CH5_EN ,Rx Ch5" "Disabled,Enabled" bitfld.long 0x08 20. " CH4_EN ,Rx Ch4" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " CH3_EN ,Rx Ch3" "Disabled,Enabled" bitfld.long 0x08 18. " CH2_EN ,Rx Ch2" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " CH1_EN ,Rx Ch1" "Disabled,Enabled" bitfld.long 0x08 16. " CH0_EN ,Rx Ch0" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 8.--14. 1. " TIMEOUT_CNT ,Receive Frame Timeout Counter" bitfld.long 0x08 4. " TAIL_BIT_CNT_EN ,Tailing bit counter" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " REC_MODE ,Receive mode" "Stream,Frame" bitfld.long 0x08 2. " WAKE ,Receiver state" "Sleep,Wakeup" textline " " bitfld.long 0x08 0.--1. " DATA_FLOW ,Data flow" "Synchronized,Pipelined,Receiver Real-time,?..." rgroup.long 0x0C++0x03 line.long 0x00 "MIPI_HSI_CAP,HSI Capability Register" bitfld.long 0x00 18. " WAKEUP_EVENT ,Wakeup Event" "Supported,Not supported" bitfld.long 0x00 17. " RX_DMA_SUPPORT ,DMA" "Supported,Not supported" textline " " bitfld.long 0x00 16. " TX_DMA_SUPPORT ,DMA" "Supported,Not supported" bitfld.long 0x00 8.--12. " DMA_CH_NU_SUPPORT ,DMA supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 4.--7. " RX_CH_NU_SUPPORTE ,Rx channel supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 0.--3. " TX_CH_NU_SUPPORTE ,Tx channel supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x10++0x0F line.long 0x00 "MIPI_HSI_TX_WML0,HSI Tx Water Mark Level 0 Register" bitfld.long 0x00 28.--31. " CH15 ,This value denotes the WML of Tx Channel 15" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x00 24.--27. " CH14 ,This value denotes the WML of Tx Channel 14" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x00 20.--23. " CH13 ,This value denotes the WML of Tx Channel 13" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x00 16.--19. " CH12 ,This value denotes the WML of Tx Channel 12" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x00 12.--15. " CH11 ,This value denotes the WML of Tx Channel 11" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x00 8.--11. " CH10 ,This value denotes the WML of Tx Channel 10" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x00 4.--7. " CH9 ,This value denotes the WML of Tx Channel 9" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x00 0.--3. " CH8 ,This value denotes the WML of Tx Channel 8" "1,2,4,8,16,32,64,128,256,512,1024,?..." line.long 0x04 "MIPI_HSI_TX_TML1,HSI Tx Water Mark Level 1 Register" bitfld.long 0x04 28.--31. " CH7 ,This value denotes the WML of Tx Channel 7" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x04 24.--27. " CH6 ,This value denotes the WML of Tx Channel 6" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x04 20.--23. " CH5 ,This value denotes the WML of Tx Channel 5" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x04 16.--19. " CH4 ,This value denotes the WML of Tx Channel 4" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x04 12.--15. " CH3 ,This value denotes the WML of Tx Channel 3" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x04 8.--11. " CH2 ,This value denotes the WML of Tx Channel 2" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " bitfld.long 0x04 4.--7. " CH1 ,This value denotes the WML of Tx Channel 1" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x04 0.--3. " CH0 ,This value denotes the WML of Tx Channel 0" "1,2,4,8,16,32,64,128,256,512,1024,?..." line.long 0x08 "MIPI_HSI_TX_ARB_PRI0,HSI Tx Arbiter Priority 0 Register" bitfld.long 0x08 28.--31. " CH7 ,Value denotes the priority of Tx Channel 7" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x08 24.--27. " CH6 ,Value denotes the priority of Tx Channel 6" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x08 20.--23. " CH5 ,Value denotes the priority of Tx Channel 5" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x08 16.--19. " CH4 ,Value denotes the priority of Tx Channel 4" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x08 12.--15. " CH3 ,Value denotes the priority of Tx Channel 3" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x08 8.--11. " CH2 ,Value denotes the priority of Tx Channel 2" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x08 4.--7. " CH1 ,Value denotes the priority of Tx Channel 1" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x08 0.--3. " CH0 ,Value denotes the priority of Tx Channel 0" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." line.long 0x0C "MIPI_HSI_TX_ARB_PRI1,HSI Tx Arbiter Priority 1 Register" bitfld.long 0x0C 28.--31. " CH15 ,Value denotes the priority of Tx Channel 15" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x0C 24.--27. " CH14 ,Value denotes the priority of Tx Channel 14" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x0C 20.--23. " CH13 ,Value denotes the priority of Tx Channel 13" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x0C 16.--19. " CH12 ,Value denotes the priority of Tx Channel 12" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x0C 12.--15. " CH11 ,Value denotes the priority of Tx Channel 11" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x0C 8.--11. " CH10 ,Value denotes the priority of Tx Channel 10" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." textline " " bitfld.long 0x0C 4.--7. " CH9 ,Value denotes the priority of Tx Channel 9" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." bitfld.long 0x0C 0.--3. " CH8 ,Value denotes the priority of Tx Channel 8" "1st priority,2nd priority,3rd priority,4th priority,5th priority,6th priority,7th priority,8th priority,9th priority,10th priority,11th priority,?..." rgroup.long 0x20++0x03 line.long 0x00 "MIPI_HSI_LINE_ST,HSI Line Status Register" bitfld.long 0x00 7. " RX_WAKEUP_STATUS ,Field reflects the rx_wake pin" "Low,High" bitfld.long 0x00 6. " RX_READY_STATUS ,Field reflects the rx_rdy pin" "Low,High" textline " " bitfld.long 0x00 5. " RX_FLAG_STATUS ,Field reflects the rx_flag pin" "Low,High" bitfld.long 0x00 4. " RX_DATA_STATUS ,Field reflects the rx_data pin" "Low,High" textline " " bitfld.long 0x00 3. " TX_WAKEUP_STATUS ,Field reflects the tx_wake pin" "Low,High" bitfld.long 0x00 2. " TX_READY_STATUS ,Field reflects the tx_ready pin" "Low,High" textline " " bitfld.long 0x00 1. " TX_FLAG_STATUS ,Field reflects the tx_flag pin" "Low,High" bitfld.long 0x00 0. " TX_DATA_STATUS ,Field reflects the tx_data pin" "Low,High" group.long 0x24++0x07 line.long 0x00 "MIPI_HSI_ID_BIT,HSI ID Bits Register" bitfld.long 0x00 4.--6. " RX_CH ,Sets the number of channel ID bits per frame or stream for a Receive operation" "0 bit,1 bit,2 bits,3 bits,4 bits,?..." bitfld.long 0x00 0.--2. " TX_CH ,Sets the number of channel ID bits per frame or stream for a transmit operation" "0 bit,1 bit,2 bits,3 bits,4 bits,?..." line.long 0x04 "MIPI_HSI_FIFO_THR_CONF,Tx and Rx Fif0 Threshold Configuration Register" bitfld.long 0x04 31. " TX_CH15 ,Sets the threshold level for Tx channel fifo 15" "fifo size/2,fifo size/4" bitfld.long 0x04 30. " TX_CH14 ,Sets the threshold level for Tx channel fifo 14" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 29. " TX_CH13 ,Sets the threshold level for Tx channel fifo 13" "fifo size/2,fifo size/4" bitfld.long 0x04 28. " TX_CH12 ,Sets the threshold level for Tx channel fifo 12" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 27. " TX_CH11 ,Sets the threshold level for Tx channel fifo 11" "fifo size/2,fifo size/4" bitfld.long 0x04 26. " TX_CH10 ,Sets the threshold level for Tx channel fifo 10" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 25. " TX_CH9 ,Sets the threshold level for Tx channel fifo 9" "fifo size/2,fifo size/4" bitfld.long 0x04 24. " TX_CH8 ,Sets the threshold level for Tx channel fifo 8" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 23. " TX_CH7 ,Sets the threshold level for Tx channel fifo 7" "fifo size/2,fifo size/4" bitfld.long 0x04 22. " TX_CH6 ,Sets the threshold level for Tx channel fifo 6" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 21. " TX_CH5 ,Sets the threshold level for Tx channel fifo 5" "fifo size/2,fifo size/4" bitfld.long 0x04 20. " TX_CH4 ,Sets the threshold level for Tx channel fifo 4" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 19. " TX_CH3 ,Sets the threshold level for Tx channel fifo 3" "fifo size/2,fifo size/4" bitfld.long 0x04 18. " TX_CH2 ,Sets the threshold level for Tx channel fifo 2" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 17. " TX_CH1 ,Sets the threshold level for Tx channel fifo 1" "fifo size/2,fifo size/4" bitfld.long 0x04 16. " TX_CH0 ,Sets the threshold level for Tx channel fifo 0" "fifo size/2,fifo size/4" textline " " bitfld.long 0x04 15. " RX_CH15 ,Sets the threshold level for Rx channel fifo 15" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 14. " RX_CH14 ,Sets the threshold level for Rx channel fifo 14" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 13. " RX_CH13 ,Sets the threshold level for Rx channel fifo 13" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 12. " RX_CH12 ,Sets the threshold level for Rx channel fifo 12" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 11. " RX_CH11 ,Sets the threshold level for Rx channel fifo 11" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 10. " RX_CH10 ,Sets the threshold level for Rx channel fifo 10" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 9. " RX_CH9 ,Sets the threshold level for Rx channel fifo 9" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 8. " RX_CH8 ,Sets the threshold level for Rx channel fifo 8" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 7. " RX_CH7 ,Sets the threshold level for Rx channel fifo 7" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 6. " RX_CH6 ,Sets the threshold level for Rx channel fifo 6" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 5. " RX_CH5 ,Sets the threshold level for Rx channel fifo 5" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 4. " RX_CH4 ,Sets the threshold level for Rx channel fifo 4" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 3. " RX_CH3 ,Sets the threshold level for Rx channel fifo 3" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 2. " RX_CH2 ,Sets the threshold level for Rx channel fifo 2" "fifo size/2,3/4th of fifo size" textline " " bitfld.long 0x04 1. " RX_CH1 ,Sets the threshold level for Rx channel fifo 1" "fifo size/2,3/4th of fifo size" bitfld.long 0x04 0. " RX_CH0 ,Sets the threshold level for Rx channel fifo 0" "fifo size/2,3/4th of fifo size" wgroup.long 0x2C++0x03 line.long 0x00 "MIPI_HSI_CH_SFTRST,Tx and Rx Channel Soft Reset Register" bitfld.long 0x00 31. " TX_CH15 ,Reset Tx Channel 15 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 30. " TX_CH14 ,Reset Tx Channel 14 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 29. " TX_CH13 ,Reset Tx Channel 13 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 28. " TX_CH12 ,Reset Tx Channel 12 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 27. " TX_CH11 ,Reset Tx Channel 11 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 26. " TX_CH10 ,Reset Tx Channel 10 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 25. " TX_CH9 ,Reset Tx Channel 9 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 24. " TX_CH8 ,Reset Tx Channel 8 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 23. " TX_CH7 ,Reset Tx Channel 7 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 22. " TX_CH6 ,Reset Tx Channel 6 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 21. " TX_CH5 ,Reset Tx Channel 5 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 20. " TX_CH4 ,Reset Tx Channel 4 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 19. " TX_CH3 ,Reset Tx Channel 3 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 18. " TX_CH2 ,Reset Tx Channel 2 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 17. " TX_CH1 ,Reset Tx Channel 1 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 16. " TX_CH0 ,Reset Tx Channel 0 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 15. " RX_CH15 ,Reset Rx Channel 15 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 14. " RX_CH14 ,Reset Rx Channel 14 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 13. " RX_CH13 ,Reset Rx Channel 13 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 12. " RX_CH12 ,Reset Rx Channel 12 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 11. " RX_CH11 ,Reset Rx Channel 11 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 10. " RX_CH10 ,Reset Rx Channel 10 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 9. " RX_CH9 ,Reset Rx Channel 9 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 8. " RX_CH8 ,Reset Rx Channel 8 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 7. " RX_CH7 ,Reset Rx Channel 7 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 6. " RX_CH6 ,Reset Rx Channel 6 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 5. " RX_CH5 ,Reset Rx Channel 5 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 4. " RX_CH4 ,Reset Rx Channel 4 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 3. " RX_CH3 ,Reset Rx Channel 3 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 2. " RX_CH2 ,Reset Rx Channel 2 or enable normal HSI operation" "Enable,Reset" textline " " bitfld.long 0x00 1. " RX_CH1 ,Reset Rx Channel 1 or enable normal HSI operation" "Enable,Reset" bitfld.long 0x00 0. " RX_CH0 ,Reset Rx Channel 0 or enable normal HSI operation" "Enable,Reset" group.long 0x30++0x0B line.long 0x00 "MIPI_HSI_IRQSTAT,HSI Interrupt Status Register" rbitfld.long 0x00 8. " TX_EMPTY_INT ,Tx channel empty and Tx state IDLE Interrupt Status" "Not all,All" bitfld.long 0x00 7. " RX_BREAK_INT ,RX_BREAK_INT" "No error,Error" textline " " bitfld.long 0x00 6. " RX_ERROR_INT ,RX_ERROR_INT" "No error,Error" bitfld.long 0x00 5. " TX_TIMEOUT_ERR_INT ,TX_TIMEOUT_ERR_INT" "No error,Error" textline " " rbitfld.long 0x00 4. " DMA_ERR_INT ,DMA_ERR_INT" "No error,Error" rbitfld.long 0x00 3. " DMA_INT ,Transmit or Receive Operation" "Not completed,Completed" textline " " rbitfld.long 0x00 2. " RX_TIMEOUT_INT ,RX_TIMEOUT_INT" "No error,Error" bitfld.long 0x00 1. " RX_WAKEUP_INT ,Receiver Wakeup event" "Not occurred,Occurred" textline " " rbitfld.long 0x00 0. " FIFO_THRESHOLD_INT ,Threshold amount of data" "Not reached,Reached" line.long 0x04 "MIPI_HSI_IRQSTAT_EN,HSI Interrupt Status Enable Register" bitfld.long 0x04 8. " TX_EMPTY_INT ,TX_EMPTY_INT_STATUS interrupt status" "Disabled,Enabled" bitfld.long 0x04 7. " RX_BREAK_INT ,RX_BREAK status interrupt status" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX_ERROR_INT ,RX_ERROR status interrupt status" "Disabled,Enabled" bitfld.long 0x04 5. " TX_TIMEOUT_ERR_INT ,TX_TIMEOUT_ERR status interrupt status" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " DMA_ERR_INT ,DMA_ERROR_INT_STATUS interrupt status" "Disabled,Enabled" bitfld.long 0x04 3. " DMA_INT ,DMA_INT_STATUS interrupt status" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " RX_TIMEOUT_INT ,RX_TIMEOUT_INT_STATUS interrupt status" "Disabled,Enabled" bitfld.long 0x04 1. " RX_WAKEUP_INT , RX_WAKEUP_INT_STATUS interrupt status" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " FIFO_THRESHOLD_INT ,FIFO_THRESHOLD_INT_STATUS interrupt status" "Disabled,Enabled" line.long 0x08 "MIPI_HSI_IRQSIG_EN,HSI Interrupt Signal Enable Register" bitfld.long 0x08 8. " TX_EMPTY_INT ,Interrupt signal for HSI TX_EMPTY interrupt" "Disabled,Enabled" bitfld.long 0x08 7. " RX_BREAK_INT ,Interrupt signal for RX_BREAK interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " RX_ERROR_INT ,Interrupt signal for RX Error interrupt" "Disabled,Enabled" bitfld.long 0x08 5. " TX_TIMEOUT_ERR_INT ,Interrupt signal for TX Timeout Error interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " DMA_ERR_INT ,Interrupt signal for DMA Error interrupt" "Disabled,Enabled" bitfld.long 0x08 3. " DMA_INT ,Interrupt signal for DMA Completed interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " RX_TIMEOUT_INT ,Interrupt signal for RX TIMEOUT interrupt" "Disabled,Enabled" bitfld.long 0x08 1. " RX_WAKEUP_INT ,Interrupt signal for HSI RX Wakeup interrupt" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " FIFO_THRESHOLD_INT ,Interrupt signal for HSI FIFO_THRESHOLD interrupt" "Disabled,Enabled" rgroup.long 0x3C++0x03 line.long 0x00 "MIPI_HSI_FIFO_THR_IRQSTAT,HSI FIFO Threshold Interrupt Status Register" bitfld.long 0x00 31. " TX_CH15_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 30. " TX_CH14_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 29. " TX_CH13_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 28. " TX_CH12_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 27. " TX_CH11_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 26. " TX_CH10_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 25. " TX_CH9_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 24. " TX_CH8_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 23. " TX_CH7_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 22. " TX_CH6_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 21. " TX_CH5_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 20. " TX_CH4_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 19. " TX_CH3_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 18. " TX_CH2_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 17. " TX_CH1_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 16. " TX_CH0_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 15. " RX_CH15_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 14. " RX_CH14_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 13. " RX_CH13_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 12. " RX_CH12_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 11. " RX_CH11_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 10. " RX_CH10_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 9. " RX_CH9_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 8. " RX_CH8_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 7. " RX_CH7_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 6. " RX_CH6_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 5. " RX_CH5_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 4. " RX_CH4_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 3. " RX_CH3_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 2. " RX_CH2_INT ,Threshold amount of data" "Not reached,Reached" textline " " bitfld.long 0x00 1. " RX_CH1_INT ,Threshold amount of data" "Not reached,Reached" bitfld.long 0x00 0. " RX_CH0_INT ,Threshold amount of data" "Not reached,Reached" group.long 0x40++0x07 line.long 0x00 "MIPI_HSI_FIFO_THR_IRQSTAT_EN,HSI FIFO Threshold Interrupt Status Enable Register" bitfld.long 0x00 31. " TX_CH15_INT ,Interrupt status for Tx Ch15 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 30. " TX_CH14_INT ,Interrupt status for Tx Ch14 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " TX_CH13_INT ,Interrupt status for Tx Ch13 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " TX_CH12_INT ,Interrupt status for Tx Ch12 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TX_CH11_INT ,Interrupt status for Tx Ch11 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " TX_CH10_INT ,Interrupt status for Tx Ch10 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " TX_CH9_INT ,Interrupt status for Tx Ch9 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 24. " TX_CH8_INT ,Interrupt status for Tx Ch8 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TX_CH7_INT ,Interrupt status for Tx Ch7 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " TX_CH6_INT ,Interrupt status for Tx Ch6 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TX_CH5_INT ,Interrupt status for Tx Ch5 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " TX_CH4_INT ,Interrupt status for Tx Ch4 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TX_CH3_INT ,Interrupt status for Tx Ch3 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 18. " TX_CH2_INT ,Interrupt status for Tx Ch2 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " TX_CH1_INT ,Interrupt status for Tx Ch1 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 16. " TX_CH0_INT ,Interrupt status for Tx Ch0 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RX_CH15_INT ,Interrupt status for Rx Ch15 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " RX_CH14_INT ,Interrupt status for Rx Ch14 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RX_CH13_INT ,Interrupt status for Rx Ch13 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " RX_CH12_INT ,Interrupt status for Rx Ch12 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RX_CH11_INT ,Interrupt status for Rx Ch11 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " RX_CH10_INT ,Interrupt status for Rx Ch10 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RX_CH9_INT ,Interrupt status for Rx Ch9 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " RX_CH8_INT ,Interrupt status for Rx Ch8 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RX_CH7_INT ,Interrupt status for Rx Ch7 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 6. " RX_CH6_INT ,Interrupt status for Rx Ch6 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RX_CH5_INT ,Interrupt status for Rx Ch5 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " RX_CH4_INT ,Interrupt status for Rx Ch4 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RX_CH3_INT ,Interrupt status for Rx Ch3 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " RX_CH2_INT ,Interrupt status for Rx Ch2 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX_CH1_INT ,Interrupt status for Rx Ch1 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " RX_CH0_INT ,Interrupt status for Rx Ch0 threshold Reached interrupt" "Disabled,Enabled" line.long 0x04 "MIPI_HSI_FIFO_THR_IRQSIG_EN,HSI FIFO Threshold Interrupt Signal Enable Register" bitfld.long 0x04 31. " TX_CH15_INT ,Interrupt signal for Tx Ch15 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 30. " TX_CH14_INT ,Interrupt signal for Tx Ch14 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " TX_CH13_INT ,Interrupt signal for Tx Ch13 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 28. " TX_CH12_INT ,Interrupt signal for Tx Ch12 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TX_CH11_INT ,Interrupt signal for Tx Ch11 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 26. " TX_CH10_INT ,Interrupt signal for Tx Ch10 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " TX_CH9_INT ,Interrupt signal for Tx Ch9 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 24. " TX_CH8_INT ,Interrupt signal for Tx Ch8 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " TX_CH7_INT ,Interrupt signal for Tx Ch7 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 22. " TX_CH6_INT ,Interrupt signal for Tx Ch6 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " TX_CH5_INT ,Interrupt signal for Tx Ch5 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 20. " TX_CH4_INT ,Interrupt signal for Tx Ch4 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " TX_CH3_INT ,Interrupt signal for Tx Ch3 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " TX_CH2_INT ,Interrupt signal for Tx Ch2 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " TX_CH1_INT ,Interrupt signal for Tx Ch1 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " TX_CH0_INT ,Interrupt signal for Tx Ch0 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " RX_CH15_INT ,Interrupt signal for Rx Ch15 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 14. " RX_CH14_INT ,Interrupt signal for Rx Ch14 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " RX_CH13_INT ,Interrupt signal for Rx Ch13 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " RX_CH12_INT ,Interrupt signal for Rx Ch12 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " RX_CH11_INT ,Interrupt signal for Rx Ch11 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " RX_CH10_INT ,Interrupt signal for Rx Ch10 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " RX_CH9_INT ,Interrupt signal for Rx Ch9 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " RX_CH8_INT ,Interrupt signal for Rx Ch8 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " RX_CH7_INT ,Interrupt signal for Rx Ch7 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " RX_CH6_INT ,Interrupt signal for Rx Ch6 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RX_CH5_INT ,Interrupt signal for Rx Ch5 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 4. " RX_CH4_INT ,Interrupt signal for Rx Ch4 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX_CH3_INT ,Interrupt signal for Rx Ch3 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 2. " RX_CH2_INT ,Interrupt signal for Rx Ch2 threshold Reached interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " RX_CH1_INT ,Interrupt signal for Rx Ch1 threshold Reached interrupt" "Disabled,Enabled" bitfld.long 0x04 0. " RX_CH0_INT ,Interrupt signal for Rx Ch0 threshold Reached interrupt" "Disabled,Enabled" group.long 0x50++0x7F line.long 0x0 "MIPI_HSI_TX_CH0_DP,Tx Channel 0 Data Port Register" line.long 0x4 "MIPI_HSI_TX_CH1_DP,Tx Channel 1 Data Port Register" line.long 0x8 "MIPI_HSI_TX_CH2_DP,Tx Channel 2 Data Port Register" line.long 0xC "MIPI_HSI_TX_CH3_DP,Tx Channel 3 Data Port Register" line.long 0x10 "MIPI_HSI_TX_CH4_DP,Tx Channel 4 Data Port Register" line.long 0x14 "MIPI_HSI_TX_CH5_DP,Tx Channel 5 Data Port Register" line.long 0x18 "MIPI_HSI_TX_CH6_DP,Tx Channel 6 Data Port Register" line.long 0x1C "MIPI_HSI_TX_CH7_DP,Tx Channel 7 Data Port Register" line.long 0x20 "MIPI_HSI_TX_CH8_DP,Tx Channel 8 Data Port Register" line.long 0x24 "MIPI_HSI_TX_CH9_DP,Tx Channel 9 Data Port Register" line.long 0x28 "MIPI_HSI_TX_CH10_DP,Tx Channel 10 Data Port Register" line.long 0x2C "MIPI_HSI_TX_CH11_DP,Tx Channel 11 Data Port Register" line.long 0x30 "MIPI_HSI_TX_CH12_DP,Tx Channel 12 Data Port Register" line.long 0x34 "MIPI_HSI_TX_CH13_DP,Tx Channel 13 Data Port Register" line.long 0x38 "MIPI_HSI_TX_CH14_DP,Tx Channel 14 Data Port Register" line.long 0x3C "MIPI_HSI_TX_CH15_DP,Tx Channel 15 Data Port Register" line.long 0x40 "MIPI_HSI_RX_CH0_DP,Rx Channel 0 Data Port Register" line.long 0x44 "MIPI_HSI_RX_CH1_DP,Rx Channel 1 Data Port Register" line.long 0x48 "MIPI_HSI_RX_CH2_DP,Rx Channel 2 Data Port Register" line.long 0x4C "MIPI_HSI_RX_CH3_DP,Rx Channel 3 Data Port Register" line.long 0x50 "MIPI_HSI_RX_CH4_DP,Rx Channel 4 Data Port Register" line.long 0x54 "MIPI_HSI_RX_CH5_DP,Rx Channel 5 Data Port Register" line.long 0x58 "MIPI_HSI_RX_CH6_DP,Rx Channel 6 Data Port Register" line.long 0x5C "MIPI_HSI_RX_CH7_DP,Rx Channel 7 Data Port Register" line.long 0x60 "MIPI_HSI_RX_CH8_DP,Rx Channel 8 Data Port Register" line.long 0x64 "MIPI_HSI_RX_CH9_DP,Rx Channel 9 Data Port Register" line.long 0x68 "MIPI_HSI_RX_CH10_DP,Rx Channel 10 Data Port Register" line.long 0x6C "MIPI_HSI_RX_CH11_DP,Rx Channel 11 Data Port Register" line.long 0x70 "MIPI_HSI_RX_CH12_DP,Rx Channel 12 Data Port Register" line.long 0x74 "MIPI_HSI_RX_CH13_DP,Rx Channel 13 Data Port Register" line.long 0x78 "MIPI_HSI_RX_CH14_DP,Rx Channel 14 Data Port Register" line.long 0x7C "MIPI_HSI_RX_CH15_DP,Rx Channel 15 Data Port Register" rgroup.long 0xD0++0x03 line.long 0x00 "MIPI_HSI_ERR_IRQSTAT,HSI Error Interrupt Status Register" bitfld.long 0x00 31. " RX_CH15_TIMEOUT_INT ,Error Interrupt Status for CH15" "No timeout,Timeout" bitfld.long 0x00 30. " RX_CH14_TIMEOUT_INT ,Error Interrupt Status for CH14" "No timeout,Timeout" textline " " bitfld.long 0x00 29. " RX_CH13_TIMEOUT_INT ,Error Interrupt Status for CH13" "No timeout,Timeout" bitfld.long 0x00 28. " RX_CH12_TIMEOUT_INT ,Error Interrupt Status for CH12" "No timeout,Timeout" textline " " bitfld.long 0x00 27. " RX_CH11_TIMEOUT_INT ,Error Interrupt Status for CH11" "No timeout,Timeout" bitfld.long 0x00 26. " RX_CH10_TIMEOUT_INT ,Error Interrupt Status for CH10" "No timeout,Timeout" textline " " bitfld.long 0x00 25. " RX_CH9_TIMEOUT_INT ,Error Interrupt Status for CH9" "No timeout,Timeout" bitfld.long 0x00 24. " RX_CH8_TIMEOUT_INT ,Error Interrupt Status for CH8" "No timeout,Timeout" textline " " bitfld.long 0x00 23. " RX_CH7_TIMEOUT_INT ,Error Interrupt Status for CH7" "No timeout,Timeout" bitfld.long 0x00 22. " RX_CH6_TIMEOUT_INT ,Error Interrupt Status for CH6" "No timeout,Timeout" textline " " bitfld.long 0x00 21. " RX_CH5_TIMEOUT_INT ,Error Interrupt Status for CH5" "No timeout,Timeout" bitfld.long 0x00 20. " RX_CH4_TIMEOUT_INT ,Error Interrupt Status for CH4" "No timeout,Timeout" textline " " bitfld.long 0x00 19. " RX_CH3_TIMEOUT_INT ,Error Interrupt Status for CH3" "No timeout,Timeout" bitfld.long 0x00 18. " RX_CH2_TIMEOUT_INT ,Error Interrupt Status for CH2" "No timeout,Timeout" textline " " bitfld.long 0x00 17. " RX_CH1_TIMEOUT_INT ,Error Interrupt Status for CH1" "No timeout,Timeout" bitfld.long 0x00 16. " RX_CH0_TIMEOUT_INT ,Error Interrupt Status for CH0" "No timeout,Timeout" group.long 0xD4++0x107 line.long 0x00 "MIPI_HSI_ERR_IRQSTAT_EN,HSI Error Interrupt Status Enable Register" bitfld.long 0x00 31. " RX_CH15_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH15 interrupt" "Disabled,Enabled" bitfld.long 0x00 30. " RX_CH14_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH14 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " RX_CH13_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH13 interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " RX_CH12_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH12 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RX_CH11_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH11 interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " RX_CH10_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH10 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RX_CH9_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH9 interrupt" "Disabled,Enabled" bitfld.long 0x00 24. " RX_CH8_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH8 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " RX_CH7_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH7 interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " RX_CH6_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH6 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " RX_CH5_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH5 interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " RX_CH4_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH4 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RX_CH3_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH3 interrupt" "Disabled,Enabled" bitfld.long 0x00 18. " RX_CH2_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " RX_CH1_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH1 interrupt" "Disabled,Enabled" bitfld.long 0x00 16. " RX_CH0_TIMEOUT_INT_EN ,Interrupt status for data timeout for CH0 interrupt" "Disabled,Enabled" line.long 0x04 "MIPI_HSI_ERR_IRQSIG_EN,HSI Error Interrupt Signal Enable Register" bitfld.long 0x04 31. " RX_CH15_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH15 interrupt" "Disabled,Enabled" bitfld.long 0x04 30. " RX_CH14_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH14 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " RX_CH13_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH13 interrupt" "Disabled,Enabled" bitfld.long 0x04 28. " RX_CH12_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH12 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " RX_CH11_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH11 interrupt" "Disabled,Enabled" bitfld.long 0x04 26. " RX_CH10_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH10 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " RX_CH9_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH9 interrupt" "Disabled,Enabled" bitfld.long 0x04 24. " RX_CH8_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH8 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " RX_CH7_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH7 interrupt" "Disabled,Enabled" bitfld.long 0x04 22. " RX_CH6_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH6 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " RX_CH5_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH5 interrupt" "Disabled,Enabled" bitfld.long 0x04 20. " RX_CH4_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH4 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " RX_CH3_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH3 interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " RX_CH2_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RX_CH1_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH1 interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " RX_CH0_TIMEOUT_INT_EN ,Interrupt signal for data timeout for CH0 interrupt" "Disabled,Enabled" line.long 0x8 "MIPI_HSI_TDMA0_CONF,Tx DMA Channel 0 Configuration Register" bitfld.long 0x8 31. " ENABLE ,Enables the inernal Tx DMA channel 0" "Disabled,Enabled" bitfld.long 0x8 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 0 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x8 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 0" line.long 0xC "MIPI_HSI_TDMA1_CONF,Tx DMA Channel 1 Configuration Register" bitfld.long 0xC 31. " ENABLE ,Enables the inernal Tx DMA channel 1" "Disabled,Enabled" bitfld.long 0xC 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 1 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0xC 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 1" line.long 0x10 "MIPI_HSI_TDMA2_CONF,Tx DMA Channel 2 Configuration Register" bitfld.long 0x10 31. " ENABLE ,Enables the inernal Tx DMA channel 2" "Disabled,Enabled" bitfld.long 0x10 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 2 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x10 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 2" line.long 0x14 "MIPI_HSI_TDMA3_CONF,Tx DMA Channel 3 Configuration Register" bitfld.long 0x14 31. " ENABLE ,Enables the inernal Tx DMA channel 3" "Disabled,Enabled" bitfld.long 0x14 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 3 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x14 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 3" line.long 0x18 "MIPI_HSI_TDMA4_CONF,Tx DMA Channel 4 Configuration Register" bitfld.long 0x18 31. " ENABLE ,Enables the inernal Tx DMA channel 4" "Disabled,Enabled" bitfld.long 0x18 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 4 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x18 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 4" line.long 0x1C "MIPI_HSI_TDMA5_CONF,Tx DMA Channel 5 Configuration Register" bitfld.long 0x1C 31. " ENABLE ,Enables the inernal Tx DMA channel 5" "Disabled,Enabled" bitfld.long 0x1C 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 5 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x1C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 5" line.long 0x20 "MIPI_HSI_TDMA6_CONF,Tx DMA Channel 6 Configuration Register" bitfld.long 0x20 31. " ENABLE ,Enables the inernal Tx DMA channel 6" "Disabled,Enabled" bitfld.long 0x20 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 6 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x20 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 6" line.long 0x24 "MIPI_HSI_TDMA7_CONF,Tx DMA Channel 7 Configuration Register" bitfld.long 0x24 31. " ENABLE ,Enables the inernal Tx DMA channel 7" "Disabled,Enabled" bitfld.long 0x24 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 7 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x24 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 7" line.long 0x28 "MIPI_HSI_TDMA8_CONF,Tx DMA Channel 8 Configuration Register" bitfld.long 0x28 31. " ENABLE ,Enables the inernal Tx DMA channel 8" "Disabled,Enabled" bitfld.long 0x28 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 8 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x28 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 8" line.long 0x2C "MIPI_HSI_TDMA9_CONF,Tx DMA Channel 9 Configuration Register" bitfld.long 0x2C 31. " ENABLE ,Enables the inernal Tx DMA channel 9" "Disabled,Enabled" bitfld.long 0x2C 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 9 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x2C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 9" line.long 0x30 "MIPI_HSI_TDMA10_CONF,Tx DMA Channel 10 Configuration Register" bitfld.long 0x30 31. " ENABLE ,Enables the inernal Tx DMA channel 10" "Disabled,Enabled" bitfld.long 0x30 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 10 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x30 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 10" line.long 0x34 "MIPI_HSI_TDMA11_CONF,Tx DMA Channel 11 Configuration Register" bitfld.long 0x34 31. " ENABLE ,Enables the inernal Tx DMA channel 11" "Disabled,Enabled" bitfld.long 0x34 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 11 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x34 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 11" line.long 0x38 "MIPI_HSI_TDMA12_CONF,Tx DMA Channel 12 Configuration Register" bitfld.long 0x38 31. " ENABLE ,Enables the inernal Tx DMA channel 12" "Disabled,Enabled" bitfld.long 0x38 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 12 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x38 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 12" line.long 0x3C "MIPI_HSI_TDMA13_CONF,Tx DMA Channel 13 Configuration Register" bitfld.long 0x3C 31. " ENABLE ,Enables the inernal Tx DMA channel 13" "Disabled,Enabled" bitfld.long 0x3C 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 13 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x3C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 13" line.long 0x40 "MIPI_HSI_TDMA14_CONF,Tx DMA Channel 14 Configuration Register" bitfld.long 0x40 31. " ENABLE ,Enables the inernal Tx DMA channel 14" "Disabled,Enabled" bitfld.long 0x40 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 14 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x40 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 14" line.long 0x44 "MIPI_HSI_TDMA15_CONF,Tx DMA Channel 15 Configuration Register" bitfld.long 0x44 31. " ENABLE ,Enables the inernal Tx DMA channel 15" "Disabled,Enabled" bitfld.long 0x44 25.--28. " BURST_SIZE ,Burst size for Tx DMA channel 15 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x44 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Tx DMA channel 15" line.long 0x48 "MIPI_HSI_RDMA0_CONF,Rx DMA Channel 0 Configuration Register" bitfld.long 0x48 31. " ENABLE ,Enables the inernal Rx DMA channel 0" "Disabled,Enabled" bitfld.long 0x48 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 0 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x48 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 0" line.long 0x4C "MIPI_HSI_RDMA1_CONF,Rx DMA Channel 1 Configuration Register" bitfld.long 0x4C 31. " ENABLE ,Enables the inernal Rx DMA channel 1" "Disabled,Enabled" bitfld.long 0x4C 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 1 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x4C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 1" line.long 0x50 "MIPI_HSI_RDMA2_CONF,Rx DMA Channel 2 Configuration Register" bitfld.long 0x50 31. " ENABLE ,Enables the inernal Rx DMA channel 2" "Disabled,Enabled" bitfld.long 0x50 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 2 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x50 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 2" line.long 0x54 "MIPI_HSI_RDMA3_CONF,Rx DMA Channel 3 Configuration Register" bitfld.long 0x54 31. " ENABLE ,Enables the inernal Rx DMA channel 3" "Disabled,Enabled" bitfld.long 0x54 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 3 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x54 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 3" line.long 0x58 "MIPI_HSI_RDMA4_CONF,Rx DMA Channel 4 Configuration Register" bitfld.long 0x58 31. " ENABLE ,Enables the inernal Rx DMA channel 4" "Disabled,Enabled" bitfld.long 0x58 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 4 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x58 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 4" line.long 0x5C "MIPI_HSI_RDMA5_CONF,Rx DMA Channel 5 Configuration Register" bitfld.long 0x5C 31. " ENABLE ,Enables the inernal Rx DMA channel 5" "Disabled,Enabled" bitfld.long 0x5C 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 5 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x5C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 5" line.long 0x60 "MIPI_HSI_RDMA6_CONF,Rx DMA Channel 6 Configuration Register" bitfld.long 0x60 31. " ENABLE ,Enables the inernal Rx DMA channel 6" "Disabled,Enabled" bitfld.long 0x60 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 6 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x60 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 6" line.long 0x64 "MIPI_HSI_RDMA7_CONF,Rx DMA Channel 7 Configuration Register" bitfld.long 0x64 31. " ENABLE ,Enables the inernal Rx DMA channel 7" "Disabled,Enabled" bitfld.long 0x64 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 7 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x64 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 7" line.long 0x68 "MIPI_HSI_RDMA8_CONF,Rx DMA Channel 8 Configuration Register" bitfld.long 0x68 31. " ENABLE ,Enables the inernal Rx DMA channel 8" "Disabled,Enabled" bitfld.long 0x68 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 8 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x68 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 8" line.long 0x6C "MIPI_HSI_RDMA9_CONF,Rx DMA Channel 9 Configuration Register" bitfld.long 0x6C 31. " ENABLE ,Enables the inernal Rx DMA channel 9" "Disabled,Enabled" bitfld.long 0x6C 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 9 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x6C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 9" line.long 0x70 "MIPI_HSI_RDMA10_CONF,Rx DMA Channel 10 Configuration Register" bitfld.long 0x70 31. " ENABLE ,Enables the inernal Rx DMA channel 10" "Disabled,Enabled" bitfld.long 0x70 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 10 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x70 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 10" line.long 0x74 "MIPI_HSI_RDMA11_CONF,Rx DMA Channel 11 Configuration Register" bitfld.long 0x74 31. " ENABLE ,Enables the inernal Rx DMA channel 11" "Disabled,Enabled" bitfld.long 0x74 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 11 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x74 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 11" line.long 0x78 "MIPI_HSI_RDMA12_CONF,Rx DMA Channel 12 Configuration Register" bitfld.long 0x78 31. " ENABLE ,Enables the inernal Rx DMA channel 12" "Disabled,Enabled" bitfld.long 0x78 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 12 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x78 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 12" line.long 0x7C "MIPI_HSI_RDMA13_CONF,Rx DMA Channel 13 Configuration Register" bitfld.long 0x7C 31. " ENABLE ,Enables the inernal Rx DMA channel 13" "Disabled,Enabled" bitfld.long 0x7C 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 13 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x7C 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 13" line.long 0x80 "MIPI_HSI_RDMA14_CONF,Rx DMA Channel 14 Configuration Register" bitfld.long 0x80 31. " ENABLE ,Enables the inernal Rx DMA channel 14" "Disabled,Enabled" bitfld.long 0x80 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 14 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x80 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 14" line.long 0x84 "MIPI_HSI_RDMA15_CONF,Rx DMA Channel 15 Configuration Register" bitfld.long 0x84 31. " ENABLE ,Enables the inernal Rx DMA channel 15" "Disabled,Enabled" bitfld.long 0x84 25.--28. " BURST_SIZE ,Burst size for Rx DMA channel 15 unit is Dword" "1,2,4,8,16,32,64,128,256,512,1024,?..." textline " " hexmask.long.tbyte 0x84 5.--24. 1. " TRANS_LENGTH ,Transfer data length for Rx DMA channel 15" line.long 0x88 "MIPI_HSI_TDMA0_STA_ADDR,Tx DMA Channel 0 Start Address Register" hexmask.long 0x88 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 0" line.long 0x8C "MIPI_HSI_TDMA1_STA_ADDR,Tx DMA Channel 1 Start Address Register" hexmask.long 0x8C 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 1" line.long 0x90 "MIPI_HSI_TDMA2_STA_ADDR,Tx DMA Channel 2 Start Address Register" hexmask.long 0x90 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 2" line.long 0x94 "MIPI_HSI_TDMA3_STA_ADDR,Tx DMA Channel 3 Start Address Register" hexmask.long 0x94 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 3" line.long 0x98 "MIPI_HSI_TDMA4_STA_ADDR,Tx DMA Channel 4 Start Address Register" hexmask.long 0x98 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 4" line.long 0x9C "MIPI_HSI_TDMA5_STA_ADDR,Tx DMA Channel 5 Start Address Register" hexmask.long 0x9C 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 5" line.long 0xA0 "MIPI_HSI_TDMA6_STA_ADDR,Tx DMA Channel 6 Start Address Register" hexmask.long 0xA0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 6" line.long 0xA4 "MIPI_HSI_TDMA7_STA_ADDR,Tx DMA Channel 7 Start Address Register" hexmask.long 0xA4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 7" line.long 0xA8 "MIPI_HSI_TDMA8_STA_ADDR,Tx DMA Channel 8 Start Address Register" hexmask.long 0xA8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 8" line.long 0xAC "MIPI_HSI_TDMA9_STA_ADDR,Tx DMA Channel 9 Start Address Register" hexmask.long 0xAC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 9" line.long 0xB0 "MIPI_HSI_TDMA10_STA_ADDR,Tx DMA Channel 10 Start Address Register" hexmask.long 0xB0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 10" line.long 0xB4 "MIPI_HSI_TDMA11_STA_ADDR,Tx DMA Channel 11 Start Address Register" hexmask.long 0xB4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 11" line.long 0xB8 "MIPI_HSI_TDMA12_STA_ADDR,Tx DMA Channel 12 Start Address Register" hexmask.long 0xB8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 12" line.long 0xBC "MIPI_HSI_TDMA13_STA_ADDR,Tx DMA Channel 13 Start Address Register" hexmask.long 0xBC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 13" line.long 0xC0 "MIPI_HSI_TDMA14_STA_ADDR,Tx DMA Channel 14 Start Address Register" hexmask.long 0xC0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 14" line.long 0xC4 "MIPI_HSI_TDMA15_STA_ADDR,Tx DMA Channel 15 Start Address Register" hexmask.long 0xC4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Tx DMA Channel 15" line.long 0xC8 "MIPI_HSI_RDMA0_STA_ADDR,Rx DMA Channel 0 Start Address Register" hexmask.long 0xC8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 0" line.long 0xCC "MIPI_HSI_RDMA1_STA_ADDR,Rx DMA Channel 1 Start Address Register" hexmask.long 0xCC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 1" line.long 0xD0 "MIPI_HSI_RDMA2_STA_ADDR,Rx DMA Channel 2 Start Address Register" hexmask.long 0xD0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 2" line.long 0xD4 "MIPI_HSI_RDMA3_STA_ADDR,Rx DMA Channel 3 Start Address Register" hexmask.long 0xD4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 3" line.long 0xD8 "MIPI_HSI_RDMA4_STA_ADDR,Rx DMA Channel 4 Start Address Register" hexmask.long 0xD8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 4" line.long 0xDC "MIPI_HSI_RDMA5_STA_ADDR,Rx DMA Channel 5 Start Address Register" hexmask.long 0xDC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 5" line.long 0xE0 "MIPI_HSI_RDMA6_STA_ADDR,Rx DMA Channel 6 Start Address Register" hexmask.long 0xE0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 6" line.long 0xE4 "MIPI_HSI_RDMA7_STA_ADDR,Rx DMA Channel 7 Start Address Register" hexmask.long 0xE4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 7" line.long 0xE8 "MIPI_HSI_RDMA8_STA_ADDR,Rx DMA Channel 8 Start Address Register" hexmask.long 0xE8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 8" line.long 0xEC "MIPI_HSI_RDMA9_STA_ADDR,Rx DMA Channel 9 Start Address Register" hexmask.long 0xEC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 9" line.long 0xF0 "MIPI_HSI_RDMA10_STA_ADDR,Rx DMA Channel 10 Start Address Register" hexmask.long 0xF0 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 10" line.long 0xF4 "MIPI_HSI_RDMA11_STA_ADDR,Rx DMA Channel 11 Start Address Register" hexmask.long 0xF4 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 11" line.long 0xF8 "MIPI_HSI_RDMA12_STA_ADDR,Rx DMA Channel 12 Start Address Register" hexmask.long 0xF8 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 12" line.long 0xFC "MIPI_HSI_RDMA13_STA_ADDR,Rx DMA Channel 13 Start Address Register" hexmask.long 0xFC 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 13" line.long 0x100 "MIPI_HSI_RDMA14_STA_ADDR,Rx DMA Channel 14 Start Address Register" hexmask.long 0x100 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 14" line.long 0x104 "MIPI_HSI_RDMA15_STA_ADDR,Rx DMA Channel 15 Start Address Register" hexmask.long 0x104 2.--31. 0x04 " DS_ADDR ,The Physical Start Address for Rx DMA Channel 15" rgroup.long 0x1DC++0x03 line.long 0x00 "MIPI_HSI_DMA_IRQSTAT,DMA Interrupt Status Register" bitfld.long 0x00 31. " TDMA15 ,TDMA Channel 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 30. " TDMA14 ,TDMA Channel 14 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " TDMA13 ,TDMA Channel 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 28. " TDMA12 ,TDMA Channel 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " TDMA11 ,TDMA Channel 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " TDMA10 ,TDMA Channel 10 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TDMA9 ,TDMA Channel 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " TDMA8 ,TDMA Channel 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " TDMA7 ,TDMA Channel 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 22. " TDMA6 ,TDMA Channel 6 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " TDMA5 ,TDMA Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " TDMA4 ,TDMA Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " TDMA3 ,TDMA Channel 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " TDMA2 ,TDMA Channel 2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " TDMA1 ,TDMA Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " TDMA0 ,TDMA Channel 0 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " RDMA15 ,RDMA Channel 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " RDMA14 ,RDMA Channel 14 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " RDMA13 ,RDMA Channel 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " RDMA12 ,RDMA Channel 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " RDMA11 ,RDMA Channel 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " RDMA10 ,RDMA Channel 10 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RDMA9 ,RDMA Channel 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RDMA8 ,RDMA Channel 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RDMA7 ,RDMA Channel 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " RDMA6 ,RDMA Channel 6 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RDMA5 ,RDMA Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " RDMA4 ,RDMA Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RDMA3 ,RDMA Channel 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " RDMA2 ,RDMA Channel 2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RDMA1 ,RDMA Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " RDMA0 ,RDMA Channel 0 interrupt status" "No interrupt,Interrupt" group.long 0x1E0++0x07 line.long 0x00 "MIPI_HSI_DMA_IRQSTAT_EN,DMA Interrupt Enable Register" bitfld.long 0x00 31. " TDMA15 ,TDMA Channel 15 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 30. " TDMA14 ,TDMA Channel 14 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " TDMA13 ,TDMA Channel 13 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDMA12 ,TDMA Channel 12 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TDMA11 ,TDMA Channel 11 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TDMA10 ,TDMA Channel 10 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " TDMA9 ,TDMA Channel 9 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " TDMA8 ,TDMA Channel 8 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TDMA7 ,TDMA Channel 7 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. " TDMA6 ,TDMA Channel 6 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TDMA5 ,TDMA Channel 5 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDMA4 ,TDMA Channel 4 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TDMA3 ,TDMA Channel 3 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " TDMA2 ,TDMA Channel 2 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " TDMA1 ,TDMA Channel 1 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " TDMA0 ,TDMA Channel 0 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RDMA15 ,RDMA Channel 15 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " RDMA14 ,RDMA Channel 14 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RDMA13 ,RDMA Channel 13 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " RDMA12 ,RDMA Channel 12 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RDMA11 ,RDMA Channel 11 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " RDMA10 ,RDMA Channel 10 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RDMA9 ,RDMA Channel 9 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " RDMA8 ,RDMA Channel 8 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RDMA7 ,RDMA Channel 7 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " RDMA6 ,RDMA Channel 6 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RDMA5 ,RDMA Channel 5 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDMA4 ,RDMA Channel 4 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RDMA3 ,RDMA Channel 3 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RDMA2 ,RDMA Channel 2 interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RDMA1 ,RDMA Channel 1 interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDMA0 ,RDMA Channel 0 interrupt Enable" "Disabled,Enabled" line.long 0x04 "MIPI_HSI_DMA_IRQSIG_EN,DMA Interrupt Status Signal Enable Register" bitfld.long 0x04 31. " TDMA15 ,TDMA Channel 15 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 30. " TDMA14 ,TDMA Channel 14 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " TDMA13 ,TDMA Channel 13 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 28. " TDMA12 ,TDMA Channel 12 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TDMA11 ,TDMA Channel 11 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 26. " TDMA10 ,TDMA Channel 10 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " TDMA9 ,TDMA Channel 9 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 24. " TDMA8 ,TDMA Channel 8 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " TDMA7 ,TDMA Channel 7 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 22. " TDMA6 ,TDMA Channel 6 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " TDMA5 ,TDMA Channel 5 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 20. " TDMA4 ,TDMA Channel 4 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " TDMA3 ,TDMA Channel 3 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 18. " TDMA2 ,TDMA Channel 2 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " TDMA1 ,TDMA Channel 1 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 16. " TDMA0 ,TDMA Channel 0 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " RDMA15 ,RDMA Channel 15 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 14. " RDMA14 ,RDMA Channel 14 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " RDMA13 ,RDMA Channel 13 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 12. " RDMA12 ,RDMA Channel 12 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " RDMA11 ,RDMA Channel 11 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 10. " RDMA10 ,RDMA Channel 10 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " RDMA9 ,RDMA Channel 9 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 8. " RDMA8 ,RDMA Channel 8 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " RDMA7 ,RDMA Channel 7 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 6. " RDMA6 ,RDMA Channel 6 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RDMA5 ,RDMA Channel 5 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 4. " RDMA4 ,RDMA Channel 4 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RDMA3 ,RDMA Channel 3 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 2. " RDMA2 ,RDMA Channel 2 interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " RDMA1 ,RDMA Channel 1 interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 0. " RDMA0 ,RDMA Channel 0 interrupt status enable" "Disabled,Enabled" rgroup.long 0x1E8++0x03 line.long 0x00 "MIPI_HSI_DMA_ERR_IRQSTAT,DMA Error Interrupt Status Register" bitfld.long 0x00 31. " TDMA15 ,TDMA Channel 15 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 30. " TDMA14 ,TDMA Channel 14 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 29. " TDMA13 ,TDMA Channel 13 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 28. " TDMA12 ,TDMA Channel 12 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " TDMA11 ,TDMA Channel 11 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 26. " TDMA10 ,TDMA Channel 10 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 25. " TDMA9 ,TDMA Channel 9 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 24. " TDMA8 ,TDMA Channel 8 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 23. " TDMA7 ,TDMA Channel 7 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 22. " TDMA6 ,TDMA Channel 6 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " TDMA5 ,TDMA Channel 5 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 20. " TDMA4 ,TDMA Channel 4 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " TDMA3 ,TDMA Channel 3 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 18. " TDMA2 ,TDMA Channel 2 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 17. " TDMA1 ,TDMA Channel 1 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 16. " TDMA0 ,TDMA Channel 0 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 15. " RDMA15 ,RDMA Channel 15 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 14. " RDMA14 ,RDMA Channel 14 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " RDMA13 ,RDMA Channel 13 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 12. " RDMA12 ,RDMA Channel 12 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " RDMA11 ,RDMA Channel 11 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 10. " RDMA10 ,RDMA Channel 10 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 9. " RDMA9 ,RDMA Channel 9 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 8. " RDMA8 ,RDMA Channel 8 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " RDMA7 ,RDMA Channel 7 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 6. " RDMA6 ,RDMA Channel 6 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " RDMA5 ,RDMA Channel 5 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 4. " RDMA4 ,RDMA Channel 4 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " RDMA3 ,RDMA Channel 3 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 2. " RDMA2 ,RDMA Channel 2 error interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " RDMA1 ,RDMA Channel 1 error interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " RDMA0 ,RDMA Channel 0 error interrupt status" "Not occurred,Occurred" group.long 0x1EC++0x07 line.long 0x00 "MIPI_HSI_DMA_ERR_IRQSTAT_EN,DMA Error Interrupt Enable Register" bitfld.long 0x00 31. " TDMA15 ,TDMA Channel 15 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 30. " TDMA14 ,TDMA Channel 14 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " TDMA13 ,TDMA Channel 13 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDMA12 ,TDMA Channel 12 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TDMA11 ,TDMA Channel 11 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TDMA10 ,TDMA Channel 10 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " TDMA9 ,TDMA Channel 9 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " TDMA8 ,TDMA Channel 8 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TDMA7 ,TDMA Channel 7 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. " TDMA6 ,TDMA Channel 6 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TDMA5 ,TDMA Channel 5 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDMA4 ,TDMA Channel 4 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TDMA3 ,TDMA Channel 3 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " TDMA2 ,TDMA Channel 2 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " TDMA1 ,TDMA Channel 1 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " TDMA0 ,TDMA Channel 0 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RDMA15 ,RDMA Channel 15 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " RDMA14 ,RDMA Channel 14 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RDMA13 ,RDMA Channel 13 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " RDMA12 ,RDMA Channel 12 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RDMA11 ,RDMA Channel 11 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " RDMA10 ,RDMA Channel 10 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RDMA9 ,RDMA Channel 9 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " RDMA8 ,RDMA Channel 8 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RDMA7 ,RDMA Channel 7 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " RDMA6 ,RDMA Channel 6 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RDMA5 ,RDMA Channel 5 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RDMA4 ,RDMA Channel 4 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RDMA3 ,RDMA Channel 3 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RDMA2 ,RDMA Channel 2 error interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RDMA1 ,RDMA Channel 1 error interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDMA0 ,RDMA Channel 0 error interrupt Enable" "Disabled,Enabled" line.long 0x04 "MIPI_HSI_DMA_ERR_IRQSIG_EN,DMA Error Interrupt Signal Enable Register" bitfld.long 0x04 31. " TDMA15 ,TDMA Channel 15 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 30. " TDMA14 ,TDMA Channel 14 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " TDMA13 ,TDMA Channel 13 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 28. " TDMA12 ,TDMA Channel 12 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TDMA11 ,TDMA Channel 11 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 26. " TDMA10 ,TDMA Channel 10 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " TDMA9 ,TDMA Channel 9 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 24. " TDMA8 ,TDMA Channel 8 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " TDMA7 ,TDMA Channel 7 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 22. " TDMA6 ,TDMA Channel 6 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " TDMA5 ,TDMA Channel 5 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 20. " TDMA4 ,TDMA Channel 4 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " TDMA3 ,TDMA Channel 3 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 18. " TDMA2 ,TDMA Channel 2 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " TDMA1 ,TDMA Channel 1 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 16. " TDMA0 ,TDMA Channel 0 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " RDMA15 ,RDMA Channel 15 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 14. " RDMA14 ,RDMA Channel 14 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " RDMA13 ,RDMA Channel 13 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 12. " RDMA12 ,RDMA Channel 12 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " RDMA11 ,RDMA Channel 11 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 10. " RDMA10 ,RDMA Channel 10 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " RDMA9 ,RDMA Channel 9 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 8. " RDMA8 ,RDMA Channel 8 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " RDMA7 ,RDMA Channel 7 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 6. " RDMA6 ,RDMA Channel 6 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RDMA5 ,RDMA Channel 5 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 4. " RDMA4 ,RDMA Channel 4 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RDMA3 ,RDMA Channel 3 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 2. " RDMA2 ,RDMA Channel 2 error interrupt status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " RDMA1 ,RDMA Channel 1 error interrupt status enable" "Disabled,Enabled" bitfld.long 0x04 0. " RDMA0 ,RDMA Channel 0 error interrupt status enable" "Disabled,Enabled" rgroup.long 0x1F4++0x03 line.long 0x00 "MIPI_HSI_DMA_SINGLE_REQ_EN,DMA Single Request Enable Register" bitfld.long 0x00 31. " TDMA15 ,Tx Dma Channel 15" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 30. " TDMA14 ,Tx Dma Channel 14" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 29. " TDMA13 ,Tx Dma Channel 13" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 28. " TDMA12 ,Tx Dma Channel 12" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 27. " TDMA11 ,Tx Dma Channel 11" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 26. " TDMA10 ,Tx Dma Channel 10" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 25. " TDMA9 ,Tx Dma Channel 9" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 24. " TDMA8 ,Tx Dma Channel 8" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 23. " TDMA7 ,Tx Dma Channel 7" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 22. " TDMA6 ,Tx Dma Channel 6" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 21. " TDMA5 ,Tx Dma Channel 5" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 20. " TDMA4 ,Tx Dma Channel 4" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 19. " TDMA3 ,Tx Dma Channel 3" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 18. " TDMA2 ,Tx Dma Channel 2" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 17. " TDMA1 ,Tx Dma Channel 1" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 16. " TDMA0 ,Tx Dma Channel 0" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 15. " RDMA15 ,Rx Dma Channel 15" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 14. " RDMA14 ,Rx Dma Channel 14" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 13. " RDMA13 ,Rx Dma Channel 13" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 12. " RDMA12 ,Rx Dma Channel 12" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 11. " RDMA11 ,Rx Dma Channel 11" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 10. " RDMA10 ,Rx Dma Channel 10" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 9. " RDMA9 ,Rx Dma Channel 9" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 8. " RDMA8 ,Rx Dma Channel 8" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 7. " RDMA7 ,Rx Dma Channel 7" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 6. " RDMA6 ,Rx Dma Channel 6" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 5. " RDMA5 ,Rx Dma Channel 5" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 4. " RDMA4 ,Rx Dma Channel 4" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 3. " RDMA3 ,Rx Dma Channel 3" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 2. " RDMA2 ,Rx Dma Channel 2" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" textline " " bitfld.long 0x00 1. " RDMA1 ,Rx Dma Channel 1" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" bitfld.long 0x00 0. " RDMA0 ,Rx Dma Channel 0" "Remain DMA >= DMA burst size,Remain DMA < DMA burst size" group.long 0x200++0x07 line.long 0x00 "MIPI_HSI_TX_FIFO_SIZE_CONF0,TX Fifo Size Configuration Register 0" bitfld.long 0x00 28.--31. " CH15 ,Set the buffer size for channel 15" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 24.--27. " CH14 ,Set the buffer size for channel 14" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 20.--23. " CH13 ,Set the buffer size for channel 13" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 16.--19. " CH12 ,Set the buffer size for channel 12" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 12.--15. " CH11 ,Set the buffer size for channel 11" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 8.--11. " CH10 ,Set the buffer size for channel 10" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 4.--7. " CH9 ,Set the buffer size for channel 9" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 0.--3. " CH8 ,Set the buffer size for channel 8" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." line.long 0x04 "MIPI_HSI_TX_FIFO_SIZE_CONF1,TX Fifo Size Configuration Register 1" bitfld.long 0x04 28.--31. " CH7 ,Set the buffer size for channel 7" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 24.--27. " CH6 ,Set the buffer size for channel 6" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 20.--23. " CH5 ,Set the buffer size for channel 5" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 16.--19. " CH4 ,Set the buffer size for channel 4" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 12.--15. " CH3 ,Set the buffer size for channel 3" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 8.--11. " CH2 ,Set the buffer size for channel 2" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 4.--7. " CH1 ,Set the buffer size for channel 1" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 0.--3. " CH0 ,Set the buffer size for channel 0" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." group.long 0x208++0x07 line.long 0x00 "MIPI_HSI_RX_FIFO_SIZE_CONF0,RX Fifo Size Configuration Register 0" bitfld.long 0x00 28.--31. " CH15 ,Set the buffer size for channel 15" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 24.--27. " CH14 ,Set the buffer size for channel 14" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 20.--23. " CH13 ,Set the buffer size for channel 13" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 16.--19. " CH12 ,Set the buffer size for channel 12" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 12.--15. " CH11 ,Set the buffer size for channel 11" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 8.--11. " CH10 ,Set the buffer size for channel 10" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x00 4.--7. " CH9 ,Set the buffer size for channel 9" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x00 0.--3. " CH8 ,Set the buffer size for channel 8" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." line.long 0x04 "MIPI_HSI_RX_FIFO_SIZE_CONF1,RX Fifo Size Configuration Register 1" bitfld.long 0x04 28.--31. " CH7 ,Set the buffer size for channel 7" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 24.--27. " CH6 ,Set the buffer size for channel 6" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 20.--23. " CH5 ,Set the buffer size for channel 5" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 16.--19. " CH4 ,Set the buffer size for channel 4" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 12.--15. " CH3 ,Set the buffer size for channel 3" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 8.--11. " CH2 ,Set the buffer size for channel 2" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." textline " " bitfld.long 0x04 4.--7. " CH1 ,Set the buffer size for channel 1" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." bitfld.long 0x04 0.--3. " CH0 ,Set the buffer size for channel 0" "1 Dword,2 Dwords,4 Dwords,8 Dwords,16 Dwords,32 Dwords,64 Dwords,128 Dwords,256 Dwords,512 Dwords,1024 Dwords,?..." rgroup.long 0x210++0x07 line.long 0x0 "MIPI_HSI_TX_FIFO_STAT,TX Fifo Status Register" bitfld.long 0x0 30.--31. " CH15 ,Full and empty status for TX channel 15 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 28.--29. " CH14 ,Full and empty status for TX channel 14 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 26.--27. " CH13 ,Full and empty status for TX channel 13 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 24.--25. " CH12 ,Full and empty status for TX channel 12 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 22.--23. " CH11 ,Full and empty status for TX channel 11 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 20.--21. " CH10 ,Full and empty status for TX channel 10 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 18.--19. " CH9 ,Full and empty status for TX channel 9 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 16.--17. " CH8 ,Full and empty status for TX channel 8 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 14.--15. " CH7 ,Full and empty status for TX channel 7 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 12.--13. " CH6 ,Full and empty status for TX channel 6 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 10.--11. " CH5 ,Full and empty status for TX channel 5 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 8.--9. " CH4 ,Full and empty status for TX channel 4 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 6.--7. " CH3 ,Full and empty status for TX channel 3 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 4.--5. " CH2 ,Full and empty status for TX channel 2 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x0 2.--3. " CH1 ,Full and empty status for TX channel 1 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x0 0.--1. " CH0 ,Full and empty status for TX channel 0 fifo" "Not empty and full,Empty,Full,?..." line.long 0x4 "MIPI_HSI_RX_FIFO_STAT,RX Fifo Status Register" bitfld.long 0x4 30.--31. " CH15 ,Full and empty status for RX channel 15 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 28.--29. " CH14 ,Full and empty status for RX channel 14 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 26.--27. " CH13 ,Full and empty status for RX channel 13 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 24.--25. " CH12 ,Full and empty status for RX channel 12 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 22.--23. " CH11 ,Full and empty status for RX channel 11 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 20.--21. " CH10 ,Full and empty status for RX channel 10 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 18.--19. " CH9 ,Full and empty status for RX channel 9 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 16.--17. " CH8 ,Full and empty status for RX channel 8 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 14.--15. " CH7 ,Full and empty status for RX channel 7 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 12.--13. " CH6 ,Full and empty status for RX channel 6 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 10.--11. " CH5 ,Full and empty status for RX channel 5 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 8.--9. " CH4 ,Full and empty status for RX channel 4 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 6.--7. " CH3 ,Full and empty status for RX channel 3 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 4.--5. " CH2 ,Full and empty status for RX channel 2 fifo" "Not empty and full,Empty,Full,?..." textline " " bitfld.long 0x4 2.--3. " CH1 ,Full and empty status for RX channel 1 fifo" "Not empty and full,Empty,Full,?..." bitfld.long 0x4 0.--1. " CH0 ,Full and empty status for RX channel 0 fifo" "Not empty and full,Empty,Full,?..." group.long 0x228++0x07 line.long 0x00 "MIPI_HSI_AHB_MASTER_CONF,Ahb Master Config Register" bitfld.long 0x00 6.--9. " DP_HOLD_CYCLE ,Set the number of cycles for DP access fifo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--5. " DMA_MODE ,DMA mode" "Released bus,Keep sending,Not accessed,Not accessed" textline " " bitfld.long 0x00 0.--3. " DMA_INSERT_IDLE_NUM ,Set the number of IDLE cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MIPI_HSI_TX_BREAK_LEN,TX Break Length Register" bitfld.long 0x04 0.--5. " COUNT ,Tx break length count" "64,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0x0B tree.end tree.end tree "MLB150 (MediaLB 150)" base ad:0x0218C000 width 15. if (((per.l(ad:0x0218C000))&0x20)==0x20) group.long 0x00++0x03 line.long 0x00 "MLB150_MLBC0,MediaLB Control 0 Register" bitfld.long 0x00 15.--17. " FCNT[2:0] ,The number of frames per sub-buffer for synchronous channels" "1,2,4,8,16,32,64,?..." bitfld.long 0x00 14. " CTLRETRY ,Control Tx packet retry" "Skipped,Retransmitted" textline " " bitfld.long 0x00 12. " ASYRETRY ,Asynchronous Tx packet retry" "Skipped,Retransmitted" rbitfld.long 0x00 7. " MLBLK ,MediaLB lock status" "Cleared,Set" textline " " bitfld.long 0x00 5. " MLBPEN ,MediaLB interface" "3-pin,6-pin" bitfld.long 0x00 2.--4. " MLBCLK[2:0] ,MediaLB clock speed select" ",,,2048 Fs,3072 Fs,4096 Fs,6144 Fs,?..." textline " " bitfld.long 0x00 0. " MLBEN ,MediaLB enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "MLB150_MLBC0,MediaLB Control 0 Register" bitfld.long 0x00 15.--17. " FCNT[2:0] ,The number of frames per sub-buffer for synchronous channels" "1,2,4,8,16,32,64,?..." bitfld.long 0x00 14. " CTLRETRY ,Control Tx packet retry" "Skipped,Retransmitted" textline " " bitfld.long 0x00 12. " ASYRETRY ,Asynchronous Tx packet retry" "Skipped,Retransmitted" rbitfld.long 0x00 7. " MLBLK ,MediaLB lock status" "Cleared,Set" textline " " bitfld.long 0x00 5. " MLBPEN ,MediaLB interface" "3-pin,6-pin" bitfld.long 0x00 2.--4. " MLBCLK[2:0] ,MediaLB clock speed select" "256 Fs,512 Fs,1024 Fs,?..." textline " " bitfld.long 0x00 0. " MLBEN ,MediaLB enable" "Disabled,Enabled" endif group.long 0x08++0x03 line.long 0x00 "MLB150_MLBPC0,MediaLB 6-pin Control 0 Register" bitfld.long 0x00 11. " MCLKHYS ,MediaLB (6-pin) hysteresis enable" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "MLB150_MS0,MediaLB Channel Status 0 Register" bitfld.long 0x00 31. " MCS31 ,MediaLB channel status bit 31" "Low,High" bitfld.long 0x00 30. " MCS30 ,MediaLB channel status bit 30" "Low,High" textline " " bitfld.long 0x00 29. " MCS29 ,MediaLB channel status bit 29" "Low,High" bitfld.long 0x00 28. " MCS28 ,MediaLB channel status bit 28" "Low,High" textline " " bitfld.long 0x00 27. " MCS27 ,MediaLB channel status bit 27" "Low,High" bitfld.long 0x00 26. " MCS26 ,MediaLB channel status bit 26" "Low,High" textline " " bitfld.long 0x00 25. " MCS25 ,MediaLB channel status bit 25" "Low,High" bitfld.long 0x00 24. " MCS24 ,MediaLB channel status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " MCS23 ,MediaLB channel status bit 23" "Low,High" bitfld.long 0x00 22. " MCS22 ,MediaLB channel status bit 22" "Low,High" textline " " bitfld.long 0x00 21. " MCS21 ,MediaLB channel status bit 21" "Low,High" bitfld.long 0x00 20. " MCS20 ,MediaLB channel status bit 20" "Low,High" textline " " bitfld.long 0x00 19. " MCS19 ,MediaLB channel status bit 19" "Low,High" bitfld.long 0x00 18. " MCS18 ,MediaLB channel status bit 18" "Low,High" textline " " bitfld.long 0x00 17. " MCS17 ,MediaLB channel status bit 17" "Low,High" bitfld.long 0x00 16. " MCS16 ,MediaLB channel status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " MCS15 ,MediaLB channel status bit 15" "Low,High" bitfld.long 0x00 14. " MCS14 ,MediaLB channel status bit 14" "Low,High" textline " " bitfld.long 0x00 13. " MCS13 ,MediaLB channel status bit 13" "Low,High" bitfld.long 0x00 12. " MCS12 ,MediaLB channel status bit 12" "Low,High" textline " " bitfld.long 0x00 11. " MCS11 ,MediaLB channel status bit 11" "Low,High" bitfld.long 0x00 10. " MCS10 ,MediaLB channel status bit 10" "Low,High" textline " " bitfld.long 0x00 9. " MCS9 ,MediaLB channel status bit 9" "Low,High" bitfld.long 0x00 8. " MCS8 ,MediaLB channel status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " MCS7 ,MediaLB channel status bit 7" "Low,High" bitfld.long 0x00 6. " MCS6 ,MediaLB channel status bit 6" "Low,High" textline " " bitfld.long 0x00 5. " MCS5 ,MediaLB channel status bit 5" "Low,High" bitfld.long 0x00 4. " MCS4 ,MediaLB channel status bit 4" "Low,High" textline " " bitfld.long 0x00 3. " MCS3 ,MediaLB channel status bit 3" "Low,High" bitfld.long 0x00 2. " MCS2 ,MediaLB channel status bit 2" "Low,High" textline " " bitfld.long 0x00 1. " MCS1 ,MediaLB channel status bit 1" "Low,High" bitfld.long 0x00 0. " MCS0 ,MediaLB channel status bit 0" "Low,High" group.long 0x10++0x03 line.long 0x00 "MLB150_MLBPC2,MediaLB 6-pin Control 2 Register" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") bitfld.long 0x00 15. " MORCE ,Output reference clock (for SPDIF and ASRC) enable" "Enabled,Disabled" hexmask.long.byte 0x00 8.--14. 1. " MORCD ,Divider factor of MLB output reference clock" textline " " endif bitfld.long 0x00 1.--2. " SDRTO ,MLB 6-pin interface: Signal/Data receiver threshold offset control" "0,1,2,3" bitfld.long 0x00 0. " SDOPC ,MLB 3-pin interface: Signal/Data output phase control" "Rising edge,Falling edge" rgroup.long 0x14++0x03 line.long 0x00 "MLB150_MS1,MediaLB Channel Status 1 Register" bitfld.long 0x00 31. " MCS63 ,MediaLB channel status bit 31" "Low,High" bitfld.long 0x00 30. " MCS62 ,MediaLB channel status bit 30" "Low,High" textline " " bitfld.long 0x00 29. " MCS61 ,MediaLB channel status bit 29" "Low,High" bitfld.long 0x00 28. " MCS60 ,MediaLB channel status bit 28" "Low,High" textline " " bitfld.long 0x00 27. " MCS59 ,MediaLB channel status bit 27" "Low,High" bitfld.long 0x00 26. " MCS58 ,MediaLB channel status bit 26" "Low,High" textline " " bitfld.long 0x00 25. " MCS57 ,MediaLB channel status bit 25" "Low,High" bitfld.long 0x00 24. " MCS56 ,MediaLB channel status bit 24" "Low,High" textline " " bitfld.long 0x00 23. " MCS55 ,MediaLB channel status bit 23" "Low,High" bitfld.long 0x00 22. " MCS54 ,MediaLB channel status bit 22" "Low,High" textline " " bitfld.long 0x00 21. " MCS53 ,MediaLB channel status bit 21" "Low,High" bitfld.long 0x00 20. " MCS52 ,MediaLB channel status bit 20" "Low,High" textline " " bitfld.long 0x00 19. " MCS51 ,MediaLB channel status bit 19" "Low,High" bitfld.long 0x00 18. " MCS50 ,MediaLB channel status bit 18" "Low,High" textline " " bitfld.long 0x00 17. " MCS49 ,MediaLB channel status bit 17" "Low,High" bitfld.long 0x00 16. " MCS48 ,MediaLB channel status bit 16" "Low,High" textline " " bitfld.long 0x00 15. " MCS47 ,MediaLB channel status bit 15" "Low,High" bitfld.long 0x00 14. " MCS46 ,MediaLB channel status bit 14" "Low,High" textline " " bitfld.long 0x00 13. " MCS45 ,MediaLB channel status bit 13" "Low,High" bitfld.long 0x00 12. " MCS44 ,MediaLB channel status bit 12" "Low,High" textline " " bitfld.long 0x00 11. " MCS43 ,MediaLB channel status bit 11" "Low,High" bitfld.long 0x00 10. " MCS42 ,MediaLB channel status bit 10" "Low,High" textline " " bitfld.long 0x00 9. " MCS41 ,MediaLB channel status bit 9" "Low,High" bitfld.long 0x00 8. " MCS40 ,MediaLB channel status bit 8" "Low,High" textline " " bitfld.long 0x00 7. " MCS39 ,MediaLB channel status bit 7" "Low,High" bitfld.long 0x00 6. " MC38 ,MediaLB channel status bit 6" "Low,High" textline " " bitfld.long 0x00 5. " MCS37 ,MediaLB channel status bit 5" "Low,High" bitfld.long 0x00 4. " MCS36 ,MediaLB channel status bit 4" "Low,High" textline " " bitfld.long 0x00 3. " MCS35 ,MediaLB channel status bit 3" "Low,High" bitfld.long 0x00 2. " MCS34 ,MediaLB channel status bit 2" "Low,High" textline " " bitfld.long 0x00 1. " MCS33 ,MediaLB channel status bit 1" "Low,High" bitfld.long 0x00 0. " MCS32 ,MediaLB channel status bit 0" "Low,High" group.long 0x20++0x03 line.long 0x00 "MLB150_MSS,MediaLB System Status Register" bitfld.long 0x00 5. " SERVREQ ,Service request enabled" "Disabled,Enabled" rbitfld.long 0x00 4. " SWSYSCMD ,Software system command detected" "Not detected,Detected" textline " " rbitfld.long 0x00 3. " CSSYSCMD ,Channel scan system command detected" "Not detected,Detected" rbitfld.long 0x00 2. " ULKSYSCMD ,Network unlock system command detected" "Not detected,Detected" textline " " rbitfld.long 0x00 1. " LKSYSCMD ,Network lock system command detected" "Not detected,Detected" rbitfld.long 0x00 0. " RSTSYSCMD ,Reset system command detected" "Not detected,Detected" rgroup.long 0x24++0x03 line.long 0x00 "MLB150_MSD,MediaLB System Data Register" hexmask.long.byte 0x00 24.--31. 1. " SD3[7:0] ,System data (byte 3)" hexmask.long.byte 0x00 16.--23. 1. " SD2[7:0] ,System data (byte 2)" textline " " hexmask.long.byte 0x00 8.--15. 1. " SD1[7:0] ,System data (byte 1)" hexmask.long.byte 0x00 0.--7. 1. " SD0[7:0] ,System data (byte 0)" group.long 0x2C++0x03 line.long 0x00 "MLB150_MIEN,MediaLB Interrupt Enable Register" bitfld.long 0x00 29. " CTX_BREAK ,Control Tx break enable" "Disabled,Enabled" bitfld.long 0x00 28. " CTX_PE ,Control Tx protocol error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CTX_DONE ,Control Tx packet done enable" "Disabled,Enabled" bitfld.long 0x00 26. " CRX_BREAK ,Control Rx break enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " CRX_PE ,Control Rx protocol error enable" "Disabled,Enabled" bitfld.long 0x00 24. " CRX_DONE ,Control Rx packet done enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATX_BREAK ,Asynchronous Tx break enable" "Disabled,Enabled" bitfld.long 0x00 21. " ATX_PE ,Asynchronous Tx protocol error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ATX_DONE ,Asynchronous Tx packet done enable" "Disabled,Enabled" bitfld.long 0x00 19. " ARX_BREAK ,Asynchronous Rx break enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ARX_PE ,Asynchronous Rx protocol error enable" "Disabled,Enabled" bitfld.long 0x00 17. " ARX_DONE ,Asynchronous Rx done enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SYNC_PE ,Synchronous protocol error enable" "Disabled,Enabled" bitfld.long 0x00 1. " ISOC_BUFO ,Isochronous Rx buffer overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISOC_PE ,Isochronous Rx protocol error enable" "Disabled,Enabled" group.long 0x38++0x07 line.long 0x00 "MLB150_MLBPC1,MediaLB 6-pin Control 1 Register" bitfld.long 0x00 8.--11. " CKRCVBIAS[3:0] ,Clock receiver bias control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " SDXMTBIAS[3:0] ,Signal/Data transmitter bias control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " SDRCVBIAS[3:0] ,Signal/Data receiver bias control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MLB150_MLBC1,MediaLB Control 1 Register" hexmask.long.byte 0x04 8.--15. 1. " NDA[7:0] ,Node device address" bitfld.long 0x04 7. " CLKM ,MediaLB clock missing status" "Toggled,Not toggled" textline " " bitfld.long 0x04 6. " LOCK ,MediaLB lock error status" "Locked,Unlocked" group.long 0x80++0x03 line.long 0x00 "MLB150_HCTL,HBI Control Register" bitfld.long 0x00 15. " EN ,HBI enable" "Disabled,Enabled" bitfld.long 0x00 1. " RST1 ,AGU1 software reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RST0 ,AGU0 software reset" "No reset,Reset" group.long 0x88++0x07 line.long 0x00 "MLB150_HCMR0,HBI Channel Mask 0 Register" bitfld.long 0x00 31. " CHM31P ,Bitwise channel mask bit 31" "Masked,Not masked" bitfld.long 0x00 30. " CHM30P ,Bitwise channel mask bit 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " CHM29P ,Bitwise channel mask bit 29" "Masked,Not masked" bitfld.long 0x00 28. " CHM28P ,Bitwise channel mask bit 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " CHM27P ,Bitwise channel mask bit 27" "Masked,Not masked" bitfld.long 0x00 26. " CHM26P ,Bitwise channel mask bit 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " CHM25P ,Bitwise channel mask bit 25" "Masked,Not masked" bitfld.long 0x00 24. " CHM24P ,Bitwise channel mask bit 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " CHM23P ,Bitwise channel mask bit 23" "Masked,Not masked" bitfld.long 0x00 22. " CHM22P ,Bitwise channel mask bit 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " CHM21P ,Bitwise channel mask bit 21" "Masked,Not masked" bitfld.long 0x00 20. " CHM20P ,Bitwise channel mask bit 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " CHM19P ,Bitwise channel mask bit 19" "Masked,Not masked" bitfld.long 0x00 18. " CHM18P ,Bitwise channel mask bit 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " CHM17P ,Bitwise channel mask bit 17" "Masked,Not masked" bitfld.long 0x00 16. " CHM16P ,Bitwise channel mask bit 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " CHM15P ,Bitwise channel mask bit 15" "Masked,Not masked" bitfld.long 0x00 14. " CHM14P ,Bitwise channel mask bit 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " CHM13P ,Bitwise channel mask bit 13" "Masked,Not masked" bitfld.long 0x00 12. " CHM12P ,Bitwise channel mask bit 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " CHM11P ,Bitwise channel mask bit 11" "Masked,Not masked" bitfld.long 0x00 10. " CHM10P ,Bitwise channel mask bit 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " CHM9P ,Bitwise channel mask bit 9" "Masked,Not masked" bitfld.long 0x00 8. " CHM8P ,Bitwise channel mask bit 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " CHM7P ,Bitwise channel mask bit 7" "Masked,Not masked" bitfld.long 0x00 6. " CHM6P ,Bitwise channel mask bit 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " CHM5P ,Bitwise channel mask bit 5" "Masked,Not masked" bitfld.long 0x00 4. " CHM4P ,Bitwise channel mask bit 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " CHM3P ,Bitwise channel mask bit 3" "Masked,Not masked" bitfld.long 0x00 2. " CHM2P ,Bitwise channel mask bit 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " CHM1P ,Bitwise channel mask bit 1" "Masked,Not masked" bitfld.long 0x00 0. " CHM0P ,Bitwise channel mask bit 0" "Masked,Not masked" line.long 0x04 "MLB150_HCMR1,HBI Channel Mask 1 Register" bitfld.long 0x04 31. " CHM63 ,Bitwise channel mask bit 63" "Masked,Not masked" bitfld.long 0x04 30. " CHM62 ,Bitwise channel mask bit 62" "Masked,Not masked" textline " " bitfld.long 0x04 29. " CHM61 ,Bitwise channel mask bit 61" "Masked,Not masked" bitfld.long 0x04 28. " CHM60 ,Bitwise channel mask bit 60" "Masked,Not masked" textline " " bitfld.long 0x04 27. " CHM59 ,Bitwise channel mask bit 59" "Masked,Not masked" bitfld.long 0x04 26. " CHM58 ,Bitwise channel mask bit 58" "Masked,Not masked" textline " " bitfld.long 0x04 25. " CHM57 ,Bitwise channel mask bit 57" "Masked,Not masked" bitfld.long 0x04 24. " CHM56 ,Bitwise channel mask bit 56" "Masked,Not masked" textline " " bitfld.long 0x04 23. " CHM55 ,Bitwise channel mask bit 55" "Masked,Not masked" bitfld.long 0x04 22. " CHM54 ,Bitwise channel mask bit 54" "Masked,Not masked" textline " " bitfld.long 0x04 21. " CHM53 ,Bitwise channel mask bit 53" "Masked,Not masked" bitfld.long 0x04 20. " CHM52 ,Bitwise channel mask bit 52" "Masked,Not masked" textline " " bitfld.long 0x04 19. " CHM51 ,Bitwise channel mask bit 51" "Masked,Not masked" bitfld.long 0x04 18. " CHM50 ,Bitwise channel mask bit 50" "Masked,Not masked" textline " " bitfld.long 0x04 17. " CHM49 ,Bitwise channel mask bit 49" "Masked,Not masked" bitfld.long 0x04 16. " CHM48 ,Bitwise channel mask bit 48" "Masked,Not masked" textline " " bitfld.long 0x04 15. " CHM47 ,Bitwise channel mask bit 47" "Masked,Not masked" bitfld.long 0x04 14. " CHM46 ,Bitwise channel mask bit 46" "Masked,Not masked" textline " " bitfld.long 0x04 13. " CHM45 ,Bitwise channel mask bit 45" "Masked,Not masked" bitfld.long 0x04 12. " CHM44 ,Bitwise channel mask bit 44" "Masked,Not masked" textline " " bitfld.long 0x04 11. " CHM43 ,Bitwise channel mask bit 43" "Masked,Not masked" bitfld.long 0x04 10. " CHM42 ,Bitwise channel mask bit 42" "Masked,Not masked" textline " " bitfld.long 0x04 9. " CHM41 ,Bitwise channel mask bit 41" "Masked,Not masked" bitfld.long 0x04 8. " CHM40 ,Bitwise channel mask bit 40" "Masked,Not masked" textline " " bitfld.long 0x04 7. " CHM39 ,Bitwise channel mask bit 39" "Masked,Not masked" bitfld.long 0x04 6. " CHM38 ,Bitwise channel mask bit 38" "Masked,Not masked" textline " " bitfld.long 0x04 5. " CHM37 ,Bitwise channel mask bit 37" "Masked,Not masked" bitfld.long 0x04 4. " CHM36 ,Bitwise channel mask bit 36" "Masked,Not masked" textline " " bitfld.long 0x04 3. " CHM35 ,Bitwise channel mask bit 35" "Masked,Not masked" bitfld.long 0x04 2. " CHM34 ,Bitwise channel mask bit 34" "Masked,Not masked" textline " " bitfld.long 0x04 1. " CHM33 ,Bitwise channel mask bit 33" "Masked,Not masked" bitfld.long 0x04 0. " CHM32 ,Bitwise channel mask bit 32" "Masked,Not masked" rgroup.long 0x90++0x0F line.long 0x00 "MLB150_HCER0,HBI Channel Error 0 Register" bitfld.long 0x00 31. " CERR31 ,Bitwise channel error bit 31" "No error,Error" bitfld.long 0x00 30. " CERR30 ,Bitwise channel error bit 30" "No error,Error" textline " " bitfld.long 0x00 29. " CERR29 ,Bitwise channel error bit 29" "No error,Error" bitfld.long 0x00 28. " CERR28 ,Bitwise channel error bit 28" "No error,Error" textline " " bitfld.long 0x00 27. " CERR27 ,Bitwise channel error bit 27" "No error,Error" bitfld.long 0x00 26. " CERR26 ,Bitwise channel error bit 26" "No error,Error" textline " " bitfld.long 0x00 25. " CERR25 ,Bitwise channel error bit 25" "No error,Error" bitfld.long 0x00 24. " CERR24 ,Bitwise channel error bit 24" "No error,Error" textline " " bitfld.long 0x00 23. " CERR23 ,Bitwise channel error bit 23" "No error,Error" bitfld.long 0x00 22. " CERR22 ,Bitwise channel error bit 22" "No error,Error" textline " " bitfld.long 0x00 21. " CERR21 ,Bitwise channel error bit 21" "No error,Error" bitfld.long 0x00 20. " CERR20 ,Bitwise channel error bit 20" "No error,Error" textline " " bitfld.long 0x00 19. " CERR19 ,Bitwise channel error bit 19" "No error,Error" bitfld.long 0x00 18. " CERR18 ,Bitwise channel error bit 18" "No error,Error" textline " " bitfld.long 0x00 17. " CERR17 ,Bitwise channel error bit 17" "No error,Error" bitfld.long 0x00 16. " CERR16 ,Bitwise channel error bit 16" "No error,Error" textline " " bitfld.long 0x00 15. " CERR15 ,Bitwise channel error bit 15" "No error,Error" bitfld.long 0x00 14. " CERR14 ,Bitwise channel error bit 14" "No error,Error" textline " " bitfld.long 0x00 13. " CERR13 ,Bitwise channel error bit 13" "No error,Error" bitfld.long 0x00 12. " CERR12 ,Bitwise channel error bit 12" "No error,Error" textline " " bitfld.long 0x00 11. " CERR11 ,Bitwise channel error bit 11" "No error,Error" bitfld.long 0x00 10. " CERR10 ,Bitwise channel error bit 10" "No error,Error" textline " " bitfld.long 0x00 9. " CERR9 ,Bitwise channel error bit 9" "No error,Error" bitfld.long 0x00 8. " CERR8 ,Bitwise channel error bit 8" "No error,Error" textline " " bitfld.long 0x00 7. " CERR7 ,Bitwise channel error bit 7" "No error,Error" bitfld.long 0x00 6. " CERR6 ,Bitwise channel error bit 6" "No error,Error" textline " " bitfld.long 0x00 5. " CERR5 ,Bitwise channel error bit 5" "No error,Error" bitfld.long 0x00 4. " CERR4 ,Bitwise channel error bit 4" "No error,Error" textline " " bitfld.long 0x00 3. " CERR3 ,Bitwise channel error bit 3" "No error,Error" bitfld.long 0x00 2. " CERR2 ,Bitwise channel error bit 2" "No error,Error" textline " " bitfld.long 0x00 1. " CERR1 ,Bitwise channel error bit 1" "No error,Error" bitfld.long 0x00 0. " CERR0 ,Bitwise channel error bit 0" "No error,Error" line.long 0x04 "MLB150_HCER1,HBI Channel Error 1 Register" bitfld.long 0x04 31. " CERR63 ,Bitwise channel error bit 63" "No error,Error" bitfld.long 0x04 30. " CERR62 ,Bitwise channel error bit 62" "No error,Error" textline " " bitfld.long 0x04 29. " CERR61 ,Bitwise channel error bit 61" "No error,Error" bitfld.long 0x04 28. " CERR60 ,Bitwise channel error bit 60" "No error,Error" textline " " bitfld.long 0x04 27. " CERR59 ,Bitwise channel error bit 59" "No error,Error" bitfld.long 0x04 26. " CERR58 ,Bitwise channel error bit 58" "No error,Error" textline " " bitfld.long 0x04 25. " CERR57 ,Bitwise channel error bit 57" "No error,Error" bitfld.long 0x04 24. " CERR56 ,Bitwise channel error bit 56" "No error,Error" textline " " bitfld.long 0x04 23. " CERR55 ,Bitwise channel error bit 55" "No error,Error" bitfld.long 0x04 22. " CERR54 ,Bitwise channel error bit 54" "No error,Error" textline " " bitfld.long 0x04 21. " CERR53 ,Bitwise channel error bit 53" "No error,Error" bitfld.long 0x04 20. " CERR52 ,Bitwise channel error bit 52" "No error,Error" textline " " bitfld.long 0x04 19. " CERR51 ,Bitwise channel error bit 51" "No error,Error" bitfld.long 0x04 18. " CERR50 ,Bitwise channel error bit 50" "No error,Error" textline " " bitfld.long 0x04 17. " CERR49 ,Bitwise channel error bit 49" "No error,Error" bitfld.long 0x04 16. " CERR48 ,Bitwise channel error bit 48" "No error,Error" textline " " bitfld.long 0x04 15. " CERR47 ,Bitwise channel error bit 47" "No error,Error" bitfld.long 0x04 14. " CERR46 ,Bitwise channel error bit 46" "No error,Error" textline " " bitfld.long 0x04 13. " CERR45 ,Bitwise channel error bit 45" "No error,Error" bitfld.long 0x04 12. " CERR44 ,Bitwise channel error bit 44" "No error,Error" textline " " bitfld.long 0x04 11. " CERR43 ,Bitwise channel error bit 43" "No error,Error" bitfld.long 0x04 10. " CERR42 ,Bitwise channel error bit 42" "No error,Error" textline " " bitfld.long 0x04 9. " CERR41 ,Bitwise channel error bit 41" "No error,Error" bitfld.long 0x04 8. " CERR40 ,Bitwise channel error bit 40" "No error,Error" textline " " bitfld.long 0x04 7. " CERR39 ,Bitwise channel error bit 39" "No error,Error" bitfld.long 0x04 6. " CERR38 ,Bitwise channel error bit 38" "No error,Error" textline " " bitfld.long 0x04 5. " CERR37 ,Bitwise channel error bit 37" "No error,Error" bitfld.long 0x04 4. " CERR36 ,Bitwise channel error bit 36" "No error,Error" textline " " bitfld.long 0x04 3. " CERR35 ,Bitwise channel error bit 35" "No error,Error" bitfld.long 0x04 2. " CERR34 ,Bitwise channel error bit 34" "No error,Error" textline " " bitfld.long 0x04 1. " CERR33 ,Bitwise channel error bit 33" "No error,Error" bitfld.long 0x04 0. " CERR32 ,Bitwise channel error bit 32" "No error,Error" line.long 0x08 "MLB150_HCBR0,HBI Channel Busy 0 Register" bitfld.long 0x08 31. " CHB31 ,Bitwise channel busy bit 31" "Idle,Busy" bitfld.long 0x08 30. " CHB30 ,Bitwise channel busy bit 30" "Idle,Busy" textline " " bitfld.long 0x08 29. " CHB29 ,Bitwise channel busy bit 29" "Idle,Busy" bitfld.long 0x08 28. " CHB28 ,Bitwise channel busy bit 28" "Idle,Busy" textline " " bitfld.long 0x08 27. " CHB27 ,Bitwise channel busy bit 27" "Idle,Busy" bitfld.long 0x08 26. " CHB26 ,Bitwise channel busy bit 26" "Idle,Busy" textline " " bitfld.long 0x08 25. " CHB25 ,Bitwise channel busy bit 25" "Idle,Busy" bitfld.long 0x08 24. " CHB24 ,Bitwise channel busy bit 24" "Idle,Busy" textline " " bitfld.long 0x08 23. " CHB23 ,Bitwise channel busy bit 23" "Idle,Busy" bitfld.long 0x08 22. " CHB22 ,Bitwise channel busy bit 22" "Idle,Busy" textline " " bitfld.long 0x08 21. " CHB21 ,Bitwise channel busy bit 21" "Idle,Busy" bitfld.long 0x08 20. " CHB20 ,Bitwise channel busy bit 20" "Idle,Busy" textline " " bitfld.long 0x08 19. " CHB19 ,Bitwise channel busy bit 19" "Idle,Busy" bitfld.long 0x08 18. " CHB18 ,Bitwise channel busy bit 18" "Idle,Busy" textline " " bitfld.long 0x08 17. " CHB17 ,Bitwise channel busy bit 17" "Idle,Busy" bitfld.long 0x08 16. " CHB16 ,Bitwise channel busy bit 16" "Idle,Busy" textline " " bitfld.long 0x08 15. " CHB15 ,Bitwise channel busy bit 15" "Idle,Busy" bitfld.long 0x08 14. " CHB14 ,Bitwise channel busy bit 14" "Idle,Busy" textline " " bitfld.long 0x08 13. " CHB13 ,Bitwise channel busy bit 13" "Idle,Busy" bitfld.long 0x08 12. " CHB12 ,Bitwise channel busy bit 12" "Idle,Busy" textline " " bitfld.long 0x08 11. " CHB11 ,Bitwise channel busy bit 11" "Idle,Busy" bitfld.long 0x08 10. " CHB10 ,Bitwise channel busy bit 10" "Idle,Busy" textline " " bitfld.long 0x08 9. " CHB9 ,Bitwise channel busy bit 9" "Idle,Busy" bitfld.long 0x08 8. " CHB8 ,Bitwise channel busy bit 8" "Idle,Busy" textline " " bitfld.long 0x08 7. " CHB7 ,Bitwise channel busy bit 7" "Idle,Busy" bitfld.long 0x08 6. " CHB6 ,Bitwise channel busy bit 6" "Idle,Busy" textline " " bitfld.long 0x08 5. " CHB5 ,Bitwise channel busy bit 5" "Idle,Busy" bitfld.long 0x08 4. " CHB4 ,Bitwise channel busy bit 4" "Idle,Busy" textline " " bitfld.long 0x08 3. " CHB3 ,Bitwise channel busy bit 3" "Idle,Busy" bitfld.long 0x08 2. " CHB2 ,Bitwise channel busy bit 2" "Idle,Busy" textline " " bitfld.long 0x08 1. " CHB1 ,Bitwise channel busy bit 1" "Idle,Busy" bitfld.long 0x08 0. " CHB0 ,Bitwise channel busy bit 0" "Idle,Busy" line.long 0x0C "MLB150_HCBR1,HBI Channel Busy 1 Register" bitfld.long 0x0C 31. " CHB63 ,Bitwise channel busy bit 63" "Idle,Busy" bitfld.long 0x0C 30. " CHB62 ,Bitwise channel busy bit 62" "Idle,Busy" textline " " bitfld.long 0x0C 29. " CHB61 ,Bitwise channel busy bit 61" "Idle,Busy" bitfld.long 0x0C 28. " CHB60 ,Bitwise channel busy bit 60" "Idle,Busy" textline " " bitfld.long 0x0C 27. " CHB59 ,Bitwise channel busy bit 59" "Idle,Busy" bitfld.long 0x0C 26. " CHB58 ,Bitwise channel busy bit 58" "Idle,Busy" textline " " bitfld.long 0x0C 25. " CHB57 ,Bitwise channel busy bit 57" "Idle,Busy" bitfld.long 0x0C 24. " CHB56 ,Bitwise channel busy bit 56" "Idle,Busy" textline " " bitfld.long 0x0C 23. " CHB55 ,Bitwise channel busy bit 55" "Idle,Busy" bitfld.long 0x0C 22. " CHB54 ,Bitwise channel busy bit 54" "Idle,Busy" textline " " bitfld.long 0x0C 21. " CHB53 ,Bitwise channel busy bit 53" "Idle,Busy" bitfld.long 0x0C 20. " CHB52 ,Bitwise channel busy bit 52" "Idle,Busy" textline " " bitfld.long 0x0C 19. " CHB51 ,Bitwise channel busy bit 51" "Idle,Busy" bitfld.long 0x0C 18. " CHB50 ,Bitwise channel busy bit 50" "Idle,Busy" textline " " bitfld.long 0x0C 17. " CHB49 ,Bitwise channel busy bit 49" "Idle,Busy" bitfld.long 0x0C 16. " CHB48 ,Bitwise channel busy bit 48" "Idle,Busy" textline " " bitfld.long 0x0C 15. " CHB47 ,Bitwise channel busy bit 47" "Idle,Busy" bitfld.long 0x0C 14. " CHB46 ,Bitwise channel busy bit 46" "Idle,Busy" textline " " bitfld.long 0x0C 13. " CHB45 ,Bitwise channel busy bit 45" "Idle,Busy" bitfld.long 0x0C 12. " CHB44 ,Bitwise channel busy bit 44" "Idle,Busy" textline " " bitfld.long 0x0C 11. " CHB43 ,Bitwise channel busy bit 43" "Idle,Busy" bitfld.long 0x0C 10. " CHB42 ,Bitwise channel busy bit 42" "Idle,Busy" textline " " bitfld.long 0x0C 9. " CHB41 ,Bitwise channel busy bit 41" "Idle,Busy" bitfld.long 0x0C 8. " CHB40 ,Bitwise channel busy bit 40" "Idle,Busy" textline " " bitfld.long 0x0C 7. " CHB39 ,Bitwise channel busy bit 39" "Idle,Busy" bitfld.long 0x0C 6. " CHB38 ,Bitwise channel busy bit 38" "Idle,Busy" textline " " bitfld.long 0x0C 5. " CHB37 ,Bitwise channel busy bit 37" "Idle,Busy" bitfld.long 0x0C 4. " CHB36 ,Bitwise channel busy bit 36" "Idle,Busy" textline " " bitfld.long 0x0C 3. " CHB35 ,Bitwise channel busy bit 35" "Idle,Busy" bitfld.long 0x0C 2. " CHB34 ,Bitwise channel busy bit 34" "Idle,Busy" textline " " bitfld.long 0x0C 1. " CHB33 ,Bitwise channel busy bit 33" "Idle,Busy" bitfld.long 0x0C 0. " CHB32 ,Bitwise channel busy bit 32" "Idle,Busy" group.long 0xC0++0x27 line.long 0x0 "MLB150_MDAT0,MIF Data 0 Register" line.long 0x4 "MLB150_MDAT1,MIF Data 1 Register" line.long 0x8 "MLB150_MDAT2,MIF Data 2 Register" line.long 0xC "MLB150_MDAT3,MIF Data 3 Register" line.long 0x10 "MLB150_MDWE0,MIF Data Write Enable 0 Register" bitfld.long 0x10 31. " MASK31 ,Bitwise write enable for CTR data - bit 31" "Disabled,Enabled" bitfld.long 0x10 30. " MASK30 ,Bitwise write enable for CTR data - bit 30" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " MASK29 ,Bitwise write enable for CTR data - bit 29" "Disabled,Enabled" bitfld.long 0x10 28. " MASK28 ,Bitwise write enable for CTR data - bit 28" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " MASK27 ,Bitwise write enable for CTR data - bit 27" "Disabled,Enabled" bitfld.long 0x10 26. " MASK26 ,Bitwise write enable for CTR data - bit 26" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " MASK25 ,Bitwise write enable for CTR data - bit 25" "Disabled,Enabled" bitfld.long 0x10 24. " MASK24 ,Bitwise write enable for CTR data - bit 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " MASK23 ,Bitwise write enable for CTR data - bit 23" "Disabled,Enabled" bitfld.long 0x10 22. " MASK22 ,Bitwise write enable for CTR data - bit 22" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " MASK21 ,Bitwise write enable for CTR data - bit 21" "Disabled,Enabled" bitfld.long 0x10 20. " MASK20 ,Bitwise write enable for CTR data - bit 20" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " MASK19 ,Bitwise write enable for CTR data - bit 19" "Disabled,Enabled" bitfld.long 0x10 18. " MASK18 ,Bitwise write enable for CTR data - bit 18" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " MASK17 ,Bitwise write enable for CTR data - bit 17" "Disabled,Enabled" bitfld.long 0x10 16. " MASK16 ,Bitwise write enable for CTR data - bit 16" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " MASK15 ,Bitwise write enable for CTR data - bit 15" "Disabled,Enabled" bitfld.long 0x10 14. " MASK14 ,Bitwise write enable for CTR data - bit 14" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " MASK13 ,Bitwise write enable for CTR data - bit 13" "Disabled,Enabled" bitfld.long 0x10 12. " MASK12 ,Bitwise write enable for CTR data - bit 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " MASK11 ,Bitwise write enable for CTR data - bit 11" "Disabled,Enabled" bitfld.long 0x10 10. " MASK10 ,Bitwise write enable for CTR data - bit 10" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " MASK9 ,Bitwise write enable for CTR data - bit 9" "Disabled,Enabled" bitfld.long 0x10 8. " MASK8 ,Bitwise write enable for CTR data - bit 8" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " MASK7 ,Bitwise write enable for CTR data - bit 7" "Disabled,Enabled" bitfld.long 0x10 6. " MASK6 ,Bitwise write enable for CTR data - bit 6" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " MASK5 ,Bitwise write enable for CTR data - bit 5" "Disabled,Enabled" bitfld.long 0x10 4. " MASK4 ,Bitwise write enable for CTR data - bit 4" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " MASK3 ,Bitwise write enable for CTR data - bit 3" "Disabled,Enabled" bitfld.long 0x10 2. " MASK2 ,Bitwise write enable for CTR data - bit 2" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " MASK1 ,Bitwise write enable for CTR data - bit 1" "Disabled,Enabled" bitfld.long 0x10 0. " MASK0 ,Bitwise write enable for CTR data - bit 0" "Disabled,Enabled" line.long 0x14 "MLB150_MDWE1,MIF Data Write Enable 1 Register" bitfld.long 0x14 31. " MASK63 ,Bitwise write enable for CTR data - bit 63" "Disabled,Enabled" bitfld.long 0x14 30. " MASK62 ,Bitwise write enable for CTR data - bit 62" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " MASK61 ,Bitwise write enable for CTR data - bit 61" "Disabled,Enabled" bitfld.long 0x14 28. " MASK60 ,Bitwise write enable for CTR data - bit 60" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " MASK59 ,Bitwise write enable for CTR data - bit 59" "Disabled,Enabled" bitfld.long 0x14 26. " MASK58 ,Bitwise write enable for CTR data - bit 58" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " MASK57 ,Bitwise write enable for CTR data - bit 57" "Disabled,Enabled" bitfld.long 0x14 24. " MASK56 ,Bitwise write enable for CTR data - bit 56" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " MASK55 ,Bitwise write enable for CTR data - bit 55" "Disabled,Enabled" bitfld.long 0x14 22. " MASK54 ,Bitwise write enable for CTR data - bit 54" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " MASK53 ,Bitwise write enable for CTR data - bit 53" "Disabled,Enabled" bitfld.long 0x14 20. " MASK52 ,Bitwise write enable for CTR data - bit 52" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " MASK51 ,Bitwise write enable for CTR data - bit 51" "Disabled,Enabled" bitfld.long 0x14 18. " MASK50 ,Bitwise write enable for CTR data - bit 50" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " MASK49 ,Bitwise write enable for CTR data - bit 49" "Disabled,Enabled" bitfld.long 0x14 16. " MASK48 ,Bitwise write enable for CTR data - bit 48" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " MASK47 ,Bitwise write enable for CTR data - bit 47" "Disabled,Enabled" bitfld.long 0x14 14. " MASK46 ,Bitwise write enable for CTR data - bit 46" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " MASK45 ,Bitwise write enable for CTR data - bit 45" "Disabled,Enabled" bitfld.long 0x14 12. " MASK44 ,Bitwise write enable for CTR data - bit 44" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " MASK43 ,Bitwise write enable for CTR data - bit 43" "Disabled,Enabled" bitfld.long 0x14 10. " MASK42 ,Bitwise write enable for CTR data - bit 42" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " MASK41 ,Bitwise write enable for CTR data - bit 41" "Disabled,Enabled" bitfld.long 0x14 8. " MASK40 ,Bitwise write enable for CTR data - bit 40" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " MASK39 ,Bitwise write enable for CTR data - bit 39" "Disabled,Enabled" bitfld.long 0x14 6. " MASK38 ,Bitwise write enable for CTR data - bit 38" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " MASK37 ,Bitwise write enable for CTR data - bit 37" "Disabled,Enabled" bitfld.long 0x14 4. " MASK36 ,Bitwise write enable for CTR data - bit 36" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " MASK35 ,Bitwise write enable for CTR data - bit 35" "Disabled,Enabled" bitfld.long 0x14 2. " MASK34 ,Bitwise write enable for CTR data - bit 34" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " MASK33 ,Bitwise write enable for CTR data - bit 33" "Disabled,Enabled" bitfld.long 0x14 0. " MASK32 ,Bitwise write enable for CTR data - bit 32" "Disabled,Enabled" line.long 0x18 "MLB150_MDWE2,MIF Data Write Enable 2 Register" bitfld.long 0x18 31. " MASK95 ,Bitwise write enable for CTR data - bit 95" "Disabled,Enabled" bitfld.long 0x18 30. " MASK94 ,Bitwise write enable for CTR data - bit 94" "Disabled,Enabled" textline " " bitfld.long 0x18 29. " MASK93 ,Bitwise write enable for CTR data - bit 93" "Disabled,Enabled" bitfld.long 0x18 28. " MASK92 ,Bitwise write enable for CTR data - bit 92" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " MASK91 ,Bitwise write enable for CTR data - bit 91" "Disabled,Enabled" bitfld.long 0x18 26. " MASK90 ,Bitwise write enable for CTR data - bit 90" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " MASK89 ,Bitwise write enable for CTR data - bit 89" "Disabled,Enabled" bitfld.long 0x18 24. " MASK88 ,Bitwise write enable for CTR data - bit 88" "Disabled,Enabled" textline " " bitfld.long 0x18 23. " MASK87 ,Bitwise write enable for CTR data - bit 87" "Disabled,Enabled" bitfld.long 0x18 22. " MASK86 ,Bitwise write enable for CTR data - bit 86" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " MASK85 ,Bitwise write enable for CTR data - bit 85" "Disabled,Enabled" bitfld.long 0x18 20. " MASK84 ,Bitwise write enable for CTR data - bit 84" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " MASK83 ,Bitwise write enable for CTR data - bit 83" "Disabled,Enabled" bitfld.long 0x18 18. " MASK82 ,Bitwise write enable for CTR data - bit 82" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " MASK81 ,Bitwise write enable for CTR data - bit 81" "Disabled,Enabled" bitfld.long 0x18 16. " MASK80 ,Bitwise write enable for CTR data - bit 80" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " MASK79 ,Bitwise write enable for CTR data - bit 79" "Disabled,Enabled" bitfld.long 0x18 14. " MASK78 ,Bitwise write enable for CTR data - bit 78" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " MASK77 ,Bitwise write enable for CTR data - bit 77" "Disabled,Enabled" bitfld.long 0x18 12. " MASK76 ,Bitwise write enable for CTR data - bit 76" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " MASK75 ,Bitwise write enable for CTR data - bit 75" "Disabled,Enabled" bitfld.long 0x18 10. " MASK74 ,Bitwise write enable for CTR data - bit 74" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " MASK73 ,Bitwise write enable for CTR data - bit 73" "Disabled,Enabled" bitfld.long 0x18 8. " MASK72 ,Bitwise write enable for CTR data - bit 72" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " MASK71 ,Bitwise write enable for CTR data - bit 71" "Disabled,Enabled" bitfld.long 0x18 6. " MASK70 ,Bitwise write enable for CTR data - bit 70" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " MASK69 ,Bitwise write enable for CTR data - bit 69" "Disabled,Enabled" bitfld.long 0x18 4. " MASK68 ,Bitwise write enable for CTR data - bit 68" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " MASK67 ,Bitwise write enable for CTR data - bit 67" "Disabled,Enabled" bitfld.long 0x18 2. " MASK66 ,Bitwise write enable for CTR data - bit 66" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " MASK65 ,Bitwise write enable for CTR data - bit 65" "Disabled,Enabled" bitfld.long 0x18 0. " MASK64 ,Bitwise write enable for CTR data - bit 64" "Disabled,Enabled" line.long 0x1C "MLB150_MDWE3,MIF Data Write Enable 3 Register" bitfld.long 0x1C 31. " MASK127 ,Bitwise write enable for CTR data - bit 127" "Disabled,Enabled" bitfld.long 0x1C 30. " MASK126 ,Bitwise write enable for CTR data - bit 126" "Disabled,Enabled" textline " " bitfld.long 0x1C 29. " MASK125 ,Bitwise write enable for CTR data - bit 125" "Disabled,Enabled" bitfld.long 0x1C 28. " MASK124 ,Bitwise write enable for CTR data - bit 124" "Disabled,Enabled" textline " " bitfld.long 0x1C 27. " MASK123 ,Bitwise write enable for CTR data - bit 123" "Disabled,Enabled" bitfld.long 0x1C 26. " MASK122 ,Bitwise write enable for CTR data - bit 122" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " MASK121 ,Bitwise write enable for CTR data - bit 121" "Disabled,Enabled" bitfld.long 0x1C 24. " MASK120 ,Bitwise write enable for CTR data - bit 120" "Disabled,Enabled" textline " " bitfld.long 0x1C 23. " MASK119 ,Bitwise write enable for CTR data - bit 119" "Disabled,Enabled" bitfld.long 0x1C 22. " MASK118 ,Bitwise write enable for CTR data - bit 118" "Disabled,Enabled" textline " " bitfld.long 0x1C 21. " MASK117 ,Bitwise write enable for CTR data - bit 117" "Disabled,Enabled" bitfld.long 0x1C 20. " MASK116 ,Bitwise write enable for CTR data - bit 116" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " MASK115 ,Bitwise write enable for CTR data - bit 115" "Disabled,Enabled" bitfld.long 0x1C 18. " MASK114 ,Bitwise write enable for CTR data - bit 114" "Disabled,Enabled" textline " " bitfld.long 0x1C 17. " MASK113 ,Bitwise write enable for CTR data - bit 113" "Disabled,Enabled" bitfld.long 0x1C 16. " MASK112 ,Bitwise write enable for CTR data - bit 112" "Disabled,Enabled" textline " " bitfld.long 0x1C 15. " MASK111 ,Bitwise write enable for CTR data - bit 111" "Disabled,Enabled" bitfld.long 0x1C 14. " MASK110 ,Bitwise write enable for CTR data - bit 110" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " MASK109 ,Bitwise write enable for CTR data - bit 109" "Disabled,Enabled" bitfld.long 0x1C 12. " MASK108 ,Bitwise write enable for CTR data - bit 108" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " MASK107 ,Bitwise write enable for CTR data - bit 107" "Disabled,Enabled" bitfld.long 0x1C 10. " MASK106 ,Bitwise write enable for CTR data - bit 106" "Disabled,Enabled" textline " " bitfld.long 0x1C 9. " MASK105 ,Bitwise write enable for CTR data - bit 105" "Disabled,Enabled" bitfld.long 0x1C 8. " MASK104 ,Bitwise write enable for CTR data - bit 104" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " MASK103 ,Bitwise write enable for CTR data - bit 103" "Disabled,Enabled" bitfld.long 0x1C 6. " MASK102 ,Bitwise write enable for CTR data - bit 102" "Disabled,Enabled" textline " " bitfld.long 0x1C 5. " MASK101 ,Bitwise write enable for CTR data - bit 101" "Disabled,Enabled" bitfld.long 0x1C 4. " MASK100 ,Bitwise write enable for CTR data - bit 100" "Disabled,Enabled" textline " " bitfld.long 0x1C 3. " MASK99 ,Bitwise write enable for CTR data - bit 99" "Disabled,Enabled" bitfld.long 0x1C 2. " MASK98 ,Bitwise write enable for CTR data - bit 98" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " MASK97 ,Bitwise write enable for CTR data - bit 97" "Disabled,Enabled" bitfld.long 0x1C 0. " MASK96 ,Bitwise write enable for CTR data - bit 96" "Disabled,Enabled" line.long 0x20 "MLB150_MCTL,MIF Control Register" rbitfld.long 0x20 0. " XCMP ,Transfer complete" "No,Yes" line.long 0x24 "MLB150_MADR,MIF Address Register" bitfld.long 0x24 31. " WNR ,Write-Not-Read selection" "Read,Write" bitfld.long 0x24 30. " TB ,Target location bit" "CTR,DBR" textline " " bitfld.long 0x24 8.--13. " ADDR[13:8] ,DBR address of 8-bit entry - bits[13:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x24 0.--7. 1. " ADDR[7:0] ,CTR address of 128-bit entry or DBR address of 8-bit entry - bits[7:0]" group.long 0x3C0++0x03 line.long 0x00 "MLB150_ACTL,AHB Control Register" bitfld.long 0x00 4. " MPB ,DMA Packet buffering mode" "Single-packet,Multiple-packet" bitfld.long 0x00 2. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.long 0x00 1. " SMX ,ACSR0 and ACSR1 generate an interrupts" "ahb_int[0] and ahb_int[1],ahb_int[0]" bitfld.long 0x00 0. " SCE ,Software clear enable" "Hardware,Software" rgroup.long 0x3D0++0x07 line.long 0x00 "MLB150_ACSR0,AHB Channel Status 0 Register" bitfld.long 0x00 31. " CHS31 ,Interrupt status for logical channel 31" "No interrupt,Interrupt" bitfld.long 0x00 30. " CHS30 ,Interrupt status for logical channel 30" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " CHS29 ,Interrupt status for logical channel 29" "No interrupt,Interrupt" bitfld.long 0x00 28. " CHS28 ,Interrupt status for logical channel 28" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " CHS27 ,Interrupt status for logical channel 27" "No interrupt,Interrupt" bitfld.long 0x00 26. " CHS26 ,Interrupt status for logical channel 26" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " CHS25 ,Interrupt status for logical channel 25" "No interrupt,Interrupt" bitfld.long 0x00 24. " CHS24 ,Interrupt status for logical channel 24" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " CHS23 ,Interrupt status for logical channel 23" "No interrupt,Interrupt" bitfld.long 0x00 22. " CHS22 ,Interrupt status for logical channel 22" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " CHS21 ,Interrupt status for logical channel 21" "No interrupt,Interrupt" bitfld.long 0x00 20. " CHS20 ,Interrupt status for logical channel 20" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CHS19 ,Interrupt status for logical channel 19" "No interrupt,Interrupt" bitfld.long 0x00 18. " CHS18 ,Interrupt status for logical channel 18" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " CHS17 ,Interrupt status for logical channel 17" "No interrupt,Interrupt" bitfld.long 0x00 16. " CHS16 ,Interrupt status for logical channel 16" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " CHS15 ,Interrupt status for logical channel 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " CHS14 ,Interrupt status for logical channel 14" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " CHS13 ,Interrupt status for logical channel 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " CHS12 ,Interrupt status for logical channel 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " CHS11 ,Interrupt status for logical channel 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " CHS10 ,Interrupt status for logical channel 10" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " CHS9 ,Interrupt status for logical channel 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " CHS8 ,Interrupt status for logical channel 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " CHS7 ,Interrupt status for logical channel 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " CHS6 ,Interrupt status for logical channel 6" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " CHS5 ,Interrupt status for logical channel 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " CHS4 ,Interrupt status for logical channel 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " CHS3 ,Interrupt status for logical channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " CHS2 ,Interrupt status for logical channel 2" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " CHS1 ,Interrupt status for logical channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " CHS0 ,Interrupt status for logical channel 0" "No interrupt,Interrupt" line.long 0x04 "MLB150_ACSR1,AHB Channel Status 1 Register" bitfld.long 0x04 31. " CHS63 ,Interrupt status for logical channel 63" "No interrupt,Interrupt" bitfld.long 0x04 30. " CHS62 ,Interrupt status for logical channel 62" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " CHS61 ,Interrupt status for logical channel 61" "No interrupt,Interrupt" bitfld.long 0x04 28. " CHS60 ,Interrupt status for logical channel 60" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " CHS59 ,Interrupt status for logical channel 59" "No interrupt,Interrupt" bitfld.long 0x04 26. " CHS58 ,Interrupt status for logical channel 58" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " CHS57 ,Interrupt status for logical channel 57" "No interrupt,Interrupt" bitfld.long 0x04 24. " CHS56 ,Interrupt status for logical channel 56" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " CHS55 ,Interrupt status for logical channel 55" "No interrupt,Interrupt" bitfld.long 0x04 22. " CHS54 ,Interrupt status for logical channel 54" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " CHS53 ,Interrupt status for logical channel 53" "No interrupt,Interrupt" bitfld.long 0x04 20. " CHS52 ,Interrupt status for logical channel 52" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " CHS51 ,Interrupt status for logical channel 51" "No interrupt,Interrupt" bitfld.long 0x04 18. " CHS50 ,Interrupt status for logical channel 50" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " CHS49 ,Interrupt status for logical channel 49" "No interrupt,Interrupt" bitfld.long 0x04 16. " CHS48 ,Interrupt status for logical channel 48" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " CHS47 ,Interrupt status for logical channel 47" "No interrupt,Interrupt" bitfld.long 0x04 14. " CHS46 ,Interrupt status for logical channel 46" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " CHS45 ,Interrupt status for logical channel 45" "No interrupt,Interrupt" bitfld.long 0x04 12. " CHS44 ,Interrupt status for logical channel 44" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " CHS43 ,Interrupt status for logical channel 43" "No interrupt,Interrupt" bitfld.long 0x04 10. " CHS42 ,Interrupt status for logical channel 42" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " CHS41 ,Interrupt status for logical channel 41" "No interrupt,Interrupt" bitfld.long 0x04 8. " CHS40 ,Interrupt status for logical channel 40" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " CHS39 ,Interrupt status for logical channel 39" "No interrupt,Interrupt" bitfld.long 0x04 6. " CHS38 ,Interrupt status for logical channel 38" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " CHS37 ,Interrupt status for logical channel 37" "No interrupt,Interrupt" bitfld.long 0x04 4. " CHS36 ,Interrupt status for logical channel 36" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CHS35 ,Interrupt status for logical channel 35" "No interrupt,Interrupt" bitfld.long 0x04 2. " CHS34 ,Interrupt status for logical channel 34" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " CHS33 ,Interrupt status for logical channel 33" "No interrupt,Interrupt" bitfld.long 0x04 0. " CHS32 ,Interrupt status for logical channel 32" "No interrupt,Interrupt" group.long 0x3D8++0x07 line.long 0x00 "MLB150_ACMR0,AHB Channel Mask 0 Register" bitfld.long 0x00 31. " CHM31 ,Bitwise channel mask bit 31" "Masked,Not masked" bitfld.long 0x00 30. " CHM30 ,Bitwise channel mask bit 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " CHM29 ,Bitwise channel mask bit 29" "Masked,Not masked" bitfld.long 0x00 28. " CHM28 ,Bitwise channel mask bit 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " CHM27 ,Bitwise channel mask bit 27" "Masked,Not masked" bitfld.long 0x00 26. " CHM26 ,Bitwise channel mask bit 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " CHM25 ,Bitwise channel mask bit 25" "Masked,Not masked" bitfld.long 0x00 24. " CHM24 ,Bitwise channel mask bit 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " CHM23 ,Bitwise channel mask bit 23" "Masked,Not masked" bitfld.long 0x00 22. " CHM22 ,Bitwise channel mask bit 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " CHM21 ,Bitwise channel mask bit 21" "Masked,Not masked" bitfld.long 0x00 20. " CHM20 ,Bitwise channel mask bit 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " CHM19 ,Bitwise channel mask bit 19" "Masked,Not masked" bitfld.long 0x00 18. " CHM18 ,Bitwise channel mask bit 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " CHM17 ,Bitwise channel mask bit 17" "Masked,Not masked" bitfld.long 0x00 16. " CHM16 ,Bitwise channel mask bit 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " CHM15 ,Bitwise channel mask bit 15" "Masked,Not masked" bitfld.long 0x00 14. " CHM14 ,Bitwise channel mask bit 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " CHM13 ,Bitwise channel mask bit 13" "Masked,Not masked" bitfld.long 0x00 12. " CHM12 ,Bitwise channel mask bit 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " CHM11 ,Bitwise channel mask bit 11" "Masked,Not masked" bitfld.long 0x00 10. " CHM10 ,Bitwise channel mask bit 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " CHM9 ,Bitwise channel mask bit 9" "Masked,Not masked" bitfld.long 0x00 8. " CHM8 ,Bitwise channel mask bit 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " CHM7 ,Bitwise channel mask bit 7" "Masked,Not masked" bitfld.long 0x00 6. " CHM6 ,Bitwise channel mask bit 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " CHM5 ,Bitwise channel mask bit 5" "Masked,Not masked" bitfld.long 0x00 4. " CHM4 ,Bitwise channel mask bit 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " CHM3 ,Bitwise channel mask bit 3" "Masked,Not masked" bitfld.long 0x00 2. " CHM2 ,Bitwise channel mask bit 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " CHM1 ,Bitwise channel mask bit 1" "Masked,Not masked" bitfld.long 0x00 0. " CHM0 ,Bitwise channel mask bit 0" "Masked,Not masked" line.long 0x04 "MLB150_ACMR1,AHB Channel Mask 1 Register" bitfld.long 0x04 31. " CHM63 ,Bitwise channel mask bit 63" "Masked,Not masked" bitfld.long 0x04 30. " CHM62 ,Bitwise channel mask bit 62" "Masked,Not masked" textline " " bitfld.long 0x04 29. " CHM61 ,Bitwise channel mask bit 61" "Masked,Not masked" bitfld.long 0x04 28. " CHM60 ,Bitwise channel mask bit 60" "Masked,Not masked" textline " " bitfld.long 0x04 27. " CHM59 ,Bitwise channel mask bit 59" "Masked,Not masked" bitfld.long 0x04 26. " CHM58 ,Bitwise channel mask bit 58" "Masked,Not masked" textline " " bitfld.long 0x04 25. " CHM57 ,Bitwise channel mask bit 57" "Masked,Not masked" bitfld.long 0x04 24. " CHM56 ,Bitwise channel mask bit 56" "Masked,Not masked" textline " " bitfld.long 0x04 23. " CHM55 ,Bitwise channel mask bit 55" "Masked,Not masked" bitfld.long 0x04 22. " CHM54 ,Bitwise channel mask bit 54" "Masked,Not masked" textline " " bitfld.long 0x04 21. " CHM53 ,Bitwise channel mask bit 53" "Masked,Not masked" bitfld.long 0x04 20. " CHM52 ,Bitwise channel mask bit 52" "Masked,Not masked" textline " " bitfld.long 0x04 19. " CHM51 ,Bitwise channel mask bit 51" "Masked,Not masked" bitfld.long 0x04 18. " CHM50 ,Bitwise channel mask bit 50" "Masked,Not masked" textline " " bitfld.long 0x04 17. " CHM49 ,Bitwise channel mask bit 49" "Masked,Not masked" bitfld.long 0x04 16. " CHM48 ,Bitwise channel mask bit 48" "Masked,Not masked" textline " " bitfld.long 0x04 15. " CHM47 ,Bitwise channel mask bit 47" "Masked,Not masked" bitfld.long 0x04 14. " CHM46 ,Bitwise channel mask bit 46" "Masked,Not masked" textline " " bitfld.long 0x04 13. " CHM45 ,Bitwise channel mask bit 45" "Masked,Not masked" bitfld.long 0x04 12. " CHM44 ,Bitwise channel mask bit 44" "Masked,Not masked" textline " " bitfld.long 0x04 11. " CHM43 ,Bitwise channel mask bit 43" "Masked,Not masked" bitfld.long 0x04 10. " CHM42 ,Bitwise channel mask bit 42" "Masked,Not masked" textline " " bitfld.long 0x04 9. " CHM41 ,Bitwise channel mask bit 41" "Masked,Not masked" bitfld.long 0x04 8. " CHM40 ,Bitwise channel mask bit 40" "Masked,Not masked" textline " " bitfld.long 0x04 7. " CHM39 ,Bitwise channel mask bit 39" "Masked,Not masked" bitfld.long 0x04 6. " CHM38 ,Bitwise channel mask bit 38" "Masked,Not masked" textline " " bitfld.long 0x04 5. " CHM37 ,Bitwise channel mask bit 37" "Masked,Not masked" bitfld.long 0x04 4. " CHM36 ,Bitwise channel mask bit 36" "Masked,Not masked" textline " " bitfld.long 0x04 3. " CHM35 ,Bitwise channel mask bit 35" "Masked,Not masked" bitfld.long 0x04 2. " CHM34 ,Bitwise channel mask bit 34" "Masked,Not masked" textline " " bitfld.long 0x04 1. " CHM33 ,Bitwise channel mask bit 33" "Masked,Not masked" bitfld.long 0x04 0. " CHM32 ,Bitwise channel mask bit 32" "Masked,Not masked" width 0x0B tree.end endif sif (cpu()=="IMX6SOLOLITE") tree "MMDC (Multi Mode DDR Controller)" base ad:0x021B0000 width 14. if (((per.l(ad:0x021B0000+0x18))&0x18)==0x08) group.long 0x00++0x07 line.long 0x00 "MDCTL,MMDC Core Control Register" bitfld.long 0x00 31. " SDE_0 ,MMDC Enable CS0" "Disabled,Enabled" bitfld.long 0x00 30. " SDE_1 ,MMDC Enable CS1" "Disabled,Enabled" bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11-bits,12-bits,13-bits,14-bits,15-bits,16-bits,?..." textline " " bitfld.long 0x00 20.--22. " COL ,Column Address Width" "9-bits,10-bits,11-bits,8-bits,12-bits,?..." bitfld.long 0x00 19. " BL ,Burst Length" "4," sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,?..." else bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,64-bit,?..." endif line.long 0x04 "MDPDC,MMDC Core Power Down Control Register" bitfld.long 0x04 28.--30. " PRCT_1 ,Precharge Timer - Chip Select 1" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 24.--26. " PRCT_0 ,Precharge Timer - Chip Select 0" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 16.--18. " TCKE ,CKE minimum pulse width" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x04 12.--15. " P_WDT_1 ,Power Down Timer - Chip Select 1" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 8.--11. " PWDT_0 ,Power Down Timer - Chip Select 0" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 6. " BOTH_CS_PD ,Both chip selects power-down" "Independently,Both" textline " " bitfld.long 0x04 3.--5. " TCKSRX ,Valid clock requirement before self-refresh exit" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x04 0.--2. " TCKSRE ,Valid clock requirement after self-refresh entry" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" hgroup.long 0x08++0x03 hide.long 0x00 "MDOTC,MMDC Core ODT Timing Control Register" textline " " group.long 0x0C++0x17 line.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hexmask.long.byte 0x00 24.--31. 1. " TRFC ,Refresh command to Active or Refresh command time" hexmask.long.byte 0x00 16.--23. 1. " TXSR ,Self-refresh exit to next valid command delay" bitfld.long 0x00 13.--15. " TXP ,Exit power-down to next valid command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 4.--8. " TFAW ,Four Active Window" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" bitfld.long 0x00 0.--3. " TRL ,CAS Read Latency" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." line.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" bitfld.long 0x04 16.--20. " TRAS ,Active to Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,?..." bitfld.long 0x04 9.--11. " TWR ,WRITE recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x04 5.--8. " TMRD ,Mode Register Set command cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" textline " " bitfld.long 0x04 0.--2. " TWL ,CAS Write Latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" bitfld.long 0x08 6.--8. " TRTP ,Internal READ command to PRECHARGE command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 3.--5. " TWTR ,Internal WRITE to READ command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 0.--2. " TRRD ,ACTIVE to ACTIVE command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x0C "MDMISC,MMDC Core Miscellaneous Register" rbitfld.long 0x0C 31. " CS0_RDY ,External status device on CS0" "Wake-up,Ready" rbitfld.long 0x0C 30. " CS1_RDY ,External status device on CS1" "Wake-up,Ready" textline "" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 21. " CK1_GATING ,Gating the secondary DDR clock" "two clocks,only one clock" textline "" endif bitfld.long 0x0C 20. " CALIB_PER_CS ,Defines the CS number that the associated calibration is targetted at" "CS0,CS1" textline " " bitfld.long 0x0C 18. " LHD ,Latency hiding disable" "No,Yes" bitfld.long 0x0C 16.--17. " WALAT ,Write Additional latency" "Not required,1 cycle,2 cycles,3 cycles" bitfld.long 0x0C 12. " BI_ON ,Bank Interleaving On" "Not interleaved,Interleaved" textline " " bitfld.long 0x0C 11. " LPDDR2_S2 ,LPDDR2 S2 device type indication" "LPDDR2-S4,LPDDR2-S2" bitfld.long 0x0C 9.--10. " MIF3_MODE ,Command prediction working mode" "Disabled,First pipe line stage,First pipe line stage/axi bus,First pipe line stage/axi bus/access queue" textline " " bitfld.long 0x0C 6.--8. " RALAT ,Read Additional Latency" "ASAP,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x0C 5. " DDR_4_BANK ,DDR device with 4 Banks" "8 banks,4 banks" endif textline " " bitfld.long 0x0C 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x0C 2. " LPDDR2_2CH ,LPDDR2 2-channels mode" "Disabled,Enabled" textline " " endif bitfld.long 0x0C 1. " RST ,Software Reset" "No reset,Reset" line.long 0x10 "MDSCR,MMDC Core Special Command Register" hexmask.long.byte 0x10 24.--31. 1. " MR_OP ,MRW 8 bit operand" hexmask.long.byte 0x10 16.--23. 1. " MR_ADDR , MRR/MRW ADDRESS" bitfld.long 0x10 15. " CON_REQ ,Configuration request" "Not requested,Requested" textline " " rbitfld.long 0x10 14. " CON_ACK ,Configuration acknowledge" "Forbidden,Permitted" rbitfld.long 0x10 10. " MRR_READ_DATA_VALID ,MRR READ DATA VALID" "Cleared,Set" bitfld.long 0x10 9. " WL_EN ,Write Level Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4.--6. " CMD ,Command" "Normal operation,Precharge all,Auto-Refresh,MRW Command,,Precharge all,MRR,?..." bitfld.long 0x10 3. " CMD_CS ,Chip Select" "0,1" bitfld.long 0x10 0.--2. " CMD_BA ,Bank Address" "0,1,2,3,4,5,6,7" line.long 0x14 "MDREF,MMDC Core Refresh Control Register" hexmask.long.word 0x14 16.--31. 1. " REF_CNT ,Refresh Counter" bitfld.long 0x14 14.--15. " REF_SEL ,Refresh Selector" "64KHz,32KHz,REF_CNT,Not triggered" bitfld.long 0x14 11.--13. " REFR ,Number of refresh commands every refresh cycle" "1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes" textline " " bitfld.long 0x14 0. " START_REF ,Start Refresh cycle" "No operation,Started" group.long 0x2C++0x7 line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hexmask.long.word 0x00 16.--28. 1. " TDAI ,Device auto initialization period" bitfld.long 0x00 12.--14. " RTW_SAME ,Controls the cycles delay between Read to Write commands in same chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 9.--11. " WTR_DIFF ,Controls the cycles delay between Write to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 6.--8. " WTW_DIFF ,Controls the cycles delay between Write to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " RTW_DIFF ,Controls the cycles delay between Read to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RTR_DIFF ,Controls the cycles delay between Read to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" bitfld.long 0x04 0.--5. " RST_TO_CKE , Idle time ater first CKE assertion" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" rgroup.long 0x34++0x03 line.long 0x00 "MDMRR,MMDC Core MRR Data Register" hexmask.long.byte 0x00 24.--31. 1. " MRR_READ_DATA3 ,MRR DATA that arrived on DQ[31:24]" hexmask.long.byte 0x00 16.--23. 1. " MRR_READ_DATA2 ,MRR DATA that arrived on DQ[23:16]" hexmask.long.byte 0x00 8.--15. 1. " MRR_READ_DATA1 ,MRR DATA that arrived on DQ[15:8]" textline " " hexmask.long.byte 0x00 0.--7. 1. " MRR_READ_DATA0 ,MRR DATA that arrived on DQ[7:0]" group.long 0x38++0x0B line.long 0x00 "MDCFG3LP,MMDC Core Timing Configuration Register 3" bitfld.long 0x00 16.--21. " RC_LP ,ACT to ACT or REF command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks,?..." bitfld.long 0x00 8.--11. " TRCD_LP ,ACT command to internal read or write delay time" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." bitfld.long 0x00 4.--7. " TRPPB_LP ,PRECHARGE (per bank) command period (same bank)" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." textline " " bitfld.long 0x00 0.--3. " TRPAB_LP ,PRECHARGE (all banks) command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." line.long 0x04 "MDMR4,MMDC Core MR4 Derating Register" bitfld.long 0x04 8. " TRRD_DE ,TRRD derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 7. " TRP_DE ,TRP derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 6. " TRAS_DE ,TRAS derating value" "Original,Derated in 1 cycle" textline " " bitfld.long 0x04 5. " TRC_DE ,TRC derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 4. " TRCD_DE ,TRCD derating value" "Original,Derated in 1 cycle" rbitfld.long 0x04 1. " UPDATE_DE_ACK ,Update Derated Values Acknowledge" "Not updated,Updated" textline " " bitfld.long 0x04 0. " UPDATE_DE_REQ ,Update Derated Values Request" "No operation,Requested" line.long 0x08 "MDASP,MMDC Core Address Space Partition Register" hexmask.long.byte 0x08 0.--6. 1. " CS0_END ,Define the absolute last address associated with CS0" group.long 0x400++0x17 line.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" bitfld.long 0x00 31. " ARCR_SEC_ERR_LOCK ,ARCR_SEC_ERR_EN lock" "Not locked,Locked" bitfld.long 0x00 30. " ARCR_SEC_ERR_EN ,Security read/write access violation in OKAY/SLV Error response " "OKAY,SLAVE error" bitfld.long 0x00 28. " ARCR_EXC_ERR_EN ,Exclusive read/write access violation of AXI 6.2.4 rule in OKAY/SLV Error response " "OKAY,SLAVE error" textline " " bitfld.long 0x00 24. " ARCR_RCH_EN ,Real time channel enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " ARCR_PAG_HIT ,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " ARCR_ACC_HIT ,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " ARCR_DYN_JMP ,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ARCR_DYN_MAX ,ARCR Dynamic Maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARCR_GUARD ,ARCR Guard" "15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30" line.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" rbitfld.long 0x04 25. " DVACK ,General DVFS acknowledge" "Not asserted,Asserted" rbitfld.long 0x04 24. " LPACK ,General low-power acknowledge" "Not asserted,Asserted" bitfld.long 0x04 21. " DVFS ,General DVFS request" "Not requested,Requested" textline " " bitfld.long 0x04 20. " LPMD ,General LPMD request" "Not requested,Requested" hexmask.long.byte 0x04 8.--15. 1. " PST ,Automatic Power saving timer" rbitfld.long 0x04 6. " WIS ,Write Idle Status" "Idle,Busy" textline " " rbitfld.long 0x04 5. " RIS ,Read Idle Status" "Idle,Busy" rbitfld.long 0x04 4. " PSS ,Power Saving Status" "Disabled,Enabled" bitfld.long 0x04 0. " PSD ,Automatic Power Saving Disable" "No,Yes" line.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hexmask.long.word 0x08 16.--31. 1. " EXC_ID_MONITOR1 ,Defines ID for Exclusive monitor#1" hexmask.long.word 0x08 0.--15. 1. " EXC_ID_MONITOR0 ,Defines ID for Exclusive monitor#0" line.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 1" hexmask.long.word 0x0C 16.--31. 1. " EXC_ID_MONITOR3 ,Defines ID for Exclusive monitor#3" hexmask.long.word 0x0C 0.--15. 1. " EXC_ID_MONITOR2 ,Defines ID for Exclusive monitor#2" line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" bitfld.long 0x10 9. " SBS ,Step By Step trigger" "Not launched,Launched" bitfld.long 0x10 8. " SBS_EN ,Step By Step debug Enable" "Disabled,Enabled" eventfld.long 0x10 3. " CYC_OVF ,Total Cycles Count Overflow" "No overflow,Overflow" textline " " bitfld.long 0x10 2. " PRF_FRZ ,Profiling freeze" "Not frozen,Frozen" bitfld.long 0x10 1. " DBG_RST ,Debug and Profiling Reset" "No reset,Reset" bitfld.long 0x10 0. " DBG_EN ,Debug and Profiling Enable" "Disabled,Enabled" line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" bitfld.long 0x14 31. " PRF_AXI_ID_MASK_31 ,Profiling AXI ID Mask 31" "Masked,Not masked" bitfld.long 0x14 30. " PRF_AXI_ID_MASK_30 ,Profiling AXI ID Mask 30" "Masked,Not masked" bitfld.long 0x14 29. " PRF_AXI_ID_MASK_29 ,Profiling AXI ID Mask 29" "Masked,Not masked" textline " " bitfld.long 0x14 28. " PRF_AXI_ID_MASK_28 ,Profiling AXI ID Mask 28" "Masked,Not masked" bitfld.long 0x14 27. " PRF_AXI_ID_MASK_27 ,Profiling AXI ID Mask 27" "Masked,Not masked" bitfld.long 0x14 26. " PRF_AXI_ID_MASK_26 ,Profiling AXI ID Mask 26" "Masked,Not masked" textline " " bitfld.long 0x14 25. " PRF_AXI_ID_MASK_25 ,Profiling AXI ID Mask 25" "Masked,Not masked" bitfld.long 0x14 24. " PRF_AXI_ID_MASK_24 ,Profiling AXI ID Mask 24" "Masked,Not masked" bitfld.long 0x14 23. " PRF_AXI_ID_MASK_23 ,Profiling AXI ID Mask 23" "Masked,Not masked" textline " " bitfld.long 0x14 22. " PRF_AXI_ID_MASK_22 ,Profiling AXI ID Mask 22" "Masked,Not masked" bitfld.long 0x14 21. " PRF_AXI_ID_MASK_21 ,Profiling AXI ID Mask 21" "Masked,Not masked" bitfld.long 0x14 20. " PRF_AXI_ID_MASK_20 ,Profiling AXI ID Mask 20" "Masked,Not masked" textline " " bitfld.long 0x14 19. " PRF_AXI_ID_MASK_19 ,Profiling AXI ID Mask 19" "Masked,Not masked" bitfld.long 0x14 18. " PRF_AXI_ID_MASK_18 ,Profiling AXI ID Mask 18" "Masked,Not masked" bitfld.long 0x14 17. " PRF_AXI_ID_MASK_17 ,Profiling AXI ID Mask 17" "Masked,Not masked" textline " " bitfld.long 0x14 16. " PRF_AXI_ID_MASK_16 ,Profiling AXI ID Mask 16" "Masked,Not masked" bitfld.long 0x14 15. " PRF_AXI_ID[15] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 14. " PRF_AXI_ID[14] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 13. " PRF_AXI_ID[13] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 12. " PRF_AXI_ID[12] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 11. " PRF_AXI_ID[11] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 10. " PRF_AXI_ID[10] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 9. " PRF_AXI_ID[9] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 8. " PRF_AXI_ID[8] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 7. " PRF_AXI_ID[7] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 6. " PRF_AXI_ID[6] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 5. " PRF_AXI_ID[5] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 4. " PRF_AXI_ID[4] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 3. " PRF_AXI_ID[3] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 2. " PRF_AXI_ID[2] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 1. " PRF_AXI_ID[1] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 0. " PRF_AXI_ID[0] ,Profiling AXI ID" "Low,High" rgroup.long 0x418++0x1F line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" line.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" line.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" line.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" line.long 0x18 "MASBS0,MMDC Core Step By Step Address" line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" hexmask.long.word 0x1C 16.--31. 1. " SBS_AXI_ID ,Step By Step AXI ID" bitfld.long 0x1C 13.--15. " SBS_LEN ,Step By Step Length" "1,2,3,4,5,6,7,8" bitfld.long 0x1C 12. " SBS_BUFF ,Step By Step Buffered" "0,1" textline " " bitfld.long 0x1C 10.--11. " SBS_BURST ,Step By Step Burst" "Fixed,INCR,WRAP,?..." bitfld.long 0x1C 7.--9. " SBS_SIZE ,Step By Step Size" "8 bits,16 bits,32 bits,64 bits,128 bits,?..." bitfld.long 0x1C 4.--6. " SBS_PROT ,Step By Step Protection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 2.--3. " SBS_LOCK ,Step By Step Lock" "0,1,2,3" bitfld.long 0x1C 1. " SBS_TYPE ,Step By Step Request Type" "Write,Read" bitfld.long 0x1C 0. " SBS_VLD ,Step By Step Valid" "Not valid,Valid" group.long 0x440++0x03 line.long 0x00 "MAGENP,MMDC Core General Purpose Register" bitfld.long 0x00 31. " GP31 ,General purpose read/write bit 31" "0,1" bitfld.long 0x00 30. " GP30 ,General purpose read/write bit 30" "0,1" bitfld.long 0x00 29. " GP29 ,General purpose read/write bit 29" "0,1" textline " " bitfld.long 0x00 28. " GP28 ,General purpose read/write bit 28" "0,1" bitfld.long 0x00 27. " GP27 ,General purpose read/write bit 27" "0,1" bitfld.long 0x00 26. " GP26 ,General purpose read/write bit 26" "0,1" textline " " bitfld.long 0x00 25. " GP25 ,General purpose read/write bit 25" "0,1" bitfld.long 0x00 24. " GP24 ,General purpose read/write bit 24" "0,1" bitfld.long 0x00 23. " GP23 ,General purpose read/write bit 23" "0,1" textline " " bitfld.long 0x00 22. " GP22 ,General purpose read/write bit 22" "0,1" bitfld.long 0x00 21. " GP21 ,General purpose read/write bit 21" "0,1" bitfld.long 0x00 20. " GP20 ,General purpose read/write bit 20" "0,1" textline " " bitfld.long 0x00 19. " GP19 ,General purpose read/write bit 19" "0,1" bitfld.long 0x00 18. " GP18 ,General purpose read/write bit 18" "0,1" bitfld.long 0x00 17. " GP17 ,General purpose read/write bit 17" "0,1" textline " " bitfld.long 0x00 16. " GP16 ,General purpose read/write bit 16" "0,1" bitfld.long 0x00 15. " GP15 ,General purpose read/write bit 15" "0,1" bitfld.long 0x00 14. " GP14 ,General purpose read/write bit 14" "0,1" textline " " bitfld.long 0x00 13. " GP13 ,General purpose read/write bit 13" "0,1" bitfld.long 0x00 12. " GP12 ,General purpose read/write bit 12" "0,1" bitfld.long 0x00 11. " GP11 ,General purpose read/write bit 11" "0,1" textline " " bitfld.long 0x00 10. " GP10 ,General purpose read/write bit 10" "0,1" bitfld.long 0x00 9. " GP9 ,General purpose read/write bit 9" "0,1" bitfld.long 0x00 8. " GP8 ,General purpose read/write bit 8" "0,1" textline " " bitfld.long 0x00 7. " GP7 ,General purpose read/write bit 7" "0,1" bitfld.long 0x00 6. " GP6 ,General purpose read/write bit 6" "0,1" bitfld.long 0x00 5. " GP5 ,General purpose read/write bit 5" "0,1" textline " " bitfld.long 0x00 4. " GP4 ,General purpose read/write bit 4" "0,1" bitfld.long 0x00 3. " GP3 ,General purpose read/write bit 3" "0,1" bitfld.long 0x00 2. " GP2 ,General purpose read/write bit 2" "0,1" textline " " bitfld.long 0x00 1. " GP1 ,General purpose read/write bit 1" "0,1" bitfld.long 0x00 0. " GP0 ,General purpose read/write bit 0" "0,1" textline "" group.long 0x800++0x13 line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" bitfld.long 0x00 27.--31. " ZQ_EARLY_COMPARATOR_EN_TIMER ,ZQ early comparator enable timer" ",,,,,,,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" textline " " bitfld.long 0x00 16. " ZQ_HW_FOR ,Force ZQ automatic calibration process with the i.MX ZQ calibration pad" "Not forced,Forced" rbitfld.long 0x00 11.--15. " ZQ_HW_PD_RES ,ZQ HW calibration pull-down result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" textline " " rbitfld.long 0x00 6.--10. " ZQ_HW_PU_RES ,ZQ automatic calibration pull-up result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x00 2.--5. " ZQ_HW_PER ,ZQ periodic calibration time" "1 ms,2 ms,4 ms,,,,,,,,1 sec,,,,16 sec,32 sec" textline " " bitfld.long 0x00 0.--1. " ZQ_MODE ,ZQ calibration mode" "Not issued,i.MX ZQ calibration pad/External DDR(when exiting),External DDR,i.MX ZQ calibration pad/External DDR(periodic/when exiting)" line.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" bitfld.long 0x04 16.--17. " ZQ_CMP_OUT_SMP ,Amount of cycles between driving the ZQ signals to the ZQ pad" "7 cycles,15 cycles,23 cycles,31 cycles" bitfld.long 0x04 13. " USE_ZQ_SW_VAL ,Use SW ZQ configured value for I/O pads resistor controls" "ZQ_HW_PD_VAL & ZQ_HW_PU_VAL,ZQ_SW_PD_VAL & ZQ_SW_PU_VAL" bitfld.long 0x04 12. " ZQ_SW_PD ,ZQ software PU/PD calibration" "PU,PD" textline " " bitfld.long 0x04 7.--11. " ZQ_SW_PD_VAL ,ZQ software pull-down resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x04 2.--6. " ZQ_SW_PU_VAL ,ZQ software pull-up resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" rbitfld.long 0x04 1. " ZQ_SW_RES ,ZQ software calibration result" "VDD/2" textline " " bitfld.long 0x04 0. " ZQ_SW_FOR ,Force ZQ SW calibration" "Not forced,Forced" line.long 0x08 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" rbitfld.long 0x08 11. " WL_HW_ERR3 ,Byte3 WL HW calibration error" "No error,Error" rbitfld.long 0x08 10. " WL_HW_ERR2 ,Byte2 WL HW calibration error" "No error,Error" rbitfld.long 0x08 9. " WL_HW_ERR1 ,Byte1 WL HW calibration error" "No error,Error" textline " " rbitfld.long 0x08 8. " WL_HW_ERR0 ,Byte0 WL HW calibration error" "No error,Error" rbitfld.long 0x08 7. " WL_SW_RES3 ,Byte3 WL software result" "Low,High" rbitfld.long 0x08 6. " WL_SW_RES2 ,Byte2 WL software result" "Low,High" textline " " rbitfld.long 0x08 5. " WL_SW_RES1 ,Byte1 WL software result" "Low,High" rbitfld.long 0x08 4. " WL_SW_RES0 ,Byte0 WL software result" "Low,High" bitfld.long 0x08 2. " SW_WL_CNT_EN ,SW WL count down enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SW_WL_EN ,Enable WL SW update" "Disabled,Enabled" bitfld.long 0x08 0. " HW_WL_EN ,Enable WL HW enable" "Disabled,Enabled" line.long 0x0C "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" bitfld.long 0x0C 25.--26. " WL_CYC_DEL1 ,Write level cycle delay for Byte 1" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 24. " WL_HC_DEL1 ,Write level half cycle delay for Byte 1" "No delay,Half cycle" hexmask.long.byte 0x0C 16.--22. 1. " WR_DL_ABS_OFFSET1 ,Absolute write-leveling delay offset for Byte 1" textline " " bitfld.long 0x0C 9.--10. " WL_CYC_DEL0 ,Write level cycle delay for Byte 0" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 8. " WL_HC_DEL0 ,Write level half cycle delay for Byte 0" "No delay,Half cycle" hexmask.long.byte 0x0C 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write-leveling delay offset for Byte 0" line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" bitfld.long 0x10 25.--26. " WL_CYC_DEL3 ,Write level cycle delay for Byte 3" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 24. " WL_HC_DEL3 ,Write level half cycle delay for Byte 3" "No delay,Half cycle" hexmask.long.byte 0x10 16.--22. 1. " WR_DL_ABS_OFFSET3 ,Absolute delay offset for Byte 3" textline " " bitfld.long 0x10 9.--10. " WL_CYC_DEL2 ,Write level cycle delay for Byte 2" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 8. " WL_HC_DEL2 ,Write level half cycle delay for Byte 2" "No delay,Half cycle" hexmask.long.byte 0x10 0.--6. 1. " WR_DL_ABS_OFFSET2 ,Absolute delay offset for Byte 2" rgroup.long 0x814++0x03 line.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WL_DL_UNIT_NUM3 ,Number of delay units that is actually used by write leveling delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WL_DL_UNIT_NUM2 ,Number of delay units that is actually used by write leveling delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WL_DL_UNIT_NUM1 ,Number of delay units that is actually used by write leveling delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL_DL_UNIT_NUM0 ,Number of delay units that is actually used by write leveling delay line 0" hgroup.long 0x818++0x03 hide.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" group.long 0x81C++0x1F line.long 0x00 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" bitfld.long 0x00 28.--30. " RD_DQ7_DEL ,Read dqs0 to dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 24.--26. " RD_DQ6_DEL ,Read dqs0 to dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 20.--22. " RD_DQ5_DEL ,Read dqs0 to dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 16.--18. " RD_DQ4_DEL ,Read dqs0 to dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 12.--14. " RD_DQ3_DEL ,Read dqs0 to dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 8.--10. " RD_DQ2_DEL ,Read dqs0 to dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 4.--6. " RD_DQ1_DEL ,Read dqs0 to dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 0.--2. " RD_DQ0_DEL ,Read dqs0 to dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x04 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" bitfld.long 0x04 28.--30. " RD_DQ15_DEL ,Read dqs1 to dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 24.--26. " RD_DQ14_DEL ,Read dqs1 to dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 20.--22. " RD_DQ13_DEL ,Read dqs1 to dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 16.--18. " RD_DQ12_DEL ,Read dqs1 to dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 12.--14. " RD_DQ11_DEL ,Read dqs1 to dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 8.--10. " RD_DQ10_DEL ,Read dqs1 to dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 4.--6. " RD_DQ9_DEL ,Read dqs1 to dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 0.--2. " RD_DQ8_DEL ,Read dqs1 to dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x08 "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" bitfld.long 0x08 28.--30. " RD_DQ23_DEL ,Read dqs2 to dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 24.--26. " RD_DQ22_DEL ,Read dqs2 to dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 20.--22. " RD_DQ21_DEL ,Read dqs2 to dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 16.--18. " RD_DQ20_DEL ,Read dqs2 to dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 12.--14. " RD_DQ19_DEL ,Read dqs2 to dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 8.--10. " RD_DQ18_DEL ,Read dqs2 to dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 4.--6. " RD_DQ17_DEL ,Read dqs2 to dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 0.--2. " RD_DQ16_DEL ,Read dqs2 to dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x0C "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" bitfld.long 0x0C 28.--30. " RD_DQ31_DEL ,Read dqs3 to dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 24.--26. " RD_DQ30_DEL ,Read dqs3 to dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 20.--22. " RD_DQ29_DEL ,Read dqs3 to dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 16.--18. " RD_DQ28_DEL ,Read dqs3 to dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 12.--14. " RD_DQ27_DEL ,Read dqs3 to dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 8.--10. " RD_DQ26_DEL ,Read dqs3 to dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 4.--6. " RD_DQ25_DEL ,Read dqs3 to dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 0.--2. " RD_DQ24_DEL ,Read dqs3 to dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x10 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" bitfld.long 0x10 30.--31. " WR_DM0_DEL ,Write dm0 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 28.--29. " WR_DQ7_DEL ,Write dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 24.--25. " WR_DQ6_DEL ,Write dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 20.--21. " WR_DQ5_DEL ,Write dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 16.--17. " WR_DQ4_DEL ,Write dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 12.--13. " WR_DQ3_DEL ,Write dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 8.--9. " WR_DQ2_DEL ,Write dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 4.--5. " WR_DQ1_DEL ,Write dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 0.--1. " WR_DQ0_DEL ,Write dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x14 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" bitfld.long 0x14 30.--31. " WR_DM1_DEL ,Write dm1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 28.--29. " WR_DQ15_DEL ,Write dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 24.--25. " WR_DQ14_DEL ,Write dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 20.--21. " WR_DQ13_DEL ,Write dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 16.--17. " WR_DQ12_DEL ,Write dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 12.--13. " WR_D11_DEL ,Write dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 8.--9. " WR_DQ10_DEL ,Write dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 4.--5. " WR_DQ9_DEL ,Write dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 0.--1. " WR_DQ8_DEL ,Write dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x18 "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" bitfld.long 0x18 30.--31. " WR_DM2_DEL ,Write dm2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 28.--29. " WR_DQ23_DEL ,Write dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 24.--25. " WR_DQ22_DEL ,Write dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 20.--21. " WR_DQ21_DEL ,Write dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 16.--17. " WR_DQ20_DEL ,Write dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 12.--13. " WR_D19_DEL ,Write dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 8.--9. " WR_DQ18_DEL ,Write dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 4.--5. " WR_DQ17_DEL ,Write dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 0.--1. " WR_DQ16_DEL ,Write dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x1C "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" bitfld.long 0x1C 30.--31. " WR_DM3_DEL ,Write dm3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 28.--29. " WR_DQ31_DEL ,Write dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 24.--25. " WR_DQ30_DEL ,Write dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 20.--21. " WR_DQ29_DEL ,Write dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 16.--17. " WR_DQ28_DEL ,Write dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 12.--13. " WR_D27_DEL ,Write dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 8.--9. " WR_DQ26_DEL ,Write dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 4.--5. " WR_DQ25_DEL ,Write dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 0.--1. " WR_DQ24_DEL ,Write dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays" sif (cpu()=="IMX6SOLOLITE") group.long 0x83C++0x07 line.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" bitfld.long 0x00 31. " RST_RD_FIFO ,Reset Read Data FIFO & pointers" "No reset,Reset" bitfld.long 0x00 30. " DG_CMP_CYC ,Read DQS gating sample cycle" "16 cycles,32 cycles" bitfld.long 0x00 29. " DG_DIS ,Read DQS gating disable" "No,Yes" textline " " bitfld.long 0x00 28. " HW_DG_EN ,Enable automatic read DQS gating calibration" "Disabled,Enabled" bitfld.long 0x00 24.--27. " DG_HC_DEL1 ,Read Dqs1 gating half cycles delay for Byte 1" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." bitfld.long 0x00 23. " DG_EXT_UP ,DG extend upper boundary" "Not extended,Extended" textline " " hexmask.long.byte 0x00 16.--22. 1. " DG_DL_ABS_OFFSET1 ,Absolute delay offset" rbitfld.long 0x00 12. " HW_DG_ERR ,HW DQS gating error " "No error,Error" bitfld.long 0x00 8.--11. " DG_HC_DEL0 ,Read DQS0 gating half cycles delay for Byte 0" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_ABS_OFFSET0 ,Absolute read DQS gating delay offset" line.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" bitfld.long 0x04 24.--27. " DG_HC_DEL3 ,Read DQS3 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." hexmask.long.byte 0x04 16.--22. 1. " DG_DL_ABS_OFFSET3 ,Absolute read DQS gating delay offset for Byte 3" bitfld.long 0x04 8.--11. " DG_HC_DEL2 ,Read DQS2 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x04 0.--6. 1. " DG_DL_ABS_OFFSET2 ,Absolute read DQS gating delay offset" rgroup.long 0x844++0x03 line.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " DG_DL_UNIT_NUM3 ,Number of delay units that is actually used by DQS gating delay line 3" hexmask.long.byte 0x00 16.--22. 1. " DG_DL_UNIT_NUM2 ,Number of delay units that is actually used by DQS gating delay line 2" hexmask.long.byte 0x00 8.--14. 1. " DG_DL_UNIT_NUM1 ,Number of delay units that is actually used by DQS gating delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_UNIT_NUM0 ,Number of delay units that is actually used by DQS gating delay line 0" else hgroup.long 0x83C++0x07 hide.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" hide.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" hgroup.long 0x844++0x03 hide.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" endif group.long 0x848++0x03 line.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_ABS_OFFSET3 ,Absolute read delay offset byte 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_ABS_OFFSET2 ,Absolute read delay offset byte 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_ABS_OFFSET1 ,Absolute read delay offset byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_ABS_OFFSET0 ,Absolute read delay offset byte 0" rgroup.long 0x84C++0x03 line.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_UNIT_NUM3 ,Number of delay units that is actually used by read delay line 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_UNIT_NUM2 ,Number of delay units that is actually used by read delay line 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_UNIT_NUM1 ,Number of delay units that is actually used by read delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_UNIT_NUM0 ,Number of delay units that is actually used by read delay line 0" group.long 0x850++0x03 line.long 0x00 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_ABS_OFFSET3 ,Absolute write delay offset for Byte 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_ABS_OFFSET2 ,Absolute write delay offset for Byte 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_ABS_OFFSET1 ,Absolute write delay offset for Byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write delay offset for Byte 30" rgroup.long 0x854++0x03 line.long 0x00 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_UNIT_NUM3 ,Number of delay units that is actually used by write delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_UNIT_NUM2 ,Number of delay units that is actually used by write delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_UNIT_NUM1 ,Number of delay units that is actually used by write delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_UNIT_NUM0 ,Number of delay units that is actually used by write delay line 0" group.long 0x858++0x0F line.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 10.--11. " SDCLK1_del ,DDR clock1 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " endif bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x04 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" hexmask.long.byte 0x04 24.--30. 1. " ZQ_LP2_HW_ZQCS ,Period in cycles that it takes the memory device to perform a Short ZQ calibration" hexmask.long.byte 0x04 16.--23. 1. " ZQ_LP2_HW_ZQCL ,Period in cycles that it takes the memory device to perform a Long ZQ calibration" hexmask.long.word 0x04 0.--8. 1. " ZQ_LP2_HW_ZQINIT ,Period in cycles that it takes the memory device to perform a Init ZQ calibration" line.long 0x08 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" bitfld.long 0x08 5. " HW_RDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x08 4. " HW_RDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x08 3. " HW_RDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x08 2. " HW_RDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x08 1. " HW_RDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x08 0. " HW_RDL_ERR0 ,HW RD DL0 error" "No error,Error" line.long 0x0C "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" bitfld.long 0x0C 5. " HW_WDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x0C 4. " HW_WDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x0C 3. " HW_WDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x0C 2. " HW_WDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x0C 1. " HW_WDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x0C 0. " HW_WDL_ERR0 ,HW RD DL0 error" "No error,Error" rgroup.long 0x868++0x13 line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " HW_RD_DL_UP1 ,HW RD DL1 upper boundary" hexmask.long.byte 0x00 16.--22. 1. " HW_RD_DL_LOW1 ,HW RD DL1 lower boundary" hexmask.long.byte 0x00 8.--14. 1. " HW_RD_DL_UP0 ,HW RD DL0 upper boundary" textline " " hexmask.long.byte 0x00 0.--6. 1. " HW_RD_DL_LOW0 ,HW RD DL0 lower boundary" line.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hexmask.long.byte 0x04 24.--30. 1. " HW_RD_DL_UP3 ,HW RD DL3 upper boundary" hexmask.long.byte 0x04 16.--22. 1. " HW_RD_DL_LOW3 ,HW RD DL3 lower boundary" hexmask.long.byte 0x04 8.--14. 1. " HW_RD_DL_UP2 ,HW RD DL2 upper boundary" textline " " hexmask.long.byte 0x04 0.--6. 1. " HW_RD_DL_LOW2 ,HW RD DL2 lower boundary" line.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hexmask.long.byte 0x08 24.--30. 1. " HW_WR_DL_UP1 ,HW WR DL1 upper boundary" hexmask.long.byte 0x08 16.--22. 1. " HW_WR_DL_LOW1 ,HW WR DL1 lower boundary" hexmask.long.byte 0x08 8.--14. 1. " HW_WR_DL_UP0 ,HW WR DL0 upper boundary" textline " " hexmask.long.byte 0x08 0.--6. 1. " HW_WR_DL_LOW0 ,HW WR DL0 lower boundary" line.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hexmask.long.byte 0x0C 24.--30. 1. " HW_WR_DL_UP3 ,HW WR DL3 upper boundary" hexmask.long.byte 0x0C 16.--22. 1. " HW_WR_DL_LOW3 ,HW WR DL3 lower boundary" hexmask.long.byte 0x0C 8.--14. 1. " HW_WR_DL_UP2 ,HW WR DL2 upper boundary" textline " " hexmask.long.byte 0x0C 0.--6. 1. " HW_WR_DL_LOW2 ,HW WR DL2 lower boundary" line.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hexmask.long.byte 0x10 24.--31. 1. " HW_WL3_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 16.--23. 1. " HW_WL2_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 8.--15. 1. " HW_WL1_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" textline " " hexmask.long.byte 0x10 0.--7. 1. " HW_WL0_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" sif (cpu()=="IMX6SOLOLITE") group.long 0x87C++0x0F line.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hexmask.long.word 0x00 16.--26. 1. " HW_DG_UP0 ,HW DG0 upper boundary" hexmask.long.word 0x00 0.--10. 1. " HW_DG_LOW0 ,HW DG0 lower boundary" line.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hexmask.long.word 0x04 16.--26. 1. " HW_DG_UP1 ,HW DG1 upper boundary" hexmask.long.word 0x04 0.--10. 1. " HW_DG_LOW1 ,HW DG1 lower boundary" line.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hexmask.long.word 0x08 16.--26. 1. " HW_DG_UP2 ,HW DG2 upper boundary" hexmask.long.word 0x08 0.--10. 1. " HW_DG_LOW2 ,HW DG2 lower boundary" line.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hexmask.long.word 0x0C 16.--26. 1. " HW_DG_UP3 ,HW DG3 upper boundary" hexmask.long.word 0x0C 0.--10. 1. " HW_DG_LOW3 ,HW DG3 lower boundary" else hgroup.long 0x87C++0x0F hide.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hide.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hide.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hide.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" endif group.long 0x88C++0x0B line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hexmask.long.word 0x00 16.--31. 1. " PDV2 ,Pre defined comapre value2" hexmask.long.word 0x00 0.--15. 1. " PDV1 ,Pre defined comapre value2" line.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " PHY_CA_DL_UNIT ,Number of delay units that is actually used by phy CA delay unit" hexmask.long.byte 0x04 16.--22. 1. " CA_DL_ABS_OFFSET ,Absolute delay offset" bitfld.long 0x04 2. " READ_LEVEL_PATTERN ,DQ calibration Read level pattern" "1010,0011" textline " " bitfld.long 0x04 1. " MPR_FULL_CMP ,DQ calibration full compare enable" "Disabled,Enabled" bitfld.long 0x04 0. " MPR_CMP ,DQ calibration compare enable" "Disabled,Enabled" line.long 0x08 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" rbitfld.long 0x08 5. " SW_DUM_CMP3 ,SW dummy read byte3 compare results" "Failed,Passed" rbitfld.long 0x08 4. " SW_DUM_CMP2 ,SW dummy read byte2 compare results" "Failed,Passed" rbitfld.long 0x08 3. " SW_DUM_CMP1 ,SW dummy read byte1 compare results" "Failed,Passed" textline " " rbitfld.long 0x08 2. " SW_DUM_CMP0 ,SW dummy read byte0 compare results" "Failed,Passed" bitfld.long 0x08 1. " SW_DUMMY_RD ,SW dummy read" "Not generated,Generated" bitfld.long 0x08 0. " SW_DUMMY_WR ,SW dummy write" "Not generated,Generated" rgroup.long 0x898++0x1F line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0" line.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" line.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" line.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" group.long 0x8B8++0x07 line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hexmask.long.word 0x00 16.--25. 1. " MU_UNIT_DEL_NUM ,Measure unit measured number of unit delay per cycle" bitfld.long 0x00 11. " FRC_MSR ,Force measuement on delay-lines" "Not forced,Forced" bitfld.long 0x00 10. " MU_BYP_EN ,Measure unit bypass enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " MU_BYP_VAL ,Measure unit bypass value" line.long 0x04 "MPWRCADL,MMDC PHY Write CA Delay Control Register" bitfld.long 0x04 18.--19. " WR_CA9_DEL ,CA9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 16.--17. " WR_CA8_DEL ,CA8 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 14.--15. " WR_CA7_DEL ,CA7 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 12.--13. " WR_CA6_DEL ,CA6 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 10.--11. " WR_CA5_DEL ,CA5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 8.--9. " WR_CA4_DEL ,CA4 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 6.--7. " WR_CA3_DEL ,CA3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 4.--5. " WR_CA2_DEL ,CA2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 2.--3. " WR_CA1_DEL ,CA1 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 0.--1. " WR_CA0_DEL ,CA0 delay fine tuning" "No change,1 delay,2 delays,3 delays" rgroup.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." elif (((per.l(ad:0x021B0000+0x18))&0x18)==0x00) group.long 0x00++0x23 line.long 0x00 "MDCTL,MMDC Core Control Register" bitfld.long 0x00 31. " SDE_0 ,MMDC Enable CS0" "Disabled,Enabled" bitfld.long 0x00 30. " SDE_1 ,MMDC Enable CS1" "Disabled,Enabled" bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11-bits,12-bits,13-bits,14-bits,15-bits,16-bits,?..." textline " " bitfld.long 0x00 20.--22. " COL ,Column Address Width" "9-bits,10-bits,11-bits,8-bits,12-bits,?..." bitfld.long 0x00 19. " BL ,Burst Length" ",8" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,?..." else bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit,32-bit,64-bit,?..." endif line.long 0x04 "MDPDC,MMDC Core Power Down Control Register" bitfld.long 0x04 28.--30. " PRCT_1 ,Precharge Timer - Chip Select 1" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 24.--26. " PRCT_0 ,Precharge Timer - Chip Select 0" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 16.--18. " TCKE ,CKE minimum pulse width" "1 cycle,2 cycles,,,,,7 cycles,8 cycles" textline " " bitfld.long 0x04 12.--15. " PWDT_1 ,Power Down Timer - Chip Select 1" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 8.--11. " PWDT_0 ,Power Down Timer - Chip Select 0" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 7. " SLOW_PD ,Slow precharge power-down" "Fast,Slow" textline " " bitfld.long 0x04 6. " BOTH_CS_PD ,Both chip selects power-down" "Independently,Both" bitfld.long 0x04 3.--5. " TCKSRX ,Valid clock requirement before self-refresh exit" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x04 0.--2. " TCKSRE ,Valid clock requirement after self-refresh entry" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x08 "MDOTC,MMDC Core ODT Timing Control Register" bitfld.long 0x08 27.--29. " TAOFPD ,Asynchronous RTT turn-off delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 24.--26. " TAONPD ,Asynchronous RTT turn-on delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 20.--23. " TANPD ,ODT to power down entry latency" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" textline " " bitfld.long 0x08 16.--19. " TAXPD ,ODT power down exit latency" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x08 12.--14. " TODTLON ,ODT turn on latency" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,?..." bitfld.long 0x08 4.--8. " TODT_IDLE_OFF ,Idle period before turning memory ODT off" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x0C "MDCFG0,MMDC Core Timing Configuration Register 0" hexmask.long.byte 0x0C 24.--31. 1. " TRFC ,Refresh command to Active or Refresh command time" hexmask.long.byte 0x0C 16.--23. 1. " TXS ,Self-refresh exit to next valid command delay" bitfld.long 0x0C 13.--15. " TXP ,Exit power down with DLL-on to any valid command" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x0C 9.--12. " TXPDLL ,Exit precharge power down with DLL frozen to commands requiring DLL" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x0C 4.--8. " TFAW ,Four Active Window" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" bitfld.long 0x0C 0.--3. " TCL ,CAS Read Latency" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." line.long 0x10 "MDCFG1,MMDC Core Timing Configuration Register 1" bitfld.long 0x10 29.--31. " TRCD ,Active command to internal read or write delay time" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks" bitfld.long 0x10 26.--28. " TRP ,Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks" bitfld.long 0x10 21.--25. " TRC ,Active to Active or Refresh command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" textline " " bitfld.long 0x10 16.--20. " TRAS ,Active to Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,?..." bitfld.long 0x10 15. " TRPA ,Precharge-all command period" "tRP,tRP+1" bitfld.long 0x10 9.--11. " TWR ,WRITE recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x10 5.--8. " TMRD ,Mode Register Set command cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x10 0.--2. " TCWL ,CAS Write Latency" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x14 "MDCFG2,MMDC Core Timing Configuration Register 2" hexmask.long.word 0x14 16.--24. 1. " TDLLK ,DLL locking time" bitfld.long 0x14 6.--8. " TRTP ,Internal READ command to PRECHARGE command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x14 3.--5. " TWTR ,Internal WRITE to READ command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x14 0.--2. " TRRD ,ACTIVE to ACTIVE command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x18 "MDMISC,MMDC Core Miscellaneous Register" rbitfld.long 0x18 31. " CS0_RDY ,External status device on CS0" "Wake-up,Ready" rbitfld.long 0x18 30. " CS1_RDY ,External status device on CS1" "Wake-up,Ready" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x18 21. " CK1_GATING ,Gating the secondary DDR clock" "two clocks,only one clock" textline " " endif bitfld.long 0x18 20. " CALIB_PER_CS ,Defines the CS number that the associated calibration is targetted at" "CS0,CS1" bitfld.long 0x18 19. " ADDR_MIRROR ,Address mirroring" "Disabled,Enabled" bitfld.long 0x18 18. " LHD ,Latency hiding disable" "No,Yes" textline " " bitfld.long 0x18 16.--17. " WALAT ,Write Additional latency" "Not required,1 cycle,2 cycles,3 cycles" bitfld.long 0x18 12. " BI_ON ,Bank Interleaving On" "Not interleaved,Interleaved" bitfld.long 0x18 9.--10. " MIF3_MODE ,Command prediction working mode" "Disabled,First pipe line stage,First pipe line stage/axi bus,First pipe line stage/axi bus/access queue" textline " " bitfld.long 0x18 6.--8. " RALAT ,Read Additional Latency" "ASAP,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x18 5. " DDR_4_BANK ,DDR device with 4 Banks" "8 banks,4 banks" textline " " bitfld.long 0x18 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." textline " " bitfld.long 0x18 1. " RST ,Software Reset" "No operation,Asserted" line.long 0x1C "MDSCR,MMDC Core Special Command Register" hexmask.long.byte 0x1C 24.--31. 1. " CMD_ADDR_MSB ,Command/Address MSB" hexmask.long.byte 0x1C 16.--23. 1. " CMD_ADDR_LSB , Command/Address LSB" bitfld.long 0x1C 15. " CON_REQ ,Configuration request" "Not requested,Requested" textline " " rbitfld.long 0x1C 14. " CON_ACK ,Configuration acknowledge" "Forbidden,Permitted" bitfld.long 0x1C 9. " WL_EN ,Write Level Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4.--6. " CMD ,Command" "Normal operation,Precharge all,Auto-Refresh,Load Mode Register,ZQ calibration,Precharge all,?..." bitfld.long 0x1C 3. " CMD_CS ,Chip Select" "0,1" bitfld.long 0x1C 0.--2. " CMD_BA ,Bank Address" "0,1,2,3,4,5,6,7" line.long 0x20 "MDREF,MMDC Core Refresh Control Register" hexmask.long.word 0x20 16.--31. 1. " REF_CNT ,Refresh Counter" bitfld.long 0x20 14.--15. " REF_SEL ,Refresh Selector" "64KHz,32KHz,REF_CNT,Not triggered" bitfld.long 0x20 11.--13. " REFR ,Refresh Rate" "1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes" textline " " bitfld.long 0x20 0. " START_REF ,Start Refresh cycle" "No operation,Started" group.long 0x2C++0x07 line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" bitfld.long 0x00 12.--14. " RTW_SAME ,Controls the cycles delay between Read to Write commands in same chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 9.--11. " WTR_DIFF ,Controls the cycles delay between Write to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WTW_DIFF ,Controls the cycles delay between Write to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " RTW_DIFF ,Controls the cycles delay between Read to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RTR_DIFF ,Controls the cycles delay between Read to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" hexmask.long.byte 0x04 16.--23. 1. " TXPR ,CKE HIGH to a valid command" bitfld.long 0x04 8.--13. " SDE_TO_RST , Time from SDE enable until DDR reset is high" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" bitfld.long 0x04 0.--5. " RST_TO_CKE ,Time from SDE enable to CKE rise" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" hgroup.long 0x34++0x0B hide.long 0x00 "MDMRR,MMDC Core MRR Data Register" hide.long 0x04 "MDCFG3LP,MMDC Core Timing Configuration Register 3" hide.long 0x08 "MDMR4,MMDC Core MR4 Derating Register" group.long 0x40++0x03 line.long 0x00 "MDASP,MMDC Core Address Space Partition Register" hexmask.long.byte 0x00 0.--6. 1. " CS0_END ,Define the absolute last address associated with CS0" group.long 0x400++0x17 line.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" bitfld.long 0x00 31. " ARCR_SEC_ERR_LOCK ,ARCR_SEC_ERR_EN lock" "Not locked,Locked" bitfld.long 0x00 30. " ARCR_SEC_ERR_EN ,Security read/write access violation in OKAY/SLV Error response " "OKAY,SLAVE error" bitfld.long 0x00 28. " ARCR_EXC_ERR_EN ,Exclusive read/write access violation of AXI 6.2.4 rule in OKAY/SLV Error response " "OKAY,SLAVE error" textline " " bitfld.long 0x00 24. " ARCR_RCH_EN ,Real time channel enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " ARCR_PAG_HIT ,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " ARCR_ACC_HIT ,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " ARCR_DYN_JMP ,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ARCR_DYN_MAX ,ARCR Dynamic Maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARCR_GUARD ,ARCR Guard" "15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30" line.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" rbitfld.long 0x04 25. " DVACK ,General DVFS acknowledge" "Not asserted,Asserted" rbitfld.long 0x04 24. " LPACK ,General low-power acknowledge" "Not asserted,Asserted" bitfld.long 0x04 21. " DVFS ,General DVFS request" "Not requested,Requested" textline " " bitfld.long 0x04 20. " LPMD ,General LPMD request" "Not requested,Requested" hexmask.long.byte 0x04 8.--15. 1. " PST ,Automatic Power saving timer" rbitfld.long 0x04 6. " WIS ,Write Idle Status" "Idle,Busy" textline " " rbitfld.long 0x04 5. " RIS ,Read Idle Status" "Idle,Busy" rbitfld.long 0x04 4. " PSS ,Power Saving Status" "Disabled,Enabled" bitfld.long 0x04 0. " PSD ,Automatic Power Saving Disable" "No,Yes" line.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hexmask.long.word 0x08 16.--31. 1. " EXC_ID_MONITOR1 ,Defines ID for Exclusive monitor#1" hexmask.long.word 0x08 0.--15. 1. " EXC_ID_MONITOR0 ,Defines ID for Exclusive monitor#0" line.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 1" hexmask.long.word 0x0C 16.--31. 1. " EXC_ID_MONITOR3 ,Defines ID for Exclusive monitor#3" hexmask.long.word 0x0C 0.--15. 1. " EXC_ID_MONITOR2 ,Defines ID for Exclusive monitor#2" line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" bitfld.long 0x10 9. " SBS ,Step By Step trigger" "Not launched,Launched" bitfld.long 0x10 8. " SBS_EN ,Step By Step debug Enable" "Disabled,Enabled" eventfld.long 0x10 3. " CYC_OVF ,Total Cycles count Overflow" "No overflow,Overflow" textline " " bitfld.long 0x10 2. " PRF_FRZ ,Profiling freeze" "Not frozen,Frozen" bitfld.long 0x10 1. " DBG_RST ,Debug and Profiling Reset" "No reset,Reset" bitfld.long 0x10 0. " DBG_EN ,Debug and Profiling Enable" "Disabled,Enabled" line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" bitfld.long 0x14 31. " PRF_AXI_ID_MASK_31 ,Profiling AXI ID Mask 31" "Masked,Not masked" bitfld.long 0x14 30. " PRF_AXI_ID_MASK_30 ,Profiling AXI ID Mask 30" "Masked,Not masked" bitfld.long 0x14 29. " PRF_AXI_ID_MASK_29 ,Profiling AXI ID Mask 29" "Masked,Not masked" textline " " bitfld.long 0x14 28. " PRF_AXI_ID_MASK_28 ,Profiling AXI ID Mask 28" "Masked,Not masked" bitfld.long 0x14 27. " PRF_AXI_ID_MASK_27 ,Profiling AXI ID Mask 27" "Masked,Not masked" bitfld.long 0x14 26. " PRF_AXI_ID_MASK_26 ,Profiling AXI ID Mask 26" "Masked,Not masked" textline " " bitfld.long 0x14 25. " PRF_AXI_ID_MASK_25 ,Profiling AXI ID Mask 25" "Masked,Not masked" bitfld.long 0x14 24. " PRF_AXI_ID_MASK_24 ,Profiling AXI ID Mask 24" "Masked,Not masked" bitfld.long 0x14 23. " PRF_AXI_ID_MASK_23 ,Profiling AXI ID Mask 23" "Masked,Not masked" textline " " bitfld.long 0x14 22. " PRF_AXI_ID_MASK_22 ,Profiling AXI ID Mask 22" "Masked,Not masked" bitfld.long 0x14 21. " PRF_AXI_ID_MASK_21 ,Profiling AXI ID Mask 21" "Masked,Not masked" bitfld.long 0x14 20. " PRF_AXI_ID_MASK_20 ,Profiling AXI ID Mask 20" "Masked,Not masked" textline " " bitfld.long 0x14 19. " PRF_AXI_ID_MASK_19 ,Profiling AXI ID Mask 19" "Masked,Not masked" bitfld.long 0x14 18. " PRF_AXI_ID_MASK_18 ,Profiling AXI ID Mask 18" "Masked,Not masked" bitfld.long 0x14 17. " PRF_AXI_ID_MASK_17 ,Profiling AXI ID Mask 17" "Masked,Not masked" textline " " bitfld.long 0x14 16. " PRF_AXI_ID_MASK_16 ,Profiling AXI ID Mask 16" "Masked,Not masked" bitfld.long 0x14 15. " PRF_AXI_ID[15] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 14. " PRF_AXI_ID[14] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 13. " PRF_AXI_ID[13] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 12. " PRF_AXI_ID[12] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 11. " PRF_AXI_ID[11] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 10. " PRF_AXI_ID[10] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 9. " PRF_AXI_ID[9] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 8. " PRF_AXI_ID[8] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 7. " PRF_AXI_ID[7] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 6. " PRF_AXI_ID[6] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 5. " PRF_AXI_ID[5] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 4. " PRF_AXI_ID[4] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 3. " PRF_AXI_ID[3] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 2. " PRF_AXI_ID[2] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 1. " PRF_AXI_ID[1] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 0. " PRF_AXI_ID[0] ,Profiling AXI ID" "Low,High" rgroup.long 0x418++0x1F line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" line.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" line.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" line.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" line.long 0x18 "MASBS0,MMDC Core Step By Step Address" line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" hexmask.long.word 0x1C 16.--31. 1. " SBS_AXI_ID ,Step By Step AXI ID" bitfld.long 0x1C 13.--15. " SBS_LEN ,Step By Step Length" "1,2,3,4,5,6,7,8" bitfld.long 0x1C 12. " SBS_BUFF ,Step By Step Buffered" "0,1" textline " " bitfld.long 0x1C 10.--11. " SBS_BURST ,Step By Step Burst" "Fixed,INCR,WRAP,?..." bitfld.long 0x1C 7.--9. " SBS_SIZE ,Step By Step Size" "8 bits,16 bits,32 bits,64 bits,128 bits,?..." bitfld.long 0x1C 4.--6. " SBS_PROT ,Step By Step Protection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 2.--3. " SBS_LOCK ,Step By Step Lock" "0,1,2,3" bitfld.long 0x1C 1. " SBS_TYPE ,Step By Step Request Type" "Write,Read" bitfld.long 0x1C 0. " SBS_VLD ,Step By Step Valid" "Not valid,Valid" group.long 0x440++0x03 line.long 0x00 "MAGENP,MMDC Core General Purpose Register" bitfld.long 0x00 31. " GP31 ,General purpose read/write bit 31" "0,1" bitfld.long 0x00 30. " GP30 ,General purpose read/write bit 30" "0,1" bitfld.long 0x00 29. " GP29 ,General purpose read/write bit 29" "0,1" textline " " bitfld.long 0x00 28. " GP28 ,General purpose read/write bit 28" "0,1" bitfld.long 0x00 27. " GP27 ,General purpose read/write bit 27" "0,1" bitfld.long 0x00 26. " GP26 ,General purpose read/write bit 26" "0,1" textline " " bitfld.long 0x00 25. " GP25 ,General purpose read/write bit 25" "0,1" bitfld.long 0x00 24. " GP24 ,General purpose read/write bit 24" "0,1" bitfld.long 0x00 23. " GP23 ,General purpose read/write bit 23" "0,1" textline " " bitfld.long 0x00 22. " GP22 ,General purpose read/write bit 22" "0,1" bitfld.long 0x00 21. " GP21 ,General purpose read/write bit 21" "0,1" bitfld.long 0x00 20. " GP20 ,General purpose read/write bit 20" "0,1" textline " " bitfld.long 0x00 19. " GP19 ,General purpose read/write bit 19" "0,1" bitfld.long 0x00 18. " GP18 ,General purpose read/write bit 18" "0,1" bitfld.long 0x00 17. " GP17 ,General purpose read/write bit 17" "0,1" textline " " bitfld.long 0x00 16. " GP16 ,General purpose read/write bit 16" "0,1" bitfld.long 0x00 15. " GP15 ,General purpose read/write bit 15" "0,1" bitfld.long 0x00 14. " GP14 ,General purpose read/write bit 14" "0,1" textline " " bitfld.long 0x00 13. " GP13 ,General purpose read/write bit 13" "0,1" bitfld.long 0x00 12. " GP12 ,General purpose read/write bit 12" "0,1" bitfld.long 0x00 11. " GP11 ,General purpose read/write bit 11" "0,1" textline " " bitfld.long 0x00 10. " GP10 ,General purpose read/write bit 10" "0,1" bitfld.long 0x00 9. " GP9 ,General purpose read/write bit 9" "0,1" bitfld.long 0x00 8. " GP8 ,General purpose read/write bit 8" "0,1" textline " " bitfld.long 0x00 7. " GP7 ,General purpose read/write bit 7" "0,1" bitfld.long 0x00 6. " GP6 ,General purpose read/write bit 6" "0,1" bitfld.long 0x00 5. " GP5 ,General purpose read/write bit 5" "0,1" textline " " bitfld.long 0x00 4. " GP4 ,General purpose read/write bit 4" "0,1" bitfld.long 0x00 3. " GP3 ,General purpose read/write bit 3" "0,1" bitfld.long 0x00 2. " GP2 ,General purpose read/write bit 2" "0,1" textline " " bitfld.long 0x00 1. " GP1 ,General purpose read/write bit 1" "0,1" bitfld.long 0x00 0. " GP0 ,General purpose read/write bit 0" "0,1" textline "" group.long 0x800++0x13 line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" bitfld.long 0x00 27.--31. " ZQ_EARLY_COMPARATOR_EN_TIMER ,ZQ early comparator enable timer" ",,,,,,,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" textline " " bitfld.long 0x00 23.--25. " TZQ_CS ,Device ZQ short time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." bitfld.long 0x00 20.--22. " TZQ_OPER ,Device ZQ long/oper time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." bitfld.long 0x00 17.--19. " TZQ_INIT ,Device ZQ long/init time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." textline " " bitfld.long 0x00 16. " ZQ_HW_FOR ,Force ZQ automatic calibration process with the i.MX ZQ calibration pad" "Not forced,Forced" rbitfld.long 0x00 11.--15. " ZQ_HW_PD_RES ,ZQ HW calibration pull-down result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" textline " " rbitfld.long 0x00 6.--10. " ZQ_HW_PU_RES ,ZQ automatic calibration pull-up result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x00 2.--5. " ZQ_HW_PER ,ZQ periodic calibration time" "1 ms,2 ms,4 ms,,,,,,,,1 ms,,,,16 ms,32 ms" textline " " bitfld.long 0x00 0.--1. " ZQ_MODE ,ZQ calibration mode" "Not issued,i.MX ZQ calibration pad/External DDR(when exiting),External DDR,i.MX ZQ calibration pad/External DDR(periodic/when exiting)" line.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" bitfld.long 0x04 16.--17. " ZQ_CMP_OUT_SMP ,Amount of cycles between driving the ZQ signals to the ZQ pad" "7 cycles,15 cycles,23 cycles,31 cycles" bitfld.long 0x04 13. " USE_ZQ_SW_VAL ,Use SW ZQ configured value for I/O pads resistor controls" "ZQ_HW_PD_VAL & ZQ_HW_PU_VAL,ZQ_SW_PD_VAL & ZQ_SW_PU_VAL" bitfld.long 0x04 12. " ZQ_SW_PD ,ZQ software PU/PD calibration" "PU,PD" textline " " bitfld.long 0x04 7.--11. " ZQ_SW_PD_VAL ,ZQ software pull-down resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x04 2.--6. " ZQ_SW_PU_VAL ,ZQ software pull-up resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" rbitfld.long 0x04 1. " ZQ_SW_RES ,ZQ software calibration result" "VDD/2" textline " " bitfld.long 0x04 0. " ZQ_SW_FOR ,Force ZQ SW calibration" "Not forced,Forced" line.long 0x08 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" rbitfld.long 0x08 11. " WL_HW_ERR3 ,Byte3 WL HW calibration error" "No error,Error" rbitfld.long 0x08 10. " WL_HW_ERR2 ,Byte2 WL HW calibration error" "No error,Error" rbitfld.long 0x08 9. " WL_HW_ERR1 ,Byte1 WL HW calibration error" "No error,Error" textline " " rbitfld.long 0x08 8. " WL_HW_ERR0 ,Byte0 WL HW calibration error" "No error,Error" rbitfld.long 0x08 7. " WL_SW_RES3 ,Byte3 WL software result" "Low,High" rbitfld.long 0x08 6. " WL_SW_RES2 ,Byte2 WL software result" "Low,High" textline " " rbitfld.long 0x08 5. " WL_SW_RES1 ,Byte1 WL software result" "Low,High" rbitfld.long 0x08 4. " WL_SW_RES0 ,Byte0 WL software result" "Low,High" bitfld.long 0x08 2. " SW_WL_CNT_EN ,SW WL count down enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SW_WL_EN ,Enable WL SW update" "Disabled,Enabled" bitfld.long 0x08 0. " HW_WL_EN ,Enable WL HW enable" "Disabled,Enabled" line.long 0x0C "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" bitfld.long 0x0C 25.--26. " WL_CYC_DEL1 ,Write level cycle delay for Byte 1" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 24. " WL_HC_DEL1 ,Write level half cycle delay for Byte 1" "No delay,Half cycle" hexmask.long.byte 0x0C 16.--22. 1. " WR_DL_ABS_OFFSET1 ,Absolute delay offset for Byte 1" textline " " bitfld.long 0x0C 9.--10. " WL_CYC_DEL0 ,Write level cycle delay for Byte 0" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 8. " WL_HC_DEL0 ,Write level half cycle delay for Byte 0" "No delay,Half cycle" hexmask.long.byte 0x0C 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute delay offset for Byte 0" line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" bitfld.long 0x10 25.--26. " WL_CYC_DEL3 ,Write level cycle delay for Byte 3" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 24. " WL_HC_DEL3 ,Write level half cycle delay for Byte 3" "No delay,Half cycle" hexmask.long.byte 0x10 16.--22. 1. " WR_DL_ABS_OFFSET3 ,Absolute delay offset for Byte 3" textline " " bitfld.long 0x10 9.--10. " WL_CYC_DEL2 ,Write level cycle delay for Byte 2" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 8. " WL_HC_DEL2 ,Write level half cycle delay for Byte 2" "No delay,Half cycle" hexmask.long.byte 0x10 0.--6. 1. " WR_DL_ABS_OFFSET2 ,Absolute delay offset for Byte 2" rgroup.long 0x814++0x03 line.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WL_DL_UNIT_NUM3 ,Number of delay units that is actually used by write leveling delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WL_DL_UNIT_NUM2 ,Number of delay units that is actually used by write leveling delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WL_DL_UNIT_NUM1 ,Number of delay units that is actually used by write leveling delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL_DL_UNIT_NUM0 ,Number of delay units that is actually used by write leveling delay line 0" group.long 0x818++0x2B line.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" bitfld.long 0x00 16.--18. " ODT3_INT_RES ,On chip ODT byte3 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 12.--14. " ODT2_INT_RES ,On chip ODT byte2 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 8.--10. " ODT1_INT_RES ,On chip ODT byte1 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x00 4.--6. " ODT0_INT_RES ,On chip ODT byte0 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 3. " ODT_RD_ACT_EN ,Active read CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 2. " ODT_RD_PAS_EN ,Inactive read CS ODT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ODT_WR_ACT_EN ,Active write CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ODT_WR_PAS_EN ,Inactive write CS ODT enable" "Disabled,Enabled" line.long 0x04 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" bitfld.long 0x04 28.--30. " RD_DQ7_DEL ,Read dqs0 to dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 24.--26. " RD_DQ6_DEL ,Read dqs0 to dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 20.--22. " RD_DQ5_DEL ,Read dqs0 to dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 16.--18. " RD_DQ4_DEL ,Read dqs0 to dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 12.--14. " RD_DQ3_DEL ,Read dqs0 to dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 8.--10. " RD_DQ2_DEL ,Read dqs0 to dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 4.--6. " RD_DQ1_DEL ,Read dqs0 to dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 0.--2. " RD_DQ0_DEL ,Read dqs0 to dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x08 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" bitfld.long 0x08 28.--30. " RD_DQ15_DEL ,Read dqs1 to dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 24.--26. " RD_DQ14_DEL ,Read dqs1 to dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 20.--22. " RD_DQ13_DEL ,Read dqs1 to dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 16.--18. " RD_DQ12_DEL ,Read dqs1 to dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 12.--14. " RD_DQ11_DEL ,Read dqs1 to dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 8.--10. " RD_DQ10_DEL ,Read dqs1 to dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 4.--6. " RD_DQ9_DEL ,Read dqs1 to dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 0.--2. " RD_DQ8_DEL ,Read dqs1 to dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x0C "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" bitfld.long 0x0C 28.--30. " RD_DQ23_DEL ,Read dqs2 to dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 24.--26. " RD_DQ22_DEL ,Read dqs2 to dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 20.--22. " RD_DQ21_DEL ,Read dqs2 to dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 16.--18. " RD_DQ20_DEL ,Read dqs2 to dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 12.--14. " RD_DQ19_DEL ,Read dqs2 to dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 8.--10. " RD_DQ18_DEL ,Read dqs2 to dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 4.--6. " RD_DQ17_DEL ,Read dqs2 to dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 0.--2. " RD_DQ16_DEL ,Read dqs2 to dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x10 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" bitfld.long 0x10 28.--30. " RD_DQ31_DEL ,Read dqs3 to dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 24.--26. " RD_DQ30_DEL ,Read dqs3 to dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 20.--22. " RD_DQ29_DEL ,Read dqs3 to dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x10 16.--18. " RD_DQ28_DEL ,Read dqs3 to dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 12.--14. " RD_DQ27_DEL ,Read dqs3 to dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 8.--10. " RD_DQ26_DEL ,Read dqs3 to dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x10 4.--6. " RD_DQ25_DEL ,Read dqs3 to dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 0.--2. " RD_DQ24_DEL ,Read dqs3 to dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x14 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" bitfld.long 0x14 30.--31. " WR_DM0_DEL ,Write dm0 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 28.--29. " WR_DQ7_DEL ,Write dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 24.--25. " WR_DQ6_DEL ,Write dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 20.--21. " WR_DQ5_DEL ,Write dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 16.--17. " WR_DQ4_DEL ,Write dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 12.--13. " WR_DQ3_DEL ,Write dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 8.--9. " WR_DQ2_DEL ,Write dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 4.--5. " WR_DQ1_DEL ,Write dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 0.--1. " WR_DQ0_DEL ,Write dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x18 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" bitfld.long 0x18 30.--31. " WR_DM1_DEL ,Write dm1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 28.--29. " WR_DQ15_DEL ,Write dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 24.--25. " WR_DQ14_DEL ,Write dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 20.--21. " WR_DQ13_DEL ,Write dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 16.--17. " WR_DQ12_DEL ,Write dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 12.--13. " WR_D11_DEL ,Write dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 8.--9. " WR_DQ10_DEL ,Write dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 4.--5. " WR_DQ9_DEL ,Write dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 0.--1. " WR_DQ8_DEL ,Write dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x1C "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" bitfld.long 0x1C 30.--31. " WR_DM2_DEL ,Write dm2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 28.--29. " WR_DQ23_DEL ,Write dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 24.--25. " WR_DQ22_DEL ,Write dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 20.--21. " WR_DQ21_DEL ,Write dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 16.--17. " WR_DQ20_DEL ,Write dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 12.--13. " WR_D19_DEL ,Write dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 8.--9. " WR_DQ18_DEL ,Write dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 4.--5. " WR_DQ17_DEL ,Write dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 0.--1. " WR_DQ16_DEL ,Write dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x20 "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" bitfld.long 0x20 30.--31. " WR_DM3_DEL ,Write dm3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 28.--29. " WR_DQ31_DEL ,Write dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 24.--25. " WR_DQ30_DEL ,Write dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x20 20.--21. " WR_DQ29_DEL ,Write dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 16.--17. " WR_DQ28_DEL ,Write dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 12.--13. " WR_D27_DEL ,Write dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x20 8.--9. " WR_DQ26_DEL ,Write dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 4.--5. " WR_DQ25_DEL ,Write dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 0.--1. " WR_DQ24_DEL ,Write dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x24 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" bitfld.long 0x24 31. " RST_RD_FIFO ,Reset Read Data FIFO & pointers" "No reset,Reset" bitfld.long 0x24 30. " DG_CMP_CYC ,Read DQS gating sample cycle" "16 cycles,32 cycles" bitfld.long 0x24 29. " DG_DIS ,Read DQS gating disable" "No,Yes" textline " " bitfld.long 0x24 28. " HW_DG_EN ,Enable automatic read DQS gating calibration" "Disabled,Enabled" bitfld.long 0x24 24.--27. " DG_HC_DEL1 ,Read Dqs1 gating half cycles delay for Byte 1" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." bitfld.long 0x24 23. " DG_EXT_UP ,DG extend upper boundary" "Not extended,Extended" textline " " hexmask.long.byte 0x24 16.--22. 1. " DG_DL_ABS_OFFSET1 ,Absolute delay offset" rbitfld.long 0x24 12. " HW_DG_ERR ,HW DQS gating error " "No error,Error" bitfld.long 0x24 8.--11. " DG_HC_DEL0 ,Read DQS0 gating half cycles delay for Byte 0" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x24 0.--6. 1. " DG_DL_ABS_OFFSET0 ,Absolute read DQS gating delay offset" line.long 0x28 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" bitfld.long 0x28 24.--27. " DG_HC_DEL3 ,Read DQS3 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." hexmask.long.byte 0x28 16.--22. 1. " DG_DL_ABS_OFFSET3 ,Absolute read DQS gating delay offset for Byte 3" bitfld.long 0x28 8.--11. " DG_HC_DEL2 ,Read DQS2 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x28 0.--6. 1. " DG_DL_ABS_OFFSET2 ,Absolute read DQS gating delay offset" rgroup.long 0x844++0x03 line.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " DG_DL_UNIT_NUM3 ,Number of delay units that is actually used by DQS gating delay line 3" hexmask.long.byte 0x00 16.--22. 1. " DG_DL_UNIT_NUM2 ,Number of delay units that is actually used by DQS gating delay line 2" hexmask.long.byte 0x00 8.--14. 1. " DG_DL_UNIT_NUM1 ,Number of delay units that is actually used by DQS gating delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_UNIT_NUM0 ,Number of delay units that is actually used by DQS gating delay line 0" group.long 0x848++0x03 line.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_ABS_OFFSET3 ,Absolute read delay offset byte 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_ABS_OFFSET2 ,Absolute read delay offset byte 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_ABS_OFFSET1 ,Absolute read delay offset byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_ABS_OFFSET0 ,Absolute read delay offset byte 0" rgroup.long 0x84C++0x03 line.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_UNIT_NUM3 ,Number of delay units that is actually used by read delay line 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_UNIT_NUM2 ,Number of delay units that is actually used by read delay line 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_UNIT_NUM1 ,Number of delay units that is actually used by read delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_UNIT_NUM0 ,Number of delay units that is actually used by read delay line 0" group.long 0x850++0x03 line.long 0x00 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_ABS_OFFSET3 ,Absolute write delay offset for Byte 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_ABS_OFFSET2 ,Absolute write delay offset for Byte 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_ABS_OFFSET1 ,Absolute write delay offset for Byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write delay offset for Byte 0" rgroup.long 0x854++0x03 line.long 0x00 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_UNIT_NUM3 ,Number of delay units that is actually used by write delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_UNIT_NUM2 ,Number of delay units that is actually used by write delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_UNIT_NUM1 ,Number of delay units that is actually used by write delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_UNIT_NUM0 ,Number of delay units that is actually used by write delay line 0" group.long 0x858++0x03 line.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 10.--11. " SDCLK1_del ,DDR clock1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" else bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" endif hgroup.long 0x85C++0x03 hide.long 0x00 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" group.long 0x860++0x07 line.long 0x00 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" bitfld.long 0x00 5. " HW_RDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x00 4. " HW_RDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x00 3. " HW_RDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x00 2. " HW_RDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x00 1. " HW_RDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x00 0. " HW_RDL_ERR0 ,HW RD DL0 error" "No error,Error" line.long 0x04 "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" bitfld.long 0x04 5. " HW_WDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x04 4. " HW_WDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x04 3. " HW_WDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x04 2. " HW_WDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x04 1. " HW_WDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x04 0. " HW_WDL_ERR0 ,HW RD DL0 error" "No error,Error" rgroup.long 0x868++0x23 line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " HW_RD_DL_UP1 ,HW RD DL1 upper boundary" hexmask.long.byte 0x00 16.--22. 1. " HW_RD_DL_LOW1 ,HW RD DL1 lower boundary" hexmask.long.byte 0x00 8.--14. 1. " HW_RD_DL_UP0 ,HW RD DL0 upper boundary" textline " " hexmask.long.byte 0x00 0.--6. 1. " HW_RD_DL_LOW0 ,HW RD DL0 lower boundary" line.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hexmask.long.byte 0x04 24.--30. 1. " HW_RD_DL_UP3 ,HW RD DL3 upper boundary" hexmask.long.byte 0x04 16.--22. 1. " HW_RD_DL_LOW3 ,HW RD DL3 lower boundary" hexmask.long.byte 0x04 8.--14. 1. " HW_RD_DL_UP2 ,HW RD DL2 upper boundary" textline " " hexmask.long.byte 0x04 0.--6. 1. " HW_RD_DL_LOW2 ,HW RD DL2 lower boundary" line.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hexmask.long.byte 0x08 24.--30. 1. " HW_WR_DL_UP1 ,HW WR DL1 upper boundary" hexmask.long.byte 0x08 16.--22. 1. " HW_WR_DL_LOW1 ,HW WR DL1 lower boundary" hexmask.long.byte 0x08 8.--14. 1. " HW_WR_DL_UP0 ,HW WR DL0 upper boundary" textline " " hexmask.long.byte 0x08 0.--6. 1. " HW_WR_DL_LOW0 ,HW WR DL0 lower boundary" line.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hexmask.long.byte 0x0C 24.--30. 1. " HW_WR_DL_UP3 ,HW WR DL3 upper boundary" hexmask.long.byte 0x0C 16.--22. 1. " HW_WR_DL_LOW3 ,HW WR DL3 lower boundary" hexmask.long.byte 0x0C 8.--14. 1. " HW_WR_DL_UP2 ,HW WR DL2 upper boundary" textline " " hexmask.long.byte 0x0C 0.--6. 1. " HW_WR_DL_LOW2 ,HW WR DL2 lower boundary" line.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hexmask.long.byte 0x10 24.--31. 1. " HW_WL3_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 16.--23. 1. " HW_WL2_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 8.--15. 1. " HW_WL1_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" textline " " hexmask.long.byte 0x10 0.--7. 1. " HW_WL0_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" line.long 0x14 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hexmask.long.word 0x14 16.--26. 1. " HW_DG_UP0 ,HW DG0 upper boundary" hexmask.long.word 0x14 0.--10. 1. " HW_DG_LOW0 ,HW DG0 lower boundary" line.long 0x18 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hexmask.long.word 0x18 16.--26. 1. " HW_DG_UP1 ,HW DG1 upper boundary" hexmask.long.word 0x18 0.--10. 1. " HW_DG_LOW1 ,HW DG1 lower boundary" line.long 0x1C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hexmask.long.word 0x1C 16.--26. 1. " HW_DG_UP2 ,HW DG2 upper boundary" hexmask.long.word 0x1C 0.--10. 1. " HW_DG_LOW2 ,HW DG2 lower boundary" line.long 0x20 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hexmask.long.word 0x20 16.--26. 1. " HW_DG_UP3 ,HW DG3 upper boundary" hexmask.long.word 0x20 0.--10. 1. " HW_DG_LOW3 ,HW DG3 lower boundary" group.long 0x88C++0x0B line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hexmask.long.word 0x00 16.--31. 1. " PDV2 ,Pre defined compare value2" hexmask.long.word 0x00 0.--15. 1. " PDV1 ,Pre defined compare value2" line.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" bitfld.long 0x04 2. " READ_LEVEL_PATTERN ,MPR calibration Read level pattern" "1010,?..." textline " " bitfld.long 0x04 1. " MPR_FULL_CMP ,MPR full compare enable" "Disabled,Enabled" bitfld.long 0x04 0. " MPR_CMP ,MPR compare enable" "Disabled,Enabled" line.long 0x08 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" rbitfld.long 0x08 5. " SW_DUM_CMP3 ,SW dummy read byte3 compare results" "Failed,Passed" rbitfld.long 0x08 4. " SW_DUM_CMP2 ,SW dummy read byte2 compare results" "Failed,Passed" rbitfld.long 0x08 3. " SW_DUM_CMP1 ,SW dummy read byte1 compare results" "Failed,Passed" textline " " rbitfld.long 0x08 2. " SW_DUM_CMP0 ,SW dummy read byte0 compare results" "Failed,Passed" bitfld.long 0x08 1. " SW_DUMMY_RD ,SW dummy read" "Not generated,Generated" bitfld.long 0x08 0. " SW_DUMMY_WR ,SW dummy write" "Not generated,Generated" rgroup.long 0x898++0x1F line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0" line.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" line.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" line.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" group.long 0x8B8++0x03 line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hexmask.long.word 0x00 16.--25. 1. " MU_UNIT_DEL_NUM ,Measure unit measured number of unit delay per cycle" bitfld.long 0x00 11. " FRC_MSR ,Force measuement on delay line" "Not forced,Forced" bitfld.long 0x00 10. " MU_BYP_EN ,Measure unit bypass enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " MU_BYP_VAL ,Measure unit bypass value" hgroup.long 0x8BC++0x03 hide.long 0x00 "MPWRCADL,MMDC PHY Write CA Delay Control Register" sif (cpu()=="IMX6SOLOLITE") group.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." else rgroup.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." endif else hgroup.long 0x00++0x07 hide.long 0x00 "MDCTL,MMDC Core Control Register" hide.long 0x04 "MDPDC,MMDC Core Power Down Control Register" hgroup.long 0x08++0x03 hide.long 0x00 "MDOTC,MMDC Core ODT Timing Control Register" hgroup.long 0x0C++0x0B hide.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hide.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" hide.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " group.long 0x18++0x03 line.long 0x00 "MDMISC,MMDC Core Miscellaneous Register" bitfld.long 0x00 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." hgroup.long 0x1C++0x07 hide.long 0x00 "MDSCR,MMDC Core Special Command Register" hide.long 0x04 "MDREF,MMDC Core Refresh Control Register" hgroup.long 0x2C++0x17 hide.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hide.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" hide.long 0x08 "MDMRR,MMDC Core MRR Data Register" hide.long 0x0C "MDCFG3LP,MMDC Core Timing Configuration Register 3" hide.long 0x10 "MDMR4,MMDC Core MR4 Derating Register" hide.long 0x14 "MDASP,MMDC Core Address Space Partition Register" hgroup.long 0x400++0x0F hide.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" hide.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" hide.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hide.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 0" hgroup.long 0x410++0x2B hide.long 0x00 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" hide.long 0x04 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" hide.long 0x08 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" hide.long 0x0C "MADPSR1,MMDC Core Debug and Profiling Status Register 1" hide.long 0x10 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" hide.long 0x14 "MADPSR3,MMDC Core Debug and Profiling Status Register 3" hide.long 0x18 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" hide.long 0x1C "MADPSR5,MMDC Core Debug and Profiling Status Register 5" hide.long 0x20 "MASBS0,MMDC Core Step By Step Address" hide.long 0x24 "MASBS1,MMDC Core Step By Step Address Attributes" hide.long 0x28 "MAGENP,MMDC Core General Purpose Register" hgroup.long 0x800++0x07 hide.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" hide.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" hgroup.long 0x808++0xBB hide.long 0x00 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" hide.long 0x04 "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" hide.long 0x08 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" hide.long 0x0C "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hide.long 0x10 "MPODTCTRL0,MMDC PHY ODT Control Register 0" hide.long 0x14 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" hide.long 0x18 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" hide.long 0x1C "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" hide.long 0x20 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" hide.long 0x24 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" hide.long 0x28 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" hide.long 0x2C "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" hide.long 0x30 "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" hide.long 0x34 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" hide.long 0x38 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" hide.long 0x3C "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hide.long 0x40 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hide.long 0x44 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hide.long 0x48 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hide.long 0x4C "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hide.long 0x50 "MPSDCTRL,MMDC PHY CK control Register" hide.long 0x54 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" hide.long 0x58 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" hide.long 0x5C "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" hide.long 0x60 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hide.long 0x64 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hide.long 0x68 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hide.long 0x6C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hide.long 0x70 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hide.long 0x74 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hide.long 0x78 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hide.long 0x7C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hide.long 0x80 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hide.long 0x84 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hide.long 0x88 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" hide.long 0x8C "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" hide.long 0x90 "MPSWDRDR0,MMDC PHY SW Dummy Read Data LSB Register 0" hide.long 0x94 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" hide.long 0x98 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" hide.long 0x9C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" hide.long 0xA0 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" hide.long 0xA4 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" hide.long 0xA8 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" hide.long 0xAC "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" hide.long 0xB0 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hide.long 0xB4 "MPWRCADL,MMDC PHY Write CA Delay Control Register" hide.long 0xB8 "MPDCCR,MMDC PHY Duty Cycle Control Register for CK0 and DQS0-3" endif width 0x0B tree.end else tree.open "MMDC (Multi Mode DDR Controller)" tree "Port 0" base ad:0x021B0000 width 14. if (((per.l(ad:0x021B0000+0x18))&0x18)==0x08) group.long 0x00++0x07 line.long 0x00 "MDCTL,MMDC Core Control Register" bitfld.long 0x00 31. " SDE_0 ,MMDC Enable CS0" "Disabled,Enabled" bitfld.long 0x00 30. " SDE_1 ,MMDC Enable CS1" "Disabled,Enabled" bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11-bits,12-bits,13-bits,14-bits,15-bits,16-bits,?..." textline " " bitfld.long 0x00 20.--22. " COL ,Column Address Width" "9-bits,10-bits,11-bits,8-bits,12-bits,?..." bitfld.long 0x00 19. " BL ,Burst Length" "4," sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,?..." else bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,64-bit,?..." endif line.long 0x04 "MDPDC,MMDC Core Power Down Control Register" bitfld.long 0x04 28.--30. " PRCT_1 ,Precharge Timer - Chip Select 1" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 24.--26. " PRCT_0 ,Precharge Timer - Chip Select 0" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 16.--18. " TCKE ,CKE minimum pulse width" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x04 12.--15. " P_WDT_1 ,Power Down Timer - Chip Select 1" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 8.--11. " PWDT_0 ,Power Down Timer - Chip Select 0" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 6. " BOTH_CS_PD ,Both chip selects power-down" "Independently,Both" textline " " bitfld.long 0x04 3.--5. " TCKSRX ,Valid clock requirement before self-refresh exit" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x04 0.--2. " TCKSRE ,Valid clock requirement after self-refresh entry" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" hgroup.long 0x08++0x03 hide.long 0x00 "MDOTC,MMDC Core ODT Timing Control Register" textline " " group.long 0x0C++0x17 line.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hexmask.long.byte 0x00 24.--31. 1. " TRFC ,Refresh command to Active or Refresh command time" hexmask.long.byte 0x00 16.--23. 1. " TXSR ,Self-refresh exit to next valid command delay" bitfld.long 0x00 13.--15. " TXP ,Exit power-down to next valid command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 4.--8. " TFAW ,Four Active Window" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" bitfld.long 0x00 0.--3. " TRL ,CAS Read Latency" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." line.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" bitfld.long 0x04 16.--20. " TRAS ,Active to Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,?..." bitfld.long 0x04 9.--11. " TWR ,WRITE recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x04 5.--8. " TMRD ,Mode Register Set command cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" textline " " bitfld.long 0x04 0.--2. " TWL ,CAS Write Latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" bitfld.long 0x08 6.--8. " TRTP ,Internal READ command to PRECHARGE command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 3.--5. " TWTR ,Internal WRITE to READ command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 0.--2. " TRRD ,ACTIVE to ACTIVE command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x0C "MDMISC,MMDC Core Miscellaneous Register" rbitfld.long 0x0C 31. " CS0_RDY ,External status device on CS0" "Wake-up,Ready" rbitfld.long 0x0C 30. " CS1_RDY ,External status device on CS1" "Wake-up,Ready" textline "" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 21. " CK1_GATING ,Gating the secondary DDR clock" "two clocks,only one clock" textline "" endif bitfld.long 0x0C 20. " CALIB_PER_CS ,Defines the CS number that the associated calibration is targetted at" "CS0,CS1" textline " " bitfld.long 0x0C 18. " LHD ,Latency hiding disable" "No,Yes" bitfld.long 0x0C 16.--17. " WALAT ,Write Additional latency" "Not required,1 cycle,2 cycles,3 cycles" bitfld.long 0x0C 12. " BI_ON ,Bank Interleaving On" "Not interleaved,Interleaved" textline " " bitfld.long 0x0C 11. " LPDDR2_S2 ,LPDDR2 S2 device type indication" "LPDDR2-S4,LPDDR2-S2" bitfld.long 0x0C 9.--10. " MIF3_MODE ,Command prediction working mode" "Disabled,First pipe line stage,First pipe line stage/axi bus,First pipe line stage/axi bus/access queue" textline " " bitfld.long 0x0C 6.--8. " RALAT ,Read Additional Latency" "ASAP,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x0C 5. " DDR_4_BANK ,DDR device with 4 Banks" "8 banks,4 banks" endif textline " " bitfld.long 0x0C 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x0C 2. " LPDDR2_2CH ,LPDDR2 2-channels mode" "Disabled,Enabled" textline " " endif bitfld.long 0x0C 1. " RST ,Software Reset" "No reset,Reset" line.long 0x10 "MDSCR,MMDC Core Special Command Register" hexmask.long.byte 0x10 24.--31. 1. " MR_OP ,MRW 8 bit operand" hexmask.long.byte 0x10 16.--23. 1. " MR_ADDR , MRR/MRW ADDRESS" bitfld.long 0x10 15. " CON_REQ ,Configuration request" "Not requested,Requested" textline " " rbitfld.long 0x10 14. " CON_ACK ,Configuration acknowledge" "Forbidden,Permitted" rbitfld.long 0x10 10. " MRR_READ_DATA_VALID ,MRR READ DATA VALID" "Cleared,Set" bitfld.long 0x10 9. " WL_EN ,Write Level Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4.--6. " CMD ,Command" "Normal operation,Precharge all,Auto-Refresh,MRW Command,,Precharge all,MRR,?..." bitfld.long 0x10 3. " CMD_CS ,Chip Select" "0,1" bitfld.long 0x10 0.--2. " CMD_BA ,Bank Address" "0,1,2,3,4,5,6,7" line.long 0x14 "MDREF,MMDC Core Refresh Control Register" hexmask.long.word 0x14 16.--31. 1. " REF_CNT ,Refresh Counter" bitfld.long 0x14 14.--15. " REF_SEL ,Refresh Selector" "64KHz,32KHz,REF_CNT,Not triggered" bitfld.long 0x14 11.--13. " REFR ,Number of refresh commands every refresh cycle" "1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes" textline " " bitfld.long 0x14 0. " START_REF ,Start Refresh cycle" "No operation,Started" group.long 0x2C++0x7 line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hexmask.long.word 0x00 16.--28. 1. " TDAI ,Device auto initialization period" bitfld.long 0x00 12.--14. " RTW_SAME ,Controls the cycles delay between Read to Write commands in same chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 9.--11. " WTR_DIFF ,Controls the cycles delay between Write to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 6.--8. " WTW_DIFF ,Controls the cycles delay between Write to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " RTW_DIFF ,Controls the cycles delay between Read to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RTR_DIFF ,Controls the cycles delay between Read to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" bitfld.long 0x04 0.--5. " RST_TO_CKE , Idle time ater first CKE assertion" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" rgroup.long 0x34++0x03 line.long 0x00 "MDMRR,MMDC Core MRR Data Register" hexmask.long.byte 0x00 24.--31. 1. " MRR_READ_DATA3 ,MRR DATA that arrived on DQ[31:24]" hexmask.long.byte 0x00 16.--23. 1. " MRR_READ_DATA2 ,MRR DATA that arrived on DQ[23:16]" hexmask.long.byte 0x00 8.--15. 1. " MRR_READ_DATA1 ,MRR DATA that arrived on DQ[15:8]" textline " " hexmask.long.byte 0x00 0.--7. 1. " MRR_READ_DATA0 ,MRR DATA that arrived on DQ[7:0]" group.long 0x38++0x0B line.long 0x00 "MDCFG3LP,MMDC Core Timing Configuration Register 3" bitfld.long 0x00 16.--21. " RC_LP ,ACT to ACT or REF command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks,?..." bitfld.long 0x00 8.--11. " TRCD_LP ,ACT command to internal read or write delay time" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." bitfld.long 0x00 4.--7. " TRPPB_LP ,PRECHARGE (per bank) command period (same bank)" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." textline " " bitfld.long 0x00 0.--3. " TRPAB_LP ,PRECHARGE (all banks) command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." line.long 0x04 "MDMR4,MMDC Core MR4 Derating Register" bitfld.long 0x04 8. " TRRD_DE ,TRRD derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 7. " TRP_DE ,TRP derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 6. " TRAS_DE ,TRAS derating value" "Original,Derated in 1 cycle" textline " " bitfld.long 0x04 5. " TRC_DE ,TRC derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 4. " TRCD_DE ,TRCD derating value" "Original,Derated in 1 cycle" rbitfld.long 0x04 1. " UPDATE_DE_ACK ,Update Derated Values Acknowledge" "Not updated,Updated" textline " " bitfld.long 0x04 0. " UPDATE_DE_REQ ,Update Derated Values Request" "No operation,Requested" line.long 0x08 "MDASP,MMDC Core Address Space Partition Register" hexmask.long.byte 0x08 0.--6. 1. " CS0_END ,Define the absolute last address associated with CS0" group.long 0x400++0x17 line.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" bitfld.long 0x00 31. " ARCR_SEC_ERR_LOCK ,ARCR_SEC_ERR_EN lock" "Not locked,Locked" bitfld.long 0x00 30. " ARCR_SEC_ERR_EN ,Security read/write access violation in OKAY/SLV Error response " "OKAY,SLAVE error" bitfld.long 0x00 28. " ARCR_EXC_ERR_EN ,Exclusive read/write access violation of AXI 6.2.4 rule in OKAY/SLV Error response " "OKAY,SLAVE error" textline " " bitfld.long 0x00 24. " ARCR_RCH_EN ,Real time channel enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " ARCR_PAG_HIT ,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " ARCR_ACC_HIT ,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " ARCR_DYN_JMP ,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ARCR_DYN_MAX ,ARCR Dynamic Maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARCR_GUARD ,ARCR Guard" "15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30" line.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" rbitfld.long 0x04 25. " DVACK ,General DVFS acknowledge" "Not asserted,Asserted" rbitfld.long 0x04 24. " LPACK ,General low-power acknowledge" "Not asserted,Asserted" bitfld.long 0x04 21. " DVFS ,General DVFS request" "Not requested,Requested" textline " " bitfld.long 0x04 20. " LPMD ,General LPMD request" "Not requested,Requested" hexmask.long.byte 0x04 8.--15. 1. " PST ,Automatic Power saving timer" rbitfld.long 0x04 6. " WIS ,Write Idle Status" "Idle,Busy" textline " " rbitfld.long 0x04 5. " RIS ,Read Idle Status" "Idle,Busy" rbitfld.long 0x04 4. " PSS ,Power Saving Status" "Disabled,Enabled" bitfld.long 0x04 0. " PSD ,Automatic Power Saving Disable" "No,Yes" line.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hexmask.long.word 0x08 16.--31. 1. " EXC_ID_MONITOR1 ,Defines ID for Exclusive monitor#1" hexmask.long.word 0x08 0.--15. 1. " EXC_ID_MONITOR0 ,Defines ID for Exclusive monitor#0" line.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 1" hexmask.long.word 0x0C 16.--31. 1. " EXC_ID_MONITOR3 ,Defines ID for Exclusive monitor#3" hexmask.long.word 0x0C 0.--15. 1. " EXC_ID_MONITOR2 ,Defines ID for Exclusive monitor#2" line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" bitfld.long 0x10 9. " SBS ,Step By Step trigger" "Not launched,Launched" bitfld.long 0x10 8. " SBS_EN ,Step By Step debug Enable" "Disabled,Enabled" eventfld.long 0x10 3. " CYC_OVF ,Total Cycles Count Overflow" "No overflow,Overflow" textline " " bitfld.long 0x10 2. " PRF_FRZ ,Profiling freeze" "Not frozen,Frozen" bitfld.long 0x10 1. " DBG_RST ,Debug and Profiling Reset" "No reset,Reset" bitfld.long 0x10 0. " DBG_EN ,Debug and Profiling Enable" "Disabled,Enabled" line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" bitfld.long 0x14 31. " PRF_AXI_ID_MASK_31 ,Profiling AXI ID Mask 31" "Masked,Not masked" bitfld.long 0x14 30. " PRF_AXI_ID_MASK_30 ,Profiling AXI ID Mask 30" "Masked,Not masked" bitfld.long 0x14 29. " PRF_AXI_ID_MASK_29 ,Profiling AXI ID Mask 29" "Masked,Not masked" textline " " bitfld.long 0x14 28. " PRF_AXI_ID_MASK_28 ,Profiling AXI ID Mask 28" "Masked,Not masked" bitfld.long 0x14 27. " PRF_AXI_ID_MASK_27 ,Profiling AXI ID Mask 27" "Masked,Not masked" bitfld.long 0x14 26. " PRF_AXI_ID_MASK_26 ,Profiling AXI ID Mask 26" "Masked,Not masked" textline " " bitfld.long 0x14 25. " PRF_AXI_ID_MASK_25 ,Profiling AXI ID Mask 25" "Masked,Not masked" bitfld.long 0x14 24. " PRF_AXI_ID_MASK_24 ,Profiling AXI ID Mask 24" "Masked,Not masked" bitfld.long 0x14 23. " PRF_AXI_ID_MASK_23 ,Profiling AXI ID Mask 23" "Masked,Not masked" textline " " bitfld.long 0x14 22. " PRF_AXI_ID_MASK_22 ,Profiling AXI ID Mask 22" "Masked,Not masked" bitfld.long 0x14 21. " PRF_AXI_ID_MASK_21 ,Profiling AXI ID Mask 21" "Masked,Not masked" bitfld.long 0x14 20. " PRF_AXI_ID_MASK_20 ,Profiling AXI ID Mask 20" "Masked,Not masked" textline " " bitfld.long 0x14 19. " PRF_AXI_ID_MASK_19 ,Profiling AXI ID Mask 19" "Masked,Not masked" bitfld.long 0x14 18. " PRF_AXI_ID_MASK_18 ,Profiling AXI ID Mask 18" "Masked,Not masked" bitfld.long 0x14 17. " PRF_AXI_ID_MASK_17 ,Profiling AXI ID Mask 17" "Masked,Not masked" textline " " bitfld.long 0x14 16. " PRF_AXI_ID_MASK_16 ,Profiling AXI ID Mask 16" "Masked,Not masked" bitfld.long 0x14 15. " PRF_AXI_ID[15] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 14. " PRF_AXI_ID[14] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 13. " PRF_AXI_ID[13] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 12. " PRF_AXI_ID[12] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 11. " PRF_AXI_ID[11] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 10. " PRF_AXI_ID[10] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 9. " PRF_AXI_ID[9] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 8. " PRF_AXI_ID[8] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 7. " PRF_AXI_ID[7] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 6. " PRF_AXI_ID[6] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 5. " PRF_AXI_ID[5] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 4. " PRF_AXI_ID[4] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 3. " PRF_AXI_ID[3] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 2. " PRF_AXI_ID[2] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 1. " PRF_AXI_ID[1] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 0. " PRF_AXI_ID[0] ,Profiling AXI ID" "Low,High" rgroup.long 0x418++0x1F line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" line.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" line.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" line.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" line.long 0x18 "MASBS0,MMDC Core Step By Step Address" line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" hexmask.long.word 0x1C 16.--31. 1. " SBS_AXI_ID ,Step By Step AXI ID" bitfld.long 0x1C 13.--15. " SBS_LEN ,Step By Step Length" "1,2,3,4,5,6,7,8" bitfld.long 0x1C 12. " SBS_BUFF ,Step By Step Buffered" "0,1" textline " " bitfld.long 0x1C 10.--11. " SBS_BURST ,Step By Step Burst" "Fixed,INCR,WRAP,?..." bitfld.long 0x1C 7.--9. " SBS_SIZE ,Step By Step Size" "8 bits,16 bits,32 bits,64 bits,128 bits,?..." bitfld.long 0x1C 4.--6. " SBS_PROT ,Step By Step Protection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 2.--3. " SBS_LOCK ,Step By Step Lock" "0,1,2,3" bitfld.long 0x1C 1. " SBS_TYPE ,Step By Step Request Type" "Write,Read" bitfld.long 0x1C 0. " SBS_VLD ,Step By Step Valid" "Not valid,Valid" group.long 0x440++0x03 line.long 0x00 "MAGENP,MMDC Core General Purpose Register" bitfld.long 0x00 31. " GP31 ,General purpose read/write bit 31" "0,1" bitfld.long 0x00 30. " GP30 ,General purpose read/write bit 30" "0,1" bitfld.long 0x00 29. " GP29 ,General purpose read/write bit 29" "0,1" textline " " bitfld.long 0x00 28. " GP28 ,General purpose read/write bit 28" "0,1" bitfld.long 0x00 27. " GP27 ,General purpose read/write bit 27" "0,1" bitfld.long 0x00 26. " GP26 ,General purpose read/write bit 26" "0,1" textline " " bitfld.long 0x00 25. " GP25 ,General purpose read/write bit 25" "0,1" bitfld.long 0x00 24. " GP24 ,General purpose read/write bit 24" "0,1" bitfld.long 0x00 23. " GP23 ,General purpose read/write bit 23" "0,1" textline " " bitfld.long 0x00 22. " GP22 ,General purpose read/write bit 22" "0,1" bitfld.long 0x00 21. " GP21 ,General purpose read/write bit 21" "0,1" bitfld.long 0x00 20. " GP20 ,General purpose read/write bit 20" "0,1" textline " " bitfld.long 0x00 19. " GP19 ,General purpose read/write bit 19" "0,1" bitfld.long 0x00 18. " GP18 ,General purpose read/write bit 18" "0,1" bitfld.long 0x00 17. " GP17 ,General purpose read/write bit 17" "0,1" textline " " bitfld.long 0x00 16. " GP16 ,General purpose read/write bit 16" "0,1" bitfld.long 0x00 15. " GP15 ,General purpose read/write bit 15" "0,1" bitfld.long 0x00 14. " GP14 ,General purpose read/write bit 14" "0,1" textline " " bitfld.long 0x00 13. " GP13 ,General purpose read/write bit 13" "0,1" bitfld.long 0x00 12. " GP12 ,General purpose read/write bit 12" "0,1" bitfld.long 0x00 11. " GP11 ,General purpose read/write bit 11" "0,1" textline " " bitfld.long 0x00 10. " GP10 ,General purpose read/write bit 10" "0,1" bitfld.long 0x00 9. " GP9 ,General purpose read/write bit 9" "0,1" bitfld.long 0x00 8. " GP8 ,General purpose read/write bit 8" "0,1" textline " " bitfld.long 0x00 7. " GP7 ,General purpose read/write bit 7" "0,1" bitfld.long 0x00 6. " GP6 ,General purpose read/write bit 6" "0,1" bitfld.long 0x00 5. " GP5 ,General purpose read/write bit 5" "0,1" textline " " bitfld.long 0x00 4. " GP4 ,General purpose read/write bit 4" "0,1" bitfld.long 0x00 3. " GP3 ,General purpose read/write bit 3" "0,1" bitfld.long 0x00 2. " GP2 ,General purpose read/write bit 2" "0,1" textline " " bitfld.long 0x00 1. " GP1 ,General purpose read/write bit 1" "0,1" bitfld.long 0x00 0. " GP0 ,General purpose read/write bit 0" "0,1" textline "" group.long 0x800++0x13 line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" bitfld.long 0x00 27.--31. " ZQ_EARLY_COMPARATOR_EN_TIMER ,ZQ early comparator enable timer" ",,,,,,,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" textline " " bitfld.long 0x00 16. " ZQ_HW_FOR ,Force ZQ automatic calibration process with the i.MX ZQ calibration pad" "Not forced,Forced" rbitfld.long 0x00 11.--15. " ZQ_HW_PD_RES ,ZQ HW calibration pull-down result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" textline " " rbitfld.long 0x00 6.--10. " ZQ_HW_PU_RES ,ZQ automatic calibration pull-up result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x00 2.--5. " ZQ_HW_PER ,ZQ periodic calibration time" "1 ms,2 ms,4 ms,,,,,,,,1 sec,,,,16 sec,32 sec" textline " " bitfld.long 0x00 0.--1. " ZQ_MODE ,ZQ calibration mode" "Not issued,i.MX ZQ calibration pad/External DDR(when exiting),External DDR,i.MX ZQ calibration pad/External DDR(periodic/when exiting)" line.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" bitfld.long 0x04 16.--17. " ZQ_CMP_OUT_SMP ,Amount of cycles between driving the ZQ signals to the ZQ pad" "7 cycles,15 cycles,23 cycles,31 cycles" bitfld.long 0x04 13. " USE_ZQ_SW_VAL ,Use SW ZQ configured value for I/O pads resistor controls" "ZQ_HW_PD_VAL & ZQ_HW_PU_VAL,ZQ_SW_PD_VAL & ZQ_SW_PU_VAL" bitfld.long 0x04 12. " ZQ_SW_PD ,ZQ software PU/PD calibration" "PU,PD" textline " " bitfld.long 0x04 7.--11. " ZQ_SW_PD_VAL ,ZQ software pull-down resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x04 2.--6. " ZQ_SW_PU_VAL ,ZQ software pull-up resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" rbitfld.long 0x04 1. " ZQ_SW_RES ,ZQ software calibration result" "VDD/2" textline " " bitfld.long 0x04 0. " ZQ_SW_FOR ,Force ZQ SW calibration" "Not forced,Forced" line.long 0x08 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" rbitfld.long 0x08 11. " WL_HW_ERR3 ,Byte3 WL HW calibration error" "No error,Error" rbitfld.long 0x08 10. " WL_HW_ERR2 ,Byte2 WL HW calibration error" "No error,Error" rbitfld.long 0x08 9. " WL_HW_ERR1 ,Byte1 WL HW calibration error" "No error,Error" textline " " rbitfld.long 0x08 8. " WL_HW_ERR0 ,Byte0 WL HW calibration error" "No error,Error" rbitfld.long 0x08 7. " WL_SW_RES3 ,Byte3 WL software result" "Low,High" rbitfld.long 0x08 6. " WL_SW_RES2 ,Byte2 WL software result" "Low,High" textline " " rbitfld.long 0x08 5. " WL_SW_RES1 ,Byte1 WL software result" "Low,High" rbitfld.long 0x08 4. " WL_SW_RES0 ,Byte0 WL software result" "Low,High" bitfld.long 0x08 2. " SW_WL_CNT_EN ,SW WL count down enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SW_WL_EN ,Enable WL SW update" "Disabled,Enabled" bitfld.long 0x08 0. " HW_WL_EN ,Enable WL HW enable" "Disabled,Enabled" line.long 0x0C "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" bitfld.long 0x0C 25.--26. " WL_CYC_DEL1 ,Write level cycle delay for Byte 1" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 24. " WL_HC_DEL1 ,Write level half cycle delay for Byte 1" "No delay,Half cycle" hexmask.long.byte 0x0C 16.--22. 1. " WR_DL_ABS_OFFSET1 ,Absolute write-leveling delay offset for Byte 1" textline " " bitfld.long 0x0C 9.--10. " WL_CYC_DEL0 ,Write level cycle delay for Byte 0" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 8. " WL_HC_DEL0 ,Write level half cycle delay for Byte 0" "No delay,Half cycle" hexmask.long.byte 0x0C 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write-leveling delay offset for Byte 0" line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" bitfld.long 0x10 25.--26. " WL_CYC_DEL3 ,Write level cycle delay for Byte 3" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 24. " WL_HC_DEL3 ,Write level half cycle delay for Byte 3" "No delay,Half cycle" hexmask.long.byte 0x10 16.--22. 1. " WR_DL_ABS_OFFSET3 ,Absolute delay offset for Byte 3" textline " " bitfld.long 0x10 9.--10. " WL_CYC_DEL2 ,Write level cycle delay for Byte 2" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 8. " WL_HC_DEL2 ,Write level half cycle delay for Byte 2" "No delay,Half cycle" hexmask.long.byte 0x10 0.--6. 1. " WR_DL_ABS_OFFSET2 ,Absolute delay offset for Byte 2" rgroup.long 0x814++0x03 line.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WL_DL_UNIT_NUM3 ,Number of delay units that is actually used by write leveling delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WL_DL_UNIT_NUM2 ,Number of delay units that is actually used by write leveling delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WL_DL_UNIT_NUM1 ,Number of delay units that is actually used by write leveling delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL_DL_UNIT_NUM0 ,Number of delay units that is actually used by write leveling delay line 0" hgroup.long 0x818++0x03 hide.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" group.long 0x81C++0x1F line.long 0x00 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" bitfld.long 0x00 28.--30. " RD_DQ7_DEL ,Read dqs0 to dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 24.--26. " RD_DQ6_DEL ,Read dqs0 to dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 20.--22. " RD_DQ5_DEL ,Read dqs0 to dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 16.--18. " RD_DQ4_DEL ,Read dqs0 to dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 12.--14. " RD_DQ3_DEL ,Read dqs0 to dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 8.--10. " RD_DQ2_DEL ,Read dqs0 to dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 4.--6. " RD_DQ1_DEL ,Read dqs0 to dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 0.--2. " RD_DQ0_DEL ,Read dqs0 to dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x04 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" bitfld.long 0x04 28.--30. " RD_DQ15_DEL ,Read dqs1 to dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 24.--26. " RD_DQ14_DEL ,Read dqs1 to dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 20.--22. " RD_DQ13_DEL ,Read dqs1 to dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 16.--18. " RD_DQ12_DEL ,Read dqs1 to dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 12.--14. " RD_DQ11_DEL ,Read dqs1 to dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 8.--10. " RD_DQ10_DEL ,Read dqs1 to dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 4.--6. " RD_DQ9_DEL ,Read dqs1 to dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 0.--2. " RD_DQ8_DEL ,Read dqs1 to dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x08 "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" bitfld.long 0x08 28.--30. " RD_DQ23_DEL ,Read dqs2 to dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 24.--26. " RD_DQ22_DEL ,Read dqs2 to dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 20.--22. " RD_DQ21_DEL ,Read dqs2 to dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 16.--18. " RD_DQ20_DEL ,Read dqs2 to dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 12.--14. " RD_DQ19_DEL ,Read dqs2 to dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 8.--10. " RD_DQ18_DEL ,Read dqs2 to dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 4.--6. " RD_DQ17_DEL ,Read dqs2 to dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 0.--2. " RD_DQ16_DEL ,Read dqs2 to dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x0C "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" bitfld.long 0x0C 28.--30. " RD_DQ31_DEL ,Read dqs3 to dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 24.--26. " RD_DQ30_DEL ,Read dqs3 to dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 20.--22. " RD_DQ29_DEL ,Read dqs3 to dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 16.--18. " RD_DQ28_DEL ,Read dqs3 to dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 12.--14. " RD_DQ27_DEL ,Read dqs3 to dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 8.--10. " RD_DQ26_DEL ,Read dqs3 to dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 4.--6. " RD_DQ25_DEL ,Read dqs3 to dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 0.--2. " RD_DQ24_DEL ,Read dqs3 to dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x10 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" bitfld.long 0x10 30.--31. " WR_DM0_DEL ,Write dm0 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 28.--29. " WR_DQ7_DEL ,Write dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 24.--25. " WR_DQ6_DEL ,Write dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 20.--21. " WR_DQ5_DEL ,Write dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 16.--17. " WR_DQ4_DEL ,Write dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 12.--13. " WR_DQ3_DEL ,Write dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 8.--9. " WR_DQ2_DEL ,Write dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 4.--5. " WR_DQ1_DEL ,Write dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 0.--1. " WR_DQ0_DEL ,Write dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x14 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" bitfld.long 0x14 30.--31. " WR_DM1_DEL ,Write dm1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 28.--29. " WR_DQ15_DEL ,Write dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 24.--25. " WR_DQ14_DEL ,Write dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 20.--21. " WR_DQ13_DEL ,Write dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 16.--17. " WR_DQ12_DEL ,Write dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 12.--13. " WR_D11_DEL ,Write dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 8.--9. " WR_DQ10_DEL ,Write dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 4.--5. " WR_DQ9_DEL ,Write dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 0.--1. " WR_DQ8_DEL ,Write dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x18 "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" bitfld.long 0x18 30.--31. " WR_DM2_DEL ,Write dm2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 28.--29. " WR_DQ23_DEL ,Write dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 24.--25. " WR_DQ22_DEL ,Write dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 20.--21. " WR_DQ21_DEL ,Write dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 16.--17. " WR_DQ20_DEL ,Write dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 12.--13. " WR_D19_DEL ,Write dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 8.--9. " WR_DQ18_DEL ,Write dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 4.--5. " WR_DQ17_DEL ,Write dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 0.--1. " WR_DQ16_DEL ,Write dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x1C "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" bitfld.long 0x1C 30.--31. " WR_DM3_DEL ,Write dm3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 28.--29. " WR_DQ31_DEL ,Write dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 24.--25. " WR_DQ30_DEL ,Write dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 20.--21. " WR_DQ29_DEL ,Write dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 16.--17. " WR_DQ28_DEL ,Write dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 12.--13. " WR_D27_DEL ,Write dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 8.--9. " WR_DQ26_DEL ,Write dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 4.--5. " WR_DQ25_DEL ,Write dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 0.--1. " WR_DQ24_DEL ,Write dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays" sif (cpu()=="IMX6SOLOLITE") group.long 0x83C++0x07 line.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" bitfld.long 0x00 31. " RST_RD_FIFO ,Reset Read Data FIFO & pointers" "No reset,Reset" bitfld.long 0x00 30. " DG_CMP_CYC ,Read DQS gating sample cycle" "16 cycles,32 cycles" bitfld.long 0x00 29. " DG_DIS ,Read DQS gating disable" "No,Yes" textline " " bitfld.long 0x00 28. " HW_DG_EN ,Enable automatic read DQS gating calibration" "Disabled,Enabled" bitfld.long 0x00 24.--27. " DG_HC_DEL1 ,Read Dqs1 gating half cycles delay for Byte 1" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." bitfld.long 0x00 23. " DG_EXT_UP ,DG extend upper boundary" "Not extended,Extended" textline " " hexmask.long.byte 0x00 16.--22. 1. " DG_DL_ABS_OFFSET1 ,Absolute delay offset" rbitfld.long 0x00 12. " HW_DG_ERR ,HW DQS gating error " "No error,Error" bitfld.long 0x00 8.--11. " DG_HC_DEL0 ,Read DQS0 gating half cycles delay for Byte 0" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_ABS_OFFSET0 ,Absolute read DQS gating delay offset" line.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" bitfld.long 0x04 24.--27. " DG_HC_DEL3 ,Read DQS3 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." hexmask.long.byte 0x04 16.--22. 1. " DG_DL_ABS_OFFSET3 ,Absolute read DQS gating delay offset for Byte 3" bitfld.long 0x04 8.--11. " DG_HC_DEL2 ,Read DQS2 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x04 0.--6. 1. " DG_DL_ABS_OFFSET2 ,Absolute read DQS gating delay offset" rgroup.long 0x844++0x03 line.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " DG_DL_UNIT_NUM3 ,Number of delay units that is actually used by DQS gating delay line 3" hexmask.long.byte 0x00 16.--22. 1. " DG_DL_UNIT_NUM2 ,Number of delay units that is actually used by DQS gating delay line 2" hexmask.long.byte 0x00 8.--14. 1. " DG_DL_UNIT_NUM1 ,Number of delay units that is actually used by DQS gating delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_UNIT_NUM0 ,Number of delay units that is actually used by DQS gating delay line 0" else hgroup.long 0x83C++0x07 hide.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" hide.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" hgroup.long 0x844++0x03 hide.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" endif group.long 0x848++0x03 line.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_ABS_OFFSET3 ,Absolute read delay offset byte 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_ABS_OFFSET2 ,Absolute read delay offset byte 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_ABS_OFFSET1 ,Absolute read delay offset byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_ABS_OFFSET0 ,Absolute read delay offset byte 0" rgroup.long 0x84C++0x03 line.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_UNIT_NUM3 ,Number of delay units that is actually used by read delay line 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_UNIT_NUM2 ,Number of delay units that is actually used by read delay line 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_UNIT_NUM1 ,Number of delay units that is actually used by read delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_UNIT_NUM0 ,Number of delay units that is actually used by read delay line 0" group.long 0x850++0x03 line.long 0x00 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_ABS_OFFSET3 ,Absolute write delay offset for Byte 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_ABS_OFFSET2 ,Absolute write delay offset for Byte 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_ABS_OFFSET1 ,Absolute write delay offset for Byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write delay offset for Byte 30" rgroup.long 0x854++0x03 line.long 0x00 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_UNIT_NUM3 ,Number of delay units that is actually used by write delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_UNIT_NUM2 ,Number of delay units that is actually used by write delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_UNIT_NUM1 ,Number of delay units that is actually used by write delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_UNIT_NUM0 ,Number of delay units that is actually used by write delay line 0" group.long 0x858++0x0F line.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 10.--11. " SDCLK1_del ,DDR clock1 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " endif bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x04 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" hexmask.long.byte 0x04 24.--30. 1. " ZQ_LP2_HW_ZQCS ,Period in cycles that it takes the memory device to perform a Short ZQ calibration" hexmask.long.byte 0x04 16.--23. 1. " ZQ_LP2_HW_ZQCL ,Period in cycles that it takes the memory device to perform a Long ZQ calibration" hexmask.long.word 0x04 0.--8. 1. " ZQ_LP2_HW_ZQINIT ,Period in cycles that it takes the memory device to perform a Init ZQ calibration" line.long 0x08 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" bitfld.long 0x08 5. " HW_RDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x08 4. " HW_RDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x08 3. " HW_RDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x08 2. " HW_RDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x08 1. " HW_RDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x08 0. " HW_RDL_ERR0 ,HW RD DL0 error" "No error,Error" line.long 0x0C "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" bitfld.long 0x0C 5. " HW_WDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x0C 4. " HW_WDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x0C 3. " HW_WDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x0C 2. " HW_WDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x0C 1. " HW_WDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x0C 0. " HW_WDL_ERR0 ,HW RD DL0 error" "No error,Error" rgroup.long 0x868++0x13 line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " HW_RD_DL_UP1 ,HW RD DL1 upper boundary" hexmask.long.byte 0x00 16.--22. 1. " HW_RD_DL_LOW1 ,HW RD DL1 lower boundary" hexmask.long.byte 0x00 8.--14. 1. " HW_RD_DL_UP0 ,HW RD DL0 upper boundary" textline " " hexmask.long.byte 0x00 0.--6. 1. " HW_RD_DL_LOW0 ,HW RD DL0 lower boundary" line.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hexmask.long.byte 0x04 24.--30. 1. " HW_RD_DL_UP3 ,HW RD DL3 upper boundary" hexmask.long.byte 0x04 16.--22. 1. " HW_RD_DL_LOW3 ,HW RD DL3 lower boundary" hexmask.long.byte 0x04 8.--14. 1. " HW_RD_DL_UP2 ,HW RD DL2 upper boundary" textline " " hexmask.long.byte 0x04 0.--6. 1. " HW_RD_DL_LOW2 ,HW RD DL2 lower boundary" line.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hexmask.long.byte 0x08 24.--30. 1. " HW_WR_DL_UP1 ,HW WR DL1 upper boundary" hexmask.long.byte 0x08 16.--22. 1. " HW_WR_DL_LOW1 ,HW WR DL1 lower boundary" hexmask.long.byte 0x08 8.--14. 1. " HW_WR_DL_UP0 ,HW WR DL0 upper boundary" textline " " hexmask.long.byte 0x08 0.--6. 1. " HW_WR_DL_LOW0 ,HW WR DL0 lower boundary" line.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hexmask.long.byte 0x0C 24.--30. 1. " HW_WR_DL_UP3 ,HW WR DL3 upper boundary" hexmask.long.byte 0x0C 16.--22. 1. " HW_WR_DL_LOW3 ,HW WR DL3 lower boundary" hexmask.long.byte 0x0C 8.--14. 1. " HW_WR_DL_UP2 ,HW WR DL2 upper boundary" textline " " hexmask.long.byte 0x0C 0.--6. 1. " HW_WR_DL_LOW2 ,HW WR DL2 lower boundary" line.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hexmask.long.byte 0x10 24.--31. 1. " HW_WL3_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 16.--23. 1. " HW_WL2_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 8.--15. 1. " HW_WL1_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" textline " " hexmask.long.byte 0x10 0.--7. 1. " HW_WL0_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" sif (cpu()=="IMX6SOLOLITE") group.long 0x87C++0x0F line.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hexmask.long.word 0x00 16.--26. 1. " HW_DG_UP0 ,HW DG0 upper boundary" hexmask.long.word 0x00 0.--10. 1. " HW_DG_LOW0 ,HW DG0 lower boundary" line.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hexmask.long.word 0x04 16.--26. 1. " HW_DG_UP1 ,HW DG1 upper boundary" hexmask.long.word 0x04 0.--10. 1. " HW_DG_LOW1 ,HW DG1 lower boundary" line.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hexmask.long.word 0x08 16.--26. 1. " HW_DG_UP2 ,HW DG2 upper boundary" hexmask.long.word 0x08 0.--10. 1. " HW_DG_LOW2 ,HW DG2 lower boundary" line.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hexmask.long.word 0x0C 16.--26. 1. " HW_DG_UP3 ,HW DG3 upper boundary" hexmask.long.word 0x0C 0.--10. 1. " HW_DG_LOW3 ,HW DG3 lower boundary" else hgroup.long 0x87C++0x0F hide.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hide.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hide.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hide.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" endif group.long 0x88C++0x0B line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hexmask.long.word 0x00 16.--31. 1. " PDV2 ,Pre defined comapre value2" hexmask.long.word 0x00 0.--15. 1. " PDV1 ,Pre defined comapre value2" line.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " PHY_CA_DL_UNIT ,Number of delay units that is actually used by phy CA delay unit" hexmask.long.byte 0x04 16.--22. 1. " CA_DL_ABS_OFFSET ,Absolute delay offset" bitfld.long 0x04 2. " READ_LEVEL_PATTERN ,DQ calibration Read level pattern" "1010,0011" textline " " bitfld.long 0x04 1. " MPR_FULL_CMP ,DQ calibration full compare enable" "Disabled,Enabled" bitfld.long 0x04 0. " MPR_CMP ,DQ calibration compare enable" "Disabled,Enabled" line.long 0x08 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" rbitfld.long 0x08 5. " SW_DUM_CMP3 ,SW dummy read byte3 compare results" "Failed,Passed" rbitfld.long 0x08 4. " SW_DUM_CMP2 ,SW dummy read byte2 compare results" "Failed,Passed" rbitfld.long 0x08 3. " SW_DUM_CMP1 ,SW dummy read byte1 compare results" "Failed,Passed" textline " " rbitfld.long 0x08 2. " SW_DUM_CMP0 ,SW dummy read byte0 compare results" "Failed,Passed" bitfld.long 0x08 1. " SW_DUMMY_RD ,SW dummy read" "Not generated,Generated" bitfld.long 0x08 0. " SW_DUMMY_WR ,SW dummy write" "Not generated,Generated" rgroup.long 0x898++0x1F line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0" line.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" line.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" line.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" group.long 0x8B8++0x07 line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hexmask.long.word 0x00 16.--25. 1. " MU_UNIT_DEL_NUM ,Measure unit measured number of unit delay per cycle" bitfld.long 0x00 11. " FRC_MSR ,Force measuement on delay-lines" "Not forced,Forced" bitfld.long 0x00 10. " MU_BYP_EN ,Measure unit bypass enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " MU_BYP_VAL ,Measure unit bypass value" line.long 0x04 "MPWRCADL,MMDC PHY Write CA Delay Control Register" bitfld.long 0x04 18.--19. " WR_CA9_DEL ,CA9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 16.--17. " WR_CA8_DEL ,CA8 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 14.--15. " WR_CA7_DEL ,CA7 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 12.--13. " WR_CA6_DEL ,CA6 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 10.--11. " WR_CA5_DEL ,CA5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 8.--9. " WR_CA4_DEL ,CA4 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 6.--7. " WR_CA3_DEL ,CA3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 4.--5. " WR_CA2_DEL ,CA2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 2.--3. " WR_CA1_DEL ,CA1 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 0.--1. " WR_CA0_DEL ,CA0 delay fine tuning" "No change,1 delay,2 delays,3 delays" rgroup.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." elif (((per.l(ad:0x021B0000+0x18))&0x18)==0x00) group.long 0x00++0x23 line.long 0x00 "MDCTL,MMDC Core Control Register" bitfld.long 0x00 31. " SDE_0 ,MMDC Enable CS0" "Disabled,Enabled" bitfld.long 0x00 30. " SDE_1 ,MMDC Enable CS1" "Disabled,Enabled" bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11-bits,12-bits,13-bits,14-bits,15-bits,16-bits,?..." textline " " bitfld.long 0x00 20.--22. " COL ,Column Address Width" "9-bits,10-bits,11-bits,8-bits,12-bits,?..." bitfld.long 0x00 19. " BL ,Burst Length" ",8" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,?..." else bitfld.long 0x00 16.--17. " DSIZ ,SDRAM Memory Data Width" "16-bit,32-bit,64-bit,?..." endif line.long 0x04 "MDPDC,MMDC Core Power Down Control Register" bitfld.long 0x04 28.--30. " PRCT_1 ,Precharge Timer - Chip Select 1" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 24.--26. " PRCT_0 ,Precharge Timer - Chip Select 0" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 16.--18. " TCKE ,CKE minimum pulse width" "1 cycle,2 cycles,,,,,7 cycles,8 cycles" textline " " bitfld.long 0x04 12.--15. " PWDT_1 ,Power Down Timer - Chip Select 1" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 8.--11. " PWDT_0 ,Power Down Timer - Chip Select 0" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 7. " SLOW_PD ,Slow precharge power-down" "Fast,Slow" textline " " bitfld.long 0x04 6. " BOTH_CS_PD ,Both chip selects power-down" "Independently,Both" bitfld.long 0x04 3.--5. " TCKSRX ,Valid clock requirement before self-refresh exit" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x04 0.--2. " TCKSRE ,Valid clock requirement after self-refresh entry" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x08 "MDOTC,MMDC Core ODT Timing Control Register" bitfld.long 0x08 27.--29. " TAOFPD ,Asynchronous RTT turn-off delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 24.--26. " TAONPD ,Asynchronous RTT turn-on delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 20.--23. " TANPD ,ODT to power down entry latency" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" textline " " bitfld.long 0x08 16.--19. " TAXPD ,ODT power down exit latency" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x08 12.--14. " TODTLON ,ODT turn on latency" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,?..." bitfld.long 0x08 4.--8. " TODT_IDLE_OFF ,Idle period before turning memory ODT off" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x0C "MDCFG0,MMDC Core Timing Configuration Register 0" hexmask.long.byte 0x0C 24.--31. 1. " TRFC ,Refresh command to Active or Refresh command time" hexmask.long.byte 0x0C 16.--23. 1. " TXS ,Self-refresh exit to next valid command delay" bitfld.long 0x0C 13.--15. " TXP ,Exit power down with DLL-on to any valid command" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x0C 9.--12. " TXPDLL ,Exit precharge power down with DLL frozen to commands requiring DLL" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x0C 4.--8. " TFAW ,Four Active Window" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" bitfld.long 0x0C 0.--3. " TCL ,CAS Read Latency" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." line.long 0x10 "MDCFG1,MMDC Core Timing Configuration Register 1" bitfld.long 0x10 29.--31. " TRCD ,Active command to internal read or write delay time" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks" bitfld.long 0x10 26.--28. " TRP ,Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks" bitfld.long 0x10 21.--25. " TRC ,Active to Active or Refresh command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" textline " " bitfld.long 0x10 16.--20. " TRAS ,Active to Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,?..." bitfld.long 0x10 15. " TRPA ,Precharge-all command period" "tRP,tRP+1" bitfld.long 0x10 9.--11. " TWR ,WRITE recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x10 5.--8. " TMRD ,Mode Register Set command cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" bitfld.long 0x10 0.--2. " TCWL ,CAS Write Latency" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x14 "MDCFG2,MMDC Core Timing Configuration Register 2" hexmask.long.word 0x14 16.--24. 1. " TDLLK ,DLL locking time" bitfld.long 0x14 6.--8. " TRTP ,Internal READ command to PRECHARGE command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x14 3.--5. " TWTR ,Internal WRITE to READ command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x14 0.--2. " TRRD ,ACTIVE to ACTIVE command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x18 "MDMISC,MMDC Core Miscellaneous Register" rbitfld.long 0x18 31. " CS0_RDY ,External status device on CS0" "Wake-up,Ready" rbitfld.long 0x18 30. " CS1_RDY ,External status device on CS1" "Wake-up,Ready" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x18 21. " CK1_GATING ,Gating the secondary DDR clock" "two clocks,only one clock" textline " " endif bitfld.long 0x18 20. " CALIB_PER_CS ,Defines the CS number that the associated calibration is targetted at" "CS0,CS1" bitfld.long 0x18 19. " ADDR_MIRROR ,Address mirroring" "Disabled,Enabled" bitfld.long 0x18 18. " LHD ,Latency hiding disable" "No,Yes" textline " " bitfld.long 0x18 16.--17. " WALAT ,Write Additional latency" "Not required,1 cycle,2 cycles,3 cycles" bitfld.long 0x18 12. " BI_ON ,Bank Interleaving On" "Not interleaved,Interleaved" bitfld.long 0x18 9.--10. " MIF3_MODE ,Command prediction working mode" "Disabled,First pipe line stage,First pipe line stage/axi bus,First pipe line stage/axi bus/access queue" textline " " bitfld.long 0x18 6.--8. " RALAT ,Read Additional Latency" "ASAP,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x18 5. " DDR_4_BANK ,DDR device with 4 Banks" "8 banks,4 banks" textline " " bitfld.long 0x18 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." textline " " bitfld.long 0x18 1. " RST ,Software Reset" "No operation,Asserted" line.long 0x1C "MDSCR,MMDC Core Special Command Register" hexmask.long.byte 0x1C 24.--31. 1. " CMD_ADDR_MSB ,Command/Address MSB" hexmask.long.byte 0x1C 16.--23. 1. " CMD_ADDR_LSB , Command/Address LSB" bitfld.long 0x1C 15. " CON_REQ ,Configuration request" "Not requested,Requested" textline " " rbitfld.long 0x1C 14. " CON_ACK ,Configuration acknowledge" "Forbidden,Permitted" bitfld.long 0x1C 9. " WL_EN ,Write Level Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4.--6. " CMD ,Command" "Normal operation,Precharge all,Auto-Refresh,Load Mode Register,ZQ calibration,Precharge all,?..." bitfld.long 0x1C 3. " CMD_CS ,Chip Select" "0,1" bitfld.long 0x1C 0.--2. " CMD_BA ,Bank Address" "0,1,2,3,4,5,6,7" line.long 0x20 "MDREF,MMDC Core Refresh Control Register" hexmask.long.word 0x20 16.--31. 1. " REF_CNT ,Refresh Counter" bitfld.long 0x20 14.--15. " REF_SEL ,Refresh Selector" "64KHz,32KHz,REF_CNT,Not triggered" bitfld.long 0x20 11.--13. " REFR ,Refresh Rate" "1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes" textline " " bitfld.long 0x20 0. " START_REF ,Start Refresh cycle" "No operation,Started" group.long 0x2C++0x07 line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" bitfld.long 0x00 12.--14. " RTW_SAME ,Controls the cycles delay between Read to Write commands in same chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 9.--11. " WTR_DIFF ,Controls the cycles delay between Write to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 6.--8. " WTW_DIFF ,Controls the cycles delay between Write to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3.--5. " RTW_DIFF ,Controls the cycles delay between Read to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RTR_DIFF ,Controls the cycles delay between Read to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" hexmask.long.byte 0x04 16.--23. 1. " TXPR ,CKE HIGH to a valid command" bitfld.long 0x04 8.--13. " SDE_TO_RST , Time from SDE enable until DDR reset is high" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" bitfld.long 0x04 0.--5. " RST_TO_CKE ,Time from SDE enable to CKE rise" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" hgroup.long 0x34++0x0B hide.long 0x00 "MDMRR,MMDC Core MRR Data Register" hide.long 0x04 "MDCFG3LP,MMDC Core Timing Configuration Register 3" hide.long 0x08 "MDMR4,MMDC Core MR4 Derating Register" group.long 0x40++0x03 line.long 0x00 "MDASP,MMDC Core Address Space Partition Register" hexmask.long.byte 0x00 0.--6. 1. " CS0_END ,Define the absolute last address associated with CS0" group.long 0x400++0x17 line.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" bitfld.long 0x00 31. " ARCR_SEC_ERR_LOCK ,ARCR_SEC_ERR_EN lock" "Not locked,Locked" bitfld.long 0x00 30. " ARCR_SEC_ERR_EN ,Security read/write access violation in OKAY/SLV Error response " "OKAY,SLAVE error" bitfld.long 0x00 28. " ARCR_EXC_ERR_EN ,Exclusive read/write access violation of AXI 6.2.4 rule in OKAY/SLV Error response " "OKAY,SLAVE error" textline " " bitfld.long 0x00 24. " ARCR_RCH_EN ,Real time channel enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " ARCR_PAG_HIT ,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " ARCR_ACC_HIT ,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " ARCR_DYN_JMP ,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ARCR_DYN_MAX ,ARCR Dynamic Maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARCR_GUARD ,ARCR Guard" "15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30" line.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" rbitfld.long 0x04 25. " DVACK ,General DVFS acknowledge" "Not asserted,Asserted" rbitfld.long 0x04 24. " LPACK ,General low-power acknowledge" "Not asserted,Asserted" bitfld.long 0x04 21. " DVFS ,General DVFS request" "Not requested,Requested" textline " " bitfld.long 0x04 20. " LPMD ,General LPMD request" "Not requested,Requested" hexmask.long.byte 0x04 8.--15. 1. " PST ,Automatic Power saving timer" rbitfld.long 0x04 6. " WIS ,Write Idle Status" "Idle,Busy" textline " " rbitfld.long 0x04 5. " RIS ,Read Idle Status" "Idle,Busy" rbitfld.long 0x04 4. " PSS ,Power Saving Status" "Disabled,Enabled" bitfld.long 0x04 0. " PSD ,Automatic Power Saving Disable" "No,Yes" line.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hexmask.long.word 0x08 16.--31. 1. " EXC_ID_MONITOR1 ,Defines ID for Exclusive monitor#1" hexmask.long.word 0x08 0.--15. 1. " EXC_ID_MONITOR0 ,Defines ID for Exclusive monitor#0" line.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 1" hexmask.long.word 0x0C 16.--31. 1. " EXC_ID_MONITOR3 ,Defines ID for Exclusive monitor#3" hexmask.long.word 0x0C 0.--15. 1. " EXC_ID_MONITOR2 ,Defines ID for Exclusive monitor#2" line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" bitfld.long 0x10 9. " SBS ,Step By Step trigger" "Not launched,Launched" bitfld.long 0x10 8. " SBS_EN ,Step By Step debug Enable" "Disabled,Enabled" eventfld.long 0x10 3. " CYC_OVF ,Total Cycles count Overflow" "No overflow,Overflow" textline " " bitfld.long 0x10 2. " PRF_FRZ ,Profiling freeze" "Not frozen,Frozen" bitfld.long 0x10 1. " DBG_RST ,Debug and Profiling Reset" "No reset,Reset" bitfld.long 0x10 0. " DBG_EN ,Debug and Profiling Enable" "Disabled,Enabled" line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" bitfld.long 0x14 31. " PRF_AXI_ID_MASK_31 ,Profiling AXI ID Mask 31" "Masked,Not masked" bitfld.long 0x14 30. " PRF_AXI_ID_MASK_30 ,Profiling AXI ID Mask 30" "Masked,Not masked" bitfld.long 0x14 29. " PRF_AXI_ID_MASK_29 ,Profiling AXI ID Mask 29" "Masked,Not masked" textline " " bitfld.long 0x14 28. " PRF_AXI_ID_MASK_28 ,Profiling AXI ID Mask 28" "Masked,Not masked" bitfld.long 0x14 27. " PRF_AXI_ID_MASK_27 ,Profiling AXI ID Mask 27" "Masked,Not masked" bitfld.long 0x14 26. " PRF_AXI_ID_MASK_26 ,Profiling AXI ID Mask 26" "Masked,Not masked" textline " " bitfld.long 0x14 25. " PRF_AXI_ID_MASK_25 ,Profiling AXI ID Mask 25" "Masked,Not masked" bitfld.long 0x14 24. " PRF_AXI_ID_MASK_24 ,Profiling AXI ID Mask 24" "Masked,Not masked" bitfld.long 0x14 23. " PRF_AXI_ID_MASK_23 ,Profiling AXI ID Mask 23" "Masked,Not masked" textline " " bitfld.long 0x14 22. " PRF_AXI_ID_MASK_22 ,Profiling AXI ID Mask 22" "Masked,Not masked" bitfld.long 0x14 21. " PRF_AXI_ID_MASK_21 ,Profiling AXI ID Mask 21" "Masked,Not masked" bitfld.long 0x14 20. " PRF_AXI_ID_MASK_20 ,Profiling AXI ID Mask 20" "Masked,Not masked" textline " " bitfld.long 0x14 19. " PRF_AXI_ID_MASK_19 ,Profiling AXI ID Mask 19" "Masked,Not masked" bitfld.long 0x14 18. " PRF_AXI_ID_MASK_18 ,Profiling AXI ID Mask 18" "Masked,Not masked" bitfld.long 0x14 17. " PRF_AXI_ID_MASK_17 ,Profiling AXI ID Mask 17" "Masked,Not masked" textline " " bitfld.long 0x14 16. " PRF_AXI_ID_MASK_16 ,Profiling AXI ID Mask 16" "Masked,Not masked" bitfld.long 0x14 15. " PRF_AXI_ID[15] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 14. " PRF_AXI_ID[14] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 13. " PRF_AXI_ID[13] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 12. " PRF_AXI_ID[12] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 11. " PRF_AXI_ID[11] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 10. " PRF_AXI_ID[10] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 9. " PRF_AXI_ID[9] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 8. " PRF_AXI_ID[8] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 7. " PRF_AXI_ID[7] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 6. " PRF_AXI_ID[6] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 5. " PRF_AXI_ID[5] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 4. " PRF_AXI_ID[4] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 3. " PRF_AXI_ID[3] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 2. " PRF_AXI_ID[2] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x14 1. " PRF_AXI_ID[1] ,Profiling AXI ID" "Low,High" bitfld.long 0x14 0. " PRF_AXI_ID[0] ,Profiling AXI ID" "Low,High" rgroup.long 0x418++0x1F line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" line.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" line.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" line.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" line.long 0x18 "MASBS0,MMDC Core Step By Step Address" line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" hexmask.long.word 0x1C 16.--31. 1. " SBS_AXI_ID ,Step By Step AXI ID" bitfld.long 0x1C 13.--15. " SBS_LEN ,Step By Step Length" "1,2,3,4,5,6,7,8" bitfld.long 0x1C 12. " SBS_BUFF ,Step By Step Buffered" "0,1" textline " " bitfld.long 0x1C 10.--11. " SBS_BURST ,Step By Step Burst" "Fixed,INCR,WRAP,?..." bitfld.long 0x1C 7.--9. " SBS_SIZE ,Step By Step Size" "8 bits,16 bits,32 bits,64 bits,128 bits,?..." bitfld.long 0x1C 4.--6. " SBS_PROT ,Step By Step Protection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 2.--3. " SBS_LOCK ,Step By Step Lock" "0,1,2,3" bitfld.long 0x1C 1. " SBS_TYPE ,Step By Step Request Type" "Write,Read" bitfld.long 0x1C 0. " SBS_VLD ,Step By Step Valid" "Not valid,Valid" group.long 0x440++0x03 line.long 0x00 "MAGENP,MMDC Core General Purpose Register" bitfld.long 0x00 31. " GP31 ,General purpose read/write bit 31" "0,1" bitfld.long 0x00 30. " GP30 ,General purpose read/write bit 30" "0,1" bitfld.long 0x00 29. " GP29 ,General purpose read/write bit 29" "0,1" textline " " bitfld.long 0x00 28. " GP28 ,General purpose read/write bit 28" "0,1" bitfld.long 0x00 27. " GP27 ,General purpose read/write bit 27" "0,1" bitfld.long 0x00 26. " GP26 ,General purpose read/write bit 26" "0,1" textline " " bitfld.long 0x00 25. " GP25 ,General purpose read/write bit 25" "0,1" bitfld.long 0x00 24. " GP24 ,General purpose read/write bit 24" "0,1" bitfld.long 0x00 23. " GP23 ,General purpose read/write bit 23" "0,1" textline " " bitfld.long 0x00 22. " GP22 ,General purpose read/write bit 22" "0,1" bitfld.long 0x00 21. " GP21 ,General purpose read/write bit 21" "0,1" bitfld.long 0x00 20. " GP20 ,General purpose read/write bit 20" "0,1" textline " " bitfld.long 0x00 19. " GP19 ,General purpose read/write bit 19" "0,1" bitfld.long 0x00 18. " GP18 ,General purpose read/write bit 18" "0,1" bitfld.long 0x00 17. " GP17 ,General purpose read/write bit 17" "0,1" textline " " bitfld.long 0x00 16. " GP16 ,General purpose read/write bit 16" "0,1" bitfld.long 0x00 15. " GP15 ,General purpose read/write bit 15" "0,1" bitfld.long 0x00 14. " GP14 ,General purpose read/write bit 14" "0,1" textline " " bitfld.long 0x00 13. " GP13 ,General purpose read/write bit 13" "0,1" bitfld.long 0x00 12. " GP12 ,General purpose read/write bit 12" "0,1" bitfld.long 0x00 11. " GP11 ,General purpose read/write bit 11" "0,1" textline " " bitfld.long 0x00 10. " GP10 ,General purpose read/write bit 10" "0,1" bitfld.long 0x00 9. " GP9 ,General purpose read/write bit 9" "0,1" bitfld.long 0x00 8. " GP8 ,General purpose read/write bit 8" "0,1" textline " " bitfld.long 0x00 7. " GP7 ,General purpose read/write bit 7" "0,1" bitfld.long 0x00 6. " GP6 ,General purpose read/write bit 6" "0,1" bitfld.long 0x00 5. " GP5 ,General purpose read/write bit 5" "0,1" textline " " bitfld.long 0x00 4. " GP4 ,General purpose read/write bit 4" "0,1" bitfld.long 0x00 3. " GP3 ,General purpose read/write bit 3" "0,1" bitfld.long 0x00 2. " GP2 ,General purpose read/write bit 2" "0,1" textline " " bitfld.long 0x00 1. " GP1 ,General purpose read/write bit 1" "0,1" bitfld.long 0x00 0. " GP0 ,General purpose read/write bit 0" "0,1" textline "" group.long 0x800++0x13 line.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" bitfld.long 0x00 27.--31. " ZQ_EARLY_COMPARATOR_EN_TIMER ,ZQ early comparator enable timer" ",,,,,,,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" textline " " bitfld.long 0x00 23.--25. " TZQ_CS ,Device ZQ short time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." bitfld.long 0x00 20.--22. " TZQ_OPER ,Device ZQ long/oper time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." bitfld.long 0x00 17.--19. " TZQ_INIT ,Device ZQ long/init time" ",,128 cycles,256 cycles,512 cycles,1024 cycles,?..." textline " " bitfld.long 0x00 16. " ZQ_HW_FOR ,Force ZQ automatic calibration process with the i.MX ZQ calibration pad" "Not forced,Forced" rbitfld.long 0x00 11.--15. " ZQ_HW_PD_RES ,ZQ HW calibration pull-down result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" textline " " rbitfld.long 0x00 6.--10. " ZQ_HW_PU_RES ,ZQ automatic calibration pull-up result" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x00 2.--5. " ZQ_HW_PER ,ZQ periodic calibration time" "1 ms,2 ms,4 ms,,,,,,,,1 ms,,,,16 ms,32 ms" textline " " bitfld.long 0x00 0.--1. " ZQ_MODE ,ZQ calibration mode" "Not issued,i.MX ZQ calibration pad/External DDR(when exiting),External DDR,i.MX ZQ calibration pad/External DDR(periodic/when exiting)" line.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" bitfld.long 0x04 16.--17. " ZQ_CMP_OUT_SMP ,Amount of cycles between driving the ZQ signals to the ZQ pad" "7 cycles,15 cycles,23 cycles,31 cycles" bitfld.long 0x04 13. " USE_ZQ_SW_VAL ,Use SW ZQ configured value for I/O pads resistor controls" "ZQ_HW_PD_VAL & ZQ_HW_PU_VAL,ZQ_SW_PD_VAL & ZQ_SW_PU_VAL" bitfld.long 0x04 12. " ZQ_SW_PD ,ZQ software PU/PD calibration" "PU,PD" textline " " bitfld.long 0x04 7.--11. " ZQ_SW_PD_VAL ,ZQ software pull-down resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" bitfld.long 0x04 2.--6. " ZQ_SW_PU_VAL ,ZQ software pull-up resistence" "0 (maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 (minimum)" rbitfld.long 0x04 1. " ZQ_SW_RES ,ZQ software calibration result" "VDD/2" textline " " bitfld.long 0x04 0. " ZQ_SW_FOR ,Force ZQ SW calibration" "Not forced,Forced" line.long 0x08 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" rbitfld.long 0x08 11. " WL_HW_ERR3 ,Byte3 WL HW calibration error" "No error,Error" rbitfld.long 0x08 10. " WL_HW_ERR2 ,Byte2 WL HW calibration error" "No error,Error" rbitfld.long 0x08 9. " WL_HW_ERR1 ,Byte1 WL HW calibration error" "No error,Error" textline " " rbitfld.long 0x08 8. " WL_HW_ERR0 ,Byte0 WL HW calibration error" "No error,Error" rbitfld.long 0x08 7. " WL_SW_RES3 ,Byte3 WL software result" "Low,High" rbitfld.long 0x08 6. " WL_SW_RES2 ,Byte2 WL software result" "Low,High" textline " " rbitfld.long 0x08 5. " WL_SW_RES1 ,Byte1 WL software result" "Low,High" rbitfld.long 0x08 4. " WL_SW_RES0 ,Byte0 WL software result" "Low,High" bitfld.long 0x08 2. " SW_WL_CNT_EN ,SW WL count down enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SW_WL_EN ,Enable WL SW update" "Disabled,Enabled" bitfld.long 0x08 0. " HW_WL_EN ,Enable WL HW enable" "Disabled,Enabled" line.long 0x0C "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" bitfld.long 0x0C 25.--26. " WL_CYC_DEL1 ,Write level cycle delay for Byte 1" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 24. " WL_HC_DEL1 ,Write level half cycle delay for Byte 1" "No delay,Half cycle" hexmask.long.byte 0x0C 16.--22. 1. " WR_DL_ABS_OFFSET1 ,Absolute delay offset for Byte 1" textline " " bitfld.long 0x0C 9.--10. " WL_CYC_DEL0 ,Write level cycle delay for Byte 0" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x0C 8. " WL_HC_DEL0 ,Write level half cycle delay for Byte 0" "No delay,Half cycle" hexmask.long.byte 0x0C 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute delay offset for Byte 0" line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" bitfld.long 0x10 25.--26. " WL_CYC_DEL3 ,Write level cycle delay for Byte 3" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 24. " WL_HC_DEL3 ,Write level half cycle delay for Byte 3" "No delay,Half cycle" hexmask.long.byte 0x10 16.--22. 1. " WR_DL_ABS_OFFSET3 ,Absolute delay offset for Byte 3" textline " " bitfld.long 0x10 9.--10. " WL_CYC_DEL2 ,Write level cycle delay for Byte 2" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x10 8. " WL_HC_DEL2 ,Write level half cycle delay for Byte 2" "No delay,Half cycle" hexmask.long.byte 0x10 0.--6. 1. " WR_DL_ABS_OFFSET2 ,Absolute delay offset for Byte 2" rgroup.long 0x814++0x03 line.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WL_DL_UNIT_NUM3 ,Number of delay units that is actually used by write leveling delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WL_DL_UNIT_NUM2 ,Number of delay units that is actually used by write leveling delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WL_DL_UNIT_NUM1 ,Number of delay units that is actually used by write leveling delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL_DL_UNIT_NUM0 ,Number of delay units that is actually used by write leveling delay line 0" group.long 0x818++0x2B line.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" bitfld.long 0x00 16.--18. " ODT3_INT_RES ,On chip ODT byte3 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 12.--14. " ODT2_INT_RES ,On chip ODT byte2 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 8.--10. " ODT1_INT_RES ,On chip ODT byte1 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x00 4.--6. " ODT0_INT_RES ,On chip ODT byte0 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 3. " ODT_RD_ACT_EN ,Active read CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 2. " ODT_RD_PAS_EN ,Inactive read CS ODT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ODT_WR_ACT_EN ,Active write CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ODT_WR_PAS_EN ,Inactive write CS ODT enable" "Disabled,Enabled" line.long 0x04 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" bitfld.long 0x04 28.--30. " RD_DQ7_DEL ,Read dqs0 to dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 24.--26. " RD_DQ6_DEL ,Read dqs0 to dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 20.--22. " RD_DQ5_DEL ,Read dqs0 to dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 16.--18. " RD_DQ4_DEL ,Read dqs0 to dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 12.--14. " RD_DQ3_DEL ,Read dqs0 to dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 8.--10. " RD_DQ2_DEL ,Read dqs0 to dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 4.--6. " RD_DQ1_DEL ,Read dqs0 to dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 0.--2. " RD_DQ0_DEL ,Read dqs0 to dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x08 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" bitfld.long 0x08 28.--30. " RD_DQ15_DEL ,Read dqs1 to dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 24.--26. " RD_DQ14_DEL ,Read dqs1 to dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 20.--22. " RD_DQ13_DEL ,Read dqs1 to dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 16.--18. " RD_DQ12_DEL ,Read dqs1 to dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 12.--14. " RD_DQ11_DEL ,Read dqs1 to dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 8.--10. " RD_DQ10_DEL ,Read dqs1 to dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 4.--6. " RD_DQ9_DEL ,Read dqs1 to dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 0.--2. " RD_DQ8_DEL ,Read dqs1 to dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x0C "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" bitfld.long 0x0C 28.--30. " RD_DQ23_DEL ,Read dqs2 to dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 24.--26. " RD_DQ22_DEL ,Read dqs2 to dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 20.--22. " RD_DQ21_DEL ,Read dqs2 to dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 16.--18. " RD_DQ20_DEL ,Read dqs2 to dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 12.--14. " RD_DQ19_DEL ,Read dqs2 to dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 8.--10. " RD_DQ18_DEL ,Read dqs2 to dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 4.--6. " RD_DQ17_DEL ,Read dqs2 to dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 0.--2. " RD_DQ16_DEL ,Read dqs2 to dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x10 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" bitfld.long 0x10 28.--30. " RD_DQ31_DEL ,Read dqs3 to dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 24.--26. " RD_DQ30_DEL ,Read dqs3 to dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 20.--22. " RD_DQ29_DEL ,Read dqs3 to dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x10 16.--18. " RD_DQ28_DEL ,Read dqs3 to dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 12.--14. " RD_DQ27_DEL ,Read dqs3 to dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 8.--10. " RD_DQ26_DEL ,Read dqs3 to dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x10 4.--6. " RD_DQ25_DEL ,Read dqs3 to dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x10 0.--2. " RD_DQ24_DEL ,Read dqs3 to dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x14 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" bitfld.long 0x14 30.--31. " WR_DM0_DEL ,Write dm0 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 28.--29. " WR_DQ7_DEL ,Write dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 24.--25. " WR_DQ6_DEL ,Write dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 20.--21. " WR_DQ5_DEL ,Write dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 16.--17. " WR_DQ4_DEL ,Write dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 12.--13. " WR_DQ3_DEL ,Write dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 8.--9. " WR_DQ2_DEL ,Write dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 4.--5. " WR_DQ1_DEL ,Write dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 0.--1. " WR_DQ0_DEL ,Write dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x18 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" bitfld.long 0x18 30.--31. " WR_DM1_DEL ,Write dm1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 28.--29. " WR_DQ15_DEL ,Write dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 24.--25. " WR_DQ14_DEL ,Write dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 20.--21. " WR_DQ13_DEL ,Write dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 16.--17. " WR_DQ12_DEL ,Write dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 12.--13. " WR_D11_DEL ,Write dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 8.--9. " WR_DQ10_DEL ,Write dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 4.--5. " WR_DQ9_DEL ,Write dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 0.--1. " WR_DQ8_DEL ,Write dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x1C "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" bitfld.long 0x1C 30.--31. " WR_DM2_DEL ,Write dm2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 28.--29. " WR_DQ23_DEL ,Write dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 24.--25. " WR_DQ22_DEL ,Write dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 20.--21. " WR_DQ21_DEL ,Write dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 16.--17. " WR_DQ20_DEL ,Write dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 12.--13. " WR_D19_DEL ,Write dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 8.--9. " WR_DQ18_DEL ,Write dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 4.--5. " WR_DQ17_DEL ,Write dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 0.--1. " WR_DQ16_DEL ,Write dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x20 "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" bitfld.long 0x20 30.--31. " WR_DM3_DEL ,Write dm3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 28.--29. " WR_DQ31_DEL ,Write dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 24.--25. " WR_DQ30_DEL ,Write dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x20 20.--21. " WR_DQ29_DEL ,Write dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 16.--17. " WR_DQ28_DEL ,Write dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 12.--13. " WR_D27_DEL ,Write dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x20 8.--9. " WR_DQ26_DEL ,Write dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 4.--5. " WR_DQ25_DEL ,Write dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x20 0.--1. " WR_DQ24_DEL ,Write dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x24 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" bitfld.long 0x24 31. " RST_RD_FIFO ,Reset Read Data FIFO & pointers" "No reset,Reset" bitfld.long 0x24 30. " DG_CMP_CYC ,Read DQS gating sample cycle" "16 cycles,32 cycles" bitfld.long 0x24 29. " DG_DIS ,Read DQS gating disable" "No,Yes" textline " " bitfld.long 0x24 28. " HW_DG_EN ,Enable automatic read DQS gating calibration" "Disabled,Enabled" bitfld.long 0x24 24.--27. " DG_HC_DEL1 ,Read Dqs1 gating half cycles delay for Byte 1" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." bitfld.long 0x24 23. " DG_EXT_UP ,DG extend upper boundary" "Not extended,Extended" textline " " hexmask.long.byte 0x24 16.--22. 1. " DG_DL_ABS_OFFSET1 ,Absolute delay offset" rbitfld.long 0x24 12. " HW_DG_ERR ,HW DQS gating error " "No error,Error" bitfld.long 0x24 8.--11. " DG_HC_DEL0 ,Read DQS0 gating half cycles delay for Byte 0" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x24 0.--6. 1. " DG_DL_ABS_OFFSET0 ,Absolute read DQS gating delay offset" line.long 0x28 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" bitfld.long 0x28 24.--27. " DG_HC_DEL3 ,Read DQS3 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." hexmask.long.byte 0x28 16.--22. 1. " DG_DL_ABS_OFFSET3 ,Absolute read DQS gating delay offset for Byte 3" bitfld.long 0x28 8.--11. " DG_HC_DEL2 ,Read DQS2 gating half cycles delay for Byte 3" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x28 0.--6. 1. " DG_DL_ABS_OFFSET2 ,Absolute read DQS gating delay offset" rgroup.long 0x844++0x03 line.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " DG_DL_UNIT_NUM3 ,Number of delay units that is actually used by DQS gating delay line 3" hexmask.long.byte 0x00 16.--22. 1. " DG_DL_UNIT_NUM2 ,Number of delay units that is actually used by DQS gating delay line 2" hexmask.long.byte 0x00 8.--14. 1. " DG_DL_UNIT_NUM1 ,Number of delay units that is actually used by DQS gating delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_UNIT_NUM0 ,Number of delay units that is actually used by DQS gating delay line 0" group.long 0x848++0x03 line.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_ABS_OFFSET3 ,Absolute read delay offset byte 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_ABS_OFFSET2 ,Absolute read delay offset byte 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_ABS_OFFSET1 ,Absolute read delay offset byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_ABS_OFFSET0 ,Absolute read delay offset byte 0" rgroup.long 0x84C++0x03 line.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_UNIT_NUM3 ,Number of delay units that is actually used by read delay line 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_UNIT_NUM2 ,Number of delay units that is actually used by read delay line 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_UNIT_NUM1 ,Number of delay units that is actually used by read delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_UNIT_NUM0 ,Number of delay units that is actually used by read delay line 0" group.long 0x850++0x03 line.long 0x00 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_ABS_OFFSET3 ,Absolute write delay offset for Byte 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_ABS_OFFSET2 ,Absolute write delay offset for Byte 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_ABS_OFFSET1 ,Absolute write delay offset for Byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write delay offset for Byte 0" rgroup.long 0x854++0x03 line.long 0x00 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_UNIT_NUM3 ,Number of delay units that is actually used by write delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_UNIT_NUM2 ,Number of delay units that is actually used by write delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_UNIT_NUM1 ,Number of delay units that is actually used by write delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_UNIT_NUM0 ,Number of delay units that is actually used by write delay line 0" group.long 0x858++0x03 line.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 10.--11. " SDCLK1_del ,DDR clock1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" else bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" endif hgroup.long 0x85C++0x03 hide.long 0x00 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" group.long 0x860++0x07 line.long 0x00 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" bitfld.long 0x00 5. " HW_RDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x00 4. " HW_RDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x00 3. " HW_RDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x00 2. " HW_RDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x00 1. " HW_RDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x00 0. " HW_RDL_ERR0 ,HW RD DL0 error" "No error,Error" line.long 0x04 "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" bitfld.long 0x04 5. " HW_WDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x04 4. " HW_WDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x04 3. " HW_WDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x04 2. " HW_WDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x04 1. " HW_WDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x04 0. " HW_WDL_ERR0 ,HW RD DL0 error" "No error,Error" rgroup.long 0x868++0x23 line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " HW_RD_DL_UP1 ,HW RD DL1 upper boundary" hexmask.long.byte 0x00 16.--22. 1. " HW_RD_DL_LOW1 ,HW RD DL1 lower boundary" hexmask.long.byte 0x00 8.--14. 1. " HW_RD_DL_UP0 ,HW RD DL0 upper boundary" textline " " hexmask.long.byte 0x00 0.--6. 1. " HW_RD_DL_LOW0 ,HW RD DL0 lower boundary" line.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hexmask.long.byte 0x04 24.--30. 1. " HW_RD_DL_UP3 ,HW RD DL3 upper boundary" hexmask.long.byte 0x04 16.--22. 1. " HW_RD_DL_LOW3 ,HW RD DL3 lower boundary" hexmask.long.byte 0x04 8.--14. 1. " HW_RD_DL_UP2 ,HW RD DL2 upper boundary" textline " " hexmask.long.byte 0x04 0.--6. 1. " HW_RD_DL_LOW2 ,HW RD DL2 lower boundary" line.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hexmask.long.byte 0x08 24.--30. 1. " HW_WR_DL_UP1 ,HW WR DL1 upper boundary" hexmask.long.byte 0x08 16.--22. 1. " HW_WR_DL_LOW1 ,HW WR DL1 lower boundary" hexmask.long.byte 0x08 8.--14. 1. " HW_WR_DL_UP0 ,HW WR DL0 upper boundary" textline " " hexmask.long.byte 0x08 0.--6. 1. " HW_WR_DL_LOW0 ,HW WR DL0 lower boundary" line.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hexmask.long.byte 0x0C 24.--30. 1. " HW_WR_DL_UP3 ,HW WR DL3 upper boundary" hexmask.long.byte 0x0C 16.--22. 1. " HW_WR_DL_LOW3 ,HW WR DL3 lower boundary" hexmask.long.byte 0x0C 8.--14. 1. " HW_WR_DL_UP2 ,HW WR DL2 upper boundary" textline " " hexmask.long.byte 0x0C 0.--6. 1. " HW_WR_DL_LOW2 ,HW WR DL2 lower boundary" line.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hexmask.long.byte 0x10 24.--31. 1. " HW_WL3_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 16.--23. 1. " HW_WL2_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 8.--15. 1. " HW_WL1_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" textline " " hexmask.long.byte 0x10 0.--7. 1. " HW_WL0_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" line.long 0x14 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hexmask.long.word 0x14 16.--26. 1. " HW_DG_UP0 ,HW DG0 upper boundary" hexmask.long.word 0x14 0.--10. 1. " HW_DG_LOW0 ,HW DG0 lower boundary" line.long 0x18 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hexmask.long.word 0x18 16.--26. 1. " HW_DG_UP1 ,HW DG1 upper boundary" hexmask.long.word 0x18 0.--10. 1. " HW_DG_LOW1 ,HW DG1 lower boundary" line.long 0x1C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hexmask.long.word 0x1C 16.--26. 1. " HW_DG_UP2 ,HW DG2 upper boundary" hexmask.long.word 0x1C 0.--10. 1. " HW_DG_LOW2 ,HW DG2 lower boundary" line.long 0x20 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hexmask.long.word 0x20 16.--26. 1. " HW_DG_UP3 ,HW DG3 upper boundary" hexmask.long.word 0x20 0.--10. 1. " HW_DG_LOW3 ,HW DG3 lower boundary" group.long 0x88C++0x0B line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hexmask.long.word 0x00 16.--31. 1. " PDV2 ,Pre defined compare value2" hexmask.long.word 0x00 0.--15. 1. " PDV1 ,Pre defined compare value2" line.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" bitfld.long 0x04 2. " READ_LEVEL_PATTERN ,MPR calibration Read level pattern" "1010,?..." textline " " bitfld.long 0x04 1. " MPR_FULL_CMP ,MPR full compare enable" "Disabled,Enabled" bitfld.long 0x04 0. " MPR_CMP ,MPR compare enable" "Disabled,Enabled" line.long 0x08 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" rbitfld.long 0x08 5. " SW_DUM_CMP3 ,SW dummy read byte3 compare results" "Failed,Passed" rbitfld.long 0x08 4. " SW_DUM_CMP2 ,SW dummy read byte2 compare results" "Failed,Passed" rbitfld.long 0x08 3. " SW_DUM_CMP1 ,SW dummy read byte1 compare results" "Failed,Passed" textline " " rbitfld.long 0x08 2. " SW_DUM_CMP0 ,SW dummy read byte0 compare results" "Failed,Passed" bitfld.long 0x08 1. " SW_DUMMY_RD ,SW dummy read" "Not generated,Generated" bitfld.long 0x08 0. " SW_DUMMY_WR ,SW dummy write" "Not generated,Generated" rgroup.long 0x898++0x1F line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0" line.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" line.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" line.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" group.long 0x8B8++0x03 line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hexmask.long.word 0x00 16.--25. 1. " MU_UNIT_DEL_NUM ,Measure unit measured number of unit delay per cycle" bitfld.long 0x00 11. " FRC_MSR ,Force measuement on delay line" "Not forced,Forced" bitfld.long 0x00 10. " MU_BYP_EN ,Measure unit bypass enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " MU_BYP_VAL ,Measure unit bypass value" hgroup.long 0x8BC++0x03 hide.long 0x00 "MPWRCADL,MMDC PHY Write CA Delay Control Register" sif (cpu()=="IMX6SOLOLITE") group.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." else rgroup.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." endif else hgroup.long 0x00++0x07 hide.long 0x00 "MDCTL,MMDC Core Control Register" hide.long 0x04 "MDPDC,MMDC Core Power Down Control Register" hgroup.long 0x08++0x03 hide.long 0x00 "MDOTC,MMDC Core ODT Timing Control Register" hgroup.long 0x0C++0x0B hide.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hide.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" hide.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " group.long 0x18++0x03 line.long 0x00 "MDMISC,MMDC Core Miscellaneous Register" bitfld.long 0x00 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." hgroup.long 0x1C++0x07 hide.long 0x00 "MDSCR,MMDC Core Special Command Register" hide.long 0x04 "MDREF,MMDC Core Refresh Control Register" hgroup.long 0x2C++0x17 hide.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hide.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" hide.long 0x08 "MDMRR,MMDC Core MRR Data Register" hide.long 0x0C "MDCFG3LP,MMDC Core Timing Configuration Register 3" hide.long 0x10 "MDMR4,MMDC Core MR4 Derating Register" hide.long 0x14 "MDASP,MMDC Core Address Space Partition Register" hgroup.long 0x400++0x0F hide.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" hide.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" hide.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hide.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 0" hgroup.long 0x410++0x2B hide.long 0x00 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" hide.long 0x04 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" hide.long 0x08 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" hide.long 0x0C "MADPSR1,MMDC Core Debug and Profiling Status Register 1" hide.long 0x10 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" hide.long 0x14 "MADPSR3,MMDC Core Debug and Profiling Status Register 3" hide.long 0x18 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" hide.long 0x1C "MADPSR5,MMDC Core Debug and Profiling Status Register 5" hide.long 0x20 "MASBS0,MMDC Core Step By Step Address" hide.long 0x24 "MASBS1,MMDC Core Step By Step Address Attributes" hide.long 0x28 "MAGENP,MMDC Core General Purpose Register" hgroup.long 0x800++0x07 hide.long 0x00 "MPZQHWCTRL,MMDC PHY ZQ HW Control Register" hide.long 0x04 "MPZQSWCTRL,MMDC PHY ZQ SW control register" hgroup.long 0x808++0xBB hide.long 0x00 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" hide.long 0x04 "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" hide.long 0x08 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" hide.long 0x0C "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hide.long 0x10 "MPODTCTRL0,MMDC PHY ODT Control Register 0" hide.long 0x14 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" hide.long 0x18 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" hide.long 0x1C "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" hide.long 0x20 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" hide.long 0x24 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" hide.long 0x28 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" hide.long 0x2C "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" hide.long 0x30 "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" hide.long 0x34 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" hide.long 0x38 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" hide.long 0x3C "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hide.long 0x40 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hide.long 0x44 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hide.long 0x48 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hide.long 0x4C "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hide.long 0x50 "MPSDCTRL,MMDC PHY CK control Register" hide.long 0x54 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" hide.long 0x58 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" hide.long 0x5C "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" hide.long 0x60 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hide.long 0x64 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hide.long 0x68 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hide.long 0x6C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hide.long 0x70 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hide.long 0x74 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hide.long 0x78 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hide.long 0x7C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hide.long 0x80 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hide.long 0x84 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hide.long 0x88 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" hide.long 0x8C "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" hide.long 0x90 "MPSWDRDR0,MMDC PHY SW Dummy Read Data LSB Register 0" hide.long 0x94 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" hide.long 0x98 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" hide.long 0x9C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" hide.long 0xA0 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" hide.long 0xA4 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" hide.long 0xA8 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" hide.long 0xAC "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" hide.long 0xB0 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hide.long 0xB4 "MPWRCADL,MMDC PHY Write CA Delay Control Register" hide.long 0xB8 "MPDCCR,MMDC PHY Duty Cycle Control Register for CK0 and DQS0-3" endif width 0x0B tree.end tree "Port 1" base ad:0x021B4000 width 14. if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long (0x00)++0x07 line.long 0x00 "MDCTL,MMDC Core Control Register" bitfld.long 0x00 31. " SDE_0 ,MMDC Enable CS0" "Disabled,Enabled" bitfld.long 0x00 30. " SDE_1 ,MMDC Enable CS1" "Disabled,Enabled" bitfld.long 0x00 24.--26. " ROW ,Row Address Width" "11-bits,12-bits,13-bits,14-bits,15-bits,16-bits,?..." textline " " bitfld.long 0x00 20.--22. " COL ,Column Address Width" "9-bits,10-bits,11-bits,8-bits,12-bits,?..." bitfld.long 0x00 19. " BL ,Burst Length" "4," bitfld.long 0x00 16.--17. " DSIZ ,DDR data bus size" "16-bit,32-bit,64-bit,?..." line.long 0x04 "MDPDC,MMDC Core Power Down Control Register" bitfld.long 0x04 28.--30. " PRCT_1 ,Precharge Timer - Chip Select 1" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 24.--26. " PRCT_0 ,Precharge Timer - Chip Select 0" "Disabled,2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,128 clocks" bitfld.long 0x04 16.--18. " TCKE ,CKE minimum pulse width" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x04 12.--15. " PWDT_1 ,Power Down Timer - Chip Select 1" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 8.--11. " PWDT_0 ,Power Down Timer - Chip Select 0" "Disabled,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8196 cycles,16384 cycles,32768 cycles,?..." bitfld.long 0x04 6. " BOTH_CS_PD ,Both chip selects power-down" "Independently,Both" textline " " bitfld.long 0x04 3.--5. " TCKSRX ,Valid clock requirement before self-refresh exit" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x04 0.--2. " TCKSRE ,Valid clock requirement after self-refresh entry" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else hgroup.long (0x00)++0x07 hide.long 0x00 "MDCTL,MMDC Core Control Register" hide.long 0x04 "MDPDC,MMDC Core Power Down Control Register" endif hgroup.long 0x08++0x03 hide.long 0x00 "MDOTC,MMDC Core ODT Timing Control Register" if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long (0x0C)++0x13 line.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hexmask.long.byte 0x00 24.--31. 1. " TRFC ,Refresh command to Active or Refresh command time" hexmask.long.byte 0x00 16.--23. 1. " TXSR ,Self-refresh exit to next valid command delay" bitfld.long 0x00 13.--15. " TXP ,Exit power-down to next valid command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 4.--8. " TFAW ,Four Active Window" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks" bitfld.long 0x00 0.--3. " TRL ,CAS Read Latency" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." line.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" bitfld.long 0x04 16.--20. " TRAS ,Active to Precharge command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,?..." bitfld.long 0x04 9.--11. " TWR ,WRITE recovery time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x04 5.--8. " TMRD ,Mode Register Set command cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks" textline " " bitfld.long 0x04 0.--2. " TWL ,CAS Write Latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" bitfld.long 0x08 6.--8. " TRTP ,Internal READ command to PRECHARGE command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 3.--5. " TWTR ,Internal WRITE to READ command delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 0.--2. " TRRD ,ACTIVE to ACTIVE command period" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." line.long 0x0C "MDMISC,MMDC Core Miscellaneous Register" bitfld.long 0x0C 31. " CS0_RDY ,External status device on CS0" "Wake-up,Ready" bitfld.long 0x0C 30. " CS1_RDY ,External status device on CS1" "Wake-up,Ready" bitfld.long 0x0C 20. " CALIB_PER_CS ,Defines the CS number that the associated calibration is targetted at" "CS0,CS1" textline " " bitfld.long 0x0C 18. " LHD ,Latency hiding disable" "No,Yes" bitfld.long 0x0C 16.--17. " WALAT ,Write Additional latency" "Not required,1 cycle,2 cycles,3 cycles" textline " " bitfld.long 0x0C 12. " BI_ON ,Bank Interleaving On" "Not interleaved,Interleaved" bitfld.long 0x0C 11. " LPDDR2_S2 ,LPDDR2 S2 device type indication" "LPDDR2-S4,LPDDR2-S2" bitfld.long 0x0C 9.--10. " MIF3_MODE ,Command prediction working mode" "Disabled,First pipe line stage,First pipe line stage/axi bus,First pipe line stage/axi bus/access queue" textline " " bitfld.long 0x0C 6.--8. " RALAT ,Read Additional Latency" "ASAP,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x0C 5. " DDR_4_BANK ,DDR device with 4 Banks" "8 banks,4 banks" bitfld.long 0x0C 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." textline " " bitfld.long 0x0C 2. " LPDDR2_2CH ,LPDDR2 2-channels mode" "Disabled,Enabled" bitfld.long 0x0C 1. " RST ,Software Reset" "No reset,Reset" line.long 0x10 "MDSCR,MMDC Core Special Command Register" hexmask.long.byte 0x10 24.--31. 1. " MR_OP ,MRW 8 bit operand" hexmask.long.byte 0x10 16.--23. 1. " MR_ADDR , MRR/MRW ADDRESS" bitfld.long 0x10 15. " CON_REQ ,Configuration request" "Not requested,Requested" textline " " rbitfld.long 0x10 14. " CON_ACK ,Configuration acknowledge" "Forbidden,Permitted" rbitfld.long 0x10 10. " MRR_READ_DATA_VALID ,MRR READ DATA VALID" "Cleared,Set" bitfld.long 0x10 9. " WL_EN ,Write Level Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4.--6. " CMD ,Command" "Normal operation,Precharge all,Auto-Refresh,MRW Command,,Precharge all,MRR,?..." bitfld.long 0x10 3. " CMD_CS ,Chip Select" "0,1" bitfld.long 0x10 0.--2. " CMD_BA ,Bank Address" "0,1,2,3,4,5,6,7" else hgroup.long (0x0C)++0x0B hide.long 0x00 "MDCFG0,MMDC Core Timing Configuration Register 0" hide.long 0x04 "MDCFG1,MMDC Core Timing Configuration Register 1" hide.long 0x08 "MDCFG2,MMDC Core Timing Configuration Register 2" group.long (0x18)++0x03 line.long 0x00 "MDMISC,MMDC Core Miscellaneous Register" bitfld.long 0x00 3.--4. " DDR_TYPE ,DDR TYPE" "DDR3,LPDDR2,?..." hgroup.long (0x1C)++0x03 hide.long 0x00 "MDSCR,MMDC Core Special Command Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x20++0x03 line.long 0x00 "MDREF,MMDC Core Refresh Control Register" hexmask.long.word 0x00 16.--31. 1. " REF_CNT ,Refresh Counter" bitfld.long 0x00 14.--15. " REF_SEL ,Refresh Selector" "64KHz,32KHz,REF_CNT,Not triggered" bitfld.long 0x00 11.--13. " REFR ,Refresh Rate" "1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes" textline " " bitfld.long 0x00 0. " START_REF ,Start Refresh cycle" "No operation,Started" else hgroup.long (0x20)++0x03 hide.long 0x00 "MDREF,MMDC Core Refresh Control Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long (0x2C)++0x07 line.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hexmask.long.word 0x00 16.--28. 1. " TDAI ,Device auto initialization period" bitfld.long 0x00 12.--14. " RTW_SAME ,Controls the cycles delay between Read to Write commands in same chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 9.--11. " WTR_DIFF ,Controls the cycles delay between Write to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 6.--8. " WTW_DIFF ,Controls the cycles delay between Write to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 3.--5. " RTW_DIFF ,Controls the cycles delay between Read to Write commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " RTR_DIFF ,Controls the cycles delay between Read to Read commands in different chip select" "0 cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" line.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" bitfld.long 0x04 0.--5. " RST_TO_CKE , Idle time ater first CKE assertion" ",,,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles" rgroup.long (0x34)++0x03 line.long 0x00 "MDMRR,MMDC Core MRR Data Register" hexmask.long.byte 0x00 24.--31. 1. " MRR_READ_DATA3 ,MRR DATA that arrived on DQ[31:24]" hexmask.long.byte 0x00 16.--23. 1. " MRR_READ_DATA2 ,MRR DATA that arrived on DQ[23:16]" hexmask.long.byte 0x00 8.--15. 1. " MRR_READ_DATA1 ,MRR DATA that arrived on DQ[15:8]" textline " " hexmask.long.byte 0x00 0.--7. 1. " MRR_READ_DATA0 ,MRR DATA that arrived on DQ[7:0]" group.long (0x38)++0x0B line.long 0x00 "MDCFG3LP,MMDC Core Timing Configuration Register 3" bitfld.long 0x00 16.--21. " RC_LP ,ACT to ACT or REF command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks,33 clocks,34 clocks,35 clocks,36 clocks,37 clocks,38 clocks,39 clocks,40 clocks,41 clocks,42 clocks,43 clocks,44 clocks,45 clocks,46 clocks,47 clocks,48 clocks,49 clocks,50 clocks,51 clocks,52 clocks,53 clocks,54 clocks,55 clocks,56 clocks,57 clocks,58 clocks,59 clocks,60 clocks,61 clocks,62 clocks,63 clocks,?..." bitfld.long 0x00 8.--11. " TRCD_LP ,ACT command to internal read or write delay time" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." bitfld.long 0x00 4.--7. " TRPPB_LP ,PRECHARGE (per bank) command period (same bank)" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." textline " " bitfld.long 0x00 0.--3. " TRPAB_LP ,PRECHARGE (all banks) command period" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,?..." line.long 0x04 "MDMR4,MMDC Core MR4 Derating Register" bitfld.long 0x04 8. " TRRD_DE ,TRRD derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 7. " TRP_DE ,TRP derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 6. " TRAS_DE ,TRAS derating value" "Original,Derated in 1 cycle" textline " " bitfld.long 0x04 5. " TRC_DE ,TRC derating value" "Original,Derated in 1 cycle" bitfld.long 0x04 4. " TRCD_DE ,TRCD derating value" "Original,Derated in 1 cycle" rbitfld.long 0x04 1. " UPDATE_DE_ACK ,Update Derated Values Acknowledge" "Not updated,Updated" textline " " bitfld.long 0x04 0. " UPDATE_DE_REQ ,Update Derated Values Request" "No operation,Requested" line.long 0x08 "MDASP,MMDC Core Address Space Partition Register" hexmask.long.byte 0x08 0.--6. 1. " CS0_END ,Define the absolute last address associated with CS0" else hgroup.long (0x2C)++0x17 hide.long 0x00 "MDRWD,MMDC Core Read/Write Command Delay Register" hide.long 0x04 "MDOR,MMDC Core Out of Reset Delays Register" hide.long 0x08 "MDMRR,MMDC Core MRR Data Register" hide.long 0x0C "MDCFG3LP,MMDC Core Timing Configuration Register 3" hide.long 0x10 "MDMR4,MMDC Core MR4 Derating Register" hide.long 0x14 "MDASP,MMDC Core Address Space Partition Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x400++0x0F line.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" bitfld.long 0x00 31. " ARCR_SEC_ERR_LOCK ,ARCR_SEC_ERR_EN lock" "Not locked,Locked" bitfld.long 0x00 30. " ARCR_SEC_ERR_EN ,Security read/write access violation in OKAY/SLV Error response " "OKAY,SLAVE error" bitfld.long 0x00 28. " ARCR_EXC_ERR_EN ,Exclusive read/write access violation of AXI 6.2.4 rule in OKAY/SLV Error response " "OKAY,SLAVE error" textline " " bitfld.long 0x00 24. " ARCR_RCH_EN ,Real time channel enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " ARCR_PAG_HIT ,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " ARCR_ACC_HIT ,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " ARCR_DYN_JMP ,ARCR Dynamic Jump" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " ARCR_DYN_MAX ,ARCR Dynamic Maximum" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ARCR_GUARD ,ARCR Guard" "15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30" line.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" rbitfld.long 0x04 25. " DVACK ,General DVFS acknowledge" "Not asserted,Asserted" rbitfld.long 0x04 24. " LPACK ,General low-power acknowledge" "Not asserted,Asserted" bitfld.long 0x04 21. " DVFS ,General DVFS request" "Not requested,Requested" textline " " bitfld.long 0x04 20. " LPMD ,General LPMD request" "Not requested,Requested" hexmask.long.byte 0x04 8.--15. 1. " PST ,Automatic Power saving timer" rbitfld.long 0x04 6. " WIS ,Write Idle Status" "Idle,Busy" textline " " rbitfld.long 0x04 5. " RIS ,Read Idle Status" "Idle,Busy" rbitfld.long 0x04 4. " PSS ,Power Saving Status" "Disabled,Enabled" bitfld.long 0x04 0. " PSD ,Automatic Power Saving Disable" "No,Yes" line.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hexmask.long.word 0x08 16.--31. 1. " EXC_ID_MONITOR1 ,Defines ID for Exclusive monitor#1" hexmask.long.word 0x08 0.--15. 1. " EXC_ID_MONITOR0 ,Defines ID for Exclusive monitor#0" line.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 1" hexmask.long.word 0x0C 16.--31. 1. " EXC_ID_MONITOR3 ,Defines ID for Exclusive monitor#3" hexmask.long.word 0x0C 0.--15. 1. " EXC_ID_MONITOR2 ,Defines ID for Exclusive monitor#2" else hgroup.long 0x400++0x0F hide.long 0x00 "MAARCR,MMDC Core AXI Re-ordering Control Register" hide.long 0x04 "MAPSR,MMDC Core Power Saving Control and Status Register" hide.long 0x08 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register 0" hide.long 0x0C "MAEXIDR1,MMDC Core Exclusive ID Monitor Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long (0x410)++0x07 line.long 0x00 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" bitfld.long 0x00 9. " SBS ,Step By Step trigger" "Not launched,Launched" bitfld.long 0x00 8. " SBS_EN ,Step By Step debug Enable" "Disabled,Enabled" eventfld.long 0x00 3. " CYC_OVF ,Total Cycles count Overflow" "No overflow,Overflow" textline " " bitfld.long 0x00 2. " PRF_FRZ ,Profiling freeze" "Not frozen,Frozen" bitfld.long 0x00 1. " DBG_RST ,Debug and Profiling Reset" "No reset,Reset" bitfld.long 0x00 0. " DBG_EN ,Debug and Profiling Enable" "Disabled,Enabled" line.long 0x04 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" bitfld.long 0x04 31. " PRF_AXI_ID_MASK_31 ,Profiling AXI ID Mask 31" "Masked,Not masked" bitfld.long 0x04 30. " PRF_AXI_ID_MASK_30 ,Profiling AXI ID Mask 30" "Masked,Not masked" bitfld.long 0x04 29. " PRF_AXI_ID_MASK_29 ,Profiling AXI ID Mask 29" "Masked,Not masked" textline " " bitfld.long 0x04 28. " PRF_AXI_ID_MASK_28 ,Profiling AXI ID Mask 28" "Masked,Not masked" bitfld.long 0x04 27. " PRF_AXI_ID_MASK_27 ,Profiling AXI ID Mask 27" "Masked,Not masked" bitfld.long 0x04 26. " PRF_AXI_ID_MASK_26 ,Profiling AXI ID Mask 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " PRF_AXI_ID_MASK_25 ,Profiling AXI ID Mask 25" "Masked,Not masked" bitfld.long 0x04 24. " PRF_AXI_ID_MASK_24 ,Profiling AXI ID Mask 24" "Masked,Not masked" bitfld.long 0x04 23. " PRF_AXI_ID_MASK_23 ,Profiling AXI ID Mask 23" "Masked,Not masked" textline " " bitfld.long 0x04 22. " PRF_AXI_ID_MASK_22 ,Profiling AXI ID Mask 22" "Masked,Not masked" bitfld.long 0x04 21. " PRF_AXI_ID_MASK_21 ,Profiling AXI ID Mask 21" "Masked,Not masked" bitfld.long 0x04 20. " PRF_AXI_ID_MASK_20 ,Profiling AXI ID Mask 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " PRF_AXI_ID_MASK_19 ,Profiling AXI ID Mask 19" "Masked,Not masked" bitfld.long 0x04 18. " PRF_AXI_ID_MASK_18 ,Profiling AXI ID Mask 18" "Masked,Not masked" bitfld.long 0x04 17. " PRF_AXI_ID_MASK_17 ,Profiling AXI ID Mask 17" "Masked,Not masked" textline " " bitfld.long 0x04 16. " PRF_AXI_ID_MASK_16 ,Profiling AXI ID Mask 16" "Masked,Not masked" bitfld.long 0x04 15. " PRF_AXI_ID[15] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 14. " PRF_AXI_ID[14] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x04 13. " PRF_AXI_ID[13] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 12. " PRF_AXI_ID[12] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 11. " PRF_AXI_ID[11] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x04 10. " PRF_AXI_ID[10] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 9. " PRF_AXI_ID[9] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 8. " PRF_AXI_ID[8] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x04 7. " PRF_AXI_ID[7] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 6. " PRF_AXI_ID[6] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 5. " PRF_AXI_ID[5] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x04 4. " PRF_AXI_ID[4] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 3. " PRF_AXI_ID[3] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 2. " PRF_AXI_ID[2] ,Profiling AXI ID" "Low,High" textline " " bitfld.long 0x04 1. " PRF_AXI_ID[1] ,Profiling AXI ID" "Low,High" bitfld.long 0x04 0. " PRF_AXI_ID[0] ,Profiling AXI ID" "Low,High" else hgroup.long (0x410)++0x07 hide.long 0x00 "MADPCR0,MMDC Core Debug and Profiling Control Register 0" hide.long 0x04 "MADPCR1,MMDC Core Debug and Profiling Control Register 1" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) rgroup.long (0x418)++0x1F line.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" line.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" line.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" line.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" line.long 0x18 "MASBS0,MMDC Core Step By Step Address" line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" hexmask.long.word 0x1C 16.--31. 1. " SBS_AXI_ID ,Step By Step AXI ID" bitfld.long 0x1C 13.--15. " SBS_LEN ,Step By Step Length" "1,2,3,4,5,6,7,8" bitfld.long 0x1C 12. " SBS_BUFF ,Step By Step Buffered" "0,1" textline " " bitfld.long 0x1C 10.--11. " SBS_BURST ,Step By Step Burst" "Fixed,INCR,WRAP,?..." bitfld.long 0x1C 7.--9. " SBS_SIZE ,Step By Step Size" "8 bits,16 bits,32 bits,64 bits,128 bits,?..." bitfld.long 0x1C 4.--6. " SBS_PROT ,Step By Step Protection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 2.--3. " SBS_LOCK ,Step By Step Lock" "0,1,2,3" bitfld.long 0x1C 1. " SBS_TYPE ,Step By Step Request Type" "Write,Read" bitfld.long 0x1C 0. " SBS_VLD ,Step By Step Valid" "Not valid,Valid" else hgroup.long (0x418)++0x1F hide.long 0x00 "MADPSR0,MMDC Core Debug and Profiling Status Register 0" hide.long 0x04 "MADPSR1,MMDC Core Debug and Profiling Status Register 1" hide.long 0x08 "MADPSR2,MMDC Core Debug and Profiling Status Register 2" hide.long 0x0C "MADPSR3,MMDC Core Debug and Profiling Status Register 3" hide.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4" hide.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5" hide.long 0x18 "MASBS0,MMDC Core Step By Step Address" hide.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long (0x440)++0x03 line.long 0x00 "MAGENP,MMDC Core General Purpose Register" bitfld.long 0x00 31. " GP31 ,General purpose read/write bit 31" "0,1" bitfld.long 0x00 30. " GP30 ,General purpose read/write bit 30" "0,1" bitfld.long 0x00 29. " GP29 ,General purpose read/write bit 29" "0,1" textline " " bitfld.long 0x00 28. " GP28 ,General purpose read/write bit 28" "0,1" bitfld.long 0x00 27. " GP27 ,General purpose read/write bit 27" "0,1" bitfld.long 0x00 26. " GP26 ,General purpose read/write bit 26" "0,1" textline " " bitfld.long 0x00 25. " GP25 ,General purpose read/write bit 25" "0,1" bitfld.long 0x00 24. " GP24 ,General purpose read/write bit 24" "0,1" bitfld.long 0x00 23. " GP23 ,General purpose read/write bit 23" "0,1" textline " " bitfld.long 0x00 22. " GP22 ,General purpose read/write bit 22" "0,1" bitfld.long 0x00 21. " GP21 ,General purpose read/write bit 21" "0,1" bitfld.long 0x00 20. " GP20 ,General purpose read/write bit 20" "0,1" textline " " bitfld.long 0x00 19. " GP19 ,General purpose read/write bit 19" "0,1" bitfld.long 0x00 18. " GP18 ,General purpose read/write bit 18" "0,1" bitfld.long 0x00 17. " GP17 ,General purpose read/write bit 17" "0,1" textline " " bitfld.long 0x00 16. " GP16 ,General purpose read/write bit 16" "0,1" bitfld.long 0x00 15. " GP15 ,General purpose read/write bit 15" "0,1" bitfld.long 0x00 14. " GP14 ,General purpose read/write bit 14" "0,1" textline " " bitfld.long 0x00 13. " GP13 ,General purpose read/write bit 13" "0,1" bitfld.long 0x00 12. " GP12 ,General purpose read/write bit 12" "0,1" bitfld.long 0x00 11. " GP11 ,General purpose read/write bit 11" "0,1" textline " " bitfld.long 0x00 10. " GP10 ,General purpose read/write bit 10" "0,1" bitfld.long 0x00 9. " GP9 ,General purpose read/write bit 9" "0,1" bitfld.long 0x00 8. " GP8 ,General purpose read/write bit 8" "0,1" textline " " bitfld.long 0x00 7. " GP7 ,General purpose read/write bit 7" "0,1" bitfld.long 0x00 6. " GP6 ,General purpose read/write bit 6" "0,1" bitfld.long 0x00 5. " GP5 ,General purpose read/write bit 5" "0,1" textline " " bitfld.long 0x00 4. " GP4 ,General purpose read/write bit 4" "0,1" bitfld.long 0x00 3. " GP3 ,General purpose read/write bit 3" "0,1" bitfld.long 0x00 2. " GP2 ,General purpose read/write bit 2" "0,1" textline " " bitfld.long 0x00 1. " GP1 ,General purpose read/write bit 1" "0,1" bitfld.long 0x00 0. " GP0 ,General purpose read/write bit 0" "0,1" else hgroup.long (0x440)++0x03 hide.long 0x00 "MAGENP,MMDC Core General Purpose Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long (0x808)++0x0B line.long 0x00 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" rbitfld.long 0x00 11. " WL_HW_ERR3 ,Byte3 WL HW calibration error" "No error,Error" rbitfld.long 0x00 10. " WL_HW_ERR2 ,Byte2 WL HW calibration error" "No error,Error" rbitfld.long 0x00 9. " WL_HW_ERR1 ,Byte1 WL HW calibration error" "No error,Error" textline " " rbitfld.long 0x00 8. " WL_HW_ERR0 ,Byte0 WL HW calibration error" "No error,Error" rbitfld.long 0x00 7. " WL_SW_RES3 ,Byte3 WL software result" "Low,High" rbitfld.long 0x00 6. " WL_SW_RES2 ,Byte2 WL software result" "Low,High" textline " " rbitfld.long 0x00 5. " WL_SW_RES1 ,Byte1 WL software result" "Low,High" rbitfld.long 0x00 4. " WL_SW_RES0 ,Byte0 WL software result" "Low,High" bitfld.long 0x00 2. " SW_WL_CNT_EN ,SW WL count down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SW_WL_EN ,Enable WL SW update" "Disabled,Enabled" bitfld.long 0x00 0. " HW_WL_EN ,Enable WL HW enable" "Disabled,Enabled" line.long 0x04 "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" bitfld.long 0x04 25.--26. " WL_CYC_DEL1 ,Write level cycle delay for Byte 1" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x04 24. " WL_HC_DEL1 ,Write level half cycle delay for Byte 1" "No delay,Half cycle" hexmask.long.byte 0x04 16.--22. 1. " WR_DL_ABS_OFFSET1 ,Absolute delay offset for Byte 1" textline " " bitfld.long 0x04 9.--10. " WL_CYC_DEL0 ,Write level cycle delay for Byte 0" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x04 8. " WL_HC_DEL0 ,Write level half cycle delay for Byte 0" "No delay,Half cycle" hexmask.long.byte 0x04 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute delay offset for Byte 0" line.long 0x08 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" bitfld.long 0x08 25.--26. " WL_CYC_DEL3 ,Write level cycle delay for Byte 3" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x08 24. " WL_HC_DEL3 ,Write level half cycle delay for Byte 3" "No delay,Half cycle" hexmask.long.byte 0x08 16.--22. 1. " WR_DL_ABS_OFFSET3 ,Absolute delay offset for Byte 3" textline " " bitfld.long 0x08 9.--10. " WL_CYC_DEL2 ,Write level cycle delay for Byte 2" "No delay,1 cycle,2 cycles,?..." bitfld.long 0x08 8. " WL_HC_DEL2 ,Write level half cycle delay for Byte 2" "No delay,Half cycle" hexmask.long.byte 0x08 0.--6. 1. " WR_DL_ABS_OFFSET2 ,Absolute delay offset for Byte 2" else hgroup.long (0x808)++0x0B hide.long 0x00 "MPWLGCR0,MMDC PHY Write Leveling Error Status Register 0" hide.long 0x04 "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0" hide.long 0x08 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x814++0x03 line.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WL_DL_UNIT_NUM3 ,Number of delay units that is actually used by write leveling delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WL_DL_UNIT_NUM2 ,Number of delay units that is actually used by write leveling delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WL_DL_UNIT_NUM1 ,Number of delay units that is actually used by write leveling delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL_DL_UNIT_NUM0 ,Number of delay units that is actually used by write leveling delay line 0" else hgroup.long (0x814)++0x03 hide.long 0x00 "MPWLDLST0,MMDC PHY Write Leveling Delay Line Status Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x818++0x03 line.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" bitfld.long 0x00 16.--18. " ODT3_INT_RES ,On chip ODT byte3 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 12.--14. " ODT2_INT_RES ,On chip ODT byte2 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 8.--10. " ODT1_INT_RES ,On chip ODT byte1 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" textline " " bitfld.long 0x00 4.--6. " ODT0_INT_RES ,On chip ODT byte0 resistor" "Disabled,120 Ohm,60 Ohm,40 Ohm,30 Ohm,24 Ohm,20 Ohm,17 Ohm" bitfld.long 0x00 3. " ODT_RD_ACT_EN ,Active read CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 2. " ODT_RD_PAS_EN ,Inactive read CS ODT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ODT_WR_ACT_EN ,Active write CS ODT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ODT_WR_PAS_EN ,Inactive write CS ODT enable" "Disabled,Enabled" else hgroup.long (0x818)++0x03 hide.long 0x00 "MPODTCTRL0,MMDC PHY ODT Control Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x81C++0x1F line.long 0x00 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" bitfld.long 0x00 28.--30. " RD_DQ7_DEL ,Read dqs0 to dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 24.--26. " RD_DQ6_DEL ,Read dqs0 to dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 20.--22. " RD_DQ5_DEL ,Read dqs0 to dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 16.--18. " RD_DQ4_DEL ,Read dqs0 to dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 12.--14. " RD_DQ3_DEL ,Read dqs0 to dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 8.--10. " RD_DQ2_DEL ,Read dqs0 to dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x00 4.--6. " RD_DQ1_DEL ,Read dqs0 to dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x00 0.--2. " RD_DQ0_DEL ,Read dqs0 to dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x04 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" bitfld.long 0x04 28.--30. " RD_DQ15_DEL ,Read dqs1 to dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 24.--26. " RD_DQ14_DEL ,Read dqs1 to dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 20.--22. " RD_DQ13_DEL ,Read dqs1 to dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 16.--18. " RD_DQ12_DEL ,Read dqs1 to dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 12.--14. " RD_DQ11_DEL ,Read dqs1 to dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 8.--10. " RD_DQ10_DEL ,Read dqs1 to dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x04 4.--6. " RD_DQ9_DEL ,Read dqs1 to dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x04 0.--2. " RD_DQ8_DEL ,Read dqs1 to dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x08 "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" bitfld.long 0x08 28.--30. " RD_DQ23_DEL ,Read dqs2 to dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 24.--26. " RD_DQ22_DEL ,Read dqs2 to dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 20.--22. " RD_DQ21_DEL ,Read dqs2 to dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 16.--18. " RD_DQ20_DEL ,Read dqs2 to dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 12.--14. " RD_DQ19_DEL ,Read dqs2 to dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 8.--10. " RD_DQ18_DEL ,Read dqs2 to dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x08 4.--6. " RD_DQ17_DEL ,Read dqs2 to dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x08 0.--2. " RD_DQ16_DEL ,Read dqs2 to dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x0C "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" bitfld.long 0x0C 28.--30. " RD_DQ31_DEL ,Read dqs3 to dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 24.--26. " RD_DQ30_DEL ,Read dqs3 to dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 20.--22. " RD_DQ29_DEL ,Read dqs3 to dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 16.--18. " RD_DQ28_DEL ,Read dqs3 to dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 12.--14. " RD_DQ27_DEL ,Read dqs3 to dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 8.--10. " RD_DQ26_DEL ,Read dqs3 to dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" textline " " bitfld.long 0x0C 4.--6. " RD_DQ25_DEL ,Read dqs3 to dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" bitfld.long 0x0C 0.--2. " RD_DQ24_DEL ,Read dqs3 to dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays,4 delays,5 delays,6 delays,7 delays" line.long 0x10 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" bitfld.long 0x10 30.--31. " WR_DM0_DEL ,Write dm0 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 28.--29. " WR_DQ7_DEL ,Write dq7 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 24.--25. " WR_DQ6_DEL ,Write dq6 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 20.--21. " WR_DQ5_DEL ,Write dq5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 16.--17. " WR_DQ4_DEL ,Write dq4 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 12.--13. " WR_DQ3_DEL ,Write dq3 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x10 8.--9. " WR_DQ2_DEL ,Write dq2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 4.--5. " WR_DQ1_DEL ,Write dq1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x10 0.--1. " WR_DQ0_DEL ,Write dq0 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x14 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" bitfld.long 0x14 30.--31. " WR_DM1_DEL ,Write dm1 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 28.--29. " WR_DQ15_DEL ,Write dq15 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 24.--25. " WR_DQ14_DEL ,Write dq14 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 20.--21. " WR_DQ13_DEL ,Write dq13 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 16.--17. " WR_DQ12_DEL ,Write dq12 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 12.--13. " WR_D11_DEL ,Write dq11 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x14 8.--9. " WR_DQ10_DEL ,Write dq10 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 4.--5. " WR_DQ9_DEL ,Write dq9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x14 0.--1. " WR_DQ8_DEL ,Write dq8 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x18 "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" bitfld.long 0x18 30.--31. " WR_DM2_DEL ,Write dm2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 28.--29. " WR_DQ23_DEL ,Write dq23 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 24.--25. " WR_DQ22_DEL ,Write dq22 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 20.--21. " WR_DQ21_DEL ,Write dq21 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 16.--17. " WR_DQ20_DEL ,Write dq20 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 12.--13. " WR_D19_DEL ,Write dq19 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x18 8.--9. " WR_DQ18_DEL ,Write dq18 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 4.--5. " WR_DQ17_DEL ,Write dq17 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x18 0.--1. " WR_DQ16_DEL ,Write dq16 delay fine tuning" "No change,1 delay,2 delays,3 delays" line.long 0x1C "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" bitfld.long 0x1C 30.--31. " WR_DM3_DEL ,Write dm3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 28.--29. " WR_DQ31_DEL ,Write dq31 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 24.--25. " WR_DQ30_DEL ,Write dq30 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 20.--21. " WR_DQ29_DEL ,Write dq29 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 16.--17. " WR_DQ28_DEL ,Write dq28 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 12.--13. " WR_D27_DEL ,Write dq27 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x1C 8.--9. " WR_DQ26_DEL ,Write dq26 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 4.--5. " WR_DQ25_DEL ,Write dq25 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x1C 0.--1. " WR_DQ24_DEL ,Write dq24 delay fine tuning" "No change,1 delay,2 delays,3 delays" else hgroup.long (0x81C)++0x1F hide.long 0x00 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register" hide.long 0x04 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register" hide.long 0x08 "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register" hide.long 0x0C "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register" hide.long 0x10 "MPWRDQBY0DL,MMDC PHY Write DQ Byte0 Delay Register" hide.long 0x14 "MPWRDQBY1DL,MMDC PHY Write DQ Byte1 Delay Register" hide.long 0x18 "MPWRDQBY2DL, MMDC PHY Write DQ Byte2 Delay Register" hide.long 0x1C "MPWRDQBY3DL, MMDC PHY Write DQ Byte3 Delay Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x83C++0x07 line.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" bitfld.long 0x00 31. " RST_RD_FIFO ,Reset Read Data FIFO & pointers" "No reset,Reset" bitfld.long 0x00 30. " DG_CMP_CYC ,Read DQS gating sample cycle" "16 cycles,32 cycles" bitfld.long 0x00 29. " DG_DIS ,Read DQS gating disable" "No,Yes" textline " " bitfld.long 0x00 28. " HW_DG_EN ,Enable automatic read DQS gating calibration" "Disabled,Enabled" bitfld.long 0x00 24.--27. " DG_HC_DEL1 ,Read Dqs1 gating half cycles delay" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." bitfld.long 0x00 23. " DG_EXT_UP ,DG extend upper boundary" "Not extended,Extended" textline " " hexmask.long.byte 0x00 16.--22. 1. " DG_DL_ABS_OFFSET1 ,Absolute delay offset" rbitfld.long 0x00 12. " HW_DG_ERR ,HW DQS gating error" "No error,Error" bitfld.long 0x00 8.--11. " DG_HC_DEL0 ,Read DQS0 gating half cycles delay" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_ABS_OFFSET0 ,Absolute read DQS gating delay offset" line.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" bitfld.long 0x04 24.--27. " DG_HC_DEL3 ,Read DQS3 gating half cycles delay" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." hexmask.long.byte 0x04 16.--22. 1. " DG_DL_ABS_OFFSET3 ,Absolute read DQS gating delay offset" bitfld.long 0x04 8.--11. " DG_HC_DEL2 ,Read DQS2 gating half cycles delay" "0,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,?..." textline " " hexmask.long.byte 0x04 0.--6. 1. " DG_DL_ABS_OFFSET2 ,Absolute read DQS gating delay offset" else hgroup.long 0x83C++0x07 hide.long 0x00 "MPDGCTRL0,MMDC PHY Read DQS gating control register 0" hide.long 0x04 "MPDGCTRL1,MMDC PHY Read DQS gating control register 1" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x844++0x03 line.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " DG_DL_UNIT_NUM3 ,Number of delay units that is actually used by DQS gating delay line 3" hexmask.long.byte 0x00 16.--22. 1. " DG_DL_UNIT_NUM2 ,Number of delay units that is actually used by DQS gating delay line 2" hexmask.long.byte 0x00 8.--14. 1. " DG_DL_UNIT_NUM1 ,Number of delay units that is actually used by DQS gating delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " DG_DL_UNIT_NUM0 ,Number of delay units that is actually used by DQS gating delay line 0" else hgroup.long 0x844++0x03 hide.long 0x00 "MPDGDLST0,MMDC PHY Read DQS gating Delay Line Status Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x848++0x03 line.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_ABS_OFFSET3 ,Absolute read delay offset byte 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_ABS_OFFSET2 ,Absolute read delay offset byte 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_ABS_OFFSET1 ,Absolute read delay offset byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_ABS_OFFSET0 ,Absolute read delay offset byte 0" else hgroup.long 0x848++0x03 hide.long 0x00 "MPRDDLCTL,MMDC PHY Read Delay Lines Configuration Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x84C++0x03 line.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " RD_DL_UNIT_NUM3 ,Number of delay units that is actually used by read delay line 3" hexmask.long.byte 0x00 16.--22. 1. " RD_DL_UNIT_NUM2 ,Number of delay units that is actually used by read delay line 2" hexmask.long.byte 0x00 8.--14. 1. " RD_DL_UNIT_NUM1 ,Number of delay units that is actually used by read delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " RD_DL_UNIT_NUM0 ,Number of delay units that is actually used by read delay line 0" group.long 0x850++0x03 line.long 0x00 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_ABS_OFFSET3 ,Absolute write delay offset for Byte 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_ABS_OFFSET2 ,Absolute write delay offset for Byte 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_ABS_OFFSET1 ,Absolute write delay offset for Byte 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_ABS_OFFSET0 ,Absolute write delay offset for Byte 0" rgroup.long 0x854++0x03 line.long 0x00 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " WR_DL_UNIT_NUM3 ,Number of delay units that is actually used by write delay line 3" hexmask.long.byte 0x00 16.--22. 1. " WR_DL_UNIT_NUM2 ,Number of delay units that is actually used by write delay line 2" hexmask.long.byte 0x00 8.--14. 1. " WR_DL_UNIT_NUM1 ,Number of delay units that is actually used by write delay line 1" textline " " hexmask.long.byte 0x00 0.--6. 1. " WR_DL_UNIT_NUM0 ,Number of delay units that is actually used by write delay line 0" else hgroup.long 0x84C++0x0B hide.long 0x00 "MPRDDLST0,MMDC PHY Read Delay Lines Status Register 0" hide.long 0x04 "MPWRDLCTL0,MMDC PHY Write Delay Lines Configuration Register 0" hide.long 0x08 "MPWRDLST0,MMDC PHY Write Delay Lines Status Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x858++0x03 line.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" bitfld.long 0x00 8.--9. " SDCLK_DEL ,SDCLK0 delay fine tuning" "No change,1 delay,2 delays,3 delays" else hgroup.long 0x858++0x03 hide.long 0x00 "MPSDCTRL,MMDC PHY CK control Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x85C++0x03 line.long 0x00 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" hexmask.long.byte 0x00 24.--30. 1. " ZQ_LP2_HW_ZQCS ,Period in cycles that it takes the memory device to perform a Short ZQ calibration" hexmask.long.byte 0x00 16.--23. 1. " ZQ_LP2_HW_ZQCL ,Period in cycles that it takes the memory device to perform a Long ZQ calibration" hexmask.long.word 0x00 0.--8. 1. " ZQ_LP2_HW_ZQINIT ,Period in cycles that it takes the memory device to perform a Init ZQ calibration" else hgroup.long 0x85C++0x03 hide.long 0x00 "MPZQLP2CTL,MMDC PHY ZQ LPDDR2 HW Control Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x860++0x07 line.long 0x00 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" bitfld.long 0x00 5. " HW_RDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x00 4. " HW_RDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x00 3. " HW_RDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x00 2. " HW_RDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x00 1. " HW_RDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x00 0. " HW_RDL_ERR0 ,HW RD DL0 error" "No error,Error" line.long 0x04 "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" bitfld.long 0x04 5. " HW_WDL_CMP_CYC ,HW RD DL sample cycle" "Not compared,Compared" bitfld.long 0x04 4. " HW_WDL_EN ,Enable HW RD DL calibration" "Disabled,Enabled" rbitfld.long 0x04 3. " HW_WDL_ERR3 ,HW RD DL3 error" "No error,Error" textline " " rbitfld.long 0x04 2. " HW_WDL_ERR2 ,HW RD DL2 error" "No error,Error" rbitfld.long 0x04 1. " HW_WDL_ERR1 ,HW RD DL1 error" "No error,Error" rbitfld.long 0x04 0. " HW_WDL_ERR0 ,HW RD DL0 error" "No error,Error" else hgroup.long 0x860++0x07 hide.long 0x00 "MPRDDLHWCTL0,MMDC PHY Read Delay HW Calibration Control Register 0" hide.long 0x04 "MPWRDLHWCTL0,MMDC PHY Write Delay HW Calibration Control Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x868++0x13 line.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hexmask.long.byte 0x00 24.--30. 1. " HW_RD_DL_UP1 ,HW RD DL1 upper boundary" hexmask.long.byte 0x00 16.--22. 1. " HW_RD_DL_LOW1 ,HW RD DL1 lower boundary" hexmask.long.byte 0x00 8.--14. 1. " HW_RD_DL_UP0 ,HW RD DL0 upper boundary" textline " " hexmask.long.byte 0x00 0.--6. 1. " HW_RD_DL_LOW0 ,HW RD DL0 lower boundary" line.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hexmask.long.byte 0x04 24.--30. 1. " HW_RD_DL_UP3 ,HW RD DL3 upper boundary" hexmask.long.byte 0x04 16.--22. 1. " HW_RD_DL_LOW3 ,HW RD DL3 lower boundary" hexmask.long.byte 0x04 8.--14. 1. " HW_RD_DL_UP2 ,HW RD DL2 upper boundary" textline " " hexmask.long.byte 0x04 0.--6. 1. " HW_RD_DL_LOW2 ,HW RD DL2 lower boundary" line.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hexmask.long.byte 0x08 24.--30. 1. " HW_WR_DL_UP1 ,HW WR DL1 upper boundary" hexmask.long.byte 0x08 16.--22. 1. " HW_WR_DL_LOW1 ,HW WR DL1 lower boundary" hexmask.long.byte 0x08 8.--14. 1. " HW_WR_DL_UP0 ,HW WR DL0 upper boundary" textline " " hexmask.long.byte 0x08 0.--6. 1. " HW_WR_DL_LOW0 ,HW WR DL0 lower boundary" line.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hexmask.long.byte 0x0C 24.--30. 1. " HW_WR_DL_UP3 ,HW WR DL3 upper boundary" hexmask.long.byte 0x0C 16.--22. 1. " HW_WR_DL_LOW3 ,HW WR DL3 lower boundary" hexmask.long.byte 0x0C 8.--14. 1. " HW_WR_DL_UP2 ,HW WR DL2 upper boundary" textline " " hexmask.long.byte 0x0C 0.--6. 1. " HW_WR_DL_LOW2 ,HW WR DL2 lower boundary" line.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" hexmask.long.byte 0x10 24.--31. 1. " HW_WL3_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 16.--23. 1. " HW_WL2_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" hexmask.long.byte 0x10 8.--15. 1. " HW_WL1_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" textline " " hexmask.long.byte 0x10 0.--7. 1. " HW_WL0_DQ ,Holds the DQ results for all the 8 configurable hw wl delays" else hgroup.long 0x868++0x13 hide.long 0x00 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0" hide.long 0x04 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1" hide.long 0x08 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0" hide.long 0x0C "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1" hide.long 0x10 "MPWLHWERR0,MMDC PHY Write Leveling HW Error Register 0" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x87C++0x0F line.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hexmask.long.word 0x00 16.--26. 1. " HW_DG_UP0 ,HW DG0 upper boundary" hexmask.long.word 0x00 0.--10. 1. " HW_DG_LOW0 ,HW DG0 lower boundary" line.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hexmask.long.word 0x04 16.--26. 1. " HW_DG_UP1 ,HW DG1 upper boundary" hexmask.long.word 0x04 0.--10. 1. " HW_DG_LOW1 ,HW DG1 lower boundary" line.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hexmask.long.word 0x08 16.--26. 1. " HW_DG_UP2 ,HW DG2 upper boundary" hexmask.long.word 0x08 0.--10. 1. " HW_DG_LOW2 ,HW DG2 lower boundary" line.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" hexmask.long.word 0x0C 16.--26. 1. " HW_DG_UP3 ,HW DG3 upper boundary" hexmask.long.word 0x0C 0.--10. 1. " HW_DG_LOW3 ,HW DG3 lower boundary" else hgroup.long 0x87C++0x0F hide.long 0x00 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0" hide.long 0x04 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1" hide.long 0x08 "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2" hide.long 0x0C "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x88C++0x07 line.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hexmask.long.word 0x00 16.--31. 1. " PDV2 ,Pre defined compare value2" hexmask.long.word 0x00 0.--15. 1. " PDV1 ,Pre defined compare value2" line.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" bitfld.long 0x04 2. " READ_LEVEL_PATTERN ,DQ calibration calibration Read level pattern" "1010,?..." textline " " bitfld.long 0x04 1. " MPR_FULL_CMP ,DQ calibration full compare enable" "Disabled,Enabled" bitfld.long 0x04 0. " MPR_CMP ,DQ calibration compare enable" "Disabled,Enabled" else hgroup.long 0x88C++0x07 hide.long 0x00 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1" hide.long 0x04 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA Delay Line Configuration Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) group.long 0x894++0x03 line.long 0x00 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" rbitfld.long 0x00 5. " SW_DUM_CMP3 ,SW dummy read byte3 compare results" "Failed,Passed" rbitfld.long 0x00 4. " SW_DUM_CMP2 ,SW dummy read byte2 compare results" "Failed,Passed" rbitfld.long 0x00 3. " SW_DUM_CMP1 ,SW dummy read byte1 compare results" "Failed,Passed" textline " " rbitfld.long 0x00 2. " SW_DUM_CMP0 ,SW dummy read byte0 compare results" "Failed,Passed" bitfld.long 0x00 1. " SW_DUMMY_RD ,SW dummy read" "Not generated,Generated" bitfld.long 0x00 0. " SW_DUMMY_WR ,SW dummy write" "Not generated,Generated" rgroup.long 0x898++0x1F line.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0" line.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" line.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" line.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" else hgroup.long 0x894++0x03 hide.long 0x00 "MPSWDAR0,MMDC PHY SW Dummy Access Register 0" hgroup.long 0x898++0x1F hide.long 0x00 "MPSWDRDR0,MMDC PHY SW Dummy Read Data LSB Register 0" hide.long 0x04 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1" hide.long 0x08 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2" hide.long 0x0C "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3" hide.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4" hide.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5" hide.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6" hide.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08) group.long 0x8B8++0x07 line.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hexmask.long.word 0x00 16.--25. 1. " MU_UNIT_DEL_NUM ,Measure unit measured number of unit delay per cycle" bitfld.long 0x00 11. " FRC_MSR ,Force measuement on delay-lines" "Not forced,Forced" bitfld.long 0x00 10. " MU_BYP_EN ,Measure unit bypass enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " MU_BYP_VAL ,Measure unit bypass value" line.long 0x04 "MPWRCADL,MMDC PHY Write CA Delay Control Register" bitfld.long 0x04 18.--19. " WR_CA9_DEL ,CA9 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 16.--17. " WR_CA8_DEL ,CA8 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 14.--15. " WR_CA7_DEL ,CA7 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 12.--13. " WR_CA6_DEL ,CA6 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 10.--11. " WR_CA5_DEL ,CA5 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 8.--9. " WR_CA4_DEL ,CA4 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 6.--7. " WR_CA3_DEL ,CA3 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 4.--5. " WR_CA2_DEL ,CA2 delay fine tuning" "No change,1 delay,2 delays,3 delays" bitfld.long 0x04 2.--3. " WR_CA1_DEL ,CA1 delay fine tuning" "No change,1 delay,2 delays,3 delays" textline " " bitfld.long 0x04 0.--1. " WR_CA0_DEL ,CA0 delay fine tuning" "No change,1 delay,2 delays,3 delays" else hgroup.long 0x8B8++0x07 hide.long 0x00 "MPMUR0,MMDC PHY Measure Unit Register for DQ0-3" hide.long 0x04 "MPWRCADL,MMDC PHY Write CA Delay Control Register" endif if (((per.l(ad:0x021B4000+0x18))&0x18)==0x08)||(((per.l(ad:0x021B4000+0x18))&0x18)==0x00) rgroup.long 0x8C0++0x03 line.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register" bitfld.long 0x00 28.--30. " RD_DQS3_FT_DCC ,Read dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 25.--27. " RD_DQS2_FT_DCC ,Read dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 22.--24. " RD_DQS1_FT_DCC ,Read dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 19.--21. " RD_DQS0_FT_DCC ,Read dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 16.--18. " CK_FT1_DCC ,Secondary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 12.--14. " CK_FT0_DCC ,Primary duty cycle fine tuning control of DDR clock" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 9.--11. " WR_DQS3_FT_DCC ,Write dqs3 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 6.--8. " WR_DQS2_FT_DCC ,Write dqs2 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." bitfld.long 0x00 3.--5. " WR_DQS1_FT_DCC ,Write dqs1 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." textline " " bitfld.long 0x00 0.--2. " WR_DQS0_FT_DCC ,Write dqs0 fine tune duty cycle control" ",48.5% low/51.5% high,50%,,51.5% low/48.5% high,?..." else hgroup.long 0x8C0++0x03 hide.long 0x00 "MPDCCR,MMDC PHY Duty Cycle Control Register for CK0 and DQS0-3" endif width 0x0B tree.end tree.end endif tree "OCOTP_CTRL (On-Chip OTP Controller)" base ad:0x021BC000 width 22. group.long 0x00++0x13 line.long 0x00 "OCOTP_CTRL,OTP Controller Control Register" hexmask.long.word 0x00 16.--31. 1. " WR_UNLOCK ,OTP write accesses enable [key: 0x3E77]" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 12. " CRC_FAIL ,Set by controller when CRC value != CRC fuse" "Equal,Not equal" bitfld.long 0x00 11. " CRC_TEST ,Set to calculate CRC" "Not set,Set" textline "" bitfld.long 0x00 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x00 9. " ERROR ,Accessing to locked region error" "No error,Error" else bitfld.long 0x00 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x00 9. " ERROR ,Accessing to locked region error" "No error,Error" endif textline " " rbitfld.long 0x00 8. " BUSY ,OTP controller status bit" "Not busy,Busy" hexmask.long.byte 0x00 0.--6. 1. " ADDR ,OTP write and read access address register" line.long 0x04 "OCOTP_CTRL_SET,OTP Controller Control Set Register" hexmask.long.word 0x04 16.--31. 1. " WR_UNLOCK ,OTP write accesses enable" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 12. " CRC_FAIL ,Set by controller when CRC value != CRC fuse" "Equal,Not equal" bitfld.long 0x00 11. " CRC_TEST ,Set to calculate CRC" "Not set,Set" textline "" bitfld.long 0x04 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x04 9. " ERROR ,Accessing to locked region error" "No error,Error" else bitfld.long 0x04 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x04 9. " ERROR ,Accessing to locked region error" "No error,Error" endif textline " " rbitfld.long 0x04 8. " BUSY ,OTP controller status bit" "Not effect,Set" hexmask.long.byte 0x04 0.--6. 1. " ADDR ,OTP write and read access address register" line.long 0x08 "OCOTP_CTRL_CLR,OTP Controller Control Clear Register" hexmask.long.word 0x08 16.--31. 1. " WR_UNLOCK ,OTP write accesses enable" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x08 12. " CRC_FAIL ,Set by controller when CRC value != CRC fuse" "Equal,Not equal" bitfld.long 0x00 11. " CRC_TEST ,Set to calculate CRC" "Not set,Set" textline "" bitfld.long 0x08 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x08 9. " ERROR ,Accessing to locked region error" "No error,Error" else bitfld.long 0x08 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x08 9. " ERROR ,Accessing to locked region error" "No error,Error" endif textline " " rbitfld.long 0x08 8. " BUSY ,OTP controller status bit" "No effect,Clear" hexmask.long.byte 0x08 0.--6. 1. " ADDR ,OTP write and read access address register" line.long 0x0c "OCOTP_CTRL_TOG,OTP Controller Control Toggle Register" hexmask.long.word 0x0C 16.--31. 1. " WR_UNLOCK ,OTP write accesses enable" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 12. " CRC_FAIL ,Set by controller when CRC value != CRC fuse" "Equal,Not equal" bitfld.long 0x00 11. " CRC_TEST ,Set to calculate CRC" "Not set,Set" textline "" bitfld.long 0x0C 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x0C 9. " ERROR ,Accessing to locked region error" "No error,Error" else bitfld.long 0x0C 10. " RELOAD_SHADOWS ,Re-loading the shadow registers" "Not forced,Forced" bitfld.long 0x0C 9. " ERROR ,Accessing to locked region error" "No error,Error" endif textline " " rbitfld.long 0x0C 8. " BUSY ,OTP controller status bit" "Not toggle,Toggle" hexmask.long.byte 0x0C 0.--6. 1. " ADDR ,OTP write and read access address register" line.long 0x10 "OCOTP_TIMING,OTP Controller Timing Register" bitfld.long 0x10 22.--27. " WAIT ,Time interval between auto read and write access in one time program" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 16.--21. " STROBE_READ ,Strobe period in one time read OTP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 12.--15. " RELAX ,Time to add to all default timing parameters other than the Tpgm and Trd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. " STROBE_PROG ,Strobe period in one time write OTP" group.long 0x20++0x03 line.long 0x00 "OCOTP_DATA,OTP Controller Write Data Register" group.long 0x30++0x03 line.long 0x00 "OCOTP_READ_CTRL,OTP Controller Write Data Register" bitfld.long 0x00 0. " READ_FUSE ,Initiate a read to OTP" "Not initiated,Initiated" group.long 0x40++0x03 line.long 0x00 "OCOTP_READ_FUSE_DATA,OTP Controller Read Data Register" group.long 0x50++0x03 line.long 0x00 "OCOTP_SW_STICKY,Sticky bit Register" bitfld.long 0x00 2. " FIELD_RETURN_LOCK ,Shadow register write and OTP write lock for FIELD_RETURN region" "Not locked,Locked" bitfld.long 0x00 1. " SRK_REVOKE_LOCK ,Shadow register write and OTP write lock for SRK_REVOKE/MC_ERA/AP_BI_VER region" "Not locked,Locked" textline " " group.long 0x60++0x0F line.long 0x00 "OCOTP_SCS,Software Controllable Signals Register" bitfld.long 0x00 31. " LOCK ,HW_OCOTP_SCS register lock" "Not locked,Locked" hexmask.long 0x00 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use" bitfld.long 0x00 0. " HAB_JDE ,HAB JTAG Debug Enable" "Disabled,Enabled" line.long 0x04 "OCOTP_SCS_SET,Software Controllable Signals Set Register" bitfld.long 0x04 31. " LOCK ,Lock set" "No effect,Set" hexmask.long 0x04 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use" bitfld.long 0x04 0. " HAB_JDE ,HAB JTAG Debug Enable Set" "No effect,Set" line.long 0x08 "OCOTP_SCS_CLR,Software Controllable Signals Clear Register" bitfld.long 0x08 31. " LOCK ,Lock clear" "No effect,Clear" hexmask.long 0x08 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use" bitfld.long 0x08 0. " HAB_JDE ,HAB JTAG Debug Enable Clear" "No effect,Clear" line.long 0x0C "OCOTP_SCS_TOG,Software Controllable Signals Toggle Register" bitfld.long 0x0C 31. " LOCK ,Lock toggle" "Not toggle,Toggle" hexmask.long 0x0C 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use" bitfld.long 0x0C 0. " HAB_JDE ,HAB JTAG Debug Enable Clear" "Not toggle,Toggle" sif (cpu()=="IMX6SOLOLITE") group.long 0x70++0x03 line.long 0x00 "OCOTP_CRC_ADDR,OTP Controller CRC test address" hexmask.long.byte 0x00 16.--18. 0x1 " CRC_ADDR ,Address of 32-bit CRC result for comparing" hexmask.long.byte 0x00 8.--15. 0x1 " DATA_END_ADDR ,Start address of fuse location for CRC calculation" hexmask.long.byte 0x00 0.--7. 0x1 " DATA_START_ADDR ,End address of fuse location for CRC calculation" group.long 0x80++0x03 line.long 0x00 "OCOTP_CRC_VALUE,OTP Controller CRC Value Register" group.long 0x90++0x03 line.long 0x00 "OCOTP_UMC_TIMING,OTP Controller Timing Register" hexmask.long.word 0x00 0.--11. 1. " STROBE_PROG_INT ,This count value specifies the strobe pulse interval in one time write OTP" rgroup.long 0xA0++0x03 line.long 0x00 "OCOTP_VERSION,OTP Controller Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-only value reflecting the MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-only value reflecting the MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-only value reflecting the stepping of the RTL version" else rgroup.long 0x90++0x03 line.long 0x00 "OCOTP_VERSION,OTP Controller Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-only value reflecting the MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-only value reflecting the MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-only value reflecting the stepping of the RTL version" endif textline " " sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x400++0x03 line.long 0x00 "OCOTP_LOCK,Value of OTP Bank0 Word0" bitfld.long 0x00 30.--31. " UNALLOCATED ,Value of un-used portion of LOCK word" "0,1,2,3" bitfld.long 0x00 29. " GP_HI_LOCK[1] ,Status of shadow register" "Not locked,Locked" bitfld.long 0x00 28. " GP_HI_LOCK[0] ,Status of OTP fuse word" "Not locked,Locked" textline " " bitfld.long 0x00 27. " GP_LO_LOCK[1] ,Status of shadow register" "Not locked,Locked" bitfld.long 0x00 26. " GP_LO_LOCK[0] ,Status of OTP fuse word" "Not locked,Locked" bitfld.long 0x00 25. " PIN ,Status of Pin access lock bit" "Not locked,Locked" textline " " bitfld.long 0x00 22. " MISC_CONF ,Status of shadow register/OTP write lock for sata_conf region" "Not locked,Locked" bitfld.long 0x00 19. " ANALOG[1] ,Status of lock for analog region's shadow register" "Not locked,Locked" bitfld.long 0x00 18. " ANALOG[0] ,Status of lock for analog region's OTP fuse word" "Not locked,Locked" textline " " bitfld.long 0x00 17. " DCP ,Status of shadow register read and write, OTP read and write lock for otpmk region" "Not locked,Locked" bitfld.long 0x00 16. " SW_GP ,Status of shadow register lock for the region contained in the SW_GP registers" "Not locked,Locked" bitfld.long 0x00 14. " SRK ,Status of shadow register/OTP write lock for srk region" "Not locked,Locked" textline " " bitfld.long 0x00 13. " GP2[1] ,Status of lock for gp2 region's shadow register" "Not locked,Locked" bitfld.long 0x00 12. " GP2[0] ,Status of lock for gp2 region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 11. " GP1[1] ,Status of lock for gp1 region's shadow register" "Not locked,Locked" textline " " bitfld.long 0x00 10. " GP1[0] ,Status of lock for gp1 region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 9. " MAC_ADDR[1] ,Status of lock for mac_addr region's shadow register" "Not locked,Locked" bitfld.long 0x00 8. " MAC_ADDR[0] ,Status of lock for mac_addr region's OTP fuse word" "Not locked,Locked" textline " " bitfld.long 0x00 6. " SJC_RESP ,Status of shadow register/OTP read and write lock for sjc_resp region" "Not locked,Locked" bitfld.long 0x00 5. " MEM_TRIM[1] ,Status of lock for mem_trim region's shadow register" "Not locked,Locked" bitfld.long 0x00 4. " MEM_TRIM[0] ,Status of lock for mem_trim region's OTP fuse word" "Not locked,Locked" textline " " bitfld.long 0x00 3. " BOOT_CFG[1] ,Status of lock for boot_cfg region's shadow register" "Not locked,Locked" bitfld.long 0x00 2. " BOOT_CFG[0] ,Status of lock for boot_cfg region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 1. " TESTER[1] ,Status of lock for tester region's shadow register" "Not locked,Locked" textline " " bitfld.long 0x00 0. " TESTER[0] ,Status of lock for tester region's OTP fuse word" "Not locked,Locked" else rgroup.long 0x400++0x03 line.long 0x00 "OCOTP_LOCK,Value of OTP Bank0 Word0" bitfld.long 0x00 30.--31. " UNALLOCATED ,Value of un-used portion of LOCK word" "0,1,2,3" bitfld.long 0x00 22. " MISC_CONF ,Status of shadow register/OTP write lock for sata_conf region" "Not locked,Locked" bitfld.long 0x00 19. " ANALOG[1] ,Status of lock for analog region's shadow register" "Not locked,Locked" textline " " bitfld.long 0x00 18. " ANALOG[0] ,Status of lock for analog region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 14. " SRK ,Status of shadow register/OTP write lock for srk region" "Not locked,Locked" bitfld.long 0x00 13. " GP2[1] ,Status of lock for gp2 region's shadow register" "Not locked,Locked" textline " " bitfld.long 0x00 12. " GP2[0] ,Status of lock for gp2 region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 11. " GP1[1] ,Status of lock for gp1 region's shadow register" "Not locked,Locked" bitfld.long 0x00 10. " GP1[0] ,Status of lock for gp1 region's OTP fuse word" "Not locked,Locked" textline " " bitfld.long 0x00 9. " MAC_ADDR[1] ,Status of lock for mac_addr region's shadow register" "Not locked,Locked" bitfld.long 0x00 8. " MAC_ADDR[0] ,Status of lock for mac_addr region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 6. " SJC_RESP ,Status of shadow register/OTP read and write lock for sjc_resp region" "Not locked,Locked" textline " " bitfld.long 0x00 5. " MEM_TRIM[1] ,Status of lock for mem_trim region's shadow register" "Not locked,Locked" bitfld.long 0x00 4. " MEM_TRIM[0] ,Status of lock for mem_trim region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 3. " BOOT_CFG[1] ,Status of lock for boot_cfg region's shadow register" "Not locked,Locked" textline " " bitfld.long 0x00 2. " BOOT_CFG[0] ,Status of lock for boot_cfg region's OTP fuse word" "Not locked,Locked" bitfld.long 0x00 1. " TESTER[1] ,Status of lock for tester region's shadow register" "Not locked,Locked" bitfld.long 0x00 0. " TESTER[0] ,Status of lock for tester region's OTP fuse word" "Not locked,Locked" endif group.long 0x410++0x03 line.long 0x00 "OCOTP_CFG0,Value of OTP Bank0 Word1" group.long 0x420++0x03 line.long 0x00 "OCOTP_CFG1,Value of OTP Bank0 Word2" group.long 0x430++0x03 line.long 0x00 "OCOTP_CFG2,Value of OTP Bank0 Word3" group.long 0x440++0x03 line.long 0x00 "OCOTP_CFG3,Value of OTP Bank0 Word4" group.long 0x450++0x03 line.long 0x00 "OCOTP_CFG4,Value of OTP Bank0 Word5" group.long 0x460++0x03 line.long 0x00 "OCOTP_CFG5,Value of OTP Bank0 Word6" group.long 0x470++0x03 line.long 0x00 "OCOTP_CFG6,Value of OTP Bank0 Word7" group.long 0x480++0x03 line.long 0x00 "OCOTP_MEM0,Value of OTP Bank1 Word0" group.long 0x490++0x03 line.long 0x00 "OCOTP_MEM1,Value of OTP Bank1 Word1" group.long 0x4A0++0x03 line.long 0x00 "OCOTP_MEM2,Value of OTP Bank1 Word2" group.long 0x4B0++0x03 line.long 0x00 "OCOTP_MEM3,Value of OTP Bank1 Word3" group.long 0x4C0++0x03 line.long 0x00 "OCOTP_MEM4,Value of OTP Bank1 Word4" group.long 0x4D0++0x03 line.long 0x00 "OCOTP_ANA0,Value of OTP Bank1 Word5" group.long 0x4E0++0x03 line.long 0x00 "OCOTP_ANA1,Value of OTP Bank1 Word6" group.long 0x4F0++0x03 line.long 0x00 "OCOTP_ANA2,Value of OTP Bank1 Word7" sif (cpu()=="IMX6SOLOLITE") group.long 0x500++0x03 line.long 0x00 "OCOTP_DCP0,Shadow Register for OTP Bank2 Word0" group.long 0x510++0x03 line.long 0x00 "OCOTP_DCP1,Shadow Register for OTP Bank2 Word1" group.long 0x520++0x03 line.long 0x00 "OCOTP_DCP2,Shadow Register for OTP Bank2 Word2" group.long 0x530++0x03 line.long 0x00 "OCOTP_DCP3,Shadow Register for OTP Bank2 Word3" group.long 0x540++0x03 line.long 0x00 "OCOTP_DCP4,Shadow Register for OTP Bank2 Word4" group.long 0x550++0x03 line.long 0x00 "OCOTP_DCP5,Shadow Register for OTP Bank2 Word5" group.long 0x560++0x03 line.long 0x00 "OCOTP_DCP6,Shadow Register for OTP Bank2 Word6" group.long 0x570++0x03 line.long 0x00 "OCOTP_DCP7,Shadow Register for OTP Bank2 Word7" endif group.long 0x580++0x03 line.long 0x00 "OCOTP_SRK0,Shadow Register for OTP Bank3 Word0" group.long 0x590++0x03 line.long 0x00 "OCOTP_SRK1,Shadow Register for OTP Bank3 Word1" group.long 0x5A0++0x03 line.long 0x00 "OCOTP_SRK2,Shadow Register for OTP Bank3 Word2" group.long 0x5B0++0x03 line.long 0x00 "OCOTP_SRK3,Shadow Register for OTP Bank3 Word3" group.long 0x5C0++0x03 line.long 0x00 "OCOTP_SRK4,Shadow Register for OTP Bank3 Word4" group.long 0x5D0++0x03 line.long 0x00 "OCOTP_SRK5,Shadow Register for OTP Bank3 Word5" group.long 0x5E0++0x03 line.long 0x00 "OCOTP_SRK6,Shadow Register for OTP Bank3 Word6" group.long 0x5F0++0x03 line.long 0x00 "OCOTP_SRK7,Shadow Register for OTP Bank3 Word7" sif (cpu()!="IMX6SOLOLITE") group.long 0x600++0x03 line.long 0x00 "OCOTP_RESP0,Value of OTP Bank4 Word0" group.long 0x610++0x03 line.long 0x00 "OCOTP_HSJC_RESP1,Value of OTP Bank4 Word1" group.long 0x620++0x03 line.long 0x00 "OCOTP_MAC0,Value of OTP Bank4 Word2" group.long 0x630++0x03 line.long 0x00 "OCOTP_MAC1,Value of OTP Bank4 Word3" else group.long 0x600++0x03 line.long 0x00 "OCOTP_SJC_RESP0,Value of OTP Bank4 Word0" group.long 0x610++0x03 line.long 0x00 "OCOTP_SJC_RESP1,Value of OTP Bank4 Word1" group.long 0x620++0x03 line.long 0x00 "OCOTP_MAC0,Value of OTP Bank4 Word2" group.long 0x630++0x03 line.long 0x00 "OCOTP_MAC1,Value of OTP Bank4 Word3" group.long 0x640++0x03 line.long 0x00 "OCOTP_CRC0,Value of OTP Bank4 Word4" group.long 0x650++0x03 line.long 0x00 "OCOTP_CRC1,Value of OTP Bank4 Word5" endif group.long 0x660++0x03 line.long 0x00 "OCOTP_GP1,Value of OTP Bank4 Word6" group.long 0x670++0x03 line.long 0x00 "OCOTP_GP2,Value of OTP Bank4 Word7" sif (cpu()=="IMX6SOLOLITE") group.long 0x680++0x03 line.long 0x00 "OCOTP_SW_GP0,Value of OTP Bank5 Word0" group.long 0x690++0x03 line.long 0x00 "OCOTP_SW_GP1,Value of OTP Bank5 Word1" group.long 0x6A0++0x03 line.long 0x00 "OCOTP_SW_GP2,Value of OTP Bank5 Word2" group.long 0x6B0++0x03 line.long 0x00 "OCOTP_SW_GP3,Value of OTP Bank5 Word3" group.long 0x6C0++0x03 line.long 0x00 "OCOTP_SW_GP4,Value of OTP Bank5 Word4" group.long 0x6D0++0x03 line.long 0x00 "OCOTP_MISC_CONF,Value of OTP Bank5 Word5" group.long 0x6E0++0x03 line.long 0x00 "OCOTP_FIELD_RETURN,Value of OTP Bank5 Word6" group.long 0x6F0++0x03 line.long 0x00 "OCOTP_SRK_REVOKE,Value of OTP Bank5 Word7" group.long 0x700++0x03 line.long 0x00 "OCOTP_GP_LO0,Value of OTP Bank6 Word0" group.long 0x710++0x03 line.long 0x00 "OCOTP_GP_LO1,Value of OTP Bank6 Word1" group.long 0x720++0x03 line.long 0x00 "OCOTP_GP_LO2,Value of OTP Bank6 Word2" group.long 0x730++0x03 line.long 0x00 "OCOTP_GP_LO3,Value of OTP Bank6 Word3" group.long 0x740++0x03 line.long 0x00 "OCOTP_GP_LO4,Value of OTP Bank6 Word4" group.long 0x750++0x03 line.long 0x00 "OCOTP_GP_LO5,Value of OTP Bank6 Word5" group.long 0x760++0x03 line.long 0x00 "OCOTP_GP_LO6,Value of OTP Bank6 Word6" group.long 0x770++0x03 line.long 0x00 "OCOTP_GP_LO7,Value of OTP Bank6 Word7" group.long 0x780++0x03 line.long 0x00 "OCOTP_GP_HI0,Value of OTP Bank7 Word0" group.long 0x790++0x03 line.long 0x00 "OCOTP_GP_HI1,Value of OTP Bank7 Word1" group.long 0x7A0++0x03 line.long 0x00 "OCOTP_GP_HI2,Value of OTP Bank7 Word2" group.long 0x7B0++0x03 line.long 0x00 "OCOTP_GP_HI3,Value of OTP Bank7 Word3" group.long 0x7C0++0x03 line.long 0x00 "OCOTP_GP_HI4,Value of OTP Bank7 Word4" group.long 0x7D0++0x03 line.long 0x00 "OCOTP_GP_HI5,Value of OTP Bank7 Word5" group.long 0x7E0++0x03 line.long 0x00 "OCOTP_GP_HI6,Value of OTP Bank7 Word6" group.long 0x7F0++0x03 line.long 0x00 "OCOTP_GP_HI7,Value of OTP Bank7 Word7" else group.long 0x6D0++0x03 line.long 0x00 "OCOTP_MISC_CONF,Value of OTP Bank5 Word5" group.long 0x6E0++0x03 line.long 0x00 "OCOTP_FIELD_RETURN,Value of OTP Bank5 Word6" group.long 0x6F0++0x03 line.long 0x00 "OCOTP_SRK_REVOKE,Value of OTP Bank5 Word7" endif width 0x0B tree.end sif (cpu()!="IMX6SOLOLITE") tree.open "PCIe (PCI Express)" tree "PCIe CTRL Memory" base ad:0x01FFC000 width 17. hgroup.long 0x00++0x03 hide.long 0x00 "DEVICEID,Device ID and Vendor ID Register" if (((per.l(ad:0x020E0030))&0xF000)==0x0) group.long 0x04++0x03 line.long 0x00 "COMMAND,Command and Status Register" bitfld.long 0x00 31. " DPE ,Detected Parity Error" "No error,Error" bitfld.long 0x00 30. " SSE ,Signaled System Error" "No error,Error" bitfld.long 0x00 29. " RMA ,Received Master Abort" "Not received,Received" textline " " bitfld.long 0x00 28. " RTA ,Received Target Abort" "Not received,Received" bitfld.long 0x00 27. " STA ,Signaled Target Abort" "No,Yes" bitfld.long 0x00 24. " MDPE ,Master Data Parity Error" "No error,Error" textline " " bitfld.long 0x00 20. " CL ,Indicates presence of an extended capability item" ",Present" bitfld.long 0x00 19. " INTX_STATUS ,INTx Status" "0,1" bitfld.long 0x00 10. " INTX_AD ,INTx Assertion Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled" bitfld.long 0x00 6. " PER ,Parity Error Response" "Not occurred,Occurred" bitfld.long 0x00 2. " BME ,Bus Master Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSE ,Memory Space Enable" "Disabled,Enabled" bitfld.long 0x00 0. " I_OSE ,I/O Space Enable" "Disabled,Enabled" hgroup.long 0x08++0x03 hide.long 0x00 "REVID,Revision ID and Class Code Register" elif (((per.l(ad:0x020E0030))&0xF000)==0x2000) group.long 0x04++0x03 line.long 0x00 "COMMAND,Command and Status Register" bitfld.long 0x00 31. " SSE ,Signaled System Error" "No error,Error" bitfld.long 0x00 30. " DPE ,Detected Parity Error" "No error,Error" bitfld.long 0x00 29. " RMA ,Received Master Abort" "Not received,Received" textline " " bitfld.long 0x00 28. " RTA ,Received Target Abort" "Not received,Received" bitfld.long 0x00 27. " STA ,Signaled Target Abort" "No,Yes" bitfld.long 0x00 24. " MDPE ,Master Data Parity Error" "No error,Error" textline " " bitfld.long 0x00 20. " CL ,Indicates presence of an extended capability item" ",Present" bitfld.long 0x00 19. " INTX_STATUS ,INTx Status" "0,1" bitfld.long 0x00 10. " INTX_AD ,INTx Assertion Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled" bitfld.long 0x00 6. " PER ,Parity Error Response" "Not occurred,Occurred" bitfld.long 0x00 2. " BME ,Bus Master Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSE ,Memory Space Enable" "Disabled,Enabled" bitfld.long 0x00 0. " I_OSE ,I/O Space Enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "REVID,Revision ID and Class Code Register" hexmask.long.byte 0x00 24.--31. 1. " BCCN ,Base Class Code" hexmask.long.byte 0x00 16.--23. 1. " SCCN ,Subclass Code" hexmask.long.byte 0x00 8.--15. 1. " ICN ,Programming Interface" textline " " hexmask.long.byte 0x00 0.--7. 1. " CX_R_ID_N ,Revision ID" endif group.long 0x0C++0x03 line.long 0x00 "BIST,BIST Register" bitfld.long 0x00 23. " MFD ,Multi Function Device" "Single function,Multi-function" hexmask.long.byte 0x00 16.--22. 1. " CHF ,Configuration Header Format" hexmask.long.byte 0x00 0.--7. 1. " CLS ,Cache Line Size" if (((per.l(ad:0x020E0030))&0xF000)==0x0) rgroup.long 0x10++0x03 line.long 0x00 "BAR0,Base Address 0" hexmask.long 0x00 4.--31. 0x10 " ADDRESS ,BAR 0 base address bits" bitfld.long 0x00 3. " PREF ,Prefetchable" "Non-prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " TYPE ,Type of BAR" "32-bit BAR,,64-bit BAR,?..." textline " " bitfld.long 0x00 0. " MEM_I_O ,BAR function" "Memory BAR,I/O BAR" rgroup.long 0x10++0x03 line.long 0x00 "MASK0,BAR 0 Mask Register" hexmask.long 0x00 1.--31. 1. " MASK ,BAR 0x10 mask" bitfld.long 0x00 0. " ENABLE ,BAR 0x10 Enable" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "MASK1,BAR 1 Mask Register" rgroup.long 0x18++0x03 line.long 0x00 "MASK2,BAR 2 Mask Register" hexmask.long 0x00 1.--31. 1. " BAR2_MASK_N ,BAR 0x18 mask" bitfld.long 0x00 0. " BAR2_ENABLED_N ,BAR 0x18 Enable" "Disabled,Enabled" rgroup.long 0x1C++0x03 line.long 0x00 "MASK3,BAR 3 Mask Register" elif (((per.l(ad:0x020E0030))&0xF000)==0x2000) rgroup.long 0x10++0x03 line.long 0x00 "BAR0,Base Address 0" hexmask.long 0x00 4.--31. 0x10 " ADDRESS ,BAR $2 base address bits" bitfld.long 0x00 3. " PREF ,Prefetchable" "Non-prefetchable,Prefetchable" bitfld.long 0x00 1.--2. " TYPE ,Type of BAR" "32-bit BAR,,64-bit BAR,?..." textline " " bitfld.long 0x00 0. " MEM_I_O ,BAR function" "Memory BAR,I/O BAR" rgroup.long 0x14++0x03 line.long 0x00 "BAR1,Base Address 1" endif if (((per.l(ad:0x020E0030))&0xF000)==0x2000) rgroup.long 0x18++0x03 line.long 0x00 "BNR,Bus Number Registers" hexmask.long.byte 0x00 24.--31. 1. " SLT ,Secondary latency timer" hexmask.long.byte 0x00 16.--23. 1. " SUB_BN ,Subordinate bus number" hexmask.long.byte 0x00 8.--15. 1. " SE_BN ,Secondary bus number" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_BN ,Primary bus number" group.long 0x1C++0x0B line.long 0x00 "IOBLSSR,I/O Base Limit Secondary Status Register" eventfld.long 0x00 31. " DPERR ,Parity Error" "Not detected,Detected" eventfld.long 0x00 30. " RXSERR ,System Error" "Not received,Received" eventfld.long 0x00 29. " RXMA ,Master Abort" "Not received,Received" textline " " eventfld.long 0x00 28. " RXTA ,Target Abort" "Not received,Received" eventfld.long 0x00 27. " STA ,Target Abort" "Not signaled,Signaled" eventfld.long 0x00 24. " MDPERR ,Master Data Parity Error" "No error,Error" textline " " bitfld.long 0x00 12.--15. " IO_SL ,I/O Space Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " IO_SB ,I/O Space Base" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MEM_BLR,Memory Base and Memory Limit Register" hexmask.long.byte 0x04 24.--31. 1. " MLADD ,Memory Limit Address" hexmask.long.byte 0x04 8.--15. 1. " MBADD ,Memory Base Address" line.long 0x08 "PREF_MEM_BLR,Prefetchable Memory Base and Limit Register" hexmask.long.word 0x08 20.--31. 1. " U12_E_ADD ,Upper 12 bits of 32-bit Prefetchable Memory End Address" hexmask.long.word 0x08 4.--15. 1. " U12_S_ADD ,Upper 12 bits of 32-bit Prefetchable Memory Start Address" endif if (((per.l(ad:0x020E0030))&0xF000)==0x0) rgroup.long 0x28++0x07 line.long 0x00 "CISP,CardBus CIS Pointer Register" line.long 0x04 "SSID,Subsystem ID and Subsystem Vendor ID Register" hexmask.long.word 0x04 16.--31. 1. " S_DEV_ID_N ,Subsystem ID" hexmask.long.word 0x04 0.--15. 1. " S_V_ID_N ,Subsystem Vendor ID" elif (((per.l(ad:0x020E0030))&0xF000)==0x2000) group.long 0x28++0x07 line.long 0x00 "PREF_BASE_U32,Prefetchable Base Upper 32 Bits Register" line.long 0x04 "PREF_LIM_U32,Prefetchable Limit Upper 32 Bits Register" endif if (((per.l(ad:0x020E0030))&0xF000)==0x0) group.long 0x30++0x03 line.long 0x00 "EROMBAR,Expansion ROM Base Address Register" hexmask.long.tbyte 0x00 11.--31. 0x8 " ADDRESS ,Expansion ROM Address" bitfld.long 0x00 0. " ENABLE ,Expansion ROM Enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "EROMMASK,Expansion ROM BAR Mask Register" hexmask.long 0x00 1.--31. 1. " ROM_MASK ,Indicates which Expansion ROM BAR bits to mask" bitfld.long 0x00 0. " ROM_BAR_E ,Expansion ROM BAR Enable" "Disabled,Enabled" elif (((per.l(ad:0x020E0030))&0xF000)==0x2000) group.long 0x30++0x03 line.long 0x00 "IO_BASE_LIM_U16,I/O Base and Limit Upper 16 Bits Register" hexmask.long.word 0x00 16.--31. 1. " U16_IO_LIM ,Upper 16 Bits of I/O Limit" hexmask.long.word 0x00 0.--15. 1. " U16_IO_BASE ,Upper 16 Bits of I/O Base" endif rgroup.long 0x34++0x03 line.long 0x00 "CAPPR,Capability Pointer Register" hexmask.long.byte 0x00 0.--7. 1. " CFG_NEXT_PTR ,First Capability Pointer" if (((per.l(ad:0x020E0030))&0xF000)==0x0) group.long 0x3C++0x03 line.long 0x00 "ILR,Interrupt Line and Pin Register" hexmask.long.byte 0x00 8.--15. 1. " INT_PIN_MAPPING_N ,Interrupt Pin" hexmask.long.byte 0x00 0.--7. 1. " INTERRUPT_LINE ,Interrupt Line" endif if (((per.l(ad:0x020E0030))&0xF000)==0x2000) group.long 0x38++0x03 line.long 0x00 "EROMBAR,Expansion ROM Base Address Register" hexmask.long.tbyte 0x00 11.--31. 0x8 " ADDRESS ,Expansion ROM Address" bitfld.long 0x00 0. " ENABLE ,Expansion ROM Enable" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "EROMMASK,Expansion ROM BAR Mask Register" hexmask.long 0x00 1.--31. 1. " ROM_MASK ,Indicates which Expansion ROM BAR bits to mask" bitfld.long 0x00 0. " ROM_BAR_E ,Expansion ROM BAR Enable" "Disabled,Enabled" endif if (((per.l(ad:0x020E0030))&0xF000)==0x2000) rgroup.long 0x40++0x03 line.long 0x00 "PMCR,Power Management Capability Register" bitfld.long 0x00 31. " PME_SUPPORT[4] ,PME_Support - D0 capable of generate PME message" "Not supported,Supported" bitfld.long 0x00 30. " PME_SUPPORT[3] ,PME_Support - D1 capable of generate PME message" "Not supported,Supported" bitfld.long 0x00 29. " PME_SUPPORT[2] ,PME_Support - D2 capable of generate PME message" "Not supported,Supported" textline " " bitfld.long 0x00 28. " PME_SUPPORT[1] ,PME_Support - D3_hot capable of generate PME message" "Not supported,Supported" bitfld.long 0x00 27. " PME_SUPPORT[0] ,PME_Support - D3_cold capable of generate PME message" "Not supported,Supported" textline " " bitfld.long 0x00 26. " D2_SUPPORT ,D2 Support" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,D1 Support" "Not supported,Supported" textline " " bitfld.long 0x00 22.--24. " AUX_CURRENT ,AUX Current" "0,1,2,3,4,5,6,7" bitfld.long 0x00 21. " DSI ,Device Specific Initialization" "Disabled,Enabled" bitfld.long 0x00 19. " PME_CLOCK ,PME Clock" "0,?..." textline " " bitfld.long 0x00 16.--18. " PMSV ,Power Management specification version" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next Capability Pointer" hexmask.long.byte 0x00 0.--7. 1. " PMCID ,Power Management Capability ID" group.long 0x44++0x03 line.long 0x00 "PMCSR,Power Management Control and Status Register" bitfld.long 0x00 23. " BPCCE ,Bus Power/Clock Control Enable" "Disabled,Enabled" bitfld.long 0x00 22. " B2_B3_SUPPORT ,B2/B3 Support" "Not supported,?..." bitfld.long 0x00 15. " PME_STATUS ,Indicates if a previously enabled PME event occurred or not" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " PME_EN ,Indicates that the device is enabled to generate PME" "Disabled,Enabled" bitfld.long 0x00 3. " NSR ,No Soft Reset" "Yes,No" bitfld.long 0x00 0.--1. " PS ,Power State" "D0,D1,D2,D3" rgroup.long 0x70++0x03 line.long 0x00 "CIDR,PCI Express Capability ID Register" bitfld.long 0x00 25.--29. " IMN ,Interrupt Message Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " SI ,Slot Implemented" "Not implemented,Implemented" bitfld.long 0x00 20.--23. " DPT ,Device/Port Type" ",,,,Root Port,?..." textline " " bitfld.long 0x00 16.--19. " PCI_ECV ,PCI Express Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next Capability Pointer" hexmask.long.byte 0x00 0.--7. 1. " PCI_ECID ,PCI Express Capability ID" group.long 0x74++0x07 line.long 0x00 "DCR,Device Capabilities Register" bitfld.long 0x00 26.--27. " CSPLS ,Captured Slot Power Limit Scale" "0,1,2,3" hexmask.long.byte 0x00 18.--25. 1. " CSPLV ,Captured Slot Power Limit Value" bitfld.long 0x00 15. " R-BER ,Role-Based Error Reporting" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--11. " EL1SLAL ,Endpoint L1 Acceptable Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. " EL0SAL ,Endpoint L0s Acceptable Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " ETFS ,Extended Tag Field Supported" "Not supported,Supported" textline " " bitfld.long 0x00 3.--4. " PFS ,Phantom Function Supported" "0,1,2,3" bitfld.long 0x00 0.--2. " MPSS ,Max_Payload_Size Supported" "0,1,2,3,4,5,6,7" line.long 0x04 "DCONR,Device Control Register" bitfld.long 0x04 21. " TP ,Transaction Pending" "Disabled,?..." bitfld.long 0x04 20. " APD ,Aux Power Detected" "Not detected,Detected" bitfld.long 0x04 19. " URD ,Unsupported Request Detected" "Not detected,Detected" textline " " bitfld.long 0x04 18. " FED ,Fatal Error Detected" "Not detected,Detected" bitfld.long 0x04 17. " NFED ,Non-Fatal Error detected" "Not detected,Detected" bitfld.long 0x04 16. " CED ,Correctable Error Detected" "Not detected,Detected" textline " " bitfld.long 0x04 12.--14. " MRRS ,Max_Read_Request_Size" "0,1,3,3,4,5,6,7" bitfld.long 0x04 11. " ENS ,Enable No Snoop" "Disabled,Enabled" bitfld.long 0x04 10. " APPME ,AUX Power PM Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " PFE ,Phantom Function Enable" "Disabled,Enabled" bitfld.long 0x04 8. " ETFE ,Extended Tag Field Enable" "Disabled,Enabled" bitfld.long 0x04 5.--7. " MPS ,Max_Payload_Size" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4. " ERO ,Enable Relaxed Ordering" "Disabled,Enabled" bitfld.long 0x04 3. " URRE ,Unsupported Request Reporting Enable" "Disabled,Enabled" bitfld.long 0x04 2. " FERE ,Fatal Error Reporting Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " NFERE ,Non-Fatal Error Reporting Enable" "Disabled,Enabled" bitfld.long 0x04 0. " CERE ,Correctable Error Reporting Enable" "Disabled,Enabled" rgroup.long 0x7C++0x03 line.long 0x00 "LCR,Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PN ,Port Number" bitfld.long 0x00 21. " LBNC ,Link Bandwidth Notification Capability" "Not capable,Capable" bitfld.long 0x00 20. " DLLARC ,Data Link Layer Active Reporting Capable" "Not capable,Capable" textline " " bitfld.long 0x00 18. " CPM ,Clock Power Management" "No,Yes" bitfld.long 0x00 15.--17. " L1EL ,L1 Exit Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " LEL ,L0s Exit Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 10.--11. " ASLPMS ,Active State Link PM Support" "0,1,2,3" bitfld.long 0x00 4.--9. " MLW ,Maximum Link Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--3. " MLS ,Max Link Speeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x80++0x03 line.long 0x00 "LCSR,Link Control and Status Register " bitfld.long 0x00 31. " LABS ,Link Autonomous Bandwidth Status" "Not autonomous,Autonomous" bitfld.long 0x00 30. " LBMS ,Link Bandwidth Management Status" "Not occurred,Occurred" bitfld.long 0x00 29. " DLLA ,Data Link Layer Active" "Not active,Active" textline " " bitfld.long 0x00 28. " SCC ,Slot Clock Configuration" "Not used,Used the same clock" bitfld.long 0x00 27. " LT ,Link Training" "Not trained,Trained" hexmask.long.byte 0x00 20.--25. 1. " NLW ,Negotiated Link Width" textline " " bitfld.long 0x00 16.--19. " LS ,Link Speed" ",Gen1 2.5 GT/s,Gen2 5.0 GT/s,?..." bitfld.long 0x00 11. " LABIE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " LBMIE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ECPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " ES ,Extended Synch" "Disabled,Enabled" bitfld.long 0x00 6. " CCC ,Common Clock Configuration" "0,1" textline " " bitfld.long 0x00 5. " RTL ,Retrain Link" "Not Retrained,Retrained" bitfld.long 0x00 4. " LNKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary (RCB) RC" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " ASLPMC ,Active State Link PM Control" "0,1,2,3" rgroup.long 0x84++0x03 line.long 0x00 "SCR,Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 1. " PSN ,Physical Slot Number" bitfld.long 0x00 18. " NCCS ,No Command Complete Support" "No,Yes" bitfld.long 0x00 17. " EIP ,Electromechanical Interlock Present" "Not present,Present" textline " " bitfld.long 0x00 15.--16. " SPLS ,Slot Power Limit Scale" "0,1,2,3" hexmask.long.byte 0x00 7.--14. 1. " SPLV ,Slot Power Limit Value" bitfld.long 0x00 6. " HPC ,Hot-Plug Capable" "No,Yes" textline " " bitfld.long 0x00 5. " HPS ,Hot-Plug Surprise" "No,Yes" bitfld.long 0x00 4. " PIP ,Power Indicator Present" "Not present,Present" bitfld.long 0x00 3. " AIP1 ,Attention Indicator Present" "Not present,Present" textline " " bitfld.long 0x00 2. " MSP ,MRL Sensor Present" "Not present,Present" bitfld.long 0x00 1. " PCP ,Power Controller Present" "Not present,Present" bitfld.long 0x00 0. " AIP ,Attention Indicator Present" "Not present,Present" group.long 0x88++0x03 line.long 0x00 "SCSR,Slot Control and Status Register" bitfld.long 0x00 24. " DLLSCH ,Data Link Layer State Changed" "Not changed,Changed" bitfld.long 0x00 23. " EIS ,Electromechanical Interlock Status" "Not interlocked,Interlocked" bitfld.long 0x00 22. " PDS ,Presence Detect State" "Not detected,Detected" textline " " bitfld.long 0x00 21. " MSS ,MRL Sensor State" "0,1" bitfld.long 0x00 20. " CC ,Command Completed" "Not completed,Completed" bitfld.long 0x00 19. " PDCH ,Presence Detect Changed" "Not detected,Detected" textline " " bitfld.long 0x00 18. " MSCH ,MRL Sensor Changed" "Not changed,Changed" bitfld.long 0x00 17. " PFD ,Power Fault Detected" "Not detected,Detected" bitfld.long 0x00 16. " ABP ,Attention Button Pressed" "Not pressed,Pressed" textline " " bitfld.long 0x00 12. " DLLSCHE ,Data Link Layer State Changed Enable" "Disabled,Enabled" bitfld.long 0x00 11. " EIC ,Electromechanical Interlock Control" "Disabled,Enabled" bitfld.long 0x00 10. " PCC ,Power Controller Control" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " PIC ,Power Indicator Control" "0,1,2,3" bitfld.long 0x00 6.--7. " AIC ,Attention Indicator Control" "0,1,2,3" bitfld.long 0x00 5. " HPIE ,Hot-Plug Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CCIE ,Command Completed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " PDCHE ,Presence Detect Changed Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSCHE ,MRL Sensor Changed Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PFDE ,Power Fault Detected Enable" "Disabled,Enabled" bitfld.long 0x00 0. " ABPE ,Attention Button Pressed Enable" "Disabled,Enabled" group.long 0x8C++0x07 line.long 0x00 "RCCR,Root Control and Capabilities Register" bitfld.long 0x00 3. " PIE ,PME Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SEOFEE ,System Error on Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SEONFEE ,System Error on Non-fatal Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SEOCEE ,System Error on Correctable Error Enable" "Disabled,Enabled" line.long 0x04 "RSR,Root Status Register" eventfld.long 0x04 17. " PP ,PME Pending" "Not pending,Pending" eventfld.long 0x04 16. " PS ,PME Status" "Disabled,Enabled" hexmask.long.word 0x04 0.--15. 1. " PRID ,PME Requester ID" rgroup.long 0x94++0x03 line.long 0x00 "DCR2,Device Capabilities 2 Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) bitfld.long 0x00 18.--19. " CX_OBFF_SUPPORT ,OBFF Supported" "0,1,2,3" bitfld.long 0x00 12.--13. " CX_TPH_ENABLE ,TPH Completer Supported" "0,1,2,3" textline " " bitfld.long 0x00 11. " CX_LTR_M_ENABLE ,LTR Mechanism Supported" "0,1" bitfld.long 0x00 9. " CX_ATOMIC_128_CPL_EN ,128-bit CAS Completer Supported" "0,1" textline " " bitfld.long 0x00 8. " CX_ATOMIC_64_CPL_EN ,64-bit AtomicOp Completer Supported" "0,1" bitfld.long 0x00 7. " CX_ATOMIC_32_CPL_EN ,32-bit AtomicOp Completer Supported" "0,1" textline " " bitfld.long 0x00 6. " CX_ATOMIC_ROUTING_EN ,AtomicOp Routing Supported" "0,1" bitfld.long 0x00 5. " ARI_FWD_EN ,ARI Forwarding Supported" "0,1" textline " " endif bitfld.long 0x00 4. " CTDS ,Completion Timeout Disable Supported" "Not supported,Supported" bitfld.long 0x00 0.--3. " CTRS ,Completion Timeout Ranges Supported" "Default,A,A,,,B,B,,,C,C,,,D,D,A/B/C/D" group.long 0x98++0x03 line.long 0x00 "DCRS2 ,Device Control and Status 2 Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) bitfld.long 0x00 13.--14. " OBFF_EN ,OBFF Enable" "Disabled,Enabled (Variation A),Enabled (Variation B),Enabled (WAKE#)" bitfld.long 0x00 10. " LTR_MECH_EN ,LTR Mechanism Enable" "0,1" textline " " bitfld.long 0x00 9. " ID0_COMPLETION_EN ,IDO Completion Enable" "0,1" bitfld.long 0x00 8. " ID0_REQ_EN ,IDO Request Enable" "0,1" textline " " bitfld.long 0x00 7. " AOP_EGRESS_BLOCKING ,AtomicOp Egress Blocking" "0,1" bitfld.long 0x00 6. " AOP_REQ_EN ,AtomicOp Requester Enable" "0,1" textline " " bitfld.long 0x00 5. " ARI_FWD_EN ,ARI Forwarding Supported" "0,1" textline " " endif bitfld.long 0x00 4. " CTD ,Completion Timeout Disable" "No,Yes" bitfld.long 0x00 0.--3. " CTV ,Completion Timeout Value" "50 is to 50 ms,50 is to 100 is,1 ms to 10 ms,,,16 ms to 55 ms,65 ms to 210 ms,,,260 ms to 900 ms,1 s to 3.5 s,,,4 s to 13 s,17 s to 64 s,?..." rgroup.long 0x9C++0x03 line.long 0x00 "LCR2,Link Capabilities 2 Register" bitfld.long 0x00 8. " CS ,Crosslink Supported" "Not supported,Supported" bitfld.long 0x00 3. " SLSV[3] ,Supported Link Speeds Vector[3]" "Not supported,8.0 GT/s" bitfld.long 0x00 2. " SLSV[2] ,Supported Link Speeds Vector[2]" "Not supported,5.0 GT/s" textline " " bitfld.long 0x00 1. " SLSV[1] ,Supported Link Speeds Vector[1]" "Not supported,2.5 GT/s" group.long 0xA0++0x03 line.long 0x00 "LCSR2,Link Control and Status 2 Register" bitfld.long 0x00 21. " LER ,Link Equalization Request" "Not requested,Requested" bitfld.long 0x00 20. " EP3S ,Equalization Phase 3 Successful" "Not successful,Successful" bitfld.long 0x00 19. " EP2S ,Equalization Phase 2 Successful" "Not successful,Successful" textline " " bitfld.long 0x00 18. " EP1S ,Equalization Phase 1 Successful" "Not successful,Successful" bitfld.long 0x00 17. " EC ,Equalization Complete" "Not completed,Completed" bitfld.long 0x00 16. " CDL ,Current De-emphasis Level" "0,1" textline " " bitfld.long 0x00 12.--15. " CPSD ,Compliance Pre-set/De-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " CSOS ,Compliance SOS" "Disabled,Enabled" bitfld.long 0x00 10. " EMC ,Enter Modified Compliance" "Not modified,Modified" textline " " bitfld.long 0x00 7.--9. " TM ,Transmit Margin [full-swing/half-swing]" "800-1200mV/400-600mV,Monotonic non-zero slope,Monotonic non-zero slope,200-400mV/100-200mV,?..." bitfld.long 0x00 6. " SD ,Selectable De-emphasis" "-6 dB,-3.5 dB" bitfld.long 0x00 5. " HASD ,Hardware Autonomous Speed Disable" "No,Yes" textline " " bitfld.long 0x00 4. " EC ,Enter Compliance" "Not compliance,Compliance" bitfld.long 0x00 0.--3. " TLS ,Target Link Speed" ",Gen1 2.5 GT/s,Gen2 5.0 GT/s,?..." endif group.long 0x100++0x1B line.long 0x00 "AER,AER Capability Header" hexmask.long.word 0x00 20.--31. 1. " NCO ,Next Capability Offset" bitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " PCI_EECID ,PCI Express Extended Capability ID" textline " " line.long 0x04 "UESR,Uncorrectable Error Status Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) eventfld.long 0x04 24. " AOP_EGRESS_BLOCKED_STAT ,AtomicOp Egress Blocked Status" "0,1" textline " " eventfld.long 0x04 22. " UNCORRECTABLE_INT_ERR_STAT ,Uncorrectable Internal Error Status" "0,1" textline " " endif bitfld.long 0x04 20. " URES ,Unsupported Request Error Status" "No error,Error" bitfld.long 0x04 19. " EES ,ECRC Error Status" "No error,Error" bitfld.long 0x04 18. " MTS ,Malformed TLP Status" "No error,Error" textline " " bitfld.long 0x04 17. " ROS ,Receiver Overflow Status" "No error,Error" bitfld.long 0x04 16. " UCS ,Unexpected Completion Status" "No error,Error" bitfld.long 0x04 15. " CAS ,Completer Abort Status" "No error,Error" textline " " bitfld.long 0x04 14. " CTS ,Completion Timeout Status" "No error,Error" bitfld.long 0x04 13. " FCPES ,Flow Control Protocol Error Status" "No error,Error" bitfld.long 0x04 12. " PTS ,Poisoned TLP Status" "No error,Error" textline " " bitfld.long 0x04 4. " DLPES ,Data Link Protocol Error Status" "No error,Error" line.long 0x08 "UEMR,Uncorrectable Error Mask Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) bitfld.long 0x08 24. " AOP_EGRESS_BLOCK_MASK ,AtomicOp Egress Blocked Mask" "0,1" textline " " bitfld.long 0x08 22. " UNCORRECTABLE_INT_ERR_MASK ,Uncorrectable Internal Error Mask" "0,1" textline " " endif bitfld.long 0x08 20. " UREM ,Unsupported Request Error Mask" "No masked,Masked" bitfld.long 0x08 19. " EEM ,ECRC Error Mask" "Not masked,Masked" bitfld.long 0x08 18. " MTM ,Malformed TLP Mask" "Not masked,Masked" textline " " bitfld.long 0x08 17. " ROM ,Receiver Overflow Mask" "Not masked,Masked" bitfld.long 0x08 16. " UCM ,Unexpected Completion Mask" "Not masked,Masked" bitfld.long 0x08 15. " CAM ,Completer Abort Mask" "Not masked,Masked" textline " " bitfld.long 0x08 14. " CTM ,Completion Timeout Mask" "Not masked,Masked" bitfld.long 0x08 13. " FCPEM ,Flow Control Protocol Error Mask" "Not masked,Masked" bitfld.long 0x08 12. " PTM ,Poisoned TLP Mask" "Not masked,Masked" textline " " bitfld.long 0x08 4. " DLPEM ,Data Link Protocol Error Mask" "Not masked,Masked" line.long 0x0C "UESEVR,Uncorrectable Error Severity Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) bitfld.long 0x0C 24. " AOP_EGRESS_BLOCK_SEV ,AtomicOp Egress Blocked Severity" "0,1" textline " " bitfld.long 0x0C 22. " UNCORRECTABLE_INT_ERR_SEV ,Uncorrectable Internal Error Severity" "0,1" textline " " endif bitfld.long 0x0C 20. " URES ,Unsupported Request Error Severity" "Not severe,Severe" bitfld.long 0x0C 19. " EES ,ECRC Error Severity" "Not severe,Severe" bitfld.long 0x0C 18. " MTS ,Malformed TLP Severity" "Not severe,Severe" textline " " bitfld.long 0x0C 17. " ROS ,Receiver Overflow Severity" "Not severe,Severe" bitfld.long 0x0C 16. " UCS ,Unexpected Completion Severity" "Not severe,Severe" bitfld.long 0x0C 15. " CAS ,Completer Abort Severity" "Not severe,Severe" textline " " bitfld.long 0x0C 14. " CTS ,Completion Timeout Severity" "Not severe,Severe" bitfld.long 0x0C 13. " FCPES ,Flow Control Protocol Error Severity" "Not severe,Severe" bitfld.long 0x0C 12. " PTS ,Poisoned TLP Severity" "Not severe,Severe" textline " " bitfld.long 0x0C 4. " DLPES ,Data Link Protocol Error Severity" "Not severe,Severe" line.long 0x10 "CESR,Correctable Error Status Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) eventfld.long 0x10 14. " CORRECTED_INT_ERR_STAT ,Corrected Internal Error Status" "0,1" textline " " endif bitfld.long 0x10 13. " ANFES ,Advisory Non-Fatal Error Status" "No error,Error" bitfld.long 0x10 12. " RTTS ,Reply Timer Timeout Status" "No timeout,Timeout" bitfld.long 0x10 8. " RNRS ,REPLAY_NUM Rollover Status" "No rollover,Rollover" textline " " bitfld.long 0x10 7. " BDS ,Bad DLLP Status" "No error,Error" bitfld.long 0x10 6. " BTS ,Bad TLP Status" "No error,Error" bitfld.long 0x10 0. " RES ,Receiver Error Status" "No error,Error" line.long 0x14 "CEMR,Correctable Error Mask Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) bitfld.long 0x14 14. " CORRECTED_INT_ERR_MASK ,Corrected Internal Error Mask" "0,1" textline " " endif bitfld.long 0x14 13. " ANFEM ,Advisory Non-Fatal Error Mask" "Not masked,Masked" bitfld.long 0x14 12. " RTTM ,Reply Timer Timeout Mask" "Not masked,Masked" bitfld.long 0x14 8. " RNRM ,REPLAY_NUM Rollover Mask" "Not masked,Masked" textline " " bitfld.long 0x14 7. " BDM ,Bad DLLP Mask" "Not masked,Masked" bitfld.long 0x14 6. " BTM ,Bad TLP Mask" "Not masked,Masked" bitfld.long 0x14 0. " REM ,Receiver Error Mask" "Not masked,Masked" line.long 0x18 "ACCR,Advanced Capabilities and Control Register" bitfld.long 0x18 8. " ECE ,ECRC Check Enable" "Disabled,Enabled" bitfld.long 0x18 7. " ECC ,ECRC Check Capable" "Not capable,Capable" bitfld.long 0x18 6. " EGE ,ECRC Generation Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " EGC ,ECRC Generation Capability" "Not capable,Capable" bitfld.long 0x18 0.--4. " FEP ,First Error Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x11C++0x03 line.long 0x00 "HLR,Header Log Register" if (((per.l(ad:0x020E0030))&0xF000)==0x2000) group.long 0x12C++0x07 line.long 0x00 "RECR,Root Error Command Register" bitfld.long 0x00 2. " FERE ,Fatal Error Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 1. " NFERE ,Non-Fatal Error Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 0. " CERN ,Correctable Error Reporting Enable" "Disabled,Enabled" line.long 0x04 "RESR,Root Error Status Register" bitfld.long 0x04 27.--31. " AEIMN ,Advanced Error Interrupt Message Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 6. " FERM ,Fatal Error Messages Received" "Not received,Received" bitfld.long 0x04 5. " NFEMR ,Non-Fatal Error Messages Received" "Not received,Received" textline " " bitfld.long 0x04 4. " FUF ,First Uncorrectable Fatal" "Not occurred,Occurred" bitfld.long 0x04 3. " MEFNR ,Multiple ERR_FATAL/NONFATAL Received" "Not received,Received" bitfld.long 0x04 2. " EFNR ,ERR_FATAL/NONFATAL Received" "Not received,Received" textline " " bitfld.long 0x04 1. " MECR ,Multiple ERR_COR Received" "Not received,Received" bitfld.long 0x04 0. " ECR ,ERR_COR Received" "Not received,Received" rgroup.long 0x134++0x03 line.long 0x00 "ESIR,Error Source Identification Register" hexmask.long.word 0x00 16.--31. 1. " EFNS ,ERR_FATAL/NONFATAL Source Identification" hexmask.long.word 0x00 0.--15. 1. " ECS ,ERR_COR Source Identification" endif rgroup.long 0x140++0x03 line.long 0x00 "VCECHR,VC Extended Capability Header" hexmask.long.word 0x00 20.--31. 0x10 " NCO ,Next Capability Offset" bitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " EC ,PCI Express Extended Capability" rgroup.long 0x144++0x07 line.long 0x00 "PVCCR1,Port VC Capability Register 1" bitfld.long 0x00 10.--11. " PATES ,Port Arbitration Table Entry Size" "0,1,2,3" bitfld.long 0x00 8.--9. " RC ,Reference Clock" "0,1,2,3" bitfld.long 0x00 4.--6. " LPEVCC ,Low Priority Extended VC Count" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0.--2. " EVCC ,Extended VC Count" "0,1,2,3,4,5,6,7" line.long 0x04 "PVCCR2,Port VC Capability Register 2" bitfld.long 0x04 3. " VC_AC[3] ,VC Arbitration Capability[3]" "Not supported,128-phase WRR" bitfld.long 0x04 2. " VC_AC[2] ,VC Arbitration Capability[2]" "Not supported,64-phase WRR" bitfld.long 0x04 1. " VC_AC[1] ,VC Arbitration Capability[1]" "Not supported,32-phase WRR" textline " " bitfld.long 0x04 0. " VC_AC[0] ,VC Arbitration Capability[0]" "Not supported,16-phase WRR" group.long 0x14C++0x03 line.long 0x00 "PVCCSR,Port VC Control and Status Register" bitfld.long 0x00 16. " ATS ,Arbitration Table Status" "0,1" bitfld.long 0x00 1.--3. " VCAS ,VC Arbitration Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " LVCAT ,Load VC Arbitration Table" "Not loaded,Loaded" rgroup.long 0x150++0x03 line.long 0x00 "VCRCR,VC Resource Capability Register n" hexmask.long.byte 0x00 24.--31. 1. " PATO ,Port Arbitration Table Offset" hexmask.long.byte 0x00 16.--22. 1. " MTS ,Maximum Time Slots" bitfld.long 0x00 15. " RST ,Reject Snoop Transactions" "Not rejected,Rejected" textline " " hexmask.long.byte 0x00 0.--7. 1. " PAC ,Port Arbitration Capability" group.long 0x154++0x03 line.long 0x00 "VCRCONR,VC Resource Control Register n" bitfld.long 0x00 31. " VC_ENABLE ,VC Enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " VC_ID ,VC ID" "0,1,2,3,4,5,6,7" bitfld.long 0x00 17.--19. " PAS ,Port Arbitration Select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16. " LPAT ,Load Port Arbitration Table" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " TC_VC_MAP ,TC/VC Map" rgroup.long 0x158++0x03 line.long 0x00 "VCRSR,VC Resource Status Register n" bitfld.long 0x00 17. " VC_NP ,VC Negotiation Pending" "Not pending,Pending" bitfld.long 0x00 16. " PATS ,Port Arbitration Table Status" "Disabled,Enabled" width 0x0B tree.end tree "PCIe CTRL Port Logic Memory " base ad:0x01000700 width 16. group.long 0x00++0x1b line.long 0x00 "PL_ALTRTR,Ack Latency Timer and Replay Timer Register" hexmask.long.word 0x00 16.--31. 1. " RTL ,Replay Time Limit" hexmask.long.word 0x00 0.--15. 1. " RTLTL ,Round Trip Latency Time Limit" line.long 0x04 "PL_VSDR,Vendor Specific DLLP Register" line.long 0x08 "PL_PFLR,Port Force Link Register" hexmask.long.byte 0x08 24.--31. 1. " LPEC ,Low Power Entrance Count" bitfld.long 0x08 16.--21. " LINK_STATE ,Link State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 15. " FORCE_LINK ,Force Link" "Not forced,Forced" textline " " hexmask.long.byte 0x08 0.--7. 1. " Link_Number ,Link Number" line.long 0x0C "PL_AFLACR,Ack Frequency and L0-L1 ASPM Control Register" bitfld.long 0x0C 30. " EA_L1 ,Enter ASPM L1 without receive in L0s" "Not entered,Entered" bitfld.long 0x0C 27.--29. " L1_EL ,L1 Entrance Latency" "1 is,2 is,4 is,8 is,16 is,32 is,64 is,64 is" bitfld.long 0x0C 24.--26. " L0_EL ,L0s Entrance Latency" "1 is,2 is,3 is,4 is,5 is,6 is,7 is,7 is" textline " " hexmask.long.byte 0x0C 16.--23. 1. " CCNFTS ,Common Clock number of Fast Training Sequence" hexmask.long.byte 0x0C 8.--15. 1. " N_FTS ,Number of Fast Training Sequence" hexmask.long.byte 0x0C 0.--7. 1. " AF ,Ack Frequency" line.long 0x10 "PL_PLCR,Port Link Control Register" bitfld.long 0x10 23. " CA ,Crosslink Active" "Inactive,Active" bitfld.long 0x10 22. " CE ,Crosslink Enable" "Disabled,Enabled" bitfld.long 0x10 16.--21. " LME ,Link Mode Enable" ",x1,,x2,,,,x4,,,,,,,,x8,,,,,,,,,,,,,,,,x16,?..." textline " " bitfld.long 0x10 7. " FLM ,Fast Link Mode" "Off,On" bitfld.long 0x10 5. " DLE ,DLL Link Enable" "Disabled,Enabled" bitfld.long 0x10 3. " RA ,Reset Assert" "Not asserted,Asserted" textline " " bitfld.long 0x10 2. " LE ,Loopback Enable" "Disabled,Enabled" bitfld.long 0x10 1. " SD ,Scramble Disable" "No,Yes" bitfld.long 0x10 0. " VSDR ,Vendor Specific DLLP Request" "Not requested,Requested" line.long 0x14 "PL_LSR,Lane Skew Register" bitfld.long 0x14 31. " DLTLD ,Disable Lane-to-Lane Deskew" "No,Yes" bitfld.long 0x14 25. " AND ,Ack/Nak Disable" "No,Yes" bitfld.long 0x14 24. " FCD ,Flow Control Disable" "No,Yes" textline " " hexmask.long.tbyte 0x14 0.--23. 1. " ILSFT ,Insert Lane Skew for Transmit" line.long 0x18 "PL_SNR,Symbol Number Register" bitfld.long 0x18 29.--31. " CFGREQ ,Configuration Requests targeted at function numbers above this value will be returned with unsupported request" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--28. " TMFFCWT ,Timer Modifier for Flow Control Watchdog Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 19.--23. " TMFANLT ,Timer Modifier for Ack/Nak Latency Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 14.--18. " TMFRT ,Timer Modifier for Replay Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) textline " " hexmask.long.byte 0x18 0.--7. 1. " MAX_FUNC_NUM_REQ ,Maximum Function Number that can be used in a Request" else textline " " bitfld.long 0x18 8.--10. " NOSS ,Number of SKP Symbols" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--3. " NOTS ,Number of TS Symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x01000700))&0xF000)==0x2000) group.long 0x1C++0x03 line.long 0x00 "PL_STRFM1,Symbol Timer Register and Filter Mask Register 1" bitfld.long 0x00 31. " CFMRCD ,Mask filtering of received Configuration Requests" "Not masked,Masked" bitfld.long 0x00 30. " CFMRIOD ,Mask filtering of received I/O Requests" "Not masked,Masked" bitfld.long 0x00 29. " CFMMD ,Mask Drop Message TLPs" "Not masked,Masked" textline " " bitfld.long 0x00 28. " CFMCED ,Mask ECRC error filtering for Completions" "Not masked,Masked" bitfld.long 0x00 27. " CFMED ,Mask ECRC error filtering" "Not masked,Masked" bitfld.long 0x00 26. " CFMCLM ,Mask Length mismatch error for received Completions" "Not masked,Masked" textline " " bitfld.long 0x00 25. " CFMCATM ,Mask Attributes mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 24. " CFMCTCM ,Mask Traffic Class mismatch error for received Complet" "Not masked,Masked" bitfld.long 0x00 23. " CFMCFM ,Mask function mismatch error for received Completions" "Not masked,Masked" textline " " bitfld.long 0x00 22. " CFMCRM ,Mask Requester ID mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 21. " CFMCTM ,Mask Tag error rules for received Completions" "Not masked,Masked" bitfld.long 0x00 20. " CFMLRDA ,Mask Locked Request filtering" "Not masked,Masked" textline " " bitfld.long 0x00 19. " CFMCT1R ,Mask Type 1 Configuration Request filtering" "Not masked,Masked" bitfld.long 0x00 18. " CFMUROB ,Mask BAR match filtering" "Not masked,Masked" bitfld.long 0x00 17. " CFMURP ,Mask poisoned TLP filtering" "Not masked,Masked" textline " " bitfld.long 0x00 16. " CFMURFM ,Mask function mismatch filtering for incoming Requests" "Not masked,Masked" bitfld.long 0x00 15. " DFWT ,Disable FC Watchdog Timer" "No,Yes" hexmask.long.word 0x00 0.--10. 1. " SKP_IV ,SKP Interval Value" elif (((per.l(ad:0x01000700))&0xF000)==0x0) group.long 0x1C++0x03 line.long 0x00 "PL_STRFM1,Symbol Timer Register and Filter Mask Register 1" bitfld.long 0x00 29. " CFMMD ,Mask Drop Message TLPs" "Not masked,Masked" bitfld.long 0x00 28. " CFMCED ,Mask ECRC error filtering for Completions" "Not masked,Masked" bitfld.long 0x00 27. " CFMED ,Mask ECRC error filtering" "Not masked,Masked" textline " " bitfld.long 0x00 26. " CFMCLM ,Mask Length mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 25. " CFMCATM ,Mask Attributes mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 24. " CFMCTCM ,Mask Traffic Class mismatch error for received Complet" "Not masked,Masked" textline " " bitfld.long 0x00 23. " CFMCFM ,Mask function mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 22. " CFMCRM ,Mask Requester ID mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x00 21. " CFMCTM ,Mask Tag error rules for received Completions" "Not masked,Masked" textline " " bitfld.long 0x00 20. " CFMLRDA ,Mask Locked Request filtering" "Not masked,Masked" bitfld.long 0x00 19. " CFMCT1R ,Mask Type 1 Configuration Request filtering" "Not masked,Masked" bitfld.long 0x00 18. " CFMUROB ,Mask BAR match filtering" "Not masked,Masked" textline " " bitfld.long 0x00 17. " CFMURP ,Mask poisoned TLP filtering" "Not masked,Masked" bitfld.long 0x00 16. " CFMURFM ,Mask function mismatch filtering for incoming Requests" "Not masked,Masked" bitfld.long 0x00 15. " DFWT ,Disable FC Watchdog Timer" "No,Yes" textline " " hexmask.long.word 0x00 0.--10. 1. " SKP_IV ,SKP Interval Value" endif group.long 0x20++0x07 line.long 0x00 "PL_STRFM2,Filter Mask Register 2" bitfld.long 0x00 3. " CFMHF ,Mask Core Filter to handle flush request" "Not masked,Masked" bitfld.long 0x00 2. " CFMD4U ,Mask DLLP abort for unexpected CPL" "Not masked,Masked" bitfld.long 0x00 1. " CFMV1D ,Mask MSG Type 1 drop" "Not masked,Masked" textline " " bitfld.long 0x00 0. " CFMV0D ,Mask MSG Type 0 drop" "Not masked,Masked" line.long 0x04 "PL_AMODNPS,AMBA Multiple Outbound Decomposed NP Sub-RequestsControl Register" bitfld.long 0x04 0. " EAMODNSR ,Enable AMBA Multiple Outbound Decomposed NP Sub-Requests" "Disabled,Enabled" rgroup.long 0x28++0x1F line.long 0x00 "PL_DEBUG0,Debug Register 0" line.long 0x04 "PL_DEBUG1,Debug Register 1" line.long 0x08 "PL_TPFCSR,Transmit Posted FC Credit Status Register" hexmask.long.byte 0x08 12.--19. 1. " TPHFC ,Transmit Posted Header FC Credits" hexmask.long.word 0x08 0.--11. 1. " TPDFC ,Transmit Posted Data FC Credits" line.long 0x0c "PL_TNFCSR,Transmit Non-Posted FC Credit Status Register" hexmask.long.byte 0x0c 12.--19. 1. " TNPHFC ,Transmit Non Posted Header FC Credits" hexmask.long.word 0x0c 0.--11. 1. " TNPDFC ,Transmit Non Posted Data FC Credits" line.long 0x10 "PL_TCFCSR,Transmit Completion FC Credit Status Register" hexmask.long.byte 0x10 12.--19. 1. " TCHFC ,Transmit Completion Header FC Credits" hexmask.long.word 0x10 0.--11. 1. " TCDFC ,Transmit Completion Data FC Credits" line.long 0x14 "PL_QSR,Queue Status Register" bitfld.long 0x14 2. " RQNE ,Received Queue Not Empty" "No,Yes" bitfld.long 0x14 1. " TRBNE ,Transmit Retry Buffer Not Empty" "No,Yes" bitfld.long 0x14 0. " RTFCNR ,Received TLP FC Credits Not Returned" "No,Yes" line.long 0x18 "PL_VCTAR1,VC Transmit Arbitration Register 1" hexmask.long.byte 0x18 24.--31. 1. " WWFVC3 ,WRR Weight for VC3" hexmask.long.byte 0x18 16.--23. 1. " WWFVC2 ,WRR Weight for VC2" hexmask.long.byte 0x18 8.--15. 1. " WWFVC1 ,WRR Weight for VC1" textline " " hexmask.long.byte 0x18 0.--7. 1. " WWFVC0 ,WRR Weight for VC0" line.long 0x1C "PL_VCTAR2,VC Transmit Arbitration Register 2" hexmask.long.byte 0x1C 24.--31. 1. " WWFVC7 ,WRR Weight for VC7" hexmask.long.byte 0x1C 16.--23. 1. " WWFVC6 ,WRR Weight for VC6" hexmask.long.byte 0x1C 8.--15. 1. " WWFVC5 ,WRR Weight for VC5" textline " " hexmask.long.byte 0x1C 0.--7. 1. " WWFVC4 ,WRR Weight for VC4" group.long 0x48++0x17 line.long 0x00 "PL_VC0PRQC,VC0 Posted Receive Queue Control" bitfld.long 0x00 31. " VCOFRQ ,VC Ordering for Receive Queues" "Round robin,Strict ordering" bitfld.long 0x00 30. " TTOFVC0 ,TLP Type Ordering for VC0" "Strict ordering,PCIe spec" bitfld.long 0x00 21.--23. " QUEUE_MODE ,VC0 Posted TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." textline " " hexmask.long.byte 0x00 12.--19. 1. " VC0PHC ,VC0 Posted Header Credits" hexmask.long.word 0x00 0.--11. 1. " VC0PDC ,VC0 Posted Data Credits" line.long 0x04 "PL_VC0NRQC,VC0 Non-Posted Receive Queue Control" bitfld.long 0x04 21.--23. " QUEUE_MODE ,VC0 Non-Posted TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." hexmask.long.byte 0x04 12.--19. 1. " VC0NPHC ,VC0 Non Posted Header Credits" hexmask.long.word 0x04 0.--11. 1. " VC0NPDC ,VC0 Non Posted Data Credits" line.long 0x08 "PL_VC0CRQC,VC0 Completion Receive Queue Control" bitfld.long 0x08 21.--23. " QUEUE_MODE ,VC0 Completion TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." hexmask.long.byte 0x08 12.--19. 1. " VC0CHC ,VC0 Completion Header Credits" hexmask.long.word 0x08 0.--11. 1. " VC0CDC ,VC0 Completion Data Credits" line.long 0x0C "PL_VC1PRQC,VC1 Posted Receive Queue Control" bitfld.long 0x0C 30. " TTOFVC1 ,TLP Type Ordering for VC1" "Strict ordering,PCIe Base Spec" bitfld.long 0x0C 21.--23. " QUEUE_MODE ,VC1 Posted TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." hexmask.long.byte 0x0C 12.--19. 1. " VC1PHC ,VC1 Posted Header Credits" textline " " hexmask.long.word 0x0C 0.--11. 1. " VC1PDC ,VC1 Posted Data Credits" line.long 0x10 "PL_VC1NRQC,VC1 Non-Posted Receive Queue Control" bitfld.long 0x10 21.--23. " QUEUE_MODE ,VC1 Non-Posted TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." hexmask.long.byte 0x10 12.--19. 1. " VC1NPHC ,VC1 Non Posted Header Credits" hexmask.long.word 0x10 0.--11. 1. " VC1NPDC ,VC1 Non Posted Data Credits" line.long 0x14 "PL_VC1CRQC,VC1 Completion Receive Queue Control" bitfld.long 0x14 21.--23. " VC1CTQM ,VC1 Completion TLP Queue Mode" ",Store-and-forward,Cut-through,,Bypass,?..." hexmask.long.byte 0x14 12.--19. 1. " VC1CHC ,VC1 Completion Header Credits" hexmask.long.word 0x14 0.--11. 1. " VC1CDC ,VC1 Completion Data Credits" rgroup.long 0xA8++0x17 line.long 0x00 "PL_VC0PBD,VC0 Posted Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " VC0PHQD ,VC0 Posted Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " VC0PDQD ,VC0 Posted Data Queue Depth" line.long 0x04 "PL_VC0NPBD,VC0 Non-Posted Buffer Depth" hexmask.long.word 0x04 16.--25. 1. " VC0NPHQD ,VC0 Non-Posted Header Queue Depth" hexmask.long.word 0x04 0.--13. 1. " VC0NPDQD ,VC0 Non-Posted Data Queue Depth" line.long 0x08 "PL_VC0CBD,VC0 Completion Buffer Depth" hexmask.long.word 0x08 16.--25. 1. " VC0CHQD ,VC0 Completion Header Queue Depth" hexmask.long.word 0x08 0.--13. 1. " VC0CDQD ,VC0 Completion Data Queue Depth" line.long 0x0C "PL_VC1PBD,VC1 Posted Buffer Depth" hexmask.long.word 0x0C 16.--25. 1. " VC1PHQD ,VC1 Posted Header Queue Depth" hexmask.long.word 0x0C 0.--13. 1. " VC1DPFQ ,VC1 Posted Data Queue Depth" line.long 0x10 "PL_VC1NPBD,VC1 Non-Posted Buffer Depth" hexmask.long.word 0x10 16.--25. 1. " VC1NPHQD ,VC1 Non-Posted Header Queue Depth" hexmask.long.word 0x10 0.--13. 1. " VC1NPDQD ,VC1 Non-Posted Data Queue Depth" line.long 0x14 "PL_VC1CBD,VC1 Completion Buffer Depth" hexmask.long.word 0x14 16.--25. 1. " VC1CHQD ,VC1 Completion Header Queue Depth" hexmask.long.word 0x14 0.--13. 1. " VC1CDQD ,VC1 Completion Data Queue Depth" group.long 0x10C++0x03 line.long 0x00 "PL_G2CR,Gen2 Control Register" bitfld.long 0x00 20. " DEL ,Used to set the de-emphasis level for upstream ports" "0,1" bitfld.long 0x00 19. " CTCRB ,Config Tx Compliance Receive Bit" "No effect,Signaled LTSSM transmit TS" bitfld.long 0x00 18. " CPTS ,Config PHY Tx Swing" "Low swing,Full swing" textline " " bitfld.long 0x00 17. " DSCH ,Directed Speed Change" "Not changed,Changed" hexmask.long.word 0x00 8.--16. 1. " PNOL ,Predetermined Number of Lanes" hexmask.long.byte 0x00 0.--7. 1. " N_FTS ,Number of Fast Training Sequences" rgroup.long 0x110++0x03 line.long 0x00 "PL_PHY_STATUS,PHY Status" group.long 0x114++0x1F line.long 0x00 "PL_PHY_CTRL,PHY Control" line.long 0x04 "PL_MRCCR0,Master Response Composer Control Register 0" hexmask.long.byte 0x04 8.--15. 1. " RMBT ,Remote Max Bridge Tag" bitfld.long 0x04 0.--2. " RRRS ,Remote Read Request Size" "128,256,512,1024,2048,4096,?..." line.long 0x08 "PL_MRCCR1,Master Response Composer Control Register 1" bitfld.long 0x08 0. " SBCI ,Segmented Buffer Controller Initialize" "Not initialized,Initialized" line.long 0x0C "PL_MSICA,MSI Controller Address" line.long 0x10 "PL_MSICUA,MSI Controller Upper Address" tree "MSI Controller Interrupt 0" group.long 0x128++0xb line.long 0x00 "PL_MSICI0_ENB,MSI Controller Interrupt 0 Enable" bitfld.long 0x00 31. " MSICI0_ENB[31] ,MSI Controller 31 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI0_ENB[30] ,MSI Controller 30 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI0_ENB[29] ,MSI Controller 29 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI0_ENB[28] ,MSI Controller 28 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI0_ENB[27] ,MSI Controller 27 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI0_ENB[26] ,MSI Controller 26 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI0_ENB[25] ,MSI Controller 25 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI0_ENB[24] ,MSI Controller 24 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI0_ENB[23] ,MSI Controller 23 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI0_ENB[22] ,MSI Controller 22 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI0_ENB[21] ,MSI Controller 21 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI0_ENB[20] ,MSI Controller 20 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI0_ENB[19] ,MSI Controller 19 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI0_ENB[18] ,MSI Controller 18 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI0_ENB[17] ,MSI Controller 17 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI0_ENB[16] ,MSI Controller 16 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI0_ENB[15] ,MSI Controller 15 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI0_ENB[14] ,MSI Controller 14 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI0_ENB[13] ,MSI Controller 13 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI0_ENB[12] ,MSI Controller 12 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI0_ENB[11] ,MSI Controller 11 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI0_ENB[10] ,MSI Controller 10 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI0_ENB[9] ,MSI Controller 9 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI0_ENB[8] ,MSI Controller 8 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI0_ENB[7] ,MSI Controller 7 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI0_ENB[6] ,MSI Controller 6 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI0_ENB[5] ,MSI Controller 5 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI0_ENB[4] ,MSI Controller 4 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI0_ENB[3] ,MSI Controller 3 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI0_ENB[2] ,MSI Controller 2 Interrupt 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI0_ENB[1] ,MSI Controller 1 Interrupt 0 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI0_ENB[0] ,MSI Controller 0 Interrupt 0 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI0_MASK,MSI Controller Interrupt 0 Mask" bitfld.long 0x04 31. " MSICI0_MASK[31] ,MSI Controller 31 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI0_MASK[30] ,MSI Controller 30 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI0_MASK[29] ,MSI Controller 29 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI0_MASK[28] ,MSI Controller 28 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI0_MASK[27] ,MSI Controller 27 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI0_MASK[26] ,MSI Controller 26 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI0_MASK[25] ,MSI Controller 25 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI0_MASK[24] ,MSI Controller 24 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI0_MASK[23] ,MSI Controller 23 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI0_MASK[22] ,MSI Controller 22 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI0_MASK[21] ,MSI Controller 21 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI0_MASK[20] ,MSI Controller 20 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI0_MASK[19] ,MSI Controller 19 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI0_MASK[18] ,MSI Controller 18 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI0_MASK[17] ,MSI Controller 17 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI0_MASK[16] ,MSI Controller 16 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI0_MASK[15] ,MSI Controller 15 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI0_MASK[14] ,MSI Controller 14 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI0_MASK[13] ,MSI Controller 13 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI0_MASK[12] ,MSI Controller 12 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI0_MASK[11] ,MSI Controller 11 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI0_MASK[10] ,MSI Controller 10 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI0_MASK[9] ,MSI Controller 9 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI0_MASK[8] ,MSI Controller 8 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI0_MASK[7] ,MSI Controller 7 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI0_MASK[6] ,MSI Controller 6 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI0_MASK[5] ,MSI Controller 5 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI0_MASK[4] ,MSI Controller 4 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI0_MASK[3] ,MSI Controller 3 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI0_MASK[2] ,MSI Controller 2 Interrupt 0 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI0_MASK[1] ,MSI Controller 1 Interrupt 0 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI0_MASK[0] ,MSI Controller 0 Interrupt 0 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI0_STAT,MSI Controller Interrupt 0 Status" eventfld.long 0x08 31. " MSICI0_STATUS[31] ,MSI Controller 31 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI0_STATUS[30] ,MSI Controller 30 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI0_STATUS[29] ,MSI Controller 29 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI0_STATUS[28] ,MSI Controller 28 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI0_STATUS[27] ,MSI Controller 27 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI0_STATUS[26] ,MSI Controller 26 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI0_STATUS[25] ,MSI Controller 25 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI0_STATUS[24] ,MSI Controller 24 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI0_STATUS[23] ,MSI Controller 23 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI0_STATUS[22] ,MSI Controller 22 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI0_STATUS[21] ,MSI Controller 21 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI0_STATUS[20] ,MSI Controller 20 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI0_STATUS[19] ,MSI Controller 19 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI0_STATUS[18] ,MSI Controller 18 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI0_STATUS[17] ,MSI Controller 17 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI0_STATUS[16] ,MSI Controller 16 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI0_STATUS[15] ,MSI Controller 15 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI0_STATUS[14] ,MSI Controller 14 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI0_STATUS[13] ,MSI Controller 13 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI0_STATUS[12] ,MSI Controller 12 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI0_STATUS[11] ,MSI Controller 11 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI0_STATUS[10] ,MSI Controller 10 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI0_STATUS[9] ,MSI Controller 9 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI0_STATUS[8] ,MSI Controller 8 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI0_STATUS[7] ,MSI Controller 7 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI0_STATUS[6] ,MSI Controller 6 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI0_STATUS[5] ,MSI Controller 5 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI0_STATUS[4] ,MSI Controller 4 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI0_STATUS[3] ,MSI Controller 3 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI0_STATUS[2] ,MSI Controller 2 Interrupt 0 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI0_STATUS[1] ,MSI Controller 1 Interrupt 0 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI0_STATUS[0] ,MSI Controller 0 Interrupt 0 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 1" group.long 0x134++0xb line.long 0x00 "PL_MSICI1_ENB,MSI Controller Interrupt 1 Enable" bitfld.long 0x00 31. " MSICI1_ENB[31] ,MSI Controller 31 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI1_ENB[30] ,MSI Controller 30 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI1_ENB[29] ,MSI Controller 29 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI1_ENB[28] ,MSI Controller 28 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI1_ENB[27] ,MSI Controller 27 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI1_ENB[26] ,MSI Controller 26 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI1_ENB[25] ,MSI Controller 25 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI1_ENB[24] ,MSI Controller 24 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI1_ENB[23] ,MSI Controller 23 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI1_ENB[22] ,MSI Controller 22 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI1_ENB[21] ,MSI Controller 21 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI1_ENB[20] ,MSI Controller 20 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI1_ENB[19] ,MSI Controller 19 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI1_ENB[18] ,MSI Controller 18 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI1_ENB[17] ,MSI Controller 17 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI1_ENB[16] ,MSI Controller 16 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI1_ENB[15] ,MSI Controller 15 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI1_ENB[14] ,MSI Controller 14 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI1_ENB[13] ,MSI Controller 13 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI1_ENB[12] ,MSI Controller 12 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI1_ENB[11] ,MSI Controller 11 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI1_ENB[10] ,MSI Controller 10 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI1_ENB[9] ,MSI Controller 9 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI1_ENB[8] ,MSI Controller 8 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI1_ENB[7] ,MSI Controller 7 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI1_ENB[6] ,MSI Controller 6 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI1_ENB[5] ,MSI Controller 5 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI1_ENB[4] ,MSI Controller 4 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI1_ENB[3] ,MSI Controller 3 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI1_ENB[2] ,MSI Controller 2 Interrupt 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI1_ENB[1] ,MSI Controller 1 Interrupt 1 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI1_ENB[0] ,MSI Controller 0 Interrupt 1 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI1_MASK,MSI Controller Interrupt 1 Mask" bitfld.long 0x04 31. " MSICI1_MASK[31] ,MSI Controller 31 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI1_MASK[30] ,MSI Controller 30 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI1_MASK[29] ,MSI Controller 29 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI1_MASK[28] ,MSI Controller 28 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI1_MASK[27] ,MSI Controller 27 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI1_MASK[26] ,MSI Controller 26 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI1_MASK[25] ,MSI Controller 25 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI1_MASK[24] ,MSI Controller 24 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI1_MASK[23] ,MSI Controller 23 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI1_MASK[22] ,MSI Controller 22 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI1_MASK[21] ,MSI Controller 21 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI1_MASK[20] ,MSI Controller 20 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI1_MASK[19] ,MSI Controller 19 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI1_MASK[18] ,MSI Controller 18 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI1_MASK[17] ,MSI Controller 17 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI1_MASK[16] ,MSI Controller 16 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI1_MASK[15] ,MSI Controller 15 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI1_MASK[14] ,MSI Controller 14 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI1_MASK[13] ,MSI Controller 13 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI1_MASK[12] ,MSI Controller 12 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI1_MASK[11] ,MSI Controller 11 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI1_MASK[10] ,MSI Controller 10 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI1_MASK[9] ,MSI Controller 9 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI1_MASK[8] ,MSI Controller 8 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI1_MASK[7] ,MSI Controller 7 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI1_MASK[6] ,MSI Controller 6 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI1_MASK[5] ,MSI Controller 5 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI1_MASK[4] ,MSI Controller 4 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI1_MASK[3] ,MSI Controller 3 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI1_MASK[2] ,MSI Controller 2 Interrupt 1 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI1_MASK[1] ,MSI Controller 1 Interrupt 1 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI1_MASK[0] ,MSI Controller 0 Interrupt 1 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI1_STAT,MSI Controller Interrupt 1 Status" eventfld.long 0x08 31. " MSICI1_STATUS[31] ,MSI Controller 31 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI1_STATUS[30] ,MSI Controller 30 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI1_STATUS[29] ,MSI Controller 29 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI1_STATUS[28] ,MSI Controller 28 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI1_STATUS[27] ,MSI Controller 27 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI1_STATUS[26] ,MSI Controller 26 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI1_STATUS[25] ,MSI Controller 25 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI1_STATUS[24] ,MSI Controller 24 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI1_STATUS[23] ,MSI Controller 23 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI1_STATUS[22] ,MSI Controller 22 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI1_STATUS[21] ,MSI Controller 21 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI1_STATUS[20] ,MSI Controller 20 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI1_STATUS[19] ,MSI Controller 19 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI1_STATUS[18] ,MSI Controller 18 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI1_STATUS[17] ,MSI Controller 17 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI1_STATUS[16] ,MSI Controller 16 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI1_STATUS[15] ,MSI Controller 15 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI1_STATUS[14] ,MSI Controller 14 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI1_STATUS[13] ,MSI Controller 13 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI1_STATUS[12] ,MSI Controller 12 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI1_STATUS[11] ,MSI Controller 11 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI1_STATUS[10] ,MSI Controller 10 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI1_STATUS[9] ,MSI Controller 9 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI1_STATUS[8] ,MSI Controller 8 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI1_STATUS[7] ,MSI Controller 7 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI1_STATUS[6] ,MSI Controller 6 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI1_STATUS[5] ,MSI Controller 5 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI1_STATUS[4] ,MSI Controller 4 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI1_STATUS[3] ,MSI Controller 3 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI1_STATUS[2] ,MSI Controller 2 Interrupt 1 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI1_STATUS[1] ,MSI Controller 1 Interrupt 1 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI1_STATUS[0] ,MSI Controller 0 Interrupt 1 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 2" group.long 0x140++0xb line.long 0x00 "PL_MSICI2_ENB,MSI Controller Interrupt 2 Enable" bitfld.long 0x00 31. " MSICI2_ENB[31] ,MSI Controller 31 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI2_ENB[30] ,MSI Controller 30 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI2_ENB[29] ,MSI Controller 29 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI2_ENB[28] ,MSI Controller 28 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI2_ENB[27] ,MSI Controller 27 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI2_ENB[26] ,MSI Controller 26 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI2_ENB[25] ,MSI Controller 25 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI2_ENB[24] ,MSI Controller 24 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI2_ENB[23] ,MSI Controller 23 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI2_ENB[22] ,MSI Controller 22 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI2_ENB[21] ,MSI Controller 21 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI2_ENB[20] ,MSI Controller 20 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI2_ENB[19] ,MSI Controller 19 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI2_ENB[18] ,MSI Controller 18 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI2_ENB[17] ,MSI Controller 17 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI2_ENB[16] ,MSI Controller 16 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI2_ENB[15] ,MSI Controller 15 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI2_ENB[14] ,MSI Controller 14 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI2_ENB[13] ,MSI Controller 13 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI2_ENB[12] ,MSI Controller 12 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI2_ENB[11] ,MSI Controller 11 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI2_ENB[10] ,MSI Controller 10 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI2_ENB[9] ,MSI Controller 9 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI2_ENB[8] ,MSI Controller 8 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI2_ENB[7] ,MSI Controller 7 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI2_ENB[6] ,MSI Controller 6 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI2_ENB[5] ,MSI Controller 5 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI2_ENB[4] ,MSI Controller 4 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI2_ENB[3] ,MSI Controller 3 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI2_ENB[2] ,MSI Controller 2 Interrupt 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI2_ENB[1] ,MSI Controller 1 Interrupt 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI2_ENB[0] ,MSI Controller 0 Interrupt 2 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI2_MASK,MSI Controller Interrupt 2 Mask" bitfld.long 0x04 31. " MSICI2_MASK[31] ,MSI Controller 31 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI2_MASK[30] ,MSI Controller 30 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI2_MASK[29] ,MSI Controller 29 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI2_MASK[28] ,MSI Controller 28 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI2_MASK[27] ,MSI Controller 27 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI2_MASK[26] ,MSI Controller 26 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI2_MASK[25] ,MSI Controller 25 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI2_MASK[24] ,MSI Controller 24 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI2_MASK[23] ,MSI Controller 23 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI2_MASK[22] ,MSI Controller 22 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI2_MASK[21] ,MSI Controller 21 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI2_MASK[20] ,MSI Controller 20 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI2_MASK[19] ,MSI Controller 19 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI2_MASK[18] ,MSI Controller 18 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI2_MASK[17] ,MSI Controller 17 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI2_MASK[16] ,MSI Controller 16 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI2_MASK[15] ,MSI Controller 15 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI2_MASK[14] ,MSI Controller 14 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI2_MASK[13] ,MSI Controller 13 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI2_MASK[12] ,MSI Controller 12 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI2_MASK[11] ,MSI Controller 11 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI2_MASK[10] ,MSI Controller 10 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI2_MASK[9] ,MSI Controller 9 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI2_MASK[8] ,MSI Controller 8 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI2_MASK[7] ,MSI Controller 7 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI2_MASK[6] ,MSI Controller 6 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI2_MASK[5] ,MSI Controller 5 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI2_MASK[4] ,MSI Controller 4 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI2_MASK[3] ,MSI Controller 3 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI2_MASK[2] ,MSI Controller 2 Interrupt 2 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI2_MASK[1] ,MSI Controller 1 Interrupt 2 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI2_MASK[0] ,MSI Controller 0 Interrupt 2 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI2_STAT,MSI Controller Interrupt 2 Status" eventfld.long 0x08 31. " MSICI2_STATUS[31] ,MSI Controller 31 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI2_STATUS[30] ,MSI Controller 30 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI2_STATUS[29] ,MSI Controller 29 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI2_STATUS[28] ,MSI Controller 28 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI2_STATUS[27] ,MSI Controller 27 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI2_STATUS[26] ,MSI Controller 26 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI2_STATUS[25] ,MSI Controller 25 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI2_STATUS[24] ,MSI Controller 24 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI2_STATUS[23] ,MSI Controller 23 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI2_STATUS[22] ,MSI Controller 22 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI2_STATUS[21] ,MSI Controller 21 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI2_STATUS[20] ,MSI Controller 20 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI2_STATUS[19] ,MSI Controller 19 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI2_STATUS[18] ,MSI Controller 18 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI2_STATUS[17] ,MSI Controller 17 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI2_STATUS[16] ,MSI Controller 16 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI2_STATUS[15] ,MSI Controller 15 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI2_STATUS[14] ,MSI Controller 14 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI2_STATUS[13] ,MSI Controller 13 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI2_STATUS[12] ,MSI Controller 12 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI2_STATUS[11] ,MSI Controller 11 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI2_STATUS[10] ,MSI Controller 10 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI2_STATUS[9] ,MSI Controller 9 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI2_STATUS[8] ,MSI Controller 8 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI2_STATUS[7] ,MSI Controller 7 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI2_STATUS[6] ,MSI Controller 6 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI2_STATUS[5] ,MSI Controller 5 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI2_STATUS[4] ,MSI Controller 4 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI2_STATUS[3] ,MSI Controller 3 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI2_STATUS[2] ,MSI Controller 2 Interrupt 2 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI2_STATUS[1] ,MSI Controller 1 Interrupt 2 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI2_STATUS[0] ,MSI Controller 0 Interrupt 2 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 3" group.long 0x14C++0xb line.long 0x00 "PL_MSICI3_ENB,MSI Controller Interrupt 3 Enable" bitfld.long 0x00 31. " MSICI3_ENB[31] ,MSI Controller 31 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI3_ENB[30] ,MSI Controller 30 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI3_ENB[29] ,MSI Controller 29 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI3_ENB[28] ,MSI Controller 28 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI3_ENB[27] ,MSI Controller 27 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI3_ENB[26] ,MSI Controller 26 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI3_ENB[25] ,MSI Controller 25 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI3_ENB[24] ,MSI Controller 24 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI3_ENB[23] ,MSI Controller 23 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI3_ENB[22] ,MSI Controller 22 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI3_ENB[21] ,MSI Controller 21 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI3_ENB[20] ,MSI Controller 20 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI3_ENB[19] ,MSI Controller 19 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI3_ENB[18] ,MSI Controller 18 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI3_ENB[17] ,MSI Controller 17 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI3_ENB[16] ,MSI Controller 16 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI3_ENB[15] ,MSI Controller 15 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI3_ENB[14] ,MSI Controller 14 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI3_ENB[13] ,MSI Controller 13 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI3_ENB[12] ,MSI Controller 12 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI3_ENB[11] ,MSI Controller 11 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI3_ENB[10] ,MSI Controller 10 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI3_ENB[9] ,MSI Controller 9 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI3_ENB[8] ,MSI Controller 8 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI3_ENB[7] ,MSI Controller 7 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI3_ENB[6] ,MSI Controller 6 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI3_ENB[5] ,MSI Controller 5 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI3_ENB[4] ,MSI Controller 4 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI3_ENB[3] ,MSI Controller 3 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI3_ENB[2] ,MSI Controller 2 Interrupt 3 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI3_ENB[1] ,MSI Controller 1 Interrupt 3 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI3_ENB[0] ,MSI Controller 0 Interrupt 3 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI3_MASK,MSI Controller Interrupt 3 Mask" bitfld.long 0x04 31. " MSICI3_MASK[31] ,MSI Controller 31 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI3_MASK[30] ,MSI Controller 30 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI3_MASK[29] ,MSI Controller 29 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI3_MASK[28] ,MSI Controller 28 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI3_MASK[27] ,MSI Controller 27 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI3_MASK[26] ,MSI Controller 26 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI3_MASK[25] ,MSI Controller 25 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI3_MASK[24] ,MSI Controller 24 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI3_MASK[23] ,MSI Controller 23 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI3_MASK[22] ,MSI Controller 22 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI3_MASK[21] ,MSI Controller 21 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI3_MASK[20] ,MSI Controller 20 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI3_MASK[19] ,MSI Controller 19 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI3_MASK[18] ,MSI Controller 18 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI3_MASK[17] ,MSI Controller 17 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI3_MASK[16] ,MSI Controller 16 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI3_MASK[15] ,MSI Controller 15 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI3_MASK[14] ,MSI Controller 14 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI3_MASK[13] ,MSI Controller 13 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI3_MASK[12] ,MSI Controller 12 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI3_MASK[11] ,MSI Controller 11 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI3_MASK[10] ,MSI Controller 10 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI3_MASK[9] ,MSI Controller 9 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI3_MASK[8] ,MSI Controller 8 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI3_MASK[7] ,MSI Controller 7 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI3_MASK[6] ,MSI Controller 6 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI3_MASK[5] ,MSI Controller 5 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI3_MASK[4] ,MSI Controller 4 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI3_MASK[3] ,MSI Controller 3 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI3_MASK[2] ,MSI Controller 2 Interrupt 3 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI3_MASK[1] ,MSI Controller 1 Interrupt 3 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI3_MASK[0] ,MSI Controller 0 Interrupt 3 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI3_STAT,MSI Controller Interrupt 3 Status" eventfld.long 0x08 31. " MSICI3_STATUS[31] ,MSI Controller 31 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI3_STATUS[30] ,MSI Controller 30 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI3_STATUS[29] ,MSI Controller 29 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI3_STATUS[28] ,MSI Controller 28 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI3_STATUS[27] ,MSI Controller 27 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI3_STATUS[26] ,MSI Controller 26 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI3_STATUS[25] ,MSI Controller 25 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI3_STATUS[24] ,MSI Controller 24 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI3_STATUS[23] ,MSI Controller 23 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI3_STATUS[22] ,MSI Controller 22 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI3_STATUS[21] ,MSI Controller 21 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI3_STATUS[20] ,MSI Controller 20 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI3_STATUS[19] ,MSI Controller 19 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI3_STATUS[18] ,MSI Controller 18 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI3_STATUS[17] ,MSI Controller 17 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI3_STATUS[16] ,MSI Controller 16 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI3_STATUS[15] ,MSI Controller 15 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI3_STATUS[14] ,MSI Controller 14 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI3_STATUS[13] ,MSI Controller 13 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI3_STATUS[12] ,MSI Controller 12 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI3_STATUS[11] ,MSI Controller 11 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI3_STATUS[10] ,MSI Controller 10 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI3_STATUS[9] ,MSI Controller 9 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI3_STATUS[8] ,MSI Controller 8 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI3_STATUS[7] ,MSI Controller 7 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI3_STATUS[6] ,MSI Controller 6 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI3_STATUS[5] ,MSI Controller 5 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI3_STATUS[4] ,MSI Controller 4 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI3_STATUS[3] ,MSI Controller 3 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI3_STATUS[2] ,MSI Controller 2 Interrupt 3 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI3_STATUS[1] ,MSI Controller 1 Interrupt 3 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI3_STATUS[0] ,MSI Controller 0 Interrupt 3 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 4" group.long 0x158++0xb line.long 0x00 "PL_MSICI4_ENB,MSI Controller Interrupt 4 Enable" bitfld.long 0x00 31. " MSICI4_ENB[31] ,MSI Controller 31 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI4_ENB[30] ,MSI Controller 30 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI4_ENB[29] ,MSI Controller 29 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI4_ENB[28] ,MSI Controller 28 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI4_ENB[27] ,MSI Controller 27 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI4_ENB[26] ,MSI Controller 26 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI4_ENB[25] ,MSI Controller 25 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI4_ENB[24] ,MSI Controller 24 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI4_ENB[23] ,MSI Controller 23 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI4_ENB[22] ,MSI Controller 22 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI4_ENB[21] ,MSI Controller 21 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI4_ENB[20] ,MSI Controller 20 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI4_ENB[19] ,MSI Controller 19 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI4_ENB[18] ,MSI Controller 18 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI4_ENB[17] ,MSI Controller 17 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI4_ENB[16] ,MSI Controller 16 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI4_ENB[15] ,MSI Controller 15 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI4_ENB[14] ,MSI Controller 14 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI4_ENB[13] ,MSI Controller 13 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI4_ENB[12] ,MSI Controller 12 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI4_ENB[11] ,MSI Controller 11 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI4_ENB[10] ,MSI Controller 10 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI4_ENB[9] ,MSI Controller 9 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI4_ENB[8] ,MSI Controller 8 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI4_ENB[7] ,MSI Controller 7 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI4_ENB[6] ,MSI Controller 6 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI4_ENB[5] ,MSI Controller 5 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI4_ENB[4] ,MSI Controller 4 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI4_ENB[3] ,MSI Controller 3 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI4_ENB[2] ,MSI Controller 2 Interrupt 4 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI4_ENB[1] ,MSI Controller 1 Interrupt 4 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI4_ENB[0] ,MSI Controller 0 Interrupt 4 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI4_MASK,MSI Controller Interrupt 4 Mask" bitfld.long 0x04 31. " MSICI4_MASK[31] ,MSI Controller 31 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI4_MASK[30] ,MSI Controller 30 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI4_MASK[29] ,MSI Controller 29 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI4_MASK[28] ,MSI Controller 28 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI4_MASK[27] ,MSI Controller 27 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI4_MASK[26] ,MSI Controller 26 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI4_MASK[25] ,MSI Controller 25 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI4_MASK[24] ,MSI Controller 24 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI4_MASK[23] ,MSI Controller 23 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI4_MASK[22] ,MSI Controller 22 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI4_MASK[21] ,MSI Controller 21 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI4_MASK[20] ,MSI Controller 20 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI4_MASK[19] ,MSI Controller 19 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI4_MASK[18] ,MSI Controller 18 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI4_MASK[17] ,MSI Controller 17 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI4_MASK[16] ,MSI Controller 16 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI4_MASK[15] ,MSI Controller 15 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI4_MASK[14] ,MSI Controller 14 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI4_MASK[13] ,MSI Controller 13 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI4_MASK[12] ,MSI Controller 12 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI4_MASK[11] ,MSI Controller 11 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI4_MASK[10] ,MSI Controller 10 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI4_MASK[9] ,MSI Controller 9 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI4_MASK[8] ,MSI Controller 8 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI4_MASK[7] ,MSI Controller 7 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI4_MASK[6] ,MSI Controller 6 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI4_MASK[5] ,MSI Controller 5 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI4_MASK[4] ,MSI Controller 4 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI4_MASK[3] ,MSI Controller 3 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI4_MASK[2] ,MSI Controller 2 Interrupt 4 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI4_MASK[1] ,MSI Controller 1 Interrupt 4 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI4_MASK[0] ,MSI Controller 0 Interrupt 4 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI4_STAT,MSI Controller Interrupt 4 Status" eventfld.long 0x08 31. " MSICI4_STATUS[31] ,MSI Controller 31 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI4_STATUS[30] ,MSI Controller 30 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI4_STATUS[29] ,MSI Controller 29 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI4_STATUS[28] ,MSI Controller 28 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI4_STATUS[27] ,MSI Controller 27 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI4_STATUS[26] ,MSI Controller 26 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI4_STATUS[25] ,MSI Controller 25 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI4_STATUS[24] ,MSI Controller 24 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI4_STATUS[23] ,MSI Controller 23 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI4_STATUS[22] ,MSI Controller 22 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI4_STATUS[21] ,MSI Controller 21 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI4_STATUS[20] ,MSI Controller 20 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI4_STATUS[19] ,MSI Controller 19 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI4_STATUS[18] ,MSI Controller 18 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI4_STATUS[17] ,MSI Controller 17 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI4_STATUS[16] ,MSI Controller 16 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI4_STATUS[15] ,MSI Controller 15 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI4_STATUS[14] ,MSI Controller 14 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI4_STATUS[13] ,MSI Controller 13 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI4_STATUS[12] ,MSI Controller 12 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI4_STATUS[11] ,MSI Controller 11 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI4_STATUS[10] ,MSI Controller 10 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI4_STATUS[9] ,MSI Controller 9 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI4_STATUS[8] ,MSI Controller 8 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI4_STATUS[7] ,MSI Controller 7 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI4_STATUS[6] ,MSI Controller 6 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI4_STATUS[5] ,MSI Controller 5 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI4_STATUS[4] ,MSI Controller 4 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI4_STATUS[3] ,MSI Controller 3 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI4_STATUS[2] ,MSI Controller 2 Interrupt 4 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI4_STATUS[1] ,MSI Controller 1 Interrupt 4 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI4_STATUS[0] ,MSI Controller 0 Interrupt 4 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 5" group.long 0x164++0xb line.long 0x00 "PL_MSICI5_ENB,MSI Controller Interrupt 5 Enable" bitfld.long 0x00 31. " MSICI5_ENB[31] ,MSI Controller 31 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI5_ENB[30] ,MSI Controller 30 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI5_ENB[29] ,MSI Controller 29 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI5_ENB[28] ,MSI Controller 28 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI5_ENB[27] ,MSI Controller 27 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI5_ENB[26] ,MSI Controller 26 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI5_ENB[25] ,MSI Controller 25 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI5_ENB[24] ,MSI Controller 24 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI5_ENB[23] ,MSI Controller 23 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI5_ENB[22] ,MSI Controller 22 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI5_ENB[21] ,MSI Controller 21 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI5_ENB[20] ,MSI Controller 20 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI5_ENB[19] ,MSI Controller 19 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI5_ENB[18] ,MSI Controller 18 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI5_ENB[17] ,MSI Controller 17 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI5_ENB[16] ,MSI Controller 16 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI5_ENB[15] ,MSI Controller 15 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI5_ENB[14] ,MSI Controller 14 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI5_ENB[13] ,MSI Controller 13 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI5_ENB[12] ,MSI Controller 12 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI5_ENB[11] ,MSI Controller 11 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI5_ENB[10] ,MSI Controller 10 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI5_ENB[9] ,MSI Controller 9 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI5_ENB[8] ,MSI Controller 8 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI5_ENB[7] ,MSI Controller 7 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI5_ENB[6] ,MSI Controller 6 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI5_ENB[5] ,MSI Controller 5 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI5_ENB[4] ,MSI Controller 4 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI5_ENB[3] ,MSI Controller 3 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI5_ENB[2] ,MSI Controller 2 Interrupt 5 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI5_ENB[1] ,MSI Controller 1 Interrupt 5 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI5_ENB[0] ,MSI Controller 0 Interrupt 5 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI5_MASK,MSI Controller Interrupt 5 Mask" bitfld.long 0x04 31. " MSICI5_MASK[31] ,MSI Controller 31 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI5_MASK[30] ,MSI Controller 30 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI5_MASK[29] ,MSI Controller 29 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI5_MASK[28] ,MSI Controller 28 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI5_MASK[27] ,MSI Controller 27 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI5_MASK[26] ,MSI Controller 26 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI5_MASK[25] ,MSI Controller 25 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI5_MASK[24] ,MSI Controller 24 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI5_MASK[23] ,MSI Controller 23 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI5_MASK[22] ,MSI Controller 22 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI5_MASK[21] ,MSI Controller 21 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI5_MASK[20] ,MSI Controller 20 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI5_MASK[19] ,MSI Controller 19 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI5_MASK[18] ,MSI Controller 18 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI5_MASK[17] ,MSI Controller 17 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI5_MASK[16] ,MSI Controller 16 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI5_MASK[15] ,MSI Controller 15 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI5_MASK[14] ,MSI Controller 14 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI5_MASK[13] ,MSI Controller 13 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI5_MASK[12] ,MSI Controller 12 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI5_MASK[11] ,MSI Controller 11 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI5_MASK[10] ,MSI Controller 10 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI5_MASK[9] ,MSI Controller 9 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI5_MASK[8] ,MSI Controller 8 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI5_MASK[7] ,MSI Controller 7 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI5_MASK[6] ,MSI Controller 6 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI5_MASK[5] ,MSI Controller 5 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI5_MASK[4] ,MSI Controller 4 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI5_MASK[3] ,MSI Controller 3 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI5_MASK[2] ,MSI Controller 2 Interrupt 5 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI5_MASK[1] ,MSI Controller 1 Interrupt 5 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI5_MASK[0] ,MSI Controller 0 Interrupt 5 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI5_STAT,MSI Controller Interrupt 5 Status" eventfld.long 0x08 31. " MSICI5_STATUS[31] ,MSI Controller 31 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI5_STATUS[30] ,MSI Controller 30 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI5_STATUS[29] ,MSI Controller 29 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI5_STATUS[28] ,MSI Controller 28 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI5_STATUS[27] ,MSI Controller 27 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI5_STATUS[26] ,MSI Controller 26 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI5_STATUS[25] ,MSI Controller 25 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI5_STATUS[24] ,MSI Controller 24 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI5_STATUS[23] ,MSI Controller 23 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI5_STATUS[22] ,MSI Controller 22 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI5_STATUS[21] ,MSI Controller 21 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI5_STATUS[20] ,MSI Controller 20 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI5_STATUS[19] ,MSI Controller 19 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI5_STATUS[18] ,MSI Controller 18 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI5_STATUS[17] ,MSI Controller 17 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI5_STATUS[16] ,MSI Controller 16 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI5_STATUS[15] ,MSI Controller 15 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI5_STATUS[14] ,MSI Controller 14 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI5_STATUS[13] ,MSI Controller 13 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI5_STATUS[12] ,MSI Controller 12 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI5_STATUS[11] ,MSI Controller 11 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI5_STATUS[10] ,MSI Controller 10 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI5_STATUS[9] ,MSI Controller 9 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI5_STATUS[8] ,MSI Controller 8 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI5_STATUS[7] ,MSI Controller 7 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI5_STATUS[6] ,MSI Controller 6 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI5_STATUS[5] ,MSI Controller 5 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI5_STATUS[4] ,MSI Controller 4 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI5_STATUS[3] ,MSI Controller 3 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI5_STATUS[2] ,MSI Controller 2 Interrupt 5 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI5_STATUS[1] ,MSI Controller 1 Interrupt 5 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI5_STATUS[0] ,MSI Controller 0 Interrupt 5 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 6" group.long 0x170++0xb line.long 0x00 "PL_MSICI6_ENB,MSI Controller Interrupt 6 Enable" bitfld.long 0x00 31. " MSICI6_ENB[31] ,MSI Controller 31 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI6_ENB[30] ,MSI Controller 30 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI6_ENB[29] ,MSI Controller 29 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI6_ENB[28] ,MSI Controller 28 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI6_ENB[27] ,MSI Controller 27 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI6_ENB[26] ,MSI Controller 26 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI6_ENB[25] ,MSI Controller 25 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI6_ENB[24] ,MSI Controller 24 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI6_ENB[23] ,MSI Controller 23 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI6_ENB[22] ,MSI Controller 22 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI6_ENB[21] ,MSI Controller 21 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI6_ENB[20] ,MSI Controller 20 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI6_ENB[19] ,MSI Controller 19 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI6_ENB[18] ,MSI Controller 18 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI6_ENB[17] ,MSI Controller 17 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI6_ENB[16] ,MSI Controller 16 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI6_ENB[15] ,MSI Controller 15 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI6_ENB[14] ,MSI Controller 14 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI6_ENB[13] ,MSI Controller 13 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI6_ENB[12] ,MSI Controller 12 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI6_ENB[11] ,MSI Controller 11 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI6_ENB[10] ,MSI Controller 10 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI6_ENB[9] ,MSI Controller 9 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI6_ENB[8] ,MSI Controller 8 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI6_ENB[7] ,MSI Controller 7 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI6_ENB[6] ,MSI Controller 6 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI6_ENB[5] ,MSI Controller 5 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI6_ENB[4] ,MSI Controller 4 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI6_ENB[3] ,MSI Controller 3 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI6_ENB[2] ,MSI Controller 2 Interrupt 6 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI6_ENB[1] ,MSI Controller 1 Interrupt 6 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI6_ENB[0] ,MSI Controller 0 Interrupt 6 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI6_MASK,MSI Controller Interrupt 6 Mask" bitfld.long 0x04 31. " MSICI6_MASK[31] ,MSI Controller 31 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI6_MASK[30] ,MSI Controller 30 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI6_MASK[29] ,MSI Controller 29 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI6_MASK[28] ,MSI Controller 28 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI6_MASK[27] ,MSI Controller 27 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI6_MASK[26] ,MSI Controller 26 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI6_MASK[25] ,MSI Controller 25 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI6_MASK[24] ,MSI Controller 24 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI6_MASK[23] ,MSI Controller 23 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI6_MASK[22] ,MSI Controller 22 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI6_MASK[21] ,MSI Controller 21 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI6_MASK[20] ,MSI Controller 20 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI6_MASK[19] ,MSI Controller 19 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI6_MASK[18] ,MSI Controller 18 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI6_MASK[17] ,MSI Controller 17 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI6_MASK[16] ,MSI Controller 16 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI6_MASK[15] ,MSI Controller 15 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI6_MASK[14] ,MSI Controller 14 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI6_MASK[13] ,MSI Controller 13 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI6_MASK[12] ,MSI Controller 12 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI6_MASK[11] ,MSI Controller 11 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI6_MASK[10] ,MSI Controller 10 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI6_MASK[9] ,MSI Controller 9 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI6_MASK[8] ,MSI Controller 8 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI6_MASK[7] ,MSI Controller 7 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI6_MASK[6] ,MSI Controller 6 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI6_MASK[5] ,MSI Controller 5 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI6_MASK[4] ,MSI Controller 4 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI6_MASK[3] ,MSI Controller 3 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI6_MASK[2] ,MSI Controller 2 Interrupt 6 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI6_MASK[1] ,MSI Controller 1 Interrupt 6 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI6_MASK[0] ,MSI Controller 0 Interrupt 6 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI6_STAT,MSI Controller Interrupt 6 Status" eventfld.long 0x08 31. " MSICI6_STATUS[31] ,MSI Controller 31 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI6_STATUS[30] ,MSI Controller 30 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI6_STATUS[29] ,MSI Controller 29 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI6_STATUS[28] ,MSI Controller 28 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI6_STATUS[27] ,MSI Controller 27 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI6_STATUS[26] ,MSI Controller 26 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI6_STATUS[25] ,MSI Controller 25 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI6_STATUS[24] ,MSI Controller 24 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI6_STATUS[23] ,MSI Controller 23 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI6_STATUS[22] ,MSI Controller 22 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI6_STATUS[21] ,MSI Controller 21 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI6_STATUS[20] ,MSI Controller 20 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI6_STATUS[19] ,MSI Controller 19 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI6_STATUS[18] ,MSI Controller 18 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI6_STATUS[17] ,MSI Controller 17 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI6_STATUS[16] ,MSI Controller 16 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI6_STATUS[15] ,MSI Controller 15 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI6_STATUS[14] ,MSI Controller 14 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI6_STATUS[13] ,MSI Controller 13 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI6_STATUS[12] ,MSI Controller 12 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI6_STATUS[11] ,MSI Controller 11 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI6_STATUS[10] ,MSI Controller 10 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI6_STATUS[9] ,MSI Controller 9 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI6_STATUS[8] ,MSI Controller 8 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI6_STATUS[7] ,MSI Controller 7 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI6_STATUS[6] ,MSI Controller 6 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI6_STATUS[5] ,MSI Controller 5 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI6_STATUS[4] ,MSI Controller 4 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI6_STATUS[3] ,MSI Controller 3 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI6_STATUS[2] ,MSI Controller 2 Interrupt 6 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI6_STATUS[1] ,MSI Controller 1 Interrupt 6 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI6_STATUS[0] ,MSI Controller 0 Interrupt 6 Status" "No interrupt,Interrupt" tree.end tree "MSI Controller Interrupt 7" group.long 0x17C++0xb line.long 0x00 "PL_MSICI7_ENB,MSI Controller Interrupt 7 Enable" bitfld.long 0x00 31. " MSICI7_ENB[31] ,MSI Controller 31 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MSICI7_ENB[30] ,MSI Controller 30 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 29. " MSICI7_ENB[29] ,MSI Controller 29 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MSICI7_ENB[28] ,MSI Controller 28 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 27. " MSICI7_ENB[27] ,MSI Controller 27 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 26. " MSICI7_ENB[26] ,MSI Controller 26 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MSICI7_ENB[25] ,MSI Controller 25 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MSICI7_ENB[24] ,MSI Controller 24 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 23. " MSICI7_ENB[23] ,MSI Controller 23 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MSICI7_ENB[22] ,MSI Controller 22 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 21. " MSICI7_ENB[21] ,MSI Controller 21 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MSICI7_ENB[20] ,MSI Controller 20 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MSICI7_ENB[19] ,MSI Controller 19 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 18. " MSICI7_ENB[18] ,MSI Controller 18 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 17. " MSICI7_ENB[17] ,MSI Controller 17 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MSICI7_ENB[16] ,MSI Controller 16 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 15. " MSICI7_ENB[15] ,MSI Controller 15 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 14. " MSICI7_ENB[14] ,MSI Controller 14 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSICI7_ENB[13] ,MSI Controller 13 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 12. " MSICI7_ENB[12] ,MSI Controller 12 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 11. " MSICI7_ENB[11] ,MSI Controller 11 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MSICI7_ENB[10] ,MSI Controller 10 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 9. " MSICI7_ENB[9] ,MSI Controller 9 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 8. " MSICI7_ENB[8] ,MSI Controller 8 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MSICI7_ENB[7] ,MSI Controller 7 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 6. " MSICI7_ENB[6] ,MSI Controller 6 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MSICI7_ENB[5] ,MSI Controller 5 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MSICI7_ENB[4] ,MSI Controller 4 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSICI7_ENB[3] ,MSI Controller 3 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSICI7_ENB[2] ,MSI Controller 2 Interrupt 7 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MSICI7_ENB[1] ,MSI Controller 1 Interrupt 7 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSICI7_ENB[0] ,MSI Controller 0 Interrupt 7 Enable" "Disabled,Enabled" line.long 0x04 "PL_MSICI7_MASK,MSI Controller Interrupt 7 Mask" bitfld.long 0x04 31. " MSICI7_MASK[31] ,MSI Controller 31 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 30. " MSICI7_MASK[30] ,MSI Controller 30 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 29. " MSICI7_MASK[29] ,MSI Controller 29 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 28. " MSICI7_MASK[28] ,MSI Controller 28 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 27. " MSICI7_MASK[27] ,MSI Controller 27 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 26. " MSICI7_MASK[26] ,MSI Controller 26 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 25. " MSICI7_MASK[25] ,MSI Controller 25 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 24. " MSICI7_MASK[24] ,MSI Controller 24 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 23. " MSICI7_MASK[23] ,MSI Controller 23 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " MSICI7_MASK[22] ,MSI Controller 22 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 21. " MSICI7_MASK[21] ,MSI Controller 21 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 20. " MSICI7_MASK[20] ,MSI Controller 20 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 19. " MSICI7_MASK[19] ,MSI Controller 19 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 18. " MSICI7_MASK[18] ,MSI Controller 18 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 17. " MSICI7_MASK[17] ,MSI Controller 17 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " MSICI7_MASK[16] ,MSI Controller 16 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 15. " MSICI7_MASK[15] ,MSI Controller 15 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 14. " MSICI7_MASK[14] ,MSI Controller 14 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " MSICI7_MASK[13] ,MSI Controller 13 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 12. " MSICI7_MASK[12] ,MSI Controller 12 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 11. " MSICI7_MASK[11] ,MSI Controller 11 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " MSICI7_MASK[10] ,MSI Controller 10 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 9. " MSICI7_MASK[9] ,MSI Controller 9 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 8. " MSICI7_MASK[8] ,MSI Controller 8 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " MSICI7_MASK[7] ,MSI Controller 7 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 6. " MSICI7_MASK[6] ,MSI Controller 6 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 5. " MSICI7_MASK[5] ,MSI Controller 5 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " MSICI7_MASK[4] ,MSI Controller 4 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 3. " MSICI7_MASK[3] ,MSI Controller 3 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 2. " MSICI7_MASK[2] ,MSI Controller 2 Interrupt 7 Mask" "Not masked,Masked" textline " " bitfld.long 0x04 1. " MSICI7_MASK[1] ,MSI Controller 1 Interrupt 7 Mask" "Not masked,Masked" bitfld.long 0x04 0. " MSICI7_MASK[0] ,MSI Controller 0 Interrupt 7 Mask" "Not masked,Masked" line.long 0x08 "PL_MSICI7_STAT,MSI Controller Interrupt 7 Status" eventfld.long 0x08 31. " MSICI7_STATUS[31] ,MSI Controller 31 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 30. " MSICI7_STATUS[30] ,MSI Controller 30 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 29. " MSICI7_STATUS[29] ,MSI Controller 29 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 28. " MSICI7_STATUS[28] ,MSI Controller 28 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 27. " MSICI7_STATUS[27] ,MSI Controller 27 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 26. " MSICI7_STATUS[26] ,MSI Controller 26 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 25. " MSICI7_STATUS[25] ,MSI Controller 25 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 24. " MSICI7_STATUS[24] ,MSI Controller 24 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 23. " MSICI7_STATUS[23] ,MSI Controller 23 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 22. " MSICI7_STATUS[22] ,MSI Controller 22 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 21. " MSICI7_STATUS[21] ,MSI Controller 21 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 20. " MSICI7_STATUS[20] ,MSI Controller 20 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 19. " MSICI7_STATUS[19] ,MSI Controller 19 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 18. " MSICI7_STATUS[18] ,MSI Controller 18 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 17. " MSICI7_STATUS[17] ,MSI Controller 17 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 16. " MSICI7_STATUS[16] ,MSI Controller 16 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 15. " MSICI7_STATUS[15] ,MSI Controller 15 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 14. " MSICI7_STATUS[14] ,MSI Controller 14 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 13. " MSICI7_STATUS[13] ,MSI Controller 13 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 12. " MSICI7_STATUS[12] ,MSI Controller 12 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 11. " MSICI7_STATUS[11] ,MSI Controller 11 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 10. " MSICI7_STATUS[10] ,MSI Controller 10 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 9. " MSICI7_STATUS[9] ,MSI Controller 9 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 8. " MSICI7_STATUS[8] ,MSI Controller 8 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 7. " MSICI7_STATUS[7] ,MSI Controller 7 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 6. " MSICI7_STATUS[6] ,MSI Controller 6 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 5. " MSICI7_STATUS[5] ,MSI Controller 5 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 4. " MSICI7_STATUS[4] ,MSI Controller 4 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 3. " MSICI7_STATUS[3] ,MSI Controller 3 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 2. " MSICI7_STATUS[2] ,MSI Controller 2 Interrupt 7 Status" "No interrupt,Interrupt" textline " " eventfld.long 0x08 1. " MSICI7_STATUS[1] ,MSI Controller 1 Interrupt 7 Status" "No interrupt,Interrupt" eventfld.long 0x08 0. " MSICI7_STATUS[0] ,MSI Controller 0 Interrupt 7 Status" "No interrupt,Interrupt" tree.end textline " " group.long 0x188++0x03 line.long 0x00 "PL_MSICGPIO,MSI Controller General Purpose IO Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) width 23. textline " " group.long 0x1B8++0x03 line.long 0x00 "PL_PIPE_LOOPBACK_CTRL,PIPE Loopback Control Register" bitfld.long 0x00 31. " PIPE_LOOPBACK_EN ,PIPE Loopback Enable" "0,1" textline " " width 16. endif group.long 0x200++0x7 line.long 0x00 "PL_IATUVR,iATU Viewport Register" bitfld.long 0x00 31. " RD ,Region Direction" "Outbound,Inbound" bitfld.long 0x00 0.--3. " RI ,Region Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "PL_IATURC1,iATU Region Control 1 Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")||cpuis("IMX6DUAL")||cpuis("IMX6QUAD")||cpuis("IMX6SOLO")||cpuis("IMX6DUALLITE")) bitfld.long 0x04 20.--24. " FN ,Function Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " AT , AT" "0,1,2,3" textline " " else bitfld.long 0x04 20.--22. " FN ,Function Number" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x04 9.--10. " ATTR ,ATTR" "0,1,2,3" bitfld.long 0x04 8. " TD ,TD" "0,1" textline " " bitfld.long 0x04 5.--7. " TC ,TC" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--4. " TYPE ,TYPE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if ((per.l(ad:0x01000700+0x200)&0x80000000)==0x80000000) group.long 0x208++0x3 line.long 0x00 "PL_IATURC2,iATU Region Control 2 Register" bitfld.long 0x00 31. " RE ,Region Enable" "Disabled,Enabled" bitfld.long 0x00 30. " MM ,Match Mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID" bitfld.long 0x00 29. " IM ,Invert Mode" "Not inverted,Inverted" textline " " bitfld.long 0x00 28. " CSM ,CFG Shift Mode" "Off,On" bitfld.long 0x00 27. " FTMM ,Fuzzy Type Match Mode" "Not relaxed,Matching relaxed" bitfld.long 0x00 24.--25. " RESPONSE_CODE ,Response Code" "Normal,Unsupported Request,Completer Abort,?..." textline " " bitfld.long 0x00 21. " MCM_ENB ,Message Code Match Enable" "Disabled,Enabled" bitfld.long 0x00 20. " VFNM_ENB ,Virtual Function Number Match Enable" "Disabled,Enabled" bitfld.long 0x00 19. " FNM_ENB ,Function Number Match Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " AME ,AT Match Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AME ,ATTR Match Enable" "Disabled,Enabled" bitfld.long 0x00 15. " TME ,TD Match Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TME ,TC Match Enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " BN ,BAR Number" "BAR#0,BAR#1,BAR#2,BAR#3,BAR#4,BAR#5,ROM,?..." hexmask.long.byte 0x00 0.--7. 1. " MC ,Message Code" else group.long 0x208++0x3 line.long 0x00 "PL_IATURC2,iATU Region Control 2 Register" bitfld.long 0x00 31. " RE ,Region Enable" "Disabled,Enabled" bitfld.long 0x00 29. " IM ,Invert Mode" "Not inverted,Inverted" bitfld.long 0x00 28. " CSM ,CFG Shift Mode" "Off,On" textline " " hexmask.long.byte 0x00 0.--7. 1. " MC ,Message Code" endif group.long 0x20C++0x13 line.long 0x00 "PL_IATURLBA,iATU Region Lower Base Address Register" hexmask.long.word 0x00 16.--31. 1. " ADDRESS_UPPER ,Forms bits [31:16] of the start address of the address region to be translated" hexmask.long.word 0x00 0.--15. 1. " ADDRESS_LOWER ,Forms bits [15:0] of the start address of the address region to be translated" line.long 0x04 "PL_IATURUBA,iATU Region Upper Base Address Register" line.long 0x08 "PL_IATURLA,iATU Region Limit Address Register" hexmask.long.word 0x08 16.--31. 1. " ADDRESS_UPPER ,Forms bits [31:16] of the end address of the address region to be translated" hexmask.long.word 0x08 0.--15. 1. " ADDRESS_LOWER ,Forms bits [15:0] of the end address of the address region to be translated" line.long 0x0C "PL_IATURLTA,iATU Region Lower Target Address Register" hexmask.long.word 0x0C 16.--31. 1. " ADDRESS_UPPER ,Forms bits [31:16] of the of the new address of the translated region" hexmask.long.word 0x0C 0.--15. 1. " ADDRESS_LOWER ,Forms bits [15:0] of the start address of the new address of the translated region" line.long 0x10 "PL_IATURUTA,iATU Region Upper Target Address Register" sif (cpuis("IMX6SOLOX-CA9")||cpuis("IMX6SOLOX-CM4")) if ((per.l(ad:0x01000700+0x200)&0x80000000)==0x80000000) group.long 0x220++0x3 line.long 0x00 "PL_IATURC3,iATU Region Control 3 Register" hexmask.long.byte 0x00 1.--8. 1. " VFN ,Virtual Function Number" bitfld.long 0x00 0. " VFA ,Virtual Function Active" "0,1" else group.long 0x220++0x3 line.long 0x00 "PL_IATURC3,iATU Region Control 3 Register" hexmask.long.byte 0x00 1.--8. 1. " VFN ,Virtual Function Number" endif rgroup.long 0x430++0x03 line.long 0x00 "PL_LTR_LATENCY,Latency Tolerance Reporting (LTR) Register" bitfld.long 0x00 31. " NO_SNOOP_LAT_REQ ,No Snoop Latency Requirement" "0,1" bitfld.long 0x00 26.--28. " NO_SNOOP_LAT_SCALE ,No Snoop Latency Scale" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 16.--25. 1. " NO_SNOOP_LAT_VALUE ,No Snoop Latency Value" textline " " bitfld.long 0x00 15. " SNOOP_LAT_REQ ,Snoop Latency Requirement" "0,1" bitfld.long 0x00 10.--12. " SNOOP_LAT_SCALE ,Snoop Latency Scale" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " SNOOP_LAT_VALUE ,Snoop Latency Value" endif width 0x0B tree.end tree.end endif tree "PMU (Power Management Unit)" base ad:0x020C8110 width 21. group.long 0x00++0x03 line.long 0x00 "PMU_REG_1P1,Regulator 1P1 Register" rbitfld.long 0x00 17. " OK_VDD1P1 ,Signals when the regulator output is ok" "Not ok,Ok" rbitfld.long 0x00 16. " BO_VDD1P1 ,Signals when a brownout is detected on the regulator output" "No brownout,Brownout" bitfld.long 0x00 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" ",,,,0.8V,0.825V,0.85V,0.875V,0.9V,0.925V,0.95V,0.975V,1V,1.025V,1.05V,1.075V,1.1V,1.125V,1.15V,1.175V,1.2V,1.225V,1.25V,1.275V,1.3V,1.325V,1.35V,1.375V,?..." textline " " bitfld.long 0x00 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage" "0V,0.25V,0.5V,0.75V,1V,1.25V,1.5V,1.75V" bitfld.long 0x00 3. " ENABLE_PULLDOWN ,Control bit to enable the pull-down circuitry in the regulator" "Disabled,Enabled" bitfld.long 0x00 2. " ENABLE_ILIMIT ,Control bit to enable the current-limit circuitry in the regulator" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ENABLE_BO ,Control bit to enable the brownout circuitry in the regulator" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_LINREG ,Control bit to enable the regulator output" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "PMU_REG_3P0,Regulator 3P0 Register" rbitfld.long 0x00 17. " OK_VDD3P0 ,Signals when the regulator output is ok" "Not ok,Ok" rbitfld.long 0x00 16. " BO_VDD3P0 ,Signals when a brownout is detected on the regulator output" "No brownout,Brownout" bitfld.long 0x00 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" "2.625V,2.65V,2.675V,2.7V,2.725V,2.75V,2.775V,2.8V,2.825V,2.85V,2.875V,2.9V,2.925V,2.95V,2.975V,3.0V,3.025V,3.05V,3.075V,3.1V,3.125V,3.15V,3.175V,3.2V,3.225V,3.25V,3.275V,3.3V,3.325V,3.35V,3.375V,3.4V" textline " " bitfld.long 0x00 7. " VBUS_SEL ,Select input voltage source for LDO_3P0 from either USB_H1_VBUS or USB_OTG_VBUS" "USB_H1_VBUS,USB_OTG_VBUS" bitfld.long 0x00 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage" "0V,0.25V,0.5V,0.75V,1V,1.25V,1.5V,1.75V" bitfld.long 0x00 2. " ENABLE_ILIMIT ,Control bit to enable the current-limit circuitry in the regulator" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ENABLE_BO ,Control bit to enable the brownout circuitry in the regulator" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_LINREG ,Control bit to enable the regulator output" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "PMU_REG_2P5,Regulator 2P5 Register" bitfld.long 0x00 18. " ENABLE_WEAK_LINREG ,Enables the weak 2p5 regulator" "Disabled,Enabled" rbitfld.long 0x00 17. " OK_VDD2P5 ,Signals when the regulator output is ok" "Not ok,Ok" rbitfld.long 0x00 16. " BO_VDD2P5 ,Signals when a brownout is detected on the regulator output" "No brownout,Brownout" textline " " bitfld.long 0x00 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" "2.1V,2.125V,2.15V,2.175V,2.2V,2.225V,2.25V,2.275V,2.3V,2.325V,2.35V,2.375V,2.4V,2.425V,2.45V,2.475V,2.5V,2.525V,2.55V,2.575V,2.6V,2.625V,2.65V,2.675V,2.7V,2.725V,2.75V,2.775V,2.8V,2.825V,2.85V,2.875V" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 7. " VBUS_SEL ,Select input voltage source for LDO_3P0 from either USB_H1_VBUS or USB_OTG_VBUS" "USB_H1_VBUS,USB_OTG_VBUS" textline " " endif bitfld.long 0x00 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage" "0V,0.25V,0.5V,0.75V,1V,1.25V,1.5V,1.75V" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 3. " ENABLE_PULLDOWN ,Control bit to enable the pull-down circuitry in the regulator" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " ENABLE_ILIMIT ,Control bit to enable the current-limit circuitry in the regulator" "Disabled,Enabled" bitfld.long 0x00 1. " ENABLE_BO ,Control bit to enable the brownout circuitry in the regulator" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_LINREG ,Control bit to enable the regulator output" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "PMU_REG_CORE,Digital Regulator Core Register" bitfld.long 0x00 29. " FET_ODRIVE ,Increases the gate drive on power gating fets to reduce leakage in the off state" "Not set,Set" bitfld.long 0x00 18.--22. " REG2_TARG ,Defines the target voltage for the SOC power domain" "Power gated off,0.725V,0.75V,0.775V,0.8V,0.825V,0.85V,0.875V,0.9V,0.925V,0.95V,0.975V,1V,1.025V,1.05V,1.075V,1.1V,1.125V,1.15V,1.175V,1.2V,1.225V,1.25V,1.275V,1.3V,1.325V,1.35V,1.375V,1.4V,1.425V,1.45V,Full on" bitfld.long 0x00 9.--13. " REG1_TARG ,Defines the target voltage for the VPU/GPU power domain" "Power gated off,0.725V,0.75V,0.775V,0.8V,0.825V,0.85V,0.875V,0.9V,0.925V,0.95V,0.975V,1V,1.025V,1.05V,1.075V,1.1V,1.125V,1.15V,1.175V,1.2V,1.225V,1.25V,1.275V,1.3V,1.325V,1.35V,1.375V,1.4V,1.425V,1.45V,Full on" textline " " bitfld.long 0x00 0.--4. " REG0_TRIG ,Defines the target voltage for the arm core power domain" "Power gated off,0.725V,0.75V,0.775V,0.8V,0.825V,0.85V,0.875V,0.9V,0.925V,0.95V,0.975V,1V,1.025V,1.05V,1.075V,1.1V,1.125V,1.15V,1.175V,1.2V,1.225V,1.25V,1.275V,1.3V,1.325V,1.35V,1.375V,1.4V,1.425V,1.45V,Full on" group.long 0x40++0x03 line.long 0x00 "PMU_MISC0,Miscellaneous Register 0" bitfld.long 0x00 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x00 25. " CLKGATE_CTRL ,Allows disabling the clock gate" "Allowed,Not allowed" bitfld.long 0x00 18.--19. " WBCP_VPW_THRESH ,Voltage that the pwell is charged pumped to" "Nominal,Increase by 25mV,Decrease by 25mV,Decrease by 50mV" textline " " bitfld.long 0x00 17. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 16. " OSC_XTALOK ,Signals that the output of the 24MHz crystal oscillator is stable" "Not stable,Stable" else bitfld.long 0x00 16. " OSC_XTALOK ,Signals that the output of the 24MHz crystal oscillator is stable" "Not stable,Stable" endif bitfld.long 0x00 14.--15. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,Decrease by 12.5%,Decrease by 25%,Decrease by 37.5%" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 13. " DISCON_HIGH_SNVS ,Forces the short between VDDHIGH_IN and VSNVS_IN to open" "Not forced,Forced" endif textline " " bitfld.long 0x00 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Deep,Light" bitfld.long 0x00 7. " REFTOP_VBGUP ,Signals that the analog bandgap voltage is up and stable" "Not stable,Stable" bitfld.long 0x00 4.--6. " REFTOP_VBGADJ ,REFTOP_ VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG+0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" textline " " bitfld.long 0x00 3. " REFTOP_SELFBIASOFF ,Disable the self-bias circuit in the analog bandgap" "Coarse used,Bandgap used" bitfld.long 0x00 0. " REFTOP_PWD ,Power-down the analog bandgap reference circuitry" "Powered,Powered down" group.long 0x50++0x0F line.long 0x00 "PMU_MISC1,Miscellaneous Register 1" eventfld.long 0x00 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No interrupt,Interrupt" eventfld.long 0x00 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No interrupt,Interrupt" eventfld.long 0x00 29. " IRQ_TEMPSENSE ,Temperature sensor interrupt" "No interrupt,Interrupt" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x00 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x00 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else bitfld.long 0x00 13. " LVDSCLK2_IBEN ,Enables the lvds input buffer for anaclk2/2b" "Disabled,Enabled" bitfld.long 0x00 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x00 11. " LVDSCLK2_OBEN ,Enables the lvds output buffer for anaclk2/2b" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x00 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x00 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else textline " " bitfld.long 0x00 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x00 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" endif endif line.long 0x04 "PMU_MISC1_SET,Miscellaneous Register 1" eventfld.long 0x04 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No effect,Set" eventfld.long 0x04 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No effect,Set" eventfld.long 0x04 29. " IRQ_TEMPSENSE ,Temperature sensor interrupt assertst" "No effect,Set" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x04 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x04 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else bitfld.long 0x04 13. " LVDSCLK2_IBEN ,Enables the lvds input buffer for anaclk2/2b" "Disabled,Enabled" bitfld.long 0x04 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x04 11. " LVDSCLK2_OBEN ,Enables the lvds output buffer for anaclk2/2b" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x04 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x04 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else textline " " bitfld.long 0x04 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x04 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" endif endif line.long 0x08 "PMU_MISC1_CLR,Miscellaneous Register 1" eventfld.long 0x08 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No effect,Clear" eventfld.long 0x08 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No effect,Clear" eventfld.long 0x08 29. " IRQ_TEMPSENSE ,Temperature sensor interrupt assertst" "No effect,Clear" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x08 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x08 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x08 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else bitfld.long 0x08 13. " LVDSCLK2_IBEN ,Enables the lvds input buffer for anaclk2/2b" "Disabled,Enabled" bitfld.long 0x08 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x08 11. " LVDSCLK2_OBEN ,Enables the lvds output buffer for anaclk2/2b" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x08 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x08 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else textline " " bitfld.long 0x08 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x08 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" endif endif line.long 0x0C "PMU_MISC1_TOG,Miscellaneous Register 1" eventfld.long 0x0C 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "Not toggled,Toggled" eventfld.long 0x0C 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "Not toggled,Toggled" eventfld.long 0x0C 29. " IRQ_TEMPSENSE ,Temperature sensor interrupt assertst" "Not toggled,Toggled" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x0C 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x0C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else bitfld.long 0x0C 13. " LVDSCLK2_IBEN ,Enables the lvds input buffer for anaclk2/2b" "Disabled,Enabled" bitfld.long 0x0C 12. " LVDSCLK1_IBEN ,Enables the lvds input buffer for anaclk1/1b" "Disabled,Enabled" bitfld.long 0x0C 11. " LVDSCLK2_OBEN ,Enables the lvds output buffer for anaclk2/2b" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " LVDSCLK1_OBEN ,Enables the lvds output buffer for anaclk1/1b" "Disabled,Enabled" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x0C 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x0C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" else textline " " bitfld.long 0x0C 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" bitfld.long 0x0C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM PLL,SYS PLL,PFD4,PFD5,PFD6,PFD7,Audio PLL,Video PLL,MLB PLL,Eth ref clock,PCIe ref clock,SATA ref clock,USB1 PLL clock,USB2 PLL clock,PFD0,PFD1,PFD2,PFD3,XTAL,LVDS1,LVDS2,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7" endif endif group.long 0x60++0x0F line.long 0x00 "PMU_MISC2,Miscellaneous Register 2" bitfld.long 0x00 30.--31. " VIDEO_DIV ,Post-divider for video PLL" "/1,/2,/1,/4" bitfld.long 0x00 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x00 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x00 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 23. 15. " AUDIO_DIV_MSB ,2 bit post-divider field for the Audio PLL" "/1,/2,/1,/4" endif textline " " rbitfld.long 0x00 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below/equal,Above" bitfld.long 0x00 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x00 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x00 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" rbitfld.long 0x00 11. " REG1_BO_STATUS ,Reg1 brownout status bit" ",Below target" textline " " rbitfld.long 0x00 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x00 7. " PLL3_DISABLE ,Turn off the USB-PLL(PLL3) in run mode" "No,Yes" bitfld.long 0x00 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " REG0_BO_STATUS ,Reg0 brownout status bit" ",Below target" rbitfld.long 0x00 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the CORE power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" line.long 0x04 "PMU_MISC2_SET,Miscellaneous Register 2" bitfld.long 0x04 30.--31. " VIDEO_DIV ,Post-divider for video PLL" "/1,/2,/1,/4" bitfld.long 0x04 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x04 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x04 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x04 23. 15. " AUDIO_DIV_MSB ,2 bit post-divider field for the Audio PLL" "/1,/2,/1,/4" endif textline " " bitfld.long 0x04 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below/equal,Above" bitfld.long 0x04 21. " REG2_ENABLE_BO ,Enables the brownout detection" "No effect,Set" bitfld.long 0x04 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No effect,Set" textline " " bitfld.long 0x04 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x04 13. " REG1_ENABLE_BO ,Enables the brownout detection" "No effect,Set" bitfld.long 0x04 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No effect,Set" textline " " bitfld.long 0x04 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x04 7. " PLL3_DISABLE ,Turn off the USB-PLL(PLL3) in run mode" "No effect,Set" bitfld.long 0x04 5. " REG0_ENABLE_BO ,Enables the brownout detection" "No effect,Set" textline " " bitfld.long 0x04 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No effect,Set" bitfld.long 0x04 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the CORE power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" line.long 0x08 "PMU_MISC2_CLR,Miscellaneous Register 2" bitfld.long 0x08 30.--31. " VIDEO_DIV ,Post-divider for video PLL" "/1,/2,/1,/4" bitfld.long 0x08 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x08 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x08 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x08 23. 15. " AUDIO_DIV_MSB ,2 bit post-divider field for the Audio PLL" "/1,/2,/1,/4" endif textline " " bitfld.long 0x08 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below/equal,Above" bitfld.long 0x08 21. " REG2_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" bitfld.long 0x08 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No effect,Clear" textline " " bitfld.long 0x08 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x08 13. " REG1_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" bitfld.long 0x08 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "No effect,Clear" textline " " bitfld.long 0x08 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x08 7. " PLL3_DISABLE ,Turn off the USB-PLL(PLL3) in run mode" "No effect,Clear" bitfld.long 0x08 5. " REG0_ENABLE_BO ,Enables the brownout detection" "No effect,Clear" textline " " bitfld.long 0x08 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "No effect,Clear" bitfld.long 0x08 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the CORE power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" line.long 0x0C "PMU_MISC2_TOG,Miscellaneous Register 2" bitfld.long 0x0C 30.--31. " VIDEO_DIV ,Post-divider for video PLL" "/1,/2,/1,/4" bitfld.long 0x0C 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" bitfld.long 0x0C 26.--27. " REG1_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" textline " " bitfld.long 0x0C 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512" sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x0C 23. 15. " AUDIO_DIV_MSB ,2 bit post-divider field for the Audio PLL" "/1,/2,/1,/4" endif textline " " bitfld.long 0x0C 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below/equal,Above" bitfld.long 0x0C 21. " REG2_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" bitfld.long 0x0C 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "Not toggled,Toggled" textline " " bitfld.long 0x0C 16.--18. " REG2_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x0C 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" bitfld.long 0x0C 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Not toggled,Toggled" textline " " bitfld.long 0x0C 8.--10. " REG1_BO_OFFSET ,Defines the brown out voltage offset for the xPU power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" bitfld.long 0x0C 7. " PLL3_DISABLE ,Turn off the USB-PLL(PLL3) in run mode" "Not toggled,Toggled" bitfld.long 0x0C 5. " REG0_ENABLE_BO ,Enables the brownout detection" "Not toggled,Toggled" textline " " bitfld.long 0x0C 3. " REG0_BO_STATUS ,Reg0 brownout status bit" "Not toggled,Toggled" bitfld.long 0x0C 0.--2. " REG0_BO_OFFSET ,Defines the brown out voltage offset for the CORE power domain" "0V,0.025V,0.05V,0.075V,0.100V,0.125V,0.15V,0.175V" sif (cpu()=="IMX6SOLOLITE") group.long 0x160++0x0B line.long 0x00 "PMU_LOWPWR_CTRL_SET,Low Power Control Register" rbitfld.long 0x00 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,stable" bitfld.long 0x00 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5 ms,1 ms,2 ms" bitfld.long 0x00 13. " RCOSC_CG_OVERRIDE ,This bit effects clock gating of certain digital logic clocked by the 24MHz clk" "0,1" textline " " bitfld.long 0x00 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x00 11. " DISPLAY_PWRGATE ,Display logic power gate control" "Not gated,Gated" bitfld.long 0x00 10. " CPU_PWRGATE ,CPU power gate control" "Not gated,Gated" textline " " bitfld.long 0x00 9. " L2_PWRGATE ,L2 power gate control" "Not gated,Gated" bitfld.long 0x00 8. " L1_PWRGATE ,L1 power gate control" "Not gated,Gated" bitfld.long 0x00 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x00 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x00 5. " LPBG_SEL ,Bandgap select" "Normal,Low" bitfld.long 0x00 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x00 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" line.long 0x04 "PMU_LOWPWR_CTRL_CLR,Low Power Control Register" rbitfld.long 0x04 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,stable" bitfld.long 0x04 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5 ms,1 ms,2 ms" bitfld.long 0x04 13. " RCOSC_CG_OVERRIDE ,This bit effects clock gating of certain digital logic clocked by the 24MHz clk" "0,1" textline " " bitfld.long 0x04 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x04 11. " DISPLAY_PWRGATE ,Display logic power gate control" "Not gated,Gated" bitfld.long 0x04 10. " CPU_PWRGATE ,CPU power gate control" "Not gated,Gated" textline " " bitfld.long 0x04 9. " L2_PWRGATE ,L2 power gate control" "Not gated,Gated" bitfld.long 0x04 8. " L1_PWRGATE ,L1 power gate control" "Not gated,Gated" bitfld.long 0x04 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x04 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x04 5. " LPBG_SEL ,Bandgap select" "Normal,Low" bitfld.long 0x04 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x04 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" line.long 0x08 "PMU_LOWPWR_CTRL_TOG,Low Power Control Register" rbitfld.long 0x08 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,stable" bitfld.long 0x08 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5 ms,1 ms,2 ms" bitfld.long 0x08 13. " RCOSC_CG_OVERRIDE ,This bit effects clock gating of certain digital logic clocked by the 24MHz clk" "0,1" textline " " bitfld.long 0x08 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x08 11. " DISPLAY_PWRGATE ,Display logic power gate control" "Not gated,Gated" bitfld.long 0x08 10. " CPU_PWRGATE ,CPU power gate control" "Not gated,Gated" textline " " bitfld.long 0x08 9. " L2_PWRGATE ,L2 power gate control" "Not gated,Gated" bitfld.long 0x08 8. " L1_PWRGATE ,L1 power gate control" "Not gated,Gated" bitfld.long 0x08 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x08 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x08 5. " LPBG_SEL ,Bandgap select" "Normal,Low" bitfld.long 0x08 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x08 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" endif width 0x0B tree.end tree.open "PWM (Pulse Width Modulation)" tree "PWM 1" base ad:0x02080000 width 8. group.long 0x00++0x13 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" "1 slot,2 slots,3 slots,4 slots" bitfld.long 0x00 25. " STOPEN ,Stop Mode Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled" bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 20. " HCTR ,Half-word Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set/Rollover cleared,Output cleared/Rollover set,Disconnected,Disconnected" textline " " bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k" hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset" bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times" textline " " bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled" line.long 0x04 "PWMSR,PWM Status Register" eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "Not occurred,Occurred" eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred" eventfld.long 0x04 4. " ROV ,Roll-over Status" "Not occurred,Occurred" eventfld.long 0x04 3. " FE ,FIFO Empty Status" "Above mark,Below mark" textline " " sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." else bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." endif line.long 0x08 "PWMIR,PWM Interrupt Register" bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " RIE ,Roll-over Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02080000+0x00))&0x01)==0x01) group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" else wgroup.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif else group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif group.long 0x10++0x03 line.long 0x00 "PWMPR,PWM Period Register" hexmask.long.word 0x00 0.--15. 1. " PERIOD ,Period Value" rgroup.long 0x14++0x3 line.long 0x00 "PWMCNR,PWM Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value" width 0x0B tree.end tree "PWM 2" base ad:0x02084000 width 8. group.long 0x00++0x13 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" "1 slot,2 slots,3 slots,4 slots" bitfld.long 0x00 25. " STOPEN ,Stop Mode Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled" bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 20. " HCTR ,Half-word Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set/Rollover cleared,Output cleared/Rollover set,Disconnected,Disconnected" textline " " bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k" hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset" bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times" textline " " bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled" line.long 0x04 "PWMSR,PWM Status Register" eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "Not occurred,Occurred" eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred" eventfld.long 0x04 4. " ROV ,Roll-over Status" "Not occurred,Occurred" eventfld.long 0x04 3. " FE ,FIFO Empty Status" "Above mark,Below mark" textline " " sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." else bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." endif line.long 0x08 "PWMIR,PWM Interrupt Register" bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " RIE ,Roll-over Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02084000+0x00))&0x01)==0x01) group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" else wgroup.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif else group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif group.long 0x10++0x03 line.long 0x00 "PWMPR,PWM Period Register" hexmask.long.word 0x00 0.--15. 1. " PERIOD ,Period Value" rgroup.long 0x14++0x3 line.long 0x00 "PWMCNR,PWM Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value" width 0x0B tree.end tree "PWM 3" base ad:0x02088000 width 8. group.long 0x00++0x13 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" "1 slot,2 slots,3 slots,4 slots" bitfld.long 0x00 25. " STOPEN ,Stop Mode Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled" bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 20. " HCTR ,Half-word Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set/Rollover cleared,Output cleared/Rollover set,Disconnected,Disconnected" textline " " bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k" hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset" bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times" textline " " bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled" line.long 0x04 "PWMSR,PWM Status Register" eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "Not occurred,Occurred" eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred" eventfld.long 0x04 4. " ROV ,Roll-over Status" "Not occurred,Occurred" eventfld.long 0x04 3. " FE ,FIFO Empty Status" "Above mark,Below mark" textline " " sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." else bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." endif line.long 0x08 "PWMIR,PWM Interrupt Register" bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " RIE ,Roll-over Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02088000+0x00))&0x01)==0x01) group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" else wgroup.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif else group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif group.long 0x10++0x03 line.long 0x00 "PWMPR,PWM Period Register" hexmask.long.word 0x00 0.--15. 1. " PERIOD ,Period Value" rgroup.long 0x14++0x3 line.long 0x00 "PWMCNR,PWM Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value" width 0x0B tree.end tree "PWM 4" base ad:0x0208C000 width 8. group.long 0x00++0x13 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 26.--27. " FWM ,FIFO Water Mark" "1 slot,2 slots,3 slots,4 slots" bitfld.long 0x00 25. " STOPEN ,Stop Mode Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DOZEN ,Doze Mode Enable" "Disabled,Enabled" bitfld.long 0x00 23. " WAITEN ,Wait Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DBGEN ,Debug Mode Enable" "Disabled,Enabled" bitfld.long 0x00 21. " BCTR ,Byte Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 20. " HCTR ,Half-word Data Swap Control" "Not swapped,Swapped" bitfld.long 0x00 18.--19. " POUTC ,PWM Output Configuration" "Output set/Rollover cleared,Output cleared/Rollover set,Disconnected,Disconnected" textline " " bitfld.long 0x00 16.--17. " CLKSRC ,Select Clock Source" "Off,ipg_clk,ipg_clk_highfreq,ipg_clk_32k" hexmask.long.word 0x00 4.--15. 1. " PRESCALER ,Counter Clock Prescaler Value" bitfld.long 0x00 3. " SWR ,Software Reset" "No reset,Reset" bitfld.long 0x00 1.--2. " REPEAT ,Sample Repeat" "Once,Twice,Four times,Eight times" textline " " bitfld.long 0x00 0. " EN ,PWM Enable" "Disabled,Enabled" line.long 0x04 "PWMSR,PWM Status Register" eventfld.long 0x04 6. " FWE ,FIFO Write Error Status" "Not occurred,Occurred" eventfld.long 0x04 5. " CMP ,Compare Status" "Not occurred,Occurred" eventfld.long 0x04 4. " ROV ,Roll-over Status" "Not occurred,Occurred" eventfld.long 0x04 3. " FE ,FIFO Empty Status" "Above mark,Below mark" textline " " sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." else bitfld.long 0x04 0.--2. " FIFOAV ,FIFO Available" "No available,1 word,2 words,3 words,4 words,?..." endif line.long 0x08 "PWMIR,PWM Interrupt Register" bitfld.long 0x08 2. " CIE ,Compare Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " RIE ,Roll-over Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " FIE ,FIFO Empty Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x0208C000+0x00))&0x01)==0x01) group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" else wgroup.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif else group.long 0x0C++0x03 line.long 0x00 "PWMSAR,PWM Sample Register" hexmask.long.word 0x00 0.--15. 1. " SAMPLE ,Sample Value" endif group.long 0x10++0x03 line.long 0x00 "PWMPR,PWM Period Register" hexmask.long.word 0x00 0.--15. 1. " PERIOD ,Period Value" rgroup.long 0x14++0x3 line.long 0x00 "PWMCNR,PWM Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter Value" width 0x0B tree.end tree.end sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLOLITE") tree "PXP (Pixel Pipeline)" base ad:0x020F0000 width 15. group.long 0x00++0x33 line.long 0x00 "CTRL,Control Register 0" bitfld.long 0x00 31. " SFTRST ,Clocks with the PXP and holds LP state" "Enabled,Disabled" bitfld.long 0x00 30. " CLKGATE ,Gates off the clocks to the block" "Not gated,Gated" bitfld.long 0x00 28. " EN_REPEAT ,Enable the PXP to run continuously" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BLOCK_SIZE ,Select the block size to process" "8x8,16x16" bitfld.long 0x00 22. " ROT_POS ,Place of rotation in the PXP datapath" "Output stage,Before image composition" bitfld.long 0x00 11. " VFLIP ,Output buffer flipped vertically" "No,Yes" textline " " bitfld.long 0x00 10. " HFLIP ,Output buffer flipped horizontally" "No,Yes" bitfld.long 0x00 8.--9. " ROTATE ,Clockwise rotation at the output buffer" "ROT_0,ROT_90,ROT_180,ROT_270" bitfld.long 0x00 3. " LUT_DMA_IRQ_EN ,LUT DMA interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " NEXT_IRQ_EN ,Next command interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " IRQ_EN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE ,Enables PXP operation with specified parameters" "Disabled,Enabled" line.long 0x04 "CTRL_SET,Control Set Register 0" bitfld.long 0x04 31. " SFTRST ,Clocks with the PXP and holds LP state set" "No effect,Set" bitfld.long 0x04 30. " CLKGATE ,Gates off the clocks to the block" "No effect,Set" bitfld.long 0x04 28. " EN_REPEAT ,Enable the PXP to run continuously" "No effect,Set" textline " " bitfld.long 0x04 23. " BLOCK_SIZE ,Select the block size to process" "No effect,Set" bitfld.long 0x04 22. " ROT_POS ,Place of rotation in the PXP datapath" "No effect,Set" bitfld.long 0x04 11. " VFLIP ,Output buffer flipped vertically" "No effect,Set" textline " " bitfld.long 0x04 10. " HFLIP ,Output buffer flipped horizontally" "No effect,Set" bitfld.long 0x04 8.--9. " ROTATE ,Clockwise rotation at the output buffer" "ROT_0,ROT_90,ROT_180,ROT_270" bitfld.long 0x04 3. " LUT_DMA_IRQ_EN ,LUT DMA interrupt enable" "No effect,Set" textline " " bitfld.long 0x04 2. " NEXT_IRQ_EN ,Next command interrupt enable" "No effect,Set" bitfld.long 0x04 1. " IRQ_EN ,Interrupt enable" "No effect,Set" bitfld.long 0x04 0. " ENABLE ,Enables PXP operation with specified parameters" "No effect,Set" line.long 0x08 "CTRL_CLR,Control Clear Register 0" bitfld.long 0x08 31. " SFTRST ,Clocks with the PXP and holds LP state" "No effect,Clear" bitfld.long 0x08 30. " CLKGATE ,Gates off the clocks to the block" "No effect,Clear" bitfld.long 0x08 28. " EN_REPEAT ,Enable the PXP to run continuously" "No effect,Clear" textline " " bitfld.long 0x08 23. " BLOCK_SIZE ,Select the block size to process" "No effect,Clear" bitfld.long 0x08 22. " ROT_POS ,Place of rotation in the PXP datapath" "No effect,Clear" bitfld.long 0x08 11. " VFLIP ,Output buffer flipped vertically" "No effect,Clear" textline " " bitfld.long 0x08 10. " HFLIP ,Output buffer flipped horizontally" "No effect,Clear" bitfld.long 0x08 8.--9. " ROTATE ,Clockwise rotation at the output buffer" "ROT_0,ROT_90,ROT_180,ROT_270" bitfld.long 0x08 3. " LUT_DMA_IRQ_EN ,LUT DMA interrupt enable" "No effect,Clear" textline " " bitfld.long 0x08 2. " NEXT_IRQ_EN ,Next command interrupt enable" "No effect,Clear" bitfld.long 0x08 1. " IRQ_EN ,Interrupt enable" "No effect,Clear" bitfld.long 0x08 0. " ENABLE ,Enables PXP operation with specified parameters" "No effect,Clear" line.long 0x0C "CTRL_TOG,Control Toggle Register 0" bitfld.long 0x0C 31. " SFTRST ,Clocks with the PXP and holds LP state" "Not toggled,Toggled" bitfld.long 0x0C 30. " CLKGATE ,Gates off the clocks to the block" "Not toggled,Toggled" bitfld.long 0x0C 28. " EN_REPEAT ,Enable the PXP to run continuously" "Not toggled,Toggled" textline " " bitfld.long 0x0C 23. " BLOCK_SIZE ,Select the block size to process" "Not toggled,Toggled" bitfld.long 0x0C 22. " ROT_POS ,Place of rotation in the PXP datapath" "Not toggled,Toggled" bitfld.long 0x0C 11. " VFLIP ,Output buffer flipped vertically" "Not toggled,Toggled" textline " " bitfld.long 0x0C 10. " HFLIP ,Output buffer flipped horizontally" "Not toggled,Toggled" bitfld.long 0x0C 8.--9. " ROTATE ,Clockwise rotation at the output buffer" "ROT_0,ROT_90,ROT_180,ROT_270" bitfld.long 0x0C 3. " LUT_DMA_IRQ_EN ,LUT DMA interrupt enable" "Not toggled,Toggled" textline " " bitfld.long 0x0C 2. " NEXT_IRQ_EN ,Next command interrupt enable" "Not toggled,Toggled" bitfld.long 0x0C 1. " IRQ_EN ,Interrupt enable" "Not toggled,Toggled" bitfld.long 0x0C 0. " ENABLE ,Enables PXP operation with specified parameters" "Not toggled,Toggled" line.long 0x10 "STAT,Status Register" hexmask.long.byte 0x10 24.--31. 1. " BLOCKX ,X coordinate of the block currently being rendered" hexmask.long.byte 0x10 16.--23. 1. " BLOCKY ,Y coordinate of the block currently being rendered" textline " " bitfld.long 0x10 8. " LUT_DMA_LOAD_DONE_IRQ ,LUT DMA transfer complete" "Not completed,completed" textline " " rbitfld.long 0x10 4.--7. " AXI_ERROR_ID ,AXI ID of the failing bus operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 3. " NEXT_IRQ ,Next Command issue" "Not issued,Issued" bitfld.long 0x10 2. " AXI_READ_ERROR ,PXP encountered an AXI read error" "No error,Error" textline " " bitfld.long 0x10 1. " AXI_WRITE_ERROR ,PXP encountered an AXI write error" "No error,Error" bitfld.long 0x10 0. " IRQ ,Current PXP interrupt status" "No interrupt,Interrupt" line.long 0x14 "STAT_SET,Status Register" hexmask.long.byte 0x14 24.--31. 1. " BLOCKX ,X coordinate of the block currently being rendered" hexmask.long.byte 0x14 16.--23. 1. " BLOCKY ,Y coordinate of the block currently being rendered" textline " " bitfld.long 0x14 8. " LUT_DMA_LOAD_DONE_IRQ ,LUT DMA transfer complete" "No effect,Set" textline " " rbitfld.long 0x14 4.--7. " AXI_ERROR_ID ,AXI ID of the failing bus operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 3. " NEXT_IRQ ,Next Command issue" "No effect,Set" bitfld.long 0x14 2. " AXI_READ_ERROR ,PXP encountered an AXI read error" "No effect,Set" textline " " bitfld.long 0x14 1. " AXI_WRITE_ERROR ,PXP encountered an AXI write error" "No effect,Set" bitfld.long 0x14 0. " IRQ ,Current PXP interrupt status" "No effect,Set" line.long 0x18 "STAT_CLR,Status Register" hexmask.long.byte 0x18 24.--31. 1. " BLOCKX ,X coordinate of the block currently being rendered" hexmask.long.byte 0x18 16.--23. 1. " BLOCKY ,Y coordinate of the block currently being rendered" textline " " bitfld.long 0x18 8. " LUT_DMA_LOAD_DONE_IRQ ,LUT DMA transfer complete" "No effect,Clear" textline " " rbitfld.long 0x18 4.--7. " AXI_ERROR_ID ,AXI ID of the failing bus operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 3. " NEXT_IRQ ,Next Command issue" "No effect,Clear" bitfld.long 0x18 2. " AXI_READ_ERROR ,PXP encountered an AXI read error" "No effect,Clear" textline " " bitfld.long 0x18 1. " AXI_WRITE_ERROR ,PXP encountered an AXI write error" "No effect,Clear" bitfld.long 0x18 0. " IRQ ,Current PXP interrupt status" "No effect,Clear" line.long 0x1C "STAT_TOG,Status Register" hexmask.long.byte 0x1C 24.--31. 1. " BLOCKX ,X coordinate of the block currently being rendered" hexmask.long.byte 0x1C 16.--23. 1. " BLOCKY ,Y coordinate of the block currently being rendered" textline " " bitfld.long 0x1C 8. " LUT_DMA_LOAD_DONE_IRQ ,LUT DMA transfer complete" "Not toggled,Toggled" textline " " rbitfld.long 0x1C 4.--7. " AXI_ERROR_ID ,AXI ID of the failing bus operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 3. " NEXT_IRQ ,Next Command issue" "Not toggled,Toggled" bitfld.long 0x1C 2. " AXI_READ_ERROR ,PXP encountered an AXI read error" "Not toggled,Toggled" textline " " bitfld.long 0x1C 1. " AXI_WRITE_ERROR ,PXP encountered an AXI write error" "Not toggled,Toggled" bitfld.long 0x1C 0. " IRQ ,Current PXP interrupt status" "Not toggled,Toggled" line.long 0x20 "OUT_CTRL,Output Buffer Control Register" hexmask.long.byte 0x20 24.--31. 1. " ALPHA ,Alpha component" bitfld.long 0x20 23. " ALPHA_OUT ,Overwritten alpha component in output buffer" "Computed,Overwritten" bitfld.long 0x20 8.--9. " INTERLACED_OUT ,Methods of write output data" "PROGRESSIVE,FIELD0,FIELD1,INTERLACED" textline " " bitfld.long 0x20 0.--4. " FORMAT ,Output framebuffer format" "ARGB8888,,,,RGB888,RGB888P,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,?..." line.long 0x24 "OUT_CTRL_SET,Output Buffer Control Set Register" hexmask.long.byte 0x24 24.--31. 1. " ALPHA ,Alpha component" bitfld.long 0x24 23. " ALPHA_OUT ,Overwritten alpha component in output buffer" "Computed,Overwritten" bitfld.long 0x24 8.--9. " INTERLACED_OUT ,Methods of write output data" "PROGRESSIVE,FIELD0,FIELD1,INTERLACED" textline " " bitfld.long 0x24 0.--4. " FORMAT ,Output framebuffer format" "ARGB8888,,,,RGB888,RGB888P,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,?..." line.long 0x28 "OUT_CTRL_ClR,Output Buffer Control Clear Register" hexmask.long.byte 0x28 24.--31. 1. " ALPHA ,Alpha component" bitfld.long 0x28 23. " ALPHA_OUT ,Overwritten alpha component in output buffer" "Computed,Overwritten" bitfld.long 0x28 8.--9. " INTERLACED_OUT ,Methods of write output data" "PROGRESSIVE,FIELD0,FIELD1,INTERLACED" textline " " bitfld.long 0x28 0.--4. " FORMAT ,Output framebuffer format" "ARGB8888,,,,RGB888,RGB888P,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,?..." line.long 0x2C "OUT_CTRL_TOG,Output Buffer Control Toggle Register" hexmask.long.byte 0x2C 24.--31. 1. " ALPHA ,Alpha component" bitfld.long 0x2C 23. " ALPHA_OUT ,Overwritten alpha component in output buffer" "Computed,Overwritten" bitfld.long 0x2C 8.--9. " INTERLACED_OUT ,Methods of write output data" "PROGRESSIVE,FIELD0,FIELD1,INTERLACED" textline " " bitfld.long 0x2C 0.--4. " FORMAT ,Output framebuffer format" "ARGB8888,,,,RGB888,RGB888P,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,?..." line.long 0x30 "OUT_BUF,Output Frame Buffer Pointer" group.long 0x40++0x03 line.long 0x00 "OUT_BUF2,Output Frame Buffer Pointer 2" group.long 0x50++0x03 line.long 0x00 "OUT_PITCH,Output Buffer Pitch" hexmask.long.word 0x00 0.--15. 1. " PITCH ,Number of bytes in memory between two vertically adjacent pixels" group.long 0x60++0x03 line.long 0x00 "OUT_LRC,Output Surface Lower Right Coordinate" hexmask.long.word 0x00 16.--29. 1. " X ,Number of horizontal PIXELS in the output surface (non-rotated)" hexmask.long.word 0x00 0.--13. 1. " Y ,Number of vertical PIXELS in the output surface (non-rotated)" group.long 0x70++0x03 line.long 0x00 "OUT_PS_ULC,Processed Surface Upper Left Coordinate" hexmask.long.word 0x00 16.--29. 1. " X ,Upper left X-coordinate (in pixels) of PS in the output buffer" hexmask.long.word 0x00 0.--13. 1. " Y ,Upper left Y-coordinate (in pixels) of PS in the output buffer" group.long 0x80++0x03 line.long 0x00 "OUT_PS_LRC,Processed Surface Lower Right Coordinate" hexmask.long.word 0x00 16.--29. 1. " X ,Lower right X-coordinate (in pixels) of PS in the output frame buffer" hexmask.long.word 0x00 0.--13. 1. " Y ,Lower right Y-coordinate (in pixels) of PS in the output frame buffer" group.long 0x90++0x03 line.long 0x00 "OUT_AS_ULC,Alpha Surface Upper Left Coordinate" hexmask.long.word 0x00 16.--29. 1. " X ,Upper left X-coordinate (in pixels) of AS in the output frame buffer" hexmask.long.word 0x00 0.--13. 1. " Y ,Upper left Y-coordinate (in pixels) of AS in the output frame buffer" group.long 0xA0++0x03 line.long 0x00 "OUT_AS_LRC,Alpha Surface Lower Right Coordinate" hexmask.long.word 0x00 16.--29. 1. " X ,Lower right X-coordinate (in pixels) of AS in the output frame buffer" hexmask.long.word 0x00 0.--13. 1. " Y ,Lower right Y-coordinate (in pixels) of AS in the output frame buffer" group.long 0xB0++0x13 line.long 0x00 "PS_CTRL,Processed Surface (PS) Control Register" bitfld.long 0x00 10.--11. " DECX ,Horizontal pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x00 8.--9. " DECY ,Verticle pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x00 5. " WB_SWAP ,Swap bytes in words" "Not swapped,Swapped" textline " " bitfld.long 0x00 0.--4. " FORMAT ,PS buffer format" ",,,,RGB888,,,,,,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,,,YUV422,YUV420" line.long 0x04 "PS_CTRL_SET,Processed Surface (PS) Control Set Register" bitfld.long 0x04 10.--11. " DECX ,Horizontal pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x04 8.--9. " DECY ,Verticle pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x04 5. " WB_SWAP ,Swap bytes in words" "No effect,Set" textline " " bitfld.long 0x04 0.--4. " FORMAT ,PS buffer format" ",,,,RGB888,,,,,,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,,,YUV422,YUV420" line.long 0x08 "PS_CTRL_CLR,Processed Surface (PS) Control Clear Register" bitfld.long 0x08 10.--11. " DECX ,Horizontal pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x08 8.--9. " DECY ,Verticle pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x08 5. " WB_SWAP ,Swap bytes in words" "No effect,Clear" textline " " bitfld.long 0x08 0.--4. " FORMAT ,PS buffer format" ",,,,RGB888,,,,,,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,,,YUV422,YUV420" line.long 0x0C "PS_CTRL_TOG,Processed Surface (PS) Control Toggle Register" bitfld.long 0x0C 10.--11. " DECX ,Horizontal pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x0C 8.--9. " DECY ,Verticle pre decimation filter control" "Disabled,by 2,by 4,by 8" bitfld.long 0x0C 5. " WB_SWAP ,Swap bytes in words" "Not toggled,Toggled" textline " " bitfld.long 0x0C 0.--4. " FORMAT ,PS buffer format" ",,,,RGB888,,,,,,,,RGB555,RGB444,RGB565,,YUV1P444,,UYVY1P422,VYUY1P422,Y8,Y4,,,YUV2P422,YUV2P420,YVU2P422,YVU2P420,,,YUV422,YUV420" line.long 0x10 "PS_BUF,PS Input Buffer Address" group.long 0xD0++0x03 line.long 0x00 "PS_UBUF,PS U/Cb or 2 Plane UV Input Buffer Address" group.long 0xE0++0x03 line.long 0x00 "PS_VBUF,PS V/Cr Input Buffer Address" group.long 0xF0++0x03 line.long 0x00 "PS_PITCH,Processed Surface Pitch" hexmask.long.word 0x00 0.--15. 1. " PITCH ,Number of bytes in memory between two vertically adjacent pixels" group.long 0x100++0x03 line.long 0x00 "PS_BACKGROUND,PS Background Color" hexmask.long.tbyte 0x00 0.--23. 1. " COLOR ,Background color (in 24bpp format) for any pixels not within the buffer range specified by the PS ULC/LRC" group.long 0x110++0x03 line.long 0x00 "PS_SCALE,PS Scale Factor Register" hexmask.long.word 0x00 16.--30. 1. " YSCALE ,Two bit integer and 12 bit fractional representation of the Y scaling factor for the PS source buffer" hexmask.long.word 0x00 0.--14. 1. " XSCALE ,Two bit integer and 12 bit fractional representation of the X scaling factor for the PS source buffer" group.long 0x120++0x03 line.long 0x00 "PS_OFFSET,PS Scale Offset Register" hexmask.long.word 0x00 16.--27. 1. " YOFFSET ,12 bit fractional representation of the Y scaling offset" hexmask.long.word 0x00 0.--11. 1. " XOFFSET ,12 bit fractional representation of the X scaling offset" group.long 0x130++0x03 line.long 0x00 "PS_CLRKEYLOW,PS Color Key Low" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,Low range of color key applied to PS buffer" group.long 0x140++0x03 line.long 0x00 "PS_CLRKEYHIGH,PS Color Key High" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,High range of color key applied to PS buffer" group.long 0x150++0x03 line.long 0x00 "AS_CTRL,Alpha Surface Control" bitfld.long 0x00 20. " ALPHA_INVERT ,Invert the alpha value and apply (1- alpha) for image composition" "Not inverted,Inverted" bitfld.long 0x00 16.--19. " ROP ,Raster operation to perform" "AS AND PS,nAS AND PS,AS AND nPS,AS OR PS,nAS OR PS,AS OR nPS,nAS,nPS,AS NAND PS,AS NOR PS,AS XOR PS,AS XNOR PS,?..." hexmask.long.byte 0x00 8.--15. 1. " ALPHA ,Alpha modifier" textline " " bitfld.long 0x00 4.--7. " FORMAT ,Input buffer format for AS" "ARGB8888,,,,RGB888,,,,ARGB1555,ARGB4444,,,RGB555,RGB444,RGB565,?..." textline " " bitfld.long 0x00 3. " ENABLE_COLORKEY ,Colorkey functionality enable" "Disabled,Enabled" bitfld.long 0x00 1.--2. " ALPHA_CTRL ,Methods of construction of alpha value" "Embedded,Override,Multiply,ROPs" group.long 0x160++0x03 line.long 0x00 "AS_BUF,Alpha Surface Buffer Pointer" group.long 0x170++0x03 line.long 0x00 "AS_PITCH,Alpha Surface Pitch" hexmask.long.word 0x00 0.--15. 1. " PITCH ,Number of bytes in memory between two vertically adjacent pixels" group.long 0x180++0x03 line.long 0x00 "AS_CLRKEYLOW,Overlay Color Key Low" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,Low range of RGB color key applied to AS buffer" group.long 0x190++0x03 line.long 0x00 "AS_CLRKEYHIGH,Overlay Color Key High" hexmask.long.tbyte 0x00 0.--23. 1. " PIXEL ,High range of RGB color key applied to AS buffer" group.long 0x1A0++0x03 line.long 0x00 "CSC1_COEF0,Color Space Conversion Coefficient Register 0" bitfld.long 0x00 31. " YCBCR_MODE ,Conversion data type" "YUV to RGB,YCbCr to RGB" bitfld.long 0x00 30. " BYPASS ,Bypass the CSC unit in the scaling engine" "Not bypassed,Bypassed" textline " " hexmask.long.word 0x00 18.--28. 1. " C0 ,Two's compliment Y multiplier coefficient" hexmask.long.word 0x00 9.--17. 1. " UV_OFFSET ,Two's compliment phase offset implicit for CbCr data" hexmask.long.word 0x00 0.--8. 1. " Y_OFFSET ,Two's compliment amplitude offset implicit in the Y data" group.long 0x1B0++0x03 line.long 0x00 "CSC1_COEF1,Color Space Conversion Coefficient Register 1" hexmask.long.word 0x00 16.--26. 1. " C1 ,Two's compliment Red V/Cr multiplier coefficient" hexmask.long.word 0x00 0.--10. 1. " C4 ,Two's compliment Blue U/Cb multiplier coefficient" group.long 0x1C0++0x03 line.long 0x00 "CSC1_COEF2,Color Space Conversion Coefficient Register 2" hexmask.long.word 0x00 16.--26. 1. " C2 ,Two's complement Green V/Cr multiplier coefficient" hexmask.long.word 0x00 0.--10. 1. " C3 ,Two's complement Green U/Cb multiplier coefficient" group.long 0x1D0++0x03 line.long 0x00 "CSC2_CTRL,Color Space Conversion Control Register" bitfld.long 0x00 1.--2. " CSC_MODE ,Methods of CSC unit operates on pixels when the CSC is not bypassed (converted from)" "YUV to RGB,YCbCr to RGB,RGB to YUV,RGB to YCbCr" bitfld.long 0x00 0. " BYPASS ,Bypass CSC2 unit" "Not bypassed,Bypassed" group.long 0x1E0++0x03 line.long 0x00 "CSC2_COEF0,Color Space Conversion Coefficient Register 0" hexmask.long.word 0x00 16.--26. 1. " A2 ,Two's complement coefficient offset" hexmask.long.word 0x00 0.--10. 1. " A1 ,Two's complement coefficient offset" group.long 0x1F0++0x03 line.long 0x00 "CSC2_COEF1,Color Space Conversion Coefficient Register 1" hexmask.long.word 0x00 16.--26. 1. " B1 ,Two's complement coefficient offset" hexmask.long.word 0x00 0.--10. 1. " A3 ,Two's complement coefficient offset" group.long 0x200++0x03 line.long 0x00 "CSC2_COEF2,Color Space Conversion Coefficient Register 2" hexmask.long.word 0x00 16.--26. 1. " B3 ,Two's complement coefficient offset" hexmask.long.word 0x00 0.--10. 1. " B2 ,Two's complement coefficient offset" group.long 0x210++0x03 line.long 0x00 "CSC2_COEF3,Color Space Conversion Coefficient Register 3" hexmask.long.word 0x00 16.--26. 1. " C2 ,Two's complement coefficient offset" hexmask.long.word 0x00 0.--10. 1. " C1 ,Two's complement coefficient offset" group.long 0x220++0x03 line.long 0x00 "CSC2_COEF4,Color Space Conversion Coefficient Register 4" hexmask.long.word 0x00 16.--24. 1. " D1 ,Two's complement coefficient integer offset to be added" hexmask.long.word 0x00 0.--10. 1. " C3 ,Two's complement coefficient offset" group.long 0x230++0x03 line.long 0x00 "CSC2_COEF5,Color Space Conversion Coefficient Register 5" hexmask.long.word 0x00 16.--24. 1. " D3 ,Two's complement coefficient integer offset to be added" hexmask.long.word 0x00 0.--8. 1. " D2 ,Two's complement D1 coefficient integer offset to be added" textline " " group.long 0x240++0x03 line.long 0x00 "LUT_CTRL,Lookup Table Control Register" bitfld.long 0x00 31. " BYPASS ,bypass the LUT memory resource completely" "Not bypassed,Bypassed" bitfld.long 0x00 24.--25. " LOOKUP_MODE ,Configure the input address for the 16KB" "R[7:3]/G[7:2]/B[7:3],16'b0/Y[7:0],R[7:4]/G[7:4]/B[7:4],R[7:4]/G[7:3]/B[7:4]" bitfld.long 0x00 16.--17. " OUT_MODE ,Select the output mode of operation for the LUT resource" ",Y8,RGBW4444CFA,RGB888" textline " " bitfld.long 0x00 10. " SEL_8KB ,Selects which 8KB bank of memory to use for direct 12bpp lookup modes" "First,Second" bitfld.long 0x00 9. " LRU_UPD ,Block LRU update for hit after miss" "Hit,All hits" bitfld.long 0x00 8. " INVALID ,Invalidate the cache LRU and valid bits" "Invalid,Valid" textline " " bitfld.long 0x00 0. " DMA_START ,Load the PXP LUT memory based on PXP_LUT_ADDR_NUM_BYTES, PXP_LUT_ADDR_ADDR, and PXP_LUT_MEM_ADDR" "Not loaded,Loaded" textline " " group.long 0x250++0x03 line.long 0x00 "LUT_ADDR,Lookup Table Control Register" hexmask.long.word 0x00 16.--30. 1. " NUM_BYTES ,Number of bytes to load via a DMA operation" hexmask.long.word 0x00 0.--13. 1. " ADDR ,LUT indexed address pointer" group.long 0x260++0x03 line.long 0x00 "LUT_DATA,Lookup Table Data Register" group.long 0x270++0x03 line.long 0x00 "LUT_EXTMEM,Lookup Table External Memory Address Register" group.long 0x280++0x03 line.long 0x00 "CFA,Color Filter Array Register" group.long 0x290++0x03 line.long 0x00 "HIST_CTRL,Histogram Control Register" bitfld.long 0x00 4.--5. " PANEL_MODE ,Specifies the EPDC panel grayscale depth" "4-bit,8-bit,16-bit,32-bit" bitfld.long 0x00 3. " STATUS[3] ,Bitmap pixels were fully contained within the 4-bit grayscale histogram" "Not contained,Contained" bitfld.long 0x00 2. " STATUS[2] ,Bitmap pixels were fully contained within the 3-bit grayscale histogram" "Not contained,Contained" textline " " bitfld.long 0x00 1. " STATUS[1] ,Bitmap pixels were fully contained within the 2-bit grayscale histogram" "Not contained,Contained" bitfld.long 0x00 0. " STATUS[0] ,Bitmap pixels were fully contained within the black/white histogram" "Not contained,Contained" group.long 0x2A0++0x03 line.long 0x00 "HIST2_PARAM,2-level Histogram Parameter Register" bitfld.long 0x00 8.--12. " VALUE1 ,White value for 2-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " VALUE0 ,Black value for 2-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B0++0x03 line.long 0x00 "HIST4_PARAM,4-level Histogram Parameter Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 (White) value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 4-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C0++0x03 line.long 0x00 "HIST8_PARAM0,8-level Histogram Parameter 0 Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D0++0x03 line.long 0x00 "HIST8_PARAM1,8-level Histogram Parameter 1 Register" bitfld.long 0x00 24.--28. " VALUE7 ,GRAY7 (White) value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE6 ,GRAY6 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE5 ,GRAY5 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE4 ,GRAY4 value for 8-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E0++0x03 line.long 0x00 "HIST16_PARAM0,16-level Histogram Parameter 0 Register" bitfld.long 0x00 24.--28. " VALUE3 ,GRAY3 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE2 ,GRAY2 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE1 ,GRAY1 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE0 ,GRAY0 (Black) value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F0++0x03 line.long 0x00 "HIST16_PARAM1,16-level Histogram Parameter 1 Register" bitfld.long 0x00 24.--28. " VALUE7 ,GRAY7 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE6 ,GRAY6 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE5 ,GRAY5 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE4 ,GRAY4 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x300++0x03 line.long 0x00 "HIST16_PARAM2,16-level Histogram Parameter 2 Register" bitfld.long 0x00 24.--28. " VALUE11 ,GRAY11 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE10 ,GRAY10 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE9 ,GRAY9 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE8 ,GRAY8 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x310++0x03 line.long 0x00 "HIST16_PARAM3,16-level Histogram Parameter 3 Register" bitfld.long 0x00 24.--28. " VALUE15 ,GRAY15 (White) value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " VALUE14 ,GRAY14 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " VALUE13 ,GRAY13 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VALUE12 ,GRAY12 value for 16-level histogram" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " group.long 0x320++0x03 line.long 0x00 "POWER,PXP Power Control Register" hexmask.long.tbyte 0x00 12.--31. 1. " CTRL ,Power control for the PXP" bitfld.long 0x00 9.--11. " ROT_MEM_LP_STATE ,Select the low power state of the ROT memory" "None,Light Sleep,Deep Sleep,,Shut Down,?..." bitfld.long 0x00 6.--8. " LUT_LP_STATE_WAY1_BANKN ,Select the low power state of the LUT's WAY0-BANK0,1,2,3 memory" "None,Light Sleep,Deep Sleep,,Shut Down,?..." textline " " bitfld.long 0x00 3.--5. " LUT_LP_STATE_WAY0_BANKN ,Select the low power state of the LUT's WAY0-BANK1,2,3 memory" "None,Light Sleep,Deep Sleep,,Shut Down,?..." bitfld.long 0x00 0.--2. " LUT_LP_STATE_WAY0_BANK0 ,Select the low power state of the LUT's WAY0-BANK0 memory" "None,Light Sleep,Deep Sleep,,Shut Down,?..." group.long 0x400++0x03 line.long 0x00 "NEXT,Next Frame Pointer" hexmask.long 0x00 2.--31. 0x04 " POINTER ,Pointer to a data structure containing register values to be used when processing the next frame" rbitfld.long 0x00 0. " ENABLED ,Next frame functionality enable (reload operation)" "Disabled,Enabled" width 0x0B tree.end endif sif (cpu()=="IMX6SOLOLITE") tree "RNGB (Random Number Generator)" base ad:0x021B4000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "VER,Version ID Register" bitfld.long 0x00 28.--31. " TYPE ,Random number generator type" "RNGA,RNGB,RNGC,?..." hexmask.long.byte 0x00 8.--15. 1. " MAJOR ,Major version number" hexmask.long.byte 0x00 0.--7. 1. " MINOR ,Minor version number" group.long 0x04++0x07 line.long 0x00 "CMD,Command Register" bitfld.long 0x00 6. " SR ,Software reset" "No reset,Reset" bitfld.long 0x00 5. " CE ,Clear error" "No effect,Clear" bitfld.long 0x00 4. " CI ,Clear interrupt" "No effect,Clear" newline bitfld.long 0x00 1. " GS ,Generate seed" "Not generated,Generated" bitfld.long 0x00 0. " ST ,Self test" "Not initiated,Initiated" line.long 0x04 "CR,Control Register" bitfld.long 0x04 6. " MASKERR ,Mask error interrupt" "Not masked,Masked" bitfld.long 0x04 5. " MASKDONE ,Mask done interrupt" "Not masked,Masked" bitfld.long 0x04 4. " AR ,Auto-reseed" "Disabled,Enabled" newline sif cpuis("IMX6SLL") bitfld.long 0x04 0.--1. " FUFMOD ,FIFO underflow response mode" "All zeros and ESR[FUFE] set,All zeros and ESR[FUFE] set,Bus transfer error,Interrupt and all zeros" else bitfld.long 0x04 0.--1. " FUFMOD ,FIFO underflow response mode" "All zeros/ESR[FUFE] set,All zeros/ESR[FUFE] set,Bus tx error,INT and all zeros" endif rgroup.long 0x0C++0x0B line.long 0x00 "SR,Status Register" bitfld.long 0x00 31. " STATPF[7] ,Statistics test pass fail (Long run test (>34))" "Passed,Failed" bitfld.long 0x00 30. " [6] ,Statistics test pass fail (Length 6+ run test)" "Passed,Failed" bitfld.long 0x00 29. " [5] ,Statistics test pass fail (Length 5 run test)" "Passed,Failed" newline bitfld.long 0x00 28. " [4] ,Statistics test pass fail (Length 4 run test)" "Passed,Failed" bitfld.long 0x00 27. " [3] ,Statistics test pass fail (Length 3 run test)" "Passed,Failed" bitfld.long 0x00 26. " [2] ,Statistics test pass fail (Length 2 run test)" "Passed,Failed" newline bitfld.long 0x00 25. " [1] ,Statistics test pass fail (Length 1 run test)" "Passed,Failed" bitfld.long 0x00 24. " [0] ,Statistics test pass fail (Monobit test)" "Passed,Failed" newline bitfld.long 0x00 23. " ST_PF[2] ,TRNG self test pass/fail" "Passed,Failed" bitfld.long 0x00 22. " [1] ,PRNG self test pass/fail" "Passed,Failed" newline bitfld.long 0x00 21. " [0] ,RESEED self test pass/fail" "Passed,Failed" bitfld.long 0x00 16. " ERR ,Indicates an error was detected in the RNGB" "No error,Error" newline bitfld.long 0x00 12.--15. " FIFO_SIZE ,FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " FIFO_LVL ,FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 6. " NSDN ,New seed done" "Not completed,Completed" newline bitfld.long 0x00 5. " SDN ,Seed done" "Not completed,Completed" bitfld.long 0x00 4. " STDN ,Self test done" "Not completed,Completed" bitfld.long 0x00 3. " RS ,Reseed needed" "Not needed,Needed" newline bitfld.long 0x00 2. " SLP ,Indicates if the RNGB is in sleep mode" "Not sleep,Sleep" bitfld.long 0x00 1. " BUSY ,Reflects the current state of RNGB" "Not busy,Busy" line.long 0x04 "ESR,Error Status Register" bitfld.long 0x04 4. " FUFE ,FIFO underflow error" "Not occurred,Occurred" bitfld.long 0x04 3. " SATE ,Statistical test error" "Passed,Failed" bitfld.long 0x04 2. " STE ,Self test error" "Passed,Failed" newline bitfld.long 0x04 1. " OSCE ,Oscillator error" "No error,Error" line.long 0x08 "OUT,Output FIFO" if (((per.l(ad:0x021B4000+0x0C))&0x02)==0x00) wgroup.long 0x18++0x03 line.long 0x00 "ER,Entropy Register" else hgroup.long 0x18++0x03 hide.long 0x00 "ER,Entropy Register" in endif sif cpuis("IMX6SLL") group.long 0x20++0x03 line.long 0x00 "VCR,Verification Control Register" bitfld.long 0x00 9. " RST_XKEY ,Reset XKEY Register" "No reset,Reset" bitfld.long 0x00 8. " RST_SHREG ,Reset Shift Registers" "Not reset,Reset" bitfld.long 0x00 3. " FAKE_SEED ,Fake Seed" "No,Yes" newline bitfld.long 0x00 2. " OSC_TEST ,Oscillator Frequency Test" "Disabled,Enabled" bitfld.long 0x00 1. " FRC_SYS_CLK ,Force System Clock" "Not forced,Forced" bitfld.long 0x00 0. " SH_CLK_OFF ,Shift Clocks Off" "No effect,Shut off" else rgroup.long 0x20++0x03 line.long 0x00 "VCR,Verification Control Register" bitfld.long 0x00 9. " RST_XKEY ,Reset XKEY Register" "No reset,Reset" bitfld.long 0x00 8. " RST_SHREG ,Reset Shift Registers" "Not reset,Reset" bitfld.long 0x00 3. " FAKE_SEED ,Fake Seed" "No,Yes" newline bitfld.long 0x00 2. " OSC_TEST ,Oscillator Frequency Test" "Disabled,Enabled" bitfld.long 0x00 1. " FRC_SYS_CLK ,Force System Clock" "Not forced,Forced" bitfld.long 0x00 0. " SH_CLK_OFF ,Shift Clocks Off" ",Shut off" endif rgroup.long 0x24++0x03 line.long 0x00 "XKEY,XKEY Data" sif cpuis("IMX6SLL") group.long 0x28++0x03 line.long 0x00 "OCCR,Oscillator Counter Control Register" hexmask.long.tbyte 0x00 0.--17. 1. " OCCR ,Number of clock cycles remaining" else rgroup.long 0x28++0x03 line.long 0x00 "OCCR,Oscillator Counter Control Register" hexmask.long.tbyte 0x00 0.--17. 1. " OCCR ,Number of clock cycles remaining" endif rgroup.long 0x2C++0x08 line.long 0x00 "OSC_CNT,Oscillator Counter" hexmask.long.tbyte 0x00 0.--19. 1. " CLOCK_PULSES ,CLOCK PULSES" line.long 0x04 "OSC_CNT_STAT,Oscillator Counter Status" bitfld.long 0x04 0. " OS ,Oscillator Status" "Not toggled,Toggled" width 0x0B tree.end endif tree "ROMC (ROM Controller with Patch)" base ad:0x021AC000 width 13. sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpuis("IMX6*")) group.long 0xD4++0x1F line.long 0x00 "ROMPATCH0D,ROMPATCH Data Register 0" line.long 0x04 "ROMPATCH1D,ROMPATCH Data Register 1" line.long 0x08 "ROMPATCH2D,ROMPATCH Data Register 2" line.long 0x0c "ROMPATCH3D,ROMPATCH Data Register 3" line.long 0x10 "ROMPATCH4D,ROMPATCH Data Register 4" line.long 0x14 "ROMPATCH5D,ROMPATCH Data Register 5" line.long 0x18 "ROMPATCH6D,ROMPATCH Data Register 6" line.long 0x1c "ROMPATCH7D,ROMPATCH Data Register 7" else group.long 0xD4++0x1F line.long 0x00 "ROMPATCHD7,ROMPATCH Data Register 7" line.long 0x04 "ROMPATCHD6,ROMPATCH Data Register 6" line.long 0x08 "ROMPATCHD5,ROMPATCH Data Register 5" line.long 0x0c "ROMPATCHD4,ROMPATCH Data Register 4" line.long 0x10 "ROMPATCHD3,ROMPATCH Data Register 3" line.long 0x14 "ROMPATCHD2,ROMPATCH Data Register 2" line.long 0x18 "ROMPATCHD1,ROMPATCH Data Register 1" line.long 0x1c "ROMPATCHD0,ROMPATCH Data Register 0" endif group.long 0xF4++0x03 line.long 0x00 "ROMPATCHCNT,ROMPATCH Control Register" bitfld.long 0x00 29. " DIS ,ROMPATCH Disable" "No effect,Disabled" bitfld.long 0x00 7. " DATAFIX[7] ,Data Fix Enable" "Opcode patch,Data fix" bitfld.long 0x00 6. " DATAFIX[6] ,Data Fix Enable" "Opcode patch,Data fix" bitfld.long 0x00 5. " DATAFIX[5] ,Data Fix Enable" "Opcode patch,Data fix" textline " " bitfld.long 0x00 4. " DATAFIX[4] ,Data Fix Enable" "Opcode patch,Data fix" bitfld.long 0x00 3. " DATAFIX[3] ,Data Fix Enable" "Opcode patch,Data fix" bitfld.long 0x00 2. " DATAFIX[2] ,Data Fix Enable" "Opcode patch,Data fix" bitfld.long 0x00 1. " DATAFIX[1] ,Data Fix Enable" "Opcode patch,Data fix" textline " " bitfld.long 0x00 0. " DATAFIX[0] ,Data Fix Enable" "Opcode patch,Data fix" hgroup.long 0xF8++0x03 hide.long 0x00 "ROMPATCHENH,ROMPATCH Enable Register High" group.long 0xFC++0x03 line.long 0x00 "ROMPATCHENL,ROMPATCH Enable Register Low" bitfld.long 0x00 15. " ENABLE[15] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 14. " ENABLE[14] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 13. " ENABLE[13] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 12. " ENABLE[12] ,Enable Address Comparator" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ENABLE[11] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 10. " ENABLE[10] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 9. " ENABLE[9] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 8. " ENABLE[8] ,Enable Address Comparator" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ENABLE[7] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 6. " ENABLE[6] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 5. " ENABLE[5] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 4. " ENABLE[4] ,Enable Address Comparator" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE[3] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 2. " ENABLE[2] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 1. " ENABLE[1] ,Enable Address Comparator" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE[0] ,Enable Address Comparator" "Disabled,Enabled" sif (cpuis("IMX6*")) group.long 0x100++0x03 line.long 0x00 "ROMPATCHA0 ,ROMPATCH Address Register 0 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR0 ,Address Comparator" bitfld.long 0x00 0. " THUMB0 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x104++0x03 line.long 0x00 "ROMPATCHA1 ,ROMPATCH Address Register 1 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR1 ,Address Comparator" bitfld.long 0x00 0. " THUMB1 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x108++0x03 line.long 0x00 "ROMPATCHA2 ,ROMPATCH Address Register 2 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR2 ,Address Comparator" bitfld.long 0x00 0. " THUMB2 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x10C++0x03 line.long 0x00 "ROMPATCHA3 ,ROMPATCH Address Register 3 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR3 ,Address Comparator" bitfld.long 0x00 0. " THUMB3 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x110++0x03 line.long 0x00 "ROMPATCHA4 ,ROMPATCH Address Register 4 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR4 ,Address Comparator" bitfld.long 0x00 0. " THUMB4 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x114++0x03 line.long 0x00 "ROMPATCHA5 ,ROMPATCH Address Register 5 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR5 ,Address Comparator" bitfld.long 0x00 0. " THUMB5 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x118++0x03 line.long 0x00 "ROMPATCHA6 ,ROMPATCH Address Register 6 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR6 ,Address Comparator" bitfld.long 0x00 0. " THUMB6 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x11C++0x03 line.long 0x00 "ROMPATCHA7 ,ROMPATCH Address Register 7 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR7 ,Address Comparator" bitfld.long 0x00 0. " THUMB7 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x120++0x03 line.long 0x00 "ROMPATCHA8 ,ROMPATCH Address Register 8 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR8 ,Address Comparator" bitfld.long 0x00 0. " THUMB8 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x124++0x03 line.long 0x00 "ROMPATCHA9 ,ROMPATCH Address Register 9 " hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR9 ,Address Comparator" bitfld.long 0x00 0. " THUMB9 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x128++0x03 line.long 0x00 "ROMPATCHA10,ROMPATCH Address Register 10" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR10 ,Address Comparator" bitfld.long 0x00 0. " THUMB10 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x12C++0x03 line.long 0x00 "ROMPATCHA11,ROMPATCH Address Register 11" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR11 ,Address Comparator" bitfld.long 0x00 0. " THUMB11 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x130++0x03 line.long 0x00 "ROMPATCHA12,ROMPATCH Address Register 12" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR12 ,Address Comparator" bitfld.long 0x00 0. " THUMB12 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x134++0x03 line.long 0x00 "ROMPATCHA13,ROMPATCH Address Register 13" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR13 ,Address Comparator" bitfld.long 0x00 0. " THUMB13 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x138++0x03 line.long 0x00 "ROMPATCHA14,ROMPATCH Address Register 14" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR14 ,Address Comparator" bitfld.long 0x00 0. " THUMB14 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x13C++0x03 line.long 0x00 "ROMPATCHA15,ROMPATCH Address Register 15" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR15 ,Address Comparator" bitfld.long 0x00 0. " THUMB15 ,THUMB Comparator Select" "ARM,THUMB" else group.long 0x100++0x03 line.long 0x00 "ROMPATCHA0,ROMPATCH Address Register 0" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR0 ,Address Comparator" bitfld.long 0x00 0. " THUMB0 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x104++0x03 line.long 0x00 "ROMPATCHA1,ROMPATCH Address Register 1" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR1 ,Address Comparator" bitfld.long 0x00 0. " THUMB1 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x108++0x03 line.long 0x00 "ROMPATCHA2,ROMPATCH Address Register 2" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR2 ,Address Comparator" bitfld.long 0x00 0. " THUMB2 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x10C++0x03 line.long 0x00 "ROMPATCHA3,ROMPATCH Address Register 3" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR3 ,Address Comparator" bitfld.long 0x00 0. " THUMB3 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x110++0x03 line.long 0x00 "ROMPATCHA4,ROMPATCH Address Register 4" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR4 ,Address Comparator" bitfld.long 0x00 0. " THUMB4 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x114++0x03 line.long 0x00 "ROMPATCHA5,ROMPATCH Address Register 5" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR5 ,Address Comparator" bitfld.long 0x00 0. " THUMB5 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x118++0x03 line.long 0x00 "ROMPATCHA6,ROMPATCH Address Register 6" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR6 ,Address Comparator" bitfld.long 0x00 0. " THUMB6 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x11C++0x03 line.long 0x00 "ROMPATCHA7,ROMPATCH Address Register 7" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR7 ,Address Comparator" bitfld.long 0x00 0. " THUMB7 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x120++0x03 line.long 0x00 "ROMPATCHA8,ROMPATCH Address Register 8" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR8 ,Address Comparator" bitfld.long 0x00 0. " THUMB8 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x124++0x03 line.long 0x00 "ROMPATCHA9,ROMPATCH Address Register 9" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR9 ,Address Comparator" bitfld.long 0x00 0. " THUMB9 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x128++0x03 line.long 0x00 "ROMPATCHA10,ROMPATCH Address Register 10" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR10 ,Address Comparator" bitfld.long 0x00 0. " THUMB10 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x12C++0x03 line.long 0x00 "ROMPATCHA11,ROMPATCH Address Register 11" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR11 ,Address Comparator" bitfld.long 0x00 0. " THUMB11 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x130++0x03 line.long 0x00 "ROMPATCHA12,ROMPATCH Address Register 12" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR12 ,Address Comparator" bitfld.long 0x00 0. " THUMB12 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x134++0x03 line.long 0x00 "ROMPATCHA13,ROMPATCH Address Register 13" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR13 ,Address Comparator" bitfld.long 0x00 0. " THUMB13 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x138++0x03 line.long 0x00 "ROMPATCHA14,ROMPATCH Address Register 14" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR14 ,Address Comparator" bitfld.long 0x00 0. " THUMB14 ,THUMB Comparator Select" "ARM,THUMB" group.long 0x13C++0x03 line.long 0x00 "ROMPATCHA15,ROMPATCH Address Register 15" hexmask.long.tbyte 0x00 1.--22. 0x2 " ADDR15 ,Address Comparator" bitfld.long 0x00 0. " THUMB15 ,THUMB Comparator Select" "ARM,THUMB" endif group.long 0x208++0x03 line.long 0x00 "ROMPATCHSR,ROMPATCH Status Register" eventfld.long 0x00 17. " SW ,ROMC AHB Simultaneous Address Comparisons" "Not occurred,Occurred" rbitfld.long 0x00 0.--5. " SOURCE ,ROMPATCH Source Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0x0B tree.end sif (cpu()!="IMX6SOLO"&&cpu()!="IMX6SOLOLITE"&&cpu()!="IMX6DUALLITE") tree "SATA (Serial Advanced Technology Attachment Controller)" base ad:0x02200000 width 11. tree "Generic Host Register Map" rgroup.long 0x00++0x03 line.long 0x00 "CAP,HBA Capabilities Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") bitfld.long 0x00 31. " S64A ,Supports 64-bit Addressing" "Not supported,Supported" textline " " endif bitfld.long 0x00 30. " SNCQ ,Supports Native Command Queuing" "Not supported,Supported" bitfld.long 0x00 29. " SSNTF ,Supports SNotification Register" "Not supported,Supported" textline " " sif (cpuis("IMX6*")) bitfld.long 0x00 28. " SMPS ,Supports Mechanical Presence Switch" "Not supported,Supported" textline " " endif bitfld.long 0x00 27. " SSS ,Supports Staggered Spin-up" "Not supported,Supported" bitfld.long 0x00 26. " SALP ,Supports Aggressive Link Power Management" "Not supported,Supported" textline " " bitfld.long 0x00 25. " SAL ,Supports Activity LED" "Not supported,Supported" bitfld.long 0x00 24. " SCLO ,Supports Command List Override" "Not supported,Supported" textline " " bitfld.long 0x00 18. " SAM ,Supports AHCI Mode Only" "Not supported,Supported" bitfld.long 0x00 17. " SPM ,Supports Port Multiplier" "Not supported,Supported" textline " " bitfld.long 0x00 15. " PMD ,PIO Multiple DRQ Block" "Not supported,Supported" bitfld.long 0x00 14. " SSC ,Slumber State Capable" "Not supported,Supported" textline " " bitfld.long 0x00 13. " PSC ,Partial State Capable" "Not supported,Supported" bitfld.long 0x00 8.--12. " NCS ,Number of Command Slots" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 7. " CCCS ,Command Completion Coalescing Support" "Not supported,Supported" bitfld.long 0x00 6. " EMS ,Enclosure Management Support" "Not supported,?..." textline " " bitfld.long 0x00 5. " SXS ,Supports External SATA" "Not supported,Supported" bitfld.long 0x00 0.--4. " NP ,Number of Ports" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x04++0x07 line.long 0x00 "GHC,Global HBA Control Register" bitfld.long 0x00 31. " AE ,AHCI Enable" ",Enabled" bitfld.long 0x00 1. " IE ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HR ,HBA Reset" "No reset,Reset" line.long 0x04 "IS,Interrupt Status Register" eventfld.long 0x04 1. " IPS_1 ,Interrupt Pending Status Port 1" "No interrupt,Interrupt" eventfld.long 0x04 0. " IPS_0 ,Interrupt Pending Status Port 0" "No interrupt,Interrupt" rgroup.long 0x0C++0x07 line.long 0x00 "PI,Port Implemented Register" bitfld.long 0x00 0. " PI ,Ports Implemented" "Not implemented,Implemented" line.long 0x04 "VS,AHCI Version Register" hexmask.long.word 0x04 16.--31. 1. " MJR ,Major Version Number" hexmask.long.word 0x04 0.--15. 1. " MNR ,Minor Version Number" group.long 0x14++0x07 line.long 0x00 "CCC_CTL ,Command Completion Coalescing Control" hexmask.long.word 0x00 16.--31. 1. " TV ,Time-out Value" hexmask.long.byte 0x00 8.--15. 1. " CC ,Command Completions" textline " " bitfld.long 0x00 3.--7. " INT ,Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " EN ,CCC feature enable" "Disabled,Enabled" line.long 0x04 "CCC_PORTS ,Command Completion Coalescing Ports" bitfld.long 0x04 31. " PRT_31 ,Port 31 is part of the CCC feature" "No,Yes" bitfld.long 0x04 30. " PRT_30 ,Port 30 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 29. " PRT_29 ,Port 29 is part of the CCC feature" "No,Yes" bitfld.long 0x04 28. " PRT_28 ,Port 28 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 27. " PRT_27 ,Port 27 is part of the CCC feature" "No,Yes" bitfld.long 0x04 26. " PRT_26 ,Port 26 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 25. " PRT_25 ,Port 25 is part of the CCC feature" "No,Yes" bitfld.long 0x04 24. " PRT_24 ,Port 24 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 23. " PRT_23 ,Port 23 is part of the CCC feature" "No,Yes" bitfld.long 0x04 22. " PRT_22 ,Port 22 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 21. " PRT_21 ,Port 21 is part of the CCC feature" "No,Yes" bitfld.long 0x04 20. " PRT_20 ,Port 20 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 19. " PRT_19 ,Port 19 is part of the CCC feature" "No,Yes" bitfld.long 0x04 18. " PRT_18 ,Port 18 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 17. " PRT_17 ,Port 17 is part of the CCC feature" "No,Yes" bitfld.long 0x04 16. " PRT_16 ,Port 16 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 15. " PRT_15 ,Port 15 is part of the CCC feature" "No,Yes" bitfld.long 0x04 14. " PRT_14 ,Port 14 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 13. " PRT_13 ,Port 13 is part of the CCC feature" "No,Yes" bitfld.long 0x04 12. " PRT_12 ,Port 12 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 11. " PRT_11 ,Port 11 is part of the CCC feature" "No,Yes" bitfld.long 0x04 10. " PRT_10 ,Port 10 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 9. " PRT_9 ,Port 9 is part of the CCC feature" "No,Yes" bitfld.long 0x04 8. " PRT_8 ,Port 8 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 7. " PRT_7 ,Port 7 is part of the CCC feature" "No,Yes" bitfld.long 0x04 6. " PRT_6 ,Port 6 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 5. " PRT_5 ,Port 5 is part of the CCC feature" "No,Yes" bitfld.long 0x04 4. " PRT_4 ,Port 4 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 3. " PRT_3 ,Port 3 is part of the CCC feature" "No,Yes" bitfld.long 0x04 2. " PRT_2 ,Port 2 is part of the CCC feature" "No,Yes" textline " " bitfld.long 0x04 1. " PRT_1 ,Port 1 is part of the CCC feature" "No,Yes" bitfld.long 0x04 0. " PRT_0 ,Port 0 is part of the CCC feature" "No,Yes" rgroup.long 0x24++0x03 line.long 0x00 "CAP2,HBA Capabilities Extended Register" bitfld.long 0x00 2. " APST ,Automatic Partial to Slumber Transitions" "Not supported,Supported" rgroup.long 0xA0++0x03 line.long 0x00 "BISTAFR,BIST Activate FIS Register" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Non-Compliant Pattern" hexmask.long.byte 0x00 0.--7. 1. " PD ,Pattern Definition" group.long 0xA4++0x03 line.long 0x00 "BISTCR,BIST Control Register" bitfld.long 0x00 20. " FERLB ,Far-end Retimed Loopback" "Disabled,Enabled" bitfld.long 0x00 18. " TXO ,Transmit Only" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CNTCLR ,Counter Clear" "Not cleared,Cleared" bitfld.long 0x00 16. " NEALB ,Near-End Analog Loopback" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " QPHYINIT ,Quick PHY initialization feature Enable" "Disabled,Enabled" bitfld.long 0x00 12. " SDFE ,Signal Detect Feature Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " LLC_RPD ,Link Layer Control-Repeat primitive drop function" "Disabled,Enabled" bitfld.long 0x00 10. " LLC_RPD ,Link Layer Control-Repeat primitive drop function" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " LLC_DESCRAM ,Link Layer Control-Descrambler disabled/enabled in normal mode, enabled/disabled in BIST mode" "Disabled/Enabled,Enabled/Disabled" textline " " bitfld.long 0x00 8. " LLC_SCRAM ,Link Layer Control-Scrambler disabled/enabled in normal mode, enabled/disabled in BIST mode" "Disabled/Enabled,Enabled/Disabled" textline " " bitfld.long 0x00 6. " ERREN ,Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " FLIP ,Flip Disparity" "Not flipped,Flipped" bitfld.long 0x00 4. " PV ,Pattern Version" "Short,Long" textline " " bitfld.long 0x00 0.--3. " PATTERN ,This field defines one of the following SATA compliant patterns" "SSOP,HTDP,LTDP,LFSCP,COMP,LBP,MFTP,HFTP,LFTP,?..." rgroup.long 0xA8++0x07 line.long 0x00 "BISTFCTR ,BIST FIS Count Register" line.long 0x04 "BISTSR ,BIST Status Register" sif (cpuis("IMX6*")) hexmask.long.byte 0x04 16.--23. 1. " BRSTERR ,Burst Error" hexmask.long.word 0x04 0.--15. 1. " FRAMERR ,Frame Error" else hexmask.long.word 0x04 0.--15. 1. " FRAMERR ,Burst Error" endif group.long 0xBC++0x03 line.long 0x00 "OOBR ,OOB Register" bitfld.long 0x00 31. " WE ,Write Enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " cwMin ,COMWAKE Minimum Value" textline " " hexmask.long.byte 0x00 16.--23. 1. " cwMax ,COMWAKE Maximum Value" hexmask.long.byte 0x00 8.--15. 1. " ciMin ,COMINIT Minimum Value" textline " " hexmask.long.byte 0x00 0.--7. 1. " ciMax ,COMINIT Maximum Value" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") hgroup.long 0xD0++0x07 hide.long 0x00 "GPCR,General Purpose Control Register" hide.long 0x04 "SATA_GPSR,General Purpose Status Register" endif if (((per.l((ad:0x02200000+0x14)))&0x00000001)==0x00000001) rgroup.long 0xE0++0x03 line.long 0x00 "TIMER1MS ,Timer 1ms Register" hexmask.long.tbyte 0x00 0.--19. 1. " TIMV ,1ms Timer Value" else group.long 0xE0++0x03 line.long 0x00 "TIMER1MS ,Timer 1ms Register" hexmask.long.tbyte 0x00 0.--19. 1. " TIMV ,1ms Timer Value" endif sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD") rgroup.long 0xE8++0x0B line.long 0x00 "GPARAM1R ,Global Parameter 1 Register" bitfld.long 0x00 31. " ALIGN_M ,Rx Data Alignment" "Misaligned,Aligned" bitfld.long 0x00 30. " RX_BUFFER ,Rx Data Buffer" "Exclude,Include" textline " " bitfld.long 0x00 28.--29. " PHY_DATA ,PHY Data Width" "1,2,4,?..." bitfld.long 0x00 27. " PHY_RST ,PHY Reset Mode" "Low,High" textline " " hexmask.long.byte 0x00 21.--26. 1. " PHY_CTRL ,PHY Control Width" hexmask.long.byte 0x00 15.--20. 1. " PHY_STAT ,PHY_STAT PHY Status Width" textline " " bitfld.long 0x00 13. " BIST_M ,BIST Loopback Checking Depth" "FIS,DWORD" bitfld.long 0x00 10. " RETURN_ERR ,AHB Error Response" "False,True" textline " " bitfld.long 0x00 8.--9. " AHB_ENDIAN ,AHB Bus Endianness" "Little,Big,Dynamic,?..." bitfld.long 0x00 7. " S_HADDR ,AHB Slave Address Bus Width" "32-bits,64-bits" textline " " bitfld.long 0x00 6. " M_HADDR ,AHB Master Address Bus Width" "32-bits,64-bits" line.long 0x04 "GPARAM2R,Global Parameter 2 Register" bitfld.long 0x04 14. " DEV_CP ,Cold Presence Detect" "Exclude,Include" bitfld.long 0x04 13. " DEV_MP ,Mechanical Presence Switch" "Exclude,Include" textline " " bitfld.long 0x04 12. " ENCODE_M ,8b/10b Encoding/Decoding" "Exclude,Include" bitfld.long 0x04 11. " RXOOB_CLK_M ,Rx OOB Clock Mode" "RxClock,Separate" textline " " bitfld.long 0x04 10. " RX_OOB_M ,Rx OOB Mode" "Exclude,Include" bitfld.long 0x04 9. " TX_OOB_M ,Tx OOB Mode" "Exclude,Include" textline " " hexmask.long.word 0x04 0.--8. 1. " RXOOB_CLK ,Rx OOB Clock Frequency (50MHz)" line.long 0x08 "PPARAMR ,Port Parameter Register" bitfld.long 0x08 9. " TX_MEM_M ,Tx FIFO Memory Read Port Type" "Async,Sync" bitfld.long 0x08 8. " TX_MEM_S ,Tx FIFO Memory Type" "External,Internal" textline " " bitfld.long 0x08 7. " RX_MEM_M ,Rx FIFO Memory Read Port Type" "Async,Sync" bitfld.long 0x08 6. " RX_MEM_S ,Rx FIFO Memory Type" "External,Internal" textline " " bitfld.long 0x08 3.--5. " TXFIFO_DEPTH ,Tx FIFO Depth" ",,,,512,?..." bitfld.long 0x08 0.--2. " RXFIFO_DEPTH ,Rx FIFO Depth" ",,,,512,?..." endif group.long 0xF4++0x03 line.long 0x00 "TESTR,Test Register" bitfld.long 0x00 16.--18. " PSEL ,Port Select" "Port0,Port1,Port2,Port3,Port4,Port5,Port6,Port7" bitfld.long 0x00 0. " TEST_IF ,Test Interface" "Normal mode,Test mode" rgroup.long 0xF8++0x03 line.long 0x00 "VERSIONR ,Version Register" tree.end tree "Port Register Descriptions" group.long 0x100++0x03 line.long 0x00 "P0CLB,Port0 Command List Base Address Register" hexmask.long.tbyte 0x00 10.--31. 0x04 " CLB ,Command List Base Address" group.long 0x108++0x03 line.long 0x00 "P0FB,Port0 FIS Base Address Register" hexmask.long.tbyte 0x00 8.--31. 1. " FB ,FIS Base Address" group.long 0x110++0x03 line.long 0x00 "P0IS,Port0 Interrupt Status Register" eventfld.long 0x00 30. " TFES ,Task File Error Status" "No error,Error" eventfld.long 0x00 29. " HBFS ,Host Bus Fatal Error Status" "No error,Error" textline " " eventfld.long 0x00 28. " HBDS ,Host Bus Data Error Status" "No error,Error" eventfld.long 0x00 27. " IFS ,Interface Fatal Error Status" "No error,Error" textline " " eventfld.long 0x00 26. " INFS ,Interface Non-fatal Error Status" "No error,Error" eventfld.long 0x00 24. " OFS ,Overflow Status" "No overflow,Overflow" textline " " eventfld.long 0x00 23. " IPMS ,Incorrect Port Multiplier Status" "Correct,Incorrect" eventfld.long 0x00 22. " PRCS ,PHY Ready Change Status" "Not ready,Ready" textline " " eventfld.long 0x00 6. " PCS ,Port Connect Change Status" "No change,Change" eventfld.long 0x00 5. " DPS ,Descriptor Processed" "Not processed,Processed" textline " " eventfld.long 0x00 4. " UFS ,Unknown FIS Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 3. " SDBS ,Set Device Bits Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " DSS ,DMA Setup FIS Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " PSS ,PIO Setup FIS Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " DHRS ,Device to Host Register FIS Interrupt" "No interrupt,Interrupt" group.long 0x114++0x03 line.long 0x00 "P0IE,Port0 Interrupt Enable Register" bitfld.long 0x00 31. " CPDE ,Cold Port Detect Enable" "Disabled,Enabled" bitfld.long 0x00 30. " TFEE ,Task File Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HBFE ,Host Bus Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 28. " HBDE ,Host Bus Data Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " IFE ,Interface Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 26. " INFE ,Interface Non-Fatal Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OFE ,Overflow Enable" "Disabled,Enabled" bitfld.long 0x00 23. " IPME ,Incorrect Port Multiplier Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PRCE ,PHY Ready Change Enable" "Disabled,Enabled" bitfld.long 0x00 6. " PCE ,Port Change Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DPE ,Descriptor Processed Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " UFE ,Unknown FIS Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SDBE ,Set Device Bits FIS Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DSE ,DMA Setup FIS Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PSE ,PIO Setup FIS Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DHRE ,Device to Host Register FIS Interrupt" "Disabled,Enabled" if ((per.l((ad:0x02200000+0x118))&0x00000001)==0x00000001) group.long 0x118++0x03 line.long 0x00 "P0CMD,Port0 Command Register" bitfld.long 0x00 28.--31. " ICC ,Interface Communication Control" "No-Op/ Idle,Active,Partial,,,,Slumber,?..." bitfld.long 0x00 27. " ASP ,Aggressive Slumber/ Partial" "Partial,Slumber" textline " " bitfld.long 0x00 26. " ALPE ,Aggressive Link Power Management Enable" "Disabled,Enabled" bitfld.long 0x00 25. " DLAE ,Drive LED on ATAPI Enable" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") textline " " bitfld.long 0x00 24. " ATAPI ,ATAPI Device is ATAPI" "non-ATAPI,ATAPI" bitfld.long 0x00 23. " APSTE ,Device is ATAPI" "non-ATAPI,ATAPI" else textline " " bitfld.long 0x00 24. " ATAPI ,Device is ATAPI" "non-ATAPI,ATAPI" bitfld.long 0x00 23. " APSTE ,Automatic Partial to Slumber Transitions Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 21. " ESP ,External SATA Port" "Disabled,Enabled" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 20. " CPD ,Cold Presence Detection" "Disabled,Enabled" bitfld.long 0x00 19. " MPSP ,Mechanical Presence Switch Attached to Port" "Disabled,Enabled" endif textline " " bitfld.long 0x00 18. " HPCP ,Hot Plug Capable Port" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " PMA ,Port Multiplier Attached" "Not attached,Attached" bitfld.long 0x00 16. " CPS ,Cold Presence State" "No device,Attached" textline " " bitfld.long 0x00 15. " CR ,Command List Running" "Not running,Running" bitfld.long 0x00 14. " FR ,FIS Receive Running" "Not running,Running" textline " " bitfld.long 0x00 13. " MPSS ,Mechanical Presence Switch State" "Closed,Open" bitfld.long 0x00 8.--12. " CCS ,Current Command Slot" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 4. " FRE ,FIS Receive Enable" "Disabled,Enabled" bitfld.long 0x00 3. " CLO ,Command List Override" "No effect,Override" textline " " bitfld.long 0x00 2. " POD ,Power On Device" "Powered off,Powered on" bitfld.long 0x00 1. " SUD ,Spin-Up Device" "No action,COMRESET initialization" textline " " bitfld.long 0x00 0. " ST ,Start (Port processes the command list)" "Not started,Started" else group.long 0x118++0x03 line.long 0x00 "P0CMD,Port0 Command Register" bitfld.long 0x00 28.--31. " ICC ,Interface Communication Control" "No-Op/ Idle,Active,Partial,,,,Slumber,?..." bitfld.long 0x00 27. " ASP ,Aggressive Slumber/ Partial" "Partial,Slumber" textline " " bitfld.long 0x00 26. " ALPE ,Aggressive Link Power Management Enable" "Disabled,Enabled" bitfld.long 0x00 25. " DLAE ,Drive LED on ATAPI Enable" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") textline " " bitfld.long 0x00 24. " ATAPI ,ATAPI Device is ATAPI" "non-ATAPI,ATAPI" bitfld.long 0x00 23. " APSTE ,Device is ATAPI" "non-ATAPI,ATAPI" else textline " " bitfld.long 0x00 24. " ATAPI ,Device is ATAPI" "non-ATAPI,ATAPI" bitfld.long 0x00 23. " APSTE ,Automatic Partial to Slumber Transitions Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 21. " ESP ,External SATA Port" "Disabled,Enabled" textline " " sif (!cpuis("IMX6*")) bitfld.long 0x00 20. " CPD ,Cold Presence Detection" "Disabled,Enabled" bitfld.long 0x00 19. " MPSP ,Mechanical Presence Switch Attached to Port" "Disabled,Enabled" textline " " endif textline " " bitfld.long 0x00 18. " HPCP ,Hot Plug Capable Port" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " PMA ,Port Multiplier Attached" "Not attached,Attached" bitfld.long 0x00 16. " CPS ,Cold Presence State" "No device,Attached" textline " " bitfld.long 0x00 15. " CR ,Command List Running" "Not running,Running" bitfld.long 0x00 14. " FR ,FIS Receive Running" "Not running,Running" textline " " bitfld.long 0x00 13. " MPSS ,Mechanical Presence Switch State" "Closed,Open" bitfld.long 0x00 4. " FRE ,FIS Receive Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLO ,Command List Override" "No effect," bitfld.long 0x00 2. " POD ,Power On Device" "Powered off,Powered on" textline " " bitfld.long 0x00 1. " SUD ,Spin-Up Device" "No action,COMRESET initialization" bitfld.long 0x00 0. " ST ,Start (Port processes the command list)" "Not started,Started" endif rgroup.long 0x120++0x03 line.long 0x00 "P0TFD,Port0 Task File Data Register" hexmask.long.byte 0x00 8.--15. 1. " ERR ,Error" bitfld.long 0x00 7. " STS_BSY ,Indicates the interface is busy" "Not busy,Busy" textline " " bitfld.long 0x00 4.--6. " STS_cs0 ,Command specific" "b'000,b'001,b'010,b'011,b'100,b'101,b'110,b'111" bitfld.long 0x00 3. " STS_d.l ,Indicates a data transfer is requested" "Not requested,Requested" textline " " bitfld.long 0x00 1.--2. " STS_cs1 ,Command specific" "b'00,b'01,b'10,b'11" bitfld.long 0x00 0. " STS_ERR ,Indicates an error during the transfer" "No error,Error" rgroup.long 0x124++0x03 line.long 0x00 "P0SIG,Port0 Signature Register" hexmask.long.byte 0x00 24.--31. 1. " SIG[31:24] ,Signature- LBA High (Cylinder High) Register" hexmask.long.byte 0x00 16.--23. 1. " SIG[23:16] ,Signature-LBA Mid (Cylinder Low) Register" textline " " hexmask.long.byte 0x00 8.--15. 1. " SIG[15:8] ,Signature-LBA Low (Sector Number) Register" hexmask.long.byte 0x00 0.--7. 1. " SIG[0:7] ,Signature-Sector Count Register" textline " " rgroup.long 0x128++0x03 line.long 0x00 "P0SSTS,Port0 Serial ATA Status {SStatus} Register" bitfld.long 0x00 8.--11. " IPM ,Interface Power Management" "Device not present or communication not established,Active state,Partial state,,,,Slumber state,?..." sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") textline " " bitfld.long 0x00 4.--7. " SPD ,Current Interface Speed" "Device not present or communication not established,1.5 Gb/s communication rate negotiated,3.0 Gb/s communication rate negotiated,?..." else textline " " bitfld.long 0x00 4.--7. " SPD ,Current Interface Speed" "Device not present or communication not established,Generation 1 communication rate negotiated,Generation 2 communication rate negotiated,?..." endif sif (cpuis("IMX6*")) textline " " bitfld.long 0x00 0.--3. " DET ,Indicates the interface device detection and PHY state" "No device,COMINIT is detected,,PHY Ready is detected,Offline mode,?..." endif group.long 0x12C++0x03 line.long 0x00 "P0SCTL,Port0 Serial ATA Control {SControl} Register" bitfld.long 0x00 8.--11. " IPM ,Interface Power Management Transitions Allowed" "No restrictions,Partial disabled,Slumber disabled,Partial and Slumber disabled,?..." sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") textline " " bitfld.long 0x00 4.--7. " SPD ,Speed Allowed" "No restrictions,1.5Gb/s communication rate,3.0 Gb/s communication rate,?..." else textline " " bitfld.long 0x00 4.--7. " SPD ,Speed Allowed" "No restrictions,1.5Gb/s communication rate,?..." endif textline " " bitfld.long 0x00 0.--3. " DET ,Device Detection Initialization" "No device detection or initialization action requested,Perform interface initialization sequence,,,Disable the Serial ATA interface,?..." textline " " group.long 0x130++0x03 line.long 0x00 "P0SERR,Port0 Serial ATA Error {SError} Register" eventfld.long 0x00 26. " DIAG_X ,Exchanged(PHY COMINIT signal is detected)" "Not detected,Detected" eventfld.long 0x00 25. " DIAG_F ,Unknown FIS Type" "Known,Unknown" textline " " eventfld.long 0x00 24. " DIAG_T ,Transport State Transition Error" "No error,Error" eventfld.long 0x00 23. " DIAG_S ,Link Sequence Error" "No error,Error" textline " " eventfld.long 0x00 22. " DIAG_H ,Handshake Error" "No error,Error" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") textline " " eventfld.long 0x00 21. " DIAG_C ,Disparity Error" "No error,Error" eventfld.long 0x00 20. " DIAG_D ,CRC Error" "No error,Error" else textline " " eventfld.long 0x00 21. " DIAG_D ,CRC Error" "No error,Error" bitfld.long 0x00 20. " DIAG_C ,Disparity Error" "No error,Error" endif textline " " eventfld.long 0x00 19. " DIAG_B ,10B to 8B Decode Error" "No error,Error" textline " " eventfld.long 0x00 18. " DIAG_W ,Comm Wake" "Not detected,Detected" eventfld.long 0x00 17. " DIAG_I ,PHY Internal Error" "No error,Error" textline " " eventfld.long 0x00 16. " DIAG_N ,PHY Ready Change" "Not ready,Ready" eventfld.long 0x00 11. " ERR_E ,Internal Error" "No error,Error" textline " " eventfld.long 0x00 10. " ERR_P ,Protocol Error" "No error,Error" eventfld.long 0x00 9. " ERR_C ,Non-Recovered Persistent Communication Error" "No error,Error" textline " " eventfld.long 0x00 8. " ERR_T ,Non-Recovered Transient Data Integrity Error" "No error,Error" eventfld.long 0x00 1. " ERR_M ,Recovered Communication Error" "No error,Error" textline " " eventfld.long 0x00 0. " ERR_I ,Recovered Data Integrity Error" "No error,Error" group.long 0x134++0x03 line.long 0x00 "P0SACT,Port0 Serial ATA Active {SActive} Register" bitfld.long 0x00 31. " DS_31 ,TAG 31 and command slot of a native queued command 31" "Not outstanding,Outstanding" bitfld.long 0x00 30. " DS_30 ,TAG 30 and command slot of a native queued command 30" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 29. " DS_29 ,TAG 29 and command slot of a native queued command 29" "Not outstanding,Outstanding" bitfld.long 0x00 28. " DS_28 ,TAG 28 and command slot of a native queued command 28" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 27. " DS_27 ,TAG 27 and command slot of a native queued command 27" "Not outstanding,Outstanding" bitfld.long 0x00 26. " DS_26 ,TAG 26 and command slot of a native queued command 26" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 25. " DS_25 ,TAG 25 and command slot of a native queued command 25" "Not outstanding,Outstanding" bitfld.long 0x00 24. " DS_24 ,TAG 24 and command slot of a native queued command 24" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 23. " DS_23 ,TAG 23 and command slot of a native queued command 23" "Not outstanding,Outstanding" bitfld.long 0x00 22. " DS_22 ,TAG 22 and command slot of a native queued command 22" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 21. " DS_21 ,TAG 21 and command slot of a native queued command 21" "Not outstanding,Outstanding" bitfld.long 0x00 20. " DS_20 ,TAG 20 and command slot of a native queued command 20" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 19. " DS_19 ,TAG 19 and command slot of a native queued command 19" "Not outstanding,Outstanding" bitfld.long 0x00 18. " DS_18 ,TAG 18 and command slot of a native queued command 18" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 17. " DS_17 ,TAG 17 and command slot of a native queued command 17" "Not outstanding,Outstanding" bitfld.long 0x00 16. " DS_16 ,TAG 16 and command slot of a native queued command 16" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 15. " DS_15 ,TAG 15 and command slot of a native queued command 15" "Not outstanding,Outstanding" bitfld.long 0x00 14. " DS_14 ,TAG 14 and command slot of a native queued command 14" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 13. " DS_13 ,TAG 13 and command slot of a native queued command 13" "Not outstanding,Outstanding" bitfld.long 0x00 12. " DS_12 ,TAG 12 and command slot of a native queued command 12" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 11. " DS_11 ,TAG 11 and command slot of a native queued command 11" "Not outstanding,Outstanding" bitfld.long 0x00 10. " DS_10 ,TAG 10 and command slot of a native queued command 10" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 9. " DS_9 ,TAG 9 and command slot of a native queued command 9" "Not outstanding,Outstanding" bitfld.long 0x00 8. " DS_8 ,TAG 8 and command slot of a native queued command 8" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 7. " DS_7 ,TAG 7 and command slot of a native queued command 7" "Not outstanding,Outstanding" bitfld.long 0x00 6. " DS_6 ,TAG 6 and command slot of a native queued command 6" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 5. " DS_5 ,TAG 5 and command slot of a native queued command 5" "Not outstanding,Outstanding" bitfld.long 0x00 4. " DS_4 ,TAG 4 and command slot of a native queued command 4" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 3. " DS_3 ,TAG 3 and command slot of a native queued command 3" "Not outstanding,Outstanding" bitfld.long 0x00 2. " DS_2 ,TAG 2 and command slot of a native queued command 2" "Not outstanding,Outstanding" textline " " bitfld.long 0x00 1. " DS_1 ,TAG 1 and command slot of a native queued command 1" "Not outstanding,Outstanding" bitfld.long 0x00 0. " DS_0 ,TAG 0 and command slot of a native queued command 0" "Not outstanding,Outstanding" if ((per.l((ad:0x02200000+0x118))&0x00000001)==0x00000001) group.long 0x138++0x03 line.long 0x00 "P0CI,Port0 Command Issue Register" bitfld.long 0x00 31. " CI_31 ,Command 31 Issued" "Not issued,Issued" bitfld.long 0x00 30. " CI_30 ,Command 30 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 29. " CI_29 ,Command 29 Issued" "Not issued,Issued" bitfld.long 0x00 28. " CI_28 ,Command 28 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 27. " CI_27 ,Command 27 Issued" "Not issued,Issued" bitfld.long 0x00 26. " CI_26 ,Command 26 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 25. " CI_25 ,Command 25 Issued" "Not issued,Issued" bitfld.long 0x00 24. " CI_24 ,Command 24 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 23. " CI_23 ,Command 23 Issued" "Not issued,Issued" bitfld.long 0x00 22. " CI_22 ,Command 22 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 21. " CI_21 ,Command 21 Issued" "Not issued,Issued" bitfld.long 0x00 20. " CI_20 ,Command 20 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 19. " CI_19 ,Command 19 Issued" "Not issued,Issued" bitfld.long 0x00 18. " CI_18 ,Command 18 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 17. " CI_17 ,Command 17 Issued" "Not issued,Issued" bitfld.long 0x00 16. " CI_16 ,Command 16 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 15. " CI_15 ,Command 15 Issued" "Not issued,Issued" bitfld.long 0x00 14. " CI_14 ,Command 14 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 13. " CI_13 ,Command 13 Issued" "Not issued,Issued" bitfld.long 0x00 12. " CI_12 ,Command 12 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 11. " CI_11 ,Command 11 Issued" "Not issued,Issued" bitfld.long 0x00 10. " CI_10 ,Command 10 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 9. " CI_9 ,Command 9 Issued" "Not issued,Issued" bitfld.long 0x00 8. " CI_8 ,Command 8 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 7. " CI_7 ,Command 7 Issued" "Not issued,Issued" bitfld.long 0x00 6. " CI_6 ,Command 6 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 5. " CI_5 ,Command 5 Issued" "Not issued,Issued" bitfld.long 0x00 4. " CI_4 ,Command 4 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 3. " CI_3 ,Command 3 Issued" "Not issued,Issued" bitfld.long 0x00 2. " CI_2 ,Command 2 Issued" "Not issued,Issued" textline " " bitfld.long 0x00 1. " CI_1 ,Command 1 Issued" "Not issued,Issued" bitfld.long 0x00 0. " CI_0 ,Command 0 Issued" "Not issued,Issued" else group.long 0x138++0x03 line.long 0x00 "P0CI,Port0 Command Issue Register" bitfld.long 0x00 31. " CI_31 ,Command 31 Issued" "Not issued,?..." bitfld.long 0x00 30. " CI_30 ,Command 30 Issued" "Not issued,?..." textline " " bitfld.long 0x00 29. " CI_29 ,Command 29 Issued" "Not issued,?..." bitfld.long 0x00 28. " CI_28 ,Command 28 Issued" "Not issued,?..." textline " " bitfld.long 0x00 27. " CI_27 ,Command 27 Issued" "Not issued,?..." bitfld.long 0x00 26. " CI_26 ,Command 26 Issued" "Not issued,?..." textline " " bitfld.long 0x00 25. " CI_25 ,Command 25 Issued" "Not issued,?..." bitfld.long 0x00 24. " CI_24 ,Command 24 Issued" "Not issued,?..." textline " " bitfld.long 0x00 23. " CI_23 ,Command 23 Issued" "Not issued,?..." bitfld.long 0x00 22. " CI_22 ,Command 22 Issued" "Not issued,?..." textline " " bitfld.long 0x00 21. " CI_21 ,Command 21 Issued" "Not issued,?..." bitfld.long 0x00 20. " CI_20 ,Command 20 Issued" "Not issued,?..." textline " " bitfld.long 0x00 19. " CI_19 ,Command 19 Issued" "Not issued,?..." bitfld.long 0x00 18. " CI_18 ,Command 18 Issued" "Not issued,?..." textline " " bitfld.long 0x00 17. " CI_17 ,Command 17 Issued" "Not issued,?..." bitfld.long 0x00 16. " CI_16 ,Command 16 Issued" "Not issued,?..." textline " " bitfld.long 0x00 15. " CI_15 ,Command 15 Issued" "Not issued,?..." bitfld.long 0x00 14. " CI_14 ,Command 14 Issued" "Not issued,?..." textline " " bitfld.long 0x00 13. " CI_13 ,Command 13 Issued" "Not issued,?..." bitfld.long 0x00 12. " CI_12 ,Command 12 Issued" "Not issued,?..." textline " " bitfld.long 0x00 11. " CI_11 ,Command 11 Issued" "Not issued,?..." bitfld.long 0x00 10. " CI_10 ,Command 10 Issued" "Not issued,?..." textline " " bitfld.long 0x00 9. " CI_9 ,Command 9 Issued" "Not issued,?..." bitfld.long 0x00 8. " CI_8 ,Command 8 Issued" "Not issued,?..." textline " " bitfld.long 0x00 7. " CI_7 ,Command 7 Issued" "Not issued,?..." bitfld.long 0x00 6. " CI_6 ,Command 6 Issued" "Not issued,?..." textline " " bitfld.long 0x00 5. " CI_5 ,Command 5 Issued" "Not issued,?..." bitfld.long 0x00 4. " CI_4 ,Command 4 Issued" "Not issued,?..." textline " " bitfld.long 0x00 3. " CI_3 ,Command 3 Issued" "Not issued,?..." bitfld.long 0x00 2. " CI_2 ,Command 2 Issued" "Not issued,?..." textline " " bitfld.long 0x00 1. " CI_1 ,Command 1 Issued" "Not issued,?..." bitfld.long 0x00 0. " CI_0 ,Command 0 Issued" "Not issued,?..." endif group.long 0x13C++0x03 line.long 0x00 "P0SNTF,Port0 Serial ATA Notification Register" eventfld.long 0x00 15. " PMN_15 ,PM Port 15 Notify" "Not notified,Notified" eventfld.long 0x00 14. " PMN_14 ,PM Port 14 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 13. " PMN_13 ,PM Port 13 Notify" "Not notified,Notified" eventfld.long 0x00 12. " PMN_12 ,PM Port 12 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 11. " PMN_11 ,PM Port 11 Notify" "Not notified,Notified" eventfld.long 0x00 10. " PMN_10 ,PM Port 10 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 9. " PMN_9 ,PM Port 9 Notify" "Not notified,Notified" eventfld.long 0x00 8. " PMN_8 ,PM Port 8 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 7. " PMN_7 ,PM Port 7 Notify" "Not notified,Notified" eventfld.long 0x00 6. " PMN_6 ,PM Port 6 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 5. " PMN_5 ,PM Port 5 Notify" "Not notified,Notified" eventfld.long 0x00 4. " PMN_4 ,PM Port 4 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 3. " PMN_3 ,PM Port 3 Notify" "Not notified,Notified" eventfld.long 0x00 2. " PMN_2 ,PM Port 2 Notify" "Not notified,Notified" textline " " eventfld.long 0x00 1. " PMN_1 ,PM Port 1 Notify" "Not notified,Notified" eventfld.long 0x00 0. " PMN_0 ,PM Port 0 Notify" "Not notified,Notified" if ((per.l((ad:0x02200000+0x118))&0x00000001)==0x00000001) rgroup.long 0x170++0x03 line.long 0x00 "P0DMACR,Port 0 DMA Control Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 12.--15. " RXABL ,Receive AHB Burst Limit" "256 DWORDs,1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs" bitfld.long 0x00 8.--11. " TXABL ,Transmit AHB Burst Limit" "256 DWORDs,1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs" textline " " endif bitfld.long 0x00 4.--7. " RXTS ,Receive Transaction Size" "1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,512 DWORDs,1024 DWORDs,?..." bitfld.long 0x00 0.--3. " TXTS ,Transmit Transaction Size" "1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,512 DWORDs,1024 DWORDs,?..." else group.long 0x170++0x03 line.long 0x00 "P0DMACR,Port 0 DMA Control Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 12.--15. " RXABL ,Receive AHB Burst Limit" "256 DWORDs,1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs" bitfld.long 0x00 8.--11. " TXABL ,Transmit AHB Burst Limit" "256 DWORDs,1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs,256 DWORDs" textline " " endif bitfld.long 0x00 4.--7. " RXTS ,Receive Transaction Size" "1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,512 DWORDs,1024 DWORDs,?..." bitfld.long 0x00 0.--3. " TXTS ,Transmit Transaction Size" "1 DWORD,2 DWORDs,4 DWORDs,8 DWORDs,16 DWORDs,32 DWORDs,64 DWORDs,128 DWORDs,512 DWORDs,1024 DWORDs,?..." endif group.long 0x178++0x03 line.long 0x00 "P0PHYCR,Port 0 PHY Control Register" sif (cpuis("IMX6*")) bitfld.long 0x00 20. " TEST_PDDQ ,Test IDDQ" "Disabled,Enabled" bitfld.long 0x00 19. " CR_READ ,CR Read" "No read,Read" textline " " bitfld.long 0x00 18. " CR_WRITE ,CR Write" "No write,Write" bitfld.long 0x00 17. " CR_CAP_DATA ,CR Capture Data" "No capture,Capture" textline " " bitfld.long 0x00 16. " CR_CAP_ADDR ,CR Capture Address" "No capture,Capture" hexmask.long.word 0x00 0.--15. 1. " CR_DATA_IN ,CR Address and Write Data Input Bus" endif rgroup.long 0x17C++0x03 line.long 0x00 "P0PHYSR,Port 0 Status Register" sif (cpuis("IMX6*")) bitfld.long 0x00 18. " CR_ACK ,CR Acknowledgement" "No,Yes" hexmask.long.word 0x00 0.--15. 1. " CR_DATA_OUT ,CR Data Output Bus" endif tree.end width 0x0B tree.end endif tree "SDMA (Smart Direct Memory Access)" base ad:0x020EC000 width 13. group.long 0x00++0x13 line.long 0x00 "MC0PTR,AP Channel 0 Pointer Register" line.long 0x04 "INTR,Channel Interrupts Register" eventfld.long 0x04 31. " HI[31] ,AP HI[31] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 30. " HI[30] ,AP HI[30] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 29. " HI[29] ,AP HI[29] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 28. " HI[28] ,AP HI[28] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 27. " HI[27] ,AP HI[27] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 26. " HI[26] ,AP HI[26] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 25. " HI[25] ,AP HI[25] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 24. " HI[24] ,AP HI[24] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 23. " HI[23] ,AP HI[23] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 22. " HI[22] ,AP HI[22] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 21. " HI[21] ,AP HI[21] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 20. " HI[20] ,AP HI[20] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 19. " HI[19] ,AP HI[19] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 18. " HI[18] ,AP HI[18] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 17. " HI[17] ,AP HI[17] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 16. " HI[16] ,AP HI[16] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 15. " HI[15] ,AP HI[15] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 14. " HI[14] ,AP HI[14] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 13. " HI[13] ,AP HI[13] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 12. " HI[12] ,AP HI[12] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 11. " HI[11] ,AP HI[11] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 10. " HI[10] ,AP HI[10] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 9. " HI[9] ,AP HI[9] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 8. " HI[8] ,AP HI[8] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 7. " HI[7] ,AP HI[7] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 6. " HI[6] ,AP HI[6] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 5. " HI[5] ,AP HI[5] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 4. " HI[4] ,AP HI[4] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 3. " HI[3] ,AP HI[3] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 2. " HI[2] ,AP HI[2] Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x04 1. " HI[1] ,AP HI[1] Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 0. " HI[0] ,AP HI[0] Interrupt" "No interrupt,Interrupt" line.long 0x08 "STOP_STAT,Channel Stop/Channel Status Register" eventfld.long 0x08 31. " HE[31] ,HE[31] Stop/Status" "No access,Access" eventfld.long 0x08 30. " HE[30] ,HE[30] Stop/Status" "No access,Access" eventfld.long 0x08 29. " HE[29] ,HE[29] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 28. " HE[28] ,HE[28] Stop/Status" "No access,Access" eventfld.long 0x08 27. " HE[27] ,HE[27] Stop/Status" "No access,Access" eventfld.long 0x08 26. " HE[26] ,HE[26] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 25. " HE[25] ,HE[25] Stop/Status" "No access,Access" eventfld.long 0x08 24. " HE[24] ,HE[24] Stop/Status" "No access,Access" eventfld.long 0x08 23. " HE[23] ,HE[23] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 22. " HE[22] ,HE[22] Stop/Status" "No access,Access" eventfld.long 0x08 21. " HE[21] ,HE[21] Stop/Status" "No access,Access" eventfld.long 0x08 20. " HE[20] ,HE[20] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 19. " HE[19] ,HE[19] Stop/Status" "No access,Access" eventfld.long 0x08 18. " HE[18] ,HE[18] Stop/Status" "No access,Access" eventfld.long 0x08 17. " HE[17] ,HE[17] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 16. " HE[16] ,HE[16] Stop/Status" "No access,Access" eventfld.long 0x08 15. " HE[15] ,HE[15] Stop/Status" "No access,Access" eventfld.long 0x08 14. " HE[14] ,HE[14] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 13. " HE[13] ,HE[13] Stop/Status" "No access,Access" eventfld.long 0x08 12. " HE[12] ,HE[12] Stop/Status" "No access,Access" eventfld.long 0x08 11. " HE[11] ,HE[11] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 10. " HE[10] ,HE[10] Stop/Status" "No access,Access" eventfld.long 0x08 9. " HE[9] ,HE[9] Stop/Status" "No access,Access" eventfld.long 0x08 8. " HE[8] ,HE[8] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 7. " HE[7] ,HE[7] Stop/Status" "No access,Access" eventfld.long 0x08 6. " HE[6] ,HE[6] Stop/Status" "No access,Access" eventfld.long 0x08 5. " HE[5] ,HE[5] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 4. " HE[4] ,HE[4] Stop/Status" "No access,Access" eventfld.long 0x08 3. " HE[3] ,HE[3] Stop/Status" "No access,Access" eventfld.long 0x08 2. " HE[2] ,HE[2] Stop/Status" "No access,Access" textline " " eventfld.long 0x08 1. " HE[1] ,HE[1] Stop/Status" "No access,Access" eventfld.long 0x08 0. " HE[0] ,HE[0] Stop/Status" "No access,Access" line.long 0x0C "HSTART,Channel Start Register" eventfld.long 0x0C 31. " HSTART[31] ,Channel 31 Enable" "Disabled,Enabled" eventfld.long 0x0C 30. " HSTART[30] ,Channel 30 Enable" "Disabled,Enabled" eventfld.long 0x0C 29. " HSTART[29] ,Channel 29 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 28. " HSTART[28] ,Channel 28 Enable" "Disabled,Enabled" eventfld.long 0x0C 27. " HSTART[27] ,Channel 27 Enable" "Disabled,Enabled" eventfld.long 0x0C 26. " HSTART[26] ,Channel 26 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 25. " HSTART[25] ,Channel 25 Enable" "Disabled,Enabled" eventfld.long 0x0C 24. " HSTART[24] ,Channel 24 Enable" "Disabled,Enabled" eventfld.long 0x0C 23. " HSTART[23] ,Channel 23 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 22. " HSTART[22] ,Channel 22 Enable" "Disabled,Enabled" eventfld.long 0x0C 21. " HSTART[21] ,Channel 21 Enable" "Disabled,Enabled" eventfld.long 0x0C 20. " HSTART[20] ,Channel 20 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 19. " HSTART[19] ,Channel 19 Enable" "Disabled,Enabled" eventfld.long 0x0C 18. " HSTART[18] ,Channel 18 Enable" "Disabled,Enabled" eventfld.long 0x0C 17. " HSTART[17] ,Channel 17 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 16. " HSTART[16] ,Channel 16 Enable" "Disabled,Enabled" eventfld.long 0x0C 15. " HSTART[15] ,Channel 15 Enable" "Disabled,Enabled" eventfld.long 0x0C 14. " HSTART[14] ,Channel 14 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 13. " HSTART[13] ,Channel 13 Enable" "Disabled,Enabled" eventfld.long 0x0C 12. " HSTART[12] ,Channel 12 Enable" "Disabled,Enabled" eventfld.long 0x0C 11. " HSTART[11] ,Channel 11 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 10. " HSTART[10] ,Channel 10 Enable" "Disabled,Enabled" eventfld.long 0x0C 9. " HSTART[9] ,Channel 9 Enable" "Disabled,Enabled" eventfld.long 0x0C 8. " HSTART[8] ,Channel 8 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 7. " HSTART[7] ,Channel 7 Enable" "Disabled,Enabled" eventfld.long 0x0C 6. " HSTART[6] ,Channel 6 Enable" "Disabled,Enabled" eventfld.long 0x0C 5. " HSTART[5] ,Channel 5 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 4. " HSTART[4] ,Channel 4 Enable" "Disabled,Enabled" eventfld.long 0x0C 3. " HSTART[3] ,Channel 3 Enable" "Disabled,Enabled" eventfld.long 0x0C 2. " HSTART[2] ,Channel 2 Enable" "Disabled,Enabled" textline " " eventfld.long 0x0C 1. " HSTART[1] ,Channel 1 Enable" "Disabled,Enabled" eventfld.long 0x0C 0. " HSTART[0] ,Channel 0 Enable" "Disabled,Enabled" line.long 0x10 "EVTOVR,Channel Event Override Register" bitfld.long 0x10 31. " EO[31] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 30. " EO[30] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 29. " EO[29] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 28. " EO[28] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 27. " EO[27] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 26. " EO[26] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 25. " EO[25] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 24. " EO[24] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 23. " EO[23] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 22. " EO[22] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 21. " EO[21] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 20. " EO[20] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 19. " EO[19] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 18. " EO[18] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 17. " EO[17] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 16. " EO[16] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 15. " EO[15] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 14. " EO[14] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 13. " EO[13] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 12. " EO[12] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 11. " EO[11] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 10. " EO[10] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 9. " EO[9] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 8. " EO[8] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 7. " EO[7] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 6. " EO[6] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 5. " EO[5] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 4. " EO[4] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 3. " EO[3] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 2. " EO[2] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x10 1. " EO[1] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x10 0. " EO[0] ,DMA Request Ignored by SDMA" "Not ignored,Ignored" hgroup.long 0x14++0x03 hide.long 0x00 "DSPOVR,Channel BP Override Register" group.long 0x18++0x3 line.long 0x00 "HOSTOVR,Channel AP Override Register" bitfld.long 0x00 31. " HO[31] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 30. " HO[30] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 29. " HO[29] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 28. " HO[28] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 27. " HO[27] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 26. " HO[26] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 25. " HO[25] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 24. " HO[24] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 23. " HO[23] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 22. " HO[22] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 21. " HO[21] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 20. " HO[20] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 19. " HO[19] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 18. " HO[18] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 17. " HO[17] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 16. " HO[16] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 15. " HO[15] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 14. " HO[14] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 13. " HO[13] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 12. " HO[12] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 11. " HO[11] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 10. " HO[10] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 9. " HO[9] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 8. " HO[8] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 7. " HO[7] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 6. " HO[6] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 5. " HO[5] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 4. " HO[4] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 3. " HO[3] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 2. " HO[2] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" textline " " bitfld.long 0x00 1. " HO[1] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" bitfld.long 0x00 0. " HO[0] ,AP Enable Ignored by SDMA" "Not ignored,Ignored" sif (cpuis("IMX6*")) group.long 0x1C++0x03 line.long 0x00 "EVTPEND,Channel Event Pending Register" eventfld.long 0x00 31. " EP[31] ,Channel 31 Event Pending" "Not pending,Pending" eventfld.long 0x00 30. " EP[30] ,Channel 30 Event Pending" "Not pending,Pending" eventfld.long 0x00 29. " EP[29] ,Channel 29 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 28. " EP[28] ,Channel 28 Event Pending" "Not pending,Pending" eventfld.long 0x00 27. " EP[27] ,Channel 27 Event Pending" "Not pending,Pending" eventfld.long 0x00 26. " EP[26] ,Channel 26 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 25. " EP[25] ,Channel 25 Event Pending" "Not pending,Pending" eventfld.long 0x00 24. " EP[24] ,Channel 24 Event Pending" "Not pending,Pending" eventfld.long 0x00 23. " EP[23] ,Channel 23 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 22. " EP[22] ,Channel 22 Event Pending" "Not pending,Pending" eventfld.long 0x00 21. " EP[21] ,Channel 21 Event Pending" "Not pending,Pending" eventfld.long 0x00 20. " EP[20] ,Channel 20 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 19. " EP[19] ,Channel 19 Event Pending" "Not pending,Pending" eventfld.long 0x00 18. " EP[18] ,Channel 18 Event Pending" "Not pending,Pending" eventfld.long 0x00 17. " EP[17] ,Channel 17 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 16. " EP[16] ,Channel 16 Event Pending" "Not pending,Pending" eventfld.long 0x00 15. " EP[15] ,Channel 15 Event Pending" "Not pending,Pending" eventfld.long 0x00 14. " EP[14] ,Channel 14 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 13. " EP[13] ,Channel 13 Event Pending" "Not pending,Pending" eventfld.long 0x00 12. " EP[12] ,Channel 12 Event Pending" "Not pending,Pending" eventfld.long 0x00 11. " EP[11] ,Channel 11 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 10. " EP[10] ,Channel 10 Event Pending" "Not pending,Pending" eventfld.long 0x00 9. " EP[9] ,Channel 9 Event Pending" "Not pending,Pending" eventfld.long 0x00 8. " EP[8] ,Channel 8 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 7. " EP[7] ,Channel 7 Event Pending" "Not pending,Pending" eventfld.long 0x00 6. " EP[6] ,Channel 6 Event Pending" "Not pending,Pending" eventfld.long 0x00 5. " EP[5] ,Channel 5 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 4. " EP[4] ,Channel 4 Event Pending" "Not pending,Pending" eventfld.long 0x00 3. " EP[3] ,Channel 3 Event Pending" "Not pending,Pending" eventfld.long 0x00 2. " EP[2] ,Channel 2 Event Pending" "Not pending,Pending" textline " " eventfld.long 0x00 1. " EP[1] ,Channel 1 Event Pending" "Not pending,Pending" eventfld.long 0x00 0. " EP[0] ,Channel 0 Event Pending" "Not pending,Pending" else rgroup.long 0x1C++0x3 line.long 0x00 "EVTPEND,Channel Event Pending Register" bitfld.long 0x00 31. " EP[31] ,Channel 31 Event Pending" "Not pending,Pending" bitfld.long 0x00 30. " EP[30] ,Channel 30 Event Pending" "Not pending,Pending" bitfld.long 0x00 29. " EP[29] ,Channel 29 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 28. " EP[28] ,Channel 28 Event Pending" "Not pending,Pending" bitfld.long 0x00 27. " EP[27] ,Channel 27 Event Pending" "Not pending,Pending" bitfld.long 0x00 26. " EP[26] ,Channel 26 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 25. " EP[25] ,Channel 25 Event Pending" "Not pending,Pending" bitfld.long 0x00 24. " EP[24] ,Channel 24 Event Pending" "Not pending,Pending" bitfld.long 0x00 23. " EP[23] ,Channel 23 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 22. " EP[22] ,Channel 22 Event Pending" "Not pending,Pending" bitfld.long 0x00 21. " EP[21] ,Channel 21 Event Pending" "Not pending,Pending" bitfld.long 0x00 20. " EP[20] ,Channel 20 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 19. " EP[19] ,Channel 19 Event Pending" "Not pending,Pending" bitfld.long 0x00 18. " EP[18] ,Channel 18 Event Pending" "Not pending,Pending" bitfld.long 0x00 17. " EP[17] ,Channel 17 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 16. " EP[16] ,Channel 16 Event Pending" "Not pending,Pending" bitfld.long 0x00 15. " EP[15] ,Channel 15 Event Pending" "Not pending,Pending" bitfld.long 0x00 14. " EP[14] ,Channel 14 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 13. " EP[13] ,Channel 13 Event Pending" "Not pending,Pending" bitfld.long 0x00 12. " EP[12] ,Channel 12 Event Pending" "Not pending,Pending" bitfld.long 0x00 11. " EP[11] ,Channel 11 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 10. " EP[10] ,Channel 10 Event Pending" "Not pending,Pending" bitfld.long 0x00 9. " EP[9] ,Channel 9 Event Pending" "Not pending,Pending" bitfld.long 0x00 8. " EP[8] ,Channel 8 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 7. " EP[7] ,Channel 7 Event Pending" "Not pending,Pending" bitfld.long 0x00 6. " EP[6] ,Channel 6 Event Pending" "Not pending,Pending" bitfld.long 0x00 5. " EP[5] ,Channel 5 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 4. " EP[4] ,Channel 4 Event Pending" "Not pending,Pending" bitfld.long 0x00 3. " EP[3] ,Channel 3 Event Pending" "Not pending,Pending" bitfld.long 0x00 2. " EP[2] ,Channel 2 Event Pending" "Not pending,Pending" textline " " bitfld.long 0x00 1. " EP[1] ,Channel 1 Event Pending" "Not pending,Pending" bitfld.long 0x00 0. " EP[0] ,Channel 0 Event Pending" "Not pending,Pending" endif rgroup.long 0x24++0x3 line.long 0x00 "RESET,Reset Register" bitfld.long 0x00 1. " RESCHED ,SDMA Reschedule as If a Script had Executed a Done Instruction" "Off,On" bitfld.long 0x00 0. " RESET ,Software Reset" "No effect,Reset" sif (cpuis("IMX6*")) hgroup.long 0x28++0x03 hide.long 0x00 "EVTERR,DMA Request Error Register" in else rgroup.long 0x28++0x3 line.long 0x00 "EVTERR,DMA Request Error Register" bitfld.long 0x00 31. " CHNERR[31] ,Channel 31 Error" "No error,Error" bitfld.long 0x00 30. " CHNERR[30] ,Channel 30 Error" "No error,Error" bitfld.long 0x00 29. " CHNERR[29] ,Channel 29 Error" "No error,Error" textline " " bitfld.long 0x00 28. " CHNERR[28] ,Channel 28 Error" "No error,Error" bitfld.long 0x00 27. " CHNERR[27] ,Channel 27 Error" "No error,Error" bitfld.long 0x00 26. " CHNERR[26] ,Channel 26 Error" "No error,Error" textline " " bitfld.long 0x00 25. " CHNERR[25] ,Channel 25 Error" "No error,Error" bitfld.long 0x00 24. " CHNERR[24] ,Channel 24 Error" "No error,Error" bitfld.long 0x00 23. " CHNERR[23] ,Channel 23 Error" "No error,Error" textline " " bitfld.long 0x00 22. " CHNERR[22] ,Channel 22 Error" "No error,Error" bitfld.long 0x00 21. " CHNERR[21] ,Channel 21 Error" "No error,Error" bitfld.long 0x00 20. " CHNERR[20] ,Channel 20 Error" "No error,Error" textline " " bitfld.long 0x00 19. " CHNERR[19] ,Channel 19 Error" "No error,Error" bitfld.long 0x00 18. " CHNERR[18] ,Channel 18 Error" "No error,Error" bitfld.long 0x00 17. " CHNERR[17] ,Channel 17 Error" "No error,Error" textline " " bitfld.long 0x00 16. " CHNERR[16] ,Channel 16 Error" "No error,Error" bitfld.long 0x00 15. " CHNERR[15] ,Channel 15 Error" "No error,Error" bitfld.long 0x00 14. " CHNERR[14] ,Channel 14 Error" "No error,Error" textline " " bitfld.long 0x00 13. " CHNERR[13] ,Channel 13 Error" "No error,Error" bitfld.long 0x00 12. " CHNERR[12] ,Channel 12 Error" "No error,Error" bitfld.long 0x00 11. " CHNERR[11] ,Channel 11 Error" "No error,Error" textline " " bitfld.long 0x00 10. " CHNERR[10] ,Channel 10 Error" "No error,Error" bitfld.long 0x00 9. " CHNERR[9] ,Channel 9 Error" "No error,Error" bitfld.long 0x00 8. " CHNERR[8] ,Channel 8 Error" "No error,Error" textline " " bitfld.long 0x00 7. " CHNERR[7] ,Channel 7 Error" "No error,Error" bitfld.long 0x00 6. " CHNERR[6] ,Channel 6 Error" "No error,Error" bitfld.long 0x00 5. " CHNERR[5] ,Channel 5 Error" "No error,Error" textline " " bitfld.long 0x00 4. " CHNERR[4] ,Channel 4 Error" "No error,Error" bitfld.long 0x00 3. " CHNERR[3] ,Channel 3 Error" "No error,Error" bitfld.long 0x00 2. " CHNERR[2] ,Channel 2 Error" "No error,Error" textline " " bitfld.long 0x00 1. " CHNERR[1] ,Channel 1 Error" "No error,Error" bitfld.long 0x00 0. " CHNERR[0] ,Channel 0 Error" "No error,Error" endif group.long 0x2C++0x03 line.long 0x00 "INTRMASK,Channel AP Interrupt Mask Flags Register" bitfld.long 0x00 31. " HIMASK[31] ,Channel 31 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 30. " HIMASK[30] ,Channel 30 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 29. " HIMASK[29] ,Channel 29 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 28. " HIMASK[28] ,Channel 28 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 27. " HIMASK[27] ,Channel 27 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 26. " HIMASK[26] ,Channel 26 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 25. " HIMASK[25] ,Channel 25 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 24. " HIMASK[24] ,Channel 24 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 23. " HIMASK[23] ,Channel 23 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 22. " HIMASK[22] ,Channel 22 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 21. " HIMASK[21] ,Channel 21 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 20. " HIMASK[20] ,Channel 20 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 19. " HIMASK[19] ,Channel 19 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 18. " HIMASK[18] ,Channel 18 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 17. " HIMASK[17] ,Channel 17 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 16. " HIMASK[16] ,Channel 16 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 15. " HIMASK[15] ,Channel 15 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 14. " HIMASK[14] ,Channel 14 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 13. " HIMASK[13] ,Channel 13 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 12. " HIMASK[12] ,Channel 12 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 11. " HIMASK[11] ,Channel 11 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 10. " HIMASK[10] ,Channel 10 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 9. " HIMASK[9] ,Channel 9 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 8. " HIMASK[8] ,Channel 8 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 7. " HIMASK[7] ,Channel 7 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 6. " HIMASK[6] ,Channel 6 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 5. " HIMASK[5] ,Channel 5 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 4. " HIMASK[4] ,Channel 4 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 3. " HIMASK[3] ,Channel 3 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 2. " HIMASK[2] ,Channel 2 Interrupt Mask" "Masked,Not masked" textline " " bitfld.long 0x00 1. " HIMASK[1] ,Channel 1 Interrupt Mask" "Masked,Not masked" bitfld.long 0x00 0. " HIMASK[0] ,Channel 0 Interrupt Mask" "Masked,Not masked" textline "" rgroup.long 0x30++0x7 sif (cpuis("IMX6*")) line.long 0x00 "PSW,Schedule Status Register" bitfld.long 0x00 13.--15. " NCP[2:0] ,Next Channel Priority" "No running channel,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " NCR[4:0] ,Next Channel Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 4.--7. " CCP[2:0] ,Current Channel Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CCR[4:0] ,Current Channel Register" "No running channel,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else line.long 0x00 "PSW,Schedule Status Register" bitfld.long 0x00 13.--15. " NCP[2:0] ,Next Channel Priority" "No running channel,1,2,3,4,5,6,7" bitfld.long 0x00 8.--12. " NCR[4:0] ,Next Channel Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5.--7. " CCP[2:0] ,Current Channel Priority" "No running channel,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " CCR[4:0] ,Current Channel Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "EVTERRDBG,DMA Request Error Register for Debug" bitfld.long 0x04 31. " CHNERR[31] ,Channel 31 Error" "No error,Error" bitfld.long 0x04 30. " CHNERR[30] ,Channel 30 Error" "No error,Error" bitfld.long 0x04 29. " CHNERR[29] ,Channel 29 Error" "No error,Error" textline " " bitfld.long 0x04 28. " CHNERR[28] ,Channel 28 Error" "No error,Error" bitfld.long 0x04 27. " CHNERR[27] ,Channel 27 Error" "No error,Error" bitfld.long 0x04 26. " CHNERR[26] ,Channel 26 Error" "No error,Error" textline " " bitfld.long 0x04 25. " CHNERR[25] ,Channel 25 Error" "No error,Error" bitfld.long 0x04 24. " CHNERR[24] ,Channel 24 Error" "No error,Error" bitfld.long 0x04 23. " CHNERR[23] ,Channel 23 Error" "No error,Error" textline " " bitfld.long 0x04 22. " CHNERR[22] ,Channel 22 Error" "No error,Error" bitfld.long 0x04 21. " CHNERR[21] ,Channel 21 Error" "No error,Error" bitfld.long 0x04 20. " CHNERR[20] ,Channel 20 Error" "No error,Error" textline " " bitfld.long 0x04 19. " CHNERR[19] ,Channel 19 Error" "No error,Error" bitfld.long 0x04 18. " CHNERR[18] ,Channel 18 Error" "No error,Error" bitfld.long 0x04 17. " CHNERR[17] ,Channel 17 Error" "No error,Error" textline " " bitfld.long 0x04 16. " CHNERR[16] ,Channel 16 Error" "No error,Error" bitfld.long 0x04 15. " CHNERR[15] ,Channel 15 Error" "No error,Error" bitfld.long 0x04 14. " CHNERR[14] ,Channel 14 Error" "No error,Error" textline " " bitfld.long 0x04 13. " CHNERR[13] ,Channel 13 Error" "No error,Error" bitfld.long 0x04 12. " CHNERR[12] ,Channel 12 Error" "No error,Error" bitfld.long 0x04 11. " CHNERR[11] ,Channel 11 Error" "No error,Error" textline " " bitfld.long 0x04 10. " CHNERR[10] ,Channel 10 Error" "No error,Error" bitfld.long 0x04 9. " CHNERR[9] ,Channel 9 Error" "No error,Error" bitfld.long 0x04 8. " CHNERR[8] ,Channel 8 Error" "No error,Error" textline " " bitfld.long 0x04 7. " CHNERR[7] ,Channel 7 Error" "No error,Error" bitfld.long 0x04 6. " CHNERR[6] ,Channel 6 Error" "No error,Error" bitfld.long 0x04 5. " CHNERR[5] ,Channel 5 Error" "No error,Error" textline " " bitfld.long 0x04 4. " CHNERR[4] ,Channel 4 Error" "No error,Error" bitfld.long 0x04 3. " CHNERR[3] ,Channel 3 Error" "No error,Error" bitfld.long 0x04 2. " CHNERR[2] ,Channel 2 Error" "No error,Error" textline " " bitfld.long 0x04 1. " CHNERR[1] ,Channel 1 Error" "No error,Error" bitfld.long 0x04 0. " CHNERR[0] ,Channel 0 Error" "No error,Error" textline "" group.long 0x38++0x13 line.long 0x00 "CONFIG,Configuration Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 12. " DSPCTRL ,SDMA control mode" "Dual core,Single core" textline " " endif bitfld.long 0x00 11. " RTDOBS ,Real-Time Debug Pins are Used" "Not used,Used" textline " " bitfld.long 0x00 4. " ACR ,AHB/SDMA Core Clock Ratio" "2x core freq,Core freq" bitfld.long 0x00 0.--1. " CSM ,Selects the Context Switch Mode" "Static,Dynamic low power,Dynamic with no loop,Dynamic" line.long 0x04 "SDMA_LOCK,SDMA Lock Register" bitfld.long 0x04 1. " SRESET_LOCK_CLR ,LOCK bit is cleared on a software reset" "Not cleared,Cleared" bitfld.long 0x04 0. " LOCK ,Access to update SDMA script memory" "Not locked,Locked" line.long 0x08 "ONCE_ENB,OnCE Enable Register" bitfld.long 0x08 0. " ENB ,OnCE Enable" "Disabled,Enabled" line.long 0x0c "ONCE_DATA,OnCE Data Register" line.long 0x10 "ONCE_INSTR,OnCE Instruction Register" hexmask.long.word 0x10 0.--15. 1. " INSTR ,Instruction Register of the OnCE JTAG Controller" rgroup.long 0x4c++0x03 line.long 0x00 "ONCE_STAT,OnCE Status Register" bitfld.long 0x00 12.--15. " PST[3:0] ,Processor Status" "Program,Data,Change of flow,Change of flow in loop,Debug,Functional unit,Sleep,Save,Program in sleep,Data in sleep,Change of flow in sleep,Change flow in loop in sleep,Debug in sleep,Functional unit in sleep,Sleep after reset,Restore" textline " " bitfld.long 0x00 11. " RCV ,RCV Flag" "Cleared,Set" bitfld.long 0x00 10. " EDR ,SDMA has Entered Debug Mode After an External Debug Request" "Normal,Debug" textline " " bitfld.long 0x00 9. " ODR ,SDMA has Entered Debug Mode After a OnCE Debug Request" "Normal,Debug" bitfld.long 0x00 8. " SWB ,SDMA has Entered Debug Mode After a Software Breakpoint" "Normal,Debug" textline " " bitfld.long 0x00 7. " MST ,OnCE is Controlled from the AP Peripheral Interface" "JTAG,AP" bitfld.long 0x00 2. " ECDR[2] ,Event Cell Debug Request from data_cond" "Not requested,Requested" textline " " bitfld.long 0x00 1. " ECDR[1] ,Event Cell Debug Request from addrb_cond" "Not requested,Requested" bitfld.long 0x00 0. " ECDR[0] ,Event Cell Debug Request from addra_cond" "Not requested,Requested" group.long 0x50++0x03 line.long 0x00 "ONCE_CMD,OnCE Command Register" bitfld.long 0x00 0.--3. " CMD ,Command" "Rstatus,Dmov,Exec_once,Run_core,Exec_core,Debug_rqst,Rbuffer,?..." group.long 0x58++0x7 line.long 0x00 "ILLINSTADDR,Illegal Instruction Trap Address Register" hexmask.long.word 0x00 0.--13. 1. " ILLINSTADDR ,Illegal Instruction Trap Address" line.long 0x04 "CHN0ADDR,Channel 0 Boot Address Register" bitfld.long 0x04 14. " SMSZ ,Scratch Memory Size" "24,32" hexmask.long.word 0x04 0.--13. 1. " CHN0ADDR ,Channel 0 Boot Address" rgroup.long 0x60++0x07 line.long 0x00 "EVT_MIRROR,DMA Requests Register" bitfld.long 0x00 31. " EVENTS[31] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 30. " EVENTS[30] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 29. " EVENTS[29] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 28. " EVENTS[28] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 27. " EVENTS[27] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 26. " EVENTS[26] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 25. " EVENTS[25] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 24. " EVENTS[24] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 23. " EVENTS[23] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 22. " EVENTS[22] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 21. " EVENTS[21] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 20. " EVENTS[20] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 19. " EVENTS[19] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 18. " EVENTS[18] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 17. " EVENTS[17] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 16. " EVENTS[16] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 15. " EVENTS[15] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 14. " EVENTS[14] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 13. " EVENTS[13] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 12. " EVENTS[12] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 11. " EVENTS[11] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 10. " EVENTS[10] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 9. " EVENTS[9] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 8. " EVENTS[8] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 7. " EVENTS[7] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 6. " EVENTS[6] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EVENTS[5] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 4. " EVENTS[4] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EVENTS[3] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 2. " EVENTS[2] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EVENTS[1] ,DMA Request" "Not requested,Requested" bitfld.long 0x00 0. " EVENTS[0] ,DMA Request" "Not requested,Requested" line.long 0x04 "EVT_MIRROR2,DMA Requests 2 Register" bitfld.long 0x04 15. " EVENTS[47] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 14. " EVENTS[46] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 13. " EVENTS[45] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 12. " EVENTS[44] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 11. " EVENTS[43] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 10. " EVENTS[42] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 9. " EVENTS[41] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 8. " EVENTS[40] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 7. " EVENTS[39] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 6. " EVENTS[38] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 5. " EVENTS[37] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 4. " EVENTS[36] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 3. " EVENTS[35] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 2. " EVENTS[34] ,DMA Request" "Not requested,Requested" textline " " bitfld.long 0x04 1. " EVENTS[33] ,DMA Request" "Not requested,Requested" bitfld.long 0x04 0. " EVENTS[32] ,DMA Request" "Not requested,Requested" textline "" group.long 0x70++0x7 line.long 0x00 "XTRIG_CONF1,Cross-Trigger Events Configuration Register 1" bitfld.long 0x00 30. " CNF3 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x00 24.--29. " NUM3[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 22. " CNF2 ,Configuration of the SDMA" "Channel,DMA request" textline " " bitfld.long 0x00 16.--21. " NUM2[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 14. " CNF1 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x00 8.--13. " NUM1[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 6. " CNF0 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x00 0.--5. " NUM0[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "XTRIG_CONF2,Cross-Trigger Events Configuration Register 2" bitfld.long 0x04 30. " CNF7 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x04 24.--29. " NUM7[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 22. " CNF6 ,Configuration of the SDMA" "Channel,DMA request" textline " " bitfld.long 0x04 16.--21. " NUM6[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 14. " CNF5 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x04 8.--13. " NUM5[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 6. " CNF4 ,Configuration of the SDMA" "Channel,DMA request" bitfld.long 0x04 0.--5. " NUM4[5:0] ,Number of the DMA Request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538"&&(!cpuis("IMX6*"))) group.long 0x7c++0x23 line.long 0x0 "PRF_CNT_1,Profile Counter 1 Register" hexmask.long.word 0x0 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0x0 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0x0 0.--21. 1. " COUNTER ,Counter field" line.long 0x4 "PRF_CNT_2,Profile Counter 2 Register" hexmask.long.word 0x4 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0x4 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0x4 0.--21. 1. " COUNTER ,Counter field" line.long 0x8 "PRF_CNT_3,Profile Counter 3 Register" hexmask.long.word 0x8 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0x8 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0x8 0.--21. 1. " COUNTER ,Counter field" line.long 0xC "PRF_CNT_4,Profile Counter 4 Register" hexmask.long.word 0xC 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0xC 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0xC 0.--21. 1. " COUNTER ,Counter field" line.long 0x10 "PRF_CNT_5,Profile Counter 5 Register" hexmask.long.word 0x10 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0x10 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0x10 0.--21. 1. " COUNTER ,Counter field" line.long 0x14 "PRF_CNT_6,Profile Counter 6 Register" hexmask.long.word 0x14 23.--31. 1. " COUNTER_CONFIG ,Counter configure field" bitfld.long 0x14 22. " OFL ,Overflow flag" "No overflow,Overflow" hexmask.long.tbyte 0x14 0.--21. 1. " COUNTER ,Counter field" group.long 0x94++0x3 line.long 0x00 "PRF_CFG,Profile Config/Status Register" eventfld.long 0x00 13. " ISR ,Profile counter overflow" "No overflow,Overflow" bitfld.long 0x00 12. " OFL6 ,Profile counter 6 overflow status" "No overflow,Overflow" textline " " bitfld.long 0x00 11. " OFL5 ,Profile counter 5 overflow status" "No overflow,Overflow" bitfld.long 0x00 10. " OFL4 ,Profile counter 4 overflow status" "No overflow,Overflow" textline " " bitfld.long 0x00 9. " OFL3 ,Profile counter 3 overflow status" "No overflow,Overflow" bitfld.long 0x00 8. " OFL2 ,Profile counter 2 overflow status" "No overflow,Overflow" textline " " bitfld.long 0x00 7. " OFL1 ,Profile counter 1 overflow status" "No overflow,Overflow" bitfld.long 0x00 6. " INT_EN_6 ,Interrupt enabled for profile counter 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INT_EN_5 ,Interrupt enabled for profile counter 5" "Disabled,Enabled" bitfld.long 0x00 4. " INT_EN_4 ,Interrupt enabled for profile counter 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " INT_EN_3 ,Interrupt enabled for profile counter 3" "Disabled,Enabled" bitfld.long 0x00 2. " INT_EN_2 ,Interrupt enabled for profile counter 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " INT_EN_1 ,Interrupt enabled for profile counter 1" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Bit enables the profile counters" "Disabled,Enabled" endif textline "" width 23. sif (cpuis("IMX6*")) group.long 0x100++0x7F line.long 0x0 "SDMAARM_SDMA_CHNPRI0 ,Channel Priority 0 Register" bitfld.long 0x0 0.--2. " CHNPRI0 ,Channel 0 priority" ",1,2,3,4,5,6,7" line.long 0x4 "SDMAARM_SDMA_CHNPRI1 ,Channel Priority 1 Register" bitfld.long 0x4 0.--2. " CHNPRI1 ,Channel 1 priority" ",1,2,3,4,5,6,7" line.long 0x8 "SDMAARM_SDMA_CHNPRI2 ,Channel Priority 2 Register" bitfld.long 0x8 0.--2. " CHNPRI2 ,Channel 2 priority" ",1,2,3,4,5,6,7" line.long 0xC "SDMAARM_SDMA_CHNPRI3 ,Channel Priority 3 Register" bitfld.long 0xC 0.--2. " CHNPRI3 ,Channel 3 priority" ",1,2,3,4,5,6,7" line.long 0x10 "SDMAARM_SDMA_CHNPRI4 ,Channel Priority 4 Register" bitfld.long 0x10 0.--2. " CHNPRI4 ,Channel 4 priority" ",1,2,3,4,5,6,7" line.long 0x14 "SDMAARM_SDMA_CHNPRI5 ,Channel Priority 5 Register" bitfld.long 0x14 0.--2. " CHNPRI5 ,Channel 5 priority" ",1,2,3,4,5,6,7" line.long 0x18 "SDMAARM_SDMA_CHNPRI6 ,Channel Priority 6 Register" bitfld.long 0x18 0.--2. " CHNPRI6 ,Channel 6 priority" ",1,2,3,4,5,6,7" line.long 0x1C "SDMAARM_SDMA_CHNPRI7 ,Channel Priority 7 Register" bitfld.long 0x1C 0.--2. " CHNPRI7 ,Channel 7 priority" ",1,2,3,4,5,6,7" line.long 0x20 "SDMAARM_SDMA_CHNPRI8 ,Channel Priority 8 Register" bitfld.long 0x20 0.--2. " CHNPRI8 ,Channel 8 priority" ",1,2,3,4,5,6,7" line.long 0x24 "SDMAARM_SDMA_CHNPRI9 ,Channel Priority 9 Register" bitfld.long 0x24 0.--2. " CHNPRI9 ,Channel 9 priority" ",1,2,3,4,5,6,7" line.long 0x28 "SDMAARM_SDMA_CHNPRI10,Channel Priority 10 Register" bitfld.long 0x28 0.--2. " CHNPRI10 ,Channel 10 priority" ",1,2,3,4,5,6,7" line.long 0x2C "SDMAARM_SDMA_CHNPRI11,Channel Priority 11 Register" bitfld.long 0x2C 0.--2. " CHNPRI11 ,Channel 11 priority" ",1,2,3,4,5,6,7" line.long 0x30 "SDMAARM_SDMA_CHNPRI12,Channel Priority 12 Register" bitfld.long 0x30 0.--2. " CHNPRI12 ,Channel 12 priority" ",1,2,3,4,5,6,7" line.long 0x34 "SDMAARM_SDMA_CHNPRI13,Channel Priority 13 Register" bitfld.long 0x34 0.--2. " CHNPRI13 ,Channel 13 priority" ",1,2,3,4,5,6,7" line.long 0x38 "SDMAARM_SDMA_CHNPRI14,Channel Priority 14 Register" bitfld.long 0x38 0.--2. " CHNPRI14 ,Channel 14 priority" ",1,2,3,4,5,6,7" line.long 0x3C "SDMAARM_SDMA_CHNPRI15,Channel Priority 15 Register" bitfld.long 0x3C 0.--2. " CHNPRI15 ,Channel 15 priority" ",1,2,3,4,5,6,7" line.long 0x40 "SDMAARM_SDMA_CHNPRI16,Channel Priority 16 Register" bitfld.long 0x40 0.--2. " CHNPRI16 ,Channel 16 priority" ",1,2,3,4,5,6,7" line.long 0x44 "SDMAARM_SDMA_CHNPRI17,Channel Priority 17 Register" bitfld.long 0x44 0.--2. " CHNPRI17 ,Channel 17 priority" ",1,2,3,4,5,6,7" line.long 0x48 "SDMAARM_SDMA_CHNPRI18,Channel Priority 18 Register" bitfld.long 0x48 0.--2. " CHNPRI18 ,Channel 18 priority" ",1,2,3,4,5,6,7" line.long 0x4C "SDMAARM_SDMA_CHNPRI19,Channel Priority 19 Register" bitfld.long 0x4C 0.--2. " CHNPRI19 ,Channel 19 priority" ",1,2,3,4,5,6,7" line.long 0x50 "SDMAARM_SDMA_CHNPRI20,Channel Priority 20 Register" bitfld.long 0x50 0.--2. " CHNPRI20 ,Channel 20 priority" ",1,2,3,4,5,6,7" line.long 0x54 "SDMAARM_SDMA_CHNPRI21,Channel Priority 21 Register" bitfld.long 0x54 0.--2. " CHNPRI21 ,Channel 21 priority" ",1,2,3,4,5,6,7" line.long 0x58 "SDMAARM_SDMA_CHNPRI22,Channel Priority 22 Register" bitfld.long 0x58 0.--2. " CHNPRI22 ,Channel 22 priority" ",1,2,3,4,5,6,7" line.long 0x5C "SDMAARM_SDMA_CHNPRI23,Channel Priority 23 Register" bitfld.long 0x5C 0.--2. " CHNPRI23 ,Channel 23 priority" ",1,2,3,4,5,6,7" line.long 0x60 "SDMAARM_SDMA_CHNPRI24,Channel Priority 24 Register" bitfld.long 0x60 0.--2. " CHNPRI24 ,Channel 24 priority" ",1,2,3,4,5,6,7" line.long 0x64 "SDMAARM_SDMA_CHNPRI25,Channel Priority 25 Register" bitfld.long 0x64 0.--2. " CHNPRI25 ,Channel 25 priority" ",1,2,3,4,5,6,7" line.long 0x68 "SDMAARM_SDMA_CHNPRI26,Channel Priority 26 Register" bitfld.long 0x68 0.--2. " CHNPRI26 ,Channel 26 priority" ",1,2,3,4,5,6,7" line.long 0x6C "SDMAARM_SDMA_CHNPRI27,Channel Priority 27 Register" bitfld.long 0x6C 0.--2. " CHNPRI27 ,Channel 27 priority" ",1,2,3,4,5,6,7" line.long 0x70 "SDMAARM_SDMA_CHNPRI28,Channel Priority 28 Register" bitfld.long 0x70 0.--2. " CHNPRI28 ,Channel 28 priority" ",1,2,3,4,5,6,7" line.long 0x74 "SDMAARM_SDMA_CHNPRI29,Channel Priority 29 Register" bitfld.long 0x74 0.--2. " CHNPRI29 ,Channel 29 priority" ",1,2,3,4,5,6,7" line.long 0x78 "SDMAARM_SDMA_CHNPRI30,Channel Priority 30 Register" bitfld.long 0x78 0.--2. " CHNPRI30 ,Channel 30 priority" ",1,2,3,4,5,6,7" line.long 0x7C "SDMAARM_SDMA_CHNPRI31,Channel Priority 31 Register" bitfld.long 0x7C 0.--2. " CHNPRI31 ,Channel 31 priority" ",1,2,3,4,5,6,7" endif width 11. tree "Channel Enable RAM Registers" group.long 0x200++0xbf line.long 0x0 "CHNENBL0 ,Channel 0 Enable RAM" bitfld.long 0x0 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 0 " "Disabled,Enabled" textline " " bitfld.long 0x0 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 0 " "Disabled,Enabled" bitfld.long 0x0 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 0 " "Disabled,Enabled" line.long 0x4 "CHNENBL1 ,Channel 1 Enable RAM" bitfld.long 0x4 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 1 " "Disabled,Enabled" textline " " bitfld.long 0x4 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 1 " "Disabled,Enabled" bitfld.long 0x4 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 1 " "Disabled,Enabled" line.long 0x8 "CHNENBL2 ,Channel 2 Enable RAM" bitfld.long 0x8 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 2 " "Disabled,Enabled" textline " " bitfld.long 0x8 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 2 " "Disabled,Enabled" bitfld.long 0x8 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 2 " "Disabled,Enabled" line.long 0xC "CHNENBL3 ,Channel 3 Enable RAM" bitfld.long 0xC 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 3 " "Disabled,Enabled" textline " " bitfld.long 0xC 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 3 " "Disabled,Enabled" bitfld.long 0xC 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 3 " "Disabled,Enabled" line.long 0x10 "CHNENBL4 ,Channel 4 Enable RAM" bitfld.long 0x10 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 4 " "Disabled,Enabled" textline " " bitfld.long 0x10 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 4 " "Disabled,Enabled" bitfld.long 0x10 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 4 " "Disabled,Enabled" line.long 0x14 "CHNENBL5 ,Channel 5 Enable RAM" bitfld.long 0x14 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 5 " "Disabled,Enabled" textline " " bitfld.long 0x14 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 5 " "Disabled,Enabled" bitfld.long 0x14 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 5 " "Disabled,Enabled" line.long 0x18 "CHNENBL6 ,Channel 6 Enable RAM" bitfld.long 0x18 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 6 " "Disabled,Enabled" textline " " bitfld.long 0x18 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 6 " "Disabled,Enabled" bitfld.long 0x18 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 6 " "Disabled,Enabled" line.long 0x1C "CHNENBL7 ,Channel 7 Enable RAM" bitfld.long 0x1C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 7 " "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 7 " "Disabled,Enabled" bitfld.long 0x1C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 7 " "Disabled,Enabled" line.long 0x20 "CHNENBL8 ,Channel 8 Enable RAM" bitfld.long 0x20 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 8 " "Disabled,Enabled" textline " " bitfld.long 0x20 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 8 " "Disabled,Enabled" bitfld.long 0x20 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 8 " "Disabled,Enabled" line.long 0x24 "CHNENBL9 ,Channel 9 Enable RAM" bitfld.long 0x24 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 9 " "Disabled,Enabled" textline " " bitfld.long 0x24 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 9 " "Disabled,Enabled" bitfld.long 0x24 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 9 " "Disabled,Enabled" line.long 0x28 "CHNENBL10,Channel 10 Enable RAM" bitfld.long 0x28 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 10" "Disabled,Enabled" textline " " bitfld.long 0x28 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 10" "Disabled,Enabled" bitfld.long 0x28 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 10" "Disabled,Enabled" line.long 0x2C "CHNENBL11,Channel 11 Enable RAM" bitfld.long 0x2C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 11" "Disabled,Enabled" textline " " bitfld.long 0x2C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 11" "Disabled,Enabled" bitfld.long 0x2C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 11" "Disabled,Enabled" line.long 0x30 "CHNENBL12,Channel 12 Enable RAM" bitfld.long 0x30 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 12" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 12" "Disabled,Enabled" bitfld.long 0x30 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 12" "Disabled,Enabled" line.long 0x34 "CHNENBL13,Channel 13 Enable RAM" bitfld.long 0x34 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 13" "Disabled,Enabled" textline " " bitfld.long 0x34 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 13" "Disabled,Enabled" bitfld.long 0x34 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 13" "Disabled,Enabled" line.long 0x38 "CHNENBL14,Channel 14 Enable RAM" bitfld.long 0x38 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 14" "Disabled,Enabled" textline " " bitfld.long 0x38 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 14" "Disabled,Enabled" bitfld.long 0x38 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 14" "Disabled,Enabled" line.long 0x3C "CHNENBL15,Channel 15 Enable RAM" bitfld.long 0x3C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 15" "Disabled,Enabled" textline " " bitfld.long 0x3C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 15" "Disabled,Enabled" bitfld.long 0x3C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 15" "Disabled,Enabled" line.long 0x40 "CHNENBL16,Channel 16 Enable RAM" bitfld.long 0x40 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 16" "Disabled,Enabled" textline " " bitfld.long 0x40 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 16" "Disabled,Enabled" bitfld.long 0x40 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 16" "Disabled,Enabled" line.long 0x44 "CHNENBL17,Channel 17 Enable RAM" bitfld.long 0x44 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 17" "Disabled,Enabled" textline " " bitfld.long 0x44 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 17" "Disabled,Enabled" bitfld.long 0x44 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 17" "Disabled,Enabled" line.long 0x48 "CHNENBL18,Channel 18 Enable RAM" bitfld.long 0x48 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 18" "Disabled,Enabled" textline " " bitfld.long 0x48 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 18" "Disabled,Enabled" bitfld.long 0x48 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 18" "Disabled,Enabled" line.long 0x4C "CHNENBL19,Channel 19 Enable RAM" bitfld.long 0x4C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 19" "Disabled,Enabled" textline " " bitfld.long 0x4C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 19" "Disabled,Enabled" bitfld.long 0x4C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 19" "Disabled,Enabled" line.long 0x50 "CHNENBL20,Channel 20 Enable RAM" bitfld.long 0x50 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 20" "Disabled,Enabled" textline " " bitfld.long 0x50 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 20" "Disabled,Enabled" bitfld.long 0x50 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 20" "Disabled,Enabled" line.long 0x54 "CHNENBL21,Channel 21 Enable RAM" bitfld.long 0x54 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 21" "Disabled,Enabled" textline " " bitfld.long 0x54 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 21" "Disabled,Enabled" bitfld.long 0x54 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 21" "Disabled,Enabled" line.long 0x58 "CHNENBL22,Channel 22 Enable RAM" bitfld.long 0x58 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 22" "Disabled,Enabled" textline " " bitfld.long 0x58 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 22" "Disabled,Enabled" bitfld.long 0x58 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 22" "Disabled,Enabled" line.long 0x5C "CHNENBL23,Channel 23 Enable RAM" bitfld.long 0x5C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 23" "Disabled,Enabled" textline " " bitfld.long 0x5C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 23" "Disabled,Enabled" bitfld.long 0x5C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 23" "Disabled,Enabled" line.long 0x60 "CHNENBL24,Channel 24 Enable RAM" bitfld.long 0x60 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 24" "Disabled,Enabled" textline " " bitfld.long 0x60 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 24" "Disabled,Enabled" bitfld.long 0x60 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 24" "Disabled,Enabled" line.long 0x64 "CHNENBL25,Channel 25 Enable RAM" bitfld.long 0x64 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 25" "Disabled,Enabled" textline " " bitfld.long 0x64 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 25" "Disabled,Enabled" bitfld.long 0x64 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 25" "Disabled,Enabled" line.long 0x68 "CHNENBL26,Channel 26 Enable RAM" bitfld.long 0x68 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 26" "Disabled,Enabled" textline " " bitfld.long 0x68 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 26" "Disabled,Enabled" bitfld.long 0x68 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 26" "Disabled,Enabled" line.long 0x6C "CHNENBL27,Channel 27 Enable RAM" bitfld.long 0x6C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 27" "Disabled,Enabled" textline " " bitfld.long 0x6C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 27" "Disabled,Enabled" bitfld.long 0x6C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 27" "Disabled,Enabled" line.long 0x70 "CHNENBL28,Channel 28 Enable RAM" bitfld.long 0x70 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 28" "Disabled,Enabled" textline " " bitfld.long 0x70 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 28" "Disabled,Enabled" bitfld.long 0x70 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 28" "Disabled,Enabled" line.long 0x74 "CHNENBL29,Channel 29 Enable RAM" bitfld.long 0x74 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 29" "Disabled,Enabled" textline " " bitfld.long 0x74 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 29" "Disabled,Enabled" bitfld.long 0x74 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 29" "Disabled,Enabled" line.long 0x78 "CHNENBL30,Channel 30 Enable RAM" bitfld.long 0x78 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 30" "Disabled,Enabled" textline " " bitfld.long 0x78 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 30" "Disabled,Enabled" bitfld.long 0x78 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 30" "Disabled,Enabled" line.long 0x7C "CHNENBL31,Channel 31 Enable RAM" bitfld.long 0x7C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 31" "Disabled,Enabled" textline " " bitfld.long 0x7C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 31" "Disabled,Enabled" bitfld.long 0x7C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 31" "Disabled,Enabled" line.long 0x80 "CHNENBL32,Channel 32 Enable RAM" bitfld.long 0x80 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 32" "Disabled,Enabled" textline " " bitfld.long 0x80 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 32" "Disabled,Enabled" bitfld.long 0x80 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 32" "Disabled,Enabled" line.long 0x84 "CHNENBL33,Channel 33 Enable RAM" bitfld.long 0x84 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 33" "Disabled,Enabled" textline " " bitfld.long 0x84 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 33" "Disabled,Enabled" bitfld.long 0x84 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 33" "Disabled,Enabled" line.long 0x88 "CHNENBL34,Channel 34 Enable RAM" bitfld.long 0x88 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 34" "Disabled,Enabled" textline " " bitfld.long 0x88 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 34" "Disabled,Enabled" bitfld.long 0x88 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 34" "Disabled,Enabled" line.long 0x8C "CHNENBL35,Channel 35 Enable RAM" bitfld.long 0x8C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 35" "Disabled,Enabled" textline " " bitfld.long 0x8C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 35" "Disabled,Enabled" bitfld.long 0x8C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 35" "Disabled,Enabled" line.long 0x90 "CHNENBL36,Channel 36 Enable RAM" bitfld.long 0x90 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 36" "Disabled,Enabled" textline " " bitfld.long 0x90 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 36" "Disabled,Enabled" bitfld.long 0x90 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 36" "Disabled,Enabled" line.long 0x94 "CHNENBL37,Channel 37 Enable RAM" bitfld.long 0x94 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 37" "Disabled,Enabled" textline " " bitfld.long 0x94 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 37" "Disabled,Enabled" bitfld.long 0x94 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 37" "Disabled,Enabled" line.long 0x98 "CHNENBL38,Channel 38 Enable RAM" bitfld.long 0x98 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 38" "Disabled,Enabled" textline " " bitfld.long 0x98 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 38" "Disabled,Enabled" bitfld.long 0x98 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 38" "Disabled,Enabled" line.long 0x9C "CHNENBL39,Channel 39 Enable RAM" bitfld.long 0x9C 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 39" "Disabled,Enabled" textline " " bitfld.long 0x9C 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 39" "Disabled,Enabled" bitfld.long 0x9C 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 39" "Disabled,Enabled" line.long 0xA0 "CHNENBL40,Channel 40 Enable RAM" bitfld.long 0xA0 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 40" "Disabled,Enabled" textline " " bitfld.long 0xA0 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 40" "Disabled,Enabled" bitfld.long 0xA0 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 40" "Disabled,Enabled" line.long 0xA4 "CHNENBL41,Channel 41 Enable RAM" bitfld.long 0xA4 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 41" "Disabled,Enabled" textline " " bitfld.long 0xA4 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 41" "Disabled,Enabled" bitfld.long 0xA4 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 41" "Disabled,Enabled" line.long 0xA8 "CHNENBL42,Channel 42 Enable RAM" bitfld.long 0xA8 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 42" "Disabled,Enabled" textline " " bitfld.long 0xA8 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 42" "Disabled,Enabled" bitfld.long 0xA8 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 42" "Disabled,Enabled" line.long 0xAC "CHNENBL43,Channel 43 Enable RAM" bitfld.long 0xAC 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 43" "Disabled,Enabled" textline " " bitfld.long 0xAC 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 43" "Disabled,Enabled" bitfld.long 0xAC 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 43" "Disabled,Enabled" line.long 0xB0 "CHNENBL44,Channel 44 Enable RAM" bitfld.long 0xB0 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 44" "Disabled,Enabled" textline " " bitfld.long 0xB0 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 44" "Disabled,Enabled" bitfld.long 0xB0 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 44" "Disabled,Enabled" line.long 0xB4 "CHNENBL45,Channel 45 Enable RAM" bitfld.long 0xB4 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 45" "Disabled,Enabled" textline " " bitfld.long 0xB4 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 45" "Disabled,Enabled" bitfld.long 0xB4 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 45" "Disabled,Enabled" line.long 0xB8 "CHNENBL46,Channel 46 Enable RAM" bitfld.long 0xB8 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 46" "Disabled,Enabled" textline " " bitfld.long 0xB8 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 46" "Disabled,Enabled" bitfld.long 0xB8 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 46" "Disabled,Enabled" line.long 0xBC "CHNENBL47,Channel 47 Enable RAM" bitfld.long 0xBC 31. " ENBL[31] ,Channel 31 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 30. " ENBL[30] ,Channel 30 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 29. " ENBL[29] ,Channel 29 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 28. " ENBL[28] ,Channel 28 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 27. " ENBL[27] ,Channel 27 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 26. " ENBL[26] ,Channel 26 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 25. " ENBL[25] ,Channel 25 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 24. " ENBL[24] ,Channel 24 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 23. " ENBL[23] ,Channel 23 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 22. " ENBL[22] ,Channel 22 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 21. " ENBL[21] ,Channel 21 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 20. " ENBL[20] ,Channel 20 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 19. " ENBL[19] ,Channel 19 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 18. " ENBL[18] ,Channel 18 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 17. " ENBL[17] ,Channel 17 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 16. " ENBL[16] ,Channel 16 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 15. " ENBL[15] ,Channel 15 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 14. " ENBL[14] ,Channel 14 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 13. " ENBL[13] ,Channel 13 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 12. " ENBL[12] ,Channel 12 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 11. " ENBL[11] ,Channel 11 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 10. " ENBL[10] ,Channel 10 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 9. " ENBL[09] ,Channel 9 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 8. " ENBL[08] ,Channel 8 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 7. " ENBL[07] ,Channel 7 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 6. " ENBL[06] ,Channel 6 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 5. " ENBL[05] ,Channel 5 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 4. " ENBL[04] ,Channel 4 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 3. " ENBL[03] ,Channel 3 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 2. " ENBL[02] ,Channel 2 Enable triggered by DMA request number 47" "Disabled,Enabled" textline " " bitfld.long 0xBC 1. " ENBL[01] ,Channel 1 Enable triggered by DMA request number 47" "Disabled,Enabled" bitfld.long 0xBC 0. " ENBL[00] ,Channel 0 Enable triggered by DMA request number 47" "Disabled,Enabled" tree.end width 10. sif (!cpuis("IMX6*")) tree "Channel Priority Registers" group.long 0x100++0x7f line.long 0x0 "CHNPRI0 ,Channel 0 Priority Register" bitfld.long 0x0 0.--2. " CHNPRI0 ,Priority of Channel Number 0 " "No running channel,1,2,3,4,5,6,7" line.long 0x4 "CHNPRI1 ,Channel 1 Priority Register" bitfld.long 0x4 0.--2. " CHNPRI1 ,Priority of Channel Number 1 " "No running channel,1,2,3,4,5,6,7" line.long 0x8 "CHNPRI2 ,Channel 2 Priority Register" bitfld.long 0x8 0.--2. " CHNPRI2 ,Priority of Channel Number 2 " "No running channel,1,2,3,4,5,6,7" line.long 0xC "CHNPRI3 ,Channel 3 Priority Register" bitfld.long 0xC 0.--2. " CHNPRI3 ,Priority of Channel Number 3 " "No running channel,1,2,3,4,5,6,7" line.long 0x10 "CHNPRI4 ,Channel 4 Priority Register" bitfld.long 0x10 0.--2. " CHNPRI4 ,Priority of Channel Number 4 " "No running channel,1,2,3,4,5,6,7" line.long 0x14 "CHNPRI5 ,Channel 5 Priority Register" bitfld.long 0x14 0.--2. " CHNPRI5 ,Priority of Channel Number 5 " "No running channel,1,2,3,4,5,6,7" line.long 0x18 "CHNPRI6 ,Channel 6 Priority Register" bitfld.long 0x18 0.--2. " CHNPRI6 ,Priority of Channel Number 6 " "No running channel,1,2,3,4,5,6,7" line.long 0x1C "CHNPRI7 ,Channel 7 Priority Register" bitfld.long 0x1C 0.--2. " CHNPRI7 ,Priority of Channel Number 7 " "No running channel,1,2,3,4,5,6,7" line.long 0x20 "CHNPRI8 ,Channel 8 Priority Register" bitfld.long 0x20 0.--2. " CHNPRI8 ,Priority of Channel Number 8 " "No running channel,1,2,3,4,5,6,7" line.long 0x24 "CHNPRI9 ,Channel 9 Priority Register" bitfld.long 0x24 0.--2. " CHNPRI9 ,Priority of Channel Number 9 " "No running channel,1,2,3,4,5,6,7" line.long 0x28 "CHNPRI10,Channel 10 Priority Register" bitfld.long 0x28 0.--2. " CHNPRI10 ,Priority of Channel Number 10" "No running channel,1,2,3,4,5,6,7" line.long 0x2C "CHNPRI11,Channel 11 Priority Register" bitfld.long 0x2C 0.--2. " CHNPRI11 ,Priority of Channel Number 11" "No running channel,1,2,3,4,5,6,7" line.long 0x30 "CHNPRI12,Channel 12 Priority Register" bitfld.long 0x30 0.--2. " CHNPRI12 ,Priority of Channel Number 12" "No running channel,1,2,3,4,5,6,7" line.long 0x34 "CHNPRI13,Channel 13 Priority Register" bitfld.long 0x34 0.--2. " CHNPRI13 ,Priority of Channel Number 13" "No running channel,1,2,3,4,5,6,7" line.long 0x38 "CHNPRI14,Channel 14 Priority Register" bitfld.long 0x38 0.--2. " CHNPRI14 ,Priority of Channel Number 14" "No running channel,1,2,3,4,5,6,7" line.long 0x3C "CHNPRI15,Channel 15 Priority Register" bitfld.long 0x3C 0.--2. " CHNPRI15 ,Priority of Channel Number 15" "No running channel,1,2,3,4,5,6,7" line.long 0x40 "CHNPRI16,Channel 16 Priority Register" bitfld.long 0x40 0.--2. " CHNPRI16 ,Priority of Channel Number 16" "No running channel,1,2,3,4,5,6,7" line.long 0x44 "CHNPRI17,Channel 17 Priority Register" bitfld.long 0x44 0.--2. " CHNPRI17 ,Priority of Channel Number 17" "No running channel,1,2,3,4,5,6,7" line.long 0x48 "CHNPRI18,Channel 18 Priority Register" bitfld.long 0x48 0.--2. " CHNPRI18 ,Priority of Channel Number 18" "No running channel,1,2,3,4,5,6,7" line.long 0x4C "CHNPRI19,Channel 19 Priority Register" bitfld.long 0x4C 0.--2. " CHNPRI19 ,Priority of Channel Number 19" "No running channel,1,2,3,4,5,6,7" line.long 0x50 "CHNPRI20,Channel 20 Priority Register" bitfld.long 0x50 0.--2. " CHNPRI20 ,Priority of Channel Number 20" "No running channel,1,2,3,4,5,6,7" line.long 0x54 "CHNPRI21,Channel 21 Priority Register" bitfld.long 0x54 0.--2. " CHNPRI21 ,Priority of Channel Number 21" "No running channel,1,2,3,4,5,6,7" line.long 0x58 "CHNPRI22,Channel 22 Priority Register" bitfld.long 0x58 0.--2. " CHNPRI22 ,Priority of Channel Number 22" "No running channel,1,2,3,4,5,6,7" line.long 0x5C "CHNPRI23,Channel 23 Priority Register" bitfld.long 0x5C 0.--2. " CHNPRI23 ,Priority of Channel Number 23" "No running channel,1,2,3,4,5,6,7" line.long 0x60 "CHNPRI24,Channel 24 Priority Register" bitfld.long 0x60 0.--2. " CHNPRI24 ,Priority of Channel Number 24" "No running channel,1,2,3,4,5,6,7" line.long 0x64 "CHNPRI25,Channel 25 Priority Register" bitfld.long 0x64 0.--2. " CHNPRI25 ,Priority of Channel Number 25" "No running channel,1,2,3,4,5,6,7" line.long 0x68 "CHNPRI26,Channel 26 Priority Register" bitfld.long 0x68 0.--2. " CHNPRI26 ,Priority of Channel Number 26" "No running channel,1,2,3,4,5,6,7" line.long 0x6C "CHNPRI27,Channel 27 Priority Register" bitfld.long 0x6C 0.--2. " CHNPRI27 ,Priority of Channel Number 27" "No running channel,1,2,3,4,5,6,7" line.long 0x70 "CHNPRI28,Channel 28 Priority Register" bitfld.long 0x70 0.--2. " CHNPRI28 ,Priority of Channel Number 28" "No running channel,1,2,3,4,5,6,7" line.long 0x74 "CHNPRI29,Channel 29 Priority Register" bitfld.long 0x74 0.--2. " CHNPRI29 ,Priority of Channel Number 29" "No running channel,1,2,3,4,5,6,7" line.long 0x78 "CHNPRI30,Channel 30 Priority Register" bitfld.long 0x78 0.--2. " CHNPRI30 ,Priority of Channel Number 30" "No running channel,1,2,3,4,5,6,7" line.long 0x7C "CHNPRI31,Channel 31 Priority Register" bitfld.long 0x7C 0.--2. " CHNPRI31 ,Priority of Channel Number 31" "No running channel,1,2,3,4,5,6,7" tree.end endif width 0xb tree.end sif (cpu()=="IMX6SOLOLITE") tree "SNVS (Secure Non-Volatile Storage)" base ad:0x020CC000 width 11. tree "HP Registers" group.long 0x00++0x0B line.long 0x00 "HPLR,SNVS_HP Lock Register" bitfld.long 0x00 5. " GPR_SL ,General Purpose Register Soft Lock" "Not locked,Locked" bitfld.long 0x00 4. " MC_SL ,Monotonic Counter Soft Lock" "Not locked,Locked" line.long 0x04 "HPCOMR,SNVS_HP Command Register" bitfld.long 0x04 31. " NPSWA_EN ,Non-Privileged SW Access Enable" "Disabled,Enabled" bitfld.long 0x04 5. " LP_SWR_DIS ,LP SW Reset Disable" "No,Yes" bitfld.long 0x04 4. " LP_SWR ,LP SW Reset" "No effect,Reset" line.long 0x08 "HPCR,SNVS_HP Control Register" bitfld.long 0x08 10.--14. " HPCALB_VAL ,HP Calibration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1" bitfld.long 0x08 8. " HPCALB_EN ,HP Real Time Counter Calibration Enabled" "Disabled,Enabled" bitfld.long 0x08 4.--7. " PI_FREQ ,Periodic Interrupt Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 3. " PI_EN ,HP Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " HPTA_EN ,HP Time Alarm Enable" "Disabled,Enabled" bitfld.long 0x08 0. " RTC_EN ,HP Real Time Counter Enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "HPSR,SNVS_HP Status Register" eventfld.long 0x00 7. " BI ,Button Interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 6. " BTN ,Value of the BTN input" "Not pressed,Pressed" if (((per.l(ad:0x020CC000+0x08))&0x01)==0x00) group.long 0x24++0x07 line.long 0x00 "HPRTCMR,SNVS_HP Real Time Counter MSB Register" hexmask.long.word 0x00 0.--14. 1. " RTC ,HP Real Time Counter bits" line.long 0x04 "HPRTCLR,SNVS_HP Real Time Counter LSB Register" else rgroup.long 0x24++0x07 line.long 0x00 "HPRTCMR,SNVS_HP Real Time Counter MSB Register" hexmask.long.word 0x00 0.--14. 1. " RTC ,HP Real Time Counter bits" line.long 0x04 "HPRTCLR,SNVS_HP Real Time Counter LSB Register" endif if (((per.l(ad:0x020CC000+0x08))&0x02)==0x00) group.long 0x2C++0x07 line.long 0x00 "HPTAMR,SNVS_HP Time Alarm MSB Register" hexmask.long.word 0x00 0.--14. 1. " HPTA ,HP Time Alarm bit" line.long 0x04 "HPTALR,SNVS_HP Time Alarm LSB Register" else rgroup.long 0x2C++0x07 line.long 0x00 "HPTAMR,SNVS_HP Time Alarm MSB Register" hexmask.long.word 0x00 0.--14. 1. " HPTA ,HP Time Alarm bit" line.long 0x04 "HPTALR,SNVS_HP Time Alarm LSB Register" endif tree.end tree "LP Registers" group.long 0x34++0x27 line.long 0x00 "LPLR,SNVS_LP Lock Register" bitfld.long 0x00 5. " GPR_HL ,General Purpose Register Hard Lock" "Not locked,Locked" bitfld.long 0x00 4. " MC_HL ,Monotonic Counter Hard Lock" "Not locked,Locked" line.long 0x04 "LPCR,SNVS_LP Control Register" bitfld.long 0x04 23. " PK_OVERRIDE ,PMIC On Request Override" "Not overrided,Overrided" bitfld.long 0x04 22. " PK_EN ,PMIC On Request Enable" "Disabled,Enabled" bitfld.long 0x04 20.--21. " ON_TIME ,Used to configure the period of time" "500 ms,50 ms,100 ms,0 ms" textline " " bitfld.long 0x04 18.--19. " DEBOUNCE ,Configures the amount of debounce time for the BTN input signal" "500 ms,50 ms,100 ms,0 ms" bitfld.long 0x04 16.--17. " BTN_PRESS_TIME ,Button press time out values for PMIC Logic" "5 s,10 s,15 s,Disabled" bitfld.long 0x04 7. " PWR_GLITCH_EN ,Enables the power glitch event for the PMIC" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " TOP ,Turn off System Power" "On,Off" bitfld.long 0x04 5. " DP_EN ,Dumb PMIC Enabled" "Smart,Dumb" bitfld.long 0x04 2. " MC_ENV ,Monotonic Counter Enable and Valid" "Disabled or invalid,Enabled and valid" line.long 0x08 "LPMKCR,SNVS_LP Master Key Control Register" group.long 0x4C++0x03 line.long 0x00 "LPSR,SNVS_LP Status Register" eventfld.long 0x00 18. " SPO ,Set Power Off" "Not detected,Detected" eventfld.long 0x00 17. " EO ,Emergency Off" "Not detected,Detected" eventfld.long 0x00 2. " MCR ,Monotonic Counter maximum value reached" "Not reached,Reached" group.long 0x5C++0x07 line.long 0x00 "LPSMCMR,SNVS_LP Secure Monotonic Counter MSB Register" hexmask.long.word 0x00 16.--31. 1. " MC_ERA_BITS ,Monotonic Counter Era Bits" hexmask.long.word 0x00 0.--15. 1. " MON_COUNTER ,Monotonic Counter bits" line.long 0x04 "LPSMCLR,SNVS_LP Secure Monotonic Counter LSB Register" if (((per.l(ad:0x020CC000+0x00))&0x20)==0x00)&&(((per.l(ad:0x020CC000+0x34))&0x20)==0x00) group.long 0x68++0x03 line.long 0x00 "LPGPR,SNVS_LP General Purpose Register" else rgroup.long 0x68++0x03 line.long 0x00 "LPGPR,SNVS_LP General Purpose Register" endif tree.end tree "Version ID Registers" rgroup.long 0xBF8++0x07 line.long 0x00 "HPVIDR1,SNVS_HP Version ID Register 1" hexmask.long.word 0x00 16.--31. 1. " IP_ID ,SNVS Module ID" hexmask.long.byte 0x00 8.--15. 1. " MAJOR_REV ,SNVS Module Major Version Number" hexmask.long.byte 0x00 0.--7. 1. " MINOR_REV ,SNVS Module Minor Version Number" line.long 0x04 "HPVIDR2,SNVS_HP Version ID Register 2" hexmask.long.byte 0x04 24.--31. 1. " IP_ERA ,Era of the IP design" hexmask.long.byte 0x04 16.--23. 1. " INTG_OPT ,SNVS Integration Option" hexmask.long.byte 0x04 8.--15. 1. " ECO_REV ,SNVS ECO Revision" hexmask.long.byte 0x04 0.--7. 1. " CONFIG_OPT ,SNVS Configuration Option" tree.end width 0x0B tree.end endif tree "SPBA (Shared Peripheral Bus Arbiter)" base ad:0x0203C000 width 7. group.long 0x0++0x27 line.long 0x00 "PRR0,Peripheral Right Register 0" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x4++0x27 line.long 0x00 "PRR1,Peripheral Right Register 1" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x8++0x27 line.long 0x00 "PRR2,Peripheral Right Register 2" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0xC++0x27 line.long 0x00 "PRR3,Peripheral Right Register 3" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x10++0x27 line.long 0x00 "PRR4,Peripheral Right Register 4" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x14++0x27 line.long 0x00 "PRR5,Peripheral Right Register 5" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x18++0x27 line.long 0x00 "PRR6,Peripheral Right Register 6" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x1C++0x27 line.long 0x00 "PRR7,Peripheral Right Register 7" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x20++0x27 line.long 0x00 "PRR8,Peripheral Right Register 8" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x24++0x27 line.long 0x00 "PRR9,Peripheral Right Register 9" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x28++0x57 line.long 0x00 "PRR10,Peripheral Right Register 10" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x2C++0x57 line.long 0x00 "PRR11,Peripheral Right Register 11" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x30++0x57 line.long 0x00 "PRR12,Peripheral Right Register 12" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x34++0x57 line.long 0x00 "PRR13,Peripheral Right Register 13" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x38++0x57 line.long 0x00 "PRR14,Peripheral Right Register 14" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x3C++0x57 line.long 0x00 "PRR15,Peripheral Right Register 15" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x40++0x57 line.long 0x00 "PRR16,Peripheral Right Register 16" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x44++0x57 line.long 0x00 "PRR17,Peripheral Right Register 17" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x48++0x57 line.long 0x00 "PRR18,Peripheral Right Register 18" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x4C++0x57 line.long 0x00 "PRR19,Peripheral Right Register 19" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x50++0x57 line.long 0x00 "PRR20,Peripheral Right Register 20" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x54++0x57 line.long 0x00 "PRR21,Peripheral Right Register 21" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x58++0x57 line.long 0x00 "PRR22,Peripheral Right Register 22" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x5C++0x57 line.long 0x00 "PRR23,Peripheral Right Register 23" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x60++0x57 line.long 0x00 "PRR24,Peripheral Right Register 24" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x64++0x57 line.long 0x00 "PRR25,Peripheral Right Register 25" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x68++0x57 line.long 0x00 "PRR26,Peripheral Right Register 26" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x6C++0x57 line.long 0x00 "PRR27,Peripheral Right Register 27" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x70++0x57 line.long 0x00 "PRR28,Peripheral Right Register 28" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x74++0x57 line.long 0x00 "PRR29,Peripheral Right Register 29" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x78++0x57 line.long 0x00 "PRR30,Peripheral Right Register 30" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" group.long 0x7C++0x57 line.long 0x00 "PRR31,Peripheral Right Register 31" rbitfld.long 0x00 30.--31. " RMO ,Requesting Master Owner" "Unowned,,Another,Requesting" rbitfld.long 0x00 16.--17. " ROI ,Resource Owner ID" "Unowned,A,B,C" newline bitfld.long 0x00 2. " RARC ,Resource Access Right for Master C" "Not allowed,Allowed" bitfld.long 0x00 1. " RARB ,Resource Access Right for Master B" "Not allowed,Allowed" newline bitfld.long 0x00 0. " RARA ,Resource Access Right for Master A" "Not allowed,Allowed" width 0x0B tree.end tree "SPDIF (Sony/Philips Digital Interface)" base ad:0x02004000 width 9. group.long 0x00++0x07 line.long 0x00 "SCR,Configuration Register" bitfld.long 0x00 23. " RXFIFO_CTRL ,Receive FIFO operation mode" "Normal,Read zero" bitfld.long 0x00 22. " RXFIFO_OFF/ON ,SPDIF Receive FIFO enable" "Enabled,Disabled" bitfld.long 0x00 21. " RXFIFO_RST ,Receive FIFO reset" "No reset,Reset" newline bitfld.long 0x00 19.--20. " RXFIFOFULL_SEL ,Receive FIFO full interrupt select" "1,4,8,16" bitfld.long 0x00 18. " RXAUTOSYNC ,Receive FIFO auto sync enable" "Disabled,Enabled" bitfld.long 0x00 17. " TXAUTOSYNC ,Transmit FIFO Auto Sync Enable" "Disabled,Enabled" newline bitfld.long 0x00 15.--16. " TXFIFOEMPTY_SEL ,Transmit FIFO Empty interrupt select" "0,4,8,12" bitfld.long 0x00 13. " LOW_POWER ,SPDIF low-power mode" "Disabled,Enabled" bitfld.long 0x00 12. " SOFT_RESET ,SPDIF software reset" "No reset,Reset" newline bitfld.long 0x00 10.--11. " TXFIFO_CTRL ,Transmit FIFO Control" "Tx Digital 0,Normal,Reset to 1 samp,?..." bitfld.long 0x00 9. " DMA_RX_EN ,DMA Receive Request enable" "Disabled,Enabled" bitfld.long 0x00 8. " DMA_TX_EN ,DMA Transmit Request enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " VALCTRL ,Outgoing Validity" "Set,Clear" bitfld.long 0x00 2.--4. " TXSEL ,Transmit Select" "0ff and output 0,SPDIFIN,,,,Normal,," bitfld.long 0x00 0.--1. " USRC_SEL ,Receive channel U select" "No embedded,SPDIF receive block,,On chip transmitter" line.long 0x04 "SRCD,CDText Control Register" bitfld.long 0x04 1. " USYNCMODE , U sync mode" "Non-CD data,CD user channel subcode" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6QUADLITE")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SLL") if (((per.l(ad:0x02004000+0x08))&0x40)==0x40) group.long 0x08++0x03 line.long 0x00 "SRPC,PhaseConfig Register" sif (cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SLL") bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "SPDIF_RxClk,SPDIF_RxClk,,SPDIF_RxClk,,REF_CLK_32K,TX_CLK,,SPDIF_EXT_CLK,?..." else bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "SPDIF_RxClk,SPDIF_RxClk,SPDIF_RxClk,SPDIF_RxClk,SPDIF_Rxclk,Extal_clk,Spdif_clk,Asrc_clk,Spdif_extclk,Esai_hckt,SPDIF_RxClk,SPDIF_RxClk,Mkb_clk,Mlb_phy_clk,?..." endif newline rbitfld.long 0x00 6. " LOCK ,Internal DPLL lock" "Not locked,Locked" bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..." else group.long 0x08++0x03 line.long 0x00 "SRPC,PhaseConfig Register" sif (cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SLL") bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "REF_CLK_32K,TX_CLK,,SPDIF_EXT_CLK,,REF_CLK_32K,TX_CLK,,SPDIF_EXT_CLK,?..." else bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "Extal,Spdif_clk,Asrc_clk,Spdif_extclk,Esai_hckt,Extal_clk,Spdif_clk,Asrc_clk,Spdif_extclk,Esai_hckt,Mlb_clk,Mlb_phy_clk,Mkb_clk,Mlb_phy_clk,?..." endif newline rbitfld.long 0x00 6. " LOCK ,Internal DPLL lock" "Not locked,Locked" bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..." endif else group.long 0x08++0x03 line.long 0x00 "SRPC,PhaseConfig Register" rbitfld.long 0x00 6. " LOCK ,Internal DPLL lock" "Not locked,Locked" bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..." endif group.long 0x0C++0x03 line.long 0x00 "SIE,Interrupt Enable Register" bitfld.long 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt enable" "Disabled,Enabled" bitfld.long 0x00 19. " TXUNOV ,SPDIF transmit FIFO under/overrun interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " TXRESYN ,SPDIF transmit FIFO resync interrupt" "Disabled,Enabled" bitfld.long 0x00 17. " CNEW ,SPDIF receive change in value of control channel" "Disabled,Enabled" newline bitfld.long 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " URXFUL ,U channel receive register full interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " URXOV ,U channel receive register overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " QRXFUL ,Q channel receive register full interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " QRXOV ,Q channel receive register overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " UQSYNC ,U/Q channel sync found interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " UQERR ,U/Q channel framing error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " RXFIFOUNOV ,RX FIFO underrun/overrun interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " RXFIFORESYN ,RX FIFO resync interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0 1. " TXEM ,SPDIF transmit FIFO empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXFIFOFUL ,SPDIF receive FIFO full interrupt enable" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "SIS/SIC,Interrupt Status Register" sif (cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SLL") setclrfld.long 0x00 20. 0x00 20. 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x00 19. 0x00 19. " TXUNOV ,SPDIF transmit FIFO under/overrun interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 18. 0x00 18. 0x00 18. " TXRESYN ,SPDIF transmit FIFO resync interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x00 17. 0x00 17. " CNEW ,SPDIF receive change in value of control channel" "No interrupt,Interrupt" newline setclrfld.long 0x00 16. 0x00 16. 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x00 15. 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 14. 0x00 14. 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x00 10. " URXFUL ,U channel receive register full interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x00 9. " URXOV ,U channel receive register overrun interrupt enable" "No interrupt,Interrupt" rbitfld.long 0x00 8. " QRXFUL ,Q channel receive register full interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x00 7. " QRXOV ,Q channel receive register overrun interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x00 6. " UQSYNC ,U/Q channel sync found interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x00 5. " UQERR ,U/Q channel framing error interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x00 4. " RXFIFOUNOV ,RX FIFO underrun/overrun interrupt enable" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x00 3. " RXFIFORESYN ,RX FIFO resync interrupt enable" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt enable" "No interrupt,Interrupt" newline rbitfld.long 0x00 1. " TXEM ,SPDIF transmit FIFO empty interrupt enable" "No interrupt,Interrupt" rbitfld.long 0x00 0. " RXFIFOFUL ,SPDIF RX FIFO full interrupt enable" "No interrupt,Interrupt" else bitfld.long 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 19. " TXUNOV ,SPDIF transmit FIFO under/overrun interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 18. " TXRESYN ,SPDIF transmit FIFO resync interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CNEW ,SPDIF receive change in value of control channel" "No interrupt,Interrupt" newline bitfld.long 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 10. " URXFUL ,U channel receive register full interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " URXOV ,U channel receive register overrun interrupt enable" "No interrupt,Interrupt" rbitfld.long 0x00 8. " QRXFUL ,Q channel receive register full interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 7. " QRXOV ,Q channel receive register overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 6. " UQSYNC ,U/Q channel sync found interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 5. " UQERR ,U/Q channel framing error interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 4. " RXFIFOUNOV ,RX FIFO underrun/overrun interrupt enable" "No interrupt,Interrupt" newline bitfld.long 0x00 3. " RXFIFORESYN ,RX FIFO resync interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt enable" "No interrupt,Interrupt" newline rbitfld.long 0x00 1. " TXEM ,SPDIF transmit FIFO empty interrupt enable" "No interrupt,Interrupt" rbitfld.long 0x00 0. " RXFIFOFUL ,SPDIF RX FIFO full interrupt enable" "No interrupt,Interrupt" endif rgroup.long 0x14++0x0F line.long 0x00 "SRL,SPDIF Rx Left Register" hexmask.long.tbyte 0x00 0.--23. 1. " RXDATA_L ,Processor receive SPDIF data left" line.long 0x04 "SRR,SPDIF Rx Right Register" hexmask.long.tbyte 0x04 0.--23. 1. " RXDATA_R ,Processor receive SPDIF data right" line.long 0x08 "SRCSH,SPDIF RxC Channel_h Register" hexmask.long.tbyte 0x08 0.--23. 1. " RXCCH_H ,SPDIF receive C channel register (high bits)" line.long 0x0C "SRCSL,SPDIF RxC Channel_l Register" hexmask.long.tbyte 0x0C 0.--23. 1. " RXCCH_L ,SPDIF receive C channel register (low bits)" sif (cpu()=="IMX6SLL") rgroup.long 0x24++0x07 line.long 0x00 "SRU,U Channel Rx Register" hexmask.long.tbyte 0x00 0.--23. 0x01 " RXUCHANNEL ,Contains next 3 U channel bytes" line.long 0x04 "SRU,U Channel Rx Register" hexmask.long.tbyte 0x04 0.--23. 0x01 " RXQCHANNEL ,Contains next 3 Q channel bytes" else hgroup.long 0x24++0x03 hide.long 0x00 "SRU,U Channel Rx Register" in hgroup.long 0x28++0x03 hide.long 0x00 "SRQ,Q Channel Rx Register" in endif wgroup.long 0x2C++0x07 line.long 0x00 "STL,SPDIF Left Channel Data Transmitter" hexmask.long.tbyte 0x00 0.--23. 1. " TXDATALEFT ,SPDIF transmit left channel data" line.long 0x04 "STR,SPDIF Right Channel Data Transmitter" hexmask.long.tbyte 0x04 0.--23. 1. " TXDATARIGHT ,SPDIF transmit right channel data" group.long 0x34++0x07 line.long 0x0 "STCSCH,SPDIF Tx Consumer Channel Status High Register" hexmask.long.tbyte 0x00 0.--23. 1. " TXCCHANNELCONS_H ,SPDIF transmit Cons. C channel data" line.long 0x04 "STCSCL,SPDIF Tx Consumer Channel Status Low Register" hexmask.long.tbyte 0x04 0.--23. 1. " TXCCHANNELCONS_L ,SPDIF transmit Cons. C channel data" rgroup.long 0x44++0x03 line.long 0x00 "SRFM,Frequency Measurement Data Register" hexmask.long.tbyte 0x00 0.--23. 1. " FREQ_MEAS ,Frequency measurement data" group.long 0x50++0x03 line.long 0x00 "STC,Transmit Clock Control Register" hexmask.long.word 0x00 11.--19. 1. " SYSCLK_DF ,System clock divider factor 2-512" newline sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") sif (cpu()=="IMX6SOLOLITE")||(cpu()=="IMX6SLL") bitfld.long 0x00 8.--10. " TXCLK_SOURCE ,Tx clock source" "REF_CLK_32K,TX_CLK,,SPDIF_EXT_CLK,,IPG_CLK,?..." newline else bitfld.long 0x00 8.--10. " TXCLK_SOURCE ,Tx clock source" "XTAL clk,CCM spidf0_clk_root,Asrc_clk,Spdif_extclk,Esai_hckt,Frequency divider ipg_clk,Mlb_clk,Mlb phy clk" newline endif bitfld.long 0x00 7. " TX_ALL_CLK_EN ,Spdif transfer clock enable" "Disabled,Enabled" newline endif hexmask.long.byte 0x00 0.--6. 1. " TXCLK_DF ,Divider factor (1-128)" width 0x0B tree.end tree "SRC (System Reset Controller)" base ad:0x020D8000 width 7. group.long 0x00++0x03 line.long 0x00 "SCR,System Reset Controller" sif (cpuis("IMX6*")) bitfld.long 0x00 25. " DBG_RST_MSK_PG ,Debug reset mask" "Unmasked,Masked" sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " CORE3_ENABLE ,CPU core3 enable" "Disabled,Enabled" bitfld.long 0x00 23. " CORE2_ENABLE ,CPU core2 enable" "Disabled,Enabled" endif textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 22. " CORE1_ENABLE ,CPU core1 enable" "Disabled,Enabled" bitfld.long 0x00 21. " CORES_DBG_RST ,Software reset for debug of arm platform only" "Not asserted,Asserted" else bitfld.long 0x00 21. " CORES_DBG_RST ,Software reset for debug of arm platform only" "Not asserted,Asserted" endif sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 20. " CORE3_DBG_RST ,Software reset for core3 debug only" "Not asserted,Asserted" bitfld.long 0x00 19. " CORE2_DBG_RST ,Software reset for core2 debug only" "Not asserted,Asserted" endif textline " " sif (cpu()!="IMXSOLOLITE") bitfld.long 0x00 18. " CORE1_DBG_RST ,Software reset for core1 debug only" "Not asserted,Asserted" bitfld.long 0x00 17. " CORE0_DBG_RST ,Software reset for core0 debug only" "Not asserted,Asserted" else bitfld.long 0x00 17. " CORE0_DBG_RST ,Software reset for core0 debug only" "Not asserted,Asserted" endif sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMXSOLOLITE") textline " " bitfld.long 0x00 16. " CORE3_RST ,Software reset for core3 only" "Not asserted,Asserted" bitfld.long 0x00 15. " CORE2_RST ,Software reset for core2 only" "Not asserted,Asserted" endif textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " CORE1_RST ,Software reset for core1 only" "Not asserted,Asserted" bitfld.long 0x00 13. " CORE0_RST ,Software reset for core0 only" "Not asserted,Asserted" else bitfld.long 0x00 13. " CORE0_RST ,Software reset for core0 only" "Not asserted,Asserted" endif sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 12. " SW_IPU2_RST ,Software reset for ipu2" "Not asserted,Asserted" endif endif sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpuis("IMX6*")||cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") textline " " bitfld.long 0x00 11. " EIM_RST ,EIM Reset" "No reset,Reset" endif textline " " bitfld.long 0x00 7.--10. " MASK_WDOG_RST ,Mask wdog_rst_b source" "Not masked,Not masked,Not masked,Not masked,Not masked,Masked,Not masked,Not masked,Not masked,Not masked,Not masked,Not masked,Not masked,Not masked,Not masked,Not masked" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") textline " " bitfld.long 0x00 5.--6. " WARM_RST_BYPASS_COUNT ,Ckil cycles to count before bypassing the MMDC ack for warm reset" "Disabled,16 ckil,32 ckil,64 ckil" elif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 5.--6. " WARM_RST_BYPASS_COUNT ,XTALI cycles to count before bypassing the MMDC ack for warm reset" "Disabled,16 XTALI,32 XTALI,64 XTALI" else textline " " bitfld.long 0x00 5.--6. " WARM_RST_BYPASS_COUNT ,Ckil cycles to count before bypassing the emi ack for warm reset" "Disabled,16 ckil,32 ckil,64 ckil" endif textline " " bitfld.long 0x00 4. " SW_OPEN_VG_RST ,Software reset for open_vg" "Not asserted,Asserted" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") textline " " bitfld.long 0x00 0. " WARM_RESET_ENABLE ,Warm reset enable bit" "Disabled,Enabled" elif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 2. " SW_VPU_RST ,Software reset for vpu" "Not asserted,Asserted" textline " " bitfld.long 0x00 1. " SW_GPU_RST ,Software reset for gpu" "Not asserted,Asserted" bitfld.long 0x00 0. " WARM_RESET_ENABLE ,Warm reset enable bit" "Disabled,Enabled" else textline " " bitfld.long 0x00 3. " SW_IPU_RST ,Software reset for ipu" "Not asserted,Asserted" bitfld.long 0x00 2. " SW_VPU_RST ,Software reset for vpu" "Not asserted,Asserted" textline " " bitfld.long 0x00 1. " SW_GPU_RST ,Software reset for gpu" "Not asserted,Asserted" bitfld.long 0x00 0. " WARM_RESET_ENABLE ,Warm reset enable bit" "Disabled,Enabled" endif sif (cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX61"||cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpuis("IMX6*")) rgroup.long 0x04++0x03 line.long 0x00 "SBMR,SRC Boot Mode Register" sif cpuis("IMX50*") bitfld.long 0x00 27.--29. " TEST_MODE[2:0] ,Test Mode Fuse Select" "0,1,2,3,4,5,6,7" textline " " elif (!cpuis("IMX6*")) bitfld.long 0x00 26. " BT_FUSE_SEL ,Boot fuse select" "0,1" bitfld.long 0x00 24.--25. " BMOD[1:0] ,Boot mode" "0,1,2,3" textline " " elif (cpuis("IMX6*")) hexmask.long.byte 0x00 24.--31. 1. " BOOT_CFG4 ,Boot configuration4" textline " " endif hexmask.long.byte 0x00 16.--23. 1. " BOOT_CFG3 ,Boot configuration3" hexmask.long.byte 0x00 8.--15. 1. " BOOT_CFG2 ,Boot configuration2" textline " " hexmask.long.byte 0x00 0.--7. 1. " BOOT_CFG1 ,Boot configuration1" else rgroup.long 0x04++0x03 line.long 0x00 "SBMR,SRC Boot Mode Register" bitfld.long 0x00 29.--31. " BT_LPB_FREQ[2:0] ,BT_LPB_FREQ[2:0]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 28. " BT_HPN_EN ,BT_HPN_EN" "0,1" textline " " bitfld.long 0x00 27. " BT_USB_SRC ,BT_USB_SRC" "0,1" bitfld.long 0x00 25.--26. " BT_UART_SRC[1:0] ,BT_UART_SRC" "0,1,2,3" textline " " bitfld.long 0x00 23.--24. " BT_LPB[1:0] ,BT_LPB" "0,1,2,3" bitfld.long 0x00 21.--22. " BT_OSC_FREQ_SEL[1:0] ,BT_OSC_FREQ_SEL" "0,1,2,3" textline " " bitfld.long 0x00 19.--20. " BT_SRC[1:0] ,BT_SDMMC_SRC" "0,1,2,3" bitfld.long 0x00 18. " BT_LPB_EN ,BT_LPB_EN" "0,1" textline " " bitfld.long 0x00 16.--17. " BT_WEIM_MUXED ,Multiplexed address mode" "0,1,2,3" bitfld.long 0x00 14.--15. " BMOD[1:0] ,Sample of boot mode pins after reset" "0,1,2,3" textline " " bitfld.long 0x00 13. " DIR_BT_DIS ,Value of dir_bt_dis fuse" "0,1" bitfld.long 0x00 12. " BT_EEPROM_CFG ,EEPROM device used for load of configuration DCD data" "0,1" textline " " bitfld.long 0x00 10. " BT_MLC_SEL ,BT_MLC_SEL" "0,1" bitfld.long 0x00 7.--8. " BT_MEM_TYPE[1:0] ,Boot Memory Type" "0,1,2,3" textline " " bitfld.long 0x00 6. " BT_SPARE_SIZE ,Specifies the size of spare bytes, for Nand Flash devices" "0,1" bitfld.long 0x00 3.--4. " BT_PAGE_SIZE[1:0] ,BT_PAGE_SIZE" "0,1,2,3" textline " " bitfld.long 0x00 2. " BT_BUS_WIDTH ,NAND Bus width" "0,1" bitfld.long 0x00 0.--1. " BT_MEM_CTL[1:0] ,Boot memory control type" "0,1,2,3" endif group.long 0x08++0x03 line.long 0x00 "SRSR,SRC Reset Status Register" bitfld.long 0x00 16. " WARM_BOOT ,Warm boot indication" "Not initiated,Initiated" textline " " eventfld.long 0x00 6. " JTAG_SW_RST ,Reset via JTAG SW" "Not software,Software" eventfld.long 0x00 5. " JTAG_RST_B ,Reset via HIGH-Z JTAG" "Not HIGH-Z,HIGH-Z" textline " " eventfld.long 0x00 4. " WDOG_RST_B ,IC Watchdog Time-out reset" "Not WD time-out,WD time-out" eventfld.long 0x00 3. " IPP_USER_RESET_B ,Reset via ipp_user_reset_b qulified" "Not ipp_user_reset_b,Ipp_user_reset_b" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") textline " " eventfld.long 0x00 0. " IPP_RESET_B ,Reset via ipp_reset_b pin" "Not ipp_reset_b,Ipp_reset_b" else textline " " eventfld.long 0x00 2. " CSU_RESET_B ,Reset via csu_reset_b input" "Not csu_reset_b,Csu_reset_b" eventfld.long 0x00 0. " IPP_RESET_B ,Reset via ipp_reset_b pin" "Not ipp_reset_b,Ipp_reset_b" endif sif (cpuis("IMX6*")) rgroup.long 0x014++0x03 line.long 0x00 "SISR,SRC Interrupt Status Register" sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 8. " CORE3_WDOG_RST_REQ ,Wdog reset request from CPU core3" "Not requested,Requested" bitfld.long 0x00 7. " CORE2_WDOG_RST_REQ ,Wdog reset request from CPU core2" "Not requested,Requested" textline " " endif sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 6. " CORE1_WDOG_RST_REQ ,Wdog reset request from CPU core1" "Not requested,Requested" bitfld.long 0x00 5. " CORE0_WDOG_RST_REQ ,Wdog reset request from CPU core0" "Not requested,Requested" else bitfld.long 0x00 5. " CORE0_WDOG_RST_REQ ,Wdog reset request from CPU core0" "Not requested,Requested" endif sif (cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 4. " IPU2_PASSED_RESET ,Interrupt generated to indicate that ipu2 passed software reset and is ready to be used" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 3. " OPEN_VG_PASSED_RESET ,Interrupt generated to indicate that open_vg passed software reset and is ready to be used" "No interrupt,Interrupt" sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 2. " IPU1_PASSED_RESET ,Interrupt generated to indicate that ipu passed software reset and is ready to be used" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 1. " VPU_PASSED_RESET ,Interrupt generated to indicate that vpu passed software reset and is ready to be used" "No interrupt,Interrupt" bitfld.long 0x00 0. " GPU_PASSED_RESET ,Interrupt generated to indicate that gpu passed software reset and is ready to be used" "No interrupt,Interrupt" else group.long 0x014++0x03 line.long 0x00 "SISR,SRC Interrupt Status Register" rbitfld.long 0x00 3. " OPEN_VG_PASSED_RESET ,Open_vg passed software reset and is ready to be used" "No interrupt,Interrupt" sif (cpu()!="IMX50"&&cpu()!="IMX502"&&cpu()!="IMX503"&&cpu()!="IMX507"&&cpu()!="IMX508") textline " " bitfld.long 0x00 2. " IPU_PASSED_RESET ,Ipu passed software reset and is ready to be used" "No interrupt,Interrupt" bitfld.long 0x00 1. " VPU_PASSED_RESET ,Vpu passed software reset and is ready to be used" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPU_PASSED_RESET ,Gpu passed software reset and is ready to be used" "No interrupt,Interrupt" endif endif group.long 0x018++0x03 line.long 0x00 "SIMR,SRC Interrupt Mask Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD") bitfld.long 0x00 4. " MASK_IPU2_PASSED_RESET ,Mask interrupt generation due to ipu2 passed reset" "Not masked,Masked" textline " " endif bitfld.long 0x00 3. " MASK_OPEN_VG_PASSED_RESET ,Mask interrupt generation due to open_vg passed reset" "Not masked,Masked" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 2. " MASK_IPU_PASSED_RESET ,Mask interrupt generation due to ipu passed reset" "Not masked,Masked" textline " " endif bitfld.long 0x00 1. " MASK_VPU_PASSED_RESET ,Mask interrupt generation due to vpu passed reset" "Not masked,Masked" textline " " bitfld.long 0x00 0. " MASK_GPU_PASSED_RESET ,Mask interrupt generation due to gpu passed reset" "Not masked,Masked" sif (cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538"&&cpu()!="IMX50"&&cpu()!="IMX502"&&cpu()!="IMX503"&&cpu()!="IMX507"&&cpu()!="IMX508") rgroup.long 0x1C++0x03 line.long 0x00 "SBMR2,SRC Boot Mode Register 2" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 27.--29. " TEST_MODE ,Test mode" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x00 24.--25. " BMOD ,Boot mode" "0,1,2,3" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 5.--7. " RESERVED_FUSES ,Reversed fuses" "0,1,2,3,4,5,6,7" endif textline " " bitfld.long 0x00 4. " BT_FUSE_SEL ,Boot fuse selection" "0,1" bitfld.long 0x00 3. " DIR_BT_DIS ,DIR_BT_DIS" "0,1" textline " " bitfld.long 0x00 0.--1. " SEC_CONFIG ,SEC_CONFIG" "0,1,2,3" group.long 0x20++0x1F line.long 0x0 "GPR1,SRC General Purpose Register 1" line.long 0x4 "GPR2,SRC General Purpose Register 2" line.long 0x8 "GPR3,SRC General Purpose Register 3" line.long 0xC "GPR4,SRC General Purpose Register 4" line.long 0x10 "GPR5,SRC General Purpose Register 5" line.long 0x14 "GPR6,SRC General Purpose Register 6" line.long 0x18 "GPR7,SRC General Purpose Register 7" line.long 0x1C "GPR8,SRC General Purpose Register 8" sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x44++0x03 line.long 0x00 "GPR10,SRC General Purpose Register 10" bitfld.long 0x00 30. " PERSIST_SECONDARY_BOOT ,Identifies which image must be used" "0,1" else rgroup.long 0x44++0x03 line.long 0x00 "GPR10,SRC General Purpose Register 10" sif (cpu()!="IMX6SOLO"||cpu()!="IMX6DUALLITE"||cpu()!="IMX6DUAL") bitfld.long 0x00 27. " CORE3_ERROR_STATUS ,Core 3 error status bit" "No error,Error" bitfld.long 0x00 26. " CORE2_ERROR_STATUS ,Core 2 error status bit" "No error,Error" textline " " endif bitfld.long 0x00 25. " CORE1_ERROR_STATUS ,Core 1 error status bit" "No error,Error" endif endif width 0x0B tree.end tree.open "SSI (Synchronous Serial Interface)" tree "SSI1" base ad:0x02028000 width 8. sif (cpu()=="IMX6SOLOLITE") if (((per.l((ad:0x02028000)+0x10))&0x01)==0x01) group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" else rgroup.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif else group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif hgroup.long 0x08++0x7 hide.long 0x00 "SRX0,Receive Data Register 0" in hide.long 0x04 "SRX1,Receive Data Register 1" in group.long 0x10++0x3 line.long 0x00 "SCR,SSI Control Register" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") bitfld.long 0x00 12. " SYNC_TX_FS ,TE latch" "Not latched,Latched" textline " " endif bitfld.long 0x0 11. " RFR_CLK_DIS ,Receive Frame Clock Disable" "No,Yes" bitfld.long 0x0 10. " TFR_CLK_DIS ,Transmit Frame Clock Disable" "No,Yes" textline " " bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "Low,High" bitfld.long 0x00 8. " TCH_EN ,Two Channel Operation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SYS_CLK_EN ,Network Clock Enable" "Disabled,Enabled" bitfld.long 0x00 5.--6. " I2S_MODE[1:0] ,I2S Mode Select" "Normal,I2S master,I2S slave,Normal" textline " " bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous" bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected" textline " " bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in elif (cpuis("IMX6*")) group.long 0x14++0x3 line.long 0x00 "SISR,SSI Interrupt Status Register" bitfld.long 0x00 24. " RFRC ,Receive Frame Complete" "Not reached,Reached" bitfld.long 0x00 23. " TFRC ,Transmit Frame Complete" "Not reached,Reached" bitfld.long 0x00 18. " CMDAU ,Command Address Register Updated" "Not updated,Updated" textline " " bitfld.long 0x00 17. " CMDDU ,Command Data Register Updated" "Not updated,Updated" bitfld.long 0x00 16. " RXT ,Receive Tag Updated" "Not updated,Updated" bitfld.long 0x00 15. " RDR1 ,Receive Data Ready 1" "No new data,New data" textline " " bitfld.long 0x00 14. " RDR0 ,Receive Data Ready 0" "No new data,New data" bitfld.long 0x00 13. " TDE1 ,Transmit Data Register Empty 1" "Not empty,Empty" bitfld.long 0x00 12. " TDE0 ,Transmit Data Register Empty 0" "Not empty,Empty" textline " " eventfld.long 0x00 11. " ROE1 ,Receiver Overrun Error 1" "No error,Error" eventfld.long 0x00 10. " ROE0 ,Receiver Overrun Error 0" "No error,Error" eventfld.long 0x00 9. " TUE1 ,Transmitter Underrun Error 1" "No error,Error" textline " " eventfld.long 0x00 8. " TUE0 ,Transmitter Underrun Error 0" "No error,Error" bitfld.long 0x00 7. " TFS ,Transmit Frame Sync" "Not occurred,Occurred" bitfld.long 0x00 6. " RFS ,Receive Frame Sync" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " TLS ,Transmit Last Time Slot" "No,Yes" bitfld.long 0x00 4. " RLS ,Receive Last Time Slot" "No,Yes" bitfld.long 0x00 3. " RFF1 ,Receive FIFO Full 1" "Not full,Full" textline " " bitfld.long 0x00 2. " RFF0 ,Receive FIFO Full 0" "Not full,Full" bitfld.long 0x00 1. " TFE1 ,Transmit FIFO Empty 1" "Not empty,Empty" bitfld.long 0x00 0. " TFE0 ,Transmit FIFO Empty 0" "Not empty,Empty" else hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in endif group.long 0x18++0x17 line.long 0x00 "SIER,SSI Interrupt Enable Register" bitfld.long 0x00 24. " RFRC_EN ,Receive Frame Complete" "Disabled,Enabled" bitfld.long 0x00 23. " TFRC_EN ,Transmit Frame Complete" "Disabled,Enabled" bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CMDAU_EN ,Command Address Register Updated" "Disabled,Enabled" bitfld.long 0x00 17. " CMDDU_EN ,Command Data Register Updated" "Disabled,Enabled" bitfld.long 0x00 16. " RXT_EN ,Receive Tag Updated" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RDR1_EN ,Receive Data Ready 1" "Disabled,Enabled" bitfld.long 0x00 14. " RDR0_EN ,Receive Data Ready 0" "Disabled,Enabled" bitfld.long 0x00 13. " TDE1_EN ,Transmit Data Register Empty 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " TDE0_EN ,Transmit Data Register Empty 0" "Disabled,Enabled" bitfld.long 0x00 11. " ROE1_EN ,Receiver Overrun Error 1" "Disabled,Enabled" bitfld.long 0x00 10. " ROE0_EN ,Receiver Overrun Error 0" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TUE1_EN ,Transmitter Underrun Error 1" "Disabled,Enabled" bitfld.long 0x00 8. " TUE0_EN ,Transmitter Underrun Error 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " TFS_EN ,Transmit Frame Sync Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RFS_EN ,Receive Frame Sync Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 4. " RLS_EN ,Receive Last Time Slot Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RFF1_EN ,Receive FIFO Full 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RFF0_EN ,Receive FIFO Full 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE1_EN ,Transmit FIFO Empty 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TFE0_EN ,Transmit FIFO Empty 0 Interrupt Enable" "Disabled,Enabled" line.long 0x04 "STCR,SSI Transmit Configuration Register" bitfld.long 0x04 9. " TXBIT0 ,Transmit Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled" bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal" bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal" bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge" bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "Active high,Active low" bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit" textline " " bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One before" line.long 0x08 "SRCR,SSI Receive Configuration Register" bitfld.long 0x8 10. " RXEXT ,Receive Data Extension" "Not extended,Extended" bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled" bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal" bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal" textline " " bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB first,LSB first" bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "Active high,Active low" textline " " bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit" bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "First bit,One before" line.long 0x0c "STCCR,SSI Transmit Clock Control Register" bitfld.long 0x0c 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x0c 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x0c 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x10 "SRCCR,SSI Receive Clock Control Register" bitfld.long 0x10 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x10 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x10 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x14 "SFCSR,SSI FIFO Control/Status Register" bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" textline " " bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 12.--15. " RFCNT0[3:0] ,Receive FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " TFCNT0[3:0] ,Transmit FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " RFWM0[3:0] ,Receive FIFO Full WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 0.--3. " TFWM0[3:0] ,Transmit FIFO Empty WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" sif (!cpuis("IMX6*")&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538"&&!cpuis("IMX50*")) group.long 0x30++0x7 line.long 0x00 "STR,SSI Test Register" bitfld.long 0x00 15. " TEST ,Test Mode" "No effect,Test Mode" bitfld.long 0x00 14. " RCK2TCK ,Receive Clock to Transmit Clock Loop Back" "No effect,Loop back" bitfld.long 0x00 13. " RFS2TFS ,Receive Frame to Transmit Frame Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 8.--12. " RXSTATE ,Receiver State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " TXD2RXD ,Transmit Data to Receive Data Loop Back" "No effect,Loop back" bitfld.long 0x00 6. " TCK2RCK ,Transmit Clock to Receive Clock Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 5. " TFS2RFS ,Transmit Frame to Receive Frame Loop Back" "No effect,Loop back" bitfld.long 0x00 0.--4. " TXSTATE ,Transmitter State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "SOR,SSI Option Register" bitfld.long 0x04 6. " CLKOFF ,Clock Off" "No effect,Off" bitfld.long 0x04 5. " RX_CLR ,Receiver Clear" "No effect,Flushed" bitfld.long 0x04 4. " TX_CLR ,Transmitter Clear" "No effect,Flushed" textline " " bitfld.long 0x04 3. " INIT ,Initialize" "No effect,Initialized" bitfld.long 0x04 1.--2. " WAIT ,Number wait states" "0,1,2,3" bitfld.long 0x04 0. " SYNRST ,Frame Sync Reset" "No reset,Reset" endif group.long 0x38++0x3 line.long 0x00 "SACNT,SSI AC97 Control Register" hexmask.long.byte 0x00 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider" bitfld.long 0x00 4. " WR ,Write Command" "Not attached,Attached" bitfld.long 0x00 3. " RD ,Read Command" "Not attached,Attached" textline " " bitfld.long 0x00 2. " TIF ,Tag in FIFO" "SATAG,Rx FIFO 0" bitfld.long 0x00 1. " FV ,Fixed/Variable Operation" "Fixed,Variable" bitfld.long 0x00 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in elif (cpuis("IMX6*")) group.long 0x3c++0x0B line.long 0x00 "SACADD,SSI AC97 Command Address Register" hexmask.long.tbyte 0x00 0.--18. 1. " SACADD ,AC97 Command Address" line.long 0x04 "SACDAT,SSI AC97 Command Data Register" hexmask.long.tbyte 0x04 0.--19. 1. " SACDAT ,AC97 Command Data" line.long 0x08 "SATAG,SSI AC97 Tag Register" hexmask.long.word 0x08 0.--15. 1. " SATAG ,AC97 Tag Value" else hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in endif textline " " group.long 0x48++0x07 line.long 0x00 "STMSK,SSI Transmit Time Slot Mask Register" bitfld.long 0x00 31. " STMSK ,Transmit Mask Bit 31" "0,1" bitfld.long 0x00 30. ",Transmit Mask Bit 30" "0,1" bitfld.long 0x00 29. ",Transmit Mask Bit 29" "0,1" bitfld.long 0x00 28. ",Transmit Mask Bit 28" "0,1" bitfld.long 0x00 27. ",Transmit Mask Bit 27" "0,1" bitfld.long 0x00 26. ",Transmit Mask Bit 26" "0,1" bitfld.long 0x00 25. ",Transmit Mask Bit 25" "0,1" bitfld.long 0x00 24. ",Transmit Mask Bit 24" "0,1" bitfld.long 0x00 23. ",Transmit Mask Bit 23" "0,1" bitfld.long 0x00 22. ",Transmit Mask Bit 22" "0,1" bitfld.long 0x00 21. ",Transmit Mask Bit 21" "0,1" bitfld.long 0x00 20. ",Transmit Mask Bit 20" "0,1" bitfld.long 0x00 19. ",Transmit Mask Bit 19" "0,1" bitfld.long 0x00 18. ",Transmit Mask Bit 18" "0,1" bitfld.long 0x00 17. ",Transmit Mask Bit 17" "0,1" bitfld.long 0x00 16. ",Transmit Mask Bit 16" "0,1" bitfld.long 0x00 15. ",Transmit Mask Bit 15" "0,1" bitfld.long 0x00 14. ",Transmit Mask Bit 14" "0,1" bitfld.long 0x00 13. ",Transmit Mask Bit 13" "0,1" bitfld.long 0x00 12. ",Transmit Mask Bit 12" "0,1" bitfld.long 0x00 11. ",Transmit Mask Bit 11" "0,1" bitfld.long 0x00 10. ",Transmit Mask Bit 10" "0,1" bitfld.long 0x00 9. ",Transmit Mask Bit 9" "0,1" bitfld.long 0x00 8. ",Transmit Mask Bit 8" "0,1" bitfld.long 0x00 7. ",Transmit Mask Bit 7" "0,1" bitfld.long 0x00 6. ",Transmit Mask Bit 6" "0,1" bitfld.long 0x00 5. ",Transmit Mask Bit 5" "0,1" bitfld.long 0x00 4. ",Transmit Mask Bit 4" "0,1" bitfld.long 0x00 3. ",Transmit Mask Bit 3" "0,1" bitfld.long 0x00 2. ",Transmit Mask Bit 2" "0,1" bitfld.long 0x00 1. ",Transmit Mask Bit 1" "0,1" bitfld.long 0x00 0. ",Transmit Mask Bit 0" "0,1" line.long 0x04 "SRMSK,SSI Receive Time Slot Mask Register" bitfld.long 0x04 31. " SRMSK ,Receive Mask Bit 31" "0,1" bitfld.long 0x04 30. ",Receive Mask Bit 30" "0,1" bitfld.long 0x04 29. ",Receive Mask Bit 29" "0,1" bitfld.long 0x04 28. ",Receive Mask Bit 28" "0,1" bitfld.long 0x04 27. ",Receive Mask Bit 27" "0,1" bitfld.long 0x04 26. ",Receive Mask Bit 26" "0,1" bitfld.long 0x04 25. ",Receive Mask Bit 25" "0,1" bitfld.long 0x04 24. ",Receive Mask Bit 24" "0,1" bitfld.long 0x04 23. ",Receive Mask Bit 23" "0,1" bitfld.long 0x04 22. ",Receive Mask Bit 22" "0,1" bitfld.long 0x04 21. ",Receive Mask Bit 21" "0,1" bitfld.long 0x04 20. ",Receive Mask Bit 20" "0,1" bitfld.long 0x04 19. ",Receive Mask Bit 19" "0,1" bitfld.long 0x04 18. ",Receive Mask Bit 18" "0,1" bitfld.long 0x04 17. ",Receive Mask Bit 17" "0,1" bitfld.long 0x04 16. ",Receive Mask Bit 16" "0,1" bitfld.long 0x04 15. ",Receive Mask Bit 15" "0,1" bitfld.long 0x04 14. ",Receive Mask Bit 14" "0,1" bitfld.long 0x04 13. ",Receive Mask Bit 13" "0,1" bitfld.long 0x04 12. ",Receive Mask Bit 12" "0,1" bitfld.long 0x04 11. ",Receive Mask Bit 11" "0,1" bitfld.long 0x04 10. ",Receive Mask Bit 10" "0,1" bitfld.long 0x04 9. ",Receive Mask Bit 9" "0,1" bitfld.long 0x04 8. ",Receive Mask Bit 8" "0,1" bitfld.long 0x04 7. ",Receive Mask Bit 7" "0,1" bitfld.long 0x04 6. ",Receive Mask Bit 6" "0,1" bitfld.long 0x04 5. ",Receive Mask Bit 5" "0,1" bitfld.long 0x04 4. ",Receive Mask Bit 4" "0,1" bitfld.long 0x04 3. ",Receive Mask Bit 3" "0,1" bitfld.long 0x04 2. ",Receive Mask Bit 2" "0,1" bitfld.long 0x04 1. ",Receive Mask Bit 1" "0,1" bitfld.long 0x04 0. ",Receive Mask Bit 0" "0,1" textline " " group.long 0x50++0x3 line.long 0x0 "SACCST,SSI AC97 Channel Status Register" setclrfld.long 0x0 9. 0x4 9. 0x8 9. " SACCST9_set/clr ,AC97 Channel Status 9" "Disabled,Enabled" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " SACCST8_set/clr ,AC97 Channel Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x0 7. 0x4 7. 0x8 7. " SACCST7_set/clr ,AC97 Channel Status 7" "Disabled,Enabled" setclrfld.long 0x0 6. 0x4 6. 0x8 6. " SACCST6_set/clr ,AC97 Channel Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x0 5. 0x4 5. 0x8 5. " SACCST5_set/clr ,AC97 Channel Status 5" "Disabled,Enabled" setclrfld.long 0x0 4. 0x4 4. 0x8 4. " SACCST4_set/clr ,AC97 Channel Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x0 3. 0x4 3. 0x8 3. " SACCST3_set/clr ,AC97 Channel Status 3" "Disabled,Enabled" setclrfld.long 0x0 2. 0x4 2. 0x8 2. " SACCST2_set/clr ,AC97 Channel Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x0 1. 0x4 1. 0x8 1. " SACCST1_set/clr ,AC97 Channel Status 1" "Disabled,Enabled" setclrfld.long 0x0 0. 0x4 0. 0x8 0. " SACCST0_set/clr ,AC97 Channel Status 0" "Disabled,Enabled" width 0xb tree.end tree "SSI2" base ad:0x0202C000 width 8. sif (cpu()=="IMX6SOLOLITE") if (((per.l((ad:0x0202C000)+0x10))&0x01)==0x01) group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" else rgroup.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif else group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif hgroup.long 0x08++0x7 hide.long 0x00 "SRX0,Receive Data Register 0" in hide.long 0x04 "SRX1,Receive Data Register 1" in group.long 0x10++0x3 line.long 0x00 "SCR,SSI Control Register" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") bitfld.long 0x00 12. " SYNC_TX_FS ,TE latch" "Not latched,Latched" textline " " endif bitfld.long 0x0 11. " RFR_CLK_DIS ,Receive Frame Clock Disable" "No,Yes" bitfld.long 0x0 10. " TFR_CLK_DIS ,Transmit Frame Clock Disable" "No,Yes" textline " " bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "Low,High" bitfld.long 0x00 8. " TCH_EN ,Two Channel Operation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SYS_CLK_EN ,Network Clock Enable" "Disabled,Enabled" bitfld.long 0x00 5.--6. " I2S_MODE[1:0] ,I2S Mode Select" "Normal,I2S master,I2S slave,Normal" textline " " bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous" bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected" textline " " bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in elif (cpuis("IMX6*")) group.long 0x14++0x3 line.long 0x00 "SISR,SSI Interrupt Status Register" bitfld.long 0x00 24. " RFRC ,Receive Frame Complete" "Not reached,Reached" bitfld.long 0x00 23. " TFRC ,Transmit Frame Complete" "Not reached,Reached" bitfld.long 0x00 18. " CMDAU ,Command Address Register Updated" "Not updated,Updated" textline " " bitfld.long 0x00 17. " CMDDU ,Command Data Register Updated" "Not updated,Updated" bitfld.long 0x00 16. " RXT ,Receive Tag Updated" "Not updated,Updated" bitfld.long 0x00 15. " RDR1 ,Receive Data Ready 1" "No new data,New data" textline " " bitfld.long 0x00 14. " RDR0 ,Receive Data Ready 0" "No new data,New data" bitfld.long 0x00 13. " TDE1 ,Transmit Data Register Empty 1" "Not empty,Empty" bitfld.long 0x00 12. " TDE0 ,Transmit Data Register Empty 0" "Not empty,Empty" textline " " eventfld.long 0x00 11. " ROE1 ,Receiver Overrun Error 1" "No error,Error" eventfld.long 0x00 10. " ROE0 ,Receiver Overrun Error 0" "No error,Error" eventfld.long 0x00 9. " TUE1 ,Transmitter Underrun Error 1" "No error,Error" textline " " eventfld.long 0x00 8. " TUE0 ,Transmitter Underrun Error 0" "No error,Error" bitfld.long 0x00 7. " TFS ,Transmit Frame Sync" "Not occurred,Occurred" bitfld.long 0x00 6. " RFS ,Receive Frame Sync" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " TLS ,Transmit Last Time Slot" "No,Yes" bitfld.long 0x00 4. " RLS ,Receive Last Time Slot" "No,Yes" bitfld.long 0x00 3. " RFF1 ,Receive FIFO Full 1" "Not full,Full" textline " " bitfld.long 0x00 2. " RFF0 ,Receive FIFO Full 0" "Not full,Full" bitfld.long 0x00 1. " TFE1 ,Transmit FIFO Empty 1" "Not empty,Empty" bitfld.long 0x00 0. " TFE0 ,Transmit FIFO Empty 0" "Not empty,Empty" else hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in endif group.long 0x18++0x17 line.long 0x00 "SIER,SSI Interrupt Enable Register" bitfld.long 0x00 24. " RFRC_EN ,Receive Frame Complete" "Disabled,Enabled" bitfld.long 0x00 23. " TFRC_EN ,Transmit Frame Complete" "Disabled,Enabled" bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CMDAU_EN ,Command Address Register Updated" "Disabled,Enabled" bitfld.long 0x00 17. " CMDDU_EN ,Command Data Register Updated" "Disabled,Enabled" bitfld.long 0x00 16. " RXT_EN ,Receive Tag Updated" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RDR1_EN ,Receive Data Ready 1" "Disabled,Enabled" bitfld.long 0x00 14. " RDR0_EN ,Receive Data Ready 0" "Disabled,Enabled" bitfld.long 0x00 13. " TDE1_EN ,Transmit Data Register Empty 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " TDE0_EN ,Transmit Data Register Empty 0" "Disabled,Enabled" bitfld.long 0x00 11. " ROE1_EN ,Receiver Overrun Error 1" "Disabled,Enabled" bitfld.long 0x00 10. " ROE0_EN ,Receiver Overrun Error 0" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TUE1_EN ,Transmitter Underrun Error 1" "Disabled,Enabled" bitfld.long 0x00 8. " TUE0_EN ,Transmitter Underrun Error 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " TFS_EN ,Transmit Frame Sync Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RFS_EN ,Receive Frame Sync Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 4. " RLS_EN ,Receive Last Time Slot Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RFF1_EN ,Receive FIFO Full 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RFF0_EN ,Receive FIFO Full 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE1_EN ,Transmit FIFO Empty 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TFE0_EN ,Transmit FIFO Empty 0 Interrupt Enable" "Disabled,Enabled" line.long 0x04 "STCR,SSI Transmit Configuration Register" bitfld.long 0x04 9. " TXBIT0 ,Transmit Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled" bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal" bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal" bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge" bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "Active high,Active low" bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit" textline " " bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One before" line.long 0x08 "SRCR,SSI Receive Configuration Register" bitfld.long 0x8 10. " RXEXT ,Receive Data Extension" "Not extended,Extended" bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled" bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal" bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal" textline " " bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB first,LSB first" bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "Active high,Active low" textline " " bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit" bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "First bit,One before" line.long 0x0c "STCCR,SSI Transmit Clock Control Register" bitfld.long 0x0c 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x0c 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x0c 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x10 "SRCCR,SSI Receive Clock Control Register" bitfld.long 0x10 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x10 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x10 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x14 "SFCSR,SSI FIFO Control/Status Register" bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" textline " " bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 12.--15. " RFCNT0[3:0] ,Receive FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " TFCNT0[3:0] ,Transmit FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " RFWM0[3:0] ,Receive FIFO Full WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 0.--3. " TFWM0[3:0] ,Transmit FIFO Empty WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" sif (!cpuis("IMX6*")&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538"&&!cpuis("IMX50*")) group.long 0x30++0x7 line.long 0x00 "STR,SSI Test Register" bitfld.long 0x00 15. " TEST ,Test Mode" "No effect,Test Mode" bitfld.long 0x00 14. " RCK2TCK ,Receive Clock to Transmit Clock Loop Back" "No effect,Loop back" bitfld.long 0x00 13. " RFS2TFS ,Receive Frame to Transmit Frame Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 8.--12. " RXSTATE ,Receiver State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " TXD2RXD ,Transmit Data to Receive Data Loop Back" "No effect,Loop back" bitfld.long 0x00 6. " TCK2RCK ,Transmit Clock to Receive Clock Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 5. " TFS2RFS ,Transmit Frame to Receive Frame Loop Back" "No effect,Loop back" bitfld.long 0x00 0.--4. " TXSTATE ,Transmitter State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "SOR,SSI Option Register" bitfld.long 0x04 6. " CLKOFF ,Clock Off" "No effect,Off" bitfld.long 0x04 5. " RX_CLR ,Receiver Clear" "No effect,Flushed" bitfld.long 0x04 4. " TX_CLR ,Transmitter Clear" "No effect,Flushed" textline " " bitfld.long 0x04 3. " INIT ,Initialize" "No effect,Initialized" bitfld.long 0x04 1.--2. " WAIT ,Number wait states" "0,1,2,3" bitfld.long 0x04 0. " SYNRST ,Frame Sync Reset" "No reset,Reset" endif group.long 0x38++0x3 line.long 0x00 "SACNT,SSI AC97 Control Register" hexmask.long.byte 0x00 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider" bitfld.long 0x00 4. " WR ,Write Command" "Not attached,Attached" bitfld.long 0x00 3. " RD ,Read Command" "Not attached,Attached" textline " " bitfld.long 0x00 2. " TIF ,Tag in FIFO" "SATAG,Rx FIFO 0" bitfld.long 0x00 1. " FV ,Fixed/Variable Operation" "Fixed,Variable" bitfld.long 0x00 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in elif (cpuis("IMX6*")) group.long 0x3c++0x0B line.long 0x00 "SACADD,SSI AC97 Command Address Register" hexmask.long.tbyte 0x00 0.--18. 1. " SACADD ,AC97 Command Address" line.long 0x04 "SACDAT,SSI AC97 Command Data Register" hexmask.long.tbyte 0x04 0.--19. 1. " SACDAT ,AC97 Command Data" line.long 0x08 "SATAG,SSI AC97 Tag Register" hexmask.long.word 0x08 0.--15. 1. " SATAG ,AC97 Tag Value" else hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in endif textline " " group.long 0x48++0x07 line.long 0x00 "STMSK,SSI Transmit Time Slot Mask Register" bitfld.long 0x00 31. " STMSK ,Transmit Mask Bit 31" "0,1" bitfld.long 0x00 30. ",Transmit Mask Bit 30" "0,1" bitfld.long 0x00 29. ",Transmit Mask Bit 29" "0,1" bitfld.long 0x00 28. ",Transmit Mask Bit 28" "0,1" bitfld.long 0x00 27. ",Transmit Mask Bit 27" "0,1" bitfld.long 0x00 26. ",Transmit Mask Bit 26" "0,1" bitfld.long 0x00 25. ",Transmit Mask Bit 25" "0,1" bitfld.long 0x00 24. ",Transmit Mask Bit 24" "0,1" bitfld.long 0x00 23. ",Transmit Mask Bit 23" "0,1" bitfld.long 0x00 22. ",Transmit Mask Bit 22" "0,1" bitfld.long 0x00 21. ",Transmit Mask Bit 21" "0,1" bitfld.long 0x00 20. ",Transmit Mask Bit 20" "0,1" bitfld.long 0x00 19. ",Transmit Mask Bit 19" "0,1" bitfld.long 0x00 18. ",Transmit Mask Bit 18" "0,1" bitfld.long 0x00 17. ",Transmit Mask Bit 17" "0,1" bitfld.long 0x00 16. ",Transmit Mask Bit 16" "0,1" bitfld.long 0x00 15. ",Transmit Mask Bit 15" "0,1" bitfld.long 0x00 14. ",Transmit Mask Bit 14" "0,1" bitfld.long 0x00 13. ",Transmit Mask Bit 13" "0,1" bitfld.long 0x00 12. ",Transmit Mask Bit 12" "0,1" bitfld.long 0x00 11. ",Transmit Mask Bit 11" "0,1" bitfld.long 0x00 10. ",Transmit Mask Bit 10" "0,1" bitfld.long 0x00 9. ",Transmit Mask Bit 9" "0,1" bitfld.long 0x00 8. ",Transmit Mask Bit 8" "0,1" bitfld.long 0x00 7. ",Transmit Mask Bit 7" "0,1" bitfld.long 0x00 6. ",Transmit Mask Bit 6" "0,1" bitfld.long 0x00 5. ",Transmit Mask Bit 5" "0,1" bitfld.long 0x00 4. ",Transmit Mask Bit 4" "0,1" bitfld.long 0x00 3. ",Transmit Mask Bit 3" "0,1" bitfld.long 0x00 2. ",Transmit Mask Bit 2" "0,1" bitfld.long 0x00 1. ",Transmit Mask Bit 1" "0,1" bitfld.long 0x00 0. ",Transmit Mask Bit 0" "0,1" line.long 0x04 "SRMSK,SSI Receive Time Slot Mask Register" bitfld.long 0x04 31. " SRMSK ,Receive Mask Bit 31" "0,1" bitfld.long 0x04 30. ",Receive Mask Bit 30" "0,1" bitfld.long 0x04 29. ",Receive Mask Bit 29" "0,1" bitfld.long 0x04 28. ",Receive Mask Bit 28" "0,1" bitfld.long 0x04 27. ",Receive Mask Bit 27" "0,1" bitfld.long 0x04 26. ",Receive Mask Bit 26" "0,1" bitfld.long 0x04 25. ",Receive Mask Bit 25" "0,1" bitfld.long 0x04 24. ",Receive Mask Bit 24" "0,1" bitfld.long 0x04 23. ",Receive Mask Bit 23" "0,1" bitfld.long 0x04 22. ",Receive Mask Bit 22" "0,1" bitfld.long 0x04 21. ",Receive Mask Bit 21" "0,1" bitfld.long 0x04 20. ",Receive Mask Bit 20" "0,1" bitfld.long 0x04 19. ",Receive Mask Bit 19" "0,1" bitfld.long 0x04 18. ",Receive Mask Bit 18" "0,1" bitfld.long 0x04 17. ",Receive Mask Bit 17" "0,1" bitfld.long 0x04 16. ",Receive Mask Bit 16" "0,1" bitfld.long 0x04 15. ",Receive Mask Bit 15" "0,1" bitfld.long 0x04 14. ",Receive Mask Bit 14" "0,1" bitfld.long 0x04 13. ",Receive Mask Bit 13" "0,1" bitfld.long 0x04 12. ",Receive Mask Bit 12" "0,1" bitfld.long 0x04 11. ",Receive Mask Bit 11" "0,1" bitfld.long 0x04 10. ",Receive Mask Bit 10" "0,1" bitfld.long 0x04 9. ",Receive Mask Bit 9" "0,1" bitfld.long 0x04 8. ",Receive Mask Bit 8" "0,1" bitfld.long 0x04 7. ",Receive Mask Bit 7" "0,1" bitfld.long 0x04 6. ",Receive Mask Bit 6" "0,1" bitfld.long 0x04 5. ",Receive Mask Bit 5" "0,1" bitfld.long 0x04 4. ",Receive Mask Bit 4" "0,1" bitfld.long 0x04 3. ",Receive Mask Bit 3" "0,1" bitfld.long 0x04 2. ",Receive Mask Bit 2" "0,1" bitfld.long 0x04 1. ",Receive Mask Bit 1" "0,1" bitfld.long 0x04 0. ",Receive Mask Bit 0" "0,1" textline " " group.long 0x50++0x3 line.long 0x0 "SACCST,SSI AC97 Channel Status Register" setclrfld.long 0x0 9. 0x4 9. 0x8 9. " SACCST9_set/clr ,AC97 Channel Status 9" "Disabled,Enabled" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " SACCST8_set/clr ,AC97 Channel Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x0 7. 0x4 7. 0x8 7. " SACCST7_set/clr ,AC97 Channel Status 7" "Disabled,Enabled" setclrfld.long 0x0 6. 0x4 6. 0x8 6. " SACCST6_set/clr ,AC97 Channel Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x0 5. 0x4 5. 0x8 5. " SACCST5_set/clr ,AC97 Channel Status 5" "Disabled,Enabled" setclrfld.long 0x0 4. 0x4 4. 0x8 4. " SACCST4_set/clr ,AC97 Channel Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x0 3. 0x4 3. 0x8 3. " SACCST3_set/clr ,AC97 Channel Status 3" "Disabled,Enabled" setclrfld.long 0x0 2. 0x4 2. 0x8 2. " SACCST2_set/clr ,AC97 Channel Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x0 1. 0x4 1. 0x8 1. " SACCST1_set/clr ,AC97 Channel Status 1" "Disabled,Enabled" setclrfld.long 0x0 0. 0x4 0. 0x8 0. " SACCST0_set/clr ,AC97 Channel Status 0" "Disabled,Enabled" width 0xb tree.end tree "SSI3" base ad:0x02030000 width 8. sif (cpu()=="IMX6SOLOLITE") if (((per.l((ad:0x02030000)+0x10))&0x01)==0x01) group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" else rgroup.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif else group.long 0x00++0x7 line.long 0x00 "STX0,Transmit Data Register 0" line.long 0x04 "STX1,Transmit Data Register 1" endif hgroup.long 0x08++0x7 hide.long 0x00 "SRX0,Receive Data Register 0" in hide.long 0x04 "SRX1,Receive Data Register 1" in group.long 0x10++0x3 line.long 0x00 "SCR,SSI Control Register" sif (cpuis("IMX6*")||cpu()=="IMX53"||cpu()=="IMX534"||cpu()=="IMX535"||cpu()=="IMX536"||cpu()=="IMX537"||cpu()=="IMX538"||cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508") bitfld.long 0x00 12. " SYNC_TX_FS ,TE latch" "Not latched,Latched" textline " " endif bitfld.long 0x0 11. " RFR_CLK_DIS ,Receive Frame Clock Disable" "No,Yes" bitfld.long 0x0 10. " TFR_CLK_DIS ,Transmit Frame Clock Disable" "No,Yes" textline " " bitfld.long 0x00 9. " CLK_IST ,Clock Idle State" "Low,High" bitfld.long 0x00 8. " TCH_EN ,Two Channel Operation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SYS_CLK_EN ,Network Clock Enable" "Disabled,Enabled" bitfld.long 0x00 5.--6. " I2S_MODE[1:0] ,I2S Mode Select" "Normal,I2S master,I2S slave,Normal" textline " " bitfld.long 0x00 4. " SYN ,Synchronous Mode" "Asynchronous,Synchronous" bitfld.long 0x00 3. " NET ,Network Mode" "Not selected,Selected" textline " " bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SSIEN ,SSI Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in elif (cpuis("IMX6*")) group.long 0x14++0x3 line.long 0x00 "SISR,SSI Interrupt Status Register" bitfld.long 0x00 24. " RFRC ,Receive Frame Complete" "Not reached,Reached" bitfld.long 0x00 23. " TFRC ,Transmit Frame Complete" "Not reached,Reached" bitfld.long 0x00 18. " CMDAU ,Command Address Register Updated" "Not updated,Updated" textline " " bitfld.long 0x00 17. " CMDDU ,Command Data Register Updated" "Not updated,Updated" bitfld.long 0x00 16. " RXT ,Receive Tag Updated" "Not updated,Updated" bitfld.long 0x00 15. " RDR1 ,Receive Data Ready 1" "No new data,New data" textline " " bitfld.long 0x00 14. " RDR0 ,Receive Data Ready 0" "No new data,New data" bitfld.long 0x00 13. " TDE1 ,Transmit Data Register Empty 1" "Not empty,Empty" bitfld.long 0x00 12. " TDE0 ,Transmit Data Register Empty 0" "Not empty,Empty" textline " " eventfld.long 0x00 11. " ROE1 ,Receiver Overrun Error 1" "No error,Error" eventfld.long 0x00 10. " ROE0 ,Receiver Overrun Error 0" "No error,Error" eventfld.long 0x00 9. " TUE1 ,Transmitter Underrun Error 1" "No error,Error" textline " " eventfld.long 0x00 8. " TUE0 ,Transmitter Underrun Error 0" "No error,Error" bitfld.long 0x00 7. " TFS ,Transmit Frame Sync" "Not occurred,Occurred" bitfld.long 0x00 6. " RFS ,Receive Frame Sync" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " TLS ,Transmit Last Time Slot" "No,Yes" bitfld.long 0x00 4. " RLS ,Receive Last Time Slot" "No,Yes" bitfld.long 0x00 3. " RFF1 ,Receive FIFO Full 1" "Not full,Full" textline " " bitfld.long 0x00 2. " RFF0 ,Receive FIFO Full 0" "Not full,Full" bitfld.long 0x00 1. " TFE1 ,Transmit FIFO Empty 1" "Not empty,Empty" bitfld.long 0x00 0. " TFE0 ,Transmit FIFO Empty 0" "Not empty,Empty" else hgroup.long 0x14++0x3 hide.long 0x00 "SISR,SSI Interrupt Status Register" in endif group.long 0x18++0x17 line.long 0x00 "SIER,SSI Interrupt Enable Register" bitfld.long 0x00 24. " RFRC_EN ,Receive Frame Complete" "Disabled,Enabled" bitfld.long 0x00 23. " TFRC_EN ,Transmit Frame Complete" "Disabled,Enabled" bitfld.long 0x00 22. " RDMAE ,Receive DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x00 19. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CMDAU_EN ,Command Address Register Updated" "Disabled,Enabled" bitfld.long 0x00 17. " CMDDU_EN ,Command Data Register Updated" "Disabled,Enabled" bitfld.long 0x00 16. " RXT_EN ,Receive Tag Updated" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RDR1_EN ,Receive Data Ready 1" "Disabled,Enabled" bitfld.long 0x00 14. " RDR0_EN ,Receive Data Ready 0" "Disabled,Enabled" bitfld.long 0x00 13. " TDE1_EN ,Transmit Data Register Empty 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " TDE0_EN ,Transmit Data Register Empty 0" "Disabled,Enabled" bitfld.long 0x00 11. " ROE1_EN ,Receiver Overrun Error 1" "Disabled,Enabled" bitfld.long 0x00 10. " ROE0_EN ,Receiver Overrun Error 0" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TUE1_EN ,Transmitter Underrun Error 1" "Disabled,Enabled" bitfld.long 0x00 8. " TUE0_EN ,Transmitter Underrun Error 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " TFS_EN ,Transmit Frame Sync Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RFS_EN ,Receive Frame Sync Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 5. " TLS_EN ,Transmit Last Time Slot Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 4. " RLS_EN ,Receive Last Time Slot Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RFF1_EN ,Receive FIFO Full 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RFF0_EN ,Receive FIFO Full 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE1_EN ,Transmit FIFO Empty 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TFE0_EN ,Transmit FIFO Empty 0 Interrupt Enable" "Disabled,Enabled" line.long 0x04 "STCR,SSI Transmit Configuration Register" bitfld.long 0x04 9. " TXBIT0 ,Transmit Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x04 8. " TFEN1 ,Transmit FIFO Enable 1" "Disabled,Enabled" bitfld.long 0x04 7. " TFEN0 ,Transmit FIFO Enable 0" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " TFDIR ,Transmit Frame Direction" "External,Internal" bitfld.long 0x04 5. " TXDIR ,Transmit Clock Direction" "External,Internal" bitfld.long 0x04 4. " TSHFD ,Transmit Shift Direction" "MSB first,LSB first" textline " " bitfld.long 0x04 3. " TSCKP ,Transmit Clock Polarity" "Rising edge,Falling edge" bitfld.long 0x04 2. " TFSI ,Transmit Frame Sync Invert" "Active high,Active low" bitfld.long 0x04 1. " TFSL ,Transmit Frame Sync Length" "One-word,One-clock-bit" textline " " bitfld.long 0x04 0. " TEFS ,Transmit Early Frame Sync" "First bit,One before" line.long 0x08 "SRCR,SSI Receive Configuration Register" bitfld.long 0x8 10. " RXEXT ,Receive Data Extension" "Not extended,Extended" bitfld.long 0x08 9. " RXBIT0 ,Receive Bit 0" "Bit 31|15,Bit 0" bitfld.long 0x08 8. " RFEN1 ,Receive FIFO Enable 1" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " RFEN0 ,Receive FIFO Enable 0" "Disabled,Enabled" bitfld.long 0x08 6. " RFDIR ,Receive Frame Direction" "External,Internal" bitfld.long 0x08 5. " RXDIR ,Receive Clock Direction" "External,Internal" textline " " bitfld.long 0x08 4. " RSHFD ,Receive Shift Direction" "MSB first,LSB first" bitfld.long 0x08 3. " RSCKP ,Receive Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x08 2. " RFSI ,Receive Frame Sync Invert" "Active high,Active low" textline " " bitfld.long 0x08 1. " RFSL ,Receive Frame Sync Length" "One-word,One-clock-bit" bitfld.long 0x08 0. " REFS ,Receive Early Frame Sync" "First bit,One before" line.long 0x0c "STCCR,SSI Transmit Clock Control Register" bitfld.long 0x0c 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x0c 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x0C 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x0c 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x0c 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x10 "SRCCR,SSI Receive Clock Control Register" bitfld.long 0x10 18. " DIV2 ,Divide By 2" "Bypassed,Div by 2" bitfld.long 0x10 17. " PSR ,Prescaler Range" "Bypassed,Div by 8" sif (cpu()=="IMX50"||cpu()=="IMX502"||cpu()=="IMX503"||cpu()=="IMX507"||cpu()=="IMX508"||cpu()=="IMX6SOLOLITE") bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "-,-,-,8,10,12,-,16,18,20,22,24,-,?..." else bitfld.long 0x10 13.--16. " WL[3:0] ,Word Length Control" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" endif textline " " bitfld.long 0x10 8.--12. " DC[4:0] ,Frame Rate Divider Control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" hexmask.long.byte 0x10 0.--7. 1. " PM[7:0] ,Prescaler Modulus Select" line.long 0x14 "SFCSR,SSI FIFO Control/Status Register" bitfld.long 0x14 28.--31. " RFCNT1[3:0] ,Receive FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 24.--27. " TFCNT1[3:0] ,Transmit FIFO Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 20.--23. " RFWM1[3:0] ,Receive FIFO Full WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" textline " " bitfld.long 0x14 16.--19. " TFWM1[3:0] ,Transmit FIFO Empty WaterMark 1" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 12.--15. " RFCNT0[3:0] ,Receive FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. " TFCNT0[3:0] ,Transmit FIFO Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 4.--7. " RFWM0[3:0] ,Receive FIFO Full WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" bitfld.long 0x14 0.--3. " TFWM0[3:0] ,Transmit FIFO Empty WaterMark 0" ",>=1,>=2,>=3,>=4,>=5,>=6,>=7,>=8,>=9,>=10,>=11,>=12,>=13,>=14,=15" sif (!cpuis("IMX6*")&&cpu()!="IMX53"&&cpu()!="IMX534"&&cpu()!="IMX535"&&cpu()!="IMX536"&&cpu()!="IMX537"&&cpu()!="IMX538"&&!cpuis("IMX50*")) group.long 0x30++0x7 line.long 0x00 "STR,SSI Test Register" bitfld.long 0x00 15. " TEST ,Test Mode" "No effect,Test Mode" bitfld.long 0x00 14. " RCK2TCK ,Receive Clock to Transmit Clock Loop Back" "No effect,Loop back" bitfld.long 0x00 13. " RFS2TFS ,Receive Frame to Transmit Frame Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 8.--12. " RXSTATE ,Receiver State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " TXD2RXD ,Transmit Data to Receive Data Loop Back" "No effect,Loop back" bitfld.long 0x00 6. " TCK2RCK ,Transmit Clock to Receive Clock Loop Back" "No effect,Loop back" textline " " bitfld.long 0x00 5. " TFS2RFS ,Transmit Frame to Receive Frame Loop Back" "No effect,Loop back" bitfld.long 0x00 0.--4. " TXSTATE ,Transmitter State Machine Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "SOR,SSI Option Register" bitfld.long 0x04 6. " CLKOFF ,Clock Off" "No effect,Off" bitfld.long 0x04 5. " RX_CLR ,Receiver Clear" "No effect,Flushed" bitfld.long 0x04 4. " TX_CLR ,Transmitter Clear" "No effect,Flushed" textline " " bitfld.long 0x04 3. " INIT ,Initialize" "No effect,Initialized" bitfld.long 0x04 1.--2. " WAIT ,Number wait states" "0,1,2,3" bitfld.long 0x04 0. " SYNRST ,Frame Sync Reset" "No reset,Reset" endif group.long 0x38++0x3 line.long 0x00 "SACNT,SSI AC97 Control Register" hexmask.long.byte 0x00 5.--10. 1. " FRDIV[5:0] ,Frame Rate Divider" bitfld.long 0x00 4. " WR ,Write Command" "Not attached,Attached" bitfld.long 0x00 3. " RD ,Read Command" "Not attached,Attached" textline " " bitfld.long 0x00 2. " TIF ,Tag in FIFO" "SATAG,Rx FIFO 0" bitfld.long 0x00 1. " FV ,Fixed/Variable Operation" "Fixed,Variable" bitfld.long 0x00 0. " AC97EN ,AC97 Mode Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in elif (cpuis("IMX6*")) group.long 0x3c++0x0B line.long 0x00 "SACADD,SSI AC97 Command Address Register" hexmask.long.tbyte 0x00 0.--18. 1. " SACADD ,AC97 Command Address" line.long 0x04 "SACDAT,SSI AC97 Command Data Register" hexmask.long.tbyte 0x04 0.--19. 1. " SACDAT ,AC97 Command Data" line.long 0x08 "SATAG,SSI AC97 Tag Register" hexmask.long.word 0x08 0.--15. 1. " SATAG ,AC97 Tag Value" else hgroup.long 0x3c++0x0B hide.long 0x00 "SACADD,SSI AC97 Command Address Register" in hide.long 0x04 "SACDAT,SSI AC97 Command Data Register" in hide.long 0x08 "SATAG,SSI AC97 Tag Register" in endif textline " " group.long 0x48++0x07 line.long 0x00 "STMSK,SSI Transmit Time Slot Mask Register" bitfld.long 0x00 31. " STMSK ,Transmit Mask Bit 31" "0,1" bitfld.long 0x00 30. ",Transmit Mask Bit 30" "0,1" bitfld.long 0x00 29. ",Transmit Mask Bit 29" "0,1" bitfld.long 0x00 28. ",Transmit Mask Bit 28" "0,1" bitfld.long 0x00 27. ",Transmit Mask Bit 27" "0,1" bitfld.long 0x00 26. ",Transmit Mask Bit 26" "0,1" bitfld.long 0x00 25. ",Transmit Mask Bit 25" "0,1" bitfld.long 0x00 24. ",Transmit Mask Bit 24" "0,1" bitfld.long 0x00 23. ",Transmit Mask Bit 23" "0,1" bitfld.long 0x00 22. ",Transmit Mask Bit 22" "0,1" bitfld.long 0x00 21. ",Transmit Mask Bit 21" "0,1" bitfld.long 0x00 20. ",Transmit Mask Bit 20" "0,1" bitfld.long 0x00 19. ",Transmit Mask Bit 19" "0,1" bitfld.long 0x00 18. ",Transmit Mask Bit 18" "0,1" bitfld.long 0x00 17. ",Transmit Mask Bit 17" "0,1" bitfld.long 0x00 16. ",Transmit Mask Bit 16" "0,1" bitfld.long 0x00 15. ",Transmit Mask Bit 15" "0,1" bitfld.long 0x00 14. ",Transmit Mask Bit 14" "0,1" bitfld.long 0x00 13. ",Transmit Mask Bit 13" "0,1" bitfld.long 0x00 12. ",Transmit Mask Bit 12" "0,1" bitfld.long 0x00 11. ",Transmit Mask Bit 11" "0,1" bitfld.long 0x00 10. ",Transmit Mask Bit 10" "0,1" bitfld.long 0x00 9. ",Transmit Mask Bit 9" "0,1" bitfld.long 0x00 8. ",Transmit Mask Bit 8" "0,1" bitfld.long 0x00 7. ",Transmit Mask Bit 7" "0,1" bitfld.long 0x00 6. ",Transmit Mask Bit 6" "0,1" bitfld.long 0x00 5. ",Transmit Mask Bit 5" "0,1" bitfld.long 0x00 4. ",Transmit Mask Bit 4" "0,1" bitfld.long 0x00 3. ",Transmit Mask Bit 3" "0,1" bitfld.long 0x00 2. ",Transmit Mask Bit 2" "0,1" bitfld.long 0x00 1. ",Transmit Mask Bit 1" "0,1" bitfld.long 0x00 0. ",Transmit Mask Bit 0" "0,1" line.long 0x04 "SRMSK,SSI Receive Time Slot Mask Register" bitfld.long 0x04 31. " SRMSK ,Receive Mask Bit 31" "0,1" bitfld.long 0x04 30. ",Receive Mask Bit 30" "0,1" bitfld.long 0x04 29. ",Receive Mask Bit 29" "0,1" bitfld.long 0x04 28. ",Receive Mask Bit 28" "0,1" bitfld.long 0x04 27. ",Receive Mask Bit 27" "0,1" bitfld.long 0x04 26. ",Receive Mask Bit 26" "0,1" bitfld.long 0x04 25. ",Receive Mask Bit 25" "0,1" bitfld.long 0x04 24. ",Receive Mask Bit 24" "0,1" bitfld.long 0x04 23. ",Receive Mask Bit 23" "0,1" bitfld.long 0x04 22. ",Receive Mask Bit 22" "0,1" bitfld.long 0x04 21. ",Receive Mask Bit 21" "0,1" bitfld.long 0x04 20. ",Receive Mask Bit 20" "0,1" bitfld.long 0x04 19. ",Receive Mask Bit 19" "0,1" bitfld.long 0x04 18. ",Receive Mask Bit 18" "0,1" bitfld.long 0x04 17. ",Receive Mask Bit 17" "0,1" bitfld.long 0x04 16. ",Receive Mask Bit 16" "0,1" bitfld.long 0x04 15. ",Receive Mask Bit 15" "0,1" bitfld.long 0x04 14. ",Receive Mask Bit 14" "0,1" bitfld.long 0x04 13. ",Receive Mask Bit 13" "0,1" bitfld.long 0x04 12. ",Receive Mask Bit 12" "0,1" bitfld.long 0x04 11. ",Receive Mask Bit 11" "0,1" bitfld.long 0x04 10. ",Receive Mask Bit 10" "0,1" bitfld.long 0x04 9. ",Receive Mask Bit 9" "0,1" bitfld.long 0x04 8. ",Receive Mask Bit 8" "0,1" bitfld.long 0x04 7. ",Receive Mask Bit 7" "0,1" bitfld.long 0x04 6. ",Receive Mask Bit 6" "0,1" bitfld.long 0x04 5. ",Receive Mask Bit 5" "0,1" bitfld.long 0x04 4. ",Receive Mask Bit 4" "0,1" bitfld.long 0x04 3. ",Receive Mask Bit 3" "0,1" bitfld.long 0x04 2. ",Receive Mask Bit 2" "0,1" bitfld.long 0x04 1. ",Receive Mask Bit 1" "0,1" bitfld.long 0x04 0. ",Receive Mask Bit 0" "0,1" textline " " group.long 0x50++0x3 line.long 0x0 "SACCST,SSI AC97 Channel Status Register" setclrfld.long 0x0 9. 0x4 9. 0x8 9. " SACCST9_set/clr ,AC97 Channel Status 9" "Disabled,Enabled" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " SACCST8_set/clr ,AC97 Channel Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x0 7. 0x4 7. 0x8 7. " SACCST7_set/clr ,AC97 Channel Status 7" "Disabled,Enabled" setclrfld.long 0x0 6. 0x4 6. 0x8 6. " SACCST6_set/clr ,AC97 Channel Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x0 5. 0x4 5. 0x8 5. " SACCST5_set/clr ,AC97 Channel Status 5" "Disabled,Enabled" setclrfld.long 0x0 4. 0x4 4. 0x8 4. " SACCST4_set/clr ,AC97 Channel Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x0 3. 0x4 3. 0x8 3. " SACCST3_set/clr ,AC97 Channel Status 3" "Disabled,Enabled" setclrfld.long 0x0 2. 0x4 2. 0x8 2. " SACCST2_set/clr ,AC97 Channel Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x0 1. 0x4 1. 0x8 1. " SACCST1_set/clr ,AC97 Channel Status 1" "Disabled,Enabled" setclrfld.long 0x0 0. 0x4 0. 0x8 0. " SACCST0_set/clr ,AC97 Channel Status 0" "Disabled,Enabled" width 0xb tree.end tree.end tree "TEMPMON (Temperature Monitor)" base ad:0x020C8180 width 16. group.long 0x00++0x1F line.long 0x00 "TEMPSENSE0,Tempsensor Control Register 0" hexmask.long.word 0x00 20.--31. 1. " ALARM_VALUE ,Temperature count" hexmask.long.word 0x00 8.--19. 1. " TEMP_CNT ,Last measured temperature" rbitfld.long 0x00 2. " FINISHED ,Latest temp valid" "Invalid,Valid" newline bitfld.long 0x00 1. " MEASURE_TEMP ,Starts the measurement process" "Stop,Start" bitfld.long 0x00 0. " POWER_DOWN ,Power down the temperature sensor" "Power up,Power down" line.long 0x04 "TEMPSENSE0_SET, Tempsensor Control Set Register 0" hexmask.long.word 0x04 20.--31. 1. " ALARM_VALUE ,Temperature count set" hexmask.long.word 0x04 8.--19. 1. " TEMP_CNT ,Last measured temperature set" rbitfld.long 0x04 2. " FINISHED ,Latest temp valid set" "No effect,Set" newline bitfld.long 0x04 1. " MEASURE_TEMP ,Starts the measurement process set" "No effect,Set" bitfld.long 0x04 0. " POWER_DOWN ,Power down the temperature sensor set" "No effect,Set" line.long 0x08 "TEMPSENSE0_CLR, Tempsensor Control Clear Register 0" hexmask.long.word 0x08 20.--31. 1. " ALARM_VALUE ,Temperature count clear" hexmask.long.word 0x08 8.--19. 1. " TEMP_CNT ,Last measured temperature clear" rbitfld.long 0x08 2. " FINISHED ,Latest temp valid clear" "No effect,Cleared" newline bitfld.long 0x08 1. " MEASURE_TEMP ,Starts the measurement process clear" "No effect,Cleared" bitfld.long 0x08 0. " POWER_DOWN ,Power down the temperature sensor clear" "No effect,Cleared" line.long 0x0C "TEMPSENSE0_TOG, Tempsensor Control Toggle Register 0" hexmask.long.word 0x0C 20.--31. 1. " ALARM_VALUE ,Temperature count toggle" hexmask.long.word 0x0C 8.--19. 1. " TEMP_CNT ,Last measured temperature toggle" rbitfld.long 0x0C 2. " FINISHED ,Latest temp valid toggle" "Not toggled,Toggled" newline bitfld.long 0x0C 1. " MEASURE_TEMP ,Starts the measurement process toggle" "Not toggled,Toggled" bitfld.long 0x0C 0. " POWER_DOWN ,Power down the temperature sensor toggle" "Not toggled,Toggled" line.long 0x10 "TEMPSENSE1,Tempsensor Control Register 1" hexmask.long.word 0x10 0.--15. 1. " MEASURE_FREQ ,Numbers of RTC clocks to wait before automatically repeating" line.long 0x14 "TEMPSENSE1_SET,Tempsensor Control Register 1" hexmask.long.word 0x14 0.--15. 1. " MEASURE_FREQ ,Numbers of RTC clocks to wait before automatically repeating set" line.long 0x18 "TEMPSENSE1_CLR,Tempsensor Control Register 1" hexmask.long.word 0x18 0.--15. 1. " MEASURE_FREQ ,Numbers of RTC clocks to wait before automatically repeating clear" line.long 0x1C "TEMPSENSE1_TOG,Tempsensor Control Register 1" hexmask.long.word 0x1C 0.--15. 1. " MEASURE_FREQ ,Numbers of RTC clocks to wait before automatically repeating toggle" width 0x0B tree.end tree.open "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART1" base ad:0x02020000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02020000+0x80)&0x01)==0x00)||((per.l(ad:0x02020000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02020000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x02020000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02020000+0x80)&0x01)==0x00)||((per.l(ad:0x02020000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02020000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02020000+0x80)&0x01)==0x00)||((per.l(ad:0x02020000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02020000+0x80)&0x01)==0x00)||((per.l(ad:0x02020000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x02020000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x02020000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02020000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02020000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02020000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02020000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02020000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02020000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02020000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02020000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end sif (cpu()=="IMX6SOLOLITE") tree "UART2" base ad:0x02024000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02024000+0x80)&0x01)==0x00)||((per.l(ad:0x02024000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02024000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x02024000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02024000+0x80)&0x01)==0x00)||((per.l(ad:0x02024000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02024000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02024000+0x80)&0x01)==0x00)||((per.l(ad:0x02024000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02024000+0x80)&0x01)==0x00)||((per.l(ad:0x02024000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x02024000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x02024000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02024000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02024000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02024000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02024000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02024000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02024000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02024000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02024000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART3" base ad:0x02034000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02034000+0x80)&0x01)==0x00)||((per.l(ad:0x02034000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02034000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x02034000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02034000+0x80)&0x01)==0x00)||((per.l(ad:0x02034000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02034000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02034000+0x80)&0x01)==0x00)||((per.l(ad:0x02034000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02034000+0x80)&0x01)==0x00)||((per.l(ad:0x02034000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x02034000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x02034000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02034000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02034000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02034000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02034000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02034000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02034000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02034000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02034000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART4" base ad:0x02038000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02038000+0x80)&0x01)==0x00)||((per.l(ad:0x02038000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02038000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x02038000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02038000+0x80)&0x01)==0x00)||((per.l(ad:0x02038000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02038000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02038000+0x80)&0x01)==0x00)||((per.l(ad:0x02038000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02038000+0x80)&0x01)==0x00)||((per.l(ad:0x02038000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x02038000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x02038000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02038000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02038000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02038000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02038000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02038000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02038000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02038000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02038000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART5" base ad:0x02018000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02018000+0x80)&0x01)==0x00)||((per.l(ad:0x02018000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02018000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x02018000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02018000+0x80)&0x01)==0x00)||((per.l(ad:0x02018000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x02018000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x02018000+0x80)&0x01)==0x00)||((per.l(ad:0x02018000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x02018000+0x80)&0x01)==0x00)||((per.l(ad:0x02018000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x02018000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x02018000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02018000+0x90))&0x40)==0x40)&&((((per.l(ad:0x02018000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02018000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02018000+0x90))&0x40)==0x00)&&((((per.l(ad:0x02018000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x02018000+0xB8))&0x01)==0x01)||((((per.l(ad:0x02018000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x02018000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end else tree "UART2" base ad:0x021E8000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021E8000+0x80)&0x01)==0x00)||((per.l(ad:0x021E8000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021E8000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x021E8000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021E8000+0x80)&0x01)==0x00)||((per.l(ad:0x021E8000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021E8000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021E8000+0x80)&0x01)==0x00)||((per.l(ad:0x021E8000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021E8000+0x80)&0x01)==0x00)||((per.l(ad:0x021E8000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x021E8000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x021E8000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021E8000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021E8000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021E8000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021E8000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021E8000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021E8000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021E8000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021E8000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART3" base ad:0x021EC000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021EC000+0x80)&0x01)==0x00)||((per.l(ad:0x021EC000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021EC000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x021EC000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021EC000+0x80)&0x01)==0x00)||((per.l(ad:0x021EC000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021EC000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021EC000+0x80)&0x01)==0x00)||((per.l(ad:0x021EC000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021EC000+0x80)&0x01)==0x00)||((per.l(ad:0x021EC000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x021EC000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x021EC000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021EC000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021EC000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021EC000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021EC000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021EC000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021EC000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021EC000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021EC000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART4" base ad:0x021F0000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021F0000+0x80)&0x01)==0x00)||((per.l(ad:0x021F0000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021F0000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x021F0000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021F0000+0x80)&0x01)==0x00)||((per.l(ad:0x021F0000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021F0000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021F0000+0x80)&0x01)==0x00)||((per.l(ad:0x021F0000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021F0000+0x80)&0x01)==0x00)||((per.l(ad:0x021F0000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x021F0000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x021F0000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F0000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021F0000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F0000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F0000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021F0000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F0000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F0000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F0000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end tree "UART5" base ad:0x021F4000 width 7. sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021F4000+0x80)&0x01)==0x00)||((per.l(ad:0x021F4000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021F4000+0xB4)&0xA00)==0xA00) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in elif ((per.l(ad:0x021F4000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021F4000+0x80)&0x01)==0x00)||((per.l(ad:0x021F4000+0x84)&0x02)==0x00)) hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" elif ((per.l(ad:0x021F4000+0xB8)&0x01)==0x00) rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Parity Error flag" "No error,Error" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" else rgroup.long 0x00++0x03 line.long 0x00 "URXD,UART Receiver Register" bitfld.long 0x00 15. " CHARRDY ,Character Ready" "Invalid,Valid and ready" bitfld.long 0x00 14. " ERR ,Error Detect" "No error,Error" bitfld.long 0x00 13. " OVRRUN ,Receiver Overrun" "No overrun,Overrun" newline bitfld.long 0x00 12. " FRMERR ,Frame Error" "No error,Error" bitfld.long 0x00 11. " BRK ,BREAK Detect" "Not detected,Detected" bitfld.long 0x00 10. " PRERR ,Holds the ninth data bit (bit [8]) of received 9-bit RS-485 data" "0,1" newline hexmask.long.byte 0x00 0.--7. 1. " RX_DATA ,Received Data" endif else hgroup.long 0x00++0x03 hide.long 0x00 "URXD,UART Receiver Register" in endif sif (cpu()=="IMX6ULTRALITE"||cpu()=="IMX6ULL") if (((per.l(ad:0x021F4000+0x80)&0x01)==0x00)||((per.l(ad:0x021F4000+0x84)&0x04)==0x00)) hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in else wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" endif elif (cpu()=="IMX6QUAD"||cpu()=="IMX6QUADLITE"||cpu()=="IMX6DUAL"||cpu()=="IMX6DUALLITE"||cpu()=="IMX6SOLO"||cpu()=="IMX6SOLOLITE"||cpu()=="IMX6SLL") if (((per.l(ad:0x021F4000+0x80)&0x01)==0x00)||((per.l(ad:0x021F4000+0x84)&0x04)==0x00)) wgroup.long 0x40++0x03 line.long 0x00 "UTXD,UART Transmitter Register" hexmask.long.byte 0x00 0.--7. 1. " TX_DATA ,Transmit Data" else hgroup.long 0x40++0x03 hide.long 0x00 "UTXD,UART Transmitter Register" in endif endif if ((per.l(ad:0x021F4000+0xB8)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.long 0x80++0x03 line.long 0x00 "UCR1,UART Control Register 1" bitfld.long 0x00 15. " ADEN ,Automatic Baud Rate Detection Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ADBR ,Automatic Detection of Baud Rate" "Disabled,Enabled" bitfld.long 0x00 13. " TRDYEN ,Transmitter Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " IDEN ,Idle Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ICD ,Idle Condition Detect" "4 frames,8 frames,16 frames,32 frames" bitfld.long 0x00 9. " RRDYEN ,Receiver Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RXDMAEN ,Receive Ready DMA Enable" "Disabled,Enabled" bitfld.long 0x00 7. " IREN ,Infrared Interface Enable" "Disabled,?..." bitfld.long 0x00 6. " TXMPTYEN ,Transmitter Empty Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " RTSDEN ,RTS Delta Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SNDBRK ,Send BREAK" "Not sent,Sent" bitfld.long 0x00 3. " TXDMAEN ,Transmitter Ready DMA Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ATDMAEN ,Aging DMA Timer Enable" "Disabled,Enabled" bitfld.long 0x00 1. " DOZE ,UART enable condition in the DOZE state" "Enabled,Disabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.long 0x84++0x03 line.long 0x00 "UCR2,UART Control Register 2" bitfld.long 0x00 15. " ESCI ,Escape Sequence Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRTS ,Ignore RTS Pin" "Not ignored,Ignored" bitfld.long 0x00 13. " CTSC ,CTS Pin Control" "CTS,Receiver" newline bitfld.long 0x00 12. " CTS ,Clear to Send" "High,Low" bitfld.long 0x00 11. " ESCEN ,Escape Enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " RTEC ,Request to Send Edge Control" "Rising,Falling,Any,Any" newline bitfld.long 0x00 8. " PREN ,Parity Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PROE ,Parity Odd/Even" "Even,Odd" bitfld.long 0x00 6. " STPB ,Number of stop bits" "1 bit,2 bits" newline bitfld.long 0x00 5. " WS ,Word Size" "7-bit,8-bit" bitfld.long 0x00 4. " RTSEN ,Request to Send Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ATEN ,Aging Timer Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RXEN ,Receiver Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SRST ,Software Reset" "Reset,No reset" if ((((per.l(ad:0x021F4000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F4000+0x90))&0x40)==0x40)&&((((per.l(ad:0x021F4000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DSR Interrupt Edge Control" "Rising,Falling,Both,Both" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect - DCDDELT enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " RI ,Ring Indicator - RIDELT enable" "Disabled,Enabled" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F4000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x80))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Set TXD active level in IrDA mode" "Active low,Active high" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F4000+0x90))&0x40)==0x00)&&((((per.l(ad:0x021F4000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x00)))) group.long 0x88++0x03 line.long 0x00 "UCR3,UART Control Register 3" bitfld.long 0x00 14.--15. " DPEC ,DTR Interrupt Edge Control" "Rising,Falling,Any,Any" bitfld.long 0x00 13. " DTREN ,Data Terminal Ready Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " PARERREN ,Parity Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " FRAERREN ,Frame Error Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 10. " DSR ,Data Set Ready" "0,1" bitfld.long 0x00 9. " DCD ,Data Carrier Detect (DCD logic state)" "0,1" newline bitfld.long 0x00 8. " RI ,Ring Indicator (RI logic state)" "0,1" bitfld.long 0x00 7. " ADNIMP ,Autoband Detection Not improved" "New,Old" newline bitfld.long 0x00 6. " RXDSEN ,Receive Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " AIRINTEN ,Asynchronous IR WAKE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " AWAKEN ,Asynchronous WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " DTRDEN ,Data Terminal Ready Delta Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RXDMUXSEL ,RXD Muxed Input Selected" "Not muxed,Muxed" bitfld.long 0x00 1. " INVT ,Invert TXD output in RS-232/RS-485 mode" "Not inverted,Inverted" newline bitfld.long 0x00 0. " ACIEN ,Autobaud Counter Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x88++0x03 hide.long 0x00 "UCR3,UART Control Register 3" endif if ((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x80)) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,RXD input logic level in IrDA mode" "Active low,Active high" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" elif ((((per.l(ad:0x021F4000+0xB8))&0x01)==0x01)||((((per.l(ad:0x021F4000+0xB8))&0x01)==0x00)&&(((per.l(ad:0x021F4000+0x80))&0x80)==0x00))) group.long 0x8C++0x03 line.long 0x00 "UCR4,UART Control Register 4" bitfld.long 0x00 10.--15. " CTSTL ,CTS Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 9. " INVR ,Invert RXD input in RS-232/RS-485 Mode" "Not inverted,Inverted" bitfld.long 0x00 8. " ENIRI ,Serial Infrared Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " WKEN ,WAKE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " IDDMAEN ,DMA IDLE Condition Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " IRSC ,IR Special Case" "Sampling clock,Reference clock" newline bitfld.long 0x00 4. " LPBYP ,Low Power Bypass" "Enabled,Disabled" bitfld.long 0x00 3. " TCEN ,Transmit Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BKEN ,BREAK Condition Detected Interrupt Enabled" "Disabled,Enabled" newline bitfld.long 0x00 1. " OREN ,Receiver Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DREN ,Receive Data Ready Interrupt Enable" "Disabled,Enabled" else hgroup.long 0x8C++0x03 hide.long 0x00 "UCR4,UART Control Register 4" endif group.long 0x90++0x1B line.long 0x00 "UFCR,UART FIFO Control Register" bitfld.long 0x00 10.--15. " TXTL ,Transmitter Trigger Level" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x00 7.--9. " RFDIV ,Reference Frequency Divider" "/6,/5,/4,/3,/2,/1,/7,?..." newline bitfld.long 0x00 6. " DCEDTE ,DCE/DTE mode select" "DCE,DTE" bitfld.long 0x00 0.--5. " RXTL ,Receiver Trigger Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x04 "USR1,UART Status Register 1" eventfld.long 0x04 15. " PARITYERR ,Parity Error Interrupt Flag" "Not detected,Detected" rbitfld.long 0x04 14. " RTSS ,RTS Pin Status" "High,Low" rbitfld.long 0x04 13. " TRDY ,Transmitter Ready Interrupt /DMA Flag" "No interrupt,Interrupt" newline eventfld.long 0x04 12. " RTSD ,RTS Delta" "Not changed,Changed" eventfld.long 0x04 11. " ESCF ,Escape Sequence Interrupt Flag" "Not detected,Detected" eventfld.long 0x04 10. " FRAMERR ,Frame Error Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x04 9. " RRDY ,Receiver Ready Interrupt /DMA Flag" "Not ready,Ready" eventfld.long 0x04 8. " AGTIM ,Ageing Timer Interrupt Flag" "Not active,Active" eventfld.long 0x04 7. " DTRD ,DTR Delta" "Not changed,Changed" newline rbitfld.long 0x04 6. " RXDS ,Receiver IDLE Interrupt Flag" "In progress,Idle" eventfld.long 0x04 5. " AIRINT ,IR WAKE Pulse Detection" "Not detected,Detected" eventfld.long 0x04 4. " AWAKE ,Falling Edge Detection on the RXD Serial pin" "Not detected,Detected" newline eventfld.long 0x04 3. " SAD ,RS-485 Slave Address Detected Interrupt Flag" "Not detected,Detected" line.long 0x08 "USR2,UART Status Register 2" eventfld.long 0x08 15. " ADET ,Automatic Baud Rate Detect Complete" "Not received,Received" rbitfld.long 0x08 14. " TXFE ,Transmit Buffer FIFO Empty" "Not empty,Empty" eventfld.long 0x08 13. " DTRF ,DTR edge triggered interrupt flag" "Not detected,Detected" newline eventfld.long 0x08 12. " IDLE ,Idle Condition" "Not detected,Detected" eventfld.long 0x08 11. " ACST ,Autobaud Counter Stopped" "Not finished,Finished" eventfld.long 0x08 10. " RIDELT ,Ring Indicator Delta" "Not changed,Changed" newline rbitfld.long 0x08 9. " RIIN ,Ring Indicator Input" "Detected,Not detected" eventfld.long 0x08 8. " IRINT ,Serial Infrared Interrupt Flag" "Not detected,Detected" eventfld.long 0x08 7. " WAKE ,Wake" "Not detected,Detected" newline eventfld.long 0x08 6. " DCDDELT ,Data Carrier Detect Delta" "Not changed,Changed" rbitfld.long 0x08 5. " DCDIN ,Data Carrier Detect Input" "Detected,Not detected" eventfld.long 0x08 4. " RTSF ,RTS Edge Triggered Interrupt Flag" "Not detected,Detected" newline rbitfld.long 0x08 3. " TXDC ,Transmitter Complete" "Not completed,Completed" eventfld.long 0x08 2. " BRCD ,BREAK Condition Detected" "Not detected,Detected" eventfld.long 0x08 1. " ORE ,Overrun Error" "No error,Error" newline rbitfld.long 0x08 0. " RDR ,Receive Data Ready" "Not ready,Ready" line.long 0x0C "UESC,UART Escape Character Register" hexmask.long.byte 0x0C 0.--7. 1. " ESC_CHAR ,UART Escape Character" line.long 0x10 "UTIM,UART Escape Timer Register" hexmask.long.word 0x10 0.--11. 1. " TIM ,UART Escape Timer" line.long 0x14 "UBIR,UART BRM Incremental Register" hexmask.long.word 0x14 0.--15. 1. " INC ,UART BRM Incremental Numerator" line.long 0x18 "UBMR,UART BRM Modulator Register" hexmask.long.word 0x18 0.--15. 1. " MOD ,Modulator Dominator" rgroup.long 0xAC++0x03 line.long 0x00 "UBRC,UART Baud Rate Count Register" hexmask.long.word 0x00 0.--15. 1. " BCNT ,UART Baud Rate Count Register" group.long 0xB0++0x0B line.long 0x00 "ONEMS,UART One Millisecond Register" hexmask.long.tbyte 0x00 0.--23. 1. " ONEMS ,UART One Millisecond Register" line.long 0x04 "UTS,UART Test Register" bitfld.long 0x04 13. " FRCPERR ,Force Parity Error" "Normal,Inverted" bitfld.long 0x04 12. " LOOP ,Loop TX and RX for Test" "Normal,Loop" bitfld.long 0x04 11. " DBGEN ,Debug Enable" "Enabled,Disabled" newline bitfld.long 0x04 10. " LOOPIR ,Loop Tx and RX for IR Test" "Normal,Loop" bitfld.long 0x04 9. " RXDBG ,RX FIFO Read Counter Control in Debug Mode" "Not incremented,Incremented" bitfld.long 0x04 6. " TXEMPTY ,Tx FIFO Empty" "Not empty,Empty" newline bitfld.long 0x04 5. " RXEMPTY ,Rx FIFO Empty" "Not empty,Empty" bitfld.long 0x04 4. " TXFULL ,Tx FIFO Full" "Not full,Full" bitfld.long 0x04 3. " RXFULL ,Rx FIFO Full" "Not full,Full" newline bitfld.long 0x04 0. " SOFTRST ,Software Reset" "No reset,Reset" line.long 0x08 "UMCR,RS-485 Mode Control Register" hexmask.long.byte 0x08 8.--15. 1. " SLADDR ,RS-485 Slave Address Character" newline bitfld.long 0x08 3. " SADEN ,RS-485 Slave Address Detected Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " TXB8 ,Transmit RS-485 bit 8" "0,1" newline bitfld.long 0x08 1. " SLAM ,RS-485 Slave Address Detect Mode Selection" "Normal,Automatic" bitfld.long 0x08 0. " MDEN ,9-bit data or Multidrop Mode (RS-485) Enable" "RS-232/IrDA mode,RS-485 mode" width 0x0B tree.end endif tree.end tree "USB Controller (Universal Serial Bus Controller)" base ad:0x02184000 sif (cpu()=="IMX6SOLOLITE") tree "USB Core Registers" tree "OTG1" width 24. rgroup.long (0x00+0x0)++0x03 line.long 0x00 "UOG1_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x0)++0x03 line.long 0x00 "UOG1_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x0)++0x0F line.long 0x00 "UOG1_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") line.long 0x04 "UOG1_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif else line.long 0x04 "UOG1_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UOG1_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UOG1_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x0)++0xf "Device/Host Timer Registers" line.long 0x00 "UOG1_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UOG1_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UOG1_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UOG1_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UOG1_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UOG1_SBUSCFG" line.long 0x00 "UOG1_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x0)++0x01 line.word 0x00 "UOG1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x0)++0x00 line.byte 0x00 "UOG1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x0)++0x00 line.byte 0x00 "UOG1_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x0)++0x01 line.word 0x00 "UOG1_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x0)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UOG1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x0)++0x01 line.word 0x00 "UOG1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x0)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UOG1_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UOG1_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UOG1_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UOG1_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x0)++0x1 line.word 0x00 "UOG1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x0)++0x3 line.long 0x00 "UOG1_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") rgroup.word (0x120+0x0)++0x1 line.word 0x00 "UOG1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" else rgroup.word (0x120+0x0)++0x1 line.word 0x00 "UOG1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif rgroup.long (0x124+0x0)++0x3 line.long 0x00 "UOG1_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." else textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." endif endif group.long (0x140+0x0)++0x03 line.long 0x00 "UOG1_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") if ((per.l((0x0+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x0)++0x03 hide.long 0x00 "UOG1_USBSTS,USB Status Register" endif else if ((per.l((0x0+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x0)++0x03 hide.long 0x00 "UOG1_USBSTS,USB Status Register" endif endif group.long (0x148+0x0)++0x07 line.long 0x00 "UOG1_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UOG1_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x0)++0x03 hide.long 0x00 "UOG1_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x0+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x0)++0x03 line.long 0x00 "UOG1_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x0)++0x03 line.long 0x00 "UOG1_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x0)++0x03 hide.long 0x00 "UOG1_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x0)++0x03 line.long 0x00 "UOG1_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x0)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UOG1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UOG1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x0)++0x03 hide.long 0x00 "UOG1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x0)++0x7 line.long 0x00 "UOG1_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UOG1_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x0)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x0)++0x03 line.long 0x00 "UOG1_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) group.long 0x178++0x07 line.long 0x00 "UOG1_ENDPTNAK,Endpoint NAK register" bitfld.long 0x00 23. " EPTN[7] ,TX Endpoint NAK 7" "Low,High" bitfld.long 0x00 22. " EPTN[6] ,TX Endpoint NAK 6" "Low,High" bitfld.long 0x00 21. " EPTN[5] ,TX Endpoint NAK 5" "Low,High" bitfld.long 0x00 20. " EPTN[4] ,TX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 19. " EPTN[3] ,TX Endpoint NAK 3" "Low,High" bitfld.long 0x00 18. " EPTN[2] ,TX Endpoint NAK 2" "Low,High" bitfld.long 0x00 17. " EPTN[1] ,TX Endpoint NAK 1" "Low,High" bitfld.long 0x00 16. " EPTN[0] ,TX Endpoint NAK 0" "Low,High" textline " " bitfld.long 0x00 7. " EPRN[7] ,RX Endpoint NAK 7" "Low,High" bitfld.long 0x00 6. " EPRN[6] ,RX Endpoint NAK 6" "Low,High" bitfld.long 0x00 5. " EPRN[5] ,RX Endpoint NAK 5" "Low,High" bitfld.long 0x00 4. " EPRN[4] ,RX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 3. " EPRN[3] ,RX Endpoint NAK 3" "Low,High" bitfld.long 0x00 2. " EPRN[2] ,RX Endpoint NAK 2" "Low,High" bitfld.long 0x00 1. " EPRN[1] ,RX Endpoint NAK 1" "Low,High" bitfld.long 0x00 0. " EPRN[0] ,RX Endpoint NAK 0" "Low,High" line.long 0x04 "UOG1_ENDPTNAKEN,Endpoint NAK Enable register" bitfld.long 0x04 23. " EPTN[7] ,TX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 22. " EPTN[6] ,TX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 21. " EPTN[5] ,TX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 20. " EPTN[4] ,TX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " EPTN[3] ,TX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 18. " EPTN[2] ,TX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 17. " EPTN[1] ,TX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 16. " EPTN[0] ,TX Endpoint NAK 0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EPRN[7] ,RX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 6. " EPRN[6] ,RX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 5. " EPRN[5] ,RX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 4. " EPRN[4] ,RX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EPRN[3] ,RX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 2. " EPRN[2] ,RX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 1. " EPRN[1] ,RX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 0. " EPRN[0] ,RX Endpoint NAK 0" "Disabled,Enabled" endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x0)++0x03 line.long 0x00 "UOG1_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x0)++0x03 line.long 0x00 "UOG1_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x0)++0x03 line.long 0x00 "UOG1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x0+0x04)++0x1B line.long 0x00 "UOG1_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UOG1_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UOG1_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UOG1_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UOG1_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UOG1_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UOG1_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x0)++0x03 line.long 0x00 "UOG1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x0)++0x1f hide.long 0x00 "UOG1_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UOG1_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UOG1_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UOG1_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UOG1_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UOG1_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UOG1_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UOG1_PORTSC8,Port 8 Status and Control Register" endif endif textline " " group.long 0x1a4++0x03 line.long 0x00 "UOG1_OTGSC,OTG Status Control Register" bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. " 1MSE ,1 Milisecond Timer Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 21. " 1MSS ,1 Milisecond Timer Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBus Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" rbitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " rbitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" rbitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" rbitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" rbitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " rbitfld.long 0x00 8. " ID ,USB ID" "A device,B device" else bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" bitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " bitfld.long 0x00 8. " ID ,USB ID" "A device,B device" endif bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled" bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled" bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " VC ,VBUS Charge" "Not charged,Charged" bitfld.long 0x00 0. " VD ,VBUS Discharge" "Not discharged,Discharged" textline " " group.long (0x1a8+0x0)++0x03 line.long 0x00 "UOG1_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,Device,Host" textline " " if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1ac++0x0b line.long 0x00 "UOG1_ENDPTSETUPSTAT,Endpoint Setup Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 15. " ENDPTSETUPSTAT[15] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 14. " ENDPTSETUPSTAT[14] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 13. " ENDPTSETUPSTAT[13] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 12. " ENDPTSETUPSTAT[12] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 11. " ENDPTSETUPSTAT[11] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 10. " ENDPTSETUPSTAT[10] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 9. " ENDPTSETUPSTAT[09] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 8. " ENDPTSETUPSTAT[08] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 7. " ENDPTSETUPSTAT[07] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 6. " ENDPTSETUPSTAT[06] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 5. " ENDPTSETUPSTAT[05] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 4. " ENDPTSETUPSTAT[04] ,Setup Endpoint Status" "Not received,Received" textline " " endif bitfld.long 0x00 3. " ENDPTSETUPSTAT[03] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 2. " ENDPTSETUPSTAT[02] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 1. " ENDPTSETUPSTAT[01] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 0. " ENDPTSETUPSTAT[00] ,Setup Endpoint Status" "Not received,Received" textline " " line.long 0x04 "UOG1_ENDPTPRIME,Endpoint Prime Register" sif (!cpuis("K70*")) bitfld.long 0x04 23. " PETB7 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 22. " PETB6 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 21. " PETB5 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 20. " PETB4 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" textline " " endif bitfld.long 0x04 19. " PETB3 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 18. " PETB2 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 17. " PETB1 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 16. " PETB0 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" sif (!cpuis("K70*")) textline " " bitfld.long 0x04 7. " PERB7 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 6. " PERB6 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 5. " PERB5 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 4. " PERB4 ,Prime Endpoint Receive Buffer" "Not prime,Prime" endif textline " " bitfld.long 0x04 3. " PERB3 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 2. " PERB2 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 1. " PERB1 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 0. " PERB0 ,Prime Endpoint Receive Buffer" "Not prime,Prime" line.long 0x08 "UOG1_ENDPTFLUSH,Endpoint Flush Register" sif (!cpuis("K70*")) bitfld.long 0x08 23. " FETB7 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 22. " FETB6 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 21. " FETB5 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 20. " FETB4 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" textline " " endif bitfld.long 0x08 19. " FETB3 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 18. " FETB2 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 17. " FETB1 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 16. " FETB0 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" sif (!cpuis("K70*")) textline " " bitfld.long 0x08 7. " FERB7 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 6. " FERB6 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 5. " FERB5 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 4. " FERB4 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" endif textline " " bitfld.long 0x08 3. " FERB3 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 2. " FERB2 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 1. " FERB1 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 0. " FERB0 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" rgroup.long 0x1b8++0x03 line.long 0x00 "UOG1_ENDPTSTAT,Endpoint Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 23. " ETBR7 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 22. " ETBR6 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 21. " ETBR5 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 20. " ETBR4 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" textline " " endif bitfld.long 0x00 19. " ETBR3 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 18. " ETBR2 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 17. " ETBR1 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 16. " ETBR0 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" sif (!cpuis("K70*")) textline " " bitfld.long 0x00 7. " ERBR7 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 6. " ERBR6 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 5. " ERBR5 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 4. " ERBR4 ,Endpoint Receive Buffer Ready" "Not ready,Ready" endif textline " " bitfld.long 0x00 3. " ERBR3 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 2. " ERBR2 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 1. " ERBR1 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 0. " ERBR0 ,Endpoint Receive Buffer Ready" "Not ready,Ready" group.long 0x1bc++0x03 sif (cpuis("K70*")) line.long 0x00 "UOG1_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" elif (cpuis("RAYLEIGH-CA7")) line.long 0x00 "UOG1_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 23. " ETCE23 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 22. " ETCE22 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 21. " ETCE21 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 20. " ETCE20 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" else line.long 0x00 "UOG1_ENDPTCOMPLETE,Endpoint Complete Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 31. " ETCE15 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 30. " ETCE14 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 29. " ETCE13 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 28. " ETCE12 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " ETCE11 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 26. " ETCE10 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 25. " ETCE9 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 24. " ETCE8 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " endif bitfld.long 0x00 23. " ETCE7 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 22. " ETCE6 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 21. " ETCE5 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 20. " ETCE4 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 15. " ERCE15 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 14. " ERCE14 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 13. " ERCE13 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 12. " ERCE12 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " ERCE11 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 10. " ERCE10 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 9. " ERCE9 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 8. " ERCE8 ,Endpoint Receive Complete Event" "Not occurred,Occurred" endif textline " " bitfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 4. " ERCE4 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " endif else hgroup.long 0x1ac++0x13 hide.long 0x00 "UOG1_ENDPTSETUPSTAT,Endpoint Setup Status Register" hide.long 0x04 "UOG1_ENDPTPRIME,Endpoint Prime Register" hide.long 0x08 "UOG1_ENDPTFLUSH,Endpoint Flush Register" hide.long 0x0c "UOG1_ENDPTSTAT,Endpoint Status Register" hide.long 0x10 "UOG1_ENDPTCOMPLETE,Endpoint Complete Register" endif sif (cpuis("K70*")) group.long 0x1c0--0x1CF line.long 0x00 "UOG1_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG1_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG1_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG1_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x1c0++0x03 line.long 0x00 "UOG1_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,?..." bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" ",Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,?..." bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "OK,Stalled" if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1c4++0x1B line.long 0x0 "UOG1_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x0 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x0 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x0 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x0 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x0 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x0 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x0 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x0 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x4 "UOG1_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x8 "UOG1_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0xC "UOG1_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x10 "UOG1_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x14 "UOG1_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x18 "UOG1_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "OK,Stalled" else hgroup.long 0x1c4++0x1B hide.long 0x4 "UOG1_ENDPTCTRL1,Endpoint Control 1 Register" hide.long 0x8 "UOG1_ENDPTCTRL2,Endpoint Control 2 Register" hide.long 0xC "UOG1_ENDPTCTRL3,Endpoint Control 3 Register" hide.long 0x10 "UOG1_ENDPTCTRL4,Endpoint Control 4 Register" hide.long 0x14 "UOG1_ENDPTCTRL5,Endpoint Control 5 Register" hide.long 0x18 "UOG1_ENDPTCTRL6,Endpoint Control 6 Register" hide.long 0x1C "UOG1_ENDPTCTRL7,Endpoint Control 7 Register" endif else group.long 0x1c0++0x23 line.long 0x00 "UOG1_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG1_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG1_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG1_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x10 "UOG1_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x14 "UOG1_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x18 "UOG1_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x1C "UOG1_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x1C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x1C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x1C 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" endif textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x0)++0x03 line.long 0x00 "USB_UOG1_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree "OTG2" width 24. rgroup.long (0x00+0x200)++0x03 line.long 0x00 "UOG2_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x200)++0x03 line.long 0x00 "UOG2_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x200)++0x0F line.long 0x00 "UOG2_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") line.long 0x04 "UOG2_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif else line.long 0x04 "UOG2_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UOG2_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UOG2_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x200)++0xf "Device/Host Timer Registers" line.long 0x00 "UOG2_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UOG2_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UOG2_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UOG2_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UOG2_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UOG2_SBUSCFG" line.long 0x00 "UOG2_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x200)++0x01 line.word 0x00 "UOG2_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x200)++0x00 line.byte 0x00 "UOG2_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x200)++0x00 line.byte 0x00 "UOG2_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x200)++0x01 line.word 0x00 "UOG2_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x200)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UOG2_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x200)++0x01 line.word 0x00 "UOG2_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x200)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UOG2_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UOG2_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UOG2_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UOG2_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x200)++0x1 line.word 0x00 "UOG2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x200)++0x3 line.long 0x00 "UOG2_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") rgroup.word (0x120+0x200)++0x1 line.word 0x00 "UOG2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" else rgroup.word (0x120+0x200)++0x1 line.word 0x00 "UOG2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif rgroup.long (0x124+0x200)++0x3 line.long 0x00 "UOG2_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." else textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." endif endif group.long (0x140+0x200)++0x03 line.long 0x00 "UOG2_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") if ((per.l((0x200+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x200)++0x03 line.long 0x00 "UOG2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x200)++0x03 line.long 0x00 "UOG2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x200)++0x03 hide.long 0x00 "UOG2_USBSTS,USB Status Register" endif else if ((per.l((0x200+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x200)++0x03 line.long 0x00 "UOG2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x200)++0x03 line.long 0x00 "UOG2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x200)++0x03 hide.long 0x00 "UOG2_USBSTS,USB Status Register" endif endif group.long (0x148+0x200)++0x07 line.long 0x00 "UOG2_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UOG2_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x200)++0x03 hide.long 0x00 "UOG2_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x200+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x200)++0x03 line.long 0x00 "UOG2_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x200)++0x03 line.long 0x00 "UOG2_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x200)++0x03 hide.long 0x00 "UOG2_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x200)++0x03 line.long 0x00 "UOG2_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x200)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UOG2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UOG2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x200)++0x03 hide.long 0x00 "UOG2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x200)++0x7 line.long 0x00 "UOG2_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UOG2_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x200)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x200)++0x03 line.long 0x00 "UOG2_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) group.long 0x178++0x07 line.long 0x00 "UOG2_ENDPTNAK,Endpoint NAK register" bitfld.long 0x00 23. " EPTN[7] ,TX Endpoint NAK 7" "Low,High" bitfld.long 0x00 22. " EPTN[6] ,TX Endpoint NAK 6" "Low,High" bitfld.long 0x00 21. " EPTN[5] ,TX Endpoint NAK 5" "Low,High" bitfld.long 0x00 20. " EPTN[4] ,TX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 19. " EPTN[3] ,TX Endpoint NAK 3" "Low,High" bitfld.long 0x00 18. " EPTN[2] ,TX Endpoint NAK 2" "Low,High" bitfld.long 0x00 17. " EPTN[1] ,TX Endpoint NAK 1" "Low,High" bitfld.long 0x00 16. " EPTN[0] ,TX Endpoint NAK 0" "Low,High" textline " " bitfld.long 0x00 7. " EPRN[7] ,RX Endpoint NAK 7" "Low,High" bitfld.long 0x00 6. " EPRN[6] ,RX Endpoint NAK 6" "Low,High" bitfld.long 0x00 5. " EPRN[5] ,RX Endpoint NAK 5" "Low,High" bitfld.long 0x00 4. " EPRN[4] ,RX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 3. " EPRN[3] ,RX Endpoint NAK 3" "Low,High" bitfld.long 0x00 2. " EPRN[2] ,RX Endpoint NAK 2" "Low,High" bitfld.long 0x00 1. " EPRN[1] ,RX Endpoint NAK 1" "Low,High" bitfld.long 0x00 0. " EPRN[0] ,RX Endpoint NAK 0" "Low,High" line.long 0x04 "UOG2_ENDPTNAKEN,Endpoint NAK Enable register" bitfld.long 0x04 23. " EPTN[7] ,TX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 22. " EPTN[6] ,TX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 21. " EPTN[5] ,TX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 20. " EPTN[4] ,TX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " EPTN[3] ,TX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 18. " EPTN[2] ,TX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 17. " EPTN[1] ,TX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 16. " EPTN[0] ,TX Endpoint NAK 0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EPRN[7] ,RX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 6. " EPRN[6] ,RX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 5. " EPRN[5] ,RX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 4. " EPRN[4] ,RX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EPRN[3] ,RX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 2. " EPRN[2] ,RX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 1. " EPRN[1] ,RX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 0. " EPRN[0] ,RX Endpoint NAK 0" "Disabled,Enabled" endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x200)++0x03 line.long 0x00 "UOG2_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x200)++0x03 line.long 0x00 "UOG2_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x200)++0x03 line.long 0x00 "UOG2_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x200+0x04)++0x1B line.long 0x00 "UOG2_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UOG2_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UOG2_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UOG2_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UOG2_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UOG2_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UOG2_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x200)++0x03 line.long 0x00 "UOG2_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x200)++0x1f hide.long 0x00 "UOG2_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UOG2_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UOG2_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UOG2_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UOG2_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UOG2_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UOG2_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UOG2_PORTSC8,Port 8 Status and Control Register" endif endif textline " " group.long 0x1a4++0x03 line.long 0x00 "UOG2_OTGSC,OTG Status Control Register" bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. " 1MSE ,1 Milisecond Timer Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 21. " 1MSS ,1 Milisecond Timer Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBus Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" rbitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " rbitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" rbitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" rbitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" rbitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " rbitfld.long 0x00 8. " ID ,USB ID" "A device,B device" else bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" bitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " bitfld.long 0x00 8. " ID ,USB ID" "A device,B device" endif bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled" bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled" bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " VC ,VBUS Charge" "Not charged,Charged" bitfld.long 0x00 0. " VD ,VBUS Discharge" "Not discharged,Discharged" textline " " group.long (0x1a8+0x200)++0x03 line.long 0x00 "UOG2_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,Device,Host" textline " " if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1ac++0x0b line.long 0x00 "UOG2_ENDPTSETUPSTAT,Endpoint Setup Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 15. " ENDPTSETUPSTAT[15] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 14. " ENDPTSETUPSTAT[14] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 13. " ENDPTSETUPSTAT[13] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 12. " ENDPTSETUPSTAT[12] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 11. " ENDPTSETUPSTAT[11] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 10. " ENDPTSETUPSTAT[10] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 9. " ENDPTSETUPSTAT[09] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 8. " ENDPTSETUPSTAT[08] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 7. " ENDPTSETUPSTAT[07] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 6. " ENDPTSETUPSTAT[06] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 5. " ENDPTSETUPSTAT[05] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 4. " ENDPTSETUPSTAT[04] ,Setup Endpoint Status" "Not received,Received" textline " " endif bitfld.long 0x00 3. " ENDPTSETUPSTAT[03] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 2. " ENDPTSETUPSTAT[02] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 1. " ENDPTSETUPSTAT[01] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 0. " ENDPTSETUPSTAT[00] ,Setup Endpoint Status" "Not received,Received" textline " " line.long 0x04 "UOG2_ENDPTPRIME,Endpoint Prime Register" sif (!cpuis("K70*")) bitfld.long 0x04 23. " PETB7 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 22. " PETB6 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 21. " PETB5 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 20. " PETB4 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" textline " " endif bitfld.long 0x04 19. " PETB3 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 18. " PETB2 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 17. " PETB1 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 16. " PETB0 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" sif (!cpuis("K70*")) textline " " bitfld.long 0x04 7. " PERB7 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 6. " PERB6 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 5. " PERB5 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 4. " PERB4 ,Prime Endpoint Receive Buffer" "Not prime,Prime" endif textline " " bitfld.long 0x04 3. " PERB3 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 2. " PERB2 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 1. " PERB1 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 0. " PERB0 ,Prime Endpoint Receive Buffer" "Not prime,Prime" line.long 0x08 "UOG2_ENDPTFLUSH,Endpoint Flush Register" sif (!cpuis("K70*")) bitfld.long 0x08 23. " FETB7 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 22. " FETB6 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 21. " FETB5 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 20. " FETB4 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" textline " " endif bitfld.long 0x08 19. " FETB3 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 18. " FETB2 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 17. " FETB1 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 16. " FETB0 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" sif (!cpuis("K70*")) textline " " bitfld.long 0x08 7. " FERB7 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 6. " FERB6 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 5. " FERB5 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 4. " FERB4 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" endif textline " " bitfld.long 0x08 3. " FERB3 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 2. " FERB2 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 1. " FERB1 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 0. " FERB0 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" rgroup.long 0x1b8++0x03 line.long 0x00 "UOG2_ENDPTSTAT,Endpoint Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 23. " ETBR7 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 22. " ETBR6 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 21. " ETBR5 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 20. " ETBR4 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" textline " " endif bitfld.long 0x00 19. " ETBR3 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 18. " ETBR2 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 17. " ETBR1 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 16. " ETBR0 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" sif (!cpuis("K70*")) textline " " bitfld.long 0x00 7. " ERBR7 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 6. " ERBR6 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 5. " ERBR5 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 4. " ERBR4 ,Endpoint Receive Buffer Ready" "Not ready,Ready" endif textline " " bitfld.long 0x00 3. " ERBR3 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 2. " ERBR2 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 1. " ERBR1 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 0. " ERBR0 ,Endpoint Receive Buffer Ready" "Not ready,Ready" group.long 0x1bc++0x03 sif (cpuis("K70*")) line.long 0x00 "UOG2_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" elif (cpuis("RAYLEIGH-CA7")) line.long 0x00 "UOG2_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 23. " ETCE23 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 22. " ETCE22 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 21. " ETCE21 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 20. " ETCE20 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" else line.long 0x00 "UOG2_ENDPTCOMPLETE,Endpoint Complete Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 31. " ETCE15 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 30. " ETCE14 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 29. " ETCE13 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 28. " ETCE12 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " ETCE11 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 26. " ETCE10 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 25. " ETCE9 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 24. " ETCE8 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " endif bitfld.long 0x00 23. " ETCE7 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 22. " ETCE6 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 21. " ETCE5 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 20. " ETCE4 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 15. " ERCE15 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 14. " ERCE14 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 13. " ERCE13 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 12. " ERCE12 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " ERCE11 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 10. " ERCE10 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 9. " ERCE9 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 8. " ERCE8 ,Endpoint Receive Complete Event" "Not occurred,Occurred" endif textline " " bitfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 4. " ERCE4 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " endif else hgroup.long 0x1ac++0x13 hide.long 0x00 "UOG2_ENDPTSETUPSTAT,Endpoint Setup Status Register" hide.long 0x04 "UOG2_ENDPTPRIME,Endpoint Prime Register" hide.long 0x08 "UOG2_ENDPTFLUSH,Endpoint Flush Register" hide.long 0x0c "UOG2_ENDPTSTAT,Endpoint Status Register" hide.long 0x10 "UOG2_ENDPTCOMPLETE,Endpoint Complete Register" endif sif (cpuis("K70*")) group.long 0x1c0--0x1CF line.long 0x00 "UOG2_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG2_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG2_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG2_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x1c0++0x03 line.long 0x00 "UOG2_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,?..." bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" ",Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,?..." bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "OK,Stalled" if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1c4++0x1B line.long 0x0 "UOG2_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x0 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x0 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x0 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x0 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x0 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x0 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x0 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x0 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x4 "UOG2_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x8 "UOG2_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0xC "UOG2_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x10 "UOG2_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x14 "UOG2_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x18 "UOG2_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "OK,Stalled" else hgroup.long 0x1c4++0x1B hide.long 0x4 "UOG2_ENDPTCTRL1,Endpoint Control 1 Register" hide.long 0x8 "UOG2_ENDPTCTRL2,Endpoint Control 2 Register" hide.long 0xC "UOG2_ENDPTCTRL3,Endpoint Control 3 Register" hide.long 0x10 "UOG2_ENDPTCTRL4,Endpoint Control 4 Register" hide.long 0x14 "UOG2_ENDPTCTRL5,Endpoint Control 5 Register" hide.long 0x18 "UOG2_ENDPTCTRL6,Endpoint Control 6 Register" hide.long 0x1C "UOG2_ENDPTCTRL7,Endpoint Control 7 Register" endif else group.long 0x1c0++0x23 line.long 0x00 "UOG2_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG2_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG2_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG2_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x10 "UOG2_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x14 "UOG2_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x18 "UOG2_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x1C "UOG2_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x1C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x1C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x1C 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" endif textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x200)++0x03 line.long 0x00 "USB_UOG2_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree "Host1" width 24. rgroup.long (0x00+0x400)++0x03 line.long 0x00 "UH1_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x400)++0x03 line.long 0x00 "UH1_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x400)++0x0F line.long 0x00 "UH1_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") else line.long 0x04 "UH1_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UH1_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UH1_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x400)++0xf "Device/Host Timer Registers" line.long 0x00 "UH1_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UH1_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UH1_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UH1_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UH1_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UH1_SBUSCFG" line.long 0x00 "UH1_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x400)++0x01 line.word 0x00 "UH1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x400)++0x00 line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x400)++0x00 line.byte 0x00 "UH1_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x400)++0x01 line.word 0x00 "UH1_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x400)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x400)++0x01 line.word 0x00 "UH1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x400)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UH1_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UH1_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UH1_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UH1_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x400)++0x1 line.word 0x00 "UH1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x400)++0x3 line.long 0x00 "UH1_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") else rgroup.word (0x120+0x400)++0x1 line.word 0x00 "UH1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif endif group.long (0x140+0x400)++0x03 line.long 0x00 "UH1_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") else if ((per.l((0x400+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x400)++0x03 line.long 0x00 "UH1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x400)++0x03 line.long 0x00 "UH1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x400)++0x03 hide.long 0x00 "UH1_USBSTS,USB Status Register" endif endif group.long (0x148+0x400)++0x07 line.long 0x00 "UH1_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UH1_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x400)++0x03 hide.long 0x00 "UH1_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x400+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x400)++0x03 line.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x400)++0x03 line.long 0x00 "UH1_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x400)++0x03 hide.long 0x00 "UH1_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x400)++0x03 line.long 0x00 "UH1_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x400)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x400)++0x03 hide.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x400)++0x7 line.long 0x00 "UH1_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UH1_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x400)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x400)++0x03 line.long 0x00 "UH1_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x400)++0x03 line.long 0x00 "UH1_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x400)++0x03 line.long 0x00 "UH1_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x400)++0x03 line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x400+0x04)++0x1B line.long 0x00 "UH1_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UH1_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UH1_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UH1_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UH1_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UH1_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UH1_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x400)++0x03 line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x400)++0x1f hide.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UH1_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UH1_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UH1_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UH1_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UH1_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UH1_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UH1_PORTSC8,Port 8 Status and Control Register" endif endif textline " " textline " " group.long (0x1a8+0x400)++0x03 line.long 0x00 "UH1_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,,Host" textline " " textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x400)++0x03 line.long 0x00 "USB_UH1_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree.end width 21. tree "USB Non-core Registers" group.long 0x800++0x0B line.long 0x00 "USB_OTG1_CTRL,USB OTG1 Control Register" rbitfld.long 0x00 31. " WIR ,OTG Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x00 17. " WKUP_VBUS_EN ,OTG wake-up on VBUS change enable" "Disabled,Enabled" bitfld.long 0x00 16. " WKUP_ID_EN ,OTG Wake-up on ID change enable" "Disabled,Enabled" bitfld.long 0x00 15. " WKUP_SW ,OTG Software Wake-up" "Inactive,Wake-up" textline " " bitfld.long 0x00 14. " WKUP_SW_EN ,OTG Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x00 10. " WIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " PWR_POL ,OTG Power Polarity" "Low,High" bitfld.long 0x00 8. " OVER_CUR_POL ,OTG Polarity of Overcurrent" "High,Low" textline " " bitfld.long 0x00 7. " OVER_CUR_DIS ,Disable OTG Overcurrent Detection" "No,Yes" line.long 0x04 "USB_OTG2_CTRL,USB OTG2 Control Register" rbitfld.long 0x04 31. " WIR ,OTG Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x04 17. " WKUP_VBUS_EN ,OTG wake-up on VBUS change enable" "Disabled,Enabled" bitfld.long 0x04 16. " WKUP_ID_EN ,OTG Wake-up on ID change enable" "Disabled,Enabled" bitfld.long 0x04 15. " WKUP_SW ,OTG Software Wake-up" "Inactive,Wake-up" textline " " bitfld.long 0x04 14. " WKUP_SW_EN ,OTG Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x04 10. " WIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 9. " PWR_POL ,OTG Power Polarity" "Low,High" bitfld.long 0x04 8. " OVER_CUR_POL ,OTG Polarity of Overcurrent" "High,Low" textline " " bitfld.long 0x04 7. " OVER_CUR_DIS ,Disable OTG Overcurrent Detection" "No,Yes" line.long 0x08 "USB_UH_CTRL,USB Host Control Register" rbitfld.long 0x08 31. " WIR ,Host Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x08 15. " WKUP_SW ,Host Software Wake-up" "Inactive,Wake-up" bitfld.long 0x08 14. " WKUP_SW_EN ,Host Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x08 13. " OTG_480M_CLK_ON ,Force OTG UTMI PHY 480M clock output on when Host is not in suspend mode" "Inactive,Forced" textline " " bitfld.long 0x08 12. " SUSPENDM ,Force Host UTMI PHY Suspend" "Enabled,Disabled" bitfld.long 0x08 11. " RESET ,Host UTMI PHY Reset" "Inactive,Reset" bitfld.long 0x08 10. " WIE ,Host Wake-up Interrupt Enable" "Disabled,Enabled" group.long 0x810++0x03 line.long 0x00 "USB_UH_HSIC_CTRL,USB Host High Speed Inter-Chip Control Register" rbitfld.long 0x00 31. " CLK_VLD ,Host HSIC clock valid" "Invalid,Valid" bitfld.long 0x00 12. " HSIC_EN ,Host HSIC enable" "Disabled,Enabled" bitfld.long 0x00 11. " HSIC_CLK_ON ,Force Host HSIC module 480M clock on" "Inactive,Active" group.long 0x818++0x07 line.long 0x00 "USB_OTG1_PHY_CTRL_0,OTG1 UTMI PHY Control 0 Register" bitfld.long 0x0 31. " UTMI_CLK_VLD ,UTMI PHY Clock Valid" "Invalid,Valid" line.long 0x04 "USB_OTG2_PHY_CTRL_0,OTG2 UTMI PHY Control 0 Register" bitfld.long 0x04 31. " UTMI_CLK_VLD ,UTMI PHY Clock Valid" "Invalid,Valid" tree.end else tree "USB Core Registers" tree "OTG" width 24. rgroup.long (0x00+0x0)++0x03 line.long 0x00 "UOG_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x0)++0x03 line.long 0x00 "UOG_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x0)++0x0F line.long 0x00 "UOG_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") else line.long 0x04 "UOG_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UOG_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UOG_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x0)++0xf "Device/Host Timer Registers" line.long 0x00 "UOG_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UOG_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UOG_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UOG_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UOG_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UOG_SBUSCFG" line.long 0x00 "UOG_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x0)++0x01 line.word 0x00 "UOG_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x0)++0x00 line.byte 0x00 "UOG_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x0)++0x00 line.byte 0x00 "UOG_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x0)++0x01 line.word 0x00 "UOG_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x0)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UOG_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x0)++0x01 line.word 0x00 "UOG_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x0)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UOG_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UOG_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UOG_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UOG_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x0)++0x1 line.word 0x00 "UOG_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x0)++0x3 line.long 0x00 "UOG_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") rgroup.word (0x120+0x0)++0x1 line.word 0x00 "UOG_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" else rgroup.word (0x120+0x0)++0x1 line.word 0x00 "UOG_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif rgroup.long (0x124+0x0)++0x3 line.long 0x00 "UOG_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." else textline " " bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." endif endif group.long (0x140+0x0)++0x03 line.long 0x00 "UOG_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") else if ((per.l((0x0+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x0)++0x03 line.long 0x00 "UOG_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x0)++0x03 hide.long 0x00 "UOG_USBSTS,USB Status Register" endif endif group.long (0x148+0x0)++0x07 line.long 0x00 "UOG_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UOG_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x0)++0x03 hide.long 0x00 "UOG_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x0+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x0)++0x03 line.long 0x00 "UOG_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x0)++0x03 line.long 0x00 "UOG_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x0)++0x03 hide.long 0x00 "UOG_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x0)++0x03 line.long 0x00 "UOG_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x0)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UOG_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UOG_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x0)++0x03 hide.long 0x00 "UOG_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x0)++0x7 line.long 0x00 "UOG_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UOG_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x0)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x0)++0x03 line.long 0x00 "UOG_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) group.long 0x178++0x07 line.long 0x00 "UOG_ENDPTNAK,Endpoint NAK register" bitfld.long 0x00 23. " EPTN[7] ,TX Endpoint NAK 7" "Low,High" bitfld.long 0x00 22. " EPTN[6] ,TX Endpoint NAK 6" "Low,High" bitfld.long 0x00 21. " EPTN[5] ,TX Endpoint NAK 5" "Low,High" bitfld.long 0x00 20. " EPTN[4] ,TX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 19. " EPTN[3] ,TX Endpoint NAK 3" "Low,High" bitfld.long 0x00 18. " EPTN[2] ,TX Endpoint NAK 2" "Low,High" bitfld.long 0x00 17. " EPTN[1] ,TX Endpoint NAK 1" "Low,High" bitfld.long 0x00 16. " EPTN[0] ,TX Endpoint NAK 0" "Low,High" textline " " bitfld.long 0x00 7. " EPRN[7] ,RX Endpoint NAK 7" "Low,High" bitfld.long 0x00 6. " EPRN[6] ,RX Endpoint NAK 6" "Low,High" bitfld.long 0x00 5. " EPRN[5] ,RX Endpoint NAK 5" "Low,High" bitfld.long 0x00 4. " EPRN[4] ,RX Endpoint NAK 4" "Low,High" textline " " bitfld.long 0x00 3. " EPRN[3] ,RX Endpoint NAK 3" "Low,High" bitfld.long 0x00 2. " EPRN[2] ,RX Endpoint NAK 2" "Low,High" bitfld.long 0x00 1. " EPRN[1] ,RX Endpoint NAK 1" "Low,High" bitfld.long 0x00 0. " EPRN[0] ,RX Endpoint NAK 0" "Low,High" line.long 0x04 "UOG_ENDPTNAKEN,Endpoint NAK Enable register" bitfld.long 0x04 23. " EPTN[7] ,TX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 22. " EPTN[6] ,TX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 21. " EPTN[5] ,TX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 20. " EPTN[4] ,TX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " EPTN[3] ,TX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 18. " EPTN[2] ,TX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 17. " EPTN[1] ,TX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 16. " EPTN[0] ,TX Endpoint NAK 0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EPRN[7] ,RX Endpoint NAK 7" "Disabled,Enabled" bitfld.long 0x04 6. " EPRN[6] ,RX Endpoint NAK 6" "Disabled,Enabled" bitfld.long 0x04 5. " EPRN[5] ,RX Endpoint NAK 5" "Disabled,Enabled" bitfld.long 0x04 4. " EPRN[4] ,RX Endpoint NAK 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EPRN[3] ,RX Endpoint NAK 3" "Disabled,Enabled" bitfld.long 0x04 2. " EPRN[2] ,RX Endpoint NAK 2" "Disabled,Enabled" bitfld.long 0x04 1. " EPRN[1] ,RX Endpoint NAK 1" "Disabled,Enabled" bitfld.long 0x04 0. " EPRN[0] ,RX Endpoint NAK 0" "Disabled,Enabled" endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x0)++0x03 line.long 0x00 "UOG_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x0)++0x03 line.long 0x00 "UOG_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x0)++0x03 line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x0+0x04)++0x1B line.long 0x00 "UOG_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UOG_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UOG_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UOG_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UOG_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UOG_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UOG_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x0)++0x03 line.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x0)++0x1f hide.long 0x00 "UOG_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UOG_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UOG_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UOG_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UOG_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UOG_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UOG_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UOG_PORTSC8,Port 8 Status and Control Register" endif endif textline " " group.long 0x1a4++0x03 line.long 0x00 "UOG_OTGSC,OTG Status Control Register" bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. " 1MSE ,1 Milisecond Timer Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 21. " 1MSS ,1 Milisecond Timer Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBus Valid Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt" sif (cpu()=="IMX6SOLOLITE") rbitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" rbitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " rbitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" rbitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" rbitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" rbitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " rbitfld.long 0x00 8. " ID ,USB ID" "A device,B device" else bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected" bitfld.long 0x00 13. " 1MST ,1 Milisecond Timer Toggle" "Not toggled,Toggled" textline " " bitfld.long 0x00 12. " BSE ,B Session End" "Not ended,Ended" bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid" bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid" bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid" textline " " bitfld.long 0x00 8. " ID ,USB ID" "A device,B device" endif bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled" bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled" bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " VC ,VBUS Charge" "Not charged,Charged" bitfld.long 0x00 0. " VD ,VBUS Discharge" "Not discharged,Discharged" textline " " group.long (0x1a8+0x0)++0x03 line.long 0x00 "UOG_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,Device,Host" textline " " if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1ac++0x0b line.long 0x00 "UOG_ENDPTSETUPSTAT,Endpoint Setup Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 15. " ENDPTSETUPSTAT[15] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 14. " ENDPTSETUPSTAT[14] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 13. " ENDPTSETUPSTAT[13] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 12. " ENDPTSETUPSTAT[12] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 11. " ENDPTSETUPSTAT[11] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 10. " ENDPTSETUPSTAT[10] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 9. " ENDPTSETUPSTAT[09] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 8. " ENDPTSETUPSTAT[08] ,Setup Endpoint Status" "Not received,Received" textline " " bitfld.long 0x00 7. " ENDPTSETUPSTAT[07] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 6. " ENDPTSETUPSTAT[06] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 5. " ENDPTSETUPSTAT[05] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 4. " ENDPTSETUPSTAT[04] ,Setup Endpoint Status" "Not received,Received" textline " " endif bitfld.long 0x00 3. " ENDPTSETUPSTAT[03] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 2. " ENDPTSETUPSTAT[02] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 1. " ENDPTSETUPSTAT[01] ,Setup Endpoint Status" "Not received,Received" bitfld.long 0x00 0. " ENDPTSETUPSTAT[00] ,Setup Endpoint Status" "Not received,Received" textline " " line.long 0x04 "UOG_ENDPTPRIME,Endpoint Prime Register" sif (!cpuis("K70*")) bitfld.long 0x04 23. " PETB7 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 22. " PETB6 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 21. " PETB5 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 20. " PETB4 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" textline " " endif bitfld.long 0x04 19. " PETB3 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 18. " PETB2 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 17. " PETB1 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" bitfld.long 0x04 16. " PETB0 ,Prime Endpoint Transmit Buffer" "Not prime,Prime" sif (!cpuis("K70*")) textline " " bitfld.long 0x04 7. " PERB7 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 6. " PERB6 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 5. " PERB5 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 4. " PERB4 ,Prime Endpoint Receive Buffer" "Not prime,Prime" endif textline " " bitfld.long 0x04 3. " PERB3 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 2. " PERB2 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 1. " PERB1 ,Prime Endpoint Receive Buffer" "Not prime,Prime" bitfld.long 0x04 0. " PERB0 ,Prime Endpoint Receive Buffer" "Not prime,Prime" line.long 0x08 "UOG_ENDPTFLUSH,Endpoint Flush Register" sif (!cpuis("K70*")) bitfld.long 0x08 23. " FETB7 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 22. " FETB6 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 21. " FETB5 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 20. " FETB4 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" textline " " endif bitfld.long 0x08 19. " FETB3 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 18. " FETB2 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 17. " FETB1 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" bitfld.long 0x08 16. " FETB0 ,Flush Endpoint Transmit Buffer" "Not flushed,Flushed" sif (!cpuis("K70*")) textline " " bitfld.long 0x08 7. " FERB7 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 6. " FERB6 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 5. " FERB5 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 4. " FERB4 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" endif textline " " bitfld.long 0x08 3. " FERB3 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 2. " FERB2 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 1. " FERB1 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" bitfld.long 0x08 0. " FERB0 ,Flush Endpoint Receive Buffer" "Not flushed,Flushed" rgroup.long 0x1b8++0x03 line.long 0x00 "UOG_ENDPTSTAT,Endpoint Status Register" sif (!cpuis("K70*")) bitfld.long 0x00 23. " ETBR7 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 22. " ETBR6 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 21. " ETBR5 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 20. " ETBR4 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" textline " " endif bitfld.long 0x00 19. " ETBR3 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 18. " ETBR2 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 17. " ETBR1 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" bitfld.long 0x00 16. " ETBR0 ,Endpoint Transmit Buffer Ready" "Not ready,Ready" sif (!cpuis("K70*")) textline " " bitfld.long 0x00 7. " ERBR7 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 6. " ERBR6 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 5. " ERBR5 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 4. " ERBR4 ,Endpoint Receive Buffer Ready" "Not ready,Ready" endif textline " " bitfld.long 0x00 3. " ERBR3 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 2. " ERBR2 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 1. " ERBR1 ,Endpoint Receive Buffer Ready" "Not ready,Ready" bitfld.long 0x00 0. " ERBR0 ,Endpoint Receive Buffer Ready" "Not ready,Ready" group.long 0x1bc++0x03 sif (cpuis("K70*")) line.long 0x00 "UOG_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" elif (cpuis("RAYLEIGH-CA7")) line.long 0x00 "UOG_ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x00 23. " ETCE23 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 22. " ETCE22 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 21. " ETCE21 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 20. " ETCE20 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" eventfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" eventfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" else line.long 0x00 "UOG_ENDPTCOMPLETE,Endpoint Complete Register" sif (!cpuis("IMX6*")) bitfld.long 0x00 31. " ETCE15 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 30. " ETCE14 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 29. " ETCE13 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 28. " ETCE12 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 27. " ETCE11 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 26. " ETCE10 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 25. " ETCE9 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 24. " ETCE8 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " endif bitfld.long 0x00 23. " ETCE7 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 22. " ETCE6 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 21. " ETCE5 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 20. " ETCE4 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " ETCE3 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 18. " ETCE2 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 17. " ETCE1 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" bitfld.long 0x00 16. " ETCE0 ,Endpoint Transmit Complete Event" "Not occurred,Occurred" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 15. " ERCE15 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 14. " ERCE14 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 13. " ERCE13 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 12. " ERCE12 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " ERCE11 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 10. " ERCE10 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 9. " ERCE9 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 8. " ERCE8 ,Endpoint Receive Complete Event" "Not occurred,Occurred" endif textline " " bitfld.long 0x00 7. " ERCE7 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 6. " ERCE6 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 5. " ERCE5 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 4. " ERCE4 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " ERCE3 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 2. " ERCE2 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 1. " ERCE1 ,Endpoint Receive Complete Event" "Not occurred,Occurred" bitfld.long 0x00 0. " ERCE0 ,Endpoint Receive Complete Event" "Not occurred,Occurred" textline " " endif else hgroup.long 0x1ac++0x13 hide.long 0x00 "UOG_ENDPTSETUPSTAT,Endpoint Setup Status Register" hide.long 0x04 "UOG_ENDPTPRIME,Endpoint Prime Register" hide.long 0x08 "UOG_ENDPTFLUSH,Endpoint Flush Register" hide.long 0x0c "UOG_ENDPTSTAT,Endpoint Status Register" hide.long 0x10 "UOG_ENDPTCOMPLETE,Endpoint Complete Register" endif sif (cpuis("K70*")) group.long 0x1c0--0x1CF line.long 0x00 "UOG_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x1c0++0x03 line.long 0x00 "UOG_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,?..." bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" ",Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,?..." bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "OK,Stalled" if ((per.l(0x0+ad:0x02184000+0x1a8)&0x3)==0x2) group.long 0x1c4++0x1B line.long 0x0 "UOG_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x0 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x0 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x0 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x0 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x0 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x0 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x0 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x0 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x0 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x0 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x4 "UOG_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x8 "UOG_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0xC "UOG_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x10 "UOG_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x14 "UOG_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "OK,Stalled" line.long 0x18 "UOG_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "OK,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk,?..." bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer/DMA Engine,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "OK,Stalled" else hgroup.long 0x1c4++0x1B hide.long 0x4 "UOG_ENDPTCTRL1,Endpoint Control 1 Register" hide.long 0x8 "UOG_ENDPTCTRL2,Endpoint Control 2 Register" hide.long 0xC "UOG_ENDPTCTRL3,Endpoint Control 3 Register" hide.long 0x10 "UOG_ENDPTCTRL4,Endpoint Control 4 Register" hide.long 0x14 "UOG_ENDPTCTRL5,Endpoint Control 5 Register" hide.long 0x18 "UOG_ENDPTCTRL6,Endpoint Control 6 Register" hide.long 0x1C "UOG_ENDPTCTRL7,Endpoint Control 7 Register" endif else group.long 0x1c0++0x23 line.long 0x00 "UOG_ENDPTCTRL0,Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,,," bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,,," bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x4 "UOG_ENDPTCTRL1,Endpoint Control 1 Register" bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x4 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x8 "UOG_ENDPTCTRL2,Endpoint Control 2 Register" bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x8 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0xC "UOG_ENDPTCTRL3,Endpoint Control 3 Register" bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0xC 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x10 "UOG_ENDPTCTRL4,Endpoint Control 4 Register" bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x10 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x14 "UOG_ENDPTCTRL5,Endpoint Control 5 Register" bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x14 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x18 "UOG_ENDPTCTRL6,Endpoint Control 6 Register" bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x18 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" line.long 0x1C "UOG_ENDPTCTRL7,Endpoint Control 7 Register" bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No effect,Reset" bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Enabled,Disabled" bitfld.long 0x1C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x1C 17. " TXD ,TX Endpoint Data Source" "Dual port memory buffer,Undefined" bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "Not stalled,Stalled" bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled" bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No effect,Reset" textline " " bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled" bitfld.long 0x1C 2.--3. " RXT ,RX Endpoint Type" "Control,Isochronous,Bulk," bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual port memory buffer,Undefined" bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "Not stalled,Stalled" endif textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x0)++0x03 line.long 0x00 "USB_UOG_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree "Host1" width 24. rgroup.long (0x00+0x200)++0x03 line.long 0x00 "UH1_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x200)++0x03 line.long 0x00 "UH1_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x200)++0x0F line.long 0x00 "UH1_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") else line.long 0x04 "UH1_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UH1_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UH1_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x200)++0xf "Device/Host Timer Registers" line.long 0x00 "UH1_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UH1_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UH1_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UH1_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UH1_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UH1_SBUSCFG" line.long 0x00 "UH1_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x200)++0x01 line.word 0x00 "UH1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x200)++0x00 line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x200)++0x00 line.byte 0x00 "UH1_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x200)++0x01 line.word 0x00 "UH1_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x200)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UH1_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x200)++0x01 line.word 0x00 "UH1_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x200)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UH1_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UH1_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UH1_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UH1_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x200)++0x1 line.word 0x00 "UH1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x200)++0x3 line.long 0x00 "UH1_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") else rgroup.word (0x120+0x200)++0x1 line.word 0x00 "UH1_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif endif group.long (0x140+0x200)++0x03 line.long 0x00 "UH1_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") else if ((per.l((0x200+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x200)++0x03 line.long 0x00 "UH1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x200)++0x03 line.long 0x00 "UH1_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x200)++0x03 hide.long 0x00 "UH1_USBSTS,USB Status Register" endif endif group.long (0x148+0x200)++0x07 line.long 0x00 "UH1_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UH1_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x200)++0x03 hide.long 0x00 "UH1_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x200+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x200)++0x03 line.long 0x00 "UH1_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x200)++0x03 line.long 0x00 "UH1_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x200)++0x03 hide.long 0x00 "UH1_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x200)++0x03 line.long 0x00 "UH1_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x200)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x200)++0x03 hide.long 0x00 "UH1_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x200)++0x7 line.long 0x00 "UH1_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UH1_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x200)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x200)++0x03 line.long 0x00 "UH1_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x200)++0x03 line.long 0x00 "UH1_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x200)++0x03 line.long 0x00 "UH1_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x200)++0x03 line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x200+0x04)++0x1B line.long 0x00 "UH1_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UH1_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UH1_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UH1_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UH1_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UH1_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UH1_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x200+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x200)++0x03 line.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x200)++0x1f hide.long 0x00 "UH1_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UH1_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UH1_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UH1_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UH1_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UH1_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UH1_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UH1_PORTSC8,Port 8 Status and Control Register" endif endif textline " " textline " " group.long (0x1a8+0x200)++0x03 line.long 0x00 "UH1_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,,Host" textline " " textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x200)++0x03 line.long 0x00 "USB_UH1_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree "Host2" width 24. rgroup.long (0x00+0x400)++0x03 line.long 0x00 "UH2_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x400)++0x03 line.long 0x00 "UH2_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x400)++0x0F line.long 0x00 "UH2_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") else line.long 0x04 "UH2_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UH2_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UH2_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x400)++0xf "Device/Host Timer Registers" line.long 0x00 "UH2_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UH2_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UH2_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UH2_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UH2_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UH2_SBUSCFG" line.long 0x00 "UH2_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x400)++0x01 line.word 0x00 "UH2_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x400)++0x00 line.byte 0x00 "UH2_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x400)++0x00 line.byte 0x00 "UH2_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x400)++0x01 line.word 0x00 "UH2_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x400)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UH2_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x400)++0x01 line.word 0x00 "UH2_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x400)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UH2_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UH2_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UH2_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UH2_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x400)++0x1 line.word 0x00 "UH2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x400)++0x3 line.long 0x00 "UH2_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") rgroup.word (0x120+0x400)++0x1 line.word 0x00 "UH2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" else rgroup.word (0x120+0x400)++0x1 line.word 0x00 "UH2_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif endif group.long (0x140+0x400)++0x03 line.long 0x00 "UH2_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") else if ((per.l((0x400+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x400)++0x03 line.long 0x00 "UH2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x400)++0x03 line.long 0x00 "UH2_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x400)++0x03 hide.long 0x00 "UH2_USBSTS,USB Status Register" endif endif group.long (0x148+0x400)++0x07 line.long 0x00 "UH2_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UH2_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x400)++0x03 hide.long 0x00 "UH2_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x400+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x400)++0x03 line.long 0x00 "UH2_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x400)++0x03 line.long 0x00 "UH2_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x400)++0x03 hide.long 0x00 "UH2_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x400)++0x03 line.long 0x00 "UH2_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x400)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UH2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UH2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x400)++0x03 hide.long 0x00 "UH2_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x400)++0x7 line.long 0x00 "UH2_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UH2_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x400)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x400)++0x03 line.long 0x00 "UH2_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x400)++0x03 line.long 0x00 "UH2_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x400)++0x03 line.long 0x00 "UH2_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x400)++0x03 line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x400+0x04)++0x1B line.long 0x00 "UH2_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UH2_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UH2_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UH2_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UH2_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UH2_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UH2_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x400+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x400)++0x03 line.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x400)++0x1f hide.long 0x00 "UH2_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UH2_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UH2_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UH2_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UH2_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UH2_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UH2_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UH2_PORTSC8,Port 8 Status and Control Register" endif endif textline " " textline " " group.long (0x1a8+0x400)++0x03 line.long 0x00 "UH2_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,Device,Host" textline " " textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x400)++0x03 line.long 0x00 "USB_UH2_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree "Host3" width 24. rgroup.long (0x00+0x600)++0x03 line.long 0x00 "UH3_ID,Identification Register" hexmask.long.byte 0x00 16.--23. 1. " REVISION[7:0] ,Revision Number of the Core" hexmask.long.byte 0x00 8.--13. 1. " NID[5:0] ,Ones Complement Version of ID[5:0]" hexmask.long.byte 0x00 0.--5. 1. " ID[5:0] ,Configuration Number" textline " " rgroup.long (0x04+0x600)++0x03 line.long 0x00 "UH3_HWGENERAL,General Hardware Register" sif (cpuis("K70*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "0,1,2,3" textline " " elif (cpuis("RAYLEIGH-CA7")||cpuis("IMX6*")) bitfld.long 0x00 9.--10. " SM ,Serial interface mode capability" "No Serial Engine,Serial Engine,Soft. programmable(parallel),Soft. programmable(serial)" textline " " else bitfld.long 0x00 9. " SM ,Transciever type" "0,1" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "000,001,010,011,100,101,110,111" elif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 6.--8. " PHYM ,Transciever type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial Only,Reset UTMI/UTMI+,Reset ULPI DDR,Reset ULPI,Reset Serial" else bitfld.long 0x00 6.--8. " PHYM ,VUSB_HS_PHY_TYPE" "000,001,010,011,100,101,110,111" endif sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core/Software programmable" "8 bit/Soft. non-programmable,16 bit/Soft. non-programmable,Reset to 8 bit/Soft. programmable,Reset to 16 bit/Soft. programmable" else textline " " bitfld.long 0x00 4.--5. " PHYW ,Data width of the transciever connected to the controller core" "00,01,10,11" endif sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " BWT ,Reserved for Internal Testing" "0,1" bitfld.long 0x00 1.--2. " CLKC ,VUSB_HS_CLOCK_CONFIGURATION" "00,01,10,11" bitfld.long 0x00 0. " RT ,VUSB_HS_RESET_TYPE" "0,1" endif textline " " rgroup.long (0x08+0x600)++0x0F line.long 0x00 "UH3_HWHOST,Host Hardware Parameters Register" sif (!(cpuis("IMX6*"))) hexmask.long.byte 0x00 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS" hexmask.long.byte 0x00 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS" textline " " endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 1.--3. " NPORT ,Number of downstream ports supported by host controller (NPORT+1)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Host operation mode support" "Not supported,Supported" else bitfld.long 0x00 1.--3. " NPORT ,VUSB_HS_NUM_PORT+1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Operation mode support for device" "Not supported,Supported" endif sif (cpu()=="IMX6SOLOLITE") else line.long 0x04 "UH3_HWDEVICE,Device Hardware Parameters Register" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") bitfld.long 0x04 1.--5. " DEVEP ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Device operation mode support" "Not supported,Supported" else hexmask.long.byte 0x04 1.--5. 1. " DEVEP ,VUSB_HS_DEV_EP" bitfld.long 0x04 0. " DC ,VUSB_HS_DEV" "0,1" endif endif line.long 0x08 "UH3_HWTXBUF,TX Buffer Hardware Parameters Register" sif (!(cpuis("IMX6*"))) bitfld.long 0x08 31. " TXLCR ,VUSB_HS_TX_LOCAL_CONTEXT_REGISTERS" "0,1" textline " " endif hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Buffer size of each transmit endpoint" sif (!(cpuis("IMX6*"))) textline " " hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Buffer total size for all transmit endpoints" endif textline " " hexmask.long.byte 0x08 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer" line.long 0x0C "UH3_HWRXBUF,RX Buffer Hardware Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Buffer total size for all receive endpoints" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer" textline " " group.long (0x80+0x600)++0xf "Device/Host Timer Registers" line.long 0x00 "UH3_GPTIMER0LD,General Purpose Timer #0 Load Register" hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x04 "UH3_GPTIMER0CTRL,General Purpose Timer #0 Controller" bitfld.long 0x04 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x04 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x04 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" line.long 0x08 "UH3_GPTIMER1LD,General Purpose Timer #1 Load Register" hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General Purpose Timer Load Value" line.long 0x0C "UH3_GPTIMER1CTRL,General Purpose Timer #1 Controller" bitfld.long 0x0C 31. " GPTRUN ,General Purpose Timer Run" "Stopped,Running" bitfld.long 0x0C 30. " GPTRST ,General Purpose Timer Reset" "No effect,Reset" bitfld.long 0x0C 24. " GPTMODE ,General Purpose Timer Mode" "One Shot,Repeat" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General Purpose Timer Counter" textline " " sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") group.long 0x90++0x03 line.long 0x00 "UH3_SBUSCFG,System Bus Config" bitfld.long 0x00 0.--2. " AHBBRST ,AHB master interface Burst configuration" "Unspecified,INCR4/Singles,INCR8/INCR4/Singles,INCR16/INCR8/INCR4/Singles,,INCR4/Unspecified,INCR8/INCR4/Unspecified,INCR16/INCR8/INCR4/Unspecified" else group.long 0x90++0x03 "UH3_SBUSCFG" line.long 0x00 "UH3_WRXBUF, RX Buffer Hardware Parameters" bitfld.long 0x00 0.--2. " AHBBRST ,AHB Burst" "Unspecified,INCR4/Singles,INCR8/Singles,INCR16/Singles,,INCR4/Unspecified,INCR8/Unspecified,INCR16/Unspecified" endif sif (cpuis("K70*")) rgroup.word (0x100+0x600)++0x01 line.word 0x00 "UH3_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" rgroup.byte (0x103+0x600)++0x00 line.byte 0x00 "UH3_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" elif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") rgroup.byte (0x100+0x600)++0x00 line.byte 0x00 "UH3_CAPLENGTH,Capability Registers Length" rgroup.word (0x102+0x600)++0x01 line.word 0x00 "UH3_HCIVERSION,Host Controller Interface Version" else rgroup.byte (0x100+0x600)++0x00 "Device/Host Capability Registers" line.byte 0x00 "UH3_CAPLENGTH,EHCI Compliant Register" hexmask.byte 0x00 0.--7. 1. " CAPLENGTH[7:0] ,Capability Length" rgroup.word (0x102+0x600)++0x01 line.word 0x00 "UH3_HCIVERSION,EHCI Compliant Register" hexmask.word 0x00 0.--15. 1. " HCIVERSION[15:0] ,Host Interface Version Number" endif rgroup.long (0x104+0x600)++0x07 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") line.long 0x00 "UH3_HCSPARAMS,Host Controller Structural Parameters" else line.long 0x00 "UH3_HCSPARAMS,EHCI Compliant With Extensions Register" endif bitfld.long 0x00 24.--27. " N_TT[3:0] ,Number of Transaction Translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT[3:0] ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " PI ,Port Indicators" "0,1" bitfld.long 0x00 12.--15. " N_CC[3:0] ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC[3:0] ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not included,Included" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else textline " " bitfld.long 0x00 0.--3. " N_PORTS[3:0] ,Number of Downstream Ports" ",1,2,3,4,5,6,7,8,?..." endif sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") line.long 0x04 "UH3_HCCPARAMS,Host Controller Capability Parameters" else line.long 0x04 "UH3_HCCPARAMS,EHCI Compliant Register" endif hexmask.long.byte 0x04 8.--15. 1. " EECP[7:0] ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST[7:4] ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous Schedule Park Capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable Frame List Flag" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ADC ,64-bit Addressing Capability" "Disabled,Enabled" sif (cpuis("K70*")) rgroup.word (0x122+0x600)++0x1 line.word 0x00 "UH3_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" rgroup.long (0x124+0x600)++0x3 line.long 0x00 "UH3_DCCPARAMS,Device Control Capability Parameters Register" bitfld.long 0x00 8. " HC ,Host Capable" "Disabled,Enabled" bitfld.long 0x00 7. " DC ,Device Capable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " DEN[4:0] ,Device Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." else sif (cpu()=="IMX6SOLOLITE") rgroup.word (0x120+0x600)++0x1 line.word 0x00 "UH3_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" else rgroup.word (0x120+0x600)++0x1 line.word 0x00 "UH3_DCIVERSION,Device Interface Version Number Register" hexmask.word 0x00 0.--15. 1. " DCIVERSION[15:0] ,Device Interface Version Number" endif endif group.long (0x140+0x600)++0x03 line.long 0x00 "UH3_USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC[7:0] ,Interrupt Threshold Control" textline " " sif (cpu()!="IMX6SOLOLITE") bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " endif bitfld.long 0x00 13. " SUTW ,Setup TripWire" "Hazard,No hazard" sif (!cpuis("K70*"))&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE") textline " " bitfld.long 0x00 12. " ATDTW ,ATDTW" "Cleared,Set" endif textline " " bitfld.long 0x00 11. " ASPE ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASP ,Asynchronous Schedule Park Mode Count" ",1,2,3" sif (!cpuis("IMX6*")) textline " " bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No effect,Reset" endif textline " " bitfld.long 0x00 6. " IAA ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS[2:0] ,Frame List Size 1" "1024,512,256,128,64,32,16,8" textline " " bitfld.long 0x00 1. " RST ,Controller Reset" "No effect,Reset" bitfld.long 0x00 0. " RS ,Run/Stop" "Stopped,Running" sif (cpu()=="IMX6SOLOLITE") else if ((per.l((0x600+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x144+0x600)++0x03 line.long 0x00 "UH3_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 15. " AS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty" bitfld.long 0x00 12. " HCH ,HC Halted" "Not halted,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,SOF Received" "Not detected,Detected" bitfld.long 0x00 5. " AAI ,Interrupt on Async Advance" "Not requested,Requested" bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame List Rollover" "No rollover,Rollover" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" elif ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x144+0x600)++0x03 line.long 0x00 "UH3_USBSTS,USB Status Register" eventfld.long 0x00 25. " TI1 ,General Purpose Timer Interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 24. " TI0 ,General Purpose Timer Interrupt 0" "No interrupt,Interrupt" sif (cpuis("K70*")) textline " " bitfld.long 0x00 19. " UPI ,USB host Periodic Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " UAI ,USB host Asynchronous Interrupt" "No interrupt,Interrupt" endif sif (cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " rbitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" else textline " " bitfld.long 0x00 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SLI ,DC Suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " SRI ,SOF Received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB Reset Received" "No reset,Reset" textline " " bitfld.long 0x00 4. " SEI ,System Error" "No error,Error" bitfld.long 0x00 2. " PCI ,Port Change Detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB Error Interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB Interrupt" "No interrupt,Interrupt" else hgroup.long (0x144+0x600)++0x03 hide.long 0x00 "UH3_USBSTS,USB Status Register" endif endif group.long (0x148+0x600)++0x07 line.long 0x00 "UH3_USBINTR,USB Interrupt Enable" bitfld.long 0x00 25. " TIE1 ,GPT Interrupt Enable 1" "Disabled,Enabled" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 0" "Disabled,Enabled" else textline " " bitfld.long 0x00 24. " TIE0 ,GPT Interrupt Enable 1" "Disabled,Enabled" endif sif (cpuis("K70*")||cpuis("IMX6*"))||(cpuis("RAYLEIGH-CA7")) textline " " bitfld.long 0x00 19. " UPIE ,USB host Periodic Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " UAIE ,USB host Asynchronous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " NAKIE ,NAK Interrupt Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 10. " ULPIE ,ULPI Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF Received Enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB Reset Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port Change Detect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x04 "UH3_FRINDEX,USB Frame Index Register" hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame Index" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) hgroup.long (0x150+0x600)++0x03 hide.long 0x00 "UH3_CTRLDSSEGMENT,CTRLDSSEGMENT" endif if ((per.l((0x600+ad:0x02184000+0x1a8))&0x3)==0x3) group.long (0x154+0x600)++0x03 line.long 0x00 "UH3_PERIODICLISTBASE,Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base Address (Low)" elif ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x154+0x600)++0x03 line.long 0x00 "UH3_DEVICEADDR,Device Controller USB Device Address Register" hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device Address" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 24. " USBADRA ,Device Address Advance" "0,1" endif else hgroup.long (0x154+0x600)++0x03 hide.long 0x00 "UH3_DEVICEADDR,Device Controller USB Device Address Register" endif if ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x158+0x600)++0x03 line.long 0x00 "UH3_ASYNCLISTADDR,Host Controller Next Asynch Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE[31:5] ,Link Pointer Low" elif ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x158+0x600)++0x03 sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE") line.long 0x00 "UH3_ENDPTLISTADDR,Device Controller Endpoint List Address Register" else line.long 0x00 "UH3_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE[31:11] ,Device Controller Endpoint List Address" else hgroup.long (0x158+0x600)++0x03 hide.long 0x00 "UH3_ENDPTLISTADDR,Device Controller Endpoint List Address Register" endif sif (cpuis("K70*")) group.long 0x15c++0x3 line.long 0x00 "USBHS_TTCTRL,Host TT Asynchronous Buffer Control" hexmask.long.byte 0x00 24.--30. 1. " TTHA ,TT Hub Address" endif group.long (0x160+0x600)++0x7 line.long 0x00 "UH3_BURSTSIZE,Programmable Burst Size" hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX Burst Length" hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX Burst Length" line.long 0x04 "UH3_TXFILLTUNING,TX FIFO Fill Tuning Register" bitfld.long 0x04 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler Overhead" sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(!cpuis("K70*"))&&(cpu()!="IMX6SOLOLITE") group.long (0x16C+0x600)++0x03 line.long 0x00 "IC_USB,IC_USB Enable" bitfld.long 0x00 31. " IC8 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " IC_VDD8 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 27. " IC7 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IC_VDD7 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 23. " IC6 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " IC_VDD6 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 19. " IC5 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 16.--18. " IC_VDD5 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 15. " IC4 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " IC_VDD4 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." bitfld.long 0x00 11. " IC3 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " IC_VDD3 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." textline " " bitfld.long 0x00 7. " IC2 ,Inter-Chip transceiver enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " IC_VDD2 ,PIt selects which voltage is being supplied to the peripheral through each port" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..." endif sif (!cpuis("IMX6*")) group.long (0x170+0x600)++0x03 line.long 0x00 "UH3_ULPIVIEW,ULPI Vieport Register" bitfld.long 0x00 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Read/Write Run" "No effect,Read/write" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Not normal,Normal" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write" endif sif (cpuis("IMX6*")||cpuis("RAYLEIGH-CA7")) endif sif (cpuis("K70*")&&(cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")) rgroup.long (0x180+0x600)++0x03 line.long 0x00 "UH3_CFGFLAG,Config Flag Register (Reserved)" else rgroup.long (0x180+0x600)++0x03 line.long 0x00 "UH3_CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "Low,High" endif if ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x3) group.long (0x184+0x600)++0x03 line.long 0x00 "UH3_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " else bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " endif sif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " sif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" rbitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" sif (!cpuis("K70*")&&!cpuis("IMX6*")&&!cpuis("RAYLEIGH-CA7")) group.long (0x184+0x600+0x04)++0x1B line.long 0x00 "UH3_PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x00 13. " PO ,Port Owner" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x04 "UH3_PORTSC3,Port 3 Status and Control Register" bitfld.long 0x04 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x04 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x04 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x04 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x04 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x04 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x04 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x04 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x04 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x04 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x04 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x04 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x04 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x04 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x04 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x04 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x04 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x04 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x04 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x04 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x04 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x08 "UH3_PORTSC4,Port 4 Status and Control Register" bitfld.long 0x08 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x08 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x08 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x08 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x08 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x08 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x08 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x08 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x08 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x08 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x08 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x08 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x08 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x08 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x08 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x08 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x08 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x08 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x08 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x08 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x08 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x08 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x08 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x0C "UH3_PORTSC5,Port 5 Status and Control Register" bitfld.long 0x0C 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x0C 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x0C 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x0C 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x0C 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x0C 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x0C 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x0C 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x0C 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x0C 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x0C 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x0C 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x0C 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x0C 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x0C 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x0C 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x0C 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x0C 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x0C 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x0C 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0C 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x10 "UH3_PORTSC6,Port 6 Status and Control Register" bitfld.long 0x10 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x10 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x10 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x10 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x10 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x10 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x10 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x10 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x10 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x10 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x10 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x10 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x10 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x10 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x10 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x10 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x10 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x10 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x10 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x10 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x10 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x10 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x14 "UH3_PORTSC7,Port 7 Status and Control Register" bitfld.long 0x14 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x14 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x14 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x14 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x14 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x14 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x14 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x14 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" bitfld.long 0x14 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x14 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x14 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," textline " " bitfld.long 0x14 13. " PO ,Port Owner (Reserved)" "Cleared,Set" bitfld.long 0x14 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x14 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x14 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" textline " " bitfld.long 0x14 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x14 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x14 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x14 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x14 4. " OCA ,Over-current Active" "Not over-current,Over-current" eventfld.long 0x14 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x14 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x14 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x14 0. " CCS ,Current Connect Status" "No device,Device" line.long 0x18 "UH3_PORTSC8,Port 8 Status and Control Register" bitfld.long 0x18 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" bitfld.long 0x18 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x18 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" bitfld.long 0x18 26.--27. " PSPD ,Port Speed" "Full,Low,High," textline " " bitfld.long 0x18 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" bitfld.long 0x18 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x18 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" bitfld.long 0x18 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x18 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." bitfld.long 0x18 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green," bitfld.long 0x18 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x18 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x18 10.--11. " LS ,Line Status" "SE0,J-state,K-state," bitfld.long 0x18 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" bitfld.long 0x18 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x18 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x18 6. " FPR ,Force Port Resume" "Not forced,Forced" eventfld.long 0x18 5. " OCC ,Over-current Change" "Not changed,Changed" bitfld.long 0x18 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x18 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x18 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x18 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x18 0. " CCS ,Current Connect Status" "No device,Device" endif elif ((per.l(0x600+ad:0x02184000+0x1a8)&0x3)==0x2) group.long (0x184+0x600)++0x03 line.long 0x00 "UH3_PORTSC1,Port 1 Status and Control Register" sif (cpuis("RAYLEIGH-CA7"))||(cpu()=="IMX6SOLOLITE") bitfld.long 0x00 25. 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial,HSIC,?..." textline " " elif (cpuis("IMX6*")) bitfld.long 0x00 30.--31. " PTS ,Parallel Transceiver Select" "UTMI/UTMI+,,ULPI,Serial" textline " " elif (!cpuis("K70*")) bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected" bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,16-bit" textline " " elif (cpuis("IMX6*"))&&(cpu()!="IMX6SOLOLITE") bitfld.long 0x00 25. " PTS[2] ,Parallel Transceiver Select - RW" "No effect,UTMI for HSIC PHY" textline " " endif bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full,Low,High,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY Low Power Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDC ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC[3:0] ,Port Test Control" "Disabled,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port Owner (Reserved)" "Cleared,Set" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Not available,Available" bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,Undefined" textline " " rbitfld.long 0x00 9. " HSP ,High-Speed Port" "Not high-speed,High-speed" rbitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not forced,Forced" textline " " eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" rbitfld.long 0x00 4. " OCA ,Over-current Active" "Not over-current,Over-current" textline " " eventfld.long 0x00 3. " PEC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PE ,Port Enabled/Disabled" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current Connect Status" "Not attached,Attached" else sif (!cpuis("K70*")&&!cpuis("IMX6*")) hgroup.long (0x184+0x600)++0x1f hide.long 0x00 "UH3_PORTSC1,Port 1 Status and Control Register" hide.long 0x04 "UH3_PORTSC2,Port 2 Status and Control Register" hide.long 0x08 "UH3_PORTSC3,Port 3 Status and Control Register" hide.long 0x0c "UH3_PORTSC4,Port 4 Status and Control Register" hide.long 0x10 "UH3_PORTSC5,Port 5 Status and Control Register" hide.long 0x14 "UH3_PORTSC6,Port 6 Status and Control Register" hide.long 0x18 "UH3_PORTSC7,Port 7 Status and Control Register" hide.long 0x1c "UH3_PORTSC8,Port 8 Status and Control Register" endif endif textline " " textline " " group.long (0x1a8+0x600)++0x03 line.long 0x00 "UH3_USBMODE,USB Device Mode Register" bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="RAYLEIGH-CA7")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Enabled,Disabled" else textline " " bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big" bitfld.long 0x00 0.--1. " CM[1:0] ,Controller Mode" "Idle,,Device,Host" textline " " textline " " sif (cpu()!="IMX6DUAL")&&(cpu()!="IMX6QUAD")&&(cpu()!="IMX6SOLO")&&(cpu()!="IMX6DUALLITE")&&(cpu()!="IMX6SOLOLITE") group.long (0x770+0x600)++0x03 line.long 0x00 "USB_UH3_ULPIVIEW,ULPI Viewport" eventfld.long 0x00 31. " ULPIWU ,ULPI wake-up" "No,Yes" eventfld.long 0x00 30. " ULPIRUN ,ULPI Run " "No,Yes" bitfld.long 0x00 29. " ULPIRW ,ULPI Read/Write Control" "Read,Wrtie" bitfld.long 0x00 27. " ULPISS ,ULPI Sync State" "Different state,Sync state" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,ULPI Data Address" hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,ULPI Data Read" hexmask.long.byte 0x00 0.--7. 1. " ULPIDATWR ,ULPI Data Write " endif width 0x0B tree.end tree.end width 20. tree "USB Non-core Registers" group.long 0x800++0x1F line.long 0x00 "USB_OTG_CTRL,USB OTG Control Register" rbitfld.long 0x00 31. " WIR ,OTG Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x00 17. " WKUP_VBUS_EN ,OTG wake-up on VBUS change enable" "Disabled,Enabled" bitfld.long 0x00 16. " WKUP_ID_EN ,OTG Wake-up on ID change enable" "Disabled,Enabled" bitfld.long 0x00 15. " WKUP_SW ,OTG Software Wake-up" "Inactive,Wake-up" textline " " bitfld.long 0x00 14. " WKUP_SW_EN ,OTG Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x00 13. " UTMI_ON_CLOCK ,Force OTG UTMI PHY clock output on even if suspend mode" "Not forced,Forced" bitfld.long 0x00 12. " SUSPENDM ,Force OTG UTMI PHY Suspend" "Suspended,Inactive" bitfld.long 0x00 11. " RESET ,Force OTG UTMI PHY Reset" "Inactive,Reset" textline " " bitfld.long 0x00 10. " WIE ,OTG Wake-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " PWR_POL ,OTG Power Polarity" "Low,High" bitfld.long 0x00 8. " OVER_CUR_POL ,OTG Polarity of Overcurrent" "High,Low" bitfld.long 0x00 7. " OVER_CUR_DIS ,Disable OTG Overcurrent Detection" "No,Yes" line.long 0x04 "USB_UH1_CTRL,USB Host1 Control Register" rbitfld.long 0x04 31. " WIR ,Host 1 Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x04 17. " WKUP_VBUS_EN ,Host 1 VBUS wake-up Enable" "Disabled,Enabled" bitfld.long 0x04 16. " WKUP_ID_EN ,Host 1 Wake-up on ID change enable" "Disabled,Enabled" bitfld.long 0x04 15. " WKUP_SW ,Host 1 Software Wake-up" "Inactive,Wake-up" textline " " bitfld.long 0x04 14. " WKUP_SW_EN ,Host 1 Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x04 13. " UTMI_ON_CLOCK ,Force Host 1 UTMI PHY clock output on even if in low-power suspend mode" "Disabled,Enabled" bitfld.long 0x04 12. " SUSPENDM ,Force Host 1 UTMI PHY Suspend" "Enabled,Disabled" bitfld.long 0x04 11. " RESET ,Host 1 UTMI PHY Reset" "Inactive,Reset" textline " " bitfld.long 0x04 10. " WIE ,Host 1 Wake-up Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 9. " PWR_POL ,Host 1 Power Polarity" "Low,High" bitfld.long 0x04 8. " OVER_CUR_POL ,Host 1 Polarity of Overcurrent" "High,Low" bitfld.long 0x04 7. " OVER_CUR_DIS ,Disable Host 1 Overcurrent Detection" "No,Yes" line.long 0x08 "USB_UH2_CTRL,USB Host2 Control Register" rbitfld.long 0x08 31. " WIR ,Host 2 Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x08 15. " WKUP_SW ,Host 2 Software Wake-up" "Inactive,Wake-up" bitfld.long 0x08 14. " WKUP_SW_EN ,Host 2 Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x08 13. " 480_CLK_ON ,Force OTG UTMI PHY 480M clock output on when Host 2 is not in suspend mode" "Inactive,Forced" textline " " bitfld.long 0x08 12. " SUSPENDM ,Host 2 UTMI PHY Suspend" "Enabled,Disabled" bitfld.long 0x08 11. " RESET ,Host 2 UTMI PHY Reset" "Inactive,Reset" bitfld.long 0x08 10. " WIE ,Host 2 Wake-up Interrupt Enable" "Disabled,Enabled" line.long 0x0C "USB_UH3_CTRL,USB Host3 Control Register" rbitfld.long 0x0C 31. " WIR ,Host 3 Wake-up Interrupt Request" "Not requested,Requested" bitfld.long 0x0C 15. " WKUP_SW ,Host 3 Software Wake-up" "Inactive,Wake-up" bitfld.long 0x0C 14. " WKUP_SW_EN ,Host 3 Software Wake-up Enable" "Disabled,Enabled" bitfld.long 0x0C 13. " 480_CLK_ON ,Force OTG UTMI PHY 480M clock output on when Host 3 is not in suspend mode" "Inactive,Forced" textline " " bitfld.long 0x0C 12. " SUSPENDM ,Host 3 UTMI PHY Suspend" "Enabled,Disabled" bitfld.long 0x0C 11. " RESET ,Host 3 UTMI PHY Reset" "Inactive,Reset" bitfld.long 0x0C 10. " WIE ,Host 3 Wake-up Interrupt Enable" "Disabled,Enabled" line.long 0x10 "USB_UH2_HSIC_CTRL,USB Host2 High Speed Inter-Chip Control Register" rbitfld.long 0x10 31. " CLK_VLD , Host2 HSIC clock valid" "Invalid,Valid" bitfld.long 0x10 12. " HSIC_EN ,Host2 HSIC enable" "Disabled,Enabled" bitfld.long 0x10 11. " HSIC_CLK_ON ,Force Host2 HSIC module 480M clock on" "Inactive,Active" line.long 0x14 "USB_UH3_HSIC_CTRL,USB Host3 High Speed Inter-Chip Control Register" rbitfld.long 0x14 31. " CLK_VLD , Host3 HSIC clock valid" "Invalid,Valid" bitfld.long 0x14 12. " HSIC_EN ,Host3 HSIC enable" "Disabled,Enabled" bitfld.long 0x14 11. " HSIC_CLK_ON ,Force Host3 HSIC module 480M clock on" "Inactive,Active" line.long 0x18 "USB_OTG_PHY_CTRL_0,OTG UTMI PHY Control Register 0" bitfld.long 0x18 31. " UTMI_CLK_VLD ,UTMI PHY Clock Valid" "Invalid,Valid" line.long 0x1C "USB_UH1_PHY_CTRL_0,USB Host1 UTMI PHY Control Register 0" bitfld.long 0x1C 31. " UTMI_CLK_VLD ,UTMI PHY Clock Valid" "Invalid,Valid" tree.end endif width 0x0B tree.end tree.open "USB-PHY (Universal Serial Bus 2.0 Integrated PHY)" tree "PHY1" base ad:0x020C9000 width 29. group.long 0x00++0x43 line.long 0x00 "HW_USBPHY1_PWD,USB PHY Power-Down Register" bitfld.long 0x00 20. " RXPWDRX ,Receiver block power-down" "Normal,Power-down" bitfld.long 0x00 19. " RXPWDDIFF ,High-speed differential receiver power-down" "Normal,Power-down" bitfld.long 0x00 18. " RXPWD1PT1 ,Full-speed differential receiver power-down" "Normal,Power-down" textline " " bitfld.long 0x00 17. " RXPWDENV ,High-speed receiver envelope detector power-down" "Normal,Power-down" bitfld.long 0x00 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down" "Normal,Power-down" bitfld.long 0x00 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down" "Normal,Power-down" textline " " bitfld.long 0x00 10. " TXPWDFS ,Full-speed drivers power-down" "Normal,Power-down" line.long 0x04 "HW_USBPHY1_PWD_SET,USB PHY Power-Down Set Register" bitfld.long 0x04 20. " RXPWDRX ,Receiver block power-down set" "No effect,Set" bitfld.long 0x04 19. " RXPWDDIFF ,High-speed differential receiver power-down set" "No effect,Set" bitfld.long 0x04 18. " RXPWD1PT1 ,Full-speed differential receiver power-down set" "No effect,Set" textline " " bitfld.long 0x04 17. " RXPWDENV ,High-speed receiver envelope detector power-down set" "No effect,Set" bitfld.long 0x04 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down set" "No effect,Set" bitfld.long 0x04 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down set" "No effect,Set" textline " " bitfld.long 0x04 10. " TXPWDFS ,Full-speed drivers power-down" "No effect,Set" line.long 0x08 "HW_USBPHY1_PWD_CLR,USB PHY Power-Down Clear Register" bitfld.long 0x08 20. " RXPWDRX ,Receiver block power-down clear" "No effect,Clear" bitfld.long 0x08 19. " RXPWDDIFF ,High-speed differential receiver power-down clear" "No effect,Clear" bitfld.long 0x08 18. " RXPWD1PT1 ,Full-speed differential receiver power-down clear" "No effect,Clear" textline " " bitfld.long 0x08 17. " RXPWDENV ,High-speed receiver envelope detector power-down clear" "No effect,Clear" bitfld.long 0x08 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down clear" "No effect,Clear" bitfld.long 0x08 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down clear" "No effect,Clear" textline " " bitfld.long 0x08 10. " TXPWDFS ,Full-speed drivers power-down clear" "No effect,Clear" line.long 0x0C "HW_USBPHY1_PWD_TOG,USB PHY Power-Down Toggle Register" bitfld.long 0x0C 20. " RXPWDRX ,Receiver block power-down toggle" "No effect,Toggled" bitfld.long 0x0C 19. " RXPWDDIFF ,High-speed differential receiver power-down toggle" "No effect,Toggled" bitfld.long 0x0C 18. " RXPWD1PT1 ,Full-speed differential receiver power-down toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 17. " RXPWDENV ,High-speed receiver envelope detector power-down toggle" "No effect,Toggled" bitfld.long 0x0C 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down toggle" "No effect,Toggled" bitfld.long 0x0C 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 10. " TXPWDFS ,Full-speed drivers power-down toggle" "No effect,Toggled" line.long 0x10 "HW_USBPHY1_TX,USB PHY Transmitter Control Register" bitfld.long 0x10 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x10 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x10 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x14 "HW_USBPHY1_TX_SET,USB PHY Transmitter Set Register" bitfld.long 0x14 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x14 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x14 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x18 "HW_USBPHY1_TX_CLR,USB PHY Transmitter Clear Register" bitfld.long 0x18 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x18 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x18 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x1C "HW_USBPHY1_TX_TOG,USB PHY Transmitter Toggle Register" bitfld.long 0x1C 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x1C 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x1C 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x20 "HW_USBPHY1_RX,USB PHY Receiver Control Register" bitfld.long 0x20 22. " RXDBYPASS ,Bypass" "Normal,Single-ended" bitfld.long 0x20 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x20 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x24 "HW_USBPHY1_RX_SET,USB PHY Receiver Set Register" bitfld.long 0x24 22. " RXDBYPASS ,Bypass set" "No effect,Set" bitfld.long 0x24 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x24 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x28 "HW_USBPHY1_RX_CLR,USB PHY Receiver Clear Register" bitfld.long 0x28 22. " RXDBYPASS ,Bypass clear" "No effect,Clear" bitfld.long 0x28 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x28 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x2C "HW_USBPHY1_RX_TOG,USB PHY Receiver Toggle Register" bitfld.long 0x2C 22. " RXDBYPASS ,Bypass toggle" "No effect,Toggled" bitfld.long 0x2C 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x2C 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x30 "HW_USBPHY1_CTRL,USB PHY General Control Register" bitfld.long 0x30 31. " SFTRST ,Soft reset" "No reset,Reset" bitfld.long 0x30 30. " CLKGATE ,Gate UTMI Clocks" "Running,Gated" rbitfld.long 0x30 29. " UTMI_SUSPENDM ,UTMI suspend mode" "Disabled,Enabled" textline " " bitfld.long 0x30 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing" "No effect,Low-speed" rbitfld.long 0x30 27. " OTG_ID_VALUE ,ID value" "A-side,B-side" bitfld.long 0x30 24. " FSDLL_RST_EN ,FSDLL reset enable" "Disabled,Enabled" textline " " bitfld.long 0x30 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended enable" "Disabled,Enabled" bitfld.long 0x30 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended enable" "Disabled,Enabled" bitfld.long 0x30 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended enable" "Disabled,Enabled" textline " " bitfld.long 0x30 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits enable" "Disabled,Enabled" bitfld.long 0x30 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit enable" "Disabled,Enabled" bitfld.long 0x30 17. " WAKEUP_IRQ ,Wake-up event" "No interrupt,Interrupt" textline " " bitfld.long 0x30 16. " ENIRQWAKEUP ,Interrupt for the wakeup events enable" "Disabled,Enabled" bitfld.long 0x30 15. " ENUTMILEVEL3 ,UTMI+ Level3 enable" "Disabled,Enabled" bitfld.long 0x30 14. " ENUTMILEVEL2 ,UTMI+ Level2 enable" "Disabled,Enabled" textline " " bitfld.long 0x30 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM enable" "Disabled,Enabled" bitfld.long 0x30 12. " DEVPLUGIN_IRQ ,Device connection" "No interrupt,Interrupt" bitfld.long 0x30 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line" "Disabled,Enabled" textline " " bitfld.long 0x30 10. " RESUME_IRQ ,Sending a wake-up after suspend" "Not sent,Sent" bitfld.long 0x30 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line enable" "Disabled,Enabled" bitfld.long 0x30 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit" "During wake-up,Until software clear" textline " " bitfld.long 0x30 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin enable" "Disabled,Enabled" bitfld.long 0x30 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt" "No interrupt,Interrupt" bitfld.long 0x30 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt" "Plugged in,Unplugged" textline " " bitfld.long 0x30 4. " ENDEVPLUGINDETECT ,200-KOhm pullups enable" "Disabled,Enabled" bitfld.long 0x30 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode" "Connected,Disconnected" bitfld.long 0x30 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector enable" "Disabled,Enabled" bitfld.long 0x30 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ enable" "Disabled,Enabled" line.long 0x34 "HW_USBPHY1_CTRL_SET,USB PHY General Control Set Register" bitfld.long 0x34 31. " SFTRST ,Soft reset set" "No effect,Set" bitfld.long 0x34 30. " CLKGATE ,Gate UTMI Clocks set" "No effect,Set" rbitfld.long 0x34 29. " UTMI_SUSPENDM ,UTMI suspend mode set" "No effect,Set" textline " " bitfld.long 0x34 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing set" "No effect,Set" rbitfld.long 0x34 27. " OTG_ID_VALUE ,ID value set" "No effect,Set" bitfld.long 0x34 24. " FSDLL_RST_EN ,FSDLL reset set" "No effect,Set" textline " " bitfld.long 0x34 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended set" "No effect,Set" bitfld.long 0x34 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended set" "No effect,Set" bitfld.long 0x34 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended set" "No effect,Set" textline " " bitfld.long 0x34 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits set" "No effect,Set" bitfld.long 0x34 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit set" "No effect,Set" bitfld.long 0x34 17. " WAKEUP_IRQ ,Wake-up event set" "No effect,Set" textline " " bitfld.long 0x34 16. " ENIRQWAKEUP ,Interrupt for the wakeup events set" "No effect,Set" bitfld.long 0x34 15. " ENUTMILEVEL3 ,UTMI+ Level3 set" "No effect,Set" bitfld.long 0x34 14. " ENUTMILEVEL2 ,UTMI+ Level2 set" "No effect,Set" textline " " bitfld.long 0x34 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM set" "No effect,Set" bitfld.long 0x34 12. " DEVPLUGIN_IRQ ,Device connection set" "No effect,Set" bitfld.long 0x34 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line set" "No effect,Set" textline " " bitfld.long 0x34 10. " RESUME_IRQ ,Sending a wake-up after suspend set" "No effect,Set" bitfld.long 0x34 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line set" "No effect,Set" bitfld.long 0x34 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit set" "No effect,Set" textline " " bitfld.long 0x34 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin set" "No effect,Set" bitfld.long 0x34 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt set" "No effect,Set" bitfld.long 0x34 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt set" "No effect,Set" textline " " bitfld.long 0x34 4. " ENDEVPLUGINDETECT ,200-KOhm pullups set" "No effect,Set" bitfld.long 0x34 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode set" "No effect,Set" bitfld.long 0x34 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt set" "No effect,Set" textline " " bitfld.long 0x34 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector set" "No effect,Set" bitfld.long 0x34 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ set" "No effect,Set" line.long 0x38 "HW_USBPHY1_CTRL_CLR,USB PHY General Control Clear Register" bitfld.long 0x38 31. " SFTRST ,Soft reset clear" "No effect,Clear" bitfld.long 0x38 30. " CLKGATE ,Gate UTMI Clocks clear" "No effect,Clear" rbitfld.long 0x38 29. " UTMI_SUSPENDM ,UTMI suspend mode clear" "No effect,Clear" textline " " bitfld.long 0x38 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing clear" "No effect,Clear" rbitfld.long 0x38 27. " OTG_ID_VALUE ,ID value clear" "No effect,Clear" bitfld.long 0x38 24. " FSDLL_RST_EN ,FSDLL reset clear" "No effect,Clear" textline " " bitfld.long 0x38 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended clear" "No effect,Clear" bitfld.long 0x38 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended clear" "No effect,Clear" bitfld.long 0x38 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended clear" "No effect,Clear" textline " " bitfld.long 0x38 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits clear" "No effect,Clear" bitfld.long 0x38 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit clear" "No effect,Clear" bitfld.long 0x38 17. " WAKEUP_IRQ ,Wake-up event clear" "No effect,Clear" textline " " bitfld.long 0x38 16. " ENIRQWAKEUP ,Interrupt for the wakeup events clear" "No effect,Clear" bitfld.long 0x38 15. " ENUTMILEVEL3 ,UTMI+ Level3 clear" "No effect,Clear" bitfld.long 0x38 14. " ENUTMILEVEL2 ,UTMI+ Level2 clear" "No effect,Clear" textline " " bitfld.long 0x38 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM clear" "No effect,Clear" bitfld.long 0x38 12. " DEVPLUGIN_IRQ ,Device connection clear" "No effect,Clear" bitfld.long 0x38 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line clear" "No effect,Clear" textline " " bitfld.long 0x38 10. " RESUME_IRQ ,Sending a wake-up after suspend clear" "No effect,Clear" bitfld.long 0x38 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line clear" "No effect,Clear" bitfld.long 0x38 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit clear" "No effect,Clear" textline " " bitfld.long 0x38 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin clear" "No effect,Clear" bitfld.long 0x38 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt clear" "No effect,Clear" bitfld.long 0x38 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt clear" "No effect,Clear" textline " " bitfld.long 0x38 4. " ENDEVPLUGINDETECT ,200-KOhm pullups clear" "No effect,Clear" bitfld.long 0x38 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode clear" "No effect,Clear" bitfld.long 0x38 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt clear" "No effect,Clear" textline " " bitfld.long 0x38 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector clear" "No effect,Clear" bitfld.long 0x38 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ clear" "No effect,Clear" line.long 0x3C "HW_USBPHY1_CTRL_TOG,USB PHY General Control Toggle Register" bitfld.long 0x3C 31. " SFTRST ,Soft reset toggle" "No effect,Toggled" bitfld.long 0x3C 30. " CLKGATE ,Gate UTMI Clocks toggle" "No effect,Toggled" rbitfld.long 0x3C 29. " UTMI_SUSPENDM ,UTMI suspend mode toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing toggle" "No effect,Toggled" rbitfld.long 0x3C 27. " OTG_ID_VALUE ,ID value toggle" "No effect,Toggled" bitfld.long 0x3C 24. " FSDLL_RST_EN ,FSDLL reset clear toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended toggle" "No effect,Toggled" bitfld.long 0x3C 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended toggle" "No effect,Toggled" bitfld.long 0x3C 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits toggle" "No effect,Toggled" bitfld.long 0x3C 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit toggle" "No effect,Toggled" bitfld.long 0x3C 17. " WAKEUP_IRQ ,Wake-up event toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 16. " ENIRQWAKEUP ,Interrupt for the wakeup events toggle" "No effect,Toggled" bitfld.long 0x3C 15. " ENUTMILEVEL3 ,UTMI+ Level3 toggle" "No effect,Toggled" bitfld.long 0x3C 14. " ENUTMILEVEL2 ,UTMI+ Level2 toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM toggle" "No effect,Toggled" bitfld.long 0x3C 12. " DEVPLUGIN_IRQ ,Device connection toggle" "No effect,Toggled" bitfld.long 0x3C 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 10. " RESUME_IRQ ,Sending a wake-up after suspend toggle" "No effect,Toggled" bitfld.long 0x3C 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line toggle" "No effect,Toggled" bitfld.long 0x3C 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin toggle" "No effect,Toggled" bitfld.long 0x3C 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt toggle" "No effect,Toggled" bitfld.long 0x3C 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 4. " ENDEVPLUGINDETECT ,200-KOhm pullups toggle" "No effect,Toggled" bitfld.long 0x3C 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode toggle" "No effect,Toggled" bitfld.long 0x3C 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector toggle" "No effect,Toggled" bitfld.long 0x3C 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ toggle" "No effect,Toggled" line.long 0x40 "HW_USBPHY1_STATUS,USB PHY Status Register" rbitfld.long 0x40 10. " RESUME_STATUS ,Wake-up after suspend sent - interrupt" "No interrupt,Interrupt" bitfld.long 0x40 8. " OTGID_STATUS ,OTGID status" "A-side,B-side" rbitfld.long 0x40 6. " DEVPLUGIN_STATUS ,Device connection on USP_DP and USB_DM lines" "Not connected,Connected" textline " " rbitfld.long 0x40 3. " HOSTDISCONDETECT_STATUS ,Device disconnected in high-speed host mode" "Not disconnected,Disconnected" group.long 0x50++0x0F line.long 0x00 "HW_USBPHY1_DEBUG,USB PHY Debug Register" bitfld.long 0x00 30. " CLKGATE ,Gate Test Clocks" "Running,Gated" bitfld.long 0x00 29. " HOST_RESUME_DEBUG ,Host resume debug" "HOST_FORCE_LS_SE0,UTMI_SUSPEND" bitfld.long 0x00 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 24. " ENSQUELCHRESET ,Squelch high-speed receive reset enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12. " ENTX2RXCOUNT ,Countdown to transition in between TX and RX enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override" "Not overrided,Overrided" bitfld.long 0x00 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override" "Not overrided,Overrided" textline " " bitfld.long 0x00 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP" "No effect,Pulled down" bitfld.long 0x00 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM" "No effect,Pulled down" bitfld.long 0x00 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold" "Not assisted,Assisted" textline " " bitfld.long 0x00 0. " OTGIDPIOLOCK ,OTG ID lock" "Not locked,Locked" line.long 0x04 "HW_USBPHY1_DEBUG_SET,USB PHY Debug Set Register" bitfld.long 0x04 30. " CLKGATE ,Gate Test Clocks Set" "No effect,Set" bitfld.long 0x04 29. " HOST_RESUME_DEBUG ,Host resume debug set" "No effect,Set" bitfld.long 0x04 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 24. " ENSQUELCHRESET ,Squelch high-speed receive reset set" "No effect,Set" bitfld.long 0x04 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 12. " ENTX2RXCOUNT ,Transition in between TX and RX set" "No effect,Set" textline " " bitfld.long 0x04 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x04 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override set" "No effect,Set" bitfld.long 0x04 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override set" "No effect,Set" textline " " bitfld.long 0x04 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP set" "No effect,Set" bitfld.long 0x04 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM set" "No effect,Set" bitfld.long 0x04 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold set" "No effect,Set" textline " " bitfld.long 0x04 0. " OTGIDPIOLOCK ,OTG ID lock set" "No effect,Set" line.long 0x08 "HW_USBPHY1_DEBUG_CLR,USB PHY Debug Clear Register" bitfld.long 0x08 30. " CLKGATE ,Gate Test Clocks clear" "No effect,Clear" bitfld.long 0x08 29. " HOST_RESUME_DEBUG ,Host resume debug clear" "No effect,Clear" bitfld.long 0x08 25.--28. " SQUELCHRESETLENGTH ,Duration of REclear clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 24. " ENSQUELCHRESET ,Squelch high-speed receive reclear clear" "No effect,Clear" bitfld.long 0x08 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 12. " ENTX2RXCOUNT ,Transition in between TX and RX clear" "No effect,Clear" textline " " bitfld.long 0x08 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x08 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override clear" "No effect,Clear" bitfld.long 0x08 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override clear" "No effect,Clear" textline " " bitfld.long 0x08 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP clear" "No effect,Clear" bitfld.long 0x08 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM clear" "No effect,Clear" bitfld.long 0x08 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold clear" "No effect,Clear" textline " " bitfld.long 0x08 0. " OTGIDPIOLOCK ,OTG ID lock clear" "No effect,Clear" line.long 0x0C "HW_USBPHY1_DEBUG_TOG,USB PHY Debug Toggle Register" bitfld.long 0x0C 30. " CLKGATE ,Gate Test Clocks toggle" "No effect,Toggled" bitfld.long 0x0C 29. " HOST_RESUME_DEBUG ,Host resume debug toggle" "No effect,Toggled" bitfld.long 0x0C 25.--28. " SQUELCHRESETLENGTH ,Duration of REtoggle toggle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 24. " ENSQUELCHRESET ,Squelch high-speed receive retoggle toggle" "No effect,Toggled" bitfld.long 0x0C 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX toggle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 12. " ENTX2RXCOUNT ,Transition in between TX and RX toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x0C 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override toggle" "No effect,Toggled" bitfld.long 0x0C 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP toggle" "No effect,Toggled" bitfld.long 0x0C 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM toggle" "No effect,Toggled" bitfld.long 0x0C 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 0. " OTGIDPIOLOCK ,OTG ID lock toggle" "No effect,Toggled" rgroup.long 0x60++0x03 line.long 0x00 "HW_USBPHY1_DEBUG0_STATUS,UTMI Debug Status Register 0" bitfld.long 0x00 26.--31. " SQUELCH_COUNT ,Running count of the squelch reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 16.--25. 1. " UTMI_RXERROR_FAIL_COUNT ,UTMI_RXERROR running count" hexmask.long.word 0x00 0.--15. 1. " LOOP_BACK_FAIL_COUNT ,Failed pseudo-random generator loopback running count" group.long 0x70++0x0F line.long 0x00 "HW_USBPHY1_DEBUG1,UTMI Debug Status Register 1" bitfld.long 0x00 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x04 "HW_USBPHY1_DEBUG1_SET,UTMI Debug Set Register 1" bitfld.long 0x04 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x08 "HW_USBPHY1_DEBUG1_CLR,UTMI Debug Clear Register 1" bitfld.long 0x08 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x0C "HW_USBPHY1_DEBUG1_TOG,UTMI Debug Toggle Register 1" bitfld.long 0x0C 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" rgroup.long 0x80++0x03 line.long 0x00 "HW_USBPHY1_VERSION,UTMI RTL Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of the RTL version" width 0x0B tree.end tree "PHY2" base ad:0x020CA000 width 29. group.long 0x00++0x43 line.long 0x00 "HW_USBPHY2_PWD,USB PHY Power-Down Register" bitfld.long 0x00 20. " RXPWDRX ,Receiver block power-down" "Normal,Power-down" bitfld.long 0x00 19. " RXPWDDIFF ,High-speed differential receiver power-down" "Normal,Power-down" bitfld.long 0x00 18. " RXPWD1PT1 ,Full-speed differential receiver power-down" "Normal,Power-down" textline " " bitfld.long 0x00 17. " RXPWDENV ,High-speed receiver envelope detector power-down" "Normal,Power-down" bitfld.long 0x00 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down" "Normal,Power-down" bitfld.long 0x00 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down" "Normal,Power-down" textline " " bitfld.long 0x00 10. " TXPWDFS ,Full-speed drivers power-down" "Normal,Power-down" line.long 0x04 "HW_USBPHY2_PWD_SET,USB PHY Power-Down Set Register" bitfld.long 0x04 20. " RXPWDRX ,Receiver block power-down set" "No effect,Set" bitfld.long 0x04 19. " RXPWDDIFF ,High-speed differential receiver power-down set" "No effect,Set" bitfld.long 0x04 18. " RXPWD1PT1 ,Full-speed differential receiver power-down set" "No effect,Set" textline " " bitfld.long 0x04 17. " RXPWDENV ,High-speed receiver envelope detector power-down set" "No effect,Set" bitfld.long 0x04 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down set" "No effect,Set" bitfld.long 0x04 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down set" "No effect,Set" textline " " bitfld.long 0x04 10. " TXPWDFS ,Full-speed drivers power-down" "No effect,Set" line.long 0x08 "HW_USBPHY2_PWD_CLR,USB PHY Power-Down Clear Register" bitfld.long 0x08 20. " RXPWDRX ,Receiver block power-down clear" "No effect,Clear" bitfld.long 0x08 19. " RXPWDDIFF ,High-speed differential receiver power-down clear" "No effect,Clear" bitfld.long 0x08 18. " RXPWD1PT1 ,Full-speed differential receiver power-down clear" "No effect,Clear" textline " " bitfld.long 0x08 17. " RXPWDENV ,High-speed receiver envelope detector power-down clear" "No effect,Clear" bitfld.long 0x08 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down clear" "No effect,Clear" bitfld.long 0x08 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down clear" "No effect,Clear" textline " " bitfld.long 0x08 10. " TXPWDFS ,Full-speed drivers power-down clear" "No effect,Clear" line.long 0x0C "HW_USBPHY2_PWD_TOG,USB PHY Power-Down Toggle Register" bitfld.long 0x0C 20. " RXPWDRX ,Receiver block power-down toggle" "No effect,Toggled" bitfld.long 0x0C 19. " RXPWDDIFF ,High-speed differential receiver power-down toggle" "No effect,Toggled" bitfld.long 0x0C 18. " RXPWD1PT1 ,Full-speed differential receiver power-down toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 17. " RXPWDENV ,High-speed receiver envelope detector power-down toggle" "No effect,Toggled" bitfld.long 0x0C 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down toggle" "No effect,Toggled" bitfld.long 0x0C 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 10. " TXPWDFS ,Full-speed drivers power-down toggle" "No effect,Toggled" line.long 0x10 "HW_USBPHY2_TX,USB PHY Transmitter Control Register" bitfld.long 0x10 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x10 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x10 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x14 "HW_USBPHY2_TX_SET,USB PHY Transmitter Set Register" bitfld.long 0x14 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x14 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x14 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x18 "HW_USBPHY2_TX_CLR,USB PHY Transmitter Clear Register" bitfld.long 0x18 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x18 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x18 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x1C "HW_USBPHY2_TX_TOG,USB PHY Transmitter Toggle Register" bitfld.long 0x1C 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x1C 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)" bitfld.long 0x1C 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%" line.long 0x20 "HW_USBPHY2_RX,USB PHY Receiver Control Register" bitfld.long 0x20 22. " RXDBYPASS ,Bypass" "Normal,Single-ended" bitfld.long 0x20 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x20 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x24 "HW_USBPHY2_RX_SET,USB PHY Receiver Set Register" bitfld.long 0x24 22. " RXDBYPASS ,Bypass set" "No effect,Set" bitfld.long 0x24 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x24 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x28 "HW_USBPHY2_RX_CLR,USB PHY Receiver Clear Register" bitfld.long 0x28 22. " RXDBYPASS ,Bypass clear" "No effect,Clear" bitfld.long 0x28 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x28 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x2C "HW_USBPHY2_RX_TOG,USB PHY Receiver Toggle Register" bitfld.long 0x2C 22. " RXDBYPASS ,Bypass toggle" "No effect,Toggled" bitfld.long 0x2C 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..." bitfld.long 0x2C 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..." line.long 0x30 "HW_USBPHY2_CTRL,USB PHY General Control Register" bitfld.long 0x30 31. " SFTRST ,Soft reset" "No reset,Reset" bitfld.long 0x30 30. " CLKGATE ,Gate UTMI Clocks" "Running,Gated" rbitfld.long 0x30 29. " UTMI_SUSPENDM ,UTMI suspend mode" "Disabled,Enabled" textline " " bitfld.long 0x30 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing" "No effect,Low-speed" rbitfld.long 0x30 27. " OTG_ID_VALUE ,ID value" "A-side,B-side" bitfld.long 0x30 24. " FSDLL_RST_EN ,FSDLL reset enable" "Disabled,Enabled" textline " " bitfld.long 0x30 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended enable" "Disabled,Enabled" bitfld.long 0x30 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended enable" "Disabled,Enabled" bitfld.long 0x30 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended enable" "Disabled,Enabled" textline " " bitfld.long 0x30 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits enable" "Disabled,Enabled" bitfld.long 0x30 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit enable" "Disabled,Enabled" bitfld.long 0x30 17. " WAKEUP_IRQ ,Wake-up event" "No interrupt,Interrupt" textline " " bitfld.long 0x30 16. " ENIRQWAKEUP ,Interrupt for the wakeup events enable" "Disabled,Enabled" bitfld.long 0x30 15. " ENUTMILEVEL3 ,UTMI+ Level3 enable" "Disabled,Enabled" bitfld.long 0x30 14. " ENUTMILEVEL2 ,UTMI+ Level2 enable" "Disabled,Enabled" textline " " bitfld.long 0x30 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM enable" "Disabled,Enabled" bitfld.long 0x30 12. " DEVPLUGIN_IRQ ,Device connection" "No interrupt,Interrupt" bitfld.long 0x30 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line" "Disabled,Enabled" textline " " bitfld.long 0x30 10. " RESUME_IRQ ,Sending a wake-up after suspend" "Not sent,Sent" bitfld.long 0x30 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line enable" "Disabled,Enabled" bitfld.long 0x30 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit" "During wake-up,Until software clear" textline " " bitfld.long 0x30 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin enable" "Disabled,Enabled" bitfld.long 0x30 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt" "No interrupt,Interrupt" bitfld.long 0x30 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt" "Plugged in,Unplugged" textline " " bitfld.long 0x30 4. " ENDEVPLUGINDETECT ,200-KOhm pullups enable" "Disabled,Enabled" bitfld.long 0x30 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode" "Connected,Disconnected" bitfld.long 0x30 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector enable" "Disabled,Enabled" bitfld.long 0x30 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ enable" "Disabled,Enabled" line.long 0x34 "HW_USBPHY2_CTRL_SET,USB PHY General Control Set Register" bitfld.long 0x34 31. " SFTRST ,Soft reset set" "No effect,Set" bitfld.long 0x34 30. " CLKGATE ,Gate UTMI Clocks set" "No effect,Set" rbitfld.long 0x34 29. " UTMI_SUSPENDM ,UTMI suspend mode set" "No effect,Set" textline " " bitfld.long 0x34 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing set" "No effect,Set" rbitfld.long 0x34 27. " OTG_ID_VALUE ,ID value set" "No effect,Set" bitfld.long 0x34 24. " FSDLL_RST_EN ,FSDLL reset set" "No effect,Set" textline " " bitfld.long 0x34 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended set" "No effect,Set" bitfld.long 0x34 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended set" "No effect,Set" bitfld.long 0x34 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended set" "No effect,Set" textline " " bitfld.long 0x34 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits set" "No effect,Set" bitfld.long 0x34 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit set" "No effect,Set" bitfld.long 0x34 17. " WAKEUP_IRQ ,Wake-up event set" "No effect,Set" textline " " bitfld.long 0x34 16. " ENIRQWAKEUP ,Interrupt for the wakeup events set" "No effect,Set" bitfld.long 0x34 15. " ENUTMILEVEL3 ,UTMI+ Level3 set" "No effect,Set" bitfld.long 0x34 14. " ENUTMILEVEL2 ,UTMI+ Level2 set" "No effect,Set" textline " " bitfld.long 0x34 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM set" "No effect,Set" bitfld.long 0x34 12. " DEVPLUGIN_IRQ ,Device connection set" "No effect,Set" bitfld.long 0x34 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line set" "No effect,Set" textline " " bitfld.long 0x34 10. " RESUME_IRQ ,Sending a wake-up after suspend set" "No effect,Set" bitfld.long 0x34 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line set" "No effect,Set" bitfld.long 0x34 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit set" "No effect,Set" textline " " bitfld.long 0x34 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin set" "No effect,Set" bitfld.long 0x34 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt set" "No effect,Set" bitfld.long 0x34 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt set" "No effect,Set" textline " " bitfld.long 0x34 4. " ENDEVPLUGINDETECT ,200-KOhm pullups set" "No effect,Set" bitfld.long 0x34 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode set" "No effect,Set" bitfld.long 0x34 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt set" "No effect,Set" textline " " bitfld.long 0x34 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector set" "No effect,Set" bitfld.long 0x34 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ set" "No effect,Set" line.long 0x38 "HW_USBPHY2_CTRL_CLR,USB PHY General Control Clear Register" bitfld.long 0x38 31. " SFTRST ,Soft reset clear" "No effect,Clear" bitfld.long 0x38 30. " CLKGATE ,Gate UTMI Clocks clear" "No effect,Clear" rbitfld.long 0x38 29. " UTMI_SUSPENDM ,UTMI suspend mode clear" "No effect,Clear" textline " " bitfld.long 0x38 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing clear" "No effect,Clear" rbitfld.long 0x38 27. " OTG_ID_VALUE ,ID value clear" "No effect,Clear" bitfld.long 0x38 24. " FSDLL_RST_EN ,FSDLL reset clear" "No effect,Clear" textline " " bitfld.long 0x38 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended clear" "No effect,Clear" bitfld.long 0x38 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended clear" "No effect,Clear" bitfld.long 0x38 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended clear" "No effect,Clear" textline " " bitfld.long 0x38 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits clear" "No effect,Clear" bitfld.long 0x38 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit clear" "No effect,Clear" bitfld.long 0x38 17. " WAKEUP_IRQ ,Wake-up event clear" "No effect,Clear" textline " " bitfld.long 0x38 16. " ENIRQWAKEUP ,Interrupt for the wakeup events clear" "No effect,Clear" bitfld.long 0x38 15. " ENUTMILEVEL3 ,UTMI+ Level3 clear" "No effect,Clear" bitfld.long 0x38 14. " ENUTMILEVEL2 ,UTMI+ Level2 clear" "No effect,Clear" textline " " bitfld.long 0x38 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM clear" "No effect,Clear" bitfld.long 0x38 12. " DEVPLUGIN_IRQ ,Device connection clear" "No effect,Clear" bitfld.long 0x38 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line clear" "No effect,Clear" textline " " bitfld.long 0x38 10. " RESUME_IRQ ,Sending a wake-up after suspend clear" "No effect,Clear" bitfld.long 0x38 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line clear" "No effect,Clear" bitfld.long 0x38 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit clear" "No effect,Clear" textline " " bitfld.long 0x38 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin clear" "No effect,Clear" bitfld.long 0x38 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt clear" "No effect,Clear" bitfld.long 0x38 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt clear" "No effect,Clear" textline " " bitfld.long 0x38 4. " ENDEVPLUGINDETECT ,200-KOhm pullups clear" "No effect,Clear" bitfld.long 0x38 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode clear" "No effect,Clear" bitfld.long 0x38 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt clear" "No effect,Clear" textline " " bitfld.long 0x38 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector clear" "No effect,Clear" bitfld.long 0x38 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ clear" "No effect,Clear" line.long 0x3C "HW_USBPHY2_CTRL_TOG,USB PHY General Control Toggle Register" bitfld.long 0x3C 31. " SFTRST ,Soft reset toggle" "No effect,Toggled" bitfld.long 0x3C 30. " CLKGATE ,Gate UTMI Clocks toggle" "No effect,Toggled" rbitfld.long 0x3C 29. " UTMI_SUSPENDM ,UTMI suspend mode toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing toggle" "No effect,Toggled" rbitfld.long 0x3C 27. " OTG_ID_VALUE ,ID value toggle" "No effect,Toggled" bitfld.long 0x3C 24. " FSDLL_RST_EN ,FSDLL reset clear toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended toggle" "No effect,Toggled" bitfld.long 0x3C 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended toggle" "No effect,Toggled" bitfld.long 0x3C 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits toggle" "No effect,Toggled" bitfld.long 0x3C 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit toggle" "No effect,Toggled" bitfld.long 0x3C 17. " WAKEUP_IRQ ,Wake-up event toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 16. " ENIRQWAKEUP ,Interrupt for the wakeup events toggle" "No effect,Toggled" bitfld.long 0x3C 15. " ENUTMILEVEL3 ,UTMI+ Level3 toggle" "No effect,Toggled" bitfld.long 0x3C 14. " ENUTMILEVEL2 ,UTMI+ Level2 toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM toggle" "No effect,Toggled" bitfld.long 0x3C 12. " DEVPLUGIN_IRQ ,Device connection toggle" "No effect,Toggled" bitfld.long 0x3C 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 10. " RESUME_IRQ ,Sending a wake-up after suspend toggle" "No effect,Toggled" bitfld.long 0x3C 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line toggle" "No effect,Toggled" bitfld.long 0x3C 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin toggle" "No effect,Toggled" bitfld.long 0x3C 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt toggle" "No effect,Toggled" bitfld.long 0x3C 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 4. " ENDEVPLUGINDETECT ,200-KOhm pullups toggle" "No effect,Toggled" bitfld.long 0x3C 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode toggle" "No effect,Toggled" bitfld.long 0x3C 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt toggle" "No effect,Toggled" textline " " bitfld.long 0x3C 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector toggle" "No effect,Toggled" bitfld.long 0x3C 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ toggle" "No effect,Toggled" line.long 0x40 "HW_USBPHY2_STATUS,USB PHY Status Register" rbitfld.long 0x40 10. " RESUME_STATUS ,Wake-up after suspend sent - interrupt" "No interrupt,Interrupt" bitfld.long 0x40 8. " OTGID_STATUS ,OTGID status" "A-side,B-side" rbitfld.long 0x40 6. " DEVPLUGIN_STATUS ,Device connection on USP_DP and USB_DM lines" "Not connected,Connected" textline " " rbitfld.long 0x40 3. " HOSTDISCONDETECT_STATUS ,Device disconnected in high-speed host mode" "Not disconnected,Disconnected" group.long 0x50++0x0F line.long 0x00 "HW_USBPHY2_DEBUG,USB PHY Debug Register" bitfld.long 0x00 30. " CLKGATE ,Gate Test Clocks" "Running,Gated" bitfld.long 0x00 29. " HOST_RESUME_DEBUG ,Host resume debug" "HOST_FORCE_LS_SE0,UTMI_SUSPEND" bitfld.long 0x00 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 24. " ENSQUELCHRESET ,Squelch high-speed receive reset enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12. " ENTX2RXCOUNT ,Countdown to transition in between TX and RX enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override" "Not overrided,Overrided" bitfld.long 0x00 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override" "Not overrided,Overrided" textline " " bitfld.long 0x00 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP" "No effect,Pulled down" bitfld.long 0x00 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM" "No effect,Pulled down" bitfld.long 0x00 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold" "Not assisted,Assisted" textline " " bitfld.long 0x00 0. " OTGIDPIOLOCK ,OTG ID lock" "Not locked,Locked" line.long 0x04 "HW_USBPHY2_DEBUG_SET,USB PHY Debug Set Register" bitfld.long 0x04 30. " CLKGATE ,Gate Test Clocks Set" "No effect,Set" bitfld.long 0x04 29. " HOST_RESUME_DEBUG ,Host resume debug set" "No effect,Set" bitfld.long 0x04 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 24. " ENSQUELCHRESET ,Squelch high-speed receive reset set" "No effect,Set" bitfld.long 0x04 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 12. " ENTX2RXCOUNT ,Transition in between TX and RX set" "No effect,Set" textline " " bitfld.long 0x04 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x04 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override set" "No effect,Set" bitfld.long 0x04 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override set" "No effect,Set" textline " " bitfld.long 0x04 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP set" "No effect,Set" bitfld.long 0x04 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM set" "No effect,Set" bitfld.long 0x04 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold set" "No effect,Set" textline " " bitfld.long 0x04 0. " OTGIDPIOLOCK ,OTG ID lock set" "No effect,Set" line.long 0x08 "HW_USBPHY2_DEBUG_CLR,USB PHY Debug Clear Register" bitfld.long 0x08 30. " CLKGATE ,Gate Test Clocks clear" "No effect,Clear" bitfld.long 0x08 29. " HOST_RESUME_DEBUG ,Host resume debug clear" "No effect,Clear" bitfld.long 0x08 25.--28. " SQUELCHRESETLENGTH ,Duration of REclear clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 24. " ENSQUELCHRESET ,Squelch high-speed receive reclear clear" "No effect,Clear" bitfld.long 0x08 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 12. " ENTX2RXCOUNT ,Transition in between TX and RX clear" "No effect,Clear" textline " " bitfld.long 0x08 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x08 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override clear" "No effect,Clear" bitfld.long 0x08 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override clear" "No effect,Clear" textline " " bitfld.long 0x08 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP clear" "No effect,Clear" bitfld.long 0x08 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM clear" "No effect,Clear" bitfld.long 0x08 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold clear" "No effect,Clear" textline " " bitfld.long 0x08 0. " OTGIDPIOLOCK ,OTG ID lock clear" "No effect,Clear" line.long 0x0C "HW_USBPHY2_DEBUG_TOG,USB PHY Debug Toggle Register" bitfld.long 0x0C 30. " CLKGATE ,Gate Test Clocks toggle" "No effect,Toggled" bitfld.long 0x0C 29. " HOST_RESUME_DEBUG ,Host resume debug toggle" "No effect,Toggled" bitfld.long 0x0C 25.--28. " SQUELCHRESETLENGTH ,Duration of REtoggle toggle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 24. " ENSQUELCHRESET ,Squelch high-speed receive retoggle toggle" "No effect,Toggled" bitfld.long 0x0C 16.--20. " SQUELCHRESETCOUNT ,Delay in between the detection of squelch to the reset of high-speed RX toggle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 12. " ENTX2RXCOUNT ,Transition in between TX and RX toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x0C 5. " ENHSTPULLDOWN[1] ,ENHST pull down for USB_DP control override toggle" "No effect,Toggled" bitfld.long 0x0C 4. " ENHSTPULLDOWN[0] ,ENHST pull down for USB_DM control override toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP toggle" "No effect,Toggled" bitfld.long 0x0C 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM toggle" "No effect,Toggled" bitfld.long 0x0C 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 0. " OTGIDPIOLOCK ,OTG ID lock toggle" "No effect,Toggled" rgroup.long 0x60++0x03 line.long 0x00 "HW_USBPHY2_DEBUG0_STATUS,UTMI Debug Status Register 0" bitfld.long 0x00 26.--31. " SQUELCH_COUNT ,Running count of the squelch reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 16.--25. 1. " UTMI_RXERROR_FAIL_COUNT ,UTMI_RXERROR running count" hexmask.long.word 0x00 0.--15. 1. " LOOP_BACK_FAIL_COUNT ,Failed pseudo-random generator loopback running count" group.long 0x70++0x0F line.long 0x00 "HW_USBPHY2_DEBUG1,UTMI Debug Status Register 1" bitfld.long 0x00 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x04 "HW_USBPHY2_DEBUG1_SET,UTMI Debug Set Register 1" bitfld.long 0x04 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x08 "HW_USBPHY2_DEBUG1_CLR,UTMI Debug Clear Register 1" bitfld.long 0x08 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" line.long 0x0C "HW_USBPHY2_DEBUG1_TOG,UTMI Debug Toggle Register 1" bitfld.long 0x0C 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%" rgroup.long 0x80++0x03 line.long 0x00 "HW_USBPHY2_VERSION,UTMI RTL Version Register" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of the RTL version" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of the RTL version" hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of the RTL version" width 0x0B tree.end tree "Analog 1 (USB1 Analog)" base ad:0x020C81A0 width 18. group.long 0x00++0x1F line.long 0x00 "VBUS_DETECT,USB VBUS Detect Register" bitfld.long 0x00 27. " CHARGE_VBUS ,USB OTG charge VBUS" "Not detected,Detected" bitfld.long 0x00 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS" "Not detected,Detected" textline " " bitfld.long 0x00 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector" "Not detected,Detected" bitfld.long 0x00 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x04 "VBUS_DETECT_SET,USB VBUS Detect Set Register" bitfld.long 0x04 27. " CHARGE_VBUS ,USB OTG charge VBUS set" "No effect,Set" bitfld.long 0x04 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS set" "No effect,Set" textline " " bitfld.long 0x04 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector set" "No effect,Set" bitfld.long 0x04 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x08 "VBUS_DETECT_CLR,USB VBUS Detect Clear Register" bitfld.long 0x08 27. " CHARGE_VBUS ,USB OTG charge VBUS clear" "No effect,Clear" bitfld.long 0x08 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS clear" "No effect,Clear" textline " " bitfld.long 0x08 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector clear" "No effect,Clear" bitfld.long 0x08 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x0C "VBUS_DETECT_TOG,USB VBUS Detect Toggle Register" bitfld.long 0x0C 27. " CHARGE_VBUS ,USB OTG charge VBUS toggle" "No effect,Toggled" bitfld.long 0x0C 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector toggle" "No effect,Toggled" bitfld.long 0x0C 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x10 "CHRG_DETECT,USB Charger Detect Register" bitfld.long 0x10 20. " EN_B ,Control the charger detector" "Enabled,Disabled" bitfld.long 0x10 19. " CHK_CHRG_B ,Check charger connection to USB port" "Check,No check" bitfld.long 0x10 18. " CHK_CONTACT ,Contact of USB plug" "No check,Check" line.long 0x14 "CHRG_DETECT_SET,USB Charger Detect Set Register" bitfld.long 0x14 20. " EN_B ,Control the charger detector set" "No effect,Set" bitfld.long 0x14 19. " CHK_CHRG_B ,Check charger connection to USB port set" "No effect,Set" bitfld.long 0x14 18. " CHK_CONTACT ,Contact of USB plug set" "No effect,Set" line.long 0x18 "CHRG_DETECT_CLR,USB Charger Detect Clear Register" bitfld.long 0x18 20. " EN_B ,Control the charger detector clear" "No effect,Clear" bitfld.long 0x18 19. " CHK_CHRG_B ,Check charger connection to USB port clear" "No effect,Clear" bitfld.long 0x18 18. " CHK_CONTACT ,Contact of USB plug clear" "No effect,Clear" line.long 0x1C "CHRG_DETECT_TOG,USB Charger Detect Toggle Register" bitfld.long 0x1C 20. " EN_B ,Control the charger detector toggle" "No effect,Toggled" bitfld.long 0x1C 19. " CHK_CHRG_B ,Check charger connection to USB port toggle" "No effect,Toggled" bitfld.long 0x1C 18. " CHK_CONTACT ,Contact of USB plug toggle" "No effect,Toggled" rgroup.long 0x20++0x03 line.long 0x00 "VBUS_DETECT_STAT,USB VBUS Detect Status Register" bitfld.long 0x00 3. " VBUS_VALID ,VBus valid for USB OTG" "Not valid,Valid" bitfld.long 0x00 2. " AVALID ,VBus valid for A-peripheral" "Not valid,Valid" bitfld.long 0x00 1. " BVALID ,VBus valid for B-peripheral" "Not valid,Valid" textline " " bitfld.long 0x00 0. " SESSEND ,Session end for USB OTG" "Not end,End" rgroup.long 0x30++0x03 line.long 0x00 "CHRG_DETECT_STAT,USB Charger Detect Status Register" bitfld.long 0x00 3. " DP_STATE ,DP line state output of the charger detector" "Not detected,Detected" bitfld.long 0x00 2. " DM_STATE ,DM line state output of the charger detector" "Not detected,Detected" bitfld.long 0x00 1. " CHRG_DETECTED ,State of charger detection" "Not connected,Connected" textline " " bitfld.long 0x00 0. " PLUG_CONTACT ,State of the USB plug contact detector" "Not contact,Good contact" group.long 0x50++0x0F line.long 0x00 "MISC,USB Misc Register" bitfld.long 0x00 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block" "Disabled,Enabled" bitfld.long 0x00 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output" "Disabled,Enabled" bitfld.long 0x00 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter" "Not used,Used" line.long 0x04 "MISC_SET,USB Misc Set Register" bitfld.long 0x04 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block set" "No effect,Set" bitfld.long 0x04 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output set" "No effect,Set" bitfld.long 0x04 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter set" "No effect,Set" line.long 0x08 "MISC_CLEAR,USB Misc Clear Register" bitfld.long 0x08 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block clear" "No effect,Clear" bitfld.long 0x08 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output clear" "No effect,Clear" bitfld.long 0x08 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter clear" "No effect,Clear" line.long 0x0C "MISC_TOG,USB Misc Toggle Register" bitfld.long 0x0C 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block toggle" "No effect,Toggled" bitfld.long 0x0C 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output toggle" "No effect,Toggled" bitfld.long 0x0C 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter toggle" "No effect,Toggled" width 0x0B tree.end tree "Analog 2 (USB2 Analog)" base ad:0x020C8200 width 18. group.long 0x00++0x1F line.long 0x00 "VBUS_DETECT,USB VBUS Detect Register" bitfld.long 0x00 27. " CHARGE_VBUS ,USB OTG charge VBUS" "Not detected,Detected" bitfld.long 0x00 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS" "Not detected,Detected" textline " " bitfld.long 0x00 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector" "Not detected,Detected" bitfld.long 0x00 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x04 "VBUS_DETECT_SET,USB VBUS Detect Set Register" bitfld.long 0x04 27. " CHARGE_VBUS ,USB OTG charge VBUS set" "No effect,Set" bitfld.long 0x04 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS set" "No effect,Set" textline " " bitfld.long 0x04 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector set" "No effect,Set" bitfld.long 0x04 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x08 "VBUS_DETECT_CLR,USB VBUS Detect Clear Register" bitfld.long 0x08 27. " CHARGE_VBUS ,USB OTG charge VBUS clear" "No effect,Clear" bitfld.long 0x08 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS clear" "No effect,Clear" textline " " bitfld.long 0x08 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector clear" "No effect,Clear" bitfld.long 0x08 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x0C "VBUS_DETECT_TOG,USB VBUS Detect Toggle Register" bitfld.long 0x0C 27. " CHARGE_VBUS ,USB OTG charge VBUS toggle" "No effect,Toggled" bitfld.long 0x0C 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS toggle" "No effect,Toggled" textline " " bitfld.long 0x0C 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector toggle" "No effect,Toggled" bitfld.long 0x0C 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V" line.long 0x10 "CHRG_DETECT,USB Charger Detect Register" bitfld.long 0x10 20. " EN_B ,Control the charger detector" "Enabled,Disabled" bitfld.long 0x10 19. " CHK_CHRG_B ,Check charger connection to USB port" "Check,No check" bitfld.long 0x10 18. " CHK_CONTACT ,Contact of USB plug" "No check,Check" line.long 0x14 "CHRG_DETECT_SET,USB Charger Detect Set Register" bitfld.long 0x14 20. " EN_B ,Control the charger detector set" "No effect,Set" bitfld.long 0x14 19. " CHK_CHRG_B ,Check charger connection to USB port set" "No effect,Set" bitfld.long 0x14 18. " CHK_CONTACT ,Contact of USB plug set" "No effect,Set" line.long 0x18 "CHRG_DETECT_CLR,USB Charger Detect Clear Register" bitfld.long 0x18 20. " EN_B ,Control the charger detector clear" "No effect,Clear" bitfld.long 0x18 19. " CHK_CHRG_B ,Check charger connection to USB port clear" "No effect,Clear" bitfld.long 0x18 18. " CHK_CONTACT ,Contact of USB plug clear" "No effect,Clear" line.long 0x1C "CHRG_DETECT_TOG,USB Charger Detect Toggle Register" bitfld.long 0x1C 20. " EN_B ,Control the charger detector toggle" "No effect,Toggled" bitfld.long 0x1C 19. " CHK_CHRG_B ,Check charger connection to USB port toggle" "No effect,Toggled" bitfld.long 0x1C 18. " CHK_CONTACT ,Contact of USB plug toggle" "No effect,Toggled" rgroup.long 0x20++0x03 line.long 0x00 "VBUS_DETECT_STAT,USB VBUS Detect Status Register" bitfld.long 0x00 3. " VBUS_VALID ,VBus valid for USB OTG" "Not valid,Valid" bitfld.long 0x00 2. " AVALID ,VBus valid for A-peripheral" "Not valid,Valid" bitfld.long 0x00 1. " BVALID ,VBus valid for B-peripheral" "Not valid,Valid" textline " " bitfld.long 0x00 0. " SESSEND ,Session end for USB OTG" "Not end,End" rgroup.long 0x30++0x03 line.long 0x00 "CHRG_DETECT_STAT,USB Charger Detect Status Register" bitfld.long 0x00 3. " DP_STATE ,DP line state output of the charger detector" "Not detected,Detected" bitfld.long 0x00 2. " DM_STATE ,DM line state output of the charger detector" "Not detected,Detected" bitfld.long 0x00 1. " CHRG_DETECTED ,State of charger detection" "Not connected,Connected" textline " " bitfld.long 0x00 0. " PLUG_CONTACT ,State of the USB plug contact detector" "Not contact,Good contact" group.long 0x50++0x0F line.long 0x00 "MISC,USB Misc Register" bitfld.long 0x00 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block" "Disabled,Enabled" bitfld.long 0x00 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output" "Disabled,Enabled" bitfld.long 0x00 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter" "Not used,Used" line.long 0x04 "MISC_SET,USB Misc Set Register" bitfld.long 0x04 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block set" "No effect,Set" bitfld.long 0x04 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output set" "No effect,Set" bitfld.long 0x04 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter set" "No effect,Set" line.long 0x08 "MISC_CLEAR,USB Misc Clear Register" bitfld.long 0x08 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block clear" "No effect,Clear" bitfld.long 0x08 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output clear" "No effect,Clear" bitfld.long 0x08 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter clear" "No effect,Clear" line.long 0x0C "MISC_TOG,USB Misc Toggle Register" bitfld.long 0x0C 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block toggle" "No effect,Toggled" bitfld.long 0x0C 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output toggle" "No effect,Toggled" bitfld.long 0x0C 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter toggle" "No effect,Toggled" sif (cpu()=="IMX6SOLOLITE") rgroup.long 0x60++0x03 "Version Register" line.long 0x00 "DIGPROG,Chip Silicon Version Register" hexmask.long.byte 0x00 16.--23. 1. " MAJOR_UPPER ,MAJOR field of the RTL version" hexmask.long.byte 0x00 8.--15. 1. " MAJOR_LOWER ,MAJOR field of the RTL version" hexmask.long.byte 0x00 0.--7. 1. " MINOR ,MINOR field of the RTL version" else rgroup.long 0x60++0x03 "Version Register" line.long 0x00 "DIGPROG,Chip Silicon Version Register" hexmask.long.word 0x00 8.--23. 1. " MAJOR ,MAJOR field of the RTL version" hexmask.long.byte 0x00 0.--7. 1. " MINOR ,MINOR field of the RTL version" endif width 0x0B tree.end tree.end tree.open "USDHC (Ultra Secured Digital Host Controller)" tree "USDHC1" base ad:0x02190000 width 22. group.long 0x00++0x0F line.long 0x00 "DSADDR,DMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " DS_ADDR[31:2] ,DMA System Address" line.long 0x04 "BLKATTR,Block Attributes Register" hexmask.long.word 0x04 16.--31. 1. " BLKCNT ,Blocks Count For Current Transfer" hexmask.long.word 0x04 0.--12. 1. " BLKSIZE ,Transfer Block Size" line.long 0x08 "CMDARG,Command Argument Register" line.long 0x0C "CMDXFRTYP,Command Transfer Type Register" bitfld.long 0x0C 24.--29. " CMDINX[5:0] ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 22.--23. " CMDTYP[1:0] ,Command Type" "Normal,Suspended,Resumed,Aborted" bitfld.long 0x0C 21. " DPSEL ,Data Present Select" "No data,Data present" textline " " bitfld.long 0x0C 20. " CICEN ,Command Index Check Enable" "Disabled,Enabled" bitfld.long 0x0C 19. " CCCEN ,Command CRC Check Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " RSPTYP ,Response Type Select" "No response,Length 136,Length 48,Length 48/busy check" rgroup.long 0x10++0x0F line.long 0x0 "CMDRSP0,Command Response Register 0" line.long 0x4 "CMDRSP1,Command Response Register 1" line.long 0x8 "CMDRSP2,Command Response Register 2" line.long 0xC "CMDRSP3,Command Response Register 3" group.long 0x20++0x03 line.long 0x00 "DATPORT,Data Buffer Access Port Register" rgroup.long 0x24++0x03 line.long 0x00 "PRSSTAT,Present State Register" bitfld.long 0x00 31. " DLSL[7] ,DAT[7:0] Line 7 Signal Level" "Low,High" bitfld.long 0x00 30. " DLSL[6] ,DAT[7:0] Line 6 Signal Level" "Low,High" bitfld.long 0x00 29. " DLSL[5] ,DAT[7:0] Line 5 Signal Level" "Low,High" textline " " bitfld.long 0x00 28. " DLSL[4] ,DAT[7:0] Line 4 Signal Level" "Low,High" bitfld.long 0x00 27. " DLSL[3] ,DAT[7:0] Line 3 Signal Level" "Low,High" bitfld.long 0x00 26. " DLSL[2] ,DAT[7:0] Line 2 Signal Level" "Low,High" textline " " bitfld.long 0x00 25. " DLSL[1] ,DAT[7:0] Line 1 Signal Level" "Low,High" bitfld.long 0x00 24. " DLSL[0] ,DAT[7:0] Line 0 Signal Level" "Low,High" bitfld.long 0x00 23. " CLSL ,CMD Line Signal Level" "Low,High" textline " " bitfld.long 0x00 19. " WPSPL ,Write Protect Switch Pin Level" "Protected,Enabled" bitfld.long 0x00 18. " CDPL ,Card Detect Pin Level" "Not detected,Detected" bitfld.long 0x00 16. " CINST ,Card Inserted" "Reset/Not inserted,Inserted" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 15. " TSCD ,Tape Select Change Done" "Not finished,Finished" textline " " endif bitfld.long 0x00 12. " RTR ,Re-Tuning Request" "Not requested,Requested" bitfld.long 0x00 11. " BREN ,Buffer Read Enable" "Disabled,Enabled" bitfld.long 0x00 10. " BWEN ,Buffer Write Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RTA ,Read Transfer Active" "Inactive,Active" bitfld.long 0x00 8. " WTA ,Write Transfer Active" "Inactive,Active" bitfld.long 0x00 7. " SDOFF ,SD Clock Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 5. " HCKOFF ,HCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 4. " IPGOFF ,IPG_CLK Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 3. " SDSTB ,SD Clock Stable" "Unstable,Stable" bitfld.long 0x00 2. " DLA ,Data Line Active" "Inactive,Active" bitfld.long 0x00 1. " CDIHB ,Command Inhibit (DAT)" "Not inhibited,Inhibited" textline " " bitfld.long 0x00 0. " CIHB ,Command Inhibit (CMD)" "Not inhibited,Inhibited" group.long 0x28++0x13 line.long 0x00 "PROCTL,Protocol Control Register" bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact" bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled" bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled" bitfld.long 0x00 26. " WECRM ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.long 0x00 25. " WECINS ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " WECINT ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High" bitfld.long 0x00 19. " IABG ,Interrupt At Block Gap" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RWCTL ,Read Wait Control" "Disabled,Enabled" bitfld.long 0x00 17. " CREQ ,Continue Request" "No effect,Restart" bitfld.long 0x00 16. " SABGREQ ,Stop At Block Gap Request" "Transferred,Stopped" textline " " bitfld.long 0x00 8.--9. " DMASEL ,DMA Select" "Not selected,ADMA1,ADMA2,?..." bitfld.long 0x00 7. " CDSS ,Card Detect Signal Selection" "Normal,Test" bitfld.long 0x00 6. " CDTL ,Card Detect Test Level" "Not detected,Detected" textline " " bitfld.long 0x00 4.--5. " EMODE ,Endian Mode" "Big endian,Half word big endian,Little endian,?..." bitfld.long 0x00 3. " D3CD ,DAT3 as Card Detection Pin" "No,Yes" bitfld.long 0x00 1.--2. " DTW[1:0] ,Data Transfer Width" "1-bit,4-bit,8-bit,?..." textline " " bitfld.long 0x00 0. " LCTL ,LED Control" "Off,On" line.long 0x04 "SYSCTL,System Control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 28. " RSTT ,Reset Tuning" "No reset,Reset" textline " " endif bitfld.long 0x04 27. " INITA ,Initialization Active" "Inactive,Active" bitfld.long 0x04 26. " RSTD ,Software Reset For DATA Line" "No reset,Reset" bitfld.long 0x04 25. " RSTC ,Software Reset For CMD Line" "No reset,Reset" textline " " bitfld.long 0x04 24. " RSTA ,Software Reset For ALL" "No reset,Reset" bitfld.long 0x04 23. " IPP_RST_N ,Value Output to CARD for hardware reset" "0,1" bitfld.long 0x04 16.--19. " DTOCV ,Data Timeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,,,,,,,,,,,S,,SDCLK x 2^27,SDCLK x 2^28" textline " " hexmask.long.byte 0x04 8.--15. 1. " SDCLKFS ,SDCLK Frequency Select" bitfld.long 0x04 4.--7. " DVS[3:0] ,Divisor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" line.long 0x08 "IRQSTAT,Interrupt Status Register" eventfld.long 0x08 28. " DMAE ,DMA Error" "No error,Error" eventfld.long 0x08 26. " TNE ,Tuning Error" "No error,Error" eventfld.long 0x08 24. " AC12E ,Auto CMD12 Error" "No error,Error" textline " " eventfld.long 0x08 22. " DEBE ,Data End Bit Error" "No error,Error" eventfld.long 0x08 21. " DCE ,Data CRC Error" "No error,Error" eventfld.long 0x08 20. " DTOE ,Data Timeout Error" "No error,Error" textline " " eventfld.long 0x08 19. " CIE ,Command Index Error" "No error,Error" eventfld.long 0x08 18. " CEBE ,Command End Bit Error" "No error,Error" eventfld.long 0x08 17. " CCE ,Command CRC Error" "No error,Error" textline " " eventfld.long 0x08 16. " CTOE ,Command Timeout Error" "No error,Error" eventfld.long 0x08 14. " TP ,Tuning Pass" "Not transferred,Transferred" eventfld.long 0x08 12. " RTE ,Re-Tuning Event" "Not requested,Requested" textline " " eventfld.long 0x08 8. " CINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.long 0x08 7. " CRM ,Card Removal" "Not removed,Removed" eventfld.long 0x08 6. " CINS ,Card Insertion" "Not inserted,Inserted" textline " " eventfld.long 0x08 5. " BRR ,Buffer Read Ready" "Not ready,Ready" eventfld.long 0x08 4. " BWR ,Buffer Write Ready" "Not ready,Ready" eventfld.long 0x08 3. " DINT ,DMA Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x08 2. " BGE ,Block Gap Event" "No event,Stopped" eventfld.long 0x08 1. " TC ,Transfer Complete" "Not completed,Completed" eventfld.long 0x08 0. " CC ,Command Complete" "Not completed,Completed" line.long 0x0C "IRQSTATEN,Interrupt Status Enable Register" bitfld.long 0x0C 28. " DMAESEN ,DMA Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 26. " TNESEN ,Tuning Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 24. " AC12ESEN ,Auto CMD12 Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " DEBESEN ,Data End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " DCESEN ,Data CRC Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 20. " DTOESEN ,Data Timeout Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " CIESEN ,Command Index Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 18. " CEBESEN ,Command End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 17. " CCESEN ,Command CRC Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " CTOESEN ,Command Timeout Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 14. " TPSEN ,Tuning Pass Status Enable" "Disabled,Enabled" bitfld.long 0x0C 12. " RTESEN ,Re-Tuning Event Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CINTSEN ,Card Interrupt Status Enable" "Disabled,Enabled" bitfld.long 0x0C 7. " CRMSEN ,Card Removal Status Enable" "Disabled,Enabled" bitfld.long 0x0C 6. " CINSSEN ,Card Insertion Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " BRRSEN ,Buffer Read Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " BWRSEN ,Buffer Write Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 3. " DINTSEN ,DMA Interrupt Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " BGESEN ,Block Gap Event Status Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TCSEN ,Transfer Complete Status Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " CCSEN ,Command Complete Status Enable" "Disabled,Enabled" line.long 0x10 "IRQSIGEN,Interrupt Signal Enable Register" bitfld.long 0x10 28. " DMAEIEN ,DMA Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 26. " TNEIEN ,Tuning Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 24. " AC12EIEN ,Auto CMD12 Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " DEBEIEN ,Data End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 21. " DCEIEN ,Data CRC Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 20. " DTOEIEN ,Data Timeout Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " CIEIEN ,Command Index Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 18. " CEBEIEN ,Command End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 17. " CCEIEN ,Command CRC Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " CTOEIEN ,Command Timeout Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 14. " TPIEN ,Tuning Pass Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 12. " RTEIEN ,Re-Tuning Event Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " CINTIEN ,Card Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 7. " CRMIEN ,Card Removal Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 6. " CINSIEN ,Card Insertion Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " BRRIEN ,Buffer Read Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 4. " BWRIEN ,Buffer Write Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 3. " DINTIEN ,DMA Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " BGEIEN ,Block Gap Event Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 1. " TCIEN ,Transfer Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 0. " CCIEN ,Command Complete Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02190000+0xCC))&0x01000000)==0x01000000) group.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample Clock Select" "Fixed,Tuned" bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute Tuning" "Not executed,Executed" textline " " rbitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif rgroup.long 0x40++0x03 line.long 0x00 "HOSTCAPBLT,Host Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SRS ,Suspend / Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 20. " ADMAS ,ADMA Support" "Not supported,Supported" bitfld.long 0x00 16.--18. " MBL[2:0] ,Max Block Length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning Mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time Counter for Retuning" "Disabled,?..." textline " " bitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported" textline " " bitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported" endif group.long 0x44++0x07 line.long 0x00 "WML,Watermark Level Register" bitfld.long 0x00 24.--28. " WR_BRST_LEN[4:0] ,Write Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." hexmask.long.byte 0x00 16.--23. 1. " WR_WML[7:0] ,Write Watermark Level" bitfld.long 0x00 8.--12. " RD_BRST_LEN[4:0] ,Read Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " RD_WML[7:0] ,Read Watermark Level" textline " " line.long 0x04 "MIXERCTRL,Mixer control Regiseter" bitfld.long 0x04 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,Ipp_card_clk_out" bitfld.long 0x04 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SMP_CLK_SEL ,Sample clock selection" "Tuned,Fixed" bitfld.long 0x04 22. " EXE_TUNE ,Execute Tuning" "Not executed,Executed" textline " " bitfld.long 0x04 7. " AC23EN ,Auto CMD23 Enable" "Disabled,Enabled" bitfld.long 0x04 6. " NIBBLE_POS ,Nibble position" "Odd high->even high->odd low->even low,Odd high->odd low->even high->even low" textline " " bitfld.long 0x04 5. " MSBSEL ,Multi/Single Block Select" "Single,Multiple" bitfld.long 0x04 4. " DTDSEL ,Data Transfer Direction Select" "Write,Read" textline " " bitfld.long 0x04 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled" bitfld.long 0x04 2. " AC12EN ,Auto CMD12 Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BCEN ,Block Count Enable" "Disabled,Enabled" bitfld.long 0x04 0. " DMAEN ,DMA Enable" "Disabled,Enabled" textline " " wgroup.long 0x50++0x03 line.long 0x00 "FEVT,Force Event Register" bitfld.long 0x00 31. " FEVTCINT ,Force Event Card Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " FEVTDMAE ,Force Event DMA Error" "No error,Error" bitfld.long 0x00 26. " FEVTTNE ,Force Tuning Error" "No error,Error" textline " " bitfld.long 0x00 24. " FEVTAC12E ,Force Event Auto Command 12 Error" "No error,Error" bitfld.long 0x00 22. " FEVTDEBE ,Force Event Data End Bit Error" "No error,Error" bitfld.long 0x00 21. " FEVTDCE ,Force Event Data CRC Error" "No error,Error" textline " " bitfld.long 0x00 20. " FEVTDTOE ,Force Event Data Time Out Error" "No error,Error" bitfld.long 0x00 19. " FEVTCIE ,Force Event Command Index Error" "No error,Error" bitfld.long 0x00 18. " FEVTCEBE ,Force Event Command End Bit Error" "No error,Error" textline " " bitfld.long 0x00 17. " FEVTCCE ,Force Event Command CRC Error" "No error,Error" bitfld.long 0x00 16. " FEVTCTOE ,Force Event Command Time Out Error" "No error,Error" bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force Event Command Not Executed By Auto Command 12 Error" "No error,Error" textline " " bitfld.long 0x00 4. " FEVTAC12IE ,Force Event Auto Command 12 Index Error" "No error,Error" bitfld.long 0x00 3. " FEVTAC12EBE ,Force Event Auto Command 12 End Bit Error" "No error,Error" bitfld.long 0x00 2. " FEVTAC12CE ,Force Event Auto Command 12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 1. " FEVTAC12TOE ,Force Event Auto Command 12 Time Out Error" "No error,Error" bitfld.long 0x00 0. " FEVTAC12NE ,Force Event Auto Command 12 Not Executed" "No error,Error" rgroup.long 0x54++0x03 line.long 0x00 "ADMAES,ADMA Error Status Register" bitfld.long 0x00 3. " ADMADCE ,ADMA Descritor Error" "No error,Error" bitfld.long 0x00 2. " ADMALME ,ADMA Length Mismatch Error" "No error,Error" bitfld.long 0x00 0.--1. " ADMAES ,ADMA Error State " "ST_STOP,ST_FDS,ST_CADR,ST_TFR" group.long 0x58++0x03 line.long 0x00 "ADSADDR,ADMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR[31:0] ,ADMA System Address" group.long 0x60++0x03 line.long 0x00 "DLLCTRL,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,DLL control loop update interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DLL_CTRL_SLV_UPDATE_INT ,Slave delay line update interval" bitfld.long 0x00 16.--18. " DLL_CTRL_SLV_DLY_TARGET ,Slave delay target" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave override value" bitfld.long 0x00 8. " DLL_CTRL_SLV_OVERRIDE ,Manual override for slave delay chain" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,DLL update" "Automatically,No update" textline " " bitfld.long 0x00 3.--6. " DLL_CTRL_SLV_DLY_TARGET ,The delay target for the uSDHC loopback read clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,DLL slave update" "No update,Updated" bitfld.long 0x00 1. " DLL_CTRL_RESET ,DLL reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,DLL enable" "Disabled,Enabled" rgroup.long 0x64++0x03 line.long 0x00 "DLLSTS,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status" bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked" textline " " bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Invalid,Valid" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02190000+0x3C))&0x800000)==0x800000) group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC0++0x0B line.long 0x00 "VENDOR,Vendor Specific Register" bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " INT_ST_VAL ,Internal State Value" bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14. " CARD_CLK_SOFT_EN ,Card clock software enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " IPG_PERCLK_SOFT_EN ,IPG_PERCLK software enable" "Disabled,Enabled" bitfld.long 0x00 12. " HCLK_SOFT_EN ,AHB clock software enable" "Disabled,Enabled" bitfld.long 0x00 11. " IPG_CLK_SOFT_EN ,IPG_CLK software enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Controlled by hardware,Active" bitfld.long 0x00 7. " CLKONJ_IN_ABORT ,Force CLK output active when sending Abort command" "Active,Inactive" bitfld.long 0x00 6. " WP_POL ,Polarity of the WP pin" "High,Low" textline " " bitfld.long 0x00 5. " CD_POL ,Polarity of the CD pin" "Low,High" bitfld.long 0x00 4. " DAT3_CD_POL ,Polarity of Dat3 pin when its used as card detection" "High,Low" bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled" bitfld.long 0x00 1. " VSELECT ,Voltage Selection (around: 3.0V,1.8V)" "High,Low" bitfld.long 0x00 0. " EXT_DMA_EN ,External DMA Request Enable" "Disabled,Enabled" line.long 0x04 "MMCBOOT,MMC Boot Register" hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Boot block gap counter" bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes" bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled" bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative" bitfld.long 0x04 4. " BOOT_ACK ,Boot ack mode select" "No ACK,ACK" textline " " bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACKTimeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,SDCLK x 2^28" line.long 0x08 "VENDOR2,Vendor Specific 2 Register" bitfld.long 0x08 7. " CARD_INT_AUTO_CLR_DIS ,Disable clearing of the the Card interrupt status bit" "No,Yes" bitfld.long 0x08 6. " TUNING_CMD_EN ,Enable the auto tuning circuit to check the CMD line" "Disabled,Enabled" bitfld.long 0x08 4.--5. " TUNING_EN ,Enable the auto tuning circuit to check the DAT[7:0]" "DAT[3:0],DAT[0],DAT[7:0],Invalid" textline " " bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test" "DAT[3] high,Ignored DAT[3]" bitfld.long 0x08 2. " SDR104_NSD_DIS ,Interrupt window after abort command is sent" "9 cycles,5 cycles" bitfld.long 0x08 1. " SDR104_OE_DIS ,Drive CMD_OE/DAT_OE for one more clock cycle after the end bit" "Yes,No" textline " " bitfld.long 0x08 0. " SDR104_TIMING_DIS ,The timeout counter for Ncr changes/Ncrc changes" "80/21,72/15" sif (cpu()=="IMX6SOLOLITE") group.long 0xCC++0x03 line.long 0x00 "TUNING_CTRL,Tuning Control Register" bitfld.long 0x00 24. " STD_TUNING_EN ,Used to enable standard tuning circuit and procedure" "Disabled,Enabled" bitfld.long 0x00 20.--22. " TUNING_WINDOW ,Data window value for auto tuning" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " TUNING_STEP ,Increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure" hexmask.long.byte 0x00 0.--7. 1. " TUNING_START_TAP ,The start dealy cell point when send first CMD19 in tuning procedure" endif width 0x0B tree.end tree "USDHC2" base ad:0x02194000 width 22. group.long 0x00++0x0F line.long 0x00 "DSADDR,DMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " DS_ADDR[31:2] ,DMA System Address" line.long 0x04 "BLKATTR,Block Attributes Register" hexmask.long.word 0x04 16.--31. 1. " BLKCNT ,Blocks Count For Current Transfer" hexmask.long.word 0x04 0.--12. 1. " BLKSIZE ,Transfer Block Size" line.long 0x08 "CMDARG,Command Argument Register" line.long 0x0C "CMDXFRTYP,Command Transfer Type Register" bitfld.long 0x0C 24.--29. " CMDINX[5:0] ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 22.--23. " CMDTYP[1:0] ,Command Type" "Normal,Suspended,Resumed,Aborted" bitfld.long 0x0C 21. " DPSEL ,Data Present Select" "No data,Data present" textline " " bitfld.long 0x0C 20. " CICEN ,Command Index Check Enable" "Disabled,Enabled" bitfld.long 0x0C 19. " CCCEN ,Command CRC Check Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " RSPTYP ,Response Type Select" "No response,Length 136,Length 48,Length 48/busy check" rgroup.long 0x10++0x0F line.long 0x0 "CMDRSP0,Command Response Register 0" line.long 0x4 "CMDRSP1,Command Response Register 1" line.long 0x8 "CMDRSP2,Command Response Register 2" line.long 0xC "CMDRSP3,Command Response Register 3" group.long 0x20++0x03 line.long 0x00 "DATPORT,Data Buffer Access Port Register" rgroup.long 0x24++0x03 line.long 0x00 "PRSSTAT,Present State Register" bitfld.long 0x00 31. " DLSL[7] ,DAT[7:0] Line 7 Signal Level" "Low,High" bitfld.long 0x00 30. " DLSL[6] ,DAT[7:0] Line 6 Signal Level" "Low,High" bitfld.long 0x00 29. " DLSL[5] ,DAT[7:0] Line 5 Signal Level" "Low,High" textline " " bitfld.long 0x00 28. " DLSL[4] ,DAT[7:0] Line 4 Signal Level" "Low,High" bitfld.long 0x00 27. " DLSL[3] ,DAT[7:0] Line 3 Signal Level" "Low,High" bitfld.long 0x00 26. " DLSL[2] ,DAT[7:0] Line 2 Signal Level" "Low,High" textline " " bitfld.long 0x00 25. " DLSL[1] ,DAT[7:0] Line 1 Signal Level" "Low,High" bitfld.long 0x00 24. " DLSL[0] ,DAT[7:0] Line 0 Signal Level" "Low,High" bitfld.long 0x00 23. " CLSL ,CMD Line Signal Level" "Low,High" textline " " bitfld.long 0x00 19. " WPSPL ,Write Protect Switch Pin Level" "Protected,Enabled" bitfld.long 0x00 18. " CDPL ,Card Detect Pin Level" "Not detected,Detected" bitfld.long 0x00 16. " CINST ,Card Inserted" "Reset/Not inserted,Inserted" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 15. " TSCD ,Tape Select Change Done" "Not finished,Finished" textline " " endif bitfld.long 0x00 12. " RTR ,Re-Tuning Request" "Not requested,Requested" bitfld.long 0x00 11. " BREN ,Buffer Read Enable" "Disabled,Enabled" bitfld.long 0x00 10. " BWEN ,Buffer Write Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RTA ,Read Transfer Active" "Inactive,Active" bitfld.long 0x00 8. " WTA ,Write Transfer Active" "Inactive,Active" bitfld.long 0x00 7. " SDOFF ,SD Clock Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 5. " HCKOFF ,HCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 4. " IPGOFF ,IPG_CLK Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 3. " SDSTB ,SD Clock Stable" "Unstable,Stable" bitfld.long 0x00 2. " DLA ,Data Line Active" "Inactive,Active" bitfld.long 0x00 1. " CDIHB ,Command Inhibit (DAT)" "Not inhibited,Inhibited" textline " " bitfld.long 0x00 0. " CIHB ,Command Inhibit (CMD)" "Not inhibited,Inhibited" group.long 0x28++0x13 line.long 0x00 "PROCTL,Protocol Control Register" bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact" bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled" bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled" bitfld.long 0x00 26. " WECRM ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.long 0x00 25. " WECINS ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " WECINT ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High" bitfld.long 0x00 19. " IABG ,Interrupt At Block Gap" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RWCTL ,Read Wait Control" "Disabled,Enabled" bitfld.long 0x00 17. " CREQ ,Continue Request" "No effect,Restart" bitfld.long 0x00 16. " SABGREQ ,Stop At Block Gap Request" "Transferred,Stopped" textline " " bitfld.long 0x00 8.--9. " DMASEL ,DMA Select" "Not selected,ADMA1,ADMA2,?..." bitfld.long 0x00 7. " CDSS ,Card Detect Signal Selection" "Normal,Test" bitfld.long 0x00 6. " CDTL ,Card Detect Test Level" "Not detected,Detected" textline " " bitfld.long 0x00 4.--5. " EMODE ,Endian Mode" "Big endian,Half word big endian,Little endian,?..." bitfld.long 0x00 3. " D3CD ,DAT3 as Card Detection Pin" "No,Yes" bitfld.long 0x00 1.--2. " DTW[1:0] ,Data Transfer Width" "1-bit,4-bit,8-bit,?..." textline " " bitfld.long 0x00 0. " LCTL ,LED Control" "Off,On" line.long 0x04 "SYSCTL,System Control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 28. " RSTT ,Reset Tuning" "No reset,Reset" textline " " endif bitfld.long 0x04 27. " INITA ,Initialization Active" "Inactive,Active" bitfld.long 0x04 26. " RSTD ,Software Reset For DATA Line" "No reset,Reset" bitfld.long 0x04 25. " RSTC ,Software Reset For CMD Line" "No reset,Reset" textline " " bitfld.long 0x04 24. " RSTA ,Software Reset For ALL" "No reset,Reset" bitfld.long 0x04 23. " IPP_RST_N ,Value Output to CARD for hardware reset" "0,1" bitfld.long 0x04 16.--19. " DTOCV ,Data Timeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,,,,,,,,,,,S,,SDCLK x 2^27,SDCLK x 2^28" textline " " hexmask.long.byte 0x04 8.--15. 1. " SDCLKFS ,SDCLK Frequency Select" bitfld.long 0x04 4.--7. " DVS[3:0] ,Divisor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" line.long 0x08 "IRQSTAT,Interrupt Status Register" eventfld.long 0x08 28. " DMAE ,DMA Error" "No error,Error" eventfld.long 0x08 26. " TNE ,Tuning Error" "No error,Error" eventfld.long 0x08 24. " AC12E ,Auto CMD12 Error" "No error,Error" textline " " eventfld.long 0x08 22. " DEBE ,Data End Bit Error" "No error,Error" eventfld.long 0x08 21. " DCE ,Data CRC Error" "No error,Error" eventfld.long 0x08 20. " DTOE ,Data Timeout Error" "No error,Error" textline " " eventfld.long 0x08 19. " CIE ,Command Index Error" "No error,Error" eventfld.long 0x08 18. " CEBE ,Command End Bit Error" "No error,Error" eventfld.long 0x08 17. " CCE ,Command CRC Error" "No error,Error" textline " " eventfld.long 0x08 16. " CTOE ,Command Timeout Error" "No error,Error" eventfld.long 0x08 14. " TP ,Tuning Pass" "Not transferred,Transferred" eventfld.long 0x08 12. " RTE ,Re-Tuning Event" "Not requested,Requested" textline " " eventfld.long 0x08 8. " CINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.long 0x08 7. " CRM ,Card Removal" "Not removed,Removed" eventfld.long 0x08 6. " CINS ,Card Insertion" "Not inserted,Inserted" textline " " eventfld.long 0x08 5. " BRR ,Buffer Read Ready" "Not ready,Ready" eventfld.long 0x08 4. " BWR ,Buffer Write Ready" "Not ready,Ready" eventfld.long 0x08 3. " DINT ,DMA Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x08 2. " BGE ,Block Gap Event" "No event,Stopped" eventfld.long 0x08 1. " TC ,Transfer Complete" "Not completed,Completed" eventfld.long 0x08 0. " CC ,Command Complete" "Not completed,Completed" line.long 0x0C "IRQSTATEN,Interrupt Status Enable Register" bitfld.long 0x0C 28. " DMAESEN ,DMA Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 26. " TNESEN ,Tuning Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 24. " AC12ESEN ,Auto CMD12 Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " DEBESEN ,Data End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " DCESEN ,Data CRC Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 20. " DTOESEN ,Data Timeout Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " CIESEN ,Command Index Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 18. " CEBESEN ,Command End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 17. " CCESEN ,Command CRC Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " CTOESEN ,Command Timeout Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 14. " TPSEN ,Tuning Pass Status Enable" "Disabled,Enabled" bitfld.long 0x0C 12. " RTESEN ,Re-Tuning Event Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CINTSEN ,Card Interrupt Status Enable" "Disabled,Enabled" bitfld.long 0x0C 7. " CRMSEN ,Card Removal Status Enable" "Disabled,Enabled" bitfld.long 0x0C 6. " CINSSEN ,Card Insertion Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " BRRSEN ,Buffer Read Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " BWRSEN ,Buffer Write Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 3. " DINTSEN ,DMA Interrupt Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " BGESEN ,Block Gap Event Status Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TCSEN ,Transfer Complete Status Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " CCSEN ,Command Complete Status Enable" "Disabled,Enabled" line.long 0x10 "IRQSIGEN,Interrupt Signal Enable Register" bitfld.long 0x10 28. " DMAEIEN ,DMA Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 26. " TNEIEN ,Tuning Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 24. " AC12EIEN ,Auto CMD12 Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " DEBEIEN ,Data End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 21. " DCEIEN ,Data CRC Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 20. " DTOEIEN ,Data Timeout Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " CIEIEN ,Command Index Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 18. " CEBEIEN ,Command End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 17. " CCEIEN ,Command CRC Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " CTOEIEN ,Command Timeout Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 14. " TPIEN ,Tuning Pass Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 12. " RTEIEN ,Re-Tuning Event Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " CINTIEN ,Card Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 7. " CRMIEN ,Card Removal Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 6. " CINSIEN ,Card Insertion Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " BRRIEN ,Buffer Read Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 4. " BWRIEN ,Buffer Write Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 3. " DINTIEN ,DMA Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " BGEIEN ,Block Gap Event Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 1. " TCIEN ,Transfer Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 0. " CCIEN ,Command Complete Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02194000+0xCC))&0x01000000)==0x01000000) group.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample Clock Select" "Fixed,Tuned" bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute Tuning" "Not executed,Executed" textline " " rbitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif rgroup.long 0x40++0x03 line.long 0x00 "HOSTCAPBLT,Host Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SRS ,Suspend / Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 20. " ADMAS ,ADMA Support" "Not supported,Supported" bitfld.long 0x00 16.--18. " MBL[2:0] ,Max Block Length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning Mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time Counter for Retuning" "Disabled,?..." textline " " bitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported" textline " " bitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported" endif group.long 0x44++0x07 line.long 0x00 "WML,Watermark Level Register" bitfld.long 0x00 24.--28. " WR_BRST_LEN[4:0] ,Write Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." hexmask.long.byte 0x00 16.--23. 1. " WR_WML[7:0] ,Write Watermark Level" bitfld.long 0x00 8.--12. " RD_BRST_LEN[4:0] ,Read Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " RD_WML[7:0] ,Read Watermark Level" textline " " line.long 0x04 "MIXERCTRL,Mixer control Regiseter" bitfld.long 0x04 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,Ipp_card_clk_out" bitfld.long 0x04 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SMP_CLK_SEL ,Sample clock selection" "Tuned,Fixed" bitfld.long 0x04 22. " EXE_TUNE ,Execute Tuning" "Not executed,Executed" textline " " bitfld.long 0x04 7. " AC23EN ,Auto CMD23 Enable" "Disabled,Enabled" bitfld.long 0x04 6. " NIBBLE_POS ,Nibble position" "Odd high->even high->odd low->even low,Odd high->odd low->even high->even low" textline " " bitfld.long 0x04 5. " MSBSEL ,Multi/Single Block Select" "Single,Multiple" bitfld.long 0x04 4. " DTDSEL ,Data Transfer Direction Select" "Write,Read" textline " " bitfld.long 0x04 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled" bitfld.long 0x04 2. " AC12EN ,Auto CMD12 Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BCEN ,Block Count Enable" "Disabled,Enabled" bitfld.long 0x04 0. " DMAEN ,DMA Enable" "Disabled,Enabled" textline " " wgroup.long 0x50++0x03 line.long 0x00 "FEVT,Force Event Register" bitfld.long 0x00 31. " FEVTCINT ,Force Event Card Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " FEVTDMAE ,Force Event DMA Error" "No error,Error" bitfld.long 0x00 26. " FEVTTNE ,Force Tuning Error" "No error,Error" textline " " bitfld.long 0x00 24. " FEVTAC12E ,Force Event Auto Command 12 Error" "No error,Error" bitfld.long 0x00 22. " FEVTDEBE ,Force Event Data End Bit Error" "No error,Error" bitfld.long 0x00 21. " FEVTDCE ,Force Event Data CRC Error" "No error,Error" textline " " bitfld.long 0x00 20. " FEVTDTOE ,Force Event Data Time Out Error" "No error,Error" bitfld.long 0x00 19. " FEVTCIE ,Force Event Command Index Error" "No error,Error" bitfld.long 0x00 18. " FEVTCEBE ,Force Event Command End Bit Error" "No error,Error" textline " " bitfld.long 0x00 17. " FEVTCCE ,Force Event Command CRC Error" "No error,Error" bitfld.long 0x00 16. " FEVTCTOE ,Force Event Command Time Out Error" "No error,Error" bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force Event Command Not Executed By Auto Command 12 Error" "No error,Error" textline " " bitfld.long 0x00 4. " FEVTAC12IE ,Force Event Auto Command 12 Index Error" "No error,Error" bitfld.long 0x00 3. " FEVTAC12EBE ,Force Event Auto Command 12 End Bit Error" "No error,Error" bitfld.long 0x00 2. " FEVTAC12CE ,Force Event Auto Command 12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 1. " FEVTAC12TOE ,Force Event Auto Command 12 Time Out Error" "No error,Error" bitfld.long 0x00 0. " FEVTAC12NE ,Force Event Auto Command 12 Not Executed" "No error,Error" rgroup.long 0x54++0x03 line.long 0x00 "ADMAES,ADMA Error Status Register" bitfld.long 0x00 3. " ADMADCE ,ADMA Descritor Error" "No error,Error" bitfld.long 0x00 2. " ADMALME ,ADMA Length Mismatch Error" "No error,Error" bitfld.long 0x00 0.--1. " ADMAES ,ADMA Error State " "ST_STOP,ST_FDS,ST_CADR,ST_TFR" group.long 0x58++0x03 line.long 0x00 "ADSADDR,ADMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR[31:0] ,ADMA System Address" group.long 0x60++0x03 line.long 0x00 "DLLCTRL,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,DLL control loop update interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DLL_CTRL_SLV_UPDATE_INT ,Slave delay line update interval" bitfld.long 0x00 16.--18. " DLL_CTRL_SLV_DLY_TARGET ,Slave delay target" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave override value" bitfld.long 0x00 8. " DLL_CTRL_SLV_OVERRIDE ,Manual override for slave delay chain" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,DLL update" "Automatically,No update" textline " " bitfld.long 0x00 3.--6. " DLL_CTRL_SLV_DLY_TARGET ,The delay target for the uSDHC loopback read clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,DLL slave update" "No update,Updated" bitfld.long 0x00 1. " DLL_CTRL_RESET ,DLL reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,DLL enable" "Disabled,Enabled" rgroup.long 0x64++0x03 line.long 0x00 "DLLSTS,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status" bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked" textline " " bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Invalid,Valid" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02194000+0x3C))&0x800000)==0x800000) group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC0++0x0B line.long 0x00 "VENDOR,Vendor Specific Register" bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " INT_ST_VAL ,Internal State Value" bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14. " CARD_CLK_SOFT_EN ,Card clock software enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " IPG_PERCLK_SOFT_EN ,IPG_PERCLK software enable" "Disabled,Enabled" bitfld.long 0x00 12. " HCLK_SOFT_EN ,AHB clock software enable" "Disabled,Enabled" bitfld.long 0x00 11. " IPG_CLK_SOFT_EN ,IPG_CLK software enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Controlled by hardware,Active" bitfld.long 0x00 7. " CLKONJ_IN_ABORT ,Force CLK output active when sending Abort command" "Active,Inactive" bitfld.long 0x00 6. " WP_POL ,Polarity of the WP pin" "High,Low" textline " " bitfld.long 0x00 5. " CD_POL ,Polarity of the CD pin" "Low,High" bitfld.long 0x00 4. " DAT3_CD_POL ,Polarity of Dat3 pin when its used as card detection" "High,Low" bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled" bitfld.long 0x00 1. " VSELECT ,Voltage Selection (around: 3.0V,1.8V)" "High,Low" bitfld.long 0x00 0. " EXT_DMA_EN ,External DMA Request Enable" "Disabled,Enabled" line.long 0x04 "MMCBOOT,MMC Boot Register" hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Boot block gap counter" bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes" bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled" bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative" bitfld.long 0x04 4. " BOOT_ACK ,Boot ack mode select" "No ACK,ACK" textline " " bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACKTimeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,SDCLK x 2^28" line.long 0x08 "VENDOR2,Vendor Specific 2 Register" bitfld.long 0x08 7. " CARD_INT_AUTO_CLR_DIS ,Disable clearing of the the Card interrupt status bit" "No,Yes" bitfld.long 0x08 6. " TUNING_CMD_EN ,Enable the auto tuning circuit to check the CMD line" "Disabled,Enabled" bitfld.long 0x08 4.--5. " TUNING_EN ,Enable the auto tuning circuit to check the DAT[7:0]" "DAT[3:0],DAT[0],DAT[7:0],Invalid" textline " " bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test" "DAT[3] high,Ignored DAT[3]" bitfld.long 0x08 2. " SDR104_NSD_DIS ,Interrupt window after abort command is sent" "9 cycles,5 cycles" bitfld.long 0x08 1. " SDR104_OE_DIS ,Drive CMD_OE/DAT_OE for one more clock cycle after the end bit" "Yes,No" textline " " bitfld.long 0x08 0. " SDR104_TIMING_DIS ,The timeout counter for Ncr changes/Ncrc changes" "80/21,72/15" sif (cpu()=="IMX6SOLOLITE") group.long 0xCC++0x03 line.long 0x00 "TUNING_CTRL,Tuning Control Register" bitfld.long 0x00 24. " STD_TUNING_EN ,Used to enable standard tuning circuit and procedure" "Disabled,Enabled" bitfld.long 0x00 20.--22. " TUNING_WINDOW ,Data window value for auto tuning" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " TUNING_STEP ,Increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure" hexmask.long.byte 0x00 0.--7. 1. " TUNING_START_TAP ,The start dealy cell point when send first CMD19 in tuning procedure" endif width 0x0B tree.end tree "USDHC3" base ad:0x02198000 width 22. group.long 0x00++0x0F line.long 0x00 "DSADDR,DMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " DS_ADDR[31:2] ,DMA System Address" line.long 0x04 "BLKATTR,Block Attributes Register" hexmask.long.word 0x04 16.--31. 1. " BLKCNT ,Blocks Count For Current Transfer" hexmask.long.word 0x04 0.--12. 1. " BLKSIZE ,Transfer Block Size" line.long 0x08 "CMDARG,Command Argument Register" line.long 0x0C "CMDXFRTYP,Command Transfer Type Register" bitfld.long 0x0C 24.--29. " CMDINX[5:0] ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 22.--23. " CMDTYP[1:0] ,Command Type" "Normal,Suspended,Resumed,Aborted" bitfld.long 0x0C 21. " DPSEL ,Data Present Select" "No data,Data present" textline " " bitfld.long 0x0C 20. " CICEN ,Command Index Check Enable" "Disabled,Enabled" bitfld.long 0x0C 19. " CCCEN ,Command CRC Check Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " RSPTYP ,Response Type Select" "No response,Length 136,Length 48,Length 48/busy check" rgroup.long 0x10++0x0F line.long 0x0 "CMDRSP0,Command Response Register 0" line.long 0x4 "CMDRSP1,Command Response Register 1" line.long 0x8 "CMDRSP2,Command Response Register 2" line.long 0xC "CMDRSP3,Command Response Register 3" group.long 0x20++0x03 line.long 0x00 "DATPORT,Data Buffer Access Port Register" rgroup.long 0x24++0x03 line.long 0x00 "PRSSTAT,Present State Register" bitfld.long 0x00 31. " DLSL[7] ,DAT[7:0] Line 7 Signal Level" "Low,High" bitfld.long 0x00 30. " DLSL[6] ,DAT[7:0] Line 6 Signal Level" "Low,High" bitfld.long 0x00 29. " DLSL[5] ,DAT[7:0] Line 5 Signal Level" "Low,High" textline " " bitfld.long 0x00 28. " DLSL[4] ,DAT[7:0] Line 4 Signal Level" "Low,High" bitfld.long 0x00 27. " DLSL[3] ,DAT[7:0] Line 3 Signal Level" "Low,High" bitfld.long 0x00 26. " DLSL[2] ,DAT[7:0] Line 2 Signal Level" "Low,High" textline " " bitfld.long 0x00 25. " DLSL[1] ,DAT[7:0] Line 1 Signal Level" "Low,High" bitfld.long 0x00 24. " DLSL[0] ,DAT[7:0] Line 0 Signal Level" "Low,High" bitfld.long 0x00 23. " CLSL ,CMD Line Signal Level" "Low,High" textline " " bitfld.long 0x00 19. " WPSPL ,Write Protect Switch Pin Level" "Protected,Enabled" bitfld.long 0x00 18. " CDPL ,Card Detect Pin Level" "Not detected,Detected" bitfld.long 0x00 16. " CINST ,Card Inserted" "Reset/Not inserted,Inserted" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 15. " TSCD ,Tape Select Change Done" "Not finished,Finished" textline " " endif bitfld.long 0x00 12. " RTR ,Re-Tuning Request" "Not requested,Requested" bitfld.long 0x00 11. " BREN ,Buffer Read Enable" "Disabled,Enabled" bitfld.long 0x00 10. " BWEN ,Buffer Write Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RTA ,Read Transfer Active" "Inactive,Active" bitfld.long 0x00 8. " WTA ,Write Transfer Active" "Inactive,Active" bitfld.long 0x00 7. " SDOFF ,SD Clock Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 5. " HCKOFF ,HCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 4. " IPGOFF ,IPG_CLK Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 3. " SDSTB ,SD Clock Stable" "Unstable,Stable" bitfld.long 0x00 2. " DLA ,Data Line Active" "Inactive,Active" bitfld.long 0x00 1. " CDIHB ,Command Inhibit (DAT)" "Not inhibited,Inhibited" textline " " bitfld.long 0x00 0. " CIHB ,Command Inhibit (CMD)" "Not inhibited,Inhibited" group.long 0x28++0x13 line.long 0x00 "PROCTL,Protocol Control Register" bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact" bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled" bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled" bitfld.long 0x00 26. " WECRM ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.long 0x00 25. " WECINS ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " WECINT ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High" bitfld.long 0x00 19. " IABG ,Interrupt At Block Gap" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RWCTL ,Read Wait Control" "Disabled,Enabled" bitfld.long 0x00 17. " CREQ ,Continue Request" "No effect,Restart" bitfld.long 0x00 16. " SABGREQ ,Stop At Block Gap Request" "Transferred,Stopped" textline " " bitfld.long 0x00 8.--9. " DMASEL ,DMA Select" "Not selected,ADMA1,ADMA2,?..." bitfld.long 0x00 7. " CDSS ,Card Detect Signal Selection" "Normal,Test" bitfld.long 0x00 6. " CDTL ,Card Detect Test Level" "Not detected,Detected" textline " " bitfld.long 0x00 4.--5. " EMODE ,Endian Mode" "Big endian,Half word big endian,Little endian,?..." bitfld.long 0x00 3. " D3CD ,DAT3 as Card Detection Pin" "No,Yes" bitfld.long 0x00 1.--2. " DTW[1:0] ,Data Transfer Width" "1-bit,4-bit,8-bit,?..." textline " " bitfld.long 0x00 0. " LCTL ,LED Control" "Off,On" line.long 0x04 "SYSCTL,System Control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 28. " RSTT ,Reset Tuning" "No reset,Reset" textline " " endif bitfld.long 0x04 27. " INITA ,Initialization Active" "Inactive,Active" bitfld.long 0x04 26. " RSTD ,Software Reset For DATA Line" "No reset,Reset" bitfld.long 0x04 25. " RSTC ,Software Reset For CMD Line" "No reset,Reset" textline " " bitfld.long 0x04 24. " RSTA ,Software Reset For ALL" "No reset,Reset" bitfld.long 0x04 23. " IPP_RST_N ,Value Output to CARD for hardware reset" "0,1" bitfld.long 0x04 16.--19. " DTOCV ,Data Timeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,,,,,,,,,,,S,,SDCLK x 2^27,SDCLK x 2^28" textline " " hexmask.long.byte 0x04 8.--15. 1. " SDCLKFS ,SDCLK Frequency Select" bitfld.long 0x04 4.--7. " DVS[3:0] ,Divisor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" line.long 0x08 "IRQSTAT,Interrupt Status Register" eventfld.long 0x08 28. " DMAE ,DMA Error" "No error,Error" eventfld.long 0x08 26. " TNE ,Tuning Error" "No error,Error" eventfld.long 0x08 24. " AC12E ,Auto CMD12 Error" "No error,Error" textline " " eventfld.long 0x08 22. " DEBE ,Data End Bit Error" "No error,Error" eventfld.long 0x08 21. " DCE ,Data CRC Error" "No error,Error" eventfld.long 0x08 20. " DTOE ,Data Timeout Error" "No error,Error" textline " " eventfld.long 0x08 19. " CIE ,Command Index Error" "No error,Error" eventfld.long 0x08 18. " CEBE ,Command End Bit Error" "No error,Error" eventfld.long 0x08 17. " CCE ,Command CRC Error" "No error,Error" textline " " eventfld.long 0x08 16. " CTOE ,Command Timeout Error" "No error,Error" eventfld.long 0x08 14. " TP ,Tuning Pass" "Not transferred,Transferred" eventfld.long 0x08 12. " RTE ,Re-Tuning Event" "Not requested,Requested" textline " " eventfld.long 0x08 8. " CINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.long 0x08 7. " CRM ,Card Removal" "Not removed,Removed" eventfld.long 0x08 6. " CINS ,Card Insertion" "Not inserted,Inserted" textline " " eventfld.long 0x08 5. " BRR ,Buffer Read Ready" "Not ready,Ready" eventfld.long 0x08 4. " BWR ,Buffer Write Ready" "Not ready,Ready" eventfld.long 0x08 3. " DINT ,DMA Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x08 2. " BGE ,Block Gap Event" "No event,Stopped" eventfld.long 0x08 1. " TC ,Transfer Complete" "Not completed,Completed" eventfld.long 0x08 0. " CC ,Command Complete" "Not completed,Completed" line.long 0x0C "IRQSTATEN,Interrupt Status Enable Register" bitfld.long 0x0C 28. " DMAESEN ,DMA Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 26. " TNESEN ,Tuning Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 24. " AC12ESEN ,Auto CMD12 Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " DEBESEN ,Data End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " DCESEN ,Data CRC Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 20. " DTOESEN ,Data Timeout Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " CIESEN ,Command Index Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 18. " CEBESEN ,Command End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 17. " CCESEN ,Command CRC Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " CTOESEN ,Command Timeout Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 14. " TPSEN ,Tuning Pass Status Enable" "Disabled,Enabled" bitfld.long 0x0C 12. " RTESEN ,Re-Tuning Event Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CINTSEN ,Card Interrupt Status Enable" "Disabled,Enabled" bitfld.long 0x0C 7. " CRMSEN ,Card Removal Status Enable" "Disabled,Enabled" bitfld.long 0x0C 6. " CINSSEN ,Card Insertion Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " BRRSEN ,Buffer Read Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " BWRSEN ,Buffer Write Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 3. " DINTSEN ,DMA Interrupt Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " BGESEN ,Block Gap Event Status Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TCSEN ,Transfer Complete Status Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " CCSEN ,Command Complete Status Enable" "Disabled,Enabled" line.long 0x10 "IRQSIGEN,Interrupt Signal Enable Register" bitfld.long 0x10 28. " DMAEIEN ,DMA Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 26. " TNEIEN ,Tuning Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 24. " AC12EIEN ,Auto CMD12 Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " DEBEIEN ,Data End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 21. " DCEIEN ,Data CRC Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 20. " DTOEIEN ,Data Timeout Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " CIEIEN ,Command Index Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 18. " CEBEIEN ,Command End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 17. " CCEIEN ,Command CRC Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " CTOEIEN ,Command Timeout Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 14. " TPIEN ,Tuning Pass Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 12. " RTEIEN ,Re-Tuning Event Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " CINTIEN ,Card Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 7. " CRMIEN ,Card Removal Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 6. " CINSIEN ,Card Insertion Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " BRRIEN ,Buffer Read Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 4. " BWRIEN ,Buffer Write Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 3. " DINTIEN ,DMA Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " BGEIEN ,Block Gap Event Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 1. " TCIEN ,Transfer Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 0. " CCIEN ,Command Complete Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02198000+0xCC))&0x01000000)==0x01000000) group.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample Clock Select" "Fixed,Tuned" bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute Tuning" "Not executed,Executed" textline " " rbitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif rgroup.long 0x40++0x03 line.long 0x00 "HOSTCAPBLT,Host Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SRS ,Suspend / Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 20. " ADMAS ,ADMA Support" "Not supported,Supported" bitfld.long 0x00 16.--18. " MBL[2:0] ,Max Block Length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning Mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time Counter for Retuning" "Disabled,?..." textline " " bitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported" textline " " bitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported" endif group.long 0x44++0x07 line.long 0x00 "WML,Watermark Level Register" bitfld.long 0x00 24.--28. " WR_BRST_LEN[4:0] ,Write Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." hexmask.long.byte 0x00 16.--23. 1. " WR_WML[7:0] ,Write Watermark Level" bitfld.long 0x00 8.--12. " RD_BRST_LEN[4:0] ,Read Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " RD_WML[7:0] ,Read Watermark Level" textline " " line.long 0x04 "MIXERCTRL,Mixer control Regiseter" bitfld.long 0x04 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,Ipp_card_clk_out" bitfld.long 0x04 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SMP_CLK_SEL ,Sample clock selection" "Tuned,Fixed" bitfld.long 0x04 22. " EXE_TUNE ,Execute Tuning" "Not executed,Executed" textline " " bitfld.long 0x04 7. " AC23EN ,Auto CMD23 Enable" "Disabled,Enabled" bitfld.long 0x04 6. " NIBBLE_POS ,Nibble position" "Odd high->even high->odd low->even low,Odd high->odd low->even high->even low" textline " " bitfld.long 0x04 5. " MSBSEL ,Multi/Single Block Select" "Single,Multiple" bitfld.long 0x04 4. " DTDSEL ,Data Transfer Direction Select" "Write,Read" textline " " bitfld.long 0x04 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled" bitfld.long 0x04 2. " AC12EN ,Auto CMD12 Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BCEN ,Block Count Enable" "Disabled,Enabled" bitfld.long 0x04 0. " DMAEN ,DMA Enable" "Disabled,Enabled" textline " " wgroup.long 0x50++0x03 line.long 0x00 "FEVT,Force Event Register" bitfld.long 0x00 31. " FEVTCINT ,Force Event Card Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " FEVTDMAE ,Force Event DMA Error" "No error,Error" bitfld.long 0x00 26. " FEVTTNE ,Force Tuning Error" "No error,Error" textline " " bitfld.long 0x00 24. " FEVTAC12E ,Force Event Auto Command 12 Error" "No error,Error" bitfld.long 0x00 22. " FEVTDEBE ,Force Event Data End Bit Error" "No error,Error" bitfld.long 0x00 21. " FEVTDCE ,Force Event Data CRC Error" "No error,Error" textline " " bitfld.long 0x00 20. " FEVTDTOE ,Force Event Data Time Out Error" "No error,Error" bitfld.long 0x00 19. " FEVTCIE ,Force Event Command Index Error" "No error,Error" bitfld.long 0x00 18. " FEVTCEBE ,Force Event Command End Bit Error" "No error,Error" textline " " bitfld.long 0x00 17. " FEVTCCE ,Force Event Command CRC Error" "No error,Error" bitfld.long 0x00 16. " FEVTCTOE ,Force Event Command Time Out Error" "No error,Error" bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force Event Command Not Executed By Auto Command 12 Error" "No error,Error" textline " " bitfld.long 0x00 4. " FEVTAC12IE ,Force Event Auto Command 12 Index Error" "No error,Error" bitfld.long 0x00 3. " FEVTAC12EBE ,Force Event Auto Command 12 End Bit Error" "No error,Error" bitfld.long 0x00 2. " FEVTAC12CE ,Force Event Auto Command 12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 1. " FEVTAC12TOE ,Force Event Auto Command 12 Time Out Error" "No error,Error" bitfld.long 0x00 0. " FEVTAC12NE ,Force Event Auto Command 12 Not Executed" "No error,Error" rgroup.long 0x54++0x03 line.long 0x00 "ADMAES,ADMA Error Status Register" bitfld.long 0x00 3. " ADMADCE ,ADMA Descritor Error" "No error,Error" bitfld.long 0x00 2. " ADMALME ,ADMA Length Mismatch Error" "No error,Error" bitfld.long 0x00 0.--1. " ADMAES ,ADMA Error State " "ST_STOP,ST_FDS,ST_CADR,ST_TFR" group.long 0x58++0x03 line.long 0x00 "ADSADDR,ADMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR[31:0] ,ADMA System Address" group.long 0x60++0x03 line.long 0x00 "DLLCTRL,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,DLL control loop update interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DLL_CTRL_SLV_UPDATE_INT ,Slave delay line update interval" bitfld.long 0x00 16.--18. " DLL_CTRL_SLV_DLY_TARGET ,Slave delay target" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave override value" bitfld.long 0x00 8. " DLL_CTRL_SLV_OVERRIDE ,Manual override for slave delay chain" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,DLL update" "Automatically,No update" textline " " bitfld.long 0x00 3.--6. " DLL_CTRL_SLV_DLY_TARGET ,The delay target for the uSDHC loopback read clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,DLL slave update" "No update,Updated" bitfld.long 0x00 1. " DLL_CTRL_RESET ,DLL reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,DLL enable" "Disabled,Enabled" rgroup.long 0x64++0x03 line.long 0x00 "DLLSTS,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status" bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked" textline " " bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Invalid,Valid" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x02198000+0x3C))&0x800000)==0x800000) group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC0++0x0B line.long 0x00 "VENDOR,Vendor Specific Register" bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " INT_ST_VAL ,Internal State Value" bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14. " CARD_CLK_SOFT_EN ,Card clock software enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " IPG_PERCLK_SOFT_EN ,IPG_PERCLK software enable" "Disabled,Enabled" bitfld.long 0x00 12. " HCLK_SOFT_EN ,AHB clock software enable" "Disabled,Enabled" bitfld.long 0x00 11. " IPG_CLK_SOFT_EN ,IPG_CLK software enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Controlled by hardware,Active" bitfld.long 0x00 7. " CLKONJ_IN_ABORT ,Force CLK output active when sending Abort command" "Active,Inactive" bitfld.long 0x00 6. " WP_POL ,Polarity of the WP pin" "High,Low" textline " " bitfld.long 0x00 5. " CD_POL ,Polarity of the CD pin" "Low,High" bitfld.long 0x00 4. " DAT3_CD_POL ,Polarity of Dat3 pin when its used as card detection" "High,Low" bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled" bitfld.long 0x00 1. " VSELECT ,Voltage Selection (around: 3.0V,1.8V)" "High,Low" bitfld.long 0x00 0. " EXT_DMA_EN ,External DMA Request Enable" "Disabled,Enabled" line.long 0x04 "MMCBOOT,MMC Boot Register" hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Boot block gap counter" bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes" bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled" bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative" bitfld.long 0x04 4. " BOOT_ACK ,Boot ack mode select" "No ACK,ACK" textline " " bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACKTimeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,SDCLK x 2^28" line.long 0x08 "VENDOR2,Vendor Specific 2 Register" bitfld.long 0x08 7. " CARD_INT_AUTO_CLR_DIS ,Disable clearing of the the Card interrupt status bit" "No,Yes" bitfld.long 0x08 6. " TUNING_CMD_EN ,Enable the auto tuning circuit to check the CMD line" "Disabled,Enabled" bitfld.long 0x08 4.--5. " TUNING_EN ,Enable the auto tuning circuit to check the DAT[7:0]" "DAT[3:0],DAT[0],DAT[7:0],Invalid" textline " " bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test" "DAT[3] high,Ignored DAT[3]" bitfld.long 0x08 2. " SDR104_NSD_DIS ,Interrupt window after abort command is sent" "9 cycles,5 cycles" bitfld.long 0x08 1. " SDR104_OE_DIS ,Drive CMD_OE/DAT_OE for one more clock cycle after the end bit" "Yes,No" textline " " bitfld.long 0x08 0. " SDR104_TIMING_DIS ,The timeout counter for Ncr changes/Ncrc changes" "80/21,72/15" sif (cpu()=="IMX6SOLOLITE") group.long 0xCC++0x03 line.long 0x00 "TUNING_CTRL,Tuning Control Register" bitfld.long 0x00 24. " STD_TUNING_EN ,Used to enable standard tuning circuit and procedure" "Disabled,Enabled" bitfld.long 0x00 20.--22. " TUNING_WINDOW ,Data window value for auto tuning" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " TUNING_STEP ,Increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure" hexmask.long.byte 0x00 0.--7. 1. " TUNING_START_TAP ,The start dealy cell point when send first CMD19 in tuning procedure" endif width 0x0B tree.end tree "USDHC4" base ad:0x0219C000 width 22. group.long 0x00++0x0F line.long 0x00 "DSADDR,DMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " DS_ADDR[31:2] ,DMA System Address" line.long 0x04 "BLKATTR,Block Attributes Register" hexmask.long.word 0x04 16.--31. 1. " BLKCNT ,Blocks Count For Current Transfer" hexmask.long.word 0x04 0.--12. 1. " BLKSIZE ,Transfer Block Size" line.long 0x08 "CMDARG,Command Argument Register" line.long 0x0C "CMDXFRTYP,Command Transfer Type Register" bitfld.long 0x0C 24.--29. " CMDINX[5:0] ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 22.--23. " CMDTYP[1:0] ,Command Type" "Normal,Suspended,Resumed,Aborted" bitfld.long 0x0C 21. " DPSEL ,Data Present Select" "No data,Data present" textline " " bitfld.long 0x0C 20. " CICEN ,Command Index Check Enable" "Disabled,Enabled" bitfld.long 0x0C 19. " CCCEN ,Command CRC Check Enable" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " RSPTYP ,Response Type Select" "No response,Length 136,Length 48,Length 48/busy check" rgroup.long 0x10++0x0F line.long 0x0 "CMDRSP0,Command Response Register 0" line.long 0x4 "CMDRSP1,Command Response Register 1" line.long 0x8 "CMDRSP2,Command Response Register 2" line.long 0xC "CMDRSP3,Command Response Register 3" group.long 0x20++0x03 line.long 0x00 "DATPORT,Data Buffer Access Port Register" rgroup.long 0x24++0x03 line.long 0x00 "PRSSTAT,Present State Register" bitfld.long 0x00 31. " DLSL[7] ,DAT[7:0] Line 7 Signal Level" "Low,High" bitfld.long 0x00 30. " DLSL[6] ,DAT[7:0] Line 6 Signal Level" "Low,High" bitfld.long 0x00 29. " DLSL[5] ,DAT[7:0] Line 5 Signal Level" "Low,High" textline " " bitfld.long 0x00 28. " DLSL[4] ,DAT[7:0] Line 4 Signal Level" "Low,High" bitfld.long 0x00 27. " DLSL[3] ,DAT[7:0] Line 3 Signal Level" "Low,High" bitfld.long 0x00 26. " DLSL[2] ,DAT[7:0] Line 2 Signal Level" "Low,High" textline " " bitfld.long 0x00 25. " DLSL[1] ,DAT[7:0] Line 1 Signal Level" "Low,High" bitfld.long 0x00 24. " DLSL[0] ,DAT[7:0] Line 0 Signal Level" "Low,High" bitfld.long 0x00 23. " CLSL ,CMD Line Signal Level" "Low,High" textline " " bitfld.long 0x00 19. " WPSPL ,Write Protect Switch Pin Level" "Protected,Enabled" bitfld.long 0x00 18. " CDPL ,Card Detect Pin Level" "Not detected,Detected" bitfld.long 0x00 16. " CINST ,Card Inserted" "Reset/Not inserted,Inserted" textline " " sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x00 15. " TSCD ,Tape Select Change Done" "Not finished,Finished" textline " " endif bitfld.long 0x00 12. " RTR ,Re-Tuning Request" "Not requested,Requested" bitfld.long 0x00 11. " BREN ,Buffer Read Enable" "Disabled,Enabled" bitfld.long 0x00 10. " BWEN ,Buffer Write Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RTA ,Read Transfer Active" "Inactive,Active" bitfld.long 0x00 8. " WTA ,Write Transfer Active" "Inactive,Active" bitfld.long 0x00 7. " SDOFF ,SD Clock Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 5. " HCKOFF ,HCLK Gated Off Internally" "Gated off,Active" bitfld.long 0x00 4. " IPGOFF ,IPG_CLK Gated Off Internally" "Gated off,Active" textline " " bitfld.long 0x00 3. " SDSTB ,SD Clock Stable" "Unstable,Stable" bitfld.long 0x00 2. " DLA ,Data Line Active" "Inactive,Active" bitfld.long 0x00 1. " CDIHB ,Command Inhibit (DAT)" "Not inhibited,Inhibited" textline " " bitfld.long 0x00 0. " CIHB ,Command Inhibit (CMD)" "Not inhibited,Inhibited" group.long 0x28++0x13 line.long 0x00 "PROCTL,Protocol Control Register" bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact" bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled" bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled" bitfld.long 0x00 26. " WECRM ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.long 0x00 25. " WECINS ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " WECINT ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High" bitfld.long 0x00 19. " IABG ,Interrupt At Block Gap" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RWCTL ,Read Wait Control" "Disabled,Enabled" bitfld.long 0x00 17. " CREQ ,Continue Request" "No effect,Restart" bitfld.long 0x00 16. " SABGREQ ,Stop At Block Gap Request" "Transferred,Stopped" textline " " bitfld.long 0x00 8.--9. " DMASEL ,DMA Select" "Not selected,ADMA1,ADMA2,?..." bitfld.long 0x00 7. " CDSS ,Card Detect Signal Selection" "Normal,Test" bitfld.long 0x00 6. " CDTL ,Card Detect Test Level" "Not detected,Detected" textline " " bitfld.long 0x00 4.--5. " EMODE ,Endian Mode" "Big endian,Half word big endian,Little endian,?..." bitfld.long 0x00 3. " D3CD ,DAT3 as Card Detection Pin" "No,Yes" bitfld.long 0x00 1.--2. " DTW[1:0] ,Data Transfer Width" "1-bit,4-bit,8-bit,?..." textline " " bitfld.long 0x00 0. " LCTL ,LED Control" "Off,On" line.long 0x04 "SYSCTL,System Control Register" sif (cpu()=="IMX6SOLOLITE") bitfld.long 0x04 28. " RSTT ,Reset Tuning" "No reset,Reset" textline " " endif bitfld.long 0x04 27. " INITA ,Initialization Active" "Inactive,Active" bitfld.long 0x04 26. " RSTD ,Software Reset For DATA Line" "No reset,Reset" bitfld.long 0x04 25. " RSTC ,Software Reset For CMD Line" "No reset,Reset" textline " " bitfld.long 0x04 24. " RSTA ,Software Reset For ALL" "No reset,Reset" bitfld.long 0x04 23. " IPP_RST_N ,Value Output to CARD for hardware reset" "0,1" bitfld.long 0x04 16.--19. " DTOCV ,Data Timeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,,,,,,,,,,,S,,SDCLK x 2^27,SDCLK x 2^28" textline " " hexmask.long.byte 0x04 8.--15. 1. " SDCLKFS ,SDCLK Frequency Select" bitfld.long 0x04 4.--7. " DVS[3:0] ,Divisor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" line.long 0x08 "IRQSTAT,Interrupt Status Register" eventfld.long 0x08 28. " DMAE ,DMA Error" "No error,Error" eventfld.long 0x08 26. " TNE ,Tuning Error" "No error,Error" eventfld.long 0x08 24. " AC12E ,Auto CMD12 Error" "No error,Error" textline " " eventfld.long 0x08 22. " DEBE ,Data End Bit Error" "No error,Error" eventfld.long 0x08 21. " DCE ,Data CRC Error" "No error,Error" eventfld.long 0x08 20. " DTOE ,Data Timeout Error" "No error,Error" textline " " eventfld.long 0x08 19. " CIE ,Command Index Error" "No error,Error" eventfld.long 0x08 18. " CEBE ,Command End Bit Error" "No error,Error" eventfld.long 0x08 17. " CCE ,Command CRC Error" "No error,Error" textline " " eventfld.long 0x08 16. " CTOE ,Command Timeout Error" "No error,Error" eventfld.long 0x08 14. " TP ,Tuning Pass" "Not transferred,Transferred" eventfld.long 0x08 12. " RTE ,Re-Tuning Event" "Not requested,Requested" textline " " eventfld.long 0x08 8. " CINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.long 0x08 7. " CRM ,Card Removal" "Not removed,Removed" eventfld.long 0x08 6. " CINS ,Card Insertion" "Not inserted,Inserted" textline " " eventfld.long 0x08 5. " BRR ,Buffer Read Ready" "Not ready,Ready" eventfld.long 0x08 4. " BWR ,Buffer Write Ready" "Not ready,Ready" eventfld.long 0x08 3. " DINT ,DMA Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x08 2. " BGE ,Block Gap Event" "No event,Stopped" eventfld.long 0x08 1. " TC ,Transfer Complete" "Not completed,Completed" eventfld.long 0x08 0. " CC ,Command Complete" "Not completed,Completed" line.long 0x0C "IRQSTATEN,Interrupt Status Enable Register" bitfld.long 0x0C 28. " DMAESEN ,DMA Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 26. " TNESEN ,Tuning Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 24. " AC12ESEN ,Auto CMD12 Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " DEBESEN ,Data End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 21. " DCESEN ,Data CRC Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 20. " DTOESEN ,Data Timeout Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " CIESEN ,Command Index Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 18. " CEBESEN ,Command End Bit Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 17. " CCESEN ,Command CRC Error Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " CTOESEN ,Command Timeout Error Status Enable" "Disabled,Enabled" bitfld.long 0x0C 14. " TPSEN ,Tuning Pass Status Enable" "Disabled,Enabled" bitfld.long 0x0C 12. " RTESEN ,Re-Tuning Event Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CINTSEN ,Card Interrupt Status Enable" "Disabled,Enabled" bitfld.long 0x0C 7. " CRMSEN ,Card Removal Status Enable" "Disabled,Enabled" bitfld.long 0x0C 6. " CINSSEN ,Card Insertion Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " BRRSEN ,Buffer Read Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " BWRSEN ,Buffer Write Ready Status Enable" "Disabled,Enabled" bitfld.long 0x0C 3. " DINTSEN ,DMA Interrupt Status Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " BGESEN ,Block Gap Event Status Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TCSEN ,Transfer Complete Status Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " CCSEN ,Command Complete Status Enable" "Disabled,Enabled" line.long 0x10 "IRQSIGEN,Interrupt Signal Enable Register" bitfld.long 0x10 28. " DMAEIEN ,DMA Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 26. " TNEIEN ,Tuning Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 24. " AC12EIEN ,Auto CMD12 Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " DEBEIEN ,Data End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 21. " DCEIEN ,Data CRC Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 20. " DTOEIEN ,Data Timeout Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " CIEIEN ,Command Index Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 18. " CEBEIEN ,Command End Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 17. " CCEIEN ,Command CRC Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " CTOEIEN ,Command Timeout Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 14. " TPIEN ,Tuning Pass Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 12. " RTEIEN ,Re-Tuning Event Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " CINTIEN ,Card Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 7. " CRMIEN ,Card Removal Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 6. " CINSIEN ,Card Insertion Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " BRRIEN ,Buffer Read Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 4. " BWRIEN ,Buffer Write Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 3. " DINTIEN ,DMA Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " BGEIEN ,Block Gap Event Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 1. " TCIEN ,Transfer Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x10 0. " CCIEN ,Command Complete Interrupt Enable" "Disabled,Enabled" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x0219C000+0xCC))&0x01000000)==0x01000000) group.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample Clock Select" "Fixed,Tuned" bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute Tuning" "Not executed,Executed" textline " " rbitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif else rgroup.long 0x3C++0x03 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command Not Issued By Auto CMD12 Error" "No error,Not Issued" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 Index Error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 End Bit Error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 Timeout Error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 Not Executed" "Executed,Not executed" endif rgroup.long 0x40++0x03 line.long 0x00 "HOSTCAPBLT,Host Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SRS ,Suspend / Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 20. " ADMAS ,ADMA Support" "Not supported,Supported" bitfld.long 0x00 16.--18. " MBL[2:0] ,Max Block Length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." sif (cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning Mode" "Mode 1,Mode 2,Mode 3,?..." bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use Tuning for SDR50" "Not required,Required" bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time Counter for Retuning" "Disabled,?..." textline " " bitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported" bitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported" textline " " bitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported" endif group.long 0x44++0x07 line.long 0x00 "WML,Watermark Level Register" bitfld.long 0x00 24.--28. " WR_BRST_LEN[4:0] ,Write Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." hexmask.long.byte 0x00 16.--23. 1. " WR_WML[7:0] ,Write Watermark Level" bitfld.long 0x00 8.--12. " RD_BRST_LEN[4:0] ,Read Burst Length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " RD_WML[7:0] ,Read Watermark Level" textline " " line.long 0x04 "MIXERCTRL,Mixer control Regiseter" bitfld.long 0x04 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,Ipp_card_clk_out" bitfld.long 0x04 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SMP_CLK_SEL ,Sample clock selection" "Tuned,Fixed" bitfld.long 0x04 22. " EXE_TUNE ,Execute Tuning" "Not executed,Executed" textline " " bitfld.long 0x04 7. " AC23EN ,Auto CMD23 Enable" "Disabled,Enabled" bitfld.long 0x04 6. " NIBBLE_POS ,Nibble position" "Odd high->even high->odd low->even low,Odd high->odd low->even high->even low" textline " " bitfld.long 0x04 5. " MSBSEL ,Multi/Single Block Select" "Single,Multiple" bitfld.long 0x04 4. " DTDSEL ,Data Transfer Direction Select" "Write,Read" textline " " bitfld.long 0x04 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled" bitfld.long 0x04 2. " AC12EN ,Auto CMD12 Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BCEN ,Block Count Enable" "Disabled,Enabled" bitfld.long 0x04 0. " DMAEN ,DMA Enable" "Disabled,Enabled" textline " " wgroup.long 0x50++0x03 line.long 0x00 "FEVT,Force Event Register" bitfld.long 0x00 31. " FEVTCINT ,Force Event Card Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " FEVTDMAE ,Force Event DMA Error" "No error,Error" bitfld.long 0x00 26. " FEVTTNE ,Force Tuning Error" "No error,Error" textline " " bitfld.long 0x00 24. " FEVTAC12E ,Force Event Auto Command 12 Error" "No error,Error" bitfld.long 0x00 22. " FEVTDEBE ,Force Event Data End Bit Error" "No error,Error" bitfld.long 0x00 21. " FEVTDCE ,Force Event Data CRC Error" "No error,Error" textline " " bitfld.long 0x00 20. " FEVTDTOE ,Force Event Data Time Out Error" "No error,Error" bitfld.long 0x00 19. " FEVTCIE ,Force Event Command Index Error" "No error,Error" bitfld.long 0x00 18. " FEVTCEBE ,Force Event Command End Bit Error" "No error,Error" textline " " bitfld.long 0x00 17. " FEVTCCE ,Force Event Command CRC Error" "No error,Error" bitfld.long 0x00 16. " FEVTCTOE ,Force Event Command Time Out Error" "No error,Error" bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force Event Command Not Executed By Auto Command 12 Error" "No error,Error" textline " " bitfld.long 0x00 4. " FEVTAC12IE ,Force Event Auto Command 12 Index Error" "No error,Error" bitfld.long 0x00 3. " FEVTAC12EBE ,Force Event Auto Command 12 End Bit Error" "No error,Error" bitfld.long 0x00 2. " FEVTAC12CE ,Force Event Auto Command 12 CRC Error" "No error,Error" textline " " bitfld.long 0x00 1. " FEVTAC12TOE ,Force Event Auto Command 12 Time Out Error" "No error,Error" bitfld.long 0x00 0. " FEVTAC12NE ,Force Event Auto Command 12 Not Executed" "No error,Error" rgroup.long 0x54++0x03 line.long 0x00 "ADMAES,ADMA Error Status Register" bitfld.long 0x00 3. " ADMADCE ,ADMA Descritor Error" "No error,Error" bitfld.long 0x00 2. " ADMALME ,ADMA Length Mismatch Error" "No error,Error" bitfld.long 0x00 0.--1. " ADMAES ,ADMA Error State " "ST_STOP,ST_FDS,ST_CADR,ST_TFR" group.long 0x58++0x03 line.long 0x00 "ADSADDR,ADMA System Address Register" hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR[31:0] ,ADMA System Address" group.long 0x60++0x03 line.long 0x00 "DLLCTRL,DLL Control Register" bitfld.long 0x00 28.--31. " DLL_CTRL_REF_UPDATE_INT ,DLL control loop update interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DLL_CTRL_SLV_UPDATE_INT ,Slave delay line update interval" bitfld.long 0x00 16.--18. " DLL_CTRL_SLV_DLY_TARGET ,Slave delay target" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 9.--15. 1. " DLL_CTRL_SLV_OVERRIDE_VAL ,Slave override value" bitfld.long 0x00 8. " DLL_CTRL_SLV_OVERRIDE ,Manual override for slave delay chain" "Disabled,Enabled" bitfld.long 0x00 7. " DLL_CTRL_GATE_UPDATE ,DLL update" "Automatically,No update" textline " " bitfld.long 0x00 3.--6. " DLL_CTRL_SLV_DLY_TARGET ,The delay target for the uSDHC loopback read clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2. " DLL_CTRL_SLV_FORCE_UPD ,DLL slave update" "No update,Updated" bitfld.long 0x00 1. " DLL_CTRL_RESET ,DLL reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " DLL_CTRL_ENABLE ,DLL enable" "Disabled,Enabled" rgroup.long 0x64++0x03 line.long 0x00 "DLLSTS,DLL Status Register" hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps" hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status" bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked" textline " " bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Invalid,Valid" sif (cpu()=="IMX6SOLOLITE") if (((per.l(ad:0x0219C000+0x3C))&0x800000)==0x800000) group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else group.long 0x68++0x03 line.long 0x00 "CLKTUNE,Clock Tuning Control and Status Register" rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE" rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE" textline " " bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC0++0x0B line.long 0x00 "VENDOR,Vendor Specific Register" bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " INT_ST_VAL ,Internal State Value" bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes" sif (cpu()=="IMX6DUAL")||(cpu()=="IMX6QUAD")||(cpu()=="IMX6DUALLITE")||(cpu()=="IMX6SOLO")||(cpu()=="IMX6SOLOLITE") textline " " bitfld.long 0x00 14. " CARD_CLK_SOFT_EN ,Card clock software enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " IPG_PERCLK_SOFT_EN ,IPG_PERCLK software enable" "Disabled,Enabled" bitfld.long 0x00 12. " HCLK_SOFT_EN ,AHB clock software enable" "Disabled,Enabled" bitfld.long 0x00 11. " IPG_CLK_SOFT_EN ,IPG_CLK software enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Controlled by hardware,Active" bitfld.long 0x00 7. " CLKONJ_IN_ABORT ,Force CLK output active when sending Abort command" "Active,Inactive" bitfld.long 0x00 6. " WP_POL ,Polarity of the WP pin" "High,Low" textline " " bitfld.long 0x00 5. " CD_POL ,Polarity of the CD pin" "Low,High" bitfld.long 0x00 4. " DAT3_CD_POL ,Polarity of Dat3 pin when its used as card detection" "High,Low" bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled" bitfld.long 0x00 1. " VSELECT ,Voltage Selection (around: 3.0V,1.8V)" "High,Low" bitfld.long 0x00 0. " EXT_DMA_EN ,External DMA Request Enable" "Disabled,Enabled" line.long 0x04 "MMCBOOT,MMC Boot Register" hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Boot block gap counter" bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes" bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled" bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative" bitfld.long 0x04 4. " BOOT_ACK ,Boot ack mode select" "No ACK,ACK" textline " " bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACKTimeout Counter Value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,SDCLK x 2^28" line.long 0x08 "VENDOR2,Vendor Specific 2 Register" bitfld.long 0x08 7. " CARD_INT_AUTO_CLR_DIS ,Disable clearing of the the Card interrupt status bit" "No,Yes" bitfld.long 0x08 6. " TUNING_CMD_EN ,Enable the auto tuning circuit to check the CMD line" "Disabled,Enabled" bitfld.long 0x08 4.--5. " TUNING_EN ,Enable the auto tuning circuit to check the DAT[7:0]" "DAT[3:0],DAT[0],DAT[7:0],Invalid" textline " " bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test" "DAT[3] high,Ignored DAT[3]" bitfld.long 0x08 2. " SDR104_NSD_DIS ,Interrupt window after abort command is sent" "9 cycles,5 cycles" bitfld.long 0x08 1. " SDR104_OE_DIS ,Drive CMD_OE/DAT_OE for one more clock cycle after the end bit" "Yes,No" textline " " bitfld.long 0x08 0. " SDR104_TIMING_DIS ,The timeout counter for Ncr changes/Ncrc changes" "80/21,72/15" sif (cpu()=="IMX6SOLOLITE") group.long 0xCC++0x03 line.long 0x00 "TUNING_CTRL,Tuning Control Register" bitfld.long 0x00 24. " STD_TUNING_EN ,Used to enable standard tuning circuit and procedure" "Disabled,Enabled" bitfld.long 0x00 20.--22. " TUNING_WINDOW ,Data window value for auto tuning" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " TUNING_STEP ,Increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure" hexmask.long.byte 0x00 0.--7. 1. " TUNING_START_TAP ,The start dealy cell point when send first CMD19 in tuning procedure" endif width 0x0B tree.end tree.end sif (cpu()!=("IMX6SOLOLITE")) tree "VDOA (Video Data Order Adapter)" base ad:0x021E4000 width 12. group.long 0x00++0x13 line.long 0x00 "VDOAC,VDOA Control Register" bitfld.long 0x00 6. " ISEL ,IPU SELECT" "Vdoa_buf_rdy[0] & ipu_buf_eob[0],Vdoa_buf_rdy[1] & ipu_buf_eob[1]" bitfld.long 0x00 5. " PFS ,Pixel Format Select" "4:2:0,4:2:2" bitfld.long 0x00 4. " SO ,Scan Order" "Progressive,Interlaced" bitfld.long 0x00 3. " SYNC ,SYNC MODE" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " NF ,Number of frames" "1,3" bitfld.long 0x00 0.--1. " BNDM ,BNDM Band Size" "8 lines,16 lines,32 lines,?..." line.long 0x04 "VDOASR,VDOA Start and Reset Register" bitfld.long 0x04 1. " Start ,Start Transfer" "Ignored,Started" bitfld.long 0x04 0. " SWRST ,Software reset" "No reset,Reset" line.long 0x08 "VDOAIE,VDOA Interrupt Enable" bitfld.long 0x08 1. " EITERR ,Enable Interrupt Transfer access Error" "Disabled,Enabled" bitfld.long 0x08 0. " EIEOT ,Enable Interrupt End Of Transfer" "Disabled,Enabled" line.long 0x0C "VDOAIST,VDOA Interrupt Status Register" eventfld.long 0x0C 1. " TERR ,TERR" "No error,Error" eventfld.long 0x0C 0. " EOT ,End Of transfer" "Not complete,Completed" line.long 0x10 "VDOAFP,VDOA Frame Parameters Register" hexmask.long.word 0x10 16.--28. 1. " FH ,Number of pixels in one column" hexmask.long.word 0x10 0.--13. 1. " FW ,Number of pixels in one row" if (((per.l(ad:0x021E4000))&0x0C)==0x04) group.long 0x14++0x0B line.long 0x0 "VDOAIEBA00,VDOA IPU External Buffer 0 Frame 0 Address Register" line.long 0x4 "VDOAIEBA01,VDOA IPU External Buffer 0 Frame 1 Address Register" line.long 0x8 "VDOAIEBA02,VDOA IPU External Buffer 0 Frame 2 Address Register" hgroup.long 0x20++0x0B hide.long 0x0 "VDOAIEBA10,VDOA IPU External Buffer 1 Frame 0 Address Register" hide.long 0x4 "VDOAIEBA11,VDOA IPU External Buffer 1 Frame 1 Address Register" hide.long 0x8 "VDOAIEBA12,VDOA IPU External Buffer 1 Frame 2 Address Register" elif (((per.l(ad:0x021E4000))&0x0C)==0x0C) group.long 0x14++0x17 line.long (0x00+0x0) "VDOAIEBA00,VDOA IPU External Buffer 0 Frame 0 Address Register" line.long (0x04+0x0) "VDOAIEBA01,VDOA IPU External Buffer 0 Frame 1 Address Register" line.long (0x08+0x0) "VDOAIEBA02,VDOA IPU External Buffer 0 Frame 2 Address Register" line.long (0x00+0xC) "VDOAIEBA10,VDOA IPU External Buffer 1 Frame 0 Address Register" line.long (0x04+0xC) "VDOAIEBA11,VDOA IPU External Buffer 1 Frame 1 Address Register" line.long (0x08+0xC) "VDOAIEBA12,VDOA IPU External Buffer 1 Frame 2 Address Register" elif (((per.l(ad:0x021E4000))&0x0C)==0x08) group.long 0x14++0x03 line.long 0x00 "VDOAIEBA00,VDOA IPU External Buffer 0 Frame 0 Address Register" hgroup.long 0x18++0x07 hide.long 0x00 "VDOAIEBA01,VDOA IPU External Buffer 0 Frame 1 Address Register" hide.long 0x04 "VDOAIEBA02,VDOA IPU External Buffer 0 Frame 2 Address Register" group.long 0x20++0x03 line.long 0x00 "VDOAIEBA10,VDOA IPU External Buffer 1 Frame 0 Address Register" hgroup.long 0x24++0x07 hide.long 0x00 "VDOAIEBA11,VDOA IPU External Buffer 1 Frame 1 Address Register" hide.long 0x04 "VDOAIEBA12,VDOA IPU External Buffer 1 Frame 2 Address Register" else group.long 0x14++0x03 line.long 0x00 "VDOAIEBA00,VDOA IPU External Buffer 0 Frame 0 Address Register" hgroup.long 0x18++0x13 hide.long 0x00 "VDOAIEBA01,VDOA IPU External Buffer 0 Frame 1 Address Register" hide.long 0x04 "VDOAIEBA02,VDOA IPU External Buffer 0 Frame 2 Address Register" hide.long 0x08 "VDOAIEBA10,VDOA IPU External Buffer 1 Frame 0 Address Register" hide.long 0x0C "VDOAIEBA11,VDOA IPU External Buffer 1 Frame 1 Address Register" hide.long 0x10 "VDOAIEBA12,VDOA IPU External Buffer 1 Frame 2 Address Register" endif group.long 0x2C++0x07 line.long 0x00 "VDOASL,VDOA IPU Stride Line Register" hexmask.long.word 0x00 16.--29. 1. " VSLY ,VPU Stride Line" hexmask.long.word 0x00 0.--14. 1. " ISLY ,IPU Stride Line" line.long 0x04 "VDOAIUBO,VDOA IPU U (Chroma) Buffer Offset Register" hexmask.long 0x04 0.--26. 1. " IUBO ,IPU U (Chroma) Buffer Offset" if (((per.l(ad:0x021E4000))&0x04)==0x00) group.long 0x34++0x03 line.long 0x00 "VDOAVEBA0,VDOA VPU External Buffer 0 Address Register" hgroup.long 0x38++0x07 hide.long 0x00 "VDOAVEBA1,VDOA VPU External Buffer 1 Address Register" hide.long 0x04 "VDOAVEBA2,VDOA VPU External Buffer 2 Address Register" else group.long 0x34++0x0B line.long 0x00 "VDOAVEBA0,VDOA VPU External Buffer 0 Address Register" line.long 0x04 "VDOAVEBA1,VDOA VPU External Buffer 1 Address Register" line.long 0x08 "VDOAVEBA2,VDOA VPU External Buffer 2 Address Register" endif group.long 0x40++0x03 line.long 0x00 "VDOAVUBO,VDOA VPU U (Chroma) Buffer Offset Register" hexmask.long 0x00 0.--26. 1. " VUBO ,VPU U (Chroma) Buffer Offset" rgroup.long 0x44++0x03 line.long 0x00 "VDOAST,VDOA Status Register" bitfld.long 0x00 4. " ERRW ,Error Write" "Read error,Write error" bitfld.long 0x00 3. " EOB ,End of Band" "Not ended,Ended" bitfld.long 0x00 1.--2. " CUR_FRAME ,Current Frame" "0,1,2,3" bitfld.long 0x00 0. " CUR_BUFFER ,Current Buffer" "0,1" width 0x0B tree.end tree "VPU (Video Processing Unit)" base ad:0x02040000 width 18. wgroup.long 0x00++0x0F line.long 0x00 "VPU_CODERUN,BIT Processor run start" bitfld.long 0x00 0. " VPU_CODERUN ,BIT processor run start bit" "Stop,Start" line.long 0x04 "VPU_CODEDOWN,BIT Boot Code Download Data register" hexmask.long.word 0x04 16.--28. 1. " CODEADDR ,CodeAddr[12:0]" hexmask.long.word 0x04 0.--15. 1. " CODEDATA ,CodeData[15:0]" line.long 0x08 "VPU_HOSTINTREQ,Host Interrupt Request to BIT" bitfld.long 0x08 0. " INTREQ ,The host interrupt request bit" "No request,Request" line.long 0x0C "VPU_BITINTCLEAR,BIT Interrupt Clear" bitfld.long 0x0C 0. " INTCLEAR ,BIT interrupt clear bit" "No operation,Clear" rgroup.long 0x10++0x03 line.long 0x00 "VPU_BITINTSTS,BIT Interrupt Status" bitfld.long 0x00 0. " INTSTS ,BIT interrupt status bit" "No interrupt,Interrupt" rgroup.long 0x18++0x03 line.long 0x00 "VPU_BITCURPC,BIT Current PC" hexmask.long.word 0x00 0.--13. 1. " CURPC[13:0] ,BIT current PC value" rgroup.long 0x20++0x03 line.long 0x00 "VPU_BITCODECBUSY,BIT CODEC Busy" bitfld.long 0x0 0. " CODECBUSY ,Codec busy flag for Bit processor" "Not busy,Busy" width 11. tree.end endif tree.open "WDOG (Watchdog)" tree "WDOG-1" base ad:0x020BC000 width 6. group.word 0x00++0x03 line.word 0x00 "WCR,Watchdog 1 Control Register" hexmask.word.byte 0x00 8.--15. 1. " WT ,Watchdog Time-out Field" bitfld.word 0x00 7. " WDW ,Watchdog Disable for Wait" "Continues,Suspended" textline " " sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpuis("IMX6SLX*"))||(cpu()=="IMX6ULTRALITE")||(cpu()=="IMX6ULL")||(cpu()=="IMX6SOLOLITE") bitfld.word 0x00 6. " SRE ,Software reset extension" "Original,Extended" textline " " endif bitfld.word 0x00 5. " WDA ,WDOG assertion" "Asserted,No effect" bitfld.word 0x00 4. " SRS ,Software Reset Signal" "Asserted,No effect" bitfld.word 0x00 3. " WDT ,WDOG Time-out assertion" "No effect,Asserted" textline " " bitfld.word 0x00 2. " WDE ,Watchdog Enable" "Disabled,Enabled" bitfld.word 0x00 1. " WDBG ,Watchdog DEBUG Enable" "Continues,Suspended" bitfld.word 0x00 0. " WDZST ,Watchdog Low Power" "Continues,Suspended" line.word 0x02 "WSR,Watchdog 1 Service Register" rgroup.word 0x04++0x01 line.word 0x00 "WRSR,Watchdog 1 Reset Status Register" bitfld.word 0x00 4. " POR ,Power On Reset" "No reset,Reset" bitfld.word 0x00 1. " TOUT ,Time-out" "No reset,Reset" bitfld.word 0x00 0. " SFTW ,Software Reset" "No reset,Reset" group.word 0x06++0x03 line.word 0x00 "WICR,Watchdog Interrupt Control Register" bitfld.word 0x00 15. " WIE ,Watchdog Timer Interrupt Enable" "Disabled,Enabled" eventfld.word 0x00 14. " WTIS ,Watchdog Timer Interrupt Status" "No interrupt,Interrupt" hexmask.word.byte 0x00 0.--7. 1. " WICT ,Watchdog Interrupt Count Time-out " line.word 0x02 "WMCR,Watchdog 1 Miscellaneous Control Register" bitfld.word 0x02 0. " PDE ,Power Down Enable" "Disabled,Enabled" width 0x0B tree.end tree "WDOG-2" base ad:0x020C0000 width 6. group.word 0x00++0x03 line.word 0x00 "WCR,Watchdog 2 Control Register" hexmask.word.byte 0x00 8.--15. 1. " WT ,Watchdog Time-out Field" bitfld.word 0x00 7. " WDW ,Watchdog Disable for Wait" "Continues,Suspended" textline " " sif (cpu()=="IMX6SOLO")||(cpu()=="IMX6DUALLITE")||(cpuis("IMX6SLX*"))||(cpu()=="IMX6ULTRALITE")||(cpu()=="IMX6ULL")||(cpu()=="IMX6SOLOLITE") bitfld.word 0x00 6. " SRE ,Software reset extension" "Original,Extended" textline " " endif bitfld.word 0x00 5. " WDA ,WDOG assertion" "Asserted,No effect" bitfld.word 0x00 4. " SRS ,Software Reset Signal" "Asserted,No effect" bitfld.word 0x00 3. " WDT ,WDOG Time-out assertion" "No effect,Asserted" textline " " bitfld.word 0x00 2. " WDE ,Watchdog Enable" "Disabled,Enabled" bitfld.word 0x00 1. " WDBG ,Watchdog DEBUG Enable" "Continues,Suspended" bitfld.word 0x00 0. " WDZST ,Watchdog Low Power" "Continues,Suspended" line.word 0x02 "WSR,Watchdog 2 Service Register" rgroup.word 0x04++0x01 line.word 0x00 "WRSR,Watchdog 2 Reset Status Register" bitfld.word 0x00 4. " POR ,Power On Reset" "No reset,Reset" bitfld.word 0x00 1. " TOUT ,Time-out" "No reset,Reset" bitfld.word 0x00 0. " SFTW ,Software Reset" "No reset,Reset" group.word 0x06++0x03 line.word 0x00 "WICR,Watchdog Interrupt Control Register" bitfld.word 0x00 15. " WIE ,Watchdog Timer Interrupt Enable" "Disabled,Enabled" eventfld.word 0x00 14. " WTIS ,Watchdog Timer Interrupt Status" "No interrupt,Interrupt" hexmask.word.byte 0x00 0.--7. 1. " WICT ,Watchdog Interrupt Count Time-out " line.word 0x02 "WMCR,Watchdog 2 Miscellaneous Control Register" bitfld.word 0x02 0. " PDE ,Power Down Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "XTALOSC (Crystal Oscillator)" base ad:0x020C8150 width 18. group.long 0x00++0x03 line.long 0x00 "XTALOSC24M_MISC0,Miscellaneous Register 0" bitfld.long 0x00 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and release the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms" bitfld.long 0x00 25. " CLKGATE_CTRL ,Disabling the clock gate" "No,Yes" bitfld.long 0x00 18.--19. " WBCP_VPW_THRESH ,Alters the voltage that the pwell is charged pumped to" "Nominal voltage,Increase by 25mV,Decrease by 25mV,Decrease by 50mV" bitfld.long 0x00 17. " OSC_XTALOK_EN ,Enable bit for the xtal_ok module(24 MHz)" "Disabled,Enabled" textline " " rbitfld.long 0x00 16. " OSC_XTALOK ,Status of output of the 24MHz crystal oscillator" "Not stable,Stable" bitfld.long 0x00 14.--15. " OSC_I ,Determines the bias current in the 24MHz oscillator" "Nominal,Decrease by 12.5%,Decrease by 25.0%,Decrease by 37.5%" sif (cpu()=="IMX6SOLOLITE") textline "" bitfld.long 0x00 13. " DISCON_HIGH_SNVS ,Forces the short between VDDHIGH_IN and VSNVS_IN to open" "Not forced,Forced" bitfld.long 0x00 11.--12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "DEEP,LIGHT,?..." bitfld.long 0x00 7. " REFTOP_VBGUP ,Status of the analog bandgap voltage" "Not stable,Stable" else bitfld.long 0x00 12. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "All powered down (except RTC),Certain powered-up" bitfld.long 0x00 7. " REFTOP_VBGUP ,Status of the analog bandgap voltage" "Not stable,Stable" endif textline " " bitfld.long 0x00 4.--6. " REFTOP_VBGADJ ,Analog bandgap voltage adjustment" "Nominal,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%" bitfld.long 0x00 3. " REFTOP_SELFBIASOFF ,Disable the self-bias circuit in the analog bandgap" "No,Yes" bitfld.long 0x00 0. " REFTOP_PWD ,Power-down the analog bandgap reference circuitry" "Not set,Set" textline " " sif (cpu()=="IMX6SOLOLITE") width 28. group.long 0x120++0x0F line.long 0x00 "XTALOSC24M_LOWPWR_CTRL,XTAL OSC (LP) Control Register" rbitfld.long 0x00 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable" bitfld.long 0x00 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal" "0.25 ms,0.5 ms,1 ms,2 ms" bitfld.long 0x00 13. " RCOSC_CG_OVERRIDE ,Effects clock gating of certain digital logic clocked by the 24MHz clk" "Not occurred,Occurred" textline " " bitfld.long 0x00 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x00 11. " DISPLAY_PWRGATE ,Display logic power gate control" "0,1" bitfld.long 0x00 10. " CPU_PWRGATE ,CPU power gate control" "0,1" textline " " bitfld.long 0x00 9. " L2_PWRGATE ,L2 power gate control" "0,1" bitfld.long 0x00 8. " L1_PWRGATE ,L1 power gate control" "0,1" bitfld.long 0x00 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x00 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x00 5. " LPBG_SEL ,Bandgap select" "0,1" bitfld.long 0x00 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x00 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" line.long 0x04 "XTALOSC24M_LOWPWR_CTRL_SET,XTAL OSC (LP) Control Register" rbitfld.long 0x04 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable" bitfld.long 0x04 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal" "0.25 ms,0.5 ms,1 ms,2 ms" bitfld.long 0x04 13. " RCOSC_CG_OVERRIDE ,Effects clock gating of certain digital logic clocked by the 24MHz clk" "Not occurred,Occurred" textline " " bitfld.long 0x04 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x04 11. " DISPLAY_PWRGATE ,Display logic power gate control" "0,1" bitfld.long 0x04 10. " CPU_PWRGATE ,CPU power gate control" "0,1" textline " " bitfld.long 0x04 9. " L2_PWRGATE ,L2 power gate control" "0,1" bitfld.long 0x04 8. " L1_PWRGATE ,L1 power gate control" "0,1" bitfld.long 0x04 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x04 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x04 5. " LPBG_SEL ,Bandgap select" "0,1" bitfld.long 0x04 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x04 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" line.long 0x08 "XTALOSC24M_LOWPWR_CTRL_CLR,XTAL OSC (LP) Control Register" rbitfld.long 0x08 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable" bitfld.long 0x08 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal" "0.25 ms,0.5 ms,1 ms,2 ms" bitfld.long 0x08 13. " RCOSC_CG_OVERRIDE ,Effects clock gating of certain digital logic clocked by the 24MHz clk" "Not occurred,Occurred" textline " " bitfld.long 0x08 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x08 11. " DISPLAY_PWRGATE ,Display logic power gate control" "0,1" bitfld.long 0x08 10. " CPU_PWRGATE ,CPU power gate control" "0,1" textline " " bitfld.long 0x08 9. " L2_PWRGATE ,L2 power gate control" "0,1" bitfld.long 0x08 8. " L1_PWRGATE ,L1 power gate control" "0,1" bitfld.long 0x08 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x08 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x08 5. " LPBG_SEL ,Bandgap select" "0,1" bitfld.long 0x08 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x08 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" line.long 0x0C "XTALOSC24M_LOWPWR_CTRL_TOG,XTAL OSC (LP) Control Register" rbitfld.long 0x0C 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable" bitfld.long 0x0C 14.--15. " XTALOSC_PWRUP_DELAY ,Specifies the time delay between when the 24MHz xtal" "0.25 ms,0.5 ms,1 ms,2 ms" bitfld.long 0x0C 13. " RCOSC_CG_OVERRIDE ,Effects clock gating of certain digital logic clocked by the 24MHz clk" "Not occurred,Occurred" textline " " bitfld.long 0x0C 12. " RWB_EN ,Reverse well bias enable control" "Disabled,Enabled" bitfld.long 0x0C 11. " DISPLAY_PWRGATE ,Display logic power gate control" "0,1" bitfld.long 0x0C 10. " CPU_PWRGATE ,CPU power gate control" "0,1" textline " " bitfld.long 0x0C 9. " L2_PWRGATE ,L2 power gate control" "0,1" bitfld.long 0x0C 8. " L1_PWRGATE ,L1 power gate control" "0,1" bitfld.long 0x0C 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes" textline " " bitfld.long 0x0C 6. " LPBG_TEST ,Low power bandgap test bit" "0,1" bitfld.long 0x0C 5. " LPBG_SEL ,Bandgap select" "0,1" bitfld.long 0x0C 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC" textline " " bitfld.long 0x0C 1.--3. " RC_OSC_PROG ,RC osc. tuning values" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0. " RC_OSC_EN ,RC Osc. enable control" "XTAL OSC,RC OSC" endif width 0x0B tree.end textline ""