; --------------------------------------------------------------------------------
; @Title: ARM CoreSight Module: Embedded Logic Analyzer (ELA-500 and ELA-600)
; @Props: Released
; @Author: PEG
; @Changelog: 2016-03-04
; @Manufacturer: ARM
; @Doc: coresight_ela500_technical_reference_manual_100127_0100_00_en.pdf (Rev. 2015-10-30)
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perela.per 12070 2020-06-24 12:18:28Z bschroefel $

entry &baseaddr=e:ELABASE()
config 16. 8.
width 15.
base &baseaddr
if ela.version()>=0x600
group.long 0x000++3. "Control"
line.long 0x0 "CTRL,Logic Analyzer Control Register"
bitfld.long 0x0 0. " RUN  ,Run Control - ELA-600 Enable" "Disabled,Enabled"
bitfld.long 0x0 1. "  BUSY ,Trace Busy" "-,Busy"
else
group.long 0x000++3. "Control"
line.long 0x0 "CTRL,Logic Analyzer Control Register"
bitfld.long 0x0 0. " RUN ,Run Control - ELA-500 Enable" "Disabled,Enabled"
endif
group.long 0x004++7.
line.long 0x0 "TIMECTRL,Timestamp Control Register"
bitfld.long 0x0 16. " TSEN ,Timestamp Enable" "Disabled,Enabled"
bitfld.long 0x0 12.--15. "  TSINT ,Timestamp Interval Select Bit of Trace Counter" " -,bit1,bit2,bit3,bit4,bit5,bit6,bit7,bit8,bit9,bit10,bit11,bit12,bit13,bit14,bit15"
bitfld.long 0x0 4.--7. "  TCSEL1 ,Trace Counter 1 Select Bit for SRAM Trace Header Byte" "bit0,bit1,bit2,bit3,bit4,bit5,bit6,bit7,bit8,bit9,bit10,bit11,bit12,bit13,bit14,bit15"
bitfld.long 0x0 0.--3. "  TCSEL0 ,Trace Counter 0 Select Bit for SRAM Trace Header Byte" "bit0,bit1,bit2,bit3,bit4,bit5,bit6,bit7,bit8,bit9,bit10,bit11,bit12,bit13,bit14,bit15"
line.long 0x4 "TSSR,Trigger State Select Register"
bitfld.long 0x4 7. " ALTTS  ,Trigger State 7 Independent Trace Enable" "-,7"
bitfld.long 0x4 6. ",Trigger State 6 Independent Trace Enable" "-,6"
bitfld.long 0x4 5. ",Trigger State 5 Independent Trace Enable" "-,5"
bitfld.long 0x4 4. ",Trigger State 4 Independent Trace Enable" "-,4"
bitfld.long 0x4 3. ",Trigger State 3 Independent Trace Enable" "-,3"
bitfld.long 0x4 2. ",Trigger State 2 Independent Trace Enable" "-,2"
bitfld.long 0x4 1. ",Trigger State 1 Independent Trace Enable" "-,1"
bitfld.long 0x4 0. ",Trigger State 0 Independent Trace Enable" "-,0"
if ela.version()>=0x600
group.long 0x0c++3.
line.long 0x0 "ATBCTRL,ATB Control Register"
bitfld.long 0x0 31. " PREDICT ,Prediction Logic Control" "Disabled,Enabled"
bitfld.long 0x0 15. "  ATIDTRIGEN ,ATID trigger transaction" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "  ATBID ,ATB Trace ID"
hexmask.long.byte 0x00 0.--7. 1. "  ASYNCINTERVAL ,A-Sync Interval Count"
endif
group.long 0x010++3.
line.long 0x0 "PTACTION,Pre-trigger Action Register"
bitfld.long 0x0 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x14++3.
line.long 0x0 "AUXCTRL,Auxiliary Control Register"
bitfld.long 0x0 0. " FLUSHDIS ,ATB AFVALID Flush Requests disable" "Enabled,Disabled"
group.long 0x18++3.
line.long 0x0 "CNTSEL,Counter Select Register"
bitfld.long 0x0 9.--11. " POS4 ,Trigger State Counter Select" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 6.--8. "  POS3 ,Trigger State Counter Select" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "  POS2 ,Trigger State Counter Select" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "  POS1 ,Trigger State Counter Select" "0,1,2,3,4,5,6,7"
endif
rgroup.long 0x020++15. "Current State"
line.long 0x0 "CTSR,Current Trigger State Register"
bitfld.long 0x0 31. " FINALSTATE ,Final State Reached" "No,Yes"
bitfld.long 0x0 0.--30. "  CTSR ,Current Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x4 "CCVR,Current Counter Value Register"
line.long 0x8 "CAVR,Current Action Value Register"
bitfld.long 0x8 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x8 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x8 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x8 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0xC "RDCAPTID,Read Captured Transaction ID Register"
group.long 0x040++3. "RAM"
line.long 0x0 "RRAR,RAM Read Address Register"
hgroup.long 0x044++3.
hide.long 0x0 "RRDR,RAM Read Data Register"
in
group.long 0x048++0x3
line.long 0x0 "RWAR,RAM Write Address Register"
wgroup.long 0x04c++0x3
line.long 0x0 "RWDR,RAM Write Data Register"
base &baseaddr+0x100
group.long 0x00++23. "Trigger State 0"
line.long 0x00 "SIGSEL0,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL0,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE0,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION0,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE0,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION0,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL0,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL0,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP0,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL0,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK0,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP0,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK0,Qualifier Mask Register"
line.long 0x04 "QUALCOMP0,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK0,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP0,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x200
group.long 0x00++23. "Trigger State 1"
line.long 0x00 "SIGSEL1,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL1,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE1,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION1,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE1,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION1,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL1,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL1,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP1,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL1,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK1,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP1,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK1,Qualifier Mask Register"
line.long 0x04 "QUALCOMP1,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK1,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP1,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x300
group.long 0x00++23. "Trigger State 2"
line.long 0x00 "SIGSEL2,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL2,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE2,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION2,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE2,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION2,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL2,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL2,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP2,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL2,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK2,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP2,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK2,Qualifier Mask Register"
line.long 0x04 "QUALCOMP2,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK2,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP2,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x400
group.long 0x00++23. "Trigger State 3"
line.long 0x00 "SIGSEL3,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL3,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE3,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION3,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE3,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION3,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL3,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL3,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP3,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL3,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK3,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP3,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK3,Qualifier Mask Register"
line.long 0x04 "QUALCOMP3,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK3,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP3,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x500
group.long 0x00++23. "Trigger State 4"
line.long 0x00 "SIGSEL4,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL4,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE4,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION4,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE4,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION4,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL4,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL4,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP4,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL4,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK4,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP4,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK4,Qualifier Mask Register"
line.long 0x04 "QUALCOMP4,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK4,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP4,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x600
group.long 0x00++23. "Trigger State 5"
line.long 0x00 "SIGSEL5,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL5,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE5,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION5,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE5,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION5,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL5,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL5,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP5,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL5,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK5,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP5,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK5,Qualifier Mask Register"
line.long 0x04 "QUALCOMP5,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK5,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP5,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x700
group.long 0x00++23. "Trigger State 6"
line.long 0x00 "SIGSEL6,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL6,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE6,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION6,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE6,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION6,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL6,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL6,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP6,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL6,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK6,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP6,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK6,Qualifier Mask Register"
line.long 0x04 "QUALCOMP6,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK6,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP6,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
base &baseaddr+0x800
group.long 0x00++23. "Trigger State 7"
line.long 0x00 "SIGSEL7,Signal Select Register Bit0->Group0, Bit11->Group11"
line.long 0x04 "TRIGCTRL7,Trigger Control Register"
bitfld.long 0x04 03. " COMPSEL    ,Comparision Mode" "Signal,Counter"
bitfld.long 0x04 00.--02. "  COMP    ,Trigger Signal Comparison Type" "Disabled,==,>,>=,Reserved,!=,<,<="
bitfld.long 0x04 10.--11. "   CAPTID ,Usage of Captured ID" "Disabled,Capture ID on signal match,Compare signals with ID,Compare ID with SIGCOMP"
textline "                       "
bitfld.long 0x04 15. "  ALTCOMPSEL ,Alternative Comparision Mode" "Signal,Counter"
bitfld.long 0x04 12.--14. "  ALTCOMP ,Alternative Trigger Signal Comparision Type" "Disabled,==,>,>=,Reserved,!=,<,<="
textline "                       "
bitfld.long 0x04 5. "  COUNTSRC ,Counter Source" "ELACLK,Signal Comparision"
bitfld.long 0x04 8. "   COUNTCLR ,Counter Clear When Moving To A Different State" "No,Yes"
bitfld.long 0x04 9. "  COUNTBRK ,Break Trigger State Counter Loop" "No,Yes"
bitfld.long 0x04 4. "  WATCHRST ,Reset Counter After a Trigger Signal Comparision Match" "No,Yes"
textline "                       "
bitfld.long 0x04 06.--07. "  TRACE    ,Trace Capture Control" "Signal Comparision,Counter Comparision,Every ELACLK Cycle,Counter Capture"
line.long 0x08 "NEXTSTATE7,Next State Register"
bitfld.long 0x08 0.--4. " NEXT    ,Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x0c "ACTION7,Action Register"
bitfld.long 0x0c 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0c 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x0c 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0c 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
line.long 0x10 "ALTNEXTSTATE7,Alt Next State Register"
bitfld.long 0x10 0.--4. " ALTNEXT ,Alt Next Trigger State" "Final State,State 0,State 1,-,State 2,-,-,-,State 3,-,-,-,-,-,-,-,State 4,?..."
line.long 0x14 "ALTACTION7,Alt Action Register"
bitfld.long 0x14 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x14 3. "  TRACE ,Trace Enable" "Disabled,Enabled"
bitfld.long 0x14 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x14 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x18++7.
line.long 0x00 "COMPCTRL7,Comparator Control Register"
line.long 0x04 "ALTCOMPCTRL7,Alternate Comparator Control Register"
endif
group.long 0x20++3.
line.long 0x0 "COUNTCOMP7,Counter Compare Register"
if ela.version()>=0x600
group.long 0x28++3.
line.long 0x00 "TWBSEL7,Trace Write Byte Select Register"
endif
group.long 0x30++7.
line.long 0x0 "EXTMASK7,External Mask Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Mask Value on EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Mask Value on CTTRIGIN[1:0]" "00,01,10,11"
line.long 0x4 "EXTCOMP7,External Compare Register"
bitfld.long 0x4 2.--7. " EXTTRIG[5:0] ,Compare Value for EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x4 0.--1. "  CTTRIGIN[1:0] ,Compare Value for CTTRIGIN[1:0]" "00,01,10,11"
if ela.version()>=0x600
group.long 0x38++7.
line.long 0x00 "QUALMASK7,Qualifier Mask Register"
line.long 0x04 "QUALCOMP7,Qualifier Compare Register"
endif
group.long 0x40++0x1F
textline "               [255:224][223:192][191:160][159:128] [127:96]  [95:64]  [63:32]  [31:00]"
line.long    0x1C "SIGMASK7,Signal Mask Register [255:224]"
hexfld.long 0x18 ",Signal Mask Register [223:192]"
hexfld.long 0x14 " ,Signal Mask Register [191:160]"
hexfld.long 0x10 " ,Signal Mask Register [159:128]"
hexfld.long 0xc " ,Signal Mask Register [127:96]"
hexfld.long 0x8 " ,Signal Mask Register [95:64]"
hexfld.long 0x4 " ,Signal Mask Register [63:32]"
hexfld.long 0x0 " ,Signal Mask Register [31:00]"
group.long 0x80++0x1F
line.long    0x1C "SIGCOMP7,Signal Compare Register [255:224]"
hexfld.long 0x18 ",Signal Compare Register [223:192]"
hexfld.long 0x14 " ,Signal Compare Register [191:160]"
hexfld.long 0x10 " ,Signal Compare Register [159:128]"
hexfld.long 0xc " ,Signal Compare Register [127:96]"
hexfld.long 0x8 " ,Signal Compare Register [95:64]"
hexfld.long 0x4 " ,Signal Compare Register [63:32]"
hexfld.long 0x0 " ,Signal Compare Register [31:00]"
tree "CoreSight Management"
base &baseaddr
group.long 0xee8++0x3 "Integration Mode"
line.long 0x0 "ITTRIGOUT,Integration Mode Action Trigger Output Register"
bitfld.long 0x0 4.--7. " ELAOUTPUT[3:0] ,Value to drive on ELAOUTPUT[3:0]" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x0 2. "  STOPCLOCK ,Assert STOPCLOCK" "No,Yes"
bitfld.long 0x0 0.--1. "  CTTRIGOUT[1:0] ,Value to drive on CTTRIGOUT[1:0]" "00,01,10,11"
if ela.version()>=0x600
wgroup.long 0xeec++0x3
line.long 0x00 "ITATBDATA,Integration Mode ATB Data Register"
bitfld.long 0x00 4. " ATDATAM31_W ,ATDATAM[31] output value set" "0,1"
bitfld.long 0x00 3. "   ATDATAM23_W   ,ATDATAM[23] output value set" "0,1"
bitfld.long 0x00 2. "  ATDATAM15_W ,ATDATAM[15] output value set" "0,1"
bitfld.long 0x00 1. "  ATDATAM7_W    ,ATDATAM[7] output value set" "0,1"
textline "                        "
bitfld.long 0x00 0. " ATDATAM0_W  ,ATDATAM[0] output value set" "0,1"
rgroup.long 0xef0++0x3
line.long 0x00 "ITATBCTR1,Integration Mode ATB Control Register 1"
bitfld.long 0x00 1. " AFVALIDM_R  ,Value of the AFVALIDM input" "0,1"
bitfld.long 0x00 0. "   ATREADYM_R    ,Value of the ATREADYM input" "0,1"
wgroup.long 0xef4++0x7
line.long 0x00 "ITATBID,Integration Mode ATB Control Register 0"
hexmask.long.byte 0x00 0.--6. 1. " ATIDM_W     ,ATIDM output value set"
line.long 0x04 "ITATBCTR0,Integration Mode ATB Control 0 Register"
bitfld.long 0x04 8.--9. " ATBYTESM_W  ,ATBYTESM output value set" "00,01,10,11"
bitfld.long 0x04 1. "  AFREADYM_W    ,AFREADYM output value set" "0,1"
bitfld.long 0x04 0. "  ATVALIDM_W  ,ATVALIDM output value set" "0,1"
endif
group.long 0xef8++0x3
line.long 0x0 "ITTRIGIN,Integration Mode External Trigger Input Register"
bitfld.long 0x0 2.--7. " EXTTRIG[5:0] ,Capture Value from EXTTRIG[3:0]" "000000,000001,000010,000011,000100,000101,000110,000111,001000,001001,001010,001011,001100,001101,001110,001111,010000,010001,010010,010011,010100,010101,010110,010111,011000,011001,011010,011011,011100,011101,011110,011111,100000,100001,100010,100011,100100,100101,100110,100111,101000,101001,101010,101011,101100,101101,101110,101111,110000,110001,110010,110011,110100,110101,110110,110111,111000,111001,111010,111011,111100,111101,111110,111111"
bitfld.long 0x0 0.--1. "  CTTRIGIN[1:0] ,Capture Value from CTTRIGIN[1:0]" "00,01,10,11"
group.long 0xf00++0x3
line.long 0x0 "ITCTRL,Integration Mode Control Register"
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
wgroup 0xfb0++0x3 "Software Lock"
line.long 0x0 "LAR,Lock Access Register"
group 0xfb4++3
line.long 0x0 "LSR,Lock Status Register"
bitfld.long 0x0 1. " LS ,Lock Status" "Locked,Unlocked"
bitfld.long 0x0 0. "  LCM ,Lock Control Mechanism Implemented" "No,Yes"
group.long 0xfb8++0x3 "Authentification"
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
bitfld.long 0x0 6.--7. " SNID ,Secure Non-Invasive Debug" "Not Implemented,Not Implemented,Disabled,Enabled"
bitfld.long 0x0 4.--5. "  SID ,Secure Invasive Debug" "Not Implemented,Not Implemented,Disabled,Enabled"
bitfld.long 0x0 2.--3. "  NSNID ,Non-Secure Non-Invasive Debug" "Not Implemented,Not Implemented,Disabled,Enabled"
bitfld.long 0x0 0.--1. "  NSID ,Non-Secure Invasive Debug" "Not Implemented,Not Implemented,Disabled,Enabled"
group.long 0xfbc++0x3 "Device"
line.long 0x0 "DEVARCH,Device Architecture Register"
hexmask.long.word 0x0 21.--31. 1. " ARCHITECT ,Architect of the Device (should be 0x23b)"
bitfld.long 0x0 20. "  PRESENT ,Indicates the Presence of This Register" "No,Yes"
bitfld.long 0x0 16.--19. "  REVISION ,Architecture Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x0 0.--15. 1. "  ARCHID ,Architecture of the Device (should be 0x0a75)"
group.long 0xfc0++0xf
line.long 0x0 "DEVID2,Device Configuration Register 2"
bitfld.long 0x0 19. " TRIGINEDGE ,Trigger 3 Edge Detect" "Level,Edge"
bitfld.long 0x0 18. " ,Trigger 2 Edge Detect" "Level,Edge"
bitfld.long 0x0 17. " ,Trigger 1 Edge Detect" "Level,Edge"
bitfld.long 0x0 16. " ,Trigger 0 Edge Detect" "Level,Edge"
bitfld.long 0x0 8.--15., "  COMPWIDTH ,Comparator Width" "=WIDTH,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,200,208,216,224,232,240,248,256,?..."
bitfld.long 0x0 7. "  ALTTS  ,Trigger State 7 Implemented" "-,7"
bitfld.long 0x0 6. ",Trigger State 6 Implemented" "-,6"
bitfld.long 0x0 5. ",Trigger State 5 Implemented" "-,5"
bitfld.long 0x0 4. ",Trigger State 4 Implemented" "-,4"
bitfld.long 0x0 3. ",Trigger State 3 Implemented" "-,3"
bitfld.long 0x0 2. ",Trigger State 2 Implemented" "-,2"
bitfld.long 0x0 1. ",Trigger State 1 Implemented" "-,1"
bitfld.long 0x0 0. ",Trigger State 0 Implemented" "-,0"
line.long 0x4 "DEVID1,Device Configuration Register 1"
hexmask.long.byte 0x4 24.--31. 1. " COUNTWIDTH ,Counter Width (should be 32 = 0x20)"
bitfld.long 0x4 16.--23. "  NUMTRIGSTATES ,Number of Trigger States" "-,-,-,-,4,5,?..."
bitfld.long 0x4 8.--15. "  SIGGRPWIDTH ,Number of Signals per Group (number/8-1)" "-,-,-,-,-,-,-,64 Signals/Group,-,-,-,-,-,-,-,128 Signals/Group,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,256 Signals/Group,?..."
hexmask.long.byte 0x4 0.--7. 1. "  NUMSIGGRPS ,Number of Signal Groups (should be 12 = 0x0c)"
line.long 0x8 "DEVID,Device Configuration Register 0"
bitfld.long 0x8 25.--28. " SCRAMBLER ,Scrambler Present" "-,Has Scrambler,?..."
bitfld.long 0x8 20.--24. "  ID_CAPTURE_SIZE ,Number of Bits used for the Captured Transaction ID" " -,-,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,-"
bitfld.long 0x8 16.--19. "  COND_TRIG ,Has Conditional Trigger State Feature" "No,Yes,?..."
bitfld.long 0x8 8.--15. "  SRAM_ADDR_SIZE ,Trace RAM Size; Record: 1+8 bytes (64 Signals/Group) or 1+16 bytes (128 Signals/Group)" "-,-,4 Records,8 Records,16 Records,32 Records,64 Records,128 Records,256 Records,512 Records,1024 Records,2048 Records,4096 Records,8192 Records,16384 Records,?..."
textline "                       "
bitfld.long 0x8 4.--7. "  TRACEFORMAT ,Trace Format" "-,Header Rev.1,ATB,?..."
bitfld.long 0x8 0.--3. " TRACETYPE ,Trace Type" "-,Has ATB Trace,?..."
line.long 0xc "DEVTYPE,Device Type Register (should be 0x75)"
bitfld.long 0xc 4.--7. " SUB ,Sub-type of the Device (should be 0x7)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0xc 0.--3. "  MAJOR ,Major Type of the Device (should be 0x5)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group.long 0xfe0++0xf "Peripheral Identification Registers"
line.long 0x0 "PIDR0,Peripheral ID0 Register (should be 0x000000b8)"
hexmask.long.byte 0x0 0.--7. 1. " PART_0 ,Part Number [7:0] (should be 0xb8)"
line.long 0x4 "PIDR1,Peripheral ID1 Register (should be 0x000000b9)"
bitfld.long 0x4 4.--7. " DES_0 ,JEP106 Identity Code [3:0] (should be 0xb)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x4 0.--3. "  PART_1 ,Part Number [11:8] (should be 0x9)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
line.long 0x8 "PIDR2,Peripheral ID2 Register"
bitfld.long 0x8 4.--7. " REVISION ,Revision [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x8 3. "  JEDEC ,JEDEC (should be 0x1)" "0,1"
bitfld.long 0x8 0.--2. "  DES_1 ,JEP106 Identity Code [6:4] (should be 0x3)" "0,1,2,3,4,5,6,7"
line.long 0xc "PIDR3,Peripheral ID3 Register (should be 0x00000000)"
bitfld.long 0xc 4.--7. " REVAND ,RevAnd [3:0] (should be 0x0)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0xc 0.--3. "  CMOD ,Customer Modified [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group.long 0xfd0++0xf
line.long 0x0 "PIDR4,Peripheral ID4 Register (should be 0x00000004)"
bitfld.long 0x0 4.--7. " SIZE ,Always 0x0 indicating a single 4KB component (should be 0x0)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x0 0.--3. "  DES_2 ,JEP106 Continuation Code [3:0] (should be 0x4)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
line.long 0x4 "PIDR5,Peripheral ID5 Register (should be 0x00000000)"
line.long 0x8 "PIDR6,Peripheral ID6 Register (should be 0x00000000)"
line.long 0xc "PIDR7,Peripheral ID7 Register (should be 0x00000000)"
group.long 0xff0++0xf "Component Identification Registers"
line.long 0x0 "CIDR0,Component ID0 Register (should be 0x0000000d)"
hexmask.long.byte 0x0 0.--7. 1. " PRMBL_0 ,PRMBL_0 (should be 0x0d)"
line.long 0x4 "CIDR1,Component ID1 Register (should be 0x00000090)"
bitfld.long 0x4 4.--7. " CLASS ,CLASS (should be 0x9)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x4 0.--3. "  PRMBL_1 ,PRMBL_1 (should be 0x0)" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
line.long 0x8 "CIDR2,Component ID2 Register (should be 0x00000005)"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,PRMBL_2 (should be 0x05)"
line.long 0xc "CIDR3,Component ID3 Register (should be 0x000000b1)"
hexmask.long.byte 0xc 0.--7. 1. " PRMBL_3 ,PRMBL_3 (should be 0xb1)"
tree.end
textline " "